JP2702321B2 - Semiconductor device manufacturing equipment - Google Patents

Semiconductor device manufacturing equipment

Info

Publication number
JP2702321B2
JP2702321B2 JP3193362A JP19336291A JP2702321B2 JP 2702321 B2 JP2702321 B2 JP 2702321B2 JP 3193362 A JP3193362 A JP 3193362A JP 19336291 A JP19336291 A JP 19336291A JP 2702321 B2 JP2702321 B2 JP 2702321B2
Authority
JP
Japan
Prior art keywords
semiconductor device
island
device manufacturing
manufacturing equipment
marking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3193362A
Other languages
Japanese (ja)
Other versions
JPH0536739A (en
Inventor
積 高堂
Original Assignee
九州日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 九州日本電気株式会社 filed Critical 九州日本電気株式会社
Priority to JP3193362A priority Critical patent/JP2702321B2/en
Publication of JPH0536739A publication Critical patent/JPH0536739A/en
Application granted granted Critical
Publication of JP2702321B2 publication Critical patent/JP2702321B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54406Marks applied to semiconductor devices or parts comprising alphanumeric information
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/54486Located on package parts, e.g. encapsulation, leads, package substrate

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造装置に
関し、特にダイボンディング装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing apparatus, and more particularly to a die bonding apparatus.

【0002】[0002]

【従来の技術】従来のダイボンディング装置は、1ピッ
チずつ送られるリードフレームのアイランド部へ接着材
料を供給又は転写し、その上に吸着治具を用いてペレッ
トを接着するという機能を有している。
2. Description of the Related Art A conventional die bonding apparatus has a function of supplying or transferring an adhesive material to an island portion of a lead frame fed one pitch at a time, and bonding a pellet thereon using a suction jig. I have.

【0003】[0003]

【発明が解決しようとする課題】従来、ダイボンディン
グされたペレットの履歴やロット番号等は、樹脂封止
後、樹脂の外面に捺印により印字している。しかし、外
面の捺印は擦れて消えることがあり、樹脂内に封止され
ているペレットの履歴がわからなくなるという問題があ
った。
Conventionally, the history, lot number, etc., of the die-bonded pellets are printed by stamping on the outer surface of the resin after sealing with the resin. However, there is a problem that the stamp on the outer surface may be rubbed and disappeared, and the history of the pellets sealed in the resin may not be known.

【0004】[0004]

【課題を解決するための手段】本発明のダイボンディン
グ装置は、ペレットをダイボンディングした後、リード
フレームのアイランド裏面に対しそのペレットの履歴や
型名を捺印する機能を付加した構造を有している。
The die bonding apparatus of the present invention has a structure in which after the pellets are die-bonded, a function of imprinting the history or model name of the pellets on the back surface of the island of the lead frame is added. I have.

【0005】[0005]

【実施例】次に本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

【0006】図1は本発明の一実施例の装置構成図であ
る。本実施例では、ダイボンディング後に、そのアイラ
ンド裏面にペレットの履歴を捺印する捺印部を設けてい
る。リードフレームを1ピッチずつ送り、まず接着材供
給部において、リードフレーム1が有しているペレット
を接着する位置であるアイランド2に、接着材料3を塗
布または転写し、次いでダイボンディング部において、
位置決めされたペレット4を吸着治具5にて吸着し、ア
イランド2へ接着する。その後、捺印位置において、捺
印インクを表面に有する捺印部6がリードフレーム裏面
へ接触し捺印を行う。
FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention. In this embodiment, after the die bonding, a marking portion for marking the history of the pellet is provided on the back surface of the island. The lead frame is fed one pitch at a time. First, in the adhesive supply section, the adhesive material 3 is applied or transferred to the island 2 where the pellets of the lead frame 1 are bonded, and then in the die bonding section,
The positioned pellet 4 is sucked by the suction jig 5 and adhered to the island 2. Thereafter, at the marking position, the marking portion 6 having the marking ink on the front surface contacts the rear surface of the lead frame to perform the marking.

【0007】図2はアイランド裏面へ捺印されたICの
裏面側から見た斜視図である。アイランド2に接着され
たペレット4は、金属細線7にて外部リード8と電気的
に接続されている。そのアイランド2の裏面には捺印部
6によって捺印されたロット記号9aやシリアル番号9
b等が有る。そして、それ全体を封止樹脂10で封止し
ている。
FIG. 2 is a perspective view of the IC stamped on the back surface of the island as viewed from the back surface side. The pellet 4 bonded to the island 2 is electrically connected to an external lead 8 by a thin metal wire 7. On the back surface of the island 2, the lot code 9a or the serial number 9
b etc. Then, the whole is sealed with a sealing resin 10.

【0008】[0008]

【発明の効果】以上説明したように本発明は、ダイボン
ディング時にダイボンディングされたペレットの履歴等
をアイランド裏面に捺印することにより、封止樹脂へ捺
印された履歴が消えた場合においても、内部のペレット
の履歴を知ることが出来るという効果が有る。
As described above, according to the present invention, the history of the die-bonded pellets is stamped on the back surface of the island at the time of die bonding, so that even if the history printed on the sealing resin disappears, The effect is that the history of the pellets can be known.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例の装置構成図である。FIG. 1 is a configuration diagram of an apparatus according to an embodiment of the present invention.

【図2】捺印されたICを裏面側から見た切欠き斜視図
である。
FIG. 2 is a cutaway perspective view of the stamped IC viewed from the back side.

【符号の説明】[Explanation of symbols]

1 リードフレーム 2 アイランド 3 接着材料 4 ペレット 5 吸着治具 6 捺印部 7 金属細線 8 外部リード 9a ロット記号 9b シリアル番号 10 封止樹脂 DESCRIPTION OF SYMBOLS 1 Lead frame 2 Island 3 Adhesive material 4 Pellet 5 Suction jig 6 Marking part 7 Fine metal wire 8 External lead 9a Lot symbol 9b Serial number 10 Sealing resin

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 リードフレームへ半導体ペレットを接着
する半導体装置の製造装置において、ダイボンディング
後リードフレームのアイランド部裏面にボンディングさ
れたペレットの履歴を捺印する捺印部を有する事を特徴
とする半導体装置の製造装置
1. A semiconductor device manufacturing apparatus for bonding a semiconductor pellet to a lead frame, the semiconductor device having a marking portion for marking the history of the pellet bonded to the back surface of the island portion of the lead frame after die bonding. Manufacturing equipment
JP3193362A 1991-08-02 1991-08-02 Semiconductor device manufacturing equipment Expired - Fee Related JP2702321B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3193362A JP2702321B2 (en) 1991-08-02 1991-08-02 Semiconductor device manufacturing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3193362A JP2702321B2 (en) 1991-08-02 1991-08-02 Semiconductor device manufacturing equipment

Publications (2)

Publication Number Publication Date
JPH0536739A JPH0536739A (en) 1993-02-12
JP2702321B2 true JP2702321B2 (en) 1998-01-21

Family

ID=16306652

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3193362A Expired - Fee Related JP2702321B2 (en) 1991-08-02 1991-08-02 Semiconductor device manufacturing equipment

Country Status (1)

Country Link
JP (1) JP2702321B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013069741A (en) 2011-09-21 2013-04-18 Renesas Electronics Corp Lead frame, semiconductor device, method for manufacturing lead frame and method for manufacturing semiconductor device
DE102019110191A1 (en) * 2019-04-17 2020-10-22 Infineon Technologies Ag Package comprising an identifier on and / or in a carrier

Also Published As

Publication number Publication date
JPH0536739A (en) 1993-02-12

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Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19970819

LAPS Cancellation because of no payment of annual fees