JP2697141B2 - Pulse generation circuit - Google Patents
Pulse generation circuitInfo
- Publication number
- JP2697141B2 JP2697141B2 JP1136333A JP13633389A JP2697141B2 JP 2697141 B2 JP2697141 B2 JP 2697141B2 JP 1136333 A JP1136333 A JP 1136333A JP 13633389 A JP13633389 A JP 13633389A JP 2697141 B2 JP2697141 B2 JP 2697141B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- switch
- power supply
- detection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S3/00—Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
- H01S3/09—Processes or apparatus for excitation, e.g. pumping
- H01S3/097—Processes or apparatus for excitation, e.g. pumping by gas discharge of a gas laser
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Optics & Photonics (AREA)
- Lasers (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、パルスレーザー等に使用されるパルス発
生回路を形成する高電圧高電流のスイツチに関するもの
である。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-voltage high-current switch forming a pulse generation circuit used for a pulse laser or the like.
〔従来の技術〕 第４図は、例えば雑誌「COPPER VAPOR LASERS COME O
F AGE」（LASER FOCUS,JULY,1982）に記載された、従来
の銅蒸気レーザ用のパルス発生回路である。以下、この
発明に関する記載は銅蒸気レーザ用のパルス発生回路を
例に取り、説明を行う。[Prior Art] FIG. 4 shows, for example, a magazine “COPPER VAPOR LASERS COME O
F AGE ”(LASER FOCUS, JULY, 1982) is a pulse generation circuit for a conventional copper vapor laser. Hereinafter, description of the present invention will be given by taking a pulse generation circuit for a copper vapor laser as an example.
第４図において、（１）は高圧電源、（２）は充電用
リアクトル、（３）は充電用ダイオード、（４）は充放
電を行う主コンデンサ、（５）は充電用抵抗、（６）は
サイラトロンスイツチ、（７）はレーザチユーブであ
る。In FIG. 4, (1) is a high-voltage power supply, (2) is a charging reactor, (3) is a charging diode, (4) is a main capacitor for charging and discharging, (5) is a charging resistor, and (6). Is a thyratron switch, and (7) is a laser tube.
次に動作について説明する。高圧電源（１）から発生
される高圧電圧（数KV〜数十KV）は、リアクトル
（２）、ダイオード（３）さらには充電用抵抗（５）を
とおつて、主コンデンサ（４）に充電される。次にサイ
ラトロンスイツチ（６）が導通すると、主コンデンサ
（４）に蓄えられた電圧は、サイラトロンスイツチ
（６）を通りレーザチユーブ（７）に印加される。その
際レーザチユーブ（７）のインピーダンスは充電用抵抗
（５）の抵抗値より大幅に小さくなるため、サイラトロ
ンスイツチ（６）に流れる電流は主としてレーザチユー
ブ（７）に流れることで、レーザチユーブ（７）が励起
され、レーザ発振を生ずる。Next, the operation will be described. The high voltage (several KV to several tens of KV) generated from the high voltage power supply (1) is charged to the main capacitor (4) through the reactor (2), the diode (3) and the charging resistor (5). You. Next, when the thyratron switch (6) is turned on, the voltage stored in the main capacitor (4) is applied to the laser tube (7) through the thyratron switch (6). At that time, the impedance of the laser tube (7) becomes much smaller than the resistance value of the charging resistor (5), and therefore, the current flowing through the thyratron switch (6) mainly flows through the laser tube (7). ) Is excited to cause laser oscillation.
一般に銅蒸気レーザの場合、より急峻なパルス電圧を
レーザチユーブ（７）に印加すれば、より高いレーザ出
力が得られるのでスイツチとして使用されるサイラトロ
ンスイツチ（６）には数10nsecのスイツチングが要求さ
れる。Generally, in the case of a copper vapor laser, if a steeper pulse voltage is applied to the laser tube (7), a higher laser output can be obtained. Therefore, the thyratron switch (6) used as a switch requires several tens of nanoseconds of switching. You.
以上のように銅蒸気レーザ等に用いられた従来のパル
ス発生回路においては、レーザチユーブ（７）に供給す
るパルス電圧をより急峻にしてレーザ効率のアツプを図
るため、パルス発生回路に使用されるスイツチには、大
電力用で数10nsecでスイツチングオンが可能なサイラト
ロンスイツチ（６）が用いられていた。しかし、サイラ
トロンスイツチ（６）は真空管であるため、有限の寿命
を持ち、頻繁に交換する必要があつた。またサイラトロ
ンスイツチ（６）が手作り品であるため、レーザ効率に
影響する電流の立ち上がりやスイツチング時間に個々の
バラツキがある等、品質の安定性に問題があった。As described above, in the conventional pulse generating circuit used for a copper vapor laser or the like, the pulse voltage supplied to the laser tube (7) is made steeper to increase the laser efficiency, so that it is used in the pulse generating circuit. As the switch, a thyratron switch (6) capable of switching on for several tens of nanoseconds for high power has been used. However, since the thyratron switch (6) is a vacuum tube, it has a finite life and needs to be replaced frequently. In addition, since the thyratron switch (6) is a handmade product, there is a problem in quality stability such as individual variations in rising of current and switching time which affect laser efficiency.
この発明は上記のような問題点を解消するためになさ
れたもので、寿命がなく、また安定性、信頼性の高いパ
ルス発生用スイツチを得ることを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to obtain a switch for generating a pulse which has no life, and has high stability and reliability.
この発明に係るパルス発生回路はスイツチを半導体に
よる直列接続により構成し、かつ半導体のの電圧を検出
して異常時にスイツチを導通させ、また高電圧電源を遮
断するようにしたものである。In the pulse generation circuit according to the present invention, a switch is formed by connecting a semiconductor in series, and when a voltage of the semiconductor is detected, the switch is turned on when an abnormality occurs, and the high-voltage power supply is cut off.
この発明に係るパルス発生回路はスイツチが半導体の
直列接続により構成され、各半導体に過大電圧が印加さ
れた時に、このスイツチを導通させ、かつ高圧電源を遮
断するようにしたため、半導体の過電圧による破壊を防
止でき、寿命レスで、安定性の高いパルス発生回路を供
給できる。In the pulse generation circuit according to the present invention, the switches are configured by connecting the semiconductors in series, and when an excessive voltage is applied to each semiconductor, the switches are made conductive and the high-voltage power supply is cut off. Can be prevented, and a pulse generation circuit with a long life and high stability can be supplied.
以下この発明の一実施例を図について説明する。第１
図において、（８）はFET、（９）はFETの両端の電圧を
検出する第１の検出回路、（10）はスイツチ全体の電圧
を検出する第２の検出回路、（11）は保護回路、（12）
は信号発生回路、（13）は第１のOR回路である。第２図
は第１図中の第２の検出回路（10）の一実施例であり、
（14a），（14b）は分圧抵抗、（15）は比較器、（16）
はフリツプフロツプである。第３図は第１図中の保護回
路（11）の一実施例であり、（17）は第２のOR回路であ
る。An embodiment of the present invention will be described below with reference to the drawings. First
In the figure, (8) is a FET, (9) is a first detection circuit for detecting the voltage across the FET, (10) is a second detection circuit for detecting the voltage of the entire switch, and (11) is a protection circuit. , (12)
Is a signal generation circuit, and (13) is a first OR circuit. FIG. 2 shows an embodiment of the second detection circuit (10) in FIG.
(14a), (14b) are voltage dividing resistors, (15) are comparators, (16)
Is a flip-flop. FIG. 3 shows an embodiment of the protection circuit (11) in FIG. 1, and (17) shows a second OR circuit.
次に動作について説明する。スイツチの安定性を向上
させ、かつ寿命レスとするためには、真空管であるサイ
ラトロンを半導体化することが要求される。サイラトロ
ンが実現してきたような数KV〜数10KV,数10nsecのスイ
ツチングを可能とする単一の半導体は、現在存在し得な
い。数10nsecのスイツチングを実現する半導体のFET等
は耐圧が最大でも1KV程度しか無いため、数KV〜数10KV
の耐圧を得るためにはFET等の高速半導体の複数個の直
列接続が必要となる。しかしながら、高速半導体の直列
接続にてスイツチを構成した場合、電源電圧の変動や回
路の誤動作等による異常時に、スイツチや半導体に過大
電圧が発生すると、サイラトロンで見られたような自爆
による自動保護は働かず、半導体が耐圧オーバにより破
壊してしまう恐れがある。Next, the operation will be described. In order to improve the stability of the switch and reduce the life, it is required to convert the thyratron, which is a vacuum tube, into a semiconductor. A single semiconductor capable of switching from several KV to several tens of KV and several tens of nanoseconds as realized by Thyratron cannot exist at present. Since the withstand voltage of a semiconductor FET or the like that realizes switching of several tens of nanoseconds is only about 1 KV at the maximum, several KV to several tens KV
In order to obtain the withstand voltage, a plurality of high-speed semiconductors such as FETs need to be connected in series. However, when a switch is configured with a series connection of high-speed semiconductors, if an excessive voltage is generated in the switch or the semiconductor at the time of abnormality due to fluctuations in the power supply voltage or malfunction of the circuit, the automatic protection by self-destruction as seen in the thyratron will not be possible. There is a possibility that the semiconductor will not work and will be destroyed due to over withstand voltage.
そこで、この発明では第１図に示すように、FET
（８）は複数個直列に接続されており、全体で数KV〜数
10KVの耐圧を有しているが、各FET（８）の両端の電圧
を第１の検出回路（９）で検出し、かつスイツチ全体の
電圧を第２の検出回路（10）で検出する。第２図にしめ
されるように、第２の検出回路（10）で検出された信号
は分圧抵抗（14a），（14b）にて分圧され、さらに基準
電圧VREFと比較される。その結果VREFが小さければ、比
較器（15）が信号HIGHを出力しフリツプフロツプ（16）
がHIGHとなりその信号を保護回路（11）に入力する。同
様な構成となつている第１の検出回路（９）の出力信号
も保護回路（11）に入力される。保護回路（11）に入力
された信号は第３図に示されるような第２のOR回路で処
理され、第１のOR回路（13）と、入力信号がHIGHの時に
遮断する高圧電源（１）に入力される。信号発生回路
（12）からは、通常動作時の導通信号を発生し、この信
号を第１のOR回路（13）に入力する。また、上記基準電
圧は第１の検出回路（９）ではFET（８）の耐圧を分圧
した値付近、第２の検出回路（10）ではスイツチの耐圧
を分圧した値付近に設定してある。Therefore, in the present invention, as shown in FIG.
(8) is connected in series, several KV to several in total
Although it has a withstand voltage of 10 KV, the voltage across each FET (8) is detected by a first detection circuit (9), and the voltage across the switch is detected by a second detection circuit (10). As shown in FIG. 2, the signal detected by the second detection circuit (10) is divided by voltage dividing resistors (14a) and (14b) and further compared with a reference voltage VREF . As a result, if V REF is small, the comparator (15) outputs a signal HIGH and the flip-flop (16)
Becomes HIGH and the signal is input to the protection circuit (11). An output signal of the first detection circuit (9) having a similar configuration is also input to the protection circuit (11). The signal input to the protection circuit (11) is processed by a second OR circuit as shown in FIG. 3, and the first OR circuit (13) is connected to a high-voltage power supply (1) which cuts off when the input signal is HIGH. ). The signal generation circuit (12) generates a conduction signal during normal operation, and inputs this signal to the first OR circuit (13). The reference voltage is set to a value near the value obtained by dividing the withstand voltage of the FET (8) in the first detection circuit (9), and to a value obtained by dividing the withstand voltage of the switch in the second detection circuit (10). is there.
上記のような構成により、例えば電源電圧の変動や、
回路トラブル等によりスイツチ全体および、FETに過大
電圧が印加しても、第１の検出回路（９）および第２の
検出回路（10）で設定された基準電圧を越えれば自動的
に保護回路（11）にHIGH信号が入力され、第１のOR回路
（13）を通してFET（８）を強制的に導通させることが
できる。その結果、FET（８）の耐圧オーバによる破壊
は防止できる。さらに同時に高圧電源（１）も遮断する
ため、スイツチ導通による電源短絡などの２次的災害も
防止できる。With the above configuration, for example, fluctuations in power supply voltage,
Even if an excessive voltage is applied to the entire switch and the FET due to a circuit trouble or the like, if the reference voltage set by the first detection circuit (9) and the second detection circuit (10) is exceeded, the protection circuit ( A HIGH signal is input to 11), and the FET (8) can be forcibly turned on through the first OR circuit (13). As a result, it is possible to prevent the FET (8) from being destroyed due to over withstand voltage. Further, since the high-voltage power supply (1) is also cut off at the same time, a secondary disaster such as a power supply short-circuit due to switch conduction can be prevented.
なお、上記実施例では第２の検出回路（10）にてスイ
ツチ全体の電圧を検出しているが、信頼性は低くなる
が、第２の検出回路（10）を設けず、第１の検出回路
（９）のみで過電圧を検出してもよい。In the above embodiment, although the voltage of the entire switch is detected by the second detection circuit (10), the reliability is low. However, the second detection circuit (10) is not provided, and the first detection circuit (10) is not provided. The overvoltage may be detected only by the circuit (9).
また、上記実施例では半導体にFETを用いたが、SIT,I
GBT,SIサイリスタ、トランジスタ、サイリスタ等でも構
わない。In the above embodiment, the FET is used as the semiconductor.
GBT, SI thyristor, transistor, thyristor, etc. may be used.
以上のように、この発明によれば高圧電源から主コン
デンサに高圧電圧を充電し、上記主コンデンサの電圧を
スイツチを通して負荷に供給するパルス発生回路におい
て、上記スイツチを半導体の直列接続にて構成し、各半
導体の両端にかかる電圧を検出して、過電圧が発生した
場合にスイツチを導通させ、かつ上記高圧電源を遮断す
るようにしたので、寿命レスかつ安定性、信頼性が高い
装置を提供できる効果がある。As described above, according to the present invention, in a pulse generation circuit that charges a high voltage to a main capacitor from a high voltage power supply and supplies the voltage of the main capacitor to a load through a switch, the switch is configured by connecting semiconductors in series. Since a voltage applied to both ends of each semiconductor is detected and a switch is turned on when an overvoltage occurs and the high-voltage power supply is cut off, an apparatus having a long life, high stability and high reliability can be provided. effective.
第１図はこの発明の一実施例によるパルス発生回路を示
す構成図、第２図はこの発明の一実施例に係る第２の検
出回路を示す回路図、第３図はこの発明の一実施例に係
る保護回路を示す回路図、及び第４図は従来のパルス発
生回路を示す回路構成図である。 （１）は高圧電源、（４）は主コンデンサ、（７）はレ
ーザチユーブ、（８）はFET、（９）は第１の検出回
路、（11）は保護回路、（12）は信号発生回路である。 なお、図中、同一符号は同一、又は相当部分を示す。FIG. 1 is a block diagram showing a pulse generating circuit according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing a second detecting circuit according to an embodiment of the present invention, and FIG. 3 is an embodiment of the present invention. FIG. 4 is a circuit diagram showing a protection circuit according to an example, and FIG. 4 is a circuit configuration diagram showing a conventional pulse generation circuit. (1) is a high-voltage power supply, (4) is a main capacitor, (7) is a laser tube, (8) is a FET, (9) is a first detection circuit, (11) is a protection circuit, and (12) is a signal generator. Circuit. In the drawings, the same reference numerals indicate the same or corresponding parts.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 植田 至宏 兵庫県尼崎市塚口本町８丁目１番１号 三菱電機株式会社中央研究所内 (72)発明者 村田 信二 兵庫県尼崎市塚口本町８丁目１番１号 三菱電機株式会社生産技術研究所内 (72)発明者 熊谷 隆 兵庫県尼崎市塚口本町８丁目１番１号 三菱電機株式会社生産技術研究所内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Toshihiro Ueda 8-1-1 Tsukaguchi Honcho, Amagasaki-shi, Hyogo Inside the Central Research Laboratory of Mitsubishi Electric Corporation (72) Inventor Shinji Murata 8-1-1, Tsukaguchi-Honcho, Amagasaki-shi, Hyogo No. 1 Mitsubishi Electric Corporation Production Technology Laboratory (72) Inventor Takashi Kumagai 8-1-1 Tsukaguchi Honcho, Amagasaki City, Hyogo Prefecture Mitsubishi Electric Corporation Production Technology Laboratory
Claims (1)
電圧を充電する主コンデンサ、複数の半導体の直列接続
により構成され、上記主コンデンサに蓄えられた電圧を
負荷に供給する放電用スイッチ、上記スイッチの各半導
体の両端に発生する電圧を検出する検出回路、及びこの
検出回路からの出力が基準値以上の時、上記各半導体に
導通信号を出力し、かつ上記高圧電源を遮断する保護回
路を備えたことを特徴とするパルス発生回路。1. A high-voltage power supply having a direct current, a main capacitor for charging a high voltage from the high-voltage power supply, a discharge switch configured to connect a plurality of semiconductors in series and supplying a voltage stored in the main capacitor to a load, A detection circuit for detecting a voltage generated between both ends of each semiconductor of the switch, and a protection circuit for outputting a conduction signal to each semiconductor and shutting off the high voltage power supply when an output from the detection circuit is equal to or more than a reference value. A pulse generation circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1136333A JP2697141B2 (en) | 1989-05-30 | 1989-05-30 | Pulse generation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1136333A JP2697141B2 (en) | 1989-05-30 | 1989-05-30 | Pulse generation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH031714A JPH031714A (en) | 1991-01-08 |
| JP2697141B2 true JP2697141B2 (en) | 1998-01-14 |
Family
ID=15172767
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1136333A Expired - Lifetime JP2697141B2 (en) | 1989-05-30 | 1989-05-30 | Pulse generation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2697141B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3991450B2 (en) | 1998-06-16 | 2007-10-17 | 三菱電機株式会社 | High frequency AC power supply |
| US6266907B1 (en) * | 1999-02-23 | 2001-07-31 | Intercraft Company | Album page |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0266471A (en) * | 1988-08-31 | 1990-03-06 | Furukawa Electric Co Ltd:The | Loading test device |
-
1989
- 1989-05-30 JP JP1136333A patent/JP2697141B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0266471A (en) * | 1988-08-31 | 1990-03-06 | Furukawa Electric Co Ltd:The | Loading test device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH031714A (en) | 1991-01-08 |
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