JP2696832B2 - Information retrieval circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information search circuit in an optical file system or the like, and more particularly, to an information search circuit that performs high-speed logical search between fields by hardware. [Prior Art] In an optical file system, there is a problem of accumulating a large amount of image data of a document and speeding up document retrieval. In the conventional search method, a search by software has been performed, but a search by hardware has also been proposed, and the search is being accelerated. For example, in an apparatus described in Japanese Patent Application Laid-Open No. Sho 60-105040, an automaton is provided for each field to speed up search. However, if all of the search functions that have been supported by software are supported by hardware in order to speed up the search, the circuit configuration becomes too large. [Problems to be Solved by the Invention] In the above prior art, no consideration is given to a logical search between fields, and a logical operation between fields requires software intervention for a search result of each field. there were. For this reason, there is a problem that it is difficult to improve the search speed. It is an object of the present invention to improve such a problem and to provide an information retrieval circuit capable of executing a logical operation set between fields by hardware. [Means for Solving the Problem] In order to achieve the above object, an information search circuit of the present invention comprises:
An information search circuit using a finite automaton 9 for outputting each search result for a plurality of search conditions given to each of fields in a search target record as a bit string, and using a finite automaton 9 (via a latch circuit 10). Holding means (state holding circuit 3) for holding search results for a plurality of search conditions given to one output field for each bit string, search results held by the state holding circuit 3, and output from the finite automaton 9. A logical AND operation is performed with a search result of the same bit string for a plurality of search conditions given in the next field, and this operation result is sent to the state holding circuit 3 to update the held contents (effective bit judgment means). Circuit 2) and a state holding circuit 3 by a valid bit determination circuit 2 corresponding to a preset search condition between fields. Control means (inter-field control RAM 4) for controlling the update operation of the held contents; and all the held contents of the state holding circuit 3 for the last search result output from the finite state automaton 9 corresponding to the last field of the search target record. A logical sum operation means (OR circuit 6) for performing a logical sum operation, wherein the operation result of the OR circuit 6 is obtained by retrieving a plurality of search conditions given to each field and a search condition preset between fields. The search result is output as a search result for a search target record based on. [Operation] In the present invention, in a search method in which a search result for a character code (1 byte) input serially is output by a plurality of bits, which bit indicates a search result under a condition set in the field. Is stored in the inter-field control RAM in advance at the initial setting stage. This information is sequentially latched every time one field search is completed, and sent to the next-stage effective bit determination circuit. When the result of the mismatch determination is indicated in the valid bit selected by the valid bit determination circuit, the state holding circuit provided next to the valid bit determination circuit indicates that a mismatch code has occurred in that bit in one record. The bit information is held until the search is completed, and each bit information is sent to the OR circuit at the final stage. If at least one OR logic condition is set between fields, a plurality of search condition combinations are established. Each bit corresponds to each combination, and a 1-bit determination result is shown. With the holding circuit, the final
Since an OR circuit ORs each condition, a logical operation between fields can be performed. Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of an information retrieval device according to one embodiment of the present invention, and FIG. 2 is a circuit configuration diagram of an information retrieval circuit according to one embodiment of the present invention. As shown in FIG. 1, the information retrieval apparatus of this embodiment includes a selector (SEL) 8, an initial address storage unit 11, a finite automaton 9 composed of a DRAM, and a latch circuit 10 composed of a flip-flop (FF). , And an information detection circuit 1.
Further, the information detection circuit 1 is a valid bit determination circuit (SEL)
2. State holding circuit (FF) 3, inter-field control RAM (RA
M) 4, RAM counter (CNT) 5, and OR circuit (OR) 6
Is provided. As shown in FIG. 2, the valid bit determination circuit 2 includes a plurality of AND gates 22, and the state holding circuit 3 includes a plurality of flip-flops (FF) 23. In this embodiment, a search method using the finite state automaton 9 is employed, and a plurality of RAMs previously store search results at an initial setting stage, and each time a character code 7 is inserted as an address one byte at a time, The search result stored at that address is output. That is, this is a search method using state transition, and a finite area of the plurality of RAMs is set as a finite automaton 9. In the information search device of the present embodiment, the initial address storage 11
Is selected by the selector 8,
The address is input to the finite state automaton 9 together with the initial character code 7 as an address. The finite state automaton 9 outputs a preset status code, that is, a next jump destination and a search result, and the data is stored in the latch circuit 10. The jump destination is sent to the selector 8 as the next address, and the search result is sent to the valid bit determination circuit 2 of the information search circuit 1. As an initial setting of the information retrieval circuit 1, a reset signal (RST) is inputted every time a record is changed, all 1s are set to the flip-flops 23 constituting the state holding circuit 3, and the next stage OR circuit 6 is set. Sent to In the valid bit determination circuit 2, each bit indicating the search result sent via the latch circuit 10 outputs a result corresponding to each of the set inter-field logical conditions. That is, if OR logic is set between two fields, the number of conditions becomes two, and two bits among the bits indicating the search result are valid bits. The selection of the search result is based on information stored in the inter-field control RAM 4 in advance, that is, information on which bits are valid. The RAM counter 5 indicates the area of the effective bit information for each field stored in the inter-field control RAM 4. In the process in which the valid bit determination circuit 2 selects the search result 21, when the search is started, the search result 21 is transmitted from the finite state automaton 9 to the valid bit determination circuit 2 as state data according to the input of the one-character code. Each AND that composes
Sorted to gate 22. Further, information indicating which flip-flop 23 of the state holding circuit 3 is used is sent from the inter-field control RAM 4 to the valid bit determination circuit 2 in the form of "1", and all unused bits are set to "0". The data selected in this manner is stored in the state holding circuit 3 in the next stage.
Are latched as search results and sent to the OR circuit 6 in the next stage. The output of the OR circuit 6 is the determined result 24. Further, even when the search mismatch information 0 is input to the valid bit, the state holding circuit 3 keeps holding the 0 state until the search of one record is completed and the next reset signal comes. The inter-field control RAM 4 can share the initial address storage unit 11 at the start of the search. However, unless the initial address is required, the RAM counter 5 points the pointer to the address where the valid bit information is stored. Further, only when the last OR circuit 6 (OR logic between fields) has a mismatch in all logical operations, a search mismatch determination 0 is output. In this way, when a finite automaton is used, if only the AND condition is set between the fields, it is processed by one flip-flop, and the OR search between the fields is performed by the number of fields equal to the number of fields connected by OR. Since the operation is realized by the flip-flop, a logical operation between fields can be performed. According to the present invention, the inter-field logical operation search function can be added without intervening software to the hardware search function, so that a multi-function, high-speed information search circuit can be implemented on a small scale. It can be realized with simple hardware.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a configuration diagram of an information retrieval device according to an embodiment of the present invention, and FIG. 2 is a circuit configuration diagram of an information retrieval circuit according to an embodiment of the present invention. 1: information retrieval circuit, 2: valid bit determination circuit (SEL), 3: state holding circuit (FF), 4: inter-field control RAM (RAM), 5: RAM
Counter (CNT), 6: OR circuit (OR), 7: Character code, 8: Selector (SEL), 9: Finite automaton, 10: Latch circuit (F
F), 11: initial address storage, 21: search result, 22: AND gate, 23: flip-flop (FF), 24: determination result, RST: reset signal, CLK: clock signal.

Claims (1)

(57) [Claims] An information search circuit using a finite automaton that outputs, in the form of a bit string, each search result for a plurality of search conditions given to each of the fields in the search target record. Holding means for holding search results for a plurality of search conditions for each bit string; search results held by the holding means; and search for the same bit string for a plurality of search conditions given to the next field output from the finite state automaton A logical AND operation for performing a logical AND operation with the result, sending the operation result to the holding unit and updating the held contents of the holding unit, and the logical AND operation corresponding to a preset search condition between fields. Control means for controlling an update operation of the content held by the holding means by the arithmetic means; OR operation means for performing an OR operation of all the held contents of the holding means with respect to the search result output from the finite state automaton corresponding to the end field, wherein the operation result of the OR operation means is An information search circuit for outputting as a search result for the record to be searched based on a plurality of search conditions given to each of the fields and a search condition preset between the fields.