JP2696661B2 - Stereo signal demodulation circuit and stereo signal demodulation device using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stereo signal demodulation circuit and a stereo signal demodulation device, and more particularly, to eliminating external components of a stereo signal demodulation circuit in an FM or AM tuner of audio equipment or video equipment. The present invention relates to a stereo signal demodulation circuit and a stereo signal demodulation device such as a tuner suitable for IC integration.

[0002]

2. Description of the Related Art An integrated stereo signal demodulation circuit is
Initially, a tuning circuit or an oscillation circuit using a capacitor and a coil or a capacitor and a resistor is used.
A signal such as 38 kHz necessary for demodulation was generated by tuning to a carrier wave of kHz or a pilot signal of 19 kHz.
However, this is because, in addition to the capacitors and coils becoming external components, it is necessary to perform adjustment work to adjust the frequency and oscillation frequency of the tuning circuit to the above-mentioned frequency.
An oscillation circuit using a vibrator such as ceramics or quartz crystal is used. As a result, an FM demodulation circuit can be realized only by externally attaching a vibrator suitable for the above-mentioned frequency to the IC, and the adjustment work thereof is not required.

FIG. 5 shows an example of a conventional stereo signal demodulation circuit using such a ceramic vibrator. This type of circuit is disclosed in Japanese Patent Publication No. 1-17603,
It is already known in No. 9. Here, 1 is a phase comparison circuit (PC), 2 is a low-pass filter (LPF), and 3 is
It is a voltage controlled oscillation circuit (VCO), and comprises two amplifiers 3b and 3c connected via a ceramic vibrator 3a externally attached to the IC. 4, 5, 6, and 7 are frequency divider circuits,
Reference numeral 8 denotes a stereo reception state detection circuit, which comprises a phase comparison circuit (PC) 8a and a comparator 8b. 8c
Is a stereo indicator, and 9 is a stereo multiplex decoder.

One of the amplifiers 3b and 3c in the VCO 3 is, for example, a reactance circuit obtained by coupling a capacitor to a differential amplifier, and the other is an oscillation circuit formed by a differential amplifier. As a result, the oscillation signal F is generated using a small-capacity capacitor suitable for integration into an IC. This oscillation circuit
The ceramic vibrator 3a is inserted into the oscillation loop, and the frequency of the oscillation signal F is maintained in a predetermined frequency range determined by the ceramic vibrator 3a, and the oscillation is stabilized. As a result, for example, the VCO 3 oscillates in a relatively narrow band around 456 kHz, and outputs an oscillation signal F.

[0005] The VCO 3 and the phase comparison circuit 1 and the LPF 2 constitute a so-called PLL circuit. Oscillation signal F
Is passed through a 1/6 frequency dividing circuit 4 and a 1/4 frequency dividing circuit 5,
The frequency is divided and reduced to 19 kHz corresponding to the frequency of the pilot signal in the FM detection signal, and becomes an oscillation signal D. The phase comparison circuit 1 compares the phase of the oscillation signal D with the phase of the FM detection signal A. Note that the FM detection signal A passes through a front-end circuit and an intermediate frequency amplifier circuit, and is output to the FM detection circuit by the FM detection circuit.
It is an M-detected stereo composite signal.

The output (voltage signal) of the phase comparison circuit 1 obtained by comparing the phases of the signal D and the signal A is LP
It is added to F2, and the low-frequency component is extracted. It is applied to the VCO 3 as an error voltage signal E indicating the phase error between the signal D and the signal A, whereby the oscillation frequency of the VCO 3 is controlled. At this time, the oscillating frequency of the VCO 3 is set to the LPF in such a direction that the error is eliminated by the control voltage signal E.
2, the phase of the oscillation signal D is changed to the phase of the FM detection signal A (of which the center frequency is 19).
(kHz signal). So-called PLL control is performed. As a result, an oscillation signal F (center frequency: 456 kHz) having a phase following the phase of the FM detection signal A (of which a signal having a center frequency of 19 kHz) is generated.

The frequency dividing circuit 4 divides the frequency of the oscillation signal F by 6 to generate an oscillation signal G. This signal G is added to the 1/2 frequency dividing circuit 6 in addition to the 1/4 frequency dividing circuit 5. Here, the signal is frequency-divided by 2 to become a signal having a center frequency of 38 kHz. This signal is applied to a stereo multiplex decoder 9 for demodulating a stereo signal as a multiplex signal B, and further applied to a 1/2 frequency divider 7. 1 /
The divide-by-2 circuit 7 further divides the signal B by 2 to obtain a signal C for detecting a stereo state having a center frequency of 19 kHz. Therefore, the signals B and C are synchronized with each other, and follow the FM detection signal A by PLL control so that their phases are aligned. Normally, the 1/2 frequency dividing circuit 6
Performs frequency division with a phase that is 90 ° different from that of the ４ frequency divider circuit 5, so that the signal C has a phase difference of 90 ° with respect to the oscillation signal D.

[0008] The stereo multiplex decoder 9 comprises:
This is a circuit mainly composed of a multiplying circuit, and generates an audio signal (L, R) of a stereo signal by multiplying an FM detection signal A by a multiplex signal B. Then, the phase of the multiplex signal B follows the phase of the FM detection signal A by the PLL control, and the phases match (lock).
In this state, a good stereo signal can be demodulated.

The stereo detection circuit 8 blinks the stereo indicator 8 according to whether or not the phase of the FM detection signal A and the signal C is maintained at 90 °. That is,
When the phase between the FM detection signal A and the signal C is exactly 90 °, a predetermined voltage is generated, and the level exceeds the reference level of the comparator 8b. The stereo indicator 8 is turned on. When the receiving state of the FM transmission signal transmitted from the broadcasting station is good, the stereo indicator 8 is turned on. When the receiving state is bad, the stereo indicator 8 is turned off because the relationship between the phase differences between the signals A and C is not maintained.

[0010]

In such a conventional stereo signal demodulation circuit, a vibrator such as ceramics or crystal is used for the VCO 3. The natural frequency of this vibrator is predetermined. For example, when the above-described ceramic vibrator is employed, the oscillation frequency of the oscillation circuit is 456 kHz, which is 24 times the detection output signal having the center frequency of 19 kHz. Here, the reason why the frequency is divided by using a high frequency is that the vibrator to be used can be small and inexpensive.

However, it is necessary to perform frequency division many times before obtaining a signal of a required frequency. If the stereo signal demodulation circuit is formed as an IC, the chip area occupied by the frequency dividing circuit increases. Increasing the chip area decreases the chip yield per wafer and yield, and increases the IC production cost. In addition, since the vibrator must be externally mounted, the performance of the device is deteriorated due to aging.
Further, the vibrator is an external component that is more expensive than other electronic components such as a resistor, a capacitor, and a coil. On the other hand, if a resistor, a capacitor, a coil, or the like is used as an external component, manual adjustment work is required, and the manufacturing efficiency is rather reduced, and there is temperature dependency and aging. In addition, the quality of the products varies and the manufacturing costs increase.

An object of the present invention is to eliminate the need for external components such as a vibrator, to eliminate the need for manual adjustment, to reduce the circuit scale,
It is an object of the present invention to provide a stereo signal demodulation circuit suitable for an IC which is less likely to change over time. Another object of the present invention is to provide a stereo signal demodulation device such as a tuner suitable for IC integration having a stereo signal demodulation circuit that does not require external components such as a vibrator and does not require manual adjustment. .

[0013]

A feature of the stereo signal demodulating circuit and the stereo signal demodulating apparatus of the present invention that achieves the above object is that the first oscillating signal and the first oscillating signal are at 90 ° to each other. Demodulating a stereo signal using a PLL circuit having a VCO that generates a second oscillation signal having a phase difference of The output first and second amplifiers and the output phase is 180 ° with respect to the input.
A third amplifier that outputs a different signal is connected, an output signal shifted by 360 ° from the input signal is generated by these circuits, and the output signal is fed back to the input side to oscillate. The operating current of the first and second amplifiers is controlled by the PL to control the oscillation frequency of the VCO.
The first oscillation signal is taken out from one of the outputs of the first and second amplifiers, and is controlled in accordance with a control voltage signal generated in the L circuit, and is output from the first and second amplifiers. The second oscillation signal is extracted from one of an input and an output. In addition,
As a concrete example of the first and second amplifiers, an active integrating circuit is constituted by a so-called variable gm amplifier (gm is a mutual conductance) and a capacitor, and the first and second amplifiers are connected in cascade. The oscillation frequency is changed by controlling the amount of current for charging and discharging the capacitor.

[0014]

In the stereo signal demodulation circuit and the stereo signal demodulation device having such a configuration, a VCO is formed by connecting three amplifiers whose output phases differ from the input by 90 °, 90 °, and 180 °. Generated in the PLL circuit,
Since the operating current of the amplifier is controlled by the control voltage signal for controlling the VCO to control the oscillation frequency of the VCO, the tuning circuit is manually adjusted or an oscillation element is externally mounted. No need. Moreover, since the operating current of the amplifier is controlled, the oscillation state is stabilized even if the current level of the oscillation signal is small. As a result, it is possible to easily obtain an oscillation signal having a low frequency equivalent to the frequency of the pilot signal of the FM detection signal.

Moreover, since two oscillation signals having 90 ° phase differences can be obtained simultaneously from one VCO, there is no need to provide a circuit for generating signals having 90 ° phase differences, and the circuit scale can be reduced. In addition, since no oscillation element is used, external parts such as a vibrator are not required and manual adjustment is not required.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A stereo signal demodulation circuit 10 shown in FIG. 1 has a VCO 30 composed of a variable gm amplifier and an oscillation center frequency of this VCO 30 in place of the VCO of the conventional stereo signal demodulation circuit shown in FIG. A current value adjusting circuit 30i for setting an operating current to be determined. This VCO
Numeral 30 is a frequency of 19 kHz corresponding to the pilot signal, and generates only two signals having a phase difference of 90 °. No division is performed. This eliminates the need for several frequency dividers. Further, a multiplying circuit 31 for multiplying the two signals is provided to generate a 38 kHz signal for decoding a stereo audio signal. The other components are the same as those of the circuit shown in FIG. 5, and therefore, are denoted by the same reference numerals and description thereof is omitted. FIG. 3 shows an example of a specific circuit of the VCO 30.

The VCO 30 has a voltage-current conversion circuit (V / current
I) 30a, charge / discharge circuit 30b, charge / discharge circuit 30c,
And an inverting amplifier 30d. Charge / discharge circuit 30
Reference numerals b and 30c denote active integration circuits each comprising a variable gm amplifier and a capacitor, and charge and discharge a capacitor (see capacitors 30f and 30h in FIG. 3). The current value adjusting circuit 30i sets the gm value of the variable gm amplifier.
A charge / discharge current value for setting the oscillation frequency to a predetermined center frequency is determined.

In FIG. 3, the charge / discharge circuit 30b comprises a variable gm amplifier 30e, a capacitor 30f, and a buffer amplifier 302 for connection to the next stage and for signal output.
It is composed of The charge / discharge circuit 30c includes a variable gm amplifier 30g, a capacitor 30h, and a buffer amplifier similar to the above. Since the charge / discharge circuits 30b and 30c have the same configuration, the description of the configuration of the charge / discharge circuit 30c will be given by taking the charge / discharge circuit 30b as an example, and the description of 30c will be omitted. As shown in FIG.
A variable gm amplifier suitable for IC integration is usually constituted by two-stage connected differential amplifiers 300 and 301. Here, the output side of the amplifier 301 in the subsequent stage and the power supply line Vcc
(Also a ground line is acceptable.) A charging / discharging capacitor is inserted between the charging and discharging capacitors. Thereby, the variable gm amplifier 30b
Is an active integrating circuit that charges and discharges a capacitor through an active resistor determined by its gm value.

The first-stage differential amplifier 300 has a voltage-
It is a current conversion circuit, and the next-stage differential amplifier 301
Amplifies the output of the first stage. The gain gm of the variable gm amplifier is determined by the ratio of the current flowing through the current source Ib of the next-stage differential amplifier to the current Ia flowing through the current source of the first-stage differential amplifier, and the resistance of the emitter resistance Re of the first-stage amplifier. Determined by value.

Therefore, the gm of the amplifier is changed by setting the current values of the two current sources, thereby changing the output impedance. As a result, the time constant of charging and discharging changes. The variable gm amplifiers 30e and 30g are cascaded through the amplifier 302 to shift the phases of input and output by 90 ° and 180 ° in total. Further, by shifting the input and output by 180 ° by the inverting amplifier 30d, the phase of the output signal is shifted by 360 ° with respect to the input signal to form a positive feedback loop, and a so-called CR oscillation circuit having a variable resistance value is formed.

In FIG. 3, 30a is a specific example of the voltage-current conversion circuit, and 30i is a specific example of the current value adjusting circuit. 30j is a resistance circuit for selecting a resistance value that determines a control current value generated by the voltage-current conversion circuit 30a,
It is composed of a plurality of resistors, and VC is determined by the determined control current value.
The gm value of the variable gm amplifier for setting the oscillation frequency of O30 to the center frequency is determined. 30k is a specific example of a temperature compensation circuit.

The voltage-current conversion circuit 30a converts a voltage value corresponding to the phase difference between the signal A and the signal D into a current value and converts the current value Ia and the variable gm of the current source of the first stage amplifier 300 of the variable gm amplifier 30e. The current value of a similar current source of the amplifier 30g is determined. Thereby, the oscillation frequency is controlled to match the phase of the signal A. Note that the current value Ia is also an adjustment target of the current value adjustment circuit 30i. Therefore, the output of the voltage-current conversion circuit 30a is output from the current value adjustment circuit 30i.
Is output via the transistor on the output side of the current mirror 303 of the circuit of FIG.

The current value adjusting circuit 30i includes a resistor circuit 30j
The current value determined by the selected resistance value of the first stage amplifier 3 is set as the control current I via the current mirror 303.
In addition to the current source 00, the current value Ia of this current source is set to a predetermined value. This circuit 30i is connected to the next stage amplifier 30.
Temperature control circuit 30k for the control current of the first current source.
Is added as a control current J via the current mirror 304. This allows the next stage amplifier 3
01 is controlled so that the current value Ib of the current source becomes constant. It should be noted that the current value adjusting circuit 30i includes the variable gm amplifier 3
Similarly, control currents I and J are sent to 0 g.

Next, the operation will be described.
0d, the charge / discharge circuit 30b, and the charge / discharge circuit 30c are connected in a loop in this order to form an oscillation loop. The charging / discharging circuit 30b receives an inverted voltage signal whose input signal is inverted by the inverting amplifier 30d as an input voltage signal of the variable gm amplifier 30e, and the amplifier 30e converts the input voltage into a charging / discharging current. The capacitor 30f is charged / discharged by the charge / discharge current to generate a charge / discharge voltage signal (C). Due to this charge / discharge, the phase of the charge / discharge voltage signal (C) is delayed by 90 ° from the inverted voltage signal.

The charge / discharge circuit 30c has exactly the same configuration and receives the charge / discharge voltage signal (C) and generates a charge / discharge voltage signal (D) further delayed by 90 ° in phase. This charge / discharge voltage signal (D) is inverted by the inverting amplifier 30d,
The phase is further delayed by 180 ° to become the above-mentioned inverted voltage signal. The phase of the inverted voltage signal thus circled is 360
°, which means that the inverted voltage signal one cycle before has been repeated. Therefore, this oscillation loop oscillates continuously. At this time, the charge / discharge voltage is not directly output as it is so that the oscillation signals C and D are generated once through the transistor 302 so that the oscillation signal is not affected by the output side.

The oscillation frequency of the VCO 30 at this time is determined by the charge / discharge current for the capacitor.
The charge / discharge current changes by controlling the current values of the current sources of the first stage amplifiers of the variable gm amplifiers 30e and 30g by the current value applied via the voltage-current conversion circuit 30. Therefore, the oscillation center frequency of the VCO 30 is
The first stage amplifier 3 is controlled by the current value I of the current value adjusting circuit 30i.
This is done by setting the current value Ia of the current source 00 to a predetermined reference value.

The charging / discharging current is generated as a differential signal of a differential transistor, and is controlled by a current value of a downstream current source. Thus, even if the charging / discharging current is very small, the control of the current value is stable. Therefore, even if the capacitances of the capacitors 30f and 30h are small, the charge / discharge time constant can be maintained at a large value. If the capacitance of the capacitor is small, no significant increase in chip area is caused. Capacitors can be built into the IC. In addition, since the oscillation signal has a signal waveform of a harmonic function such as sin and cos that does not include harmonics, noise is less generated.

However, in the amplifiers 30e and 30g and the capacitors 30f and 30h, it is not possible to disregard individual variations in amplification factors and capacitances that occur due to manufacturing conditions and the like. Therefore, if all circuits are simply made into ICs as they are, even if the same voltage is applied as the control voltage E, the oscillation frequency of each IC greatly varies. However, in this circuit, the center frequency can be set by determining the current value of the current source of the differential amplifier as described above.

Since the oscillation frequency is determined by the current ratio of the current source of the variable gm amplifier, the current value Ib of the current source of the next-stage amplifier 301 is set to a certain constant value in advance by the current value adjusting circuit 30i. Thus, the range of variation of the oscillation center frequency fo is suppressed in advance. By doing so, the control range of the current value Ia of the current source of the first-stage amplifier 300 adjusted by the current value adjusting circuit 30i also becomes smaller. In other words, the range of the resistance value of the resistance circuit 30j that determines the operating current value Ia can be reduced.

In this way, it is possible to cope with the problem by trimming the resistor formed into an IC. The range of resistors to be selected by trimming can be narrowed. The resistance circuit 30j is, for example, a circuit in which four resistors are connected in parallel, and the resistance values of the respective resistors are resistance values in a ratio of 1, 2, 4, and 8. Some of the wirings for connecting these resistors are cut by a laser trimming device or the like, and a total of 16 types of resistance values can be selected from 15 types of remaining resistance combinations. The operating current of the variable gm amplifiers 30e and 30g, that is, the charging / discharging current for the capacitor, can be determined by the resistance value of the resistor circuit 30j. Note that FIG.
Since there is a control current H obtained by converting the control voltage E in the circuit of (1), the control current I is subtracted by the adjustment current to obtain a final control current I. The operating current of the amplifiers 30e and 30g determined according to the control current I corresponds to the oscillation center frequency.

By the way, the selection of the resistor by the laser trimming device or the like can now be automatically performed. In the stereo signal demodulation circuit shown in FIG. 1, the frequency of the output signal is detected and the value of the resistor circuit 30j is detected from the detected value. You can choose the resistance. This is not an adjustment but an automatic selection of the resistance by a laser trimming device or the like. For example, in an IC probe test stage, a reference voltage is applied as the control voltage E, and the oscillation frequency of the signal C or the like is measured. Then, in accordance with the degree to which the oscillation frequency has shifted from the reference oscillation frequency, the resistance value of the resistor circuit 30j that best offsets the shift may be selected by laser trimming.

The VCO 30 adjusted in advance in the manufacturing stage of the IC as described above has a very small variation and variation in characteristics such as the oscillation frequency, and performs a stable oscillation operation. When the predetermined control voltage E is input, the oscillation signals C and D having the predetermined oscillation frequency corresponding to the input are output without any adjustment. When the VCO 30 is built in an IC, an external adjustment circuit or the like is not required, and adjustment after being incorporated in the device is also unnecessary.

The configuration of the resistor circuit in the VCO 30 is an example, and the number of resistors may be increased according to the required accuracy, or a plurality of resistors having the same resistance value may be provided. In addition, the connection of the resistors may be a configuration using a series connection. Further, in FIG. 3, a temperature compensation circuit 30k is provided as a part of the current value adjustment circuit 30i. As a result, not only the control current Ib but also the signal I to the constant current source which is not controlled is temperature-compensated, and the temperature characteristics are further improved.

Since the VCO 30 oscillates at a low frequency as described above, it can oscillate at the same center frequency of 19 kHz as the pilot signal included in the FM detection signal A as shown in FIG. The two oscillating signals C and D are generated. The oscillation signals C and D are sent to the multiplication circuit 31 and multiplied. These are sin waveform signals whose phases differ by 90 ° (this is
s waveform), the result of the multiplication is a double frequency sin
It becomes a waveform signal. This signal becomes a multiplex signal B (center frequency 38 kHz) as it is. Other operations are the same as those in FIG. Thus, in the VCO 30 of this embodiment, 90 °
Since signals with a frequency of 19 kHz having different phases can be taken out at the same time, a signal of 38 kHz can be obtained with one multiplication circuit, and the circuit scale can be greatly reduced.

FIG. 2 shows another embodiment. This VCO3
0 oscillates with a center frequency of 38 kHz which is twice the frequency of the FM detection signal A. Then, two oscillation signals B and C ′ having a sin waveform are generated. This oscillation signal B is used as it is as a multiplex signal B (center frequency 38 kHz). Then, the FM detection signal A is used as an input signal, and the oscillation signal B is frequency-divided by a 分 frequency divider 6 into a center frequency of 19 k.
A PLL control is performed by generating an oscillation signal D of 1 Hz and using this as a feedback signal. Further, an oscillation signal C ′ having a phase different from that of the oscillation signal B by 90 ° is frequency-divided by the 1/2 frequency dividing circuit 7 into a signal C for stereo detection.
As a result, when generating the signals B and C, a large number of frequency divider circuits conventionally required are reduced to only two 1/2 frequency divider circuits. As a result, the circuit scale is significantly reduced.

FIG. 4 shows an AM / FM demodulator as a stereo signal demodulator using the stereo signal demodulation circuit having these configurations.
FIG. 2 shows a schematic block diagram of a receiver. The stereo signal demodulation circuit 10 is the demodulation circuit shown in FIG. 1 or FIG. Since the scale is reduced by this circuit, a considerable part of the stereo signal demodulator together with the AM receiving circuit (AM), the intermediate frequency amplification (IF) of FM, the detection circuit (detection), and the like can be integrated into one chip ( Dashed line is one chip I
C). Thereby, the tuner or the receiver can be downsized.

The stereo signals L and R demodulated from the FM detection signal A in this manner are sent to a recording circuit at the subsequent stage or subjected to processing such as amplification, as shown in FIG.
The sound is output from the speaker.

[0038]

As can be understood from the above description, in the stereo signal demodulation circuit having the configuration of the present invention, the oscillation frequency of the oscillation circuit that oscillates at the same center frequency as the detection output signal can be varied by gm. It is controlled via the operating current of the amplifier. Then, 2 having different phases from the oscillation circuit.
An oscillation signal of double or half frequency is generated from one oscillation signal. Since these oscillation signals follow the detection output signal in synchronization with each other, they can be used as a stereo detection signal and a multiplex signal. as a result,
Since a large number of frequency dividing circuits can be reduced, the circuit scale is reduced, which is suitable for IC. Further, since external components such as an oscillator are not required, mounting efficiency is improved, and aging due to external components can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of a stereo signal demodulation circuit to which the present invention is applied.

FIG. 2 is a block diagram of another embodiment of a stereo signal demodulation circuit to which the present invention is applied.

FIG. 3 is an explanatory diagram illustrating an example of a specific circuit of the VCO in FIG. 1;

FIG. 4 is a block diagram of an AM / FM receiver using the stereo signal demodulation circuit of FIG. 1 as a stereo signal demodulation device.

FIG. 5 is a block diagram of a conventional stereo signal demodulation circuit.

[Explanation of symbols]

1. Phase comparison circuit (PC), 2. Filter (FIL),
Reference numeral 3 denotes a voltage controlled oscillation circuit (VCO), 3a denotes a ceramic oscillator, 4, 5, 6, 7 ... a frequency divider circuit, 8 ... a detection circuit of a stereo reception state, 8a ... a phase comparison circuit (PC), 8b ...
Comparator, 8c: Stereo indicator, 9: Stereo multiplex decoder, 30: Voltage controlled oscillator circuit, 30a: Voltage-current conversion circuit (V / I), 30b:
Charge / discharge circuit, 30c: charge / discharge circuit, 30d: inverting amplifier, 30e: variable gm amplifier, 30f: capacitor, 3
0g: Variable gm amplifier, 30h: Capacitor, 30i ...
Current value adjustment circuit, 30j: resistor circuit, 30k: temperature compensation circuit, 31: multiplication circuit, 40: stereo signal demodulation circuit.

Claims (3)

(57) [Claims] 1. A stereo signal demodulation circuit for receiving an FM detection signal including a pilot signal and decoding a stereo audio signal, wherein the first oscillation signal and the first oscillation signal have a phase difference of 90 °. A voltage-controlled oscillation circuit for generating a second oscillation signal, receiving the FM detection signal, comparing the phase of the FM detection signal with the first oscillation signal, and generating a control voltage according to the comparison result; controls controlled oscillator circuit, a PLL circuit for generating said first oscillation signal having a center frequency of any frequency of an integral multiple of the frequency and the pilot signal of the pilot signal, the relative said FM detection signal The first oscillation signal is
When corresponding to the frequency of the pilot signal, the first
The signal of twice the frequency obtained based on the oscillation signal and the signal
The first oscillation signal is multiplied by the second oscillation signal.
Signal having a frequency twice the frequency of the pilot signal obtained
Multiply the signal of double frequency selected one of
And the first oscillation signal is the pilot signal
When the frequency corresponds to twice the frequency of
A stereo multiplex decoder that generates the stereo signal by multiplying the first oscillating signal by a frequency of the pilot signal.
Responding, the second oscillation signal and the FM detection signal
And the phase of the first oscillation signal is
When dealing with an integer multiple of the frequency of the lot signal
Represents the pilot signal obtained from the second oscillation signal.
The phase ratio between the signal corresponding to the frequency and the FM detection signal
And a stereo detection circuit for generating a detection signal for the presence or absence of the stereo signal.
First and second amplifiers that output signals different from each other by 0 °;
A third amplifier that outputs a signal whose output phase differs by 180 ° from the input is connected, and an output signal shifted by 360 ° from the input signal is generated by these circuits, and this is fed back to the input side. Oscillation.
The operating currents of the first and second amplifiers are controlled according to the control voltage signal, and the first oscillation signal is extracted from one of the outputs of the first and second amplifiers. 1 and any other of the second amplifiers
A stereo signal demodulation circuit for extracting the second oscillation signal from one output . 2. The method according to claim 1, wherein the first amplifier has a first capacitor and changes the phase of the input signal by 90 degrees by charging and discharging the capacitor.
By receiving the output of the first amplifier and charging / discharging the second capacitor, an output having a phase difference of 180 ° with respect to the input signal is generated. Receiving the output of the second amplifier, generating an output having a phase different from that of the input signal by 360 °, and inputting the output as the input signal to the first amplifier. Demodulation circuit. 3. An FM signal processing circuit for receiving an FM modulation signal including a pilot signal and performing FM detection to obtain an FM detection signal including the pilot signal; a first oscillation signal and a first oscillation signal; A voltage-controlled oscillation circuit for generating a second oscillation signal having a phase difference of 90 °, receiving the FM detection signal, comparing the phase of the FM detection signal with the first oscillation signal, and responding to the comparison result. A PLL circuit that generates a control voltage to control the voltage-controlled oscillation circuit, and generates the first oscillation signal having a center frequency of one of a frequency of the pilot signal and a frequency that is an integral multiple of the pilot signal; The first oscillation signal is transmitted to the FM detection signal by the first oscillation signal.
When corresponding to the frequency of the pilot signal, the first
The signal of twice the frequency obtained based on the oscillation signal and the signal
The first oscillation signal is multiplied by the second oscillation signal.
Signal having a frequency twice the frequency of the pilot signal obtained
Multiply the signal of double frequency selected one of
And the first oscillation signal is the pilot signal
When the frequency corresponds to an integer multiple of the frequency of
2 of the frequency of the pilot signal obtained from the oscillation signal
A stereo multiplex decoder that generates the stereo signal by multiplying the frequency of the pilot signal by a frequency that is twice the frequency of the pilot signal;
Responding, the second oscillation signal and the FM detection signal
It compares the phases of the items, the first oscillation signal the pie
When dealing with an integer multiple of the frequency of the lot signal
Represents the pilot signal obtained from the second oscillation signal.
The phase ratio between the signal corresponding to the frequency and the FM detection signal
And compare, and a stereo detecting circuit for generating a detecting signal of the presence or absence of the stereo signal, the voltage controlled oscillator, the output of the phase with respect to input 9
First and second amplifiers that output signals different by 0 °,
A third amplifier that outputs a signal whose output phase differs by 180 ° from the input is connected, and an output signal shifted by 360 ° from the input signal is generated by these circuits, and this is fed back to the input side. Oscillation.
The operating currents of the first and second amplifiers are controlled in accordance with the control voltage signal, and the first oscillation signal is extracted from the output of one of the first and second amplifiers. 1 and any other of the second amplifiers
A stereo signal demodulation device for extracting the second oscillation signal from the output of the other .