JP2695916B2 - Cell switch - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to a hardware-based packet switch, and particularly to an ATM that performs information communication using fixed-length short packets called cells. The present invention relates to a cell switch used in a communication system.

(Prior Art) In recent years, ATM (Asy) has been replaced with a transfer mode used in an existing telephone network called Synchronous Transfer Mode (STM), which secures information transmission capability required for communication at the time of call setup.
Interest and expectations for nchronous transfer mode) are increasing.

ATM transmits information using short packets of fixed length called cells, and each communication terminal hands over cells to the communication network as needed, that is, the information transmission capacity of the communication network when the communication terminal is needed This is a transfer mode characterized by using.

Compared to STM, ATM can provide the communication terminal with any information transmission rate required by the communication terminal, and improves communication efficiency by using the information transmission capacity of the communication network only when the communication terminal requires it. There is an advantage that it can be.

For this reason, ATM is a communication network that can handle voice, data, moving images, etc. in a unified manner, that is, B-ISDN (Broadb
and Integrated Service Digital Network).

In order to configure an ATM network, it is necessary to perform an operation of transferring cells delivered from a plurality of input communication paths to a desired output communication path in accordance with the path information of the cells, that is, cell switching. At this time, since the communication terminal uses the information transmission capability of the communication network when necessary, a plurality of cells are simultaneously directed to the same output communication path, that is, blocking occurs. When blocking occurs, one of the blocking cells is transferred to the output channel, and the remaining cells are temporarily stored in a buffer to cope with the blocking. Therefore, a cell switch that performs cell switching is realized by a combination of a buffer that temporarily stores cells when blocking occurs and a switching element that transfers cells to a desired output communication path.

As shown in FIGS. 5 to 7, the cell switch comprises:
As reported by the present inventors in the IEICE Technical Report, Information Network, IN88-119, "Comparison of ATM Switch Architecture" (January 27, 1989), a method of combining buffers and switching elements Accordingly, it can be broadly classified into three systems: an input buffer system, an output buffer system, and a common buffer system. FIG. 5, FIG. 6 and FIG.
The figures are block diagrams for the input buffer system, the output buffer system, and the common buffer system, respectively. In addition, the fifth
In FIG. 7 to FIG. 7, 137 is a buffer provided for one input communication path or output communication path, 139 is a switching element, 141 is a two-input two-output unit switch for constituting the switching element 139, and 143 is In the case shown in FIG. 7, a plurality of MUXs (multiplexers) for concentrating cells delivered from four input communication paths into one communication path, a plurality of MUXs 145, and four MUXs in the case shown in FIG. A buffer 147 provided for the output communication path is a DEMUX (demultiplexer) for distributing a plurality of cells delivered from one communication path to four output communication paths in the case shown in FIG.

Dividing the exchange element into MUX143 and DEMUX147,
By arranging the MUX 143 at the input unit 5 and the DEMUX 147 at the output unit of the buffer, all input communication paths and all output communication paths accommodated by the switch share a single buffer. A cell switch based on this method is called a common buffer cell switch. The common buffer type cell switch has the highest buffer utilization efficiency as reported in the above-mentioned technical research report, and a predetermined level required for the cell loss rate as one of the service qualities provided by the communication network to the user. Requires the least amount of buffer to satisfy For this reason, the hardware scale of the cell switch is the smallest. However, since all the input / output communication paths utilize only one storage area as a buffer, there is a disadvantage that the operation speed required for the buffer is increased particularly when the scale of the switch is increased. This operation speed can be obtained by using the currently available LSI technology and increasing the degree of parallelism of information transfer inside the LSI. However, when implemented in this way, various scales can be obtained using the same hardware. It becomes difficult to configure the cell switch of the above, and it is inevitable to mount the LSI for each scale, that is, the flexibility with respect to the scale is reduced.

The input buffer system and the output buffer system are architectures that space-divide the buffer to suppress the operation speed required for the buffer. FIG. 5 shows an input buffer system in which a buffer 137 for avoiding blocking generated inside the switch is disposed in front of the switching element 139 in correspondence with an input communication path. The output buffer system shown in FIG. 6 is provided with a buffer 137 behind the switching element 139 so as to correspond to the output communication path. In the case of a cell switch configured with the input buffer method or output buffer method, the operation speed required for the buffer inside the switch is smaller than that of the common buffer method, especially when configuring a large-scale cell switch Is advantageous. Further, the switching element is connected to a unit switch 14 having two inputs and two outputs, such as a multistage self-routing network.
If a configuration in which cell switching is parallelized, that is, a configuration in which 1 is combined, that is, realized by a space division type cell switch, it is not necessary to increase the operation speed of the switching element more than necessary, which is more advantageous. Become. However,
In the conventional input buffer type or output buffer type cell switch, the buffer is spatially divided, so that the use efficiency of the buffer is low, the amount of buffer required to satisfy a certain cell discard rate increases, and the amount of hardware increases. There are drawbacks.

Furthermore, as described above, in the common buffer type cell switch, since only one buffer is provided for all the input / output communication channels to be accommodated, it is necessary to prepare hardware of each scale when preparing cell switches of various scales. is there. In the case of a cell switch based on the input buffer system or the output buffer system, the switching element is, for example, a two-input two-output unit switch 14 like a multistage self-routing network.
In the case of configuring with a regular combination of predetermined basic switch elements such as 1, if the basic switch element is manufactured, it is possible to configure cell switches of various scales by combining the basic switch elements. However, the size of a basic switch element, that is, the size of a cell switch that can be configured is determined by the number of inputs and outputs. That is, in the case of the cell switch based on the common buffer system or the cell switch based on the input buffer system or the output buffer system, there is a disadvantage that the scale of the cell switch lacks flexibility.

(Problems to be Solved by the Invention) As described above, when an attempt is made to construct a large-scale cell switch in the conventional technology, the operation speed required for the buffer in the common buffer type cell switch becomes large, and the input buffer system and the The cell switch based on the output buffer method has a disadvantage that the buffer amount is large. In addition, these cell switches have the disadvantage of lacking flexibility in scale.

The present invention has been made in view of the above points, and has as its object the advantages of high buffer utilization efficiency of a common buffer type cell switch and the buffer of an input buffer type or output buffer type cell switch. It is an object of the present invention to provide a cell switch which has the advantage of the operating speed of the present invention and which is also flexible in scale.

[Means for Solving the Problems] In order to achieve the above object, a first invention is directed to a space division type cell switch having a plurality of output ports and the space division type cell switch. A plurality of common buffer type cell switches connected to output ports, each having a plurality of input ports, and each of the output ports of the space division type cell switch includes the plurality of common buffer type cell switches. Each input port is configured to be connected.

According to a second aspect of the present invention, m (plural) common buffer cell switches having l (plural) output ports or less and m input ports connected to the output ports of the common buffer cell switch are provided. And at least l space division type cell switches, each of which has m input ports connected to a different output port of the common buffer type cell switch. It is characterized by comprising.

A third invention provides m (plural) first common buffer type cell switches having l (plural) or less output ports,
1 or less space division type cell switches each having m input / output ports connected to the output port of the first common buffer type cell switch, and connected to the output port of the space division type cell switch. , M second common buffer type cell switches each having l input ports, and each of the m input ports of the space division type cell switch is different from the first common buffer type. And each of the m output ports of the space division type cell switch is connected to an input port of the different second common buffer type cell switch. It is characterized by having.

(Operation) According to the first aspect, a plurality of common buffer type cell switches can accumulate cells from each output port of one space division type switch. Therefore, even when the operation speed of the space division type cell switch is higher than the operation speed of the input communication path, the use efficiency of the buffer in the common buffer type cell switch can be improved.

Further, according to the second aspect, since a plurality of common buffer type cell switches are connected to the input port of one space division type switch, even if the operation speed of the input communication path is high, the common buffer The use efficiency of the buffer in the type cell switch can be improved.

Further, according to the third invention, the first and second pluralities of common buffer type cell switches are respectively connected to the respective input / output ports of one space division type switch. Even if the speed is high, it is possible to similarly improve the buffer use efficiency in each common buffer type cell switch.

Further, according to the first, second, and third aspects of the present invention, the operation speed of the buffer can be reduced as compared with the case where one common buffer type cell switch constitutes a switch of the same scale.

According to the first, second and third aspects of the present invention, the number of space division type cell switches constituting a cell switch is made variable, so that an input buffer system and an output system in which switching elements are constituted by a multistage self-routing network. The size of the cell switch can be set more flexibly than the buffer type switch.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a cell switch 1 according to an embodiment of the first invention.
FIG. In the figure, 3 to 9 are space division type cell switches, 11 to 25 are common buffer type cell switches, 27 is a buffer provided corresponding to an input communication path, and 29 is a switching element of the space division type cell switch. A unit switch with two inputs and two outputs, 31 is a MUX, 33 is a plurality, in the case shown in FIG. 1, buffers provided for four output communication paths, and 35 is a DEMUX.

The cell switch 1 uses four 8-input 8-output space division cell switches and 8 4-input 4-output common buffer cell switches, and has a size of 32 inputs and 32 outputs.

Each output of one space division type cell switch is connected to one input of a different common buffer type cell switch.

Next, it is connected to one input of the cell switch according to the first embodiment of the present invention whose configuration is shown in FIG.

Next, the operation of the cell switch 1 according to the first embodiment of the present invention whose configuration is shown in FIG.

The cells delivered from each input channel are temporarily stored in buffers 27 provided for each input channel.

Unit switch 29 of space division type cell switch 3 to 9
If the unit switch or buffer 27 to which its own input port is connected holds a cell, the cell receives the cell, analyzes the route information of the cell independently of each other, and outputs the cell in the output direction. Is determined, the cell is output in that direction. Here, the space division type cell switches 3 to 9 analyze the route information of the cells independently of each other in the unit switch 29 constituting the switching element of the space division type cell switch. It is configured to have a function known as a so-called self-routing function that constitutes a cell switch having a larger scale than the unit switch as a whole by switching cells independently of each other.

MUX31 of each common buffer type cell switch,
If the unit switch connected to its own input holds a cell, it receives the cell and inputs it to the buffer 33.
If the cells are stored in the buffer 33, the DEMUX 35 of each common buffer type cell switch analyzes the route information of the stored cells and outputs the cells to a desired output communication path.

The cell switching operation is performed by the above operation. Here, a plurality of common buffer type cell switches are arranged so as to collect buffers conventionally provided at the output section of the space division type cell switch corresponding to individual output communication paths. By using the buffer inside the common buffer type cell switch as a buffer necessary for outputting cells to the plurality of output communication paths, it is possible to improve the buffer utilization rate. it can. Furthermore, since a plurality of common buffer type cell switches are connected via a plurality of space division type cell switches to form a cell switch having a size larger than that of one common buffer type cell switch, the same size is obtained. That is, the operation speed required for the buffer can be reduced as compared with the case where a cell switch having the same number of input / output channels is manufactured using a common buffer type cell switch. In addition, by setting the number of space division type cell switches constituting the cell switch to one or more and the number of inputs of the common buffer type cell switch used, and to four or less in this embodiment, the number of inputs of the cell switch is reduced. Can be changed to 8, 16, 24, and 32, and the switch scale can be flexibly set or adjusted as needed. Here, since eight common buffer type cell switches having four inputs and four outputs are used, the number of unique outputs 32 of the cell switch does not change.
By selecting the same number of outputs as the number of inputs and making the output of the cell switch, the number of outputs can be substantially the same as the number of inputs.

FIG. 2 shows a cell switch 43 of another embodiment of the first invention having a configuration in which two common buffer type cell switches 39 and 41 are connected to the output of one space division type cell switch 37. It is.

The same elements as those in the embodiment shown in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

Each of the eight output ports of the space division type cell switch 37 is connected to one of a total of eight input ports provided by the two common buffer type cell switches.

With the configuration shown in FIG. 2, the number of common buffer type cell switches used can be reduced as compared with the embodiment shown in FIG. 1, and the number of inputs and the number of outputs can also be reduced. However, in this case, when the scale is increased, it is necessary to change the wiring between the space division type cell switch and the common buffer type cell switch to obtain the configuration shown in FIG.

FIG. 3 shows a cell switch 45 according to an embodiment of the second invention.
FIG. 3 is a block diagram showing the configuration of FIG. In the figure, 47 to 53 are space division type cell switches, 55 to 69 are common buffer type cell switches, 71 is a buffer provided corresponding to an output communication path, and 73 is a switching element of the space division type cell switch. A unit switch with two inputs and two outputs, 75 is a MUX, 77 is a plurality, buffers shown in FIG. 3 are provided corresponding to four input communication paths, and 79 is a DEMUX.

The cell switch 45 uses four 8-input 8-output space division type cell switches and 8 4-input 4-output common buffer type cell switches, and has a size of 32 inputs and 32 outputs.

Each input port of one space division type cell switch is connected to one output port of a different common buffer type cell switch, and cells input from any input channel can be transferred to any output channel. It is possible.

Next, the operation of the cell switch 45 having such a configuration will be described in detail.

The cells delivered from each of the input communication paths are temporarily accumulated via the MUX 75 in buffers 77 provided for a plurality of four input communication paths. The DEMUX 79 analyzes the route information of the cell stored in the buffer 77, selects a space division type cell switch from which the cell is to be output, and holds the cell switch in the output unit of the DEMUX.

Unit switch 73 of space division type cell switch 47 to 53
If the output unit of the unit switch or DEMUX to which its input port is connected holds a cell, receives the cell, independently analyzes the route information of the cell, and outputs the cell. After determining the direction, the cell is output in that direction. Here, the space division type cell switches 47 to 53
Is configured to have a self-routing function similarly to the space division type cell switch in the embodiment of the first invention shown in FIG.

Each output unit of one space division type cell switch is provided with a buffer 71 corresponding to an output communication path.
If the buffer holds a cell, it outputs the cell to the corresponding output channel.

Also in the embodiment of the second invention, the common buffer type cell switch is provided at the input portion of the space division type cell switch so as to collect the buffers provided for the respective input communication paths. As in the embodiment of the present invention, it is possible to obtain an improvement in the utilization rate of the buffer, and it is also possible to reduce the operation speed required for the buffer as compared with the case where a cell switch of the same size is manufactured by a state buffer type cell switch. It is possible to flexibly set the switch scale by adjusting the number of space division type cell switches to be used.

FIG. 4 shows a configuration of the cell switch 81 according to the third invention obtained by combining the first invention and the second invention. In the figure, elements 83 to 89 are space division type cell switches, 91 to 105 are common buffer type cell switches provided corresponding to a plurality of four input communication paths, and elements 107 to 121 are each a plurality of four output communication paths. A common buffer type cell switch provided for each channel, 123 is a two-input, two-output unit switch constituting an exchange element of each space division type cell switch, 125 and 127 are MUXs, 129 and 131 each correspond to a plurality of four input communication paths or Buffers 133 and 135 provided for the output communication path are DEMUXs.

The connection mode between the space division type cell switches 83 to 89 and the input side common buffer type cell switches 91 to 105 is the same as that of the embodiment shown in FIG. The manner of connection with the common buffer type cell switches 107 to 121 on the output side is the same as that of the embodiment shown in FIG.

In the cell switch 81, similar to the first embodiment of the first invention shown in FIG. 1, since a common buffer type cell switch is used, an improvement in buffer utilization can be obtained. Since the buffer type cell switch is used in combination, the operation speed required for the buffer can be reduced as compared with the case where the same size cell switch is manufactured by the common buffer type cell switch. Also, by adjusting the number of space division type cell switches to be used in the same manner as in the embodiment of the first invention, the switch scale can be flexibly set. Further, in the case of the cell switch 81, since a plurality of eight common buffer type cell switches are provided at the input part and the output part of the plurality of space division type cell switches, the cell switch from a certain input communication path to a certain output communication path is provided. There are four internal routes.
That is, the cell switch has a redundant configuration, so that even if a part of hardware inside the cell switch fails, the entire switch can operate without any trouble.

Also, depending on the nature of the terminal that performs communication using the ATM communication network, for example, the delay in the cell network is suppressed to a predetermined value or less as in the case of image data communication, or the computer data A function for ensuring the transmission quality of a cell, such as suppressing the in-network discard rate of a cell to a predetermined value or less like communication, is required. Generally, the communication network itself refers to the internal state of the communication network when setting up a call before the terminal performs communication, and if the call is accepted, the transmission quality of the other terminal currently communicating cannot be guaranteed. Transmission quality is assured by rejecting the call by the communication network. Here, the call is accepted and rejected so that the transmission quality of the cell is such that the values of the parameters to be guaranteed, such as the discard rate and the intra-network delay, fall within a predetermined range. By the way, various terminals such as a voice terminal, a data terminal, and an image terminal are connected to the ATM communication network, and these terminals have different required transmission qualities depending on their types. Therefore, the communication network
For example, there are two or more ranges of parameters to be guaranteed, such as a first range of 10 ^-2 to 10 ^{-4 and} a second range of 10 ^-6 or less as ranges for guaranteeing the discard rate. Thus, efficient communication can be performed. This range of parameters to be guaranteed is called a transmission quality class. In the cell switch 81, there are a plurality of paths inside the cell switch, and when each path is assigned to each class, interference between traffic classes inside the cell switch is eliminated, so that it is determined whether to accept or reject a call. Algorithm can be simplified.
At this time, in the input section of the cell switch 81, that is, in the demultiplexer of the common buffer type switch to which the input communication path is connected, the cell is switched by the identifier of each cell, which indicates the class to which the cell belongs. Also,
The common buffer type cell switch at the input unit of the cell switch performs control to limit the number of cells stored in the common buffer type cell switch for each class so that traffic of one class does not compress traffic of another class. May be. In this control, for example, a counter is provided for each class handled by the cell switch, a counter corresponding to the class to which the cell belongs is incremented each time a cell is input, and the counter to which the cell belongs is incremented each time a cell is output. Decrement the corresponding counter, refer to the value of the counter corresponding to the class to which the cell belongs when the cell is input, and discard the cell if the counter exceeds a predetermined threshold value This can be easily realized.

In the cell switches shown in FIGS. 1 to 4, it is assumed that the cell transfer capability of the space division type cell switch is higher than the communication speed on the input / output communication path when there is no blocking during cell transfer. Therefore, a buffer is provided in the output unit. Here, when transferring a cell from the buffer of the input unit to the buffer of the output unit, if the buffer of the output unit to which the cell is directed cannot accept a new cell,
That is, when the cell is full, the cell may be stored in the buffer of the input unit without being transferred. further,
If the cell transfer capability of the space division type cell switch is equal to the communication speed on the input / output communication path when there is no blocking at the time of cell transfer, no buffer is required at the output unit.

Further, the space division type cell switch in the present invention is not limited to the configuration shown in FIGS. For example, various space division switches known as crossbar switches, batcher banyan networks, delta networks, buffered delta networks, multipath delta networks, and the like can be used.

Furthermore, in the space division type cell switch of the present invention, priority control based on route information, that is, a simple FIFO
Instead of the (First In First Out) method, if the first cell of the buffer provided in the input section causes blocking, select a cell that does not cause blocking from the cells stored in the buffer of the input section. Operation to output,
May be performed. In this case, in each of the space division type cell switches, priority control may be performed on the entire cell switch based on the route information. In addition, if the space division type cell switch is configured using a 2-input 2-output unit switch having a buffer at an input unit such as a buffered delta network, priority is given to each unit switch by route information. Control may be performed.

FIG. 2 shows a configuration in which a common buffer type cell switch is arranged on the output side of the space division type cell switch and both are connected to reduce the output buffer amount. It is also possible to dispose a common buffer type cell switch on the input side of the cell switch and connect them to reduce the input buffer amount. Further, it goes without saying that a common buffer type cell switch can be arranged on the input side and the output side of the space division type cell switch and connected to each other.

[Effects of the Invention] As described above, the first, second, and third embodiments of the present application are described.
In the cell switch of the invention, the common buffer type cell switch is provided at the input part and / or the output part of the space division type cell switch, so that the utilization rate of the buffer can be improved and the cells of the same size can be obtained. The operation speed required for the buffer can be reduced as compared with the case where the switch is manufactured by a common buffer type cell switch, and the switch scale can be flexibly set.

[Brief description of the drawings]

FIG. 1 is a block diagram of a cell switch according to an embodiment of the first invention, FIG. 2 is a block diagram of a cell switch of another embodiment of the first invention, and FIG. 3 is a diagram of an embodiment of the second invention. FIG. 4 is a block diagram of a cell switch according to an embodiment of the third invention obtained by combining the first invention and the second invention, and FIGS. FIG. 2 is a diagram showing a configuration of a cell switch according to the related art. 1,43,45,81 …… Cell switch 3,5,7,9,37,47,49,51,53,83,85,87,89,139 …… Space division cell switch 11,13,15,17 , 19,21,23,25,39,41,55,57,59,61,63,65,6
7,69,91,93,95,97,99,101,103,105,107,109,111,113,11
5,117,119,121… Common buffer type cell switch 27… Input buffer 29,73,123,141… Unit switch 31,75,125,127,143… Multiplexer (MUX) 33,77,129,131,145… Common buffer 35,79,133,135,147… Demultiplexer (DEMUX) 71… Output buffer

Claims (4)

(57) [Claims] 1. A space division type cell switch having a plurality of output ports, and a plurality of common buffer type cell switches connected to the output ports of the space division type cell switch and each having a plurality of input ports. The cell switch, wherein each output port of the space division type cell switch is connected to an input port of each of the plurality of common buffer type cell switches. 2. The space division type cell switch is constituted by the number of input ports 1 (plural) or less of the common buffer type cell switch, and the space division type cell switch is constituted by m
Each of the m common buffer type cell switches has (plural) output ports,
Each of the m output ports of the space division type cell switch has:
Each of the common buffer type cell switches is connected to a different input port, and each input port of the common buffer type cell switch is connected to a single output port of the space division type cell switch. The cell switch according to claim 1, wherein: 3. An m having at most l (plural) output ports
A plurality of common buffer type cell switches, and l or less space division type cell switches each having m input ports connected to the output port of the common buffer type cell switch. A cell switch, wherein each of the m input ports of the split-type cell switch is connected to a different output port of the common buffer type cell switch. 4. An m having l (multiple) output ports or less
(Plural) first common buffer type cell switches, and l or less space division type cell switches each having m input / output ports connected to the output port of the first common buffer type cell switch And m second common buffer type cell switches connected to the output ports of the space division type cell switch and each having one input port. Each of the input ports is connected to a different output port of the first common buffer type cell switch, and each of the m output ports of the space division type cell switch is different from the second common buffer cell switch. A cell switch configured to be connected to an input port of a buffer type cell switch.