JP2690657B2 - Layout pattern generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a mask R0M built-in L
The present invention relates to a layout pattern generator that generates a layout pattern used for writing ROM data to SI.

[0002]

2. Description of the Related Art Normally, in manufacturing a ROM, an exposure mask required to write the logic "1" must be manufactured in order to write the logic "1", and this mask is manufactured. For this reason, a layout pattern generator for calculating and outputting coordinate values for mask manufacturing from the truth value data is required.

That is, as shown in FIG. 5, when sequentially searching for the presence of the logic "1" on the right side of the truth value data f of the logic "1", the truth value data of the logic "1" is searched. When it is determined that the truth value data g of logic "1" exists on the right of f, the lower right end set point f of the data f from the starting point f1.
Without reading 2, the lower left setting point g1 of the data g is read, then the upper left setting point g4 is read, then the upper left setting point f4 is read, then the starting point f1 is read, all 5 points are read, and the area M is read. Set
A process for taking in the gap N between the data f and g is performed. After that, each point g1, g2, g3, g of the next data g
4, g1 was read and area P was set. According to this, unlike the process of individually reading the rectangular area corresponding to the data f, the rectangular area corresponding to the gap N, and the rectangular area corresponding to the data g, the gap N can be read together with the data f.
That makes the work easier.

FIG. 20 is an input / output-related diagram for explaining the conventional layout pattern generator more specifically. In FIG. 20, reference numeral 201 denotes truth value data that is input to the apparatus, and 206 is a corrected layout pattern that is output. Reference numeral 207 is a mask ROM layout pattern correction device as the present layout pattern generation device.

FIG. 21 is a functional block diagram of a conventional layout pattern generator. In FIG. 21, 202
Is a truth value data reading means for reading the truth value data 201, 213 is coordinate data calculating means for calculating the coordinate data of the layout pattern corresponding to the truth value data 201, and 214 is the corrected layout pattern 206 for correcting the layout pattern. The layout pattern correction unit 215 for creating the coordinate data is a coordinate data storage unit that stores the coordinate data calculated by the coordinate data calculation unit 213.

FIG. 22 shows an example of truth value data.
Is an example of a layout pattern in which the coordinates of the layout pattern are calculated only for the truth value data of logic "1". 24 is an example of a corrected layout pattern after the layout pattern is corrected, and FIG. 25 is a flow chart showing the operation of this conventional layout pattern generating apparatus.

Next, the operation of this conventional example will be described with reference to FIGS. First, the truth value data reading means 202 reads the truth value data (step N1). The truth value data is ROM data converted into binary data of logic “1” and logic “0” and rearranged so as to correspond to the memory cell array on the layout pattern. The coordinate data calculation means 213 calculates the coordinate data of the rectangle to be drawn on the mask ROM for the truth value data of logic "1", and creates a layout pattern (step N2). Next, the layout pattern correction unit 214 searches each rectangle of the layout pattern for any adjacent rectangles in the vertical and horizontal directions (step N3). If there are adjacent rectangles, the layout pattern correction means 214 corrects the layout pattern to create a corrected layout pattern (step N4). If there is no adjacent rectangle, the layout pattern is not corrected. Here, the correction of the layout pattern is to recalculate the coordinate data of the rectangle so as to fill the gap (gap) between the adjacent rectangles (FIG. 24).

FIG. 26 is a functional block diagram of a conventional layout pattern generator. In FIG. 26, 1 is truth value data which is an input to the layout pattern generator, 4 is coordinate value data, 12 is corrected layout pattern data which is an output from the apparatus, 124 is a reading means of truth value data, and 125 is Rectangle (truth value data =
"1") is a truth value data searching means for searching for adjacent rectangles, and 126 is a layout pattern creating means for performing layout pattern correction processing to create layout pattern data.

FIG. 27 shows an example of truth value data. FIG.
8 is an example of the layout pattern after processing the layout pattern. In FIG. 28 , 15a is a light transmission pattern and 15b is a light blocking pattern, and the element is printed according to this pattern.

FIG. 29 is a flow chart showing the operation of the conventional layout pattern generator. In FIG. 29, the truth value data is first read (step 1
27). The truth value data is ROM data (hexadecimal number) written in the mask ROM built-in LSI as “1” and “0”.
Of binary data and rearranged so as to correspond to the memory cell array on the layout pattern.
If the truth value data has ended, the process ends.
(Step 128).

It is determined whether the read truth value data is data that generates a rectangle (step 129). Data in which the truth value data generates a rectangle (truth value data =
In the case of “1”), the layout pattern data is corrected, and therefore the process proceeds to the process of calculating the coordinate value data.
Return to the process of reading truth value data.

[0012] Above the data generating the rectangle, a rectangle adjacent to the upper right and right sides of the data (true value data = "1" is searched (step 130). If there are rectangles adjacent to the upper, upper right and right sides of the rectangle. , The layout pattern is corrected so that the upper, upper right, and right rectangular gaps are filled (step 131), and the corrected layout pattern is created.
If there is no rectangle adjacent to any one of the upper, upper right and right sides, the next search processing is performed. Here, the layout pattern correction process is to calculate the coordinate value data of the rectangle so as to fill the gap between the adjacent rectangles (FIG. 28).

It is searched whether or not there is an adjacent rectangle on the right side of the data generating the rectangle (step 132). When there is an adjacent rectangle on the right side, the layout pattern is corrected so that the gap between the right side rectangles is filled (step 133), and the corrected layout pattern 12 is created. When there is no adjacent rectangle on the right side, the next search process is performed.

It is searched whether or not there is an adjacent rectangle on the lower right side below the data for generating the rectangle (step 13).
4). If there are adjacent rectangles on all of the lower and lower right sides, it is searched whether there is an adjacent rectangle on the upper side (step 135). Here, if there is an adjacent rectangle on the upper side,
Layout pattern correction processing is performed so that the upper and lower rectangular gaps are filled (step 136), and if there is no adjacent upper rectangle, layout pattern correction processing is performed so that the lower rectangular gap is filled. (Step 13
7) The corrected layout pattern 12 is created.
If there is no adjacent rectangle on either the lower or lower right side, the next search process is performed.

It is searched whether or not there is a rectangle adjacent to the upper side of the data for generating the rectangle (step 138). If there is an adjacent rectangle on the upper side, the layout pattern is corrected so that the gap between the upper rectangles is filled (step 139) to create a corrected layout pattern. If there is no adjacent rectangle on the upper side, the following processing is performed.

If there is no adjacent rectangle on the upper, right, upper right, lower right, or lower side of the data that generates a rectangle, the layout pattern is not corrected and a layout pattern is created (step 140).

The process of searching the adjacent rectangles and calculating the coordinate value data of the rectangles is performed for each truth value data and repeated until the end of the truth value data.

[0018]

Since the conventional layout pattern generating device is configured as described above, the layout pattern can be obtained even if the gap N between the data f and g of the adjacent logic "1" is taken in. Coordinate data is created one by one corresponding to the truth value data of logic "1". That is, for each of the data f and g, the process of creating coordinate data must be performed. In an enormous amount of ROM capacity such as a mask ROM LSI, if coordinate data is created for each truth value data of logic “1”, the data amount of the layout pattern becomes enormous and a lot of processing is required. There is a problem that the disk capacity is required, that is, the disk capacity used for processing is insufficient and the processing takes time.

The present invention has been made in order to solve the above problems, and considers correction processing when creating a layout pattern (combining corrected rectangles,
By creating a layout pattern with polygons that take into consideration the process of making one figure), that is, a rectangular area in which data f and g of adjacent logic "1" are combined is defined as points f1, g2, g3, f4. , F1 is read to obtain a layout pattern generation device capable of reducing the data amount of the layout pattern.

[0020]

According to a first aspect of the present invention, there is provided a layout pattern generating device which is a truth value of logic "1" or "0" in which ROM data is rearranged so as to correspond to a memory cell array on a layout pattern. Truth value data reading means 202 for reading data, truth value data grouping means 203 for grouping truth value data of the same value by adjacent ones, and coordinate values on the layout pattern for each of the grouped truth value data The coordinate value data calculating means 204 for calculating data to create a layout pattern is provided.

In the layout pattern generator according to the second aspect of the present invention, the logic "1" is obtained by rearranging the ROM data so as to correspond to the memory cell array on the layout pattern.
Truth value data reading means 2 for reading the truth value data and whether or not the data of the logic "1" exists in the upward direction, the downward direction, the leftward direction or the rightward direction of the truth value data of the logical "1". If there is data of logic "1", the truth value data grouping means 3 is regarded as the same group and is grouped.
A coordinate value data calculating means 5 for calculating the coordinate values of the layout pattern to be drawn on the mask, and an outer frame coordinate value data extracting means for determining the entire outer circumference of the truth value data of the grouped logic "1". And a layout pattern creating means 7 including 8.

In the layout pattern generator according to the third aspect of the present invention, in the layout pattern correction processing, data grouping is performed only in the vertical direction or the horizontal direction.

In the layout pattern generating device according to the fourth aspect of the present invention, data of logic "0" exists in the whole truth value data of logic "1" grouped by the truth value grouping means 3. The layout pattern creating means 7 is provided with the inside-out data retrieval means 9 for determining whether or not the truth-value data grouping means is present when the inside-out data retrieval means 9 determines that data of logic "0" exists. 3, it is sequentially determined whether or not the logic “0” data exists in the upward direction, the downward direction, the leftward direction, or the rightward direction of the truth value data of the logical “0”. If they exist, they are regarded as the same group and are grouped, and the hollow coordinate value data extraction means for determining the entire outer circumference of the truth value data of this grouped logic "0". 0 is obtained with the above layout pattern creating means 7.

[0024]

In the invention of claim 1, the truth value data of the logic "1" or "0" is grouped by adjacent ones, and the coordinate value data is calculated for each grouped truth value data. Therefore, the data amount of the layout pattern is reduced.

According to the second aspect of the present invention, the truth value data of logic "1" are grouped by adjacent ones and the coordinate value data is calculated for each grouped truth value data. Therefore, the data amount of the layout pattern is reduced.

According to the third aspect of the invention, the layout pattern correction processing groups the data of logic "1" or "0" only in the vertical or horizontal direction. Therefore, the data amount of the layout pattern is reduced.

In the invention of claim 4, if data of logic "0" exists in the whole truth value data of logic "1", it is regarded as the same group and grouped. The entire circumference of the truth value data of the grouped logic "0" is determined. Therefore, the data amount of the layout pattern is reduced.

[0028]

[Embodiment 1] FIG. 1 is a functional block diagram of a layout pattern generator according to an embodiment of the invention of claim 1. In FIG. 1, components corresponding to those shown in FIG. 19 are designated by the same reference numerals, and their description will be omitted. FIG.
In 203, 203 is a truth value data grouping means for grouping adjacent truth value data of logic “1” to create grouped truth value data, and 204 is for calculating coordinate data for each grouped truth value data item. Coordinate data calculation means for creating corrected layout pattern data, 2
Reference numeral 05 is a grouped truth value data storage unit for storing the truth value data grouped by the truth value data grouping means 203.

FIG. 2 is an example of grouped truth value data, and FIG. 3 is an example of a corrected layout pattern obtained by calculating coordinate values for each grouped truth value data.
FIG. 4 is a flow chart showing the operation of this embodiment.

Next, the operation of this embodiment will be described with reference to FIGS. First, the truth value data reading means 202 reads the truth value data (step S1). This process is the same as the conventional one. Next, the truth value data grouping means 203 groups the truth value data of logic "1" by adjacent ones (step S2). That is, the truth value data grouping means 203 sequentially determines whether or not the logic "1" data exists in the upper direction, the lower direction, the left direction, or the right direction of the truth value data of the logic "1". If data of logic "1" exists, it is regarded as the same group and grouped.
The outermost (outer peripheral portion) truth value data of the grouped truth value data is combined and the coordinate data on the layout pattern is calculated by the coordinate data calculation means 204, whereby a polygonal corrected layout pattern in consideration of the correction. Is created (step S3). Next, it is searched whether or not the truth value data of the logic "1" (the hollow portion) is included in the truth value data of the logic "1" (step S4). When there is a hollow portion, the coordinate data of the hollow portion is calculated by the coordinate data calculating means 204 (step S5), and the coordinate data of the outer peripheral portion calculated in step S3 and the coordinate data of the hollow portion are combined ( In step S6), the corrected layout pattern is recreated. If there is no hollow portion, the hollow portion is not processed.

Embodiment 2 FIG. FIG. 6 is a functional block diagram of a layout pattern generation device according to an embodiment of the invention of claims 2 and 4. In FIG. 6, 1 is truth value data to be input to the layout pattern generator, and 2 is a ROM corresponding to the memory cell array on the layout pattern.
The truth value data reading means 3 for reading the truth value data of logic "1" in which the data is rearranged, the group 3 of the data generating the rectangle (truth value data = "1") by adjacent ones, that is, It is determined whether or not the data of the logic "1" exists in the upward direction, the downward direction, the leftward direction, or the rightward direction of the truth value data of the logic "1", and the data of the logic "1" exists. For example, the truth value data grouping means that regards them as the same group and groups them, 4 is the coordinate value data that stores the information for calculating the coordinate values, and 5 is the coordinate value of the layout pattern to be drawn on the mask. Coordinate value data calculating means for calculating, 6 is a coordinate value data storage unit for storing the calculated coordinate value data on a memory, and 7 is a layout pattern correction process from grouped truth value data. In view, a layout pattern generating means for generating a layout pattern data (polygon). In the layout pattern creating means 7, 8 extracts the vertex coordinates of the outer peripheral portion of the grouped truth value data from the coordinate value data storage unit 6, that is, the entire outer periphery of the grouped truth value data of logic "1". Outer frame coordinate value data extraction means for determining, 9 is data that does not generate a rectangle in the grouped truth value data (truth value data =
“0”) is searched for, and the blank data search means 10 extracts the coordinate values of the blank data searched by the blank data search means 9 from the coordinate value data storage unit 6, that is, blank data search. The truth value data grouping means 3 when the means 9 determines that the data of logic “0” exists.
It is sequentially determined whether or not the data of the logic "0" exists in the upward direction, the downward direction, the leftward direction, or the rightward direction of the truth value data of the logic "0", and the data of the logic "0" exists. If so, they are regarded as the same group and are grouped, and the hollow coordinate value data extracting means for determining the entire outer periphery of the truth value data of the grouped logic "0", 11 is for creating the layout pattern. Layout pattern data synthesizing means for synthesizing the layout pattern data created by the outer frame coordinate value data extracting means and the layout pattern data created by the hollow coordinate value data extracting means to create one layout pattern data, 12 Is a corrected layout pattern that is output from the layout pattern data generator.

FIG. 7 shows an example of truth value data after grouping. In FIG. 7, 13 is an outer peripheral portion of the layout pattern data for extracting the outer frame coordinate value data, and 14 is a hollow portion of the layout pattern data for extracting the outer-outer coordinate value data. FIG. 8 is an example of a corrected layout pattern created by extracting coordinate value data for each grouped truth value data.

FIG. 9 is a flow chart showing the operation of the layout pattern generator. The operation will be described with reference to FIG. First, as a pre-process for creating layout pattern data, the coordinate values of the layout pattern to be drawn on the mask are calculated and stored in the coordinate value data storage unit 6 (step 15). Next, the truth value data is read (step 16). This process is the same as the conventional one. If the reading is the end of the truth value data, the process ends (step 17).

It is determined whether the read truth value data is data that generates a rectangle (step 18). Data in which the truth value data generates a rectangle (truth value data = "1")
In the case of, the adjacent truth value data = “1” is grouped, and the process proceeds to the outer frame data creation process for creating the layout pattern of the outer periphery of the grouped truth value data, and the data that does not generate a rectangle (the truth value data = In the case of “0”), the process returns to the reading process of the truth value data.

While grouping adjacent truth value data = “1”, the coordinate value data of the outer peripheral portion of the layout pattern to be drawn on the mask is extracted from the coordinate value data storage unit for each grouped truth value data. Outer frame layout pattern data is created (step 19). Then, it is searched whether or not there is truth value data "0" which does not generate a layout pattern in the grouped truth value data "1" (step 20).

A blanking flag indicating the presence or absence of data that does not generate a layout pattern is determined (step 21).
When the inside-out flag = “1”, the process proceeds to the process of creating inside-out data, and when the inside-out flag = “0”, the process proceeds to the process of deleting the processed data. When the hollow flag = "1",
The coordinate value data of the hollow portion is extracted from the coordinate value data storage section to create hollow layout pattern data (step 22). The outer frame layout pattern data and the blank layout pattern data are combined to create one layout pattern data (step 23). The process of creating hollow data is repeated until there is no hollow data (truth value = "0") in the grouped truth data.

The truth value data that has undergone the layout pattern data creation processing is deleted so as not to interfere with the layout pattern data creation processing for the other grouped truth value data (step 24).

The above processing is repeated until the end of the truth value data. Then, when the truth value data ends, this processing ends.

10 and 11 are flow charts showing the operation of the outer frame data creation processing of this layout pattern generator. This will be described with reference to FIGS. First, the rectangle that serves as the basis for creating the outer frame data (truth value data = "1")
The coordinate value data at the lower left of is extracted from the coordinate value data storage unit 6 (step 25). This coordinate value data becomes the coordinates of the starting point of the outer frame layout pattern data. The processed flag is set on the basic rectangle (the truth value data = "1" is changed to "2") (step 26).

It is searched whether or not there are adjacent rectangles (truth value data = "1") to the right and bottom of the basic rectangle (step 27). If there are adjacent rectangles on the right and lower right of the basic rectangle, the lower left coordinates of the right rectangular of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 30), and the basic rectangle is moved to the lower right rectangle. (Step 31). At this time, the processed flags are set in the right and lower right rectangles of the basic rectangle (step 32). Then, this process is moved to a process for searching whether or not there is an adjacent rectangle below and below the basic rectangle. If there is a rectangle adjacent only to the right side of the basic rectangle, the basic rectangle is moved to the right side rectangle (step 28), and the processed flag is set to the right side rectangle (step 29). And
Once again, processing is performed to search whether there are adjacent rectangles on the right and bottom of the basic rectangle. If there is no rectangle adjacent to the right and lower right of the basic rectangle, the lower right coordinates of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 33). And
This process moves to the process of searching for the adjacent rectangles on the upper and upper right corners of the basic rectangle.

A search is made to see if there is an adjacent rectangle below and below the basic rectangle (step 34). If there are adjacent rectangles below and below the basic rectangle, the upper left coordinates of the lower rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 3
7) Move the basic rectangle to the lower left rectangle (step 3)
8). At this time, the processed flags are set in the left and lower left rectangles of the basic rectangle (step 39). Then, this process is moved to a process of searching for a rectangle adjacent to the left and upper left of the basic rectangle. If there is an adjacent rectangle only under the basic rectangle, the basic rectangle is moved to the lower rectangle (step 35), and the processed flag is set in the lower rectangle (step 36). Then, a process is performed again to search for adjacent rectangles below and below the basic rectangle. If there is no adjacent rectangle below and below the basic rectangle, the lower left coordinates of the basic rectangle are extracted (step 40). At this time, it is searched whether the extracted coordinates are the same as the coordinates of the starting point (step 4).
1). When the extracted coordinates and the coordinates of the starting point are the same, the processed flag is set to all the truth value data = “1” adjacent to the truth value data set with the processed flag in the grouped truth value data (step 42). ), The processing ends. When the extracted coordinates are different from the coordinates of the start point, this process is moved to a process of searching for adjacent rectangles on the right and bottom right of the basic rectangle.

It is searched whether there are adjacent rectangles on the left and upper left of the basic rectangle (step 43). To the left of the basic rectangle,
If there is an adjacent rectangle on the upper left, the upper right coordinates of the rectangle on the left side of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 46), and the basic rectangle is moved to the upper left rectangle (step 47). At this time, the processed flags are set in the left and upper left rectangles of the basic rectangle (step 48). Then, this process is moved to a process for searching whether or not there are adjacent rectangles above and below the basic rectangle. If there is a rectangle adjacent to the left side of the basic rectangle only, the basic rectangle is moved to the left side rectangle (step 44), and the processed flag is set in the left side rectangle (step 45). Then, the process of searching again whether there are adjacent rectangles on the left and upper left of the basic rectangle is performed. If there is no rectangle adjacent to the left and upper left of the basic rectangle, the upper left coordinates of the basic rectangle are extracted from the coordinate value data storage unit (step 49). Then, the process moves to a process for searching whether there is a rectangle adjacent to the bottom and bottom left of the basic rectangle.

It is searched whether or not there are adjacent rectangles above and below the basic rectangle (step 50). If there are adjacent rectangles on the upper and upper right corners of the basic rectangle, the lower right coordinates of the upper rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 5).
3) Move the basic rectangle to the upper right rectangle (step 5)
4). At this time, the processed flags are set in the upper and upper right rectangles of the basic rectangle (step 55). Then, this process is moved to a process for searching whether or not there are adjacent rectangles on the right and lower right of the basic rectangle. If there is a rectangle adjacent only to the upper side of the basic rectangle, the basic rectangle is moved to the upper rectangle (step 51), and the processed flag is set to the upper rectangle (step 52). Then, the process of searching again for the adjacent rectangles on the upper and upper right corners of the basic rectangle is performed. If there is no rectangle adjacent to the upper right corner of the basic rectangle, the upper right coordinates of the basic rectangle are extracted from the coordinate value data storage unit (step 56). Then, this process is moved to a process of searching for a rectangle adjacent to the left and upper left of the basic rectangle.

The above four types of retrieval processing (step 2)
7, 34, 43, 50) until the coordinates of the extracted layout pattern match the coordinates of the initially extracted layout pattern. Then, if the coordinates match, the process ends.

FIG. 12 is a flow chart showing the operation of the hollowed-out data search processing of the layout pattern generator. It will be described with reference to FIG. First, the grouped truth value data is read (step 57). At this time, the processed flags are all set in the outer frame of the read truth value data. Here, it is searched whether or not the truth value data has ended (step 58), and if the truth value data has ended, the processing ends.

It is searched whether there is data (truth value data = "0") that does not generate a rectangle between the processed flags in the same X-ray segment (step 59). When there is data that does not generate a rectangle between the processed flags in the same X-ray segment, a hollow flag indicating that there is hollow data is set (blank flag = "1") (step 60).

FIGS. 13 and 14 are flow charts showing the operation of the inside data creation processing of the layout pattern generator. This will be described with reference to FIGS. First, the rectangle (truth value data =
The coordinate value data on the upper right of the lower left rectangle of "0") is extracted from the coordinate value data storage unit 6 (step 61). This coordinate value data becomes the coordinates of the starting point of the hollow layout pattern data. The processed flag is set in the basic rectangle (truth value data = "0" is changed to "2") (step 6)
2).

It is searched whether or not there is a rectangle (truth value data = "0") which does not generate the adjacent coordinate values on the upper left and the upper left of the basic rectangle (step 63). If there is no rectangle that is adjacent to the top, top left, or top left of the basic rectangle, the upper right coordinates of the left rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 66), and the basic rectangle is made the upper left rectangle. Move (step 67). At this time, if there is no adjacent rectangle on the upper and upper left corners of the basic rectangle, the processed flag is set on the upper and upper left corners of the basic rectangle. If there is no adjacent rectangle on the upper left corner of the basic rectangle, the processed upper left corner is processed. A flag is set (step 68). Then, this process is moved to a process of searching for a rectangle adjacent to the left and bottom left of the basic rectangle. If there is no adjacent rectangle only above the basic rectangle, the basic rectangle is moved to the upper rectangle (step 64), and the processed flag is set in the upper rectangle (step 65). Then, the process of searching again whether there is a rectangle adjacent to the upper and upper left corners of the basic rectangle is performed. If there is a rectangle adjacent to the upper and upper left corners of the basic rectangle, the lower right coordinates of the upper left rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 69). This process moves to the process of searching whether there are adjacent rectangles on the right and upper right of the basic rectangle.

It is searched whether or not there is a rectangle adjacent to the left and bottom left of the basic rectangle that does not generate coordinate values (step 7).
0). When there is no rectangle adjacent to the left, the lower left, or the lower left of the basic rectangle, the upper left coordinates of the lower rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 73), and the basic rectangle is the lower left rectangle. (Step 74). At this time, if there is no rectangle adjacent to the left and bottom left of the basic rectangle, the processed flag is set to the left and bottom left of the basic rectangle, and if there is no rectangle adjacent to the bottom left of the basic rectangle, it is processed to the bottom left of the basic rectangle. A flag is set (step 75). And
This process moves to the process of searching for an adjacent rectangle below and below the basic rectangle. If there is no rectangle adjacent to the left side of the basic rectangle, the basic rectangle is moved to the left side rectangle (step 71), and the processed flag is set to the left side rectangle (step 72). Then, the process of searching again whether there is a rectangle adjacent to the left and bottom left of the basic rectangle is performed. If there are adjacent rectangles on the left and bottom left of the basic rectangle, the coordinates of the upper right of the lower left rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 76). At this time, it is searched whether the extracted coordinates are the same as the coordinates of the starting point (step 77). When the extracted coordinates and the coordinates of the start point are the same, all the truth value data adjacent to the truth value data in which the processed flag is set in the grouped truth value data = “0”
The processed flag is set to (step 78), and the process ends. If the extracted coordinates are different from the coordinates of the start point, this process is moved to a process of searching for a rectangle adjacent to the upper and upper left corners of the basic rectangle.

It is searched whether or not there is a rectangle which does not generate adjacent coordinate values below and below the basic rectangle (step 7).
9). If there is no rectangle adjacent to the bottom, bottom right, or bottom right of the basic rectangle, the coordinates of the lower left of the right rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 82), and the basic rectangle is moved to the lower right. To the rectangle (step 83). At this time, if there is no rectangle adjacent to the lower or upper right of the basic rectangle, the processed flag is set to the lower or lower right of the basic rectangle. If there is no adjacent rectangle to the lower right of the basic rectangle, the lower right of the basic rectangle The processed flag is set to (step 84). And
This process moves to the process of searching whether there are adjacent rectangles on the right and upper right of the basic rectangle. If there is no adjacent rectangle only under the basic rectangle, the basic rectangle is moved to the lower rectangle (step 80), and the processed flag is set in the upper rectangle (step 81). Then, the process of searching again whether there is an adjacent rectangle under the basic rectangle or under the right rectangle is performed. If there are adjacent rectangles below and below the basic rectangle, the upper left coordinates of the lower right rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 85). Then, this process is moved to a process of searching for a rectangle adjacent to the left and bottom left of the basic rectangle.

It is searched whether or not there are rectangles adjacent to the right and upper right of the basic rectangle that do not generate coordinate values (step 8).
6). If there is no rectangle adjacent to the right, upper right, or only the upper right of the basic rectangle, the coordinates of the lower right of the upper rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 89), and the basic rectangle is the upper right rectangle. (Step 90). At this time, if there is no adjacent rectangle to the right and upper right of the basic rectangle, the processed flag is set to the right and upper right of the basic rectangle, and if there is no adjacent rectangle to the upper right of the basic rectangle, it is processed to the upper right of the basic rectangle. A flag is set (step 91). And
This process moves to the process of searching whether there is an adjacent rectangle on the upper left of the basic rectangle. If there is no rectangle adjacent to the right side of the basic rectangle, the basic rectangle is moved to the right side rectangle (step 87), and the processed flag is set in the right side rectangle (step 88). Then, the processing for searching again whether there are adjacent rectangles on the right and upper right of the basic rectangle is performed. If there are adjacent rectangles on the right and upper right of the basic rectangle, the lower left coordinates of the upper right rectangle of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 92). Then, this process is moved to a process of searching whether or not there is an adjacent rectangle below and below the basic rectangle.

The above four types of retrieval processing (step 6)
3, 70, 79, 86) until the coordinates of the extracted layout pattern match the coordinates of the layout pattern extracted first. Then, if the coordinates match, the process ends.

FIG. 15 is a flow chart showing the operation of a process of synthesizing outer frame data and hollow data in the layout pattern generator. It will be described with reference to FIG. At first,
The coordinates of the starting point for creating the blank layout pattern data are read (step 93). The coordinate values of the outer frame layout pattern data are read and the position of the starting point coordinate of the hollow frame layout pattern data is searched for (step 94). If the positions of the outer frame data and the hollow data are found, the outer frame data and the hollow data are combined to create the corrected layout pattern data (step 95).

FIG. 16 is a flow chart showing the operation of the deletion processing of the processed data in the ROM layout pattern data creation flow. This will be described with reference to FIG. First, the grouped truth value data after creating the layout pattern data is read (step 96). here,
It is determined whether the truth value data is over (step 9
7) If it is finished, the process is ended. It is determined whether the read processed truth value data is the processed truth value data (truth value data = “2”) (step 98). If the processed truth value data is the processed truth value data, the truth value data is cleared (truth value data = "0") (step 99).

Embodiment 3 FIG. In the above embodiment, the case where the layout pattern correction process is performed in both the vertical direction and the horizontal direction has been described, but the layout pattern correction process may be performed in only one of the vertical direction and the horizontal direction. Also in this case, the same effect as that of the above-described embodiment is obtained. Hereinafter, a third embodiment of the present invention will be described with reference to the drawings.
FIG. 17 is a flowchart showing the operation of the layout pattern generating apparatus according to the third embodiment of the present invention, in which the layout pattern correction processing is performed in either the vertical direction or the horizontal direction. It will be described with reference to FIG. First, as preprocessing for creating layout pattern data, the coordinate values of the layout pattern to be drawn on the mask are calculated and stored in the coordinate value data storage unit (step 10).
0). This process is the same as in the second embodiment.

Next, the truth value data is read (step 101). This process is the same as in the second embodiment. If the truth value data has ended, the process ends (step 102). It is determined whether the read truth value data is data that generates a rectangle (step 103). This process is the same as in the second embodiment.

The layout pattern data to be drawn on the mask is created for each grouped truth value data while grouping the truth value data = “1” adjacent in the vertical direction or the horizontal direction (step 104). The truth value data after the layout pattern data creation processing is deleted (the truth value data = “2” is changed to the truth value data = “0”) (step 105).

The above processing is repeated until the end of the truth value data. Then, when the truth value data ends, the processing ends.

FIG. 18 is a flow chart showing the operation of layout pattern data creation processing for performing layout pattern correction processing only in the horizontal direction. It will be described with reference to FIG. First, the lower left coordinate of the reference rectangle is extracted from the coordinate value data storage unit (step 106). The position of the basic rectangle is stored (step 107). This position is the position of the starting point. The processed flag is set in the basic rectangle (step 108). It is searched whether there is a rectangle adjacent to the right side of the basic rectangle (step 109). If there is an adjacent rectangle, the basic rectangle is moved to the right (step 110), and the processed flag is set in the right rectangle (step 111). Then, the process of searching again for a rectangle adjacent to the right side of the basic rectangle is performed.
If there is no rectangle adjacent to the right side of the basic rectangle, the lower right coordinates of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 112). The upper right coordinates of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 113). The basic rectangle is moved to the position of the starting point (step 114), the upper left coordinate of the basic rectangle is extracted from the coordinate value data storage unit 6 (step 115), and the process is ended.

FIG. 19 is a flow chart showing the operation of layout pattern data creation processing for performing layout pattern correction processing only in the vertical direction. It will be described with reference to FIG. First, the lower left coordinate of the reference rectangle is extracted from the coordinate value data storage unit 6 (step 116). The lower right coordinates of the reference rectangle are extracted from the coordinate value data storage unit 6 (step 117). A processed flag is set in the basic rectangle (step 118). It is searched whether there is a rectangle adjacent to the upper side of the basic rectangle (step 11).
9). If there is an adjacent rectangle, the basic rectangle is moved upward (step 122), and the processed flag is set in the right rectangle (step 123). Then, the process of searching again for a rectangle adjacent to the upper right corner of the basic rectangle is performed. If there is no rectangle adjacent to the upper side of the basic rectangle, the upper right coordinates of the basic rectangle are extracted from the coordinate value data storage unit 6 (step 120). The upper left coordinate of the basic rectangle is extracted from the coordinate value data storage unit 6 (step 121), and the process ends.

[0061]

As described above, according to the inventions of claims 1 to 4, the truth value data of the same value are grouped with each other, and the coordinate data is calculated for each grouped truth value data. Since the layout pattern is created, the layout pattern for the mask ROM can be obtained as a polygon. As a result, the data amount of the layout pattern can be reduced, so that the disk capacity used for this processing can be reduced and the processing time can be shortened.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a layout pattern generation device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of grouped truth value data by the layout pattern generator of the embodiment of FIG.

FIG. 3 is a diagram showing an example of a corrected layout pattern by the layout pattern generator of the present embodiment of FIG.

FIG. 4 is a flowchart showing the operation of the layout pattern generation device of the embodiment of FIG.

FIG. 5 is a diagram for explaining a process of searching for truth value data.

FIG. 6 is a functional block diagram of a layout pattern generation device according to an embodiment of the present invention.

FIG. 7 is a diagram showing an example of truth value data that has already been grouped by the layout pattern generation device of the embodiment shown in FIG. 6;

FIG. 8 is a diagram showing an example of a corrected layout pattern by the layout pattern generator of the embodiment of FIG.

9 is a flowchart showing the operation of the layout pattern generation device of the embodiment of FIG.

10 is a flowchart showing the operation of outer frame data creation processing by the layout pattern generation device of the embodiment of FIG.

11 is a flowchart showing a continuation of FIG.

FIG. 12 is a flowchart showing an operation of a hollowed-out data search process by the layout pattern generation device of the embodiment of FIG. 6;

FIG. 13 is a flowchart showing an operation of a hollowed-out data creating process by the layout pattern generating device of the embodiment of FIG.

FIG. 14 is a flowchart showing a continuation of FIG.

15 is a flowchart showing an operation of a process of synthesizing outer frame data and hollowed-out data by the layout pattern generation device of the embodiment of FIG.

16 is a flowchart showing the operation of processing for deleting processed data by the layout pattern generation device of the embodiment of FIG.

FIG. 17 is a flowchart showing the operation of the layout pattern generation device according to the embodiment of the invention of claim 3, wherein the layout pattern correction processing is performed only in either the vertical direction or the horizontal direction.

FIG. 18 is a flowchart showing an operation of layout pattern correction processing for performing layout pattern correction processing only in the horizontal direction.

FIG. 19 is a flowchart showing an operation of layout pattern correction processing for performing layout pattern correction processing only in the vertical direction.

FIG. 20 is a diagram showing an input / output relation of a conventional layout pattern generator.

FIG. 21 is a functional block diagram of a conventional layout pattern generator.

FIG. 22 is a diagram showing an example of truth value data which is input to the layout pattern generator.

FIG. 23 is a diagram showing an example of a layout pattern by a conventional layout pattern generator.

FIG. 24 is a diagram showing an example of a corrected layout pattern by a conventional layout pattern generator.

FIG. 25 is a flowchart showing the operation of a conventional layout pattern generation device.

FIG. 26 is a functional block diagram of a conventional layout pattern generator.

FIG. 27 is a diagram showing an example of truth value data which is input to the layout pattern generator.

FIG. 28 is a diagram showing an example of a layout pattern after being processed by a conventional layout pattern generating device.

FIG. 29 is a flowchart showing the operation of a conventional layout pattern generation device.

[Explanation of symbols]

 2,202 truth value data reading means 3,203 truth value grouping means 5,204 coordinate value data calculating means 7 layout pattern creating means 8 outer frame coordinate value data extracting means 9 hollow data detecting means 10 hollow coordinate value data Extraction means

Claims (4)

(57) [Claims] 1. A large-scale integrated circuit having a mask ROM built-in
In a layout pattern generating device for generating a layout pattern used for writing OM data,
Truth value data reading means for reading truth value data of logic "1" or "0" in which ROM data is rearranged so as to correspond to the memory cell array on the layout pattern;
Truth value data grouping means for grouping truth value data of the same value by adjacent ones, and coordinate value for creating layout pattern by calculating coordinate value data on the layout pattern for each of the grouped truth value data A layout pattern generation device comprising: a data calculation means. 2. R for a large-scale integrated circuit with a built-in mask ROM
In a layout pattern generating device for generating a layout pattern used for writing OM data,
Truth value data reading means for reading the truth value data of the logic "1" in which ROM data is rearranged so as to correspond to the memory cell array on the layout pattern, and the above or below the truth value data of the logic "1". It is determined whether data of logical "1" exists in the lateral direction, leftward direction, or rightward direction, and if logical "1" data exists, it is regarded as the same group and the truth of grouping. Value data grouping means, coordinate value data calculating means for calculating the coordinate values of the layout pattern to be drawn on the mask, and outer frame coordinates for determining the entire outer circumference of the grouped truth data of logic "1". A layout pattern generating device comprising: a layout pattern creating means including a value data extracting means. 3. A large-scale integrated circuit having a mask ROM built-in R
In a layout pattern generating device for generating a layout pattern used for writing OM data,
Truth data reading means for reading the truth data of logic "1" in which ROM data is rearranged so as to correspond to the memory cell array on the layout pattern, and the above or below the truth data of logic "1". Whether or not data of logical "1" is present in the lateral direction, leftward direction, or rightward direction is sequentially determined, and if logical "1" data is present, it is regarded as the same group and is grouped into a truth. Value data grouping means, coordinate value data calculating means for calculating the coordinate values of the layout pattern to be drawn on the mask, and outer frame coordinates for determining the entire outer circumference of the grouped truth data of logic "1". A layout pattern creating unit including a value data extracting unit is provided, and in the layout pattern correction process, data grouping is performed in the vertical direction or the horizontal direction. Layout pattern generating apparatus being characterized in that the. 4. A large-scale integrated circuit having a mask ROM built-in R
In a layout pattern generating device for generating a layout pattern used for writing OM data,
Truth value data reading means for reading the truth value data of the logic "1" in which ROM data is rearranged so as to correspond to the memory cell array on the layout pattern, and the above or below the truth value data of the logic "1". It is determined whether data of logical "1" exists in the lateral direction, leftward direction, or rightward direction, and if logical "1" data exists, it is regarded as the same group and the truth of grouping. Value data grouping means, coordinate value data calculating means for calculating the coordinate values of the layout pattern to be drawn on the mask, and outer frame coordinates for determining the entire outer circumference of the grouped truth data of logic "1". A truth pattern data of logic "1" grouped by the truth value data grouping means, the layout pattern creating means including the value data extracting means. The layout pattern creating means is provided with a hollow data searching means for judging whether or not data of logical "0" exists in the whole, and it is judged by this hollow data searching means that data of logical "0" exists. Then, the truth value data grouping means sequentially determines whether or not the logic "0" data exists in the upper direction, the lower direction, the left direction, or the right direction of the logic "0" truth value data. If there is data of logic "0", it is regarded as the same group and grouped, and the outline coordinates of the whole truth value data of this grouped logic "0" are determined. A layout pattern generating device, characterized in that value data extracting means is provided in the layout pattern creating means.