JP2671425B2 - Digital signal processing circuit - Google Patents

Description

The present invention relates to a digital signal processing circuit suitable for use in, for example, a digital audio system.

[Summary of the Invention]

The present invention relates to a digital signal processing circuit suitable for use in, for example, a digital audio system, including a digital signal generation circuit for outputting first and second digital signals and a first digital signal for outputting the first digital signal. In a digital signal processing circuit having a signal output terminal and a second digital signal output terminal connected to a digital / analog converter for converting the second digital signal into an analog signal, the digital signal generating circuit and the first digital signal processing circuit are provided. A first gate circuit for suppressing the first digital signal between the first digital signal output terminal and the first digital signal output terminal;
A second gate circuit that suppresses the second digital signal is provided between the digital signal generation circuit and the second digital signal output terminal, and at least the first and second gate circuits are provided from the digital signal generation circuit. By integrating the gate circuit up to an integrated circuit, it is possible to eliminate adverse effects due to interference between an analog signal obtained by digital / analog conversion of the second digital signal and the first digital signal. .

[Conventional technology]

A digital audio system that records an audio signal as a digital signal on a magnetic tape or optical digital, then reads the digital signal from the magnetic tape etc. and reproduces the audio signal, faithfully reproduces a wide dynamic range sound any number of times. It is becoming widespread because of the feature that it can be done.

FIG. 2 shows a so-called compact disc reproducing apparatus which is a typical example of a conventional digital audio system,
In FIG. 2, (1) is a disc, (2) is a motor for rotating the disc (1), (3) is a pickup incorporating a laser diode, (4) is the motor (2) and the pickup. The servo circuit that controls (3), (5) amplifies the output signal of the pickup (3) and is what is called EFM (8 bit / 14 bit modulation, Eight to F).
ourteen Modulation) is a preamplifier that generates a signal.

This EFM signal is supplied to the 14-bit / 8-bit demodulation circuit (8) via the connection terminal (6A), and the PCM signal combined with the demodulated subcode signal (control signal such as time information) and the error correction code is The data is written to a writable memory (RAM) (10) via the system bus (9). RAM
The PCM signal combined with the correction code written in (10) is subjected to error correction in the error correction circuit (11).
It is supplied to the interpolation circuit (13) via the 16-bit buffer (12). The error correction circuit (11) also has a central processing unit (CPU) function for controlling writing to the RAM (10). Then, in this interpolation circuit (13), the data that cannot be error-corrected is obtained by interpolation from the values of the preceding and following data, and the obtained L channel and R channel PCM data are arranged alternately. Serial PCM signal (hereinafter, "intermediate digital signal DAT
"A") is a 2-channel digital / analog (D
/ A) is supplied to the connection terminal (6F) leading to the input terminal of the converter (18) and one input terminal of the format conversion circuit (15). Further, from the interpolator (13), an identification signal LRCK which becomes a high level "1" when the intermediate digital signal DATA is the data of the L channel and a low level "0" when the data of the R channel is the connection terminal (6E). Is supplied to the channel identification signal input terminal of the 2-channel D / A converter (18).

The subcode signal SUB written in the RAM (10) is supplied to the other input terminal of the format conversion circuit (15) via the subcode register (14), and in the format conversion circuit (15), the intermediate digital signal DATA is output. The sub code signal SUB is combined and converted into a serial digital audio signal DOUT of a standard standardized in the industry, and then supplied to the connection terminal (6G). The maximum frequency f of the digital audio signal DOUT is 5.64 MHz, and an example of the format of the digital audio signal DOUT and the like is shown in, for example, Japanese Patent Application No. 60-33976. Also,
Reference numeral (16) denotes an input / output circuit, and circuits from the 14-bit / 8-bit demodulation circuit (8) to the input / output circuit (16) constitute a digital signal generation circuit (17). Its input / output circuit (1
6) provides the servo information in the subcode information to the servo circuit (4) via the connection terminal (6B), and the control microcomputer (control CPU) (1) via the connection terminal (6C).
Provide subcode information to 9). Further, (20) is a display, (21) is a keyboard, the control CPU (19) sends a control signal to the input / output circuit (16) via the control terminal (6D), and the keyboard (21). When the mute key is operated in, the control CPU (19) supplies the mute signal MUTE to the mute terminal of the 2-channel D / A converter (18).

In the example of FIG. 2, a portion surrounded by the connection terminals (6A) to (6G) forms a digital signal processing circuit (7), and this circuit is a digital signal except the connection terminals (6A) to (6G). It is common with the generation circuit (17).

The L-channel analog audio signal Lch generated at one output terminal of the 2-channel D / A converter (18) is sent through one fixed contact and one movable contact of the switch (22) to the speaker (23) with a built-in L-channel amplifier. R channel analog audio signal Rch supplied to the other output terminal of the D / A converter (18) is supplied to the speaker via the fixed contact and the movable contact of the switch (24) with a built-in R channel amplifier. (25) is being supplied. The other fixed contact of each of the switches (22) and (24) is grounded.

Further, the digital audio signal DOUT generated at the connection terminal (6G) of the digital signal processing circuit (7) is passed through one fixed contact (the other fixed contact is grounded) and the movable contact of the switch (26). It is supplied to a 2-channel D / A converter (27) that can reproduce higher-quality analog audio signals. Further, the 2-channel D / A converter (18) and switches (22), (2
4) and (26) are mounted on the printed circuit board as individual parts, and the transmission lines through which the analog audio signal Rch and the digital audio signal DOUT flow are printed wiring.

[Problems to be solved by the invention]

However, when the digital signal processing circuit (7) as described above is used, the analog audio signal is converted from the digital audio signal DOUT having an extremely high frequency.
Due to unnecessary radiation to the Lch and Rch transmission lines or a kind of crosstalk (hereinafter referred to as “interference”), the analog audio signals Lch and Rch change as shown by S ₀ in FIG. There was an inconvenience.

Further, due to the interference of the analog audio signals Lch and Rch with the transmission line of the digital audio signal DOUT, the jitter of the signal DOUT increases as shown by S ₁ in FIG. 3B, and the 2-channel D / A converter ( There was a problem that the PLL (Phase Locked Loop) circuit in the input synchronization circuit of 27) became unstable and the sound quality deteriorated.

In order to avoid the above-mentioned inconvenience, the switch (22),
It is conceivable to operate (24) and (26) so that only one of the analog and digital audio signals is always output. However, for example switches (24)
Inter-wiring capacitance (28) formed from the printed circuit board wiring before the switch and the printed circuit board wiring before the switch (26)
The capacitance value C ₀ of C may reach C ₀ to several pF (1), and the inter-wiring capacitance (28) can be used to connect the analog and analog switches in front of these switches (22), (24), (26). Since the digital audio signal interferes, it is impossible to completely prevent the sound quality deterioration.

In view of the above problems, the present invention provides a digital signal processing circuit that outputs a first digital signal and a second digital signal that is subsequently converted into an analog signal, in order to prevent interference between the first digital signal and the analog signal. It is an object to propose a digital signal processing circuit that can be further suppressed.

[Means for solving the problem]

The digital signal processing circuit according to the present invention is, for example, the first
As shown in the figure, a digital signal generation circuit (17) that outputs a first digital signal DOUT and a second digital signal DATA, and a first digital signal output terminal (6G) that outputs the first digital signal DOUT. And a second digital signal output terminal (6F) connected to a D / A converter (18) for converting the second digital signal DATA into analog signals Lch and Rch (7) A first gate circuit (31) for suppressing the first digital signal DOUT between the digital signal generation circuit (17) and the first digital signal output terminal (6G), and the digital signal generation A second gate circuit (36) for suppressing the second digital signal DATA is provided between the circuit (17) and the second digital signal output terminal (6F), and the digital signal generation circuit (17). To low Kutomo first and second gate circuits (31) thereof and to (36) is obtained by an integrated circuit.

[Action]

According to such an aspect of the invention, the first digital signal DO
UT and analog signals Rch and Lch are the first in the integrated circuit
And the second gate circuits (31) and (36), respectively. Further, the capacitance value of the inter-wiring capacitance between the micro patterns inside the integrated circuit is about 1/100 or less of the inter-wiring capacitance of the printed circuit board. Therefore, the magnitude of the interference between the first digital signal DOUT and the analog signals Rch and Lch is about 1/100 or less of the conventional level.

〔Example〕

An embodiment of the digital signal processing circuit of the present invention will be described below with reference to FIG. In this embodiment, the present invention is applied to the digital signal processing circuit (7) in the compact disc reproducing apparatus shown in FIG. 2, and the portions corresponding to those shown in FIG. The detailed description thereof will be omitted.

In this example, the control CPU (25) receives two control signals DO in addition to the mute signal MUTE according to a command from the keyboard (27).
Generate MF and DIGI. The control CPU (25) sends the control signal DIGI to one input terminal of the AND gate (31) and the input terminal of the inverter (32) in the digital signal processing circuit (7) via the connection terminal (30C). Supply or control signal DOME via connection terminal (30B) or gate (3
3) Supply to one input terminal. Its inverter (3
The output terminal of 2) is connected to the other input terminal of the OR gate (33). Further, the control CPU (25) supplies the mute signal MUTE to the input terminal of the inverter (34) via the connection terminal (30A). The output terminal of the inverter (34) is connected to one input terminal of the AND gate (35), and the output terminal of the OR gate (33) is connected to the other input terminal of the AND gate (35). Connect the output terminal of 35) to one input terminal of the AND gate (36).

Further, the intermediate digital signal (serial PCM signal) DATA output from the interpolation circuit (13) in the digital signal generation circuit (17) is supplied to the other input terminal of the AND gate (36), and the AND gate Output signal of gate (36)
Supply DATA * to the input terminal of the 2-channel D / A converter (18). The 2-channel analog audio signals Rch and Lch, which are the outputs of the D / A converter (18), are supplied to the connection terminals (37A) and (37B) for external output, respectively. Further, the digital audio signal DOUT output from the format conversion circuit (15) in the digital signal generation circuit (17) is supplied to the other input terminal of the AND gate (31), and the output signal of this AND gate (31). Supply DOUT * to the connection terminal (37C) for external output via the connection terminal (6G).

In addition, in this example, the portion surrounded by the connection terminals (6A) to (6G) and the connection terminals (30A) to (30C), that is, the entire digital signal processing circuit (7) is integrated by a MOS process.
Integrated circuit as (Large Scale Integration).
However, the RAM (10) or the like may be an external component without being included in the integrated circuit. In short, the output circuit of the digital signal generating circuit (17) and the AND gates (31) and (36) may be integrated.

To explain the operation of this example, first, the digital audio signal DOUT from the AND gate (31) is unchanged as the signal DOUT *.
Is output as "digital ON", and the case where the intermediate digital signal DATA is output as it is as the signal DATA * from the AND gate (36) is called "analog ON". The case where the signal DOUT * is always at the low level "0" is called "digital OFF", and the case where the signal DATA * is always at the low level "0" is called "analog OFF". The states such as "digital ON" are determined as shown in Table 1 by the level of the mute signal MUTE and the control signals DOMF and DIGI.

From Table 1, mute signal MUTE, control signals DIGI and DOMF
It can be seen that each has the following contents.

Mute signal MUTE signal DATA * and eventually analog audio signals Lch and Rch are set to 0 level.

Control signal DIGI Controls whether to output digital audio signal DOUT as it is or to set it to low level “0”.

Control signal DOMF Switches between a mode in which digital audio signal DOUT and analog audio signals Lch and Rch are not output simultaneously as they are, and a mode in which they can be output simultaneously as they are.

From Table 1, the digital signal processing circuit of this example operates the keyboard (27) to mute signal MUTE and control signal.
By properly combining the levels of DIGI and DOMF, the analog audio signals Lch and Rch and the gated digital audio signal DOUT * will always be 0.
It can be set to be a level.

Furthermore, in this example, the analog audio signal Lc
When setting the h and Rch to 0 level, the output signal DATA * of the AND gate (36) is set to low level "0". When the gated digital audio signal DOUT * is set to low level "0", the output of the AND gate (31) is set to low level "0". Therefore, there is an advantage that signals do not interfere with each other via the inter-wiring capacitance (28) of which the capacitance value C ₀ formed between the wirings of the printed circuit board is several pF as in the conventional example.

However, in this example, AND gates (31) and (36)
In the previous stage, the digital audio signal DOUT and the intermediate digital signal DATA are in a live state. However, the part including the AND gates (31) and (36) in the digital signal processing circuit (7) of FIG. 1 is integrated into a part of the LSI. Generally, the capacitance value C ₁ of the inter-wiring capacitance formed between the micro patterns of an integrated circuit is C _{1 to} 0.01 pF (2). Therefore, the AND gates (31), (36)
The capacitance value C ₁ of the inter-wiring capacitance (38) between the micro patterns on the input side is the capacitance value C ₀ of the inter-wiring capacitance (28) of the printed circuit board.
This is about 1/100, the magnitude of the interference between the analog signal and the digital signal in this example is about 1/100 of the conventional level, and there is an advantage that the noise level due to the interference is improved by about 40 dB.

The present invention is not limited to the above-described embodiment, and can be modified within the scope of the present invention, for example, by applying it to a circuit that sends a video signal to the outside in the form of both a digital signal and an analog signal. Of course it is.

〔The invention's effect〕

As described above, the digital signal processing circuit of the present invention includes the first
A first gate circuit for suppressing the digital signal of
A second gate circuit that suppresses the second digital signal is provided in front of the digital / analog converter that converts the second digital signal into an analog signal.
Since the portion including the second gate circuit and the second gate circuit are integrated circuits, noise due to interference between the analog signal and the first digital signal is generated by the capacitance value of the inter-wiring capacitance of the micro pattern and the inter-wiring capacitance of the printed circuit board. There are benefits that can be improved depending on the ratio with the value.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a digital signal processing circuit of the present invention, FIG. 2 is a block diagram showing an example of a conventional compact digital reproducing apparatus, and FIG. 3 is a digital signal and an analog signal in the example of FIG. FIG. 6 is a diagram showing interference between the two. (6E), (6F) and (6G) are connection terminals, (7) is a digital signal processing circuit, (17) is a digital signal generating circuit, (18) is a 2-channel D / A converter, (31), (36)
Are AND gates.

Claims (1)

(57) [Claims] 1. A digital signal generation circuit for outputting first and second digital signals, a first digital signal output terminal for outputting the first digital signal, and the second circuit.
A digital signal processing terminal having a second digital signal output terminal connected to a digital / analog converter for converting the digital signal of the digital signal into an analog signal, the digital signal generating circuit and the first digital signal output terminal A first gate circuit for suppressing the first digital signal, and a second gate circuit for suppressing the second digital signal between the digital signal generating circuit and the second digital signal output terminal And
A digital signal processing circuit, characterized in that the digital signal generating circuit and at least the first and second gate circuits are integrated.