JP2667570B2 - Processor status display device of multi-computer system - Google Patents

Description

The present invention relates to a multi-computer system including a plurality of unit processors, and more particularly to a multi-computer system that displays an operation state of each unit processor. The present invention relates to a processor status display device.

(Prior Art) In general, in a multi-computer system including a plurality of unit processors, each unit processor is mounted on one unit printed circuit board (hereinafter abbreviated as a PC board), and each unit printed circuit board is abbreviated. To one main printed wiring board (main
A PC board is abbreviated, for example, using a signal connector.

By providing the unit PC board on which each unit processor is mounted in a detachable manner with respect to the main PC board in this manner, the unit processor to be used can be used according to the amount of information processing performed by the multi-computer system and the scale of the control target. The number can be changed or the inspection and collection of each unit processor can be simplified.

Therefore, in such a multi-computer system, it is very important for the operator to accurately grasp the operation state of each unit processor.

FIG. 4 is a block diagram showing a processor status display device of a multi-computer system composed of, for example, four unit processors. The state setting panel 1 indicates whether the unit PC boards of the unit processors 0 to 3 are mounted on the main PC board or if the unit processor is intentionally separated from the multi-computer system, the operator Are operated, four switches 2a, 2b, 2c, 2d are provided. Turning on the switches 2a to 2d indicates that the corresponding unit processor is connected, and opening the switches 2a to 2d indicates that the corresponding unit processor is disconnected from the system.

Each switch is turned on when each switch 2a ~ 2d is turned on.
2a, 2b, 2c, each inverter 3a from 2d, 3b, 3c, the mounted state signals a ₁ through _{3d, a 2, a 3,} a 4 are output to the AND gate 5a having a third input terminal, 5b, 5c , 5d. Online state signals b ₁ , b ₂ , b ₃ , and b ₄ are input to the other input terminals of the AND gates 5a to 5d from the corresponding unit processors. Also, each AND gate 5
Wait state signals c ₁ , c ₂ , c ₃ , and c ₄ are input from each unit processor to inverters 4 a, 4 b, 4 c, and 4 d connected to the other input terminals of a, 5 b, 5 c, and 5 d.

The online state signals b _{1 to} b ₄ indicate that each unit processor is online with respect to the main control unit via the main PC board, and the wait state signals c _{1 to} c ₄ are output from the main control unit. Indicates a command waiting state. In addition, the above-mentioned mounting state signals a _{1 to} a ₄ are set as to whether the signal lines between each unit processor and the main PC board are physically connected or cut off, and further intentionally set to the cut off state. Indicates whether or not

Each AND signal output from each AND gate 5a, 5b, 5c, 5d is input to the drive circuit 7a, 7b, 7c, 7d via the gate circuit 6a, 6b, 6c, 6d, respectively. In addition, a DC power supply Vcc is supplied to each of the drive circuits 7a, 7b, 7c, 7d, and each of the display lamps 10a, 10b arranged on the display panel 9 via protection resistors 8a, 8b, 8c, 8d. , 10c, and 10d.
The other end of each display lamp 10a, 10b, 10c, 10d is connected to the output terminal of each of the drive circuits 7a, 7b, 7c, 7d.

Therefore, when an AND signal of an H level is output from each of the AND gates 5a to 5d, the output terminal of each of the driving circuits 7a to 7d becomes an L level, and a current flows through each of the display lamps 10a to 10d.
Each of the display lamps 10a to 10d is turned on.

In the processor status display device of the multi-computer system having such a configuration, as shown in FIG.
The copy register of each unit processor is temporarily copied to the PSW copy register. Among them, the weight bit of each unit processor is extracted.

The operator monitors the state and determines which unit processor is to be disconnected from the multi-computer system and which unit processor is to be incorporated in the multi-computer system by operating the switches 2a to 2d of the state setting panel 1. I do.

Then, when the switches 2a to 2d are opened, the display lamps 10a to 10d indicating the operating states of the unit processors corresponding to the opened switches are turned off unconditionally.

Conversely, when the switches 2a to 2d are turned on, the unit processor corresponding to the turned on switch or the mounted unit PC board is mounted on the main PC board, and the corresponding unit processor is online, and Only when the unit processor is not in the wait state, the display lamps 10a to 10d corresponding to the unit processor are turned on. That is, the indicator lamp 10 indicating the unit processor that is currently processing normally
Only a to 10d light up.

However, the processor status display device of the multi-computer system shown in FIG. 4 still has the following problem.

That is, the operator sets the on / off state of each of the switches 2a to 2d of the state setting panel 1 while checking the actual mounting state of each unit PC board to the main PC board. Thus, a case may occur where the setting state of each of the switches 2 to 2d does not match the actual mounting state. in this case,
Even if a command is sent from the main control unit, there is a problem that a unit processor that is not actually mounted does not operate.

Further, every time the operator detaches the unit PC board from the main PC board, it is necessary to reset the switches 2a to 2d of the state setting panel 1, which is very troublesome.

Further, since it is necessary to attach the state setting panel 1 to the outside, there arises a problem in appearance and a problem of securing a mounting place.

(Problems to be Solved by the Invention) As described above, in the processor status display device of the conventional multi-computer system, the operator determines whether or not the unit PC board on which the unit processor is mounted is actually mounted on the main PC board. After confirmation, the switches 2a to 2d of the state setting panel 1 were turned on and off. Therefore, there are cases where the setting is erroneous and the burden on the operator increases.

The present invention has been made in view of such circumstances, and an active insertion / extraction connector is inserted between each unit PC board and the main PC board, and a mounting state signal generation circuit is provided on the unit PC board side of this connector. By mounting, the mounting state signal is automatically output when the unit PC board of each unit processor is mounted on the main PC board, without any operation by the operator,
It is an object of the present invention to provide a processor status display device of a multi-computer system capable of correctly displaying the operation status of each unit processor, improving operability and improving device reliability.

[Configuration of the Invention] (Means for Solving the Problems) In order to solve the above problems, the present invention provides a plurality of signal processors mounted on a main printed wiring board on which a plurality of unit processors are mounted. Unit printed wiring boards are detachably provided via dedicated signal connectors, respectively.
In addition, a multi-computer system that displays that each unit processor is online, and that the corresponding unit processor is not in the wait state and that the unit printed wiring board on which the corresponding unit processor is mounted is mounted on the main printed wiring board. In a processor status display device, a plurality of active insertion / removal connectors provided between a main printed wiring board and each unit printed wiring board, and connecting a power supply and a mounting state signal of a unit processor to each unit printed wiring board with a time difference. The main printed wiring board is provided between the terminals on the unit printed wiring board side of each of the active insertion / extraction connectors, and each unit printed wiring board is mounted on the main printed wiring board via the active insertion / extraction connector and the signal connector. A plurality of mounting state signal generating circuits for transmitting a mounting state signal to the wiring board; As with the inverted signal of the wait state signal sent from each unit processor via the connector, the on-line state signal sent from each unit processor via each signal connector and each mounting state signal via each hot-swap connector as well as the inverted signal of the wait state signal sent from each unit processor Multiple AND circuits that output a logical product signal with the mounting state signal sent from the circuit, and display the operating state of each unit processor according to the signal level of each logical product signal output from each logical product circuit And a plurality of indicators.

(Operation) In the processor status display device of the multi-computer system configured as described above, the unit PC board on which the unit processor is mounted and the main PC board are connected by the signal connector and the hot-swap connector. The signal connector passes various data and various state signals such as an online state and a wait state of the unit processor. On the other hand, the hot-swap connector
As is well known, a plurality of connection terminals including a power supply terminal and a signal terminal are provided. When connecting, a power supply terminal is connected first, and then a signal terminal is connected. Conversely, when disconnecting, the signal power terminal is disconnected first, and then the power terminal is disconnected. That is, the connection and disconnection of the signal terminals are always performed with the power turned on.

Therefore, when the unit PC board is mounted on the main PC board, a mounting state signal is transmitted from the mounting state signal generation circuit connected to each terminal of the active insertion / extraction connector on the unit PC board side to the main PC board side. Therefore, when the unit processor mounted on the mounted unit PC board is in the online state and the wait state is released and the processing is actually started, the display of the corresponding unit processor displays the operating state.

Conversely, when the unit PC board is separated from the main PC board, the mounting state signal is cut off, and the display of the operation state of the display of the corresponding unit processor is released.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is an external view showing a multi-computer system in which the processor status display device of the embodiment is incorporated. In the figure, reference numeral 21 denotes a main PC board connected to, for example, an input / output device (not shown) or a control target. On the main PC board 21, signal sockets 22a, 22b, 22c, 22d,.
23a, 23b, 23c, 23d,... 23n are attached. Further, power supply sockets 24a, 24b, 24c, 24d constituting one of the active insertion / removal connectors are mounted at intermediate positions of the signal sockets.

25a, 25b, 25c, and 25d are unit PC boards on which unit processors are respectively mounted. And the unit PC board
On one side of 25d, signal plugs 26d, 27d inserted into signal sockets 22d, 23d mounted on the main PC board 21 are mounted. Further, a power plug 28d inserted into a power socket 24d mounted on the main PC board 21 is mounted between the signal plugs 26d and 27d. Although not shown, the other unit PC boards 25a, 25b, and 25c also have the unit PC board 2 attached thereto.
Similarly to 5d, a signal plug and a power plug to be inserted into each signal socket and power socket mounted on the main PC board 21 are mounted.

FIG. 3 is a schematic diagram showing a schematic configuration of the power supply socket 24d of the main PC board 21 and the power supply plug 28d of the unit PC board 25d which constitute the active insertion / extraction connector. The contacts 29a, 29b, 29c, 29d are respectively inserted into the four holes formed in the power socket 24d.
Are mounted, and among the terminals 30a, 30b, 30d, 30d of the terminals 29a, 29b, 29c, 29d on the main PC board 21 side, the terminals 30a, 3d are provided.
0b is a power supply terminal, the terminal 30a is a ground terminal, and the terminal 39b is a (+) terminal. The terminal 30d is grounded by the ground pattern 31. And terminal 30c
Is a signal terminal for extracting a mounting state signal.

A power plug 28d facing the power socket 24d has four pins 32 corresponding to the contacts 29a, 29b, 29c and 29d.
a, 32b, 32c, and 33d are provided. Of the pins 32a and 32b to which power is supplied, the ground pin 32a is the longest, the (+) pin 32b is the next long, and the signal pins 32c and 32d are Shortest. The terminals 33a, 33b among the terminals 33a, 33b, 33c, 33d corresponding to the pins 32a, 32b, 32c, 33d on the unit PC board 25d side are power receiving terminals. A short-circuit pattern 34 is formed between the terminals 33c and 33d as a mounting state signal generation circuit.

In such active insertion / removal connectors, the power plug
When attaching 28d to the power socket 24d, first, the ground pin 32a of the power pins 32a and 32b is
a, and then the (+) side pin 32b contacts the contact 29b. Therefore, at this time, the unit processor mounted on the unit PC board 25d is in an operable state. next,
The signal pins 32c and 32d contact the contacts 29c and 29d. As a result, the signal terminal 30d of the main PC board 21 is at the ground potential.

The connectors for active insertion and removal provided between the other unit PC boards 25a, 25b, 25c and the main PC board 21 are also provided between the unit PC board 25d and the main PC board 21 shown in FIG. It has the same configuration as the respective active insertion / removal connectors.

FIG. 1 is a block diagram showing a schematic configuration of a processor status display device incorporated in the multi-computer system. The same parts as those in FIG. 4 are denoted by the same reference numerals. Therefore, the detailed description of the overlapping part will be omitted.

Each power socket 24 having the configuration shown in FIG.
The output signals of the signal terminals 30c of a to 24d are respectively inverted by the inverters 3a to 3d and the mounting state signal a ₁
And ~a ₄ is input to one input terminal of the AND gate 5a to 5d. Each unit PC mounted on the main PC board 21
Signal sockets 22a-2 from the unit processor of the boards 25a-25d
2d, each online status signals b ₁ ~b ₄ which is input to the main PC board 21 side via the 23a~23d is input to the other input terminals of the AND gates 5a to 5d. Further, the main PC board 21 is connected from each unit processor via each signal socket 22a to 22d and 23a to 23d.
Each wait state signal c ₁ to c ₄ inputted to the side the signal level is inputted to the end of the power terminals of the respective AND gates 5a~5d after being inverted by the inverter 4 a to 4 d. Therefore, the AND gates 5a~5d is a mounted state signal a ₁ ~a ₄ is H level, the online status signal b ₁ ~b ₄ is H level, and the wait signal c ₁ to c ₄ are at the L level condition To establish.

Each AND signal output from each AND gate 5a, 5b, 5c, 5d is input to the drive circuit 7a, 7b, 7c, 7d via the gate circuit 6a, 6b, 6c, 6d, respectively. In addition, a DC power supply Vcc is supplied to each of the drive circuits 7a, 7b, 7c, 7d, and each of the display lamps 10a, 10b arranged on the display panel 9 via protection resistors 8a, 8b, 8c, 8d. , 10c, and 10d.
The other end of each display lamp 10a, 10b, 10c, 10d is connected to the output terminal of each of the drive circuits 7a, 7b, 7c, 7d.

Therefore, when an AND signal of an H level is output from each of the AND gates 5a to 5d, the output terminal of each of the driving circuits 7a to 7d becomes an L level, and a current flows through each of the display lamps 10a to 10d.
Each of the display lamps 10a to 10d is turned on.

Next, the operation of the processor status display device of the multi-computer system configured as described above will be described.

First, the power of various electronic components mounted on the main PC board 21 is turned on. Then, for example, in this state, the main PC board 21
When the unit PC boards 25a to 25d are not mounted on the main PC board 21, the signal terminals 30c on the main PC board 21 side of the active insertion / removal connector are open, and the AND gates 5a to 5d are connected via the inverters 3a to 3d. It mounted state signal a ₁ ~a ₄ inputted to is at the L level state. Therefore, since each of the AND gates 5a to 5d is not established, each display lamp and 10a to 10d remain turned off.

Next, for example, when one unit PC board 25d is mounted on the main PC board 21, the signal terminal 30c on the main PC board 21 side of the connector for active insertion / removal is grounded and becomes L level. Therefore, the mounted state signal a ₄ input AND gate 5d via the inverter 3d is changed to H level. Unit PC board 25d is the main PC board
When mounted on the unit 21, power is supplied from the main PC board 21 to the unit PC board 25d, and the unit processor mounted on the unit PC board 25d becomes operable. When the unit processor enters the online state with respect to the main PC board 21 or the main controller connected via the main PC board 21, the H level online state is transmitted from the unit processor via the signal sockets 22d and 23d. signal b ₄ is sent out to the main PC board 21 side. At the same time relevant unit processor to enter the wait state, and outputs the wait state signal c ₄ of H level. Since this wait state signal c ₄ is the signal level at the inverter 4d is inverted, the AND gate 5d is not established.
Therefore, in this state, the display lamp 10d of the corresponding unit processor does not light up yet.

When starting the relevant unit processor is actually processing operation at an instruction from the main controller, the wait state is canceled, the wait state signal c ₄ is changed to the L level. Therefore, the signal level is inverted by the inverter 4d to become H level, and the AND gate 5d is established. As a result, an AND signal of H level is output from the AND gate 5d, and the display lamp 10d of the corresponding unit processor is turned on.

Each indicator lamp 10a-1 of the corresponding unit processor corresponding to the mounting operation of the other unit PC boards 25a-25c to the main PC board 21
The display operation of 0c is the same as the display operation of the display lamp 10d corresponding to the unit PC board 25d described above.

When removing each unit PC board 25a to 25d from the main PC board 21, confirm that the indicator lamp corresponding to the terminal PC board to be removed is off, and then remove the corresponding unit PC board. Just take it.

With such a processor status display device, each unit PC board 25a to 25d on which each unit processor is mounted is simply attached to and detached from the main PC board 21, and an attachment state signal is automatically output to the main PC board 21 side. Or automatically shut off. Therefore, there is no need for the operator to set the state using a switch or the like while checking the mounting state as in the case of the conventional apparatus, in addition to the normal attaching / detaching operation. Therefore, the burden on the operator can be reduced, and the operation control of the entire multi-computer system can be greatly improved.

In addition, since the attachment / detachment state is automatically detected, the display lamps 10a to 10d do not turn on or off apologizingly due to an erroneous determination by the operator. Therefore, the reliability of the processor status display device can be improved.

Furthermore, since an active insertion / extraction connector for transmitting and receiving power and signals with a time difference is provided between each of the unit PC boards 25a to 25d and the main PC board 21, while the main PC board 21 is powered on, Each of the unit PC boards 25a to 25d can be attached and detached. That is, it is not necessary to shut off the power supply of the main PC board 21 each time the unit PC boards 25a to 25d are attached to and detached from the main PC board 21. Therefore, continuity of processing of the entire multi-computer system can be ensured.

[Effect of the Invention] As described above, according to the processor status display device of the multi-computer system of the present invention, each unit PC board and main PC
An active insertion / extraction connector is interposed between the board and the board, and a simple mounting state signal generation circuit such as a short circuit pattern is attached between terminals of the connector on the unit PC board side. Therefore, when the unit PC board on which each unit processor is mounted is mounted on the main PC board, a mounting state signal is automatically output, and the operation state of each unit processor can be correctly displayed without any operation by an operator, The operability and the reliability of the device can be greatly improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a processor status display device of a multi-computer system according to one embodiment of the present invention, FIG. 2 is an external view showing the entire system of the device of the embodiment, and FIG. FIG. 4 is a schematic cross-sectional view showing a configuration of a connector for active insertion and removal of an apparatus, FIG. 4 is a block diagram showing a schematic configuration of a processor status display device of a conventional multi-computer system, and FIG. 5 shows a copy register of a general unit processor. FIG. 5a, 5b, 5c, 5d… AND gate, 10a, 10b, 10c, 10d… Indicator lamp, 21… Main PC board, 22a, 22b, 22c, 22d, 23a, 23b,
23c, 23d …… Signal socket, 24a, 24b, 24c, 24d …… Power socket, 25a, 25b, 25c, 25d …… Unit PC board, 26d, 27d ……
Signal plug, 28d: Power plug, 31: Ground pattern, 34: Short circuit pattern.

Claims (1)

(57) [Claims] 1. A plurality of unit printed wiring boards each having a unit processor mounted thereon are detachably provided via a dedicated signal connector to a main printed wiring board to which a plurality of signal connectors are attached, and A multi-computer system for displaying that each of the unit processors is online, and that the corresponding unit processor is not in the wait state and that the unit printed circuit board on which the corresponding unit processor is mounted is mounted on the main printed circuit board. In the processor status display device, a plurality of active insertion / removal units are provided between the main printed wiring board and each unit printed wiring board, and connect a power supply and a unit processor mounting state signal to each unit printed wiring board with a time difference. A connector provided between each terminal on the unit mark wiring board side of each of the active insertion / removal connectors; A plurality of mounting state signal generating circuits for transmitting the mounting state signal to the main printed wiring board in a state where the printed wiring board is mounted on the main printed wiring board via the active insertion / extraction connector and the signal connector; Provided on the main printed wiring board side, an online state signal sent from each unit processor through each signal connector as well as an inverted signal of a wait state signal sent from each unit processor through each signal connector, and A plurality of AND circuits that output a logical product signal of the mounting state signal transmitted from each of the mounting state signal generating circuits through the respective active insertion / removal connectors; and a logical product output from each of the logical product circuits A processor for a multi-computer system comprising: a plurality of indicators for displaying an operation state of each of the unit processors according to a signal level of a signal. State display device.