JP2652991B2 - DC feedback amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC feedback amplifier, and more particularly to a DC feedback amplifier having improved frequency characteristics and S / N ratio.

[0002]

2. Description of the Related Art FIG. 2 is a circuit diagram showing an example of a conventional DC feedback amplifier. As shown in FIG. 2, this DC feedback amplifier has a common-emitter amplifier 2 including a bipolar transistor (hereinafter simply referred to as a transistor) Q ₁ having an output terminal 1 as an output, a resistor ₁ , a load resistor R ₂ , and an output terminal 1.
And a comparator 4 having a reference voltage terminal 3 as an input, a capacitor C for charging, and transistors Q ₂ and Q
_{Consists of three} .

The operation of the DC feedback amplifier will be described below.

In this conventional DC feedback amplifier, a difference voltage between the potential of the reference voltage terminal 3 and the potential of the output terminal 1 is applied to the input of the comparator 4. The comparator 4 is turned on / off by a control signal input from a control terminal 5, and the output is output in a current output format.

When the comparator 4 is on, the capacitor C is charged or discharged in accordance with the difference voltage input to the comparator 4. Here, a predetermined pulse is input to the control terminal 5, and the comparator 4 is turned on or off depending on whether the pulse is at a high level or a low level.

[0006] When the comparator 4 is off, the charge of the capacitor C will be discharged by the base current of the transistor Q _2, the transistors Q ₂ and Q ₃ is a Darlington configuration, the transistor Q ₂ The base current is very small, and the potential of the capacitor C is held.

When the comparator 4 is turned on by a control pulse to the control terminal 5, the output from the comparator 4 is applied to the capacitor C according to the potential difference between the output terminal 1 and the reference voltage terminal 3. the charging current or discharging current flows, the base potential of the transistor Q ₂ is changed.

Since the comparator 4 and the transistors Q ₂ and Q ₃ form a DC negative feedback circuit, the potential of the output terminal 1 is limited as the number of input pulses to the control terminal 5 increases. And approach the potential of the reference voltage terminal 3.

[0009]

In the conventional DC feedback amplifier, DC feedback is formed as described above, but there are two major drawbacks. The description is given below.

[0010] A first drawback is that the frequency characteristic of the emitter-grounded amplifier 2 by the parasitic capacitance attached between the collector and ground of transistor Q ₃ to the output terminal 1 is deteriorated.

The parasitic capacitance may be 3 to 4 p
The value of F becomes a value of -3 dB cutoff frequency of the voltage gain of the common-emitter amplifier 2 in combination with the load resistance R2 of ₃ to 5 MHz.
It may be about z.

A second disadvantage is that transistors Q ₂ and Q _2
3 constitutes a high-gain common emitter amplifier equivalently, the noise component generated by the comparator 4 and the transistors Q ₂ and Q ₃ is amplified and appears at the output terminal 1. As a result, the S / N ratio is degraded.

The deterioration of the frequency characteristics and the S / N ratio described above is a serious problem when the DC feedback amplifier is used, for example, in an image signal processing unit, because the image quality deteriorates.

An object of the present invention is to significantly improve the above two disadvantages of the conventional DC feedback amplifier.

[0015]

A DC feedback amplifier according to the present invention comprises an amplifier comprising a first bipolar transistor which receives an input signal between a base and an emitter and has a collector as an output terminal, and an operation state from an external source. The comparator is controlled by a control signal, a non-inverting input terminal receives an external reference potential, and an inverting input terminal receives an output of the amplifier and compares the output of the amplifier with the reference potential. A second bipolar transistor having a collector connected to the ground and a collector connected to a power supply terminal; an output of the comparator connected to the other end of the capacitor and a base of the second bipolar transistor;
An emitter of the second bipolar transistor is connected to a collector of the first bipolar transistor via a resistor.

[0016]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of one embodiment of the present invention.

The present embodiment differs from the conventional DC feedback amplifier shown in FIG. 2 in the portion of the Darlington transistor connected to the output terminal of the comparator 4. In this embodiment, the Darlington transistor, the output of the comparator 4 to the base is inputted, is connected the collector to the power supply terminal 6, the emitter grounded amplifier 2 emitter via a resistor R ₂
Is connected to the collector of the bipolar transistor Q ₁ that make up the.

[0018] Also, the Darlington transistor described above, parallel and transistor Q ₄ is connected, the reference voltage is externally applied to the base of the transistor.

The comparator 4, the capacitor C, and the transistors Q ₂ and Q ₃ constitute a DC feedback section in this embodiment.

In this embodiment, the difference between the reference potential applied to the reference voltage terminal 3 and the potential of the output terminal 1 is input to the input terminal of the comparator 4.

The output of the comparator 4 is of a current output type, as in a conventional DC feedback amplifier, and the comparator 4 is turned on / off by a control signal applied to a control terminal 5. Is done.

Now, for example, when the comparator 4 is in the off state according to the control signal of the control terminal 5, the capacitor C
The charges will be discharged by the base current of the transistor Q _2.

However, in this embodiment, the transistor Q ₂
Since Q and Q ₃ have a Darlington transistor configuration, the base current of transistor Q ₂ is extremely small, and the potential of capacitor C (the potential at node 7) is held.

Next, when the comparator 4 is turned on by a control input to the control terminal 5, the capacitor C
The input voltage of the comparator 4, i.e. according to the potential difference between the potential of the reference voltage terminal 3 and the output terminal 1, the charging current or discharging current flows from the comparator 4, the base potential of the transistor Q ₂ is changed.

The base potential of the transistor Q ₂ are Darlington transistors Q ₂ and Q ₃ and resistor R ₂
To the output terminal 1 to form a DC negative feedback circuit.

Here, when an input voltage having a pulse waveform is applied as a control signal of the control terminal 5, the potential of the output terminal 1 is infinitely close to the reference potential of the reference voltage terminal 3 while the capacitor C repeatedly charges and discharges. And the DC feedback in this embodiment is realized.

[0027] As described above, the conventional DC feedback amplifier and this embodiment is different from the point largely shown in Figure 2, in the conventional DC feedback amplifier, the transistor Q ₃ acts as an emitter grounded amplifier of high gain, whereas the collector was connected to the output terminal 1, in this embodiment, the transistor Q ₃ are connected to the output terminal 1 emitter via a load resistor R _2, simply in that it operates as an emitter follower is there.

Therefore, in this embodiment, since the parasitic capacitance which has been a problem in the past is not attached to the output terminal 1, it is possible to prevent the -3 dB cutoff frequency of the amplifier from being lowered.

The transistors Q ₂ and Q ₃ form an emitter follower, and the node 7 (the output terminal of the comparator 4)
Since the voltage gain from the output terminal 1 to the output terminal 1 is also 1 or less, the comparator 4 and the transistors Q ₂ and Q ₃
Is present, the noise component is not amplified and transmitted to the output terminal 1, and the S / N ratio of the common emitter amplifier 2 is greatly improved.

In the present embodiment, the transistors Q ₂ and Q ₃ are replaced with the transistors Q ₂ and Q ₃ .
₄ is connected. The transistor Q ₄ has a collector connected to the power supply terminal 6 and an emitter connected to the transistor Q _3.
And a base is supplied with a reference potential.

[0031] The transistor Q ₄ are, such as during power up, at the stage when the potential of the node 7 (one end of the capacitor C) is gradually increased by the negative feedback loop, turned period saturated with the transistor Q ₁ In some cases, this is added to prevent the phenomenon that the time required to reach the steady-state bias potential becomes extremely long.

[0032] Accordingly, the base potential of the transistor Q ₄ are, is set slightly lower level than the steady-state bias voltage of the base potential of the transistor Q _3. With this setting the base potential, the transistor Q ₄ are, since the cut-off state when the potential of the node 7 reaches the steady state, does not reduce the effect of this embodiment.

In this embodiment, the transistors Q ₂ and Q ₃ constitute a Darlington transistor.
Assuming reducing the base current of the transistor Q _2, it may be omitted transistor Q _3.

Further, although the amplifier 2 in this embodiment is of the common emitter type, the same effect as in this embodiment can be obtained by using a common-base amplifier.

[0035]

As described above, the DC feedback amplifier according to the present invention comprises a comparator having the output of the amplifier and the reference voltage as inputs, and a transistor having a capacitor C and a base connected to the output of the comparator. And a DC feedback section consisting of This transistor operates as an emitter follower.

Therefore, according to the present invention, the parasitic capacitance, which has conventionally been a problem, is not attached to the output terminal, so that the -3 dB cutoff frequency of the amplifier can be prevented from lowering.

Further, since the voltage gain from the output terminal of the comparator 4 to the output terminal becomes 1 or less, even if there is a noise component generated in the comparator 4 and the Darlington transistor, the noise component is amplified and output. And the S / N ratio can be greatly improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional DC feedback amplifier.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Output terminal 2 Common emitter amplifier 3 Reference voltage terminal 4 Comparator 5 Control terminal 6 Power supply terminal 7 Node

Claims (2)

(57) [Claims] An input signal is input between a base and an emitter, an amplifier including a first bipolar transistor having a collector as an output terminal, and an operation state controlled by an external control signal. A comparator to which a reference potential is input from the outside and an output of the amplifier is input to an inverting input terminal and compares the output of the amplifier with the reference potential; a capacitor having one end connected to ground; And a second bipolar transistor connected to the other end of the second bipolar transistor. The output of the comparator is connected to the other end of the capacitor and the base of the second bipolar transistor, and the emitter of the second bipolar transistor has a resistance. A DC feedback amplifier connected to a collector of the first bi-parallel transistor. 2. The DC feedback amplifier according to claim 1, wherein a collector is connected to said power supply terminal and a second base is connected to said base.
And a third bipolar transistor to which a reference potential is applied, wherein the emitter of the bipolar transistor and the emitter of the second bipolar transistor are commonly connected.