JP2647525B2 - Pulse generation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

The present invention relates to a pulse generation circuit used for a pulse laser, for example.

[Prior art]

FIG. 6 shows, for example, COPPER VAPOR LASERS COME OF A
GE) Laser Focus July 1982 (LASER FOCUS, J
ULY, 1982), which shows a conventional pulse generator for a copper vapor laser.
Is a charging reactor, 3 is a charging diode, 4 is a main capacitor for charging and discharging, 5 is a charging resistor, 6 is a thyratron switch, and 7 is a gas discharge for heating and vaporizing a metal (eg, copper) housed therein. This is a discharge tube (laser TUBE) that obtains a laser output. Next, the operation will be described. The high voltage (several KV to several tens of KV) generated from the high voltage power supply 1 is supplied to the charging reactor 2,
The main capacitor 4 is charged via the charging diode 3 and the charging resistor 5. In this charging state, when the thyratron switch 6 is turned on, the electric charge stored in the main capacitor 4 is applied to the discharge tube 7 through the thyratron switch 6 and forms a gas discharge in the discharge tube 7. At this time, since the impedance of the discharge tube 7 is significantly smaller than the resistance value of the charging resistor 5, the current flowing through the thyratron switch 6 mainly flows through the discharge tube 7, so that the discharge tube 7 is excited to cause laser oscillation. . However, as described above, such a pulse generation circuit applies a steeper pulse voltage to the discharge tube 7 and obtains a higher laser output. The switch 6 is required, while the thyratron switch 6 has a short life because it is a vacuum tube and needs to be replaced frequently. In addition, thyratron switch 6
However, there is a problem in the stability of quality, for example, there are variations in the fall of the current and the switching time which affect the laser efficiency. On the other hand, the present applicant has proposed a pulse generating circuit as shown in FIG. 7 using a solid state switching element in order to cope with such a problem of the thyratron switch. To explain this, reference numeral 8 denotes a pulse generating switch, which is a switch in which a plurality of FETs as solid-state switch elements are connected in parallel and further connected in series in multiple stages (hereinafter, referred to as a series-parallel circuit). According to this, switching of voltage and current of several KV to several tens KV and several hundred A to several KA as a whole becomes possible, and it is possible to generate sufficient pulse energy to excite the discharge tube 7 which is a laser tube. it can.

[Problems to be solved by the invention]

Since the conventional pulse generation circuit is configured as described above, stability and reliability can be improved.However, if the on-timing of each series stage is shifted, an overvoltage is applied to a specific series stage. There is a problem that the FET in the series stage may be destroyed or its life may be shortened. The present invention has been made in order to solve the above-described problems, and an object of the present invention is to provide a pulse generation circuit that can suppress a rise in a voltage applied to a series stage even when the ON timing of the series stage is shifted. Aim.

[Means for Solving the Problems]

The pulse generation circuit according to the invention described in claim 1 is a high-speed switching element that acts as a main capacitor charged by a current supplied from a high-voltage power supply and a switch element that supplies a voltage applied to the main capacitor to a load. And a series-parallel circuit in which the series-parallel circuits are arranged in series, in each series stage of the series-parallel circuit, a diode having an anode connected to the positive electrode of the high-speed switching element of the series stage, A parallel circuit of a resistor and a capacitor connected between the element and the negative electrode is provided. The pulse generation circuit according to the invention of claim (2) is provided with a voltage detection circuit for detecting a voltage between both ends of a parallel circuit of a resistor and a capacitor, in addition to the above configuration.

[Action]

The parallel circuit of the resistor and the capacitor according to the invention described in claim 1 utilizes the fact that the charging voltage of the capacitor cannot increase rapidly even if the voltage applied to both ends of the high-speed switching element increases. Suppress sharp rise in voltage applied to Further, the voltage detection circuit according to the invention described in claim 2 detects a voltage rise at both ends of the capacitor due to the continuation of the ON delay of the series stage when the series-parallel circuit is repeatedly turned on / off, and It is determined that the voltage rise in the series stage cannot be prevented by the above, and the fact is outputted to the outside.

【Example】

An embodiment of the present invention will be described below with reference to the drawings. Here, a case where an FET is used as a high-speed switching element will be described. FIG. 1 shows an FET parallel circuit 10 constituting each series stage of the series-parallel circuit 8 shown in FIG. 7, a diode 12 having an anode connected to the drain of the FET 11, a cathode of the diode 12, and a source of the FET 11. Capacitor 1 connected between
3 shows a parallel circuit of 3 and a resistor 14. The diode 12, the capacitor 13 and the resistor 14
It is also provided in each of the other series stages not shown. Next, the operation will be described. When the main capacitor 4 shown in FIG. 7 is being charged, all the FETs 11 are off. Therefore, the Voff voltage shown in FIG. 2 is applied to each FET parallel circuit 10 when the charging of the main capacitor 4 is completed. Then, the FETs 11 are simultaneously turned on. However, the ON timings of the FETs 11 may not be strictly simultaneous due to variations in elements. When the diode 12 and the like are not added, for example, as shown in FIG.
It was turned on at time t _0, FET 11 of a FET parallel circuit 10 and that turn on delay. Then, the voltage of the main capacitor 4 is applied only to the FET parallel circuit 10, and the FET
The voltage applied to the parallel circuit 10 increases (FIG. 2 (B)).
Then, the voltage continues to increase until the FET ₁₁ of the FET parallel circuit 10 is turned on at time t1. Here, when the diode 12, the capacitor 13, and the resistor 14 are added, when the FET 11 is in the off state, the capacitor 13
Is Voff (the voltage drop of the diode 12 is ignored). Then, although at time t ₀ Vn attempts increases, the capacitor 13 starts to charge through the diode 12, the voltage across the capacitor 13 increases as the amount of charge flowing. Therefore, the voltage across the capacitor 13 gradually increases. Then, the voltage applied to FET11 is equal to the voltage across the capacitor 13, at time t ₁ until FET11 is turned on, also gradually increases (FIG. 3 (B)).
Therefore, even if the on-timing of the FET 11 is delayed, the voltage between the drain and the source does not rise sharply,
Is protected. FIG. 4 is a diagram showing a part of a pulse generating circuit according to another embodiment of the present invention. In this case, in addition to the configuration shown in FIG. 1, resistors 15 and 16 connected in series and provided in parallel with the capacitor 13 are connected between the resistors 15 and 16 and the reference voltage (Vref). A voltage detection circuit including a comparator 17 and a flip-flop 18 for latching an output of the comparator 17 is provided. Next, the operation will be described. The serial / parallel circuit 8 shown in FIG. 7 is used repeatedly on / off. If a series-stage delay occurs continuously in a certain series stage during the repetition cycle, the series-parallel circuit 8 may be turned off by the capacitor 13 and the resistor 14. Depending on the constant, the protection of the FET 11 may be hindered. That is, as shown in FIG.
Due to the continuous delay of the on-timing (Fig. 5 (A)
Indicates three consecutive times. It is assumed that the voltage rise Vτ immediately before the ON timing occurs continuously. At each timing, the voltage rise is protected so as not to be sudden, but before the discharge of the capacitor 13 is completed, FE
When a voltage rise occurs immediately before the next ON timing of T11,
The voltage across capacitor 13 may rise above Voff + Vτ. When this operation is continuously repeated, the voltage of the capacitor 13 gradually increases from Voff + Vτ, and as a result, the voltage between the drain and the source of the FET 11 increases, and the effect of protecting the FET 11 is weakened. . Therefore, the resistors 15 and 16 are provided in parallel with the capacitor 13, and the voltage between both ends of the capacitor 13 is equivalently detected by detecting the voltage between the resistors 15 and 16. That is, a value corresponding to the dangerous voltage Vs due to the increase in the voltage across the capacitor 13 is defined as Vref, and when the voltage between the resistors 15 and 16 exceeds this Vref, the comparator 17 outputs a signal. Then, this signal is latched by the flip-flop 18. By using this latch signal, the high-voltage power supply shown in FIG. 7 is cut off 1 or an error is displayed to the operator, thereby protecting the entire device in which the series-parallel circuit 8 is incorporated. it can.

【The invention's effect】

As described above, according to the present invention, the pulse generation circuit
A configuration in which a parallel circuit of a diode, a resistor, and a capacitor is added between the poles of the high-speed switching elements in each series stage that constitutes a series-parallel circuit enables high-speed switching even if the on-timing of the high-speed switching elements in the series stage is delayed There is an effect that a high voltage is not applied to the elements and an element capable of effectively protecting each high-speed switching element can be obtained. Furthermore, since the voltage at both ends of the parallel circuit is detected, even if the high-speed switching element cannot be protected by the diode and the parallel circuit, this is detected and the entire device including the pulse generation circuit is protected. There is an effect that what can be obtained is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a FE of a pulse generating circuit according to an embodiment of the present invention.
FIG. 2 is a circuit diagram showing a T parallel circuit, FIG. 2 is a waveform diagram showing a voltage waveform of an FET parallel circuit before adding a diode, etc., FIG. 3 is a waveform diagram showing a voltage waveform of an FET parallel circuit having a diode, etc. FIG. 4 is a circuit diagram showing an FET parallel circuit of a pulse generation circuit according to another embodiment of the present invention, FIG. 5 is a waveform diagram showing a voltage waveform of the one shown in FIG. 4, and FIG. 6 uses a thyratron. FIG. 7 is a circuit diagram showing a copper vapor laser system using a pulse generation circuit based on an FET series-parallel circuit. 4 is a main capacitor, 8 is a switch element (series-parallel circuit),
10 is a FET parallel circuit, 11 is a FET, 12 is a diode, 13 is a capacitor, 14 is a resistor, 15, 16 are resistors (voltage detection circuit), 17
Is a comparator (voltage detection circuit), and 18 is a flip-flop (voltage detection circuit). In the drawings, the same reference numerals indicate the same or corresponding parts.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Shigeo Shigeguri 8-1-1, Tsukaguchi Honcho, Amagasaki City, Hyogo Prefecture Inside the Central Research Laboratory of Mitsubishi Electric Corporation (72) Inventor, Toshihiro Ueda 8-1-1 Tsukaguchi Honcho, Amagasaki City, Hyogo Prefecture No. 1 Mitsubishi Electric Corporation Central Research Laboratory (72) Inventor Shinji Murata 8-1-1 Tsukaguchi Honcho, Amagasaki City, Hyogo Prefecture Mitsubishi Electric Corporation Production Technology Research Laboratory (72) Inventor Takashi Kumagai Tsukaguchi Honmachi Amagasaki City, Hyogo Prefecture 8-1-1, Mitsubishi Electric Corporation Production Technology Laboratory

Claims (2)

(57) [Claims] 1. A main capacitor charged by a current supplied from a high-voltage power supply, and a switch element for supplying a voltage applied to the main capacitor to a load, wherein the series capacitor includes a high-speed switching element arranged in series and parallel. In a pulse generation circuit that generates a pulse by simultaneously conducting the high-speed switching elements, in each series stage of the series-parallel circuit, in order to suppress the occurrence of overvoltage due to a shift in the high-speed switching element conduction time, A pulse comprising: a diode having an anode connected to the positive electrode side of the high-speed switching element; and a parallel circuit of a resistor and a capacitor connected between a cathode of the diode and a negative electrode of the high-speed switching element. Generator circuit. 2. The pulse generating circuit according to claim 1, wherein a voltage detecting circuit for detecting a voltage between both ends of the parallel circuit is further provided in the parallel circuit of the resistor and the capacitor.