JP2647191B2 - Channel separation device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to a channel separation device used for demodulation when performing frequency division multiplex communication.

(Prior Art) In frequency multiplex communication, the amount of information that can be transmitted on one channel is limited due to band limitation or the like. However, in recent years, opportunities to transmit information exceeding the bandwidth of one channel have increased. If it is necessary to transmit data larger than the capacity of one channel, a system is used in which a plurality of channels are mixed and received, and each channel is used separately. Currently, various systems have been proposed. I have. FIG. 4 shows an example of a device for converting a plurality of transmitted channels into baseband signals of the respective channels and separating the channels, using two channels as an example. First, received signals transmitted on two channels whose center frequencies are f ₁ and f ₂ are input to two multipliers 30 and 33. While the multiplier 30 performs frequency conversion by the local oscillator 31 and converts it into a baseband band,
The multiplier 33 converts the signal of the local oscillator 31 into π through the phase shifter 32.
/ 2 phase-shifted and frequency-converted using this signal. That is, the outputs of the multipliers 30 and 33 are shifted by π / 2 from each other. Outputs of the multipliers 30 and 33 are input to low-pass filters 34 and 35, respectively, and only low-frequency components are output. The output low frequency components are converted to AD converters 36 and 37.
, And the analog value is converted to a digital value. The two outputs of the AD converters 36 and 37 are input to both a channel 1 processing unit and a channel 2 processing unit for processing two channels respectively. The channel 1 processing unit and the channel 2 processing unit perform the same processing, respectively,
And the signal of channel 2 are separated and demodulated. First, the channel 1 processing unit will be described. It is assumed that the center frequency of each channel is also known in advance on the side that demodulates the received signal. Using this center frequency, the reference value input to the integrator 46 Seeking. The signal of the AD converter 36 is input to the multipliers 38 and 39. On the other hand, the signal of the AD converter 37 is input to the multipliers 40 and 41.

Is input to the integrator 46, , The same value is cumulatively added every time the reference value is output, and the accumulated value is output next. The output of the integrator 46 is input to the ROM 42 storing the sin waveform and the ROM 43 storing the cos waveform, and the ROM 42 and the ROM 43 output sample values of the sin waveform and the cos waveform, respectively.

Next, the sample values are input to multipliers 38, 39, 40, 41. Thus, the multipliers 38, 39, 40, and 41 perform multiplication, and the outputs of the multipliers 39 and 40 are input to the adder 44 and added. The outputs of the multipliers 38 and 41 are input to a subtractor 45 and subtracted. From the output of the adder 44, a low-frequency component is output through a low-pass filter 47, and an output 1 that is an orthogonal component is obtained. As for the output of the subtracter 45, a low-frequency component is output through a low-pass filter 48, and an output 2 which is an in-phase component is obtained. Code values of components similar to these orthogonal components are obtained as demodulated signals. Similarly, the operation of the channel 2 processing unit will be described. The output of the AD converter 36 is a multiplier 49,5
Entered as 0. On the other hand, the output of the AD converter 37 is
Is input to And Is output each time the integrator 57 performs cumulative addition, and this output value is input to the ROM 55 storing the sin waveform and the ROM 56 storing the cos waveform. The sample signals of ROM 55 and ROM 56 are input to multipliers 50 and 52 and multipliers 49 and 51, respectively. The signals multiplied by the multipliers 50 and 51 are added by the adder 53, and the low-pass filter 58 outputs only low frequency components. The output value of output 3 represents the orthogonal component. The signals multiplied by the multipliers 49 and 52 are subtracted by the subtractor 54, and the low-pass filter 59 outputs only low-frequency components. The output value of the output 4 indicates the in-phase component.
The code values of these quadrature components and in-phase components are obtained as demodulated signals.

(Problems to be Solved by the Invention) As described above, in order to separate and demodulate each channel, a ROM, an integrator, and a quadrature demodulator which are commonly required for each channel processing unit are required. Must be provided in duplicate. The device or the like becomes large only in the overlapping portion. In addition, since most of the processing time required for demodulation is consumed in the arithmetic processing of the multiplier, it takes time and effort to calculate each channel.

The present invention has been made in view of these points,
For the processing part commonly used for each channel,
It is an object of the present invention to provide a channel separation device that can be downsized by being commonly used.

[Configuration of the invention]

(Means for Solving the Problems) In order to achieve the above object, according to the present invention, received signals transmitted on first and second channels having different center frequencies are divided into in-phase components and quadrature components, respectively. And a quadrature demodulator for outputting the demodulated in-phase and quadrature components, and a reference value obtained from the center frequency of each of the first and second channels, and A reference signal generator to be generated; a first multiplier for multiplying the in-phase component of the reference signal by the demodulated in-phase component; a second multiplier for multiplying the in-phase component of the reference signal by the demodulated quadrature component; A third multiplier for multiplying the quadrature component of the reference signal by the demodulated in-phase component, a fourth multiplier for multiplying the quadrature component of the reference signal by the demodulated quadrature component, and an output of the first multiplier A first adder for adding the output of the fourth multiplier to the output of the second multiplier, a second adder for adding the output of the third multiplier to the output of the second multiplier, and an output of the second multiplier. A first subtractor for subtracting the output of the third multiplier from the output of the third multiplier, and a second subtractor for subtracting the output of the fourth multiplier from the output of the first multiplier. And the signal obtained from the output of the first subtractor are the signals transmitted on the first channel, and the signal obtained from the output of the second adder and the output of the second subtractor is the second signal. , And a signal transmitted through the channel.

(Operation) The quadrature demodulation unit demodulates the received signals transmitted on the first and second channels having different center frequencies by dividing them into in-phase components and quadrature components. The reference signal generator generates an in-phase component and a quadrature component of the reference signal using a reference value obtained from the center frequency of each of the first and second channels. The generated in-phase component of the reference signal includes a first multiplier and a second multiplier for multiplying the demodulated in-phase component and the quadrature component, respectively. Further, a third multiplier and a fourth multiplier are provided for multiplying the quadrature component of the reference signal by the demodulated in-phase component and the demodulated quadrature component, respectively. The first adder is for adding the output of the fourth multiplier to the output of the first multiplier. The second adder is for adding the output of the third multiplier to the output of the second multiplier. The first subtractor subtracts the output of the third multiplier from the output of the second multiplier. The second subtractor subtracts the output of the fourth multiplier from the output of the first multiplier. Therefore, the signal transmitted on the first channel is obtained from the output of the first adder and the output of the first subtractor. The signal transmitted on the second channel is obtained from the output of the second adder and the output of the second subtractor.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

The following is a description based on the diagram showing one embodiment of the present invention shown in FIG. 1 and the waveform diagram shown in FIG.
FIG. 1 shows a channel separation device for two channels. The center frequency of the channel 1 and f _1, the center frequency of the channel 2 and f _2. This channel 1,
The two signals are input to the channel separation device shown in FIG. 1 as reception signals. The waveform at this time is shown in FIG.
Is shown in This received signal is input to multipliers 1 and 2. The received signal input to the multiplier 1 is output from the local oscillator 3 And oscillates the intermediate frequency to convert the received signal into a baseband frequency. On the other hand, the local oscillator 3
From , And the received signal is frequency-converted into a baseband band by using the frequency shifted by 90 ° by the phase shifter 4. Thereby, outputs of the in-phase component and the quadrature component are obtained. The waveform at this time is shown in FIG. The signals output from the multipliers 1 and 2 are input to low-pass filters 5 and 6, respectively, and AD-converted by AD converters 7 and 8, respectively. The output of the AD converter 7 is input to multipliers 9 and 10.
The output of the AD converter 8 is input to multipliers 11 and 12.

Here, a portion for outputting a reference signal to be multiplied by the multipliers 9, 10, 11, and 12 will be described. From the relationship between the center frequency of channels 1 and 2 and the sampling period of AD converters 7 and 8 Is input to the integrator 19. This reference value is
It is equal to the difference φ between the center frequency and the frequency of each channel. The integrator 19 performs a repetitive operation of outputting the input reference value and simultaneously accumulating and adding the same reference value input next to obtain the next output. Integrator 19
Is output from the ROM 17 where the sin waveform is stored.
The cos waveform is input to the ROM 18 where the waveform is stored. That is, RO
The S17 waveform and the COS waveform are digitalized and stored in the M17 and the ROM 18, respectively, and the ROM 17 outputs the sampling signal using the output of the integrator 19 as a sampling interval.
The ROM 18 outputs to the multipliers 9 and 12 to 0 and 11 respectively. The sampling signal is a signal indicating the sine wave and cosine wave of φ described above. The output sampling signal AD converters 7, 8
Are multiplied by the multipliers 9, 10, 11, and 12. The waveform at this time is shown in FIG. 2 (c). In this state, the signal frequency-converted into the baseband is only a mixed signal of channels 1 and 2. So the multiplier
The outputs of 9, 9 and 11 are subtracted by a subtractor 15, the outputs of multipliers 10 and 12 are added by an adder 13, and input to low-pass filters 20 and 21, respectively, and only the low-frequency band is output. And the output 2 can be obtained as the orthogonal component. Similarly, the outputs of the multipliers 10 and 12 are subtracted by the subtractor 14, the outputs of the multipliers 9 and 11 are added by the adder 16, and their outputs are outputted only through the low-pass filters 22 and 23 in the low frequency band. Thus, an output 3 can be obtained as an in-phase component and an output 4 can be obtained as a quadrature component. These outputs
Demodulated signals of channels 2 and 1 are obtained from 1, 2 and outputs 3 and 4, respectively. FIG. 2 (d) shows channel 1 and FIG. 2 (e) shows channel 2 for this waveform.

In this manner, the number of multipliers and the number of ROMs can be reduced as compared with the conventional one, so that the device can be downsized.

Next, the processing of the above-described signal will be described below using equations.

Now received signal When _{A (t) cos (2πf 1} t + φ 1) + B (t) cos (2πf 2 t + φ 2), the signal is quadrature demodulated by a center frequency _{(f 1 + f 2) 12} , through a low pass filter phase component by the a (t) cos (-2πφt + Ψ 1) + B (t) cos (2πφt + Ψ 2) quadrature component - and (a (t) sin (-2πφt + Ψ 1) + B (t) sin (2πφt + Ψ 2)) Become.

When this signal is multiplied by a complex value with the reference value of the frequency φ,
The output from the adder 13 of the complex multiplier is passed through the low-pass filter 21 (output 2) is B (t) Sinφ _{2 The} output 1 from the subtractor 15 is passed through the low-pass filter 20 and the output 1 is A
(T) becomes a Cosφ _2. These are the quadrature component and the in-phase component of the channel 2 signal, respectively.

Next, when the input to the adder 13 is input to the subtractor 14 and the input to the subtractor 15 is input to the adder 16, the output 4 obtained by passing the output from the adder 16 through the low-pass filter 23 is A (t) cosφ ₁ , and the output 3 obtained by passing the output from the subtractor 14 through the low-pass filter 22 becomes B (t) Sinφ ₁ ,
Can be obtained.

As described above, it is possible to separate the signals transmitted on the two channels into the respective channels 1 and 2.

FIG. 3 schematically shows the process of channel separation in the case of three channels. When a series of data is transmitted through three channels, the received signal is as shown in FIG. The signals f ₁ , f ₂ and f ₃ are assumed to be at equal intervals. As shown in FIG. 3 (b), this signal has its center frequency , And converts the received signal into a baseband signal. Here, the baseband signal of channel 2 is obtained by passing the baseband signal through a low-pass filter having a narrow band. In the following, the channel 1 and the channel 3 can be separated by multiplying the complex by the frequency φ as in the embodiment of FIG.

According to the same method as the embodiment shown in FIG. 1 and FIG. 3, even when transmitting a series of data on n channels, in the case of transmitting an even number of channels, the principle of FIG. In the case of odd-numbered channel transmission, the input to the adder 13 and the input to the subtractor 15 shown in FIG. By inputting to the adder 16, the number of multipliers can be halved because the multipliers that originally existed independently to separate channel 1 or channel 2 can be used in common. Is possible.

〔The invention's effect〕

As described above in detail, according to the present invention, it is possible to reduce the number of multipliers and memories, which are one component conventionally provided for each channel, by using them in common for each channel. Therefore, it is possible to reduce the size of the device for performing the channel separation and demodulation and to simplify the channel separation process.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing processing waveforms of main parts of FIG. 1, and FIG. 3 is a diagram showing waveforms in the case of three channels. FIG. 4 shows a conventional example. 1,2,9,10,11,12 ... Multiplier, 3 ... Local oscillator, 4 ... Phase shifter, 5,6,20,21,22,23 ... Low-pass filter, 7,8 ... AD converter, 13,16 ... Adder, 14,15 ... Subtractor, 17,18 ... ROM, 19 ... Integrator.

Claims (1)

(57) [Claims] 1. A first and a second having different center frequencies.
Means for dividing the received signal transmitted on the channel into an in-phase component and a quadrature component and demodulating each, and outputting the demodulated in-phase and quadrature components; and a center frequency for each of the first and second channels. Means for generating an in-phase component and a quadrature component of a reference signal using a reference value obtained from a signal obtained by multiplying the in-phase component of the reference signal by the demodulated in-phase component, and a quadrature component of the reference signal. First means for adding a signal multiplied by a demodulated quadrature component; a signal obtained by multiplying an in-phase component of the reference signal by the demodulated quadrature component; and a demodulated in-phase component to the quadrature component of the reference signal. Second means for adding a signal obtained by multiplying the component by a component, and a signal obtained by multiplying the in-phase component of the reference signal by the demodulated quadrature component is demodulated to a quadrature component of the reference signal. A third means for subtracting a signal obtained by multiplying the in-phase component by the in-phase component, and a signal obtained by multiplying the in-phase component of the reference signal by the demodulated in-phase component. And a fourth means for subtracting the obtained signal from the second means, wherein the signal from the first means and the signal from the third means are transmitted as signals transmitted through the first channel. And a signal from the fourth means as a signal transmitted on the second channel.