JP2639402B2 - Oxide layer taper etching method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a taper etching method for an oxide layer, and more particularly, to a method for forming a resist layer formed on an oxide layer to define an etching area by, for example, reactive ion etching. The present invention relates to a method of performing taper etching by etching the oxide layer while depositing the sidewalls by etching (RIE).

[Prior Art] In recent years, the degree of integration of semiconductor integrated circuit devices has been increasing more and more, and those having a pattern rule of about 1 micron have been manufactured, and those having a submicron rule have been studied. One of the important technologies in manufacturing such a highly integrated semiconductor device is a wiring technology. In particular, formation of a contact hole connecting a substrate and a wiring material or wiring materials improves product yield and reliability. Is one of the most important process technology on the market.

Such contact holes have been created by a dry etching technique instead of a wet etching technique as the pattern rules become stricter. However, in the dry etching technique, since an insulating layer such as an oxide film is vertically etched, for example, as shown in FIG. 7, when a contact hole defined by the oxide layer 1 becomes fine, a wiring material is used. The step coverage of a certain aluminum 3 deteriorates, and the risk of disconnection occurs. Further, when the pattern becomes finer and the aspect ratio of the contact hole, that is, the aspect ratio approaches 1, the aluminum 3 stops being deposited in the contact hole as shown in FIG.

In order to improve such step coverage and deposition state, various etching methods have been conventionally attempted.
Typical examples are (1) wet and dry methods. In this method, first, as shown in FIG. 9 (a), the oxide film 5 is wet-etched using the photoresist 7 as a mask as shown in FIG. 9 (b), and then dry-etched as shown in FIG. 9 (c). Is vertically etched using the photoresist 7 as a mask at the bottom.

However, in this method, when the diameter of the contact hole is about 1 μm, it becomes difficult for the etchant to enter and the use becomes difficult.

Another method is (2) a reflow method. In this method, as shown in FIG. 10 (a), the oxide film 11 on the substrate 9 is vertically etched by dry etching and then flowed by heat treatment to form the shape shown in FIG. 10 (b). What you get. In this method, for example, high-concentration boron-phosphorus glass or the like is used as the oxide film 11.

However, in this method, if the diameter of the contact hole is small, the flow proceeds to the bottom of the contact hole,
As shown in FIG. 10 (c), an over-reflow state occurs and the hole is filled. For this reason, this method has a disadvantage that control of the heat treatment condition is considerably difficult.

Yet another method is (3) a dry etching method using resist receding. In this method, an oxide film is tapered only with a dry etching apparatus. Oxygen or the like is added to the etching system to increase the etch rate of the photoresist, and oxidize while utilizing the lateral retreat of the photoresist. This is a method of etching a film.

However, in this method, since the photoresist itself is etched, it is necessary to make the photoresist thicker than usual, and when the diameter of the contact hole becomes about 1 μm, it becomes difficult to perform high-precision etching. Also, since the photoresist itself is also etched,
In a step portion where the resist tends to be thin, there is a risk that the resist disappears during the etching of the oxide film and the oxide film is etched to an unnecessary region. Further, in this method, the selectivity between the oxide film or the like and the silicon of the substrate cannot be increased, so that it is difficult to control the etching time and a smooth tapered shape cannot be obtained.

[Problems to be Solved by the Invention] As described above, each of the above-described methods improves the step coverage of the aluminum wiring by the taper etching of the oxide film. Then, various inconveniences arise as described above.

SUMMARY OF THE INVENTION An object of the present invention is to provide a taper etching method for an oxide layer which can be applied to an extremely fine pattern size, for example, up to a submicron order, in view of the above-mentioned problems in the conventional method.

Another object of the present invention is to make it possible to minimize the film loss of the photoresist and to increase the selectivity with respect to the substrate material, so that stable and accurate taper etching can be performed.

Still another object of the present invention is to provide a taper etching method capable of controlling a taper angle freely and with high accuracy.

[Means for Solving the Problems] In order to achieve the above object, a taper etching method for an oxide layer according to the present invention defines an etching region by patterning a resist layer formed on a silicon oxide layer. Performing a step of etching the silicon oxide layer while depositing a deposit containing a component in an etching gas on at least a side wall of the resist layer in the etching region; and forming an upper electrode and a lower electrode of a parallel plate electrode. Deposition rate by adjusting the ratio of high frequency power applied between the upper electrode and the third electrode and between the lower electrode and the third electrode of a three-electrode etcher having a third electrode between them Adjusting the taper angle in reactive ion etching of the silicon oxide layer by controlling the etching rate. You.

[Operation] In the above-described method, for example, a wafer is placed on the cathode side of a three-electrode type etcher, and the ratio of power applied to the anode electrode and the cathode electrode is adjusted so that the etching area defined by the photoresist is reduced. Operating conditions can be set such that the oxide layer is etched while simultaneously depositing the polymer on the sidewalls. That is, for example, by controlling the self-bias on the cathode electrode side independently of the applied power, the deposition and the etching are balanced at a certain ratio, so that the region to be etched gradually as the deposition progresses. Therefore, the taper etching of the oxide film is performed. Such taper etching can be achieved by independently controlling the energy of ions perpendicularly incident on a wafer or the like in an ECR type etcher using a magnetron, or by cooling a wafer or the like in a two-electrode parallel plate type etcher. It can also be carried out by increasing the adsorption efficiency of.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 2 schematically shows a three-electrode etcher as an example of an apparatus used for performing the taper etching method according to the present invention. The device shown in the figure has an upper electrode 13 and a lower electrode 15.
And a mesh-like intermediate electrode 17 disposed between the upper electrode 13 and the lower electrode 15, for example. The intermediate electrode 17 is grounded, and the upper electrode 13 and the lower electrode 15
Has a high frequency power supply 23 via variable capacitors 19 and 21, respectively.
Is connected. On the lower electrode 15, a wafer 25 is mounted. The upper electrode 13, the lower electrode 15, and the intermediate electrode 17 are housed in a predetermined chamber, and the chamber is configured so that an etching gas or the like can be introduced therein as described later. Are not shown in detail.

In the apparatus shown in FIG. 2, the output power of the high-frequency power source 23 is kept constant, for example, and the ratio of the power applied to the upper electrode 13 and the lower electrode 15 is adjusted by adjusting the capacitance values of the variable capacitors 19 and 21. Etching and deposition are simultaneously performed at a certain level on the wafer 25 placed on the electrode 15 side, and the deposition can be so-called side deposition performed on a side wall of a photoresist or the like. That is, if the power applied to the lower electrode 15 is increased, the self-bias of the lower electrode 15 is increased, and the ion energy necessary for etching the oxide film can be increased, so that the etching rate increases. On the other hand, if the power applied to the upper electrode 13 is increased, the self-bias of the lower electrode 15 is reduced, and the generation of plasma between the upper electrode 13 and the intermediate electrode 17 is promoted, and active species necessary for deposition are increased. And thus the amount of deposition increases.

The above phenomenon will be described in more detail. Generally, as an etching gas for the oxide film, CHF ₃ , CHF ₃ + O ₂ , C ₂ F ₆ + CH
A gas system such as F ₃ or C ₂ F ₆ + H ₂ is used. When these gas systems are brought into a plasma state, an etchant is generated at the same time that a reactive species contributing to the polymerization reaction is easily generated, and a polymer having carbon as a main chain is formed in a region where there is no sputtering effect. However, when the power applied to the lower electrode 15 is large, the self-bias of the lower electrode 15 is large, so that the polymer to be formed is removed by the sputtering effect. And, in general,
Sputtering efficiency has an angle dependence on the incident angle of ions. When the incident angle is 0 °, that is, when the ions are incident on the wafer in the vertical direction, the sputter rate has a certain value that is not so large. As the incident angle increases to about 50 °, the sputter rate increases. Rises and shows a peak at around 50 °. When the incident angle is further increased, the sputter rate decreases.
That is, the sputtering effect is completely lost. On the other hand, the deposition rate has a small angle dependence and is determined by the concentration of the active species. In the case of ordinary reactive ion etching, the devotion rate of the polymer is kept at a considerably low level, whereas the sputter rate is sufficiently high. Thus, the workpiece is etched vertically. On the other hand, in the method according to the present invention, the deposition rate is set to a relatively large value, and is set to an extent that also depends on the magnitude of the sputter rate. Therefore, when the sputter rate changes according to the incident angle of ions, deposition is recognized at an incident angle where the deposition rate exceeds the sputter rate. Therefore, by adjusting the ratio of the power applied to the upper electrode 13 and the lower electrode 15 and appropriately selecting the ratio between the deposition rate and the sputtering rate, deposition is performed in a region where the incident angle is relatively large. Thus, the conditions of the apparatus shown in FIG. 2 can be set.

Under such an operating condition that deposition is performed in a region where the incident angle is relatively large, for example, a sample to be etched as shown in FIG. 1A is considered. That is, in the sample shown in the figure, a silicon oxide layer (SiO ₂ ) 29 is formed on a silicon semiconductor substrate 27, and a photoresist 33 having an opening 31 for defining, for example, a contact hole is formed on the oxide layer 29. Are formed. The opening
31 is not limited to a contact hole, and may define various etching regions, and may have various shapes. By etching such a sample to be etched using an etcher set to the above-described operating conditions, the oxide layer 29 can be etched simultaneously with deposition on the side wall of the opening 31 of the photoresist 33. That is, assuming that the etching ions are perpendicularly incident on the oxide layer 29, for example, the incident angle of the ions with respect to the oxide layer 29 is 0 °.
The incident angle of 33 with respect to the side wall of the opening 31 is approximately 90 °. For this reason, on the side wall of the opening 31 of the photoresist 33, the polymer is deposited because the deposition rate is higher than the sputter rate, and on the other hand, the oxide layer 29 on which the polymer is not deposited because the sputter rate is higher than the deposition rate.
Is etched. Thus, FIG. 1 (b)
As shown in FIG. 7, the deposition on the side wall of the opening 31 and the etching of the oxide layer 29 are simultaneously performed, and the incidence of etching ions is shielded in the lower region of the deposit, so that it is defined by the photoresist 33 and the deposit 35. The etched area gradually narrows as the etching proceeds, and the oxide layer
29 is tapered etched. In this case, as shown by oblique lines in FIG. 1 (b), the deposit is deposited from the side wall of the opening 31 of the photoresist 33 on the inclined wall formed according to the etching of the oxide layer 29. After the etching is performed in this manner, if the deposit 35 and the photoresist 33 are removed, as shown in FIG. 1 (c), the oxide layer 29 which has been subjected to the inclined etching is obtained. The taper angle α is
By adjusting the ratio of the power applied to the lower electrode 15 and controlling the etching rate of the oxide layer 29 and the deposition rate of the deposit 35, the adjustment can be performed.

 Next, specific examples will be described.

(Specific Example) As a sample to be etched, PS was placed on a silicon wafer.
G film (P concentration 4 wt%) is deposited at 6000 angstroms, then annealed at 900 ° C. for 20 minutes in nitrogen (N ₂ ), and coated with 1.0 μm of photoresist. What transferred the hole was used.

The etching apparatus uses the three-electrode etcher shown in FIG.
13.56 MHz.

Etching-1 100% of electric power was applied to the lower electrode 15. Further, the wafer was placed on the lower electrode 15 side, and CHF ₃ gas was supplied at 78 sccm, and C ₂ F ₆ gas was supplied at 42 sccm.
Sccm was flowed, the pressure in the chamber was controlled to 180 mTorr, and then etching was performed by applying a high frequency power of 700 watts. The result is that the oxide film was etched almost vertically because the mode was the normal RIE mode.

Etching-2 Under the same conditions as in Etching-1, high-frequency power was distributed to the upper electrode 13 and the lower electrode 15, and approximately 70% power was applied to the lower electrode 15. As a result, a taper angle α of about 80 ° was obtained. At this time, the selectivity of the oxide film to the resist is about 3.5
Therefore, the resist thinning can be almost ignored.

Etching-3 Next, about 60% of the total high-frequency power was applied to the lower electrode 15. As a result, a taper angle α of about 65 ° was obtained. At this time, the selectivity of the oxide film to the photoresist was about 3.6, and the film loss of the resist was almost negligible. The selectivity with respect to the substrate silicon was about 11. The state of etching in this case is shown in FIGS. 6 (a), (b) and (c). FIG. 6 (a) shows a state before etching, and shows that an opening for defining an etching area is formed substantially perpendicularly to the photoresist layer. FIG. 6B shows a state after the etching, and the deposition progresses in the lateral direction on the side wall of the opening of the photoresist, and shows a shape corresponding to FIG. 1B described above. In this case, the taper of the deposit can be well observed. FIG. 6 (c) shows a state after the photoresist and the deposit are removed by ashing, and shows that the oxide film is obliquely etched.

As a reference example, in addition to the three-electrode etcher shown in FIG. 2, taper etching is also possible with another type of three-electrode etcher as shown in FIG. In this case, by changing the outputs of the two high-frequency power supplies 35 and 37 shown in FIG. 3, the ion energy and the plasma density can be independently controlled to perform the taper etching and to control the taper angle. In FIG. 3, reference numeral 39 denotes a wafer.

As still another reference example, taper etching can be performed using a so-called ECR type etcher as shown in FIG. In this case, the electrode on which the wafer 41 is placed
The self-bias can be controlled by adjusting the output of the high-frequency power supply 45 connected to 43, and the deposition rate can be changed by adjusting the plasma density independently by adjusting the output of the magnetron 47 for microwave oscillation. it can. Reference numeral 49 indicates an ECR resonance magnet.

As still another reference example, taper etching can be performed by lowering the temperature of the substrate with a parallel plate etcher or a low frequency PPE mode etcher as shown in FIG. 5, for example. In this case, for example, the wafer 53 is placed on the cathode electrode side as shown in FIG.
Power is applied to the anode electrode 55 from the high-frequency power supply 57, and the wafer 53 is cooled with, for example, helium to control the adsorption efficiency of active species required for deposition.

In this case, the sample to be etched was the same as that in the specific example. The etching apparatus used was a parallel plate type etcher shown in FIG. High frequency power supply 57
Is 400 kHz, and helium gas is supplied between the wafer 53 and the lower electrode 51 in order to increase the cooling efficiency of the substrate. Also, the anode electrode 55 and the cathode electrode
The spacing of 51 is 1.0cm.

Etching-1 CHF ₃ gas 35 sccm, CF ₄ gas 45 sccm, Ar gas 500 sc
cm, the pressure in the chamber is 2.4 Torr, and the lower electrode 51 is 30 ° C.
, And a power of 450 watts was applied to the upper electrode 55.
As a result, a taper angle of about 80 ° was obtained.

Etching-2 The lower electrode 51 was cooled to 15 ° C. under the same conditions as in Etching-1. As a result, side deposition occurred, and the taper angle of the oxide film became about 70 °. In this case, the film thickness of the photoresist was negligible, and the selectivity with the silicon substrate was about 40.

As described above, the taper etching can be performed not by controlling the self-bias but also by controlling the substrate temperature to increase the adsorption efficiency of the reactive species. That is, this case corresponds to controlling the deposition rate while keeping the sputtering rate constant.

[Effects of the Invention] As described above, according to the present invention, taper etching of an oxide film can be easily performed by utilizing side deposition on a resist layer or the like, and a contact hole having a tapered shape can be obtained. It becomes possible to easily form the tapered shape of the through hole or other portions. Further, since the reaction system is close to the deposition system, the resist has less film loss and the selectivity with the substrate silicon can be increased. For this reason, taper etching can be performed with high accuracy and stability.
Also, it is very easy to control the taper angle,
A contact hole or the like having a desired shape can be opened very accurately.

[Brief description of the drawings]

FIG. 1 is an explanatory view showing each step of a taper etching method according to one embodiment of the present invention. FIG. 2 is an electric circuit diagram showing an example of an apparatus for performing the taper etching method according to the present invention. FIGS. 4, 5 and 6 are electric circuit diagrams showing a reference example of an apparatus capable of performing taper etching, and FIGS. 6 (a), (b) and (c) show the present invention, respectively. A crystal structure photograph by a scanning electron microscope (SEM) showing the shapes of an oxide film and a photoresist layer in each step of a specific embodiment of the related taper etching method. FIGS. 7 and 8 show contacts having no taper shape, respectively. FIG. 9 is a cross-sectional view showing a state of deposition of aluminum wiring in a hole, FIG. 9 is an explanatory view showing a contact hole forming process by a conventional wet and dry method, and FIG. Is an explanatory view showing the step of forming the tapered contact hole by flow method. 1, 5, 11: oxide layer, 3: aluminum wiring layer, 7: photoresist layer, 9: silicon substrate, 13: upper electrode, 15: lower electrode, 17: intermediate electrode, 19, 21: variable capacitance, 23: High frequency power supply, 25: wafer, 27: silicon substrate, 29: oxide layer, 31: opening, 33: photoresist layer, 35, 37, 45, 57: high frequency power supply, 39, 41, 53: wafer, 42: substrate Electrodes, 47: magnetron for microwave oscillation, 49: magnet for ECR resonance, 51: cathode electrode, 55: anode electrode.

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-247033 (JP, A) JP-A-57-9630 (JP, A) JP-A-60-153129 (JP, A) JP-A 60-153129 251628 (JP, A) JP-A-62-65328 (JP, A)

Claims (2)

(57) [Claims] A step of patterning a resist layer formed on a silicon oxide layer to define an etching region; and depositing a deposit containing a component in an etching gas on at least a side wall of the resist layer in the etching region. Etching the silicon oxide layer while performing the etching; and etching the silicon oxide layer between the upper electrode and the third electrode of the three-electrode etcher having a third electrode between the upper electrode and the lower electrode of the parallel plate electrode. Adjusting the taper angle in the reactive ion etching of the silicon oxide layer by controlling the deposition rate and the etching rate by adjusting the ratio of the high frequency power applied between the lower electrode and the third electrode; A taper etching method for an oxide layer, comprising: 2. The method according to claim 1, wherein the etching region defined by the resist layer is an etching region for forming a tapered contact hole.