JP2639311B2 - Driving method of plasma display panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called dot matrix type memory type AC plasma display panel used for personal computers and office workstations, which have been remarkably advanced in recent years, and wall-mounted televisions, which are expected to develop in the future. Driving method.

[0002]

2. Description of the Related Art A conventional AC plasma display panel has a structure shown in FIG. 3A is a plan view, and FIG. 3B is a sectional view taken along line xx ′ of FIG. This plasma display panel 10 has a first insulating substrate 11 made of glass, a second insulating substrate 12 also made of glass, a sustain electrode 13a, a scan electrode 13b, a column electrode 14, and a discharge filled with a discharge gas such as He or Xe. Gas space 15, partition wall 16 for securing discharge gas space and dividing pixels, phosphor 17 for converting ultraviolet light generated by discharge of discharge gas into visible light, insulating layer 18 covering row electrode
a, an insulating layer 18b covering the column electrodes, and a protective layer 19 made of MgO or the like for protecting the insulator from electric discharge. In FIG. 3A, reference numeral 20 indicates a pixel. If the phosphor 17 is divided into three colors for each pixel, a plasma display capable of color display can be obtained.

Next, FIG. 4 is a diagram focusing on only the electrodes of the plasma display panel. In FIG. 4, reference numeral 21 denotes a sealing portion for bonding the first insulating substrate 11 and the second insulating substrate 12, sealing a discharge gas therein, and hermetically sealing;
_{C 1, C 2, ···,} C m is the sustain electrode 13a, S _1, S
₂ ,..., _Sm are the scanning electrodes 13b. Also,
D ₁ , D ₂ ,..., D _n−1 , D _n indicate the column electrodes 14.

In the plasma display panel having the structure shown in FIGS. 3 and 4, when a scan pulse and a data pulse are applied between the scan electrode and the column electrode at the same timing to cause a write discharge, the adjacent discharge is maintained thereafter. The sustain discharge is sustained by an AC sustain pulse applied between the electrode and the scan electrode. Such a function is called a memory function. When a narrow pulse width called an erase pulse or a low-voltage pulse is applied to the scan electrode, the sustain discharge can be stopped. Also, the sustain discharge can be stopped even when the pulse whose rising pulse is blunted is used as the erase pulse.

Next, consider a case where gradation display is performed using such a plasma display panel. In FIG. 5, the horizontal axis represents time, and the vertical axis represents scanning electrodes. An oblique line described as a write timing indicates a timing at which a write discharge is performed in each scanning electrode.
In addition, a thick vertical line described as an erasing timing indicates a timing at which an erasing discharge is performed in each scanning electrode. Note that similar examples of the method of driving the plasma display panel by separating the writing time and the light emission time are described in JP-A-63-151997 and JP-A-4-19518.
8 and the like.

[0006] The brightness gradation is expressed by the number of times of light emission. FIG.
, One field is divided into a plurality of subfields (FIG. 5).
Is divided into SF1 to SF6), the number of times of light emission in each subfield is weighted by 2 ⁿ , and the luminance gradation is expressed as follows.

[0007]

[0008] Here, a _n is a variable which takes the value of 1 or 0. FIG. 5 shows the case where k = 6, and 2 ⁶ = 64.
The gradation can be expressed.

FIG. 6 shows a conventional example in which the use of subfields is different. Predischarge subfields PF1 to PF6 are inserted between subfields SF1 to SF6. In the preliminary discharge, all pixels are forcibly discharged once, and charged particles and excited particles serving as seeds of writing discharge are formed in each pixel. As a result, the writing discharge can be easily caused, and the establishment of the writing discharge can be enhanced. The preliminary discharge is
Inserting immediately before the write timing is particularly effective. When writing is performed once after the preliminary discharge, and then the sustain discharge is erased by an erase pulse, the writing discharge is less likely to occur thereafter. Therefore, the preliminary discharge is performed every time after the erasing timing after each subfield.

[0010]

However, in the conventional use of subfields, an independent write operation is required for each subfield. In the case of FIGS. 5 and 6, six independent write operations are required. That is,
In this case, up to six writing operations are required for the same pixel. When the write operation is performed, the fluorescent substance 17 on the column electrode 14 shown in FIG. 3 is directly exposed to the discharge by the write discharge, causing a problem that the luminance is deteriorated.

An object of the present invention is to realize a method of driving a plasma display panel with less luminance degradation by reducing the number of write discharges which is one factor of luminance degradation.

[0012]

According to the present invention, there is provided a dot matrix type AC having a memory function, which divides one field into a plurality of subfields and expresses a luminance gradation.
A driving method of a plasma display panel is characterized in that a plurality of subfields having the same light emission luminance are continuously arranged to form a subfield group, and in one subfield group, writing and erasing operations for each cell are performed once. The driving method of the plasma display panel described above is obtained. Note that a subfield for preliminary discharge may be provided for each subfield group.

[0013]

The present invention has solved the problems of the prior art by adopting the above-mentioned structure. That is, instead of representing the luminance gradation by subfield in which the weighting of conventional such 2 ^n, corresponding to a plurality of sub-fields represented by the weight of 2 ^n, in succession subfields of the same brightness Deploy. This is called a subfield group. As a result, independent writing only needs to be performed once for one subfield group.

For example, in the conventional method, when two light emitting weights 2 and 1 are used, independent writing is required twice. On the other hand, in the present invention, three subfields having a light emission weight of 1 are used to express the same luminance gradation. Then, independent writing is performed only once for one subfield group, with the emission weight of each subfield being 1. As a result, the number of independent writing operations can be reduced, and the luminance degradation of the plasma display panel can be reduced.

[0015]

FIG. 3 and FIG. 4 show a plasma display panel for carrying out the present invention. Scan electrodes S ₁ , S ₂ ,..., _Sm and sustain electrodes C ₁ , C ₂ ,.
,..., _Cm are each 240, and the column electrodes D ₁ , D ₂ ,
.., D _n−1 and D _n are 960.

FIG. 1 shows a subfield method according to a first embodiment of the present invention. In FIG. 1, there are three subfield groups SG1, SG2, SG3, and in each of the subfield groups, three subfields having the same number of times of light emission are included.
It is included one by one. Then, each subfield group S
The number of times of light emission in each subfield of G1, SG2, SG3 is as shown in FIG.

The timing at which the erase pulse is applied is for each subfield in the conventional example, but is for each subfield group in the present invention. The control of the luminance when the subfields are configured as described above will be described with reference to Table 1.
Table 1 shows a lighting state of a subfield having a high light emission luminance. With respect to the light emission luminance represented by the relative value, は indicates a light emitting subfield, and ◎ indicates a writing and light emitting subfield. As you can see from this table,
It is apparent that the number of times of writing can be reduced by the present invention.

[0018]

[Table 1]

FIG. 2 shows a second embodiment of the present invention. In this embodiment, each subfield group SG1, SG2, SG3
Between the preliminary discharge subfields PF1, PF2, PF3
Is inserted. Conventionally, the preliminary discharge is performed every time after the erasing timing after each subfield, but according to the present invention. Since erasing is performed not for each subfield but for each subfield group, the number of preliminary discharges can be reduced.

Although the preliminary discharge is effective for ensuring the writing discharge, it is preferable that the preliminary discharge be as small as possible because it causes an increase in background luminance and a reduction in panel life due to luminance deterioration. Therefore, according to the present invention, which can reduce the number of times of preliminary discharge, a driving method of a plasma display panel having a low background luminance, a high display contrast, and a long life can be obtained.

In the above embodiment, the conventional four-gradation display by two sub-fields is made to correspond to the four-gradation display by three sub-fields of the present invention. . Table 2 shows a general case.
As can be seen from this table, the number of light emissions L _i of the sub-fields included in the i th sub-field group is _{L i = (j i + 1} +1) may be × L _{i + 1} and setting. Here, j _{i + 1} is the number of subfields included in the (i + 1) th subfield group.

[0022]

[Table 2]

Further, in the above embodiment, the case of performing the display of 64 gradations has been described, but it is needless to say that other gradations such as 8 gradations and 16 gradations can be handled. Further, in the above embodiment, the AC shown in FIGS.
Although the case where the surface discharge type memory-panel is driven has been described, it goes without saying that the present invention is not limited to these and can be applied to any type of AC memory type 1-type plasma display panel. Further, in the above-described embodiment, the sub-field groups having a high light emission luminance are arranged in the order of the sub-field groups having a low light emission luminance. However, this order may be reversed.
Alternatively, they may be arranged in any arbitrary order.

[0024]

As described above, since the number of times of writing can be reduced by the driving method of the present invention, the life of the plasma display panel can be prolonged due to the reduction in the life due to the luminance deterioration caused by the writing discharge. Can be. In addition, the number of preliminary discharges can be reduced according to the present invention, so that the background brightness of the plasma display panel can be reduced and the display contrast can be increased, and the life of the plasma display panel can be prolonged. It is.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of a driving method according to the present invention.

FIG. 2 is a diagram showing a second embodiment of the driving method according to the present invention.

FIGS. 3A and 3B are a plan view and a cross-sectional view of a plasma display panel.

FIG. 4 is a configuration diagram of a plasma display panel focusing on electrode arrangement.

FIG. 5 is a time chart showing a driving method of a conventional plasma display panel.

FIG. 6 is a time chart showing a different example of a method for driving a conventional plasma display panel.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 Plasma display panel 11 1st insulating substrate 12 2nd insulating substrate 13a Sustain electrode 13b Scan electrode 14 Column electrode 15 Discharge gas space 16 Partition wall 17 Phosphor 18a, 18b Insulating layer 19 Protective layer 20 Pixel 21 Seal part SF1-SF6 Subfield PF1~PF6 predischarge subfield SG1~SG3 subfield group _{D 1, D 2, ···,} D n-1, D n column electrodes _{C 1, C 2, ···,} C m-1, C m maintained electrodes _{S 1, S 2, ···,} S m-1, S m scanning electrodes

Claims (2)

(57) [Claims] 1. A method for driving a dot matrix type AC plasma display panel having a memory function, wherein one field is divided into a plurality of subfields to represent a luminance gradation, a plurality of subfields having the same light emission luminance are successively provided. A driving and erasing operation for each cell is performed once in one subfield group. 2. The method of driving a plasma display panel according to claim 1, further comprising a subfield for performing a preliminary discharge for each subfield group.