JP2635384B2 - Image processing method and apparatus - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing method and apparatus, and more particularly to an image processing method and apparatus for distributing an error generated between an input density and an output density to peripheral pixels. .

[Prior art] Conventionally, this kind of image processing method is called an error diffusion method “R, WFloyd and L. Steinberg“ An Adaptive Algorithm ”.
For Spatial Gray Scale "SID 75 Digest (1976)".

According to the error diffusion method, since the error is spatially settled, the density of the input image and the density of the output image can be matched. Further, unlike the dither processing, there is no limitation on the number of gradations due to the dither matrix size, and there is an advantage that it is possible to achieve both gradation and resolution, which are issues in dither processing.

Density D of pixel of interest (i, j) after correction in error diffusion method
Focusing on _ij , this can be expressed by equation (1).

Here, X _ij: a weighting matrix _{coefficients:} input pixel density E i _{+ m, j + n} of the pixel of interest (i, _j): the processed peripheral pixel X _{i + m,} 2 binarization error generated in _{j + n α i + m,} j + n.

This error diffusion method is generally performed by distributing an error generated at a target pixel (i, j) to subsequent peripheral pixels according to a predetermined weight matrix coefficient. Specifically, assuming that the threshold value is T and that one pixel is 6 bits, the pixel of interest (i,
The output density Y _ij of j) is determined by Y _ij = 63 (D _ij ≧ T) Y _ij = 0 (D _ij <T). Therefore, the error E _ij caused by printing the output density Y _ij is a difference (D _ij −Y _ij ). The weight matrix α _ij is _Assuming that the error E _ij = 25, 4 × Int (25 × 1/10) = 8 for pixel (i + 1, j) and 1 × Int (25 × 1/2) for pixel (i−1, j + 1) 10) = 2 Pixels (i, j + 1) are distributed 4 × Int (25 × 1/10) = 8 Pixels (i + 1, j + 1) are distributed 1 × Int (25 × 1/10) = 2 Will be.

Here, the symbol Int means truncation below the decimal point,
It has been employed for the purpose of simplifying hardware or speeding up software processing. However, when truncation below the decimal point is performed, the sum of the actual error distribution values E _ij ^*
Is E _ij ^* = 8 + 2 + 8 + 2 = 20, which is different from the generated error E _ij = 25. For this reason, the relationship of (input image density) ≠ (output image density) was established, and the image quality deteriorated.

In this regard, the remainder of the division is taken as the next pixel (i + 1, j).
There is a method of making the input and output image densities coincide by carrying over to the above. However, this method simplifies the circuit configuration, but causes a large weight to be applied to the next pixel, which may deteriorate the image quality.

[Problems to be Solved by the Invention] The present invention is to eliminate the above-mentioned drawbacks of the prior art, and an object of the present invention is to provide an image processing apparatus capable of performing quick and high-quality error diffusion processing with a simple method or configuration. It is an object of the present invention to provide a method and an apparatus therefor.

[Means for Solving the Problems] In order to achieve the above object, an image processing method according to the present invention provides an image processing method for distributing an error generated between an input density and an output density to peripheral pixels. While dividing by the sum of the respective coefficients of the predetermined weight matrix, the integer part of the quotient is multiplied by each coefficient of the weight matrix and distributed to the corresponding surrounding pixels, and the remainder is determined in a predetermined distribution order. Therefore, the distribution to the corresponding peripheral pixels is briefly described.

In order to achieve the above object, an image processing apparatus for distributing an error generated between an input density and an output density to peripheral pixels according to the present invention is a binary image processing apparatus for binarizing an input density with a predetermined threshold. And a dividing means for dividing an error generated by the binarization by a sum of respective coefficients of a predetermined weight matrix, and corresponding to the integer part of the quotient obtained by the division by multiplying each coefficient of the weight matrix. The outline is to include error distribution means for distributing to the peripheral pixels and remainder distribution means for distributing the remainder generated by the division to the corresponding peripheral pixels according to a predetermined order and distribution.

[Operation] In such a configuration, the binarizing means binarizes the input density with a predetermined threshold. The dividing means divides the error generated by the binarization by the sum of each coefficient of a predetermined weight matrix. Then, the error distribution means multiplies the integer part of the quotient obtained by the division by each coefficient of the weight matrix and distributes it to the corresponding peripheral pixels, and the remainder distribution means determines the remainder generated by the division according to a predetermined order and distribution. And distribute to the corresponding peripheral pixels.

Therefore, the decimal operation can be omitted and, for example, when the remainder is small, it is allocated to appropriate peripheral pixels at high speed, and as the remainder becomes large, it is distributed to a plurality of peripheral pixels at high speed in a predetermined distribution.

[Description of Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a block diagram of a preprocessing unit of the image processing apparatus according to the embodiment. In the figure, reference numeral 201 denotes an input sensor unit, which includes a photoelectric conversion element such as a CCD and a drive circuit for main and sub-scanning of the element, and performs scanning of a document. 202 is A
A / D converter converts an image signal read by the input sensor unit 201 into, for example, 6-bit luminance data. Therefore, the number of gradations is 64 gradations from 0 to 63, and the black data is "00000
“0” and white data are “111111”. Reference numeral 203 denotes a correction circuit, which corrects shading distortion caused by uneven sensitivity of a photoelectric conversion element such as a CCD and distortion of light distribution characteristics of a light source.
Reference numeral 204 denotes a ROM conversion table, which converts the luminance data output from the correction circuit 203 into density data _Xij . That is, table conversion is performed in the relationship of X _ij = −γ log (luminance data) γ: positive constant.

FIG. 3 is a diagram showing the storage contents of the ROM conversion table 204 according to the embodiment. In the figure, the “input” column indicates a ROM address, and the “output” column indicates ROM data.

FIG. 1 is a block diagram of the image processing unit of the image processing apparatus according to the embodiment. In the figure, reference numeral 101 denotes an adder, which adds the input pixel density X _{ij at the target} pixel (i, j) and the error density E _ij ′ accumulated so far to obtain a corrected pixel density D _ij
Ask for. Reference numeral 102 denotes a comparator, which binarizes the obtained D _ij with a threshold T to determine an output pixel density Y _ij . Specifically, a binarization process of Y _ij = 63 (D _ij ≧ T) Y _ij = 0 (D _ij <T) is performed. 103 denotes a printer of binary (dots) method, to form a sub connexion dots image in the output pixel density Y _ij. That is, when Y _ij = 0 (white), the output dot is turned off, and when Y _ij = 63 (black), the output dot is turned on.

On the other hand, reference numeral 104 denotes an error calculator which calculates an error density _Eij generated by printing the target pixel (i, j). Specifically, processing of E _ij = D _ij −Y _ij is performed. An error distribution calculation circuit 105 distributes the error density _Eij to five peripheral pixels according to, for example, a weight matrix as shown in FIG.

FIG. 5 is a diagram showing the relationship between the pixel of interest X (i, j) and its surrounding pixels. If the distribution destination pixels of the error density E _ij generated by printing the target pixel X (i, j) are A to E, respectively,
These coordinates are A: (i + 1, j) B: (i + 1, j) C: (i−1, j + 1) D: (i, j + 1) E: (i + 1, j + 1)

Note that each of the pixels A to E corresponds to the weight matrix shown in FIG. 4, and the pixels A, D, and E have the same weighting coefficient (for example, 2).
S _ij . Similarly, the weight coefficients (for example, 1) of the pixels B and C are set to be the same, so that they are represented by the symbol _Tij .

For example, a digital operation of dividing the 6-bit dividend E _ij by the divisor 8 (2 ³ ) can be easily performed by removing the lower 3 bits of the dividend E _ij . That is, the quotient is the upper three bits, and the remainder R _ij
(= 0 to 7) are the lower 3 bits. Next, the integer part of the quotient is multiplied by each coefficient value according to the weight matrix shown in FIG. 4 and distributed to the corresponding peripheral pixels. The values of S _ij and T _ij are respectively S _ij = 2 × Int (E _ij / 8) T _ij = 1 × Int (E _ij / 8).

On the other hand, the remainder for R _ij is distributed to the slave connexion peripheral pixels A~E the distribution order and the allocation amount of ranking for ROM 106.

FIG. 6 is a circuit diagram of the ranking ROM 106 of the embodiment.
The address terminals A0 (LSB) to A2 (MSB) of the ROM are all R
3 bit data R _ij of _{ij (0) ~R ij (2} ) has entered, the data output terminal D0~D6 the ROM 7 bits of rank and allocation amount data Q ₁ to Q ₇ is output.

FIG. 7 is a diagram showing the stored contents of the ranking ROM 106 of the embodiment. The possible values of the remainder _Rij , which is the address input of the ROM, are 0 to 7, and the order and the allocation amount to be assigned to the peripheral pixels A to E are shown accordingly. For example, R
_{When ij} = 0, there is no distribution amount, and when _Rij = 1, 1 is assigned only to pixel A. Since the remainder is small, even if only the pixel A is assigned, the burden does not increase and the image quality does not deteriorate. Also, R _ij =
2 is 1 for pixels A and D, and R _ij = 3 is pixel A
2 and 1 to the pixel D. As described above, as the remainder increases, the distribution amount and the number of pixels increase. Below R
_The same applies when _ij = 4-7. In any case, since the calculation of the decimal point or less is not performed, the structure is simple and high-speed processing is possible. In addition, the sum of the distribution values becomes excessively equal, and the concentration settlement is performed appropriately.

FIG. 8 is a graph showing the relationship between the output and address inputs R _ij ranking for ROM106 data Q ₁ to Q _7. Here, Q _{1 to} Q ₇ each have the size of the allocation amount “1”, and the allocation amounts 0 to 2 can be represented by allocating two bits to the pixels A and D, respectively. Denoting this formula, the pixel _{A = S ij + Q 2 +} Q 1 pixel B = T _ij + Q ₅ pixels C = T _ij + Q ₆ pixels _{D = S ij + Q 4 +} Q 3 pixel E = S _ij + Q _7. In this way, the pixel of interest is 1 from the start of scanning.
Each time the pixel advances, an error is calculated according to the above procedure, distributed to its peripheral pixels A to E, and the process of accumulating these is repeated for each peripheral pixel.

Therefore, from a different point of view, the target pixel X in FIG.
Considering finding the correction value D _ij for (i, j), this is nothing less than adding the total sum E _ij ′ of the weighted distribution amounts from the already processed peripheral pixels a to e. Therefore, in FIG. 1, the adder 111 performs d + e, and the adder 113 performs c + (d + e). The memory 114 is an adder 113
The error value of the (j-1) th line obtained in (1) is stored. The adder 117 performs b + {c + (d + e)}, and the adder 1
19 performs the final E _ij = a + [b + {c + (d + e)}], and stores the result in the latch 120.

 The remaining distribution order may be other than that shown in FIG.

Also, in order to simplify the circuit, pixels A and B on the j-th line
The error distribution may be performed only to the error distribution.

[Effects of the Invention] As described above, according to the present invention, arithmetic operation with a decimal point or less is not required, so that software processing can be performed at high speed and the hardware structure is simplified. Moreover, there is no deterioration in image quality.

Further, according to the present invention, since the remainder is allocated and ranked according to the remainder, a large weight is not applied to a specific pixel, errors can be uniformly distributed, and image quality is improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image processing unit of the image processing apparatus of the embodiment, FIG. 2 is a block diagram of a pre-processing unit of the image processing apparatus of the embodiment, and FIG. 3 is a block diagram of the ROM conversion table 204 of the embodiment. FIG. 4 shows the contents of the weight matrix of the embodiment. FIG. 5 shows the relationship between the pixel of interest X (i, j) and its surrounding pixels. circuit diagram of a ranking for ROM 106, FIG. 7 is a diagram showing the storage contents of ranking for ROM 106 embodiment, the FIG. 8 is the relationship of the output address input R _ij ranking for ROM 106 data Q ₁ to Q ₇ FIG. In the figure, 101, 107 to 109, 111, 113, 117, 119, and 122 adders, 110, 112, 116, 118, and 120 latches, 102 comparators, 103 printers, 104 error calculators, 105
... Error distribution value calculation circuit, 106 ROM for ranking, 114
…… Memory, 115 …… Timing generation circuit, 201 …… Input sensor section, 202 …… A / D converter, 203 …… Correction circuit, 204…
... ROM conversion table.

Claims (2)

(57) [Claims] 1. An image processing method for distributing an error generated between an input density and an output density to peripheral pixels, wherein the error is divided by a sum of respective coefficients of a predetermined weight matrix, and an integer part of the quotient is added to the division. And (c) multiplying the weight matrix by each coefficient and distributing the remainder to corresponding peripheral pixels, and distributing the remainder to the corresponding peripheral pixels according to a predetermined distribution order. 2. An image processing apparatus for distributing an error generated between an input density and an output density to peripheral pixels, comprising: a binarizing means for binarizing an input density with a predetermined threshold; Division means for dividing the error by the sum of each coefficient of a predetermined weight matrix; and error distribution means for multiplying the integer part of the quotient obtained by the division by each coefficient of the weight matrix and distributing the result to corresponding peripheral pixels, An image processing apparatus comprising: a remainder distribution unit that distributes a remainder generated by division to corresponding peripheral pixels according to a predetermined order and distribution.