JP2604469B2 - Semiconductor integrated circuit device and configuration method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] Semiconductor integrated circuit device and its configuration method, especially large scale
Regarding PLA and its configuration method, for the purpose of improving work efficiency and layout efficiency by aligning the sizes of multiple PLAs, it is composed of multiple PLA blocks, and the input variables and output variables of each PLA block are all PLA. In a semiconductor integrated circuit device common to blocks, a plurality of signal lines corresponding to product terms included in all PLA blocks are equally divided into each PLA block.

[Industrial applications]

The present invention relates to a semiconductor integrated circuit device and a method of configuring the same, and more particularly, to a large-scale PLA configured using a plurality of PLA blocks and a method of configuring the same.

Arbitrary logic function is realized by AND-OR two-step logic
PLA (Programmable Logic Array) is suitable for high-mix low-volume production and has recently been used in some large-scale semiconductor integrated circuit devices.

[Conventional technology]

FIG. 5 is a diagram showing one PLA. As an example, three input signals x _{1 to} x ₃ , two output signals y ₁ and y ₂ , and six product terms P
Shows a logical structure of a PLA having ₁ to P _6. Such PL
In A, the portions indicated by ● of the AND array 1 and the OR array 2 are selectively connected (programmed) to realize an arbitrary logical function. Generally, DMAC (Direct Memory Access Controlle
When a large-scale integrated circuit device such as r) is configured by a large-scale PLA, a method of implementing each functional block with several PLAs and laying out these PLA blocks on a chip is adopted. Usually, the size of each PLA block is the number of input signals,
It depends on the number of output signals and the number of product terms, and these numbers are determined for each logical function to be realized. FIG. 6 is a diagram for explaining the size of each PLA block when each function of the DMAC is realized by a large-scale PLA. G ₁ , G ₂ , G ₃ , G ₄ ,... PLA block. In this figure, G ₁ having the smallest area (or pattern) obtains seven output signals by 13 input signals and 58 product terms. On the other hand, G _{3 with} the largest area (or pattern) has 17 input signals and
Seven output signals are obtained from 321 product terms.

[Problems to be solved by the invention]

However, in such a conventional configuration method of a semiconductor integrated circuit device, since the areas (or patterns) of a plurality of PLAs are different from each other, design and verification must be performed individually for each of them, resulting in an increase in work efficiency. For example, when the layout is performed as shown in FIG. 6, empty areas (shown by broken lines) are generated on the right side of G ₁ , G ₂ , and G ₄ , and the layout when the layout is performed on the chip There was a problem that efficiency was poor.

Therefore, an object of the present invention is to improve the work efficiency and the layout efficiency by aligning the sizes of a plurality of PLA blocks.

[Means for solving the problem]

In order to achieve the above object, the semiconductor integrated circuit device according to the present invention includes a plurality of PLA blocks, and the input variables and output variables of each PLA block are common to all the PLA blocks. Is characterized in that a plurality of signal lines corresponding to the product terms included in are divided equally into each PLA block.

According to a method of configuring a semiconductor integrated circuit device according to the present invention, in a method of configuring a semiconductor integrated circuit device using a plurality of PLA blocks, an input variable of one PLA block is assigned to another PLA block.
The number of input signals of one PLA block is expanded by adding a different input variable among the input variables of the block and the input variable for block selection, and the expansion is similarly performed for the other PLA blocks, and the input of all the PLA blocks is performed. Equalizing the number of signals and assigning another PLA to the output variable of one PLA block
Add one of the output variables of the block and add 1
Expand the number of output signals of one PLA block, and
Performing the same for the LA block to equalize the number of output signals of all PLA blocks, and equally dividing a plurality of signal lines corresponding to product terms included in all PLA blocks into each PLA block, It is characterized by including.

[Action]

According to the semiconductor integrated circuit device having such a configuration and the configuration method thereof, in short, in a semiconductor integrated circuit including a plurality of PLA blocks, the number of input signals and the number of output signals of each PLA block are unified, and all PL
Since the signal lines corresponding to the product terms included in the A block are equally divided into each PLA block, the input signal lines (and output signal lines) of each PLA block are arranged in the same direction (for example,
(Left and right directions in the figure)
Accordingly, the size of the product term line of each PLA block in the arrangement direction (for example, the vertical direction in FIG. 3) can be made uniform. Therefore, the upper, lower, left, and right sizes of each PLA block can be completely aligned, and layout efficiency can be improved.

〔Example〕

 Hereinafter, the present invention will be described with reference to the drawings.

FIGS. 1 to 4 are diagrams showing one embodiment of a method of configuring a semiconductor integrated circuit device according to the present invention.

In FIG. 1, reference numeral 10 denotes a first PLA having the number of input signals "4", the number of output signals "3", and the number of product terms "7", and reference numeral 11 denotes the number of input signals "3" and the number of output signals " This is a second PLA having 2 "and the number of product terms" 5 ". Now, considering the case where these first and second PLAs are arranged on the same chip without changing the logical structure, the pattern of each PLA is constant due to the difference in the number of input / output signals and the number of product terms. As described above, the work efficiency and the layout efficiency deteriorate as described above.

Thus, the configuration method according to the present embodiment includes the following two steps. The order of performing the two steps is not particularly defined.

Step 1 In other words, in FIG. 2, the input variables x ₁ , x ₂ , x ₃ , and x ₄ of one PLA block (for example, the first PLA) are replaced with the input variables of another PLA block (the second PLA). x _1, x _4, with addition of different input variables ones of x ₅ (x _5), apply an input variable x _c block selection, to expand the number of input signals to the "6" from the beginning of "4". Similarly, the above enlargement is performed for another PLA block (second PLA). That is, the input variables x ₁ , x ₄ , x ₅ of the second PLA are added to the input variables x ₁ , x ₂ , x ₃ , x _{4 of} the first PLA.
Add different input variables (x ₂ , x ₃ ) of
The input variables x _c block select addition, to expand the number of input signals to the "6" from the beginning of "3". The above x _c is the first PLA
And used to select a second PLA, for example x
_{When c} = “L”, the first PLA is selected, and when x _c = “H”, the second PLA is selected.

Step 2 Output variables of one PLA block (for example, the first PLA)
Output variables of other PLA blocks (second PLA) in y ₁ , y ₂ , y ₃
y _3, different output variable ones of the y ₄ (y ₄₎ is added, expanding the number of output signal to "4" from the beginning of "3". Similarly, the output variables y ₃ and y ₄ of another PLA block (second PLA) are set to the first
Different output variables y ₁ and y ₂ among the output variables of the PLA of
The number of output signals is expanded from "2" to "4". Then, the outputs of the first PLA and the second PLA are connected and connected by a wired OR (indicated by a circle in FIG. 3).

As a result of performing these two steps, the number of input signals of the plurality of PLA blocks (first and second PLAs) becomes “6” and the number of output signals becomes “4”, that is, the same number, In addition, the contents of the included variables match. Therefore, the input signal and the output signal of the plurality of PLA blocks can be made common, and as shown in FIG. 3, the product terms of the plurality of PLA blocks can be added and divided equally. , The pattern of a plurality of PLA blocks can be made the same. As a result, (i) it is possible to perform programming by changing the internal matrix for each of a plurality of PLA blocks based on one PLA block, thereby simplifying design and verification and improving work efficiency.

(Ii) Further, when arranging a plurality of PLA blocks, the free space can be reduced, and the layout efficiency can be improved.

In this embodiment, the configuration method using two PLA blocks has been described for simplicity. However, it is needless to say that the present invention can be applied to a configuration using two or more PLA blocks. It goes without saying that the number of input signals, the number of output signals, and the number of product terms of each PLA block are not limited to the above example.

By the way, as a result of experimenting on the DMAC, the inventor obtained the following modified results of the number of input / output signals and the number of product terms. That is, PLA from B _{1 to} B ₂₀ shown in the following table is 2
One group B ₁ ~B _10, B ₁₁ divided into .about.B _20, a result of deformation for each group, For the groups B _{1 to} B ₁₀ , the PLA blocks 13 each having the number of input signals “28”, the number of output signals “7”, and the number of product terms “135” are provided.
(B ′ _{1 to} B ′ ₁₃ ), and for the group of B _{11 to} B ₂₀ , 13 PLA blocks each having 28 input signals, 23 output signals, and 135 product terms (B _'14 ~B'
₂₆ ).

FIG. 4 shows PLs of groups B ′ _{1 to} B ′ _{13 for} reference.
Four PLA block among the A (e.g. _{B '1} ~B' 4)
Are laid out, and as can be seen from this figure, they could be arranged in the same pattern. Although not less than the number of product terms is "135" for the group last PLAB _'13, B' ₂₆ in this experiment is made to coincide with "135" by giving a dummy product terms.

〔The invention's effect〕

According to the present invention, patterns of a plurality of PLA blocks can be aligned, and work efficiency and layout efficiency can be improved.

[Brief description of the drawings]

FIGS. 1 to 4 are views showing an embodiment of a semiconductor integrated circuit device and a method of configuring the same according to the present invention. FIGS. 1 (a) and 1 (b) show a plurality of PLAs before deformation, respectively. 2 (a) and 2 (b) are diagrams showing a plurality of PLAs during the deformation, respectively, FIG. 3 is a diagram showing a combination of a plurality of PLAs after the deformation, and FIG. 4 is configured by applying the method. 5 and 6 are diagrams showing a conventional example, FIG. 5 is a diagram showing a logical structure of the PLA, and FIG. 6 is a layout diagram of the large-scale PLA. . 10 ...... first PLA (multiple PLA blocks), 11 ...... second PLA (multiple PLA _{blocks), x 1, x 2,} x 3, x 4, x 5 ...... input variables (input signal) , X _c …… Input variables for block selection, y ₁ , y ₂ , y ₃ , y ₄ …… Output variables (output signals), P ₁ , P ₂ , P ₃ , P ₄ , P ₅ , P ₆ , P _{7, P 8, P 9,} P 10, P 11, P 12 ...... product terms.

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-52-137228 (JP, A) JP-A-59-208944 (JP, A)

Claims (2)

(57) [Claims] In a semiconductor integrated circuit device comprising a plurality of PLA blocks, wherein input and output variables of each PLA block are common to all PLA blocks, a plurality of signals corresponding to product terms included in all PLA blocks are provided. A semiconductor integrated circuit device, wherein a line is equally divided into each PLA block. 2. A method of configuring a semiconductor integrated circuit device using a plurality of PLA blocks, wherein a different input variable and an input variable for block selection among input variables of another PLA block are used as input variables of one PLA block. In addition, expanding the number of input signals of one PLA block and performing the expansion on other PLA blocks in the same manner to equalize the number of input signals of all PLA blocks; The output signal number of one PLA block is expanded by adding a different output variable among the output variables of the other PLA blocks, and the expansion is similarly performed for the other PLA blocks to output the number of output signals of all the PLA blocks. And a step of equally dividing a plurality of signal lines corresponding to product terms included in all PLA blocks into each PLA block. Law.