JP2604022B2 - Communication control device and distributed processing system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial application field) The present invention relates to a communication control device for controlling communication between a communication line and a data processing device, for example, a local area network ( This is applied to a distributed processing system in which a plurality of stations mutually communicate data and perform data processing in a distributed manner, such as a LAN.

(Prior Art) At present, in the field of CAD / CAM, distributed processing systems using high-performance EWS are widely used. In this type of distributed processing system, a file system is often shared by the entire network. NFS as a protocol for that
(Network File System) and RFS (Renote File Sharin)
g) has been proposed and implemented. These systems are characterized in that a file can be used anywhere on the network as if it were a unique file resource of the distributed processing system. For this reason, these distributed processing systems require data communication with a short response time.

Communication between computers is currently standardized by LAN
Methods such as SMA / CD, token ring and token bus are generally used. In all of these systems, a packet switching system is adopted, and communication protocols (protocols) are extremely strictly defined, thereby enabling highly reliable communication. In general, the LAN presupposes communication between unspecified multiple stations and unspecified multiple stations. Therefore, all transmitted packets (frames) have the address of the transmitting station and the address of the station to be received. At the same time, all stations need to constantly monitor the network and constantly determine whether or not the data is sent to itself. Such processing can be performed by a general-purpose processor provided in each station. In this case, however, the burden on the general-purpose processor becomes considerably large. Recently, a processor dedicated to communication has been provided for such a purpose. Have been.

On the other hand, among the data handled by the EWS (Engineering Work Station), the overwhelmingly large amount of data is graphic data, that is, a raster file.
For example, if one screen is decomposed into 1280 x 760 pixels, and if each pixel is allowed to have 16-bit luminance, the data amount is
16 megabits / screen. If the number of pixels in one screen is increased in order to obtain high quality image quality, the amount of information further increases. Therefore, for example, if image processing such as shading of a three-dimensional object to express a stereoscopic view is performed by a general-purpose processor of each station, the load on the general-purpose processor also increases.
It has been practiced to provide a dedicated image processor.

FIG. 4 shows a distributed processing system using the above-described communication processor and image processing processor. This figure shows one EWS that constitutes the system.

The EWS includes a host processor 31, which is the core of EWS control and data processing, a communication processor 33 for exchanging communication data with a communication control line 32, a frame buffer memory 34 for storing received data, An image processing processor 35 for processing the processed image data under the control of the host processor 31, an image memory 36 for storing the image processed data, and an input / output interface (I /
O) and 37 are interconnected via an internal bus 38,
A VDT 39 for displaying image data in the image memory 36 is provided.

In this system, when the EWS now needs image data, the host processor 31 outputs a request command to a recording medium (not shown) storing the data. The instructions are assembled into the transmitted data based on the network protocol on which the system is running,
The data is transmitted to the communication path 32 via the internal bus 38 and the communication processor 33.

After sending the request command, the requested data is sent via the communication line 32 after a certain time lag.
The communication processor 33 receives all the data from the communication line 32, decomposes the data packet into frames according to the protocol, and temporarily stores the data in the frame buffer memory 34 via the internal bus 38. After the reception of all the requested data is completed, the host processor 31 checks whether the data is accompanied by image processing, and if the data involves image processing, the host processor 31
Outputs an instruction to start image processing. In response to this instruction, the image processing processor 35
Based on the data stored in 34, predetermined image processing such as shading is performed. The result is stored in the image memory 36 having a buffer function via the internal bus 38, and thereafter, the data processing is displayed by the VDT 39 or the like.

By providing dedicated processors for communication control and image processing as described above, the load on the host processor 31 can be reduced, processing efficiency can be improved, and processing can be speeded up. However, image processing performed on the system side originally requires a great deal of time. Particularly, in the case of high-quality images or moving image processing with a large amount of data, the processing is started as soon as possible to further speed up the processing. To obtain a final display image.
However, as described above, if the host processor 31 appropriately sends operation commands to the communication processor 33 and the image processing processor 35 to perform image processing and communication control,
Handshaking between processors takes extra time,
There is a problem that a lot of time is required to obtain a final display screen. Further, the host processor 31 performs arbitration between the processors, and for this arbitration, a handshake is required to some extent. Therefore, there is a problem that real-time processing cannot be performed.

(Problems to be Solved by the Invention) As described above, in the conventional image communication control system, the communication processor and the image processing processor that operate independently are controlled by the host processor. In such a case, there is a problem that real-time processing cannot be performed on the data.

An object of the present invention is to provide a communication control device capable of executing a process involving a large amount of data transfer and image processing at high speed in a distributed processing system, and a distributed processing system using the communication control device.

[Structure of the Invention] (Means for Solving the Problems) A communication control device according to a first invention includes a communication unit, a storage unit, and an image processing unit, and these are configured as follows. . That is, the communication means receives the data arriving via the communication line, determines whether the received data is image data, and stores the data in the storage means if the received data is image data. At the same time, the image processing means is started. If the received data is not image data, the data is output to an external data processing device. Further, when the image processing means is started, the image processing means reads out data from the storage means without going through the data processing device and performs a predetermined process.

Further, a distributed processing system according to a second invention is characterized in that a plurality of terminal devices provided with the above-mentioned communication control device are connected to each other via a communication line.

In these apparatuses and systems, it is preferable that the communication means, the storage means, and the image processing means are realized on a single integrated circuit.

(Operation) According to the present invention, when the communication means receives data arriving via the communication line, the communication means determines whether or not the data is image data in accordance with a reception operation such as frame decomposition. . At this point, when the received data is identified as image data, the communication unit stores the data in the storage unit without any trouble to the data processing device such as the general-purpose processor, and simultaneously starts the image processing device. . As a result, the received image data is immediately subjected to a predetermined process. As described above, according to the present invention, since the image processing of the received image data is started without the intervention of the data processing device, the time spent for handshaking between the processors is reduced, and a large amount of image data is Response performance of a file access accompanied by the transfer of the data can be improved.

When the communication means, the storage means, and the image processing means are formed on a single integrated circuit, a synchronization establishing operation involving a handshake for eliminating clock skew becomes unnecessary. or,
Since all data transfer between these units is performed within the chip, the data transfer speed between these units can naturally be increased. From these, higher-speed operation can be achieved.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of one terminal device of a distributed processing system according to one embodiment of the present invention. This terminal device corresponds to, for example, an EWS in a LAN. Therefore, here, the most common IEE
The CSMA / CD system standardized by E802.3 will be described as an example.

The terminal device includes a communication control device 11, a host processor 12,
A frame buffer memory 13, a system memory 14, and an input / output device (I / O) 15 are connected to each other by an internal bus 16, and a VDT 17 is directly connected to the communication control device 11.

The improved communication control device 11 in the present embodiment controls communication with the communication line 18 in the same manner as in the related art, and also has a function of identifying whether or not received data involves image processing, and a function of receiving received image data. It has an image processing function for immediately performing image processing on data. This communication control device 11
For example, a communication processor 20, a local memory 21, and an image processing processor 22 are configured in a single chip. The communication processor 20 transmits the transmission data to the CSMA
/ CD assembled into a MAC frame and sent to the communication line 18,
In addition to the functions of the conventional communication dedicated processor, such as collision detection, retransmission processing, and frame decomposition of received data, decoding of, for example, a head portion of frame-decomposed received data to determine whether the data is image data, It also has a function of performing different processing according to the determination result. When the received data is image data, the local memory 21 sequentially stores the received data provided from the communication processor 20. The local memory 21 is formed of, for example, a dual port memory, and receives access from both the communication processor 20 and the image processing processor 22. The image processing processor 22 is sequentially activated by the communication processor 20 and sequentially reads out the image data stored in the local memory 21, performs predetermined image processing, and sequentially supplies the processed data to the VDT 17 for display.

In addition, the host processor 12 in this terminal device
Each unit is controlled based on a program stored in the system memory 14, and, for example, arithmetic processing and the like are performed on the data that does not accompany the image processing stored in the frame buffer 13 via the communication processor 20. Note that a plurality of host processors 12 may be provided in order to improve the operation speed, or may be used in combination with a coprocessor dedicated to numerical calculations.

FIG. 2 shows the MAC of the CSMA / CD system used in this embodiment.
Indicates a frame. In this embodiment, the configuration of the MAC frame itself is not changed at all. However, the LLC data section in which the original data is arranged is arranged so that if it is image data, an image processing instruction is always arranged at the head thereof.

Next, the communication procedure of this system will be described with reference to the flowchart of FIG.

First, when a frame is transmitted, as shown in FIG.
Then, a frame as shown in FIG. 2 is assembled by adding necessary header information to the data given from (1) (St. 1).
Then, it is determined whether or not a frame transmitted by another system is transmitted on the communication line 18, that is, whether or not the frame can be transmitted from the image communication control system (St.
2) If the frame cannot be transmitted, the process waits until transmission becomes possible. When the frame can be transmitted to the communication line 18, the transmission of the frame is started (St.
3). It monitors the presence or absence of collision between frames on the communication line 18 that occurs when a frame is transmitted from another terminal device between the time when the terminal device starts transmitting the frame and the time when the transmission ends. 4 and St. 5). If there is no frame collision, the transmission of the frame is terminated (St.
6). If the frame transmitted by the terminal device collides on the communication line 18, the transmission becomes a jamming transmission (St. 7), and the number of trials is counted up (St. 8).
The number of trials is compared with the maximum number of trials (St. 9). If the number of trials exceeds a predetermined number, the frame transmission is stopped because it is determined that the number of collisions is excessive (St. 10). Otherwise, after waiting for the back-off time calculated for the frame (St.11 and St.12), the data is retransmitted (St.2).

On the other hand, at the time of receiving a frame, FIG.
The procedure shown in FIG. For example, assuming that this terminal device accesses a file,
The host processor 12 first stores a storage medium (not shown) connected to the communication line 18 via the communication processor 20.
And sends a required image data request command based on the above-described procedure. In response to this, after a certain time lag, the terminal provided with the recording medium transmits the framed image data to the terminal device. The communication processor 20 establishes synchronization with the preamble signal and starts receiving the data (St. 20). Then, the entire frame is received (St. 21). If the frame is not longer than the minimum frame length, the next reception is waited (St.22
And St.23). If the length of the frame is longer than the minimum frame length and the frame is data transmitted to the own station, it is determined whether the data is valid based on a frame check sequence of the frame. (St.24). If the data is invalid, it is determined whether or not the input frame has excess bits (St.2
Five). If it is determined that the bits are excessive, the frame is determined to be an excessive bit error (St. 26). If it is determined that the bits are not excessive, the frame check sequence
Stop the frame reception operation with an error (St.2
7). If the input frame check sequence is valid, it is determined whether or not the frame length designation section is valid (St.28). At this time, if it is determined that the frame is not valid, the frame reception operation is stopped with the frame as a length error (St.29). If the frame length specification part is valid, after the frame is decomposed (St.30), the third
The processing shown in FIG. That is, the first instruction in the information part of the received frame is decoded, and it is determined from the decoded contents whether the data is data requiring image processing (St. 31). If the data does not require image processing, the data is transferred to the frame buffer memory 4 via the internal bus 16 (St.3).
2). On the other hand, if the data is image data that requires image processing, the communication processor 20 sends a start command to the image processing processor 22 (St. 33), and at the same time, transmits the frame-decomposed image data. Transfer to the local memory 21 (St.34). Thus, the image processing operation on the image data is started immediately after the reception of the image data (St. 35).

The present invention is not limited to the embodiments described above. For example, in the above embodiment, the communication processor is CS
Although the case where MAC frames are transmitted and received based on the MA / CD method has been described, other protocols other than the CSMA / CD method, such as a token ring and a token bus, may be used.

In addition, the image processing processor may perform processing such as affine transformation and high-speed development of characters (fonts) required when rotating a figure, in addition to image processing such as shading processing. Further, since the affine transformation requires numerical calculation, the above-described numerical calculation coprocessor can be realized as an integrated circuit.

Also, the description has been made on the assumption that the local memory is basically accessed from the communication processor and the image processing processor. However, when the host processor 12 needs to access the local memory 20, the communication processor 20 and the The composite processor including the image processing processor 22 can appropriately respond to an interrupt from the host processor 25. If the local memory 21 is a multi-port RAM having three or more ports, the host can access the composite processor without hindering access. The processor 12 can access the local memory 21.

In the case of a complete raster file transfer, the contents stored in the local memory 21 are supplied to the VDT 17 through the image processing processor 22. At this time, if the image processing processor 22 is provided with a DMA function, data can be continuously transferred from the local memory 21 at a timing at which memory access is possible. In the present invention, it is assumed that such a DMA function is included in the predetermined processing.

Further, by providing a cache memory as a part of the local memory 21, if the access time between the image processing processor 22 and the local memory 21 is further reduced, higher-speed processing becomes possible.

Also, here, a plurality of dedicated processors for different purposes are configured on the same integrated circuit, but it is also conceivable to realize them on separate integrated circuits. In this case, when the entire communication control device is operated by a single system clock, it is desirable to synchronize by handshaking in order to eliminate the influence of clock skew.

In addition, it goes without saying that various modifications can be made without departing from the spirit of the present invention.

According to the present invention, a communication processor and an image processing processor are organically coupled to each other, and a predetermined process is immediately performed on received data to be subjected to image processing. It is possible to provide a communication control device capable of shortening the time and performing high-speed processing involving a large amount of data transfer and image processing, and a distributed processing system using the same.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a configuration of one terminal device in a distributed processing system according to an embodiment of the present invention. FIG. 2 is a diagram showing a configuration of a frame transmitted and received by the system. FIG. 3 is a flowchart showing a processing operation of a communication processor in the apparatus, and FIG. 4 is a view showing a configuration of one terminal device of a conventional distributed processing system. 11: Communication control device, 12, 31, Host processor, 13
…… Frame buffer, 14 …… System memory, 15,37
…… I / O, 16,38 …… Internal bus, 17,39 …… VDT, 18,32…
… Communication line, 20,33… Communication processor, 21… Local memory, 22,35… Image processing processor, 34…
Frame buffer, 36 ... Image memory.

Claims (3)

(57) [Claims] 1. A communication control device interposed between a communication line and a data processing device for controlling communication between the communication line and the data processing device, comprising: a communication unit, a storage unit, and an image processing unit. The communication means receives data arriving via the communication line, determines whether the received data is image data, and if the received data is image data, When the received data is not image data, the image processing means outputs the data to the data processing device when the received data is not image data. A communication control device for reading data from said storage means and performing a predetermined process without going through a processing device. 2. The communication control device according to claim 1, wherein said communication means, storage means and image processing means are formed on a single integrated circuit. 3. A distributed processing system wherein a plurality of the communication control devices according to claim 1 are connected to a communication line.