JP2593866B2 - Video signal transmission device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A Industrial Field of Use B Outline of the Invention C Prior Art D Problems to be Solved by the Invention E Means for Solving the Problems (FIG. 1) F Function G Embodiment G ₁ Description of Transmitter G ₂ BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal transmitting apparatus suitable for transmitting a video signal using, for example, a general public telephone line having a narrow transmission frequency band. .

B SUMMARY OF THE INVENTION The present invention relates to a video signal transmission apparatus, in which the transmitting side expands the video signal on the time axis and then AM-modulates the signal, and the receiving side applies AGC to the transmission signal and then performs AM detection. By obtaining the video signal by compressing the time axis, it is possible to achieve a low-cost configuration and obtain good image quality.

C Prior Art In recent years, demand for so-called videophones that transmit not only audio signals but also video signals has been increasing.
Many of the videophone systems proposed in the past are systems using a so-called modem used for digital data transmission.

D Problems to be Solved by the Invention In order to spread the videophone to general users, it is necessary to supply an inexpensive system. However, the system using the above-described modem is expensive as a whole because the modem is expensive. This is an obstacle to the spread of telephones.

In addition, when targeting general users, it is an essential condition at the present stage to use a general public telephone line as a signal transmission line. However, the transmission frequency band of a general public telephone line is as narrow as 300 to 3400 Hz, and the time required to transmit one image becomes longer even when an expensive modem is used. Therefore, it is necessary to compress the transmission data by using the image processing technique, but this disadvantageously makes the system more expensive.

The present invention has been made in view of such a point, and is particularly configured to be inexpensive.

E. Means for Solving the Problems The present invention provides a time base expander for expanding the time axis of a video signal and an AM signal by adding a predetermined level index signal to a predetermined period before an output signal of the time base expander. A transmission device including a transmission signal former that modulates and forms a transmission signal, a signal transmission unit that transmits a transmission signal from the transmission device, and an AGC amplifier to which a transmission signal transmitted by the signal transmission unit is supplied, An AM detector to which the output signal of the AGC amplifier is supplied, a digital memory circuit constituting a time axis compression circuit to which the output signal of the AM detector is supplied, a reference for the level of the index signal in the output signal of the AM detector An error detector for detecting an error with respect to the level and a level comparator for comparing the level of the index signal in the output signal of the AM detector with the reference level are provided. The index in the output signal of the AM detector is provided. When the error detector controls the gain of the AGC amplifier so that the signal level matches the reference level, and when the level comparator detects that the index signal level does not match the reference level, A video signal transmission device including a receiving device that controls a digital memory circuit by a level comparator so as to prohibit writing of an output signal of an AM detector to the digital memory circuit.

According to the present invention, the transmitting device expands the time axis of the video signal by the time axis expander, and adds an index signal of a predetermined level to a predetermined period before the expanded video signal on the time axis. Modulation to form a transmission signal. This transmission signal is transmitted to the receiving device by the transmission means. On the receiving device side, the transmission signal is supplied to the AM detector through the AGC amplifier, and the output signal is supplied to the digital memory circuit constituting the time axis compression circuit. The error detector detects an error with respect to the reference level of the index signal in the output signal of the AM detector, and the AGC detects that the level of the index signal in the output signal of the AM detector matches the reference level. Controls amplifier gain. The level comparator compares the level of the index signal of the output signal of the AM detector with the reference level. If it is detected that the level of the index signal does not match the reference level, the level of the output signal of the AM detector is detected. The digital memory circuit is controlled by the level comparator so that writing to the digital memory circuit is prohibited.

G Embodiment Hereinafter, an embodiment of the present invention will be described with reference to FIG. This example is an example applied to a video telephone system using a general public telephone line.

Falling in FIG. 1 explained in G ₁ transmission apparatus, (100) shows a transmitting device. _A video signal SV _A having a frequency band of 0 to 1.5 MHz from a video camera (1) is converted into a digital signal by an A / D converter (2), and then is a field memory (3) composed of a RAM.
Is supplied as a write signal. In this case, the A / D converter (2) and the field memory (3) are supplied with the write clock signal HCLK of 3 MHz, and the field memory (3) has a capacity of 64 Kbits, A video signal for one field of 160 dots, 4 bits per sample for 100 lines in the vertical direction, is written.

In addition, a field memory (3) controls a system controller (not shown) by a user's operation.
The video signal written as described above is read, and D /
It is supplied to the fixed terminal on the B side of the switching switch (5) via the A converter (4). In this case, the field memory (3)
The read clock signal LCLK of 2 KHz is supplied to the D / A converter (4), and reading is performed from the field memory (3) at a speed 1/1500 times as fast as the writing, and the D / A converter (4) is read. ) frequency band of the video signal SV _B from the 0~1000Hz
It is said. FIG. 2B shows this video signal SV _B ,
The hatched portions in the figure have levels corresponding to the contents of the video signal.

A fixed terminal on the A side of the changeover switch (5) is supplied from the system controller as shown in FIG.
Index signal S _ID to a black level before and after a predetermined period of time of SV _B are supplied. For example, the index signal S _ID is a black level period T _{1 of 1} second, a 0 level period T ₂ of 0.2 seconds, and a black level corresponding to 160 cycles of a carrier described later immediately before the period T ₀ of the video signal SV _B. and it has a level period T _3, the video signal SV _B period T ₀ of the above 224 cycles of the carrier that will be described later immediately after, in the present embodiment is made to have a black level period T ₄ corresponding to 224 cycles.

Selector switch (5) is switching control by the system controller, the period of the video signal SV _B is supplied to the B-side of the terminal is connected to the B side, the other period is connected to the A side. Therefore, a signal SVC as shown in FIG. _2C is output from the changeover switch (5). The signal SV _C output from the changeover switch (5)
Is supplied to an AM modulator (6) and AM-modulated, and a transmission signal _STR as shown in FIG. 2D is output from the AM modulator (6). The periods T ₁ , T _3, and T ₄ of the transmission signal _STR are substantially unmodulated carrier portions without level fluctuation. In this case, a frequency signal of 2 KHz synchronized with the read clock signal LCLK is supplied to the AM modulator (6) as a carrier. Therefore, the the presence of 2000 cycles of the carrier period T ₁ of the transmission signal S _TR.

Since the frequency band of the video signal SV _B is a 0～1000Hz, the frequency band of the transmission signal S _TR becomes 1000～3000Hz.

The transmission signal _STR output from the AM modulator (6) is supplied to a speaker (8) constituting an acoustic coupler via a speaker amplifier (7).

The voice of the speaker (8) is supplied to the transmitting side of the handset (9a) of the telephone (9). Therefore, the transmission signal _STR is supplied to the general public telephone line (11) via the telephone (9). The transmission frequency band of this telephone line (11) is, for example,
Is ranging from 300 to 3400 Hz, since the transmission signal S _TR contrast with a frequency band of 1000~3000Hz As described above, the transmission signal S _TR may transmitted by a telephone line (11).

Description of G ₂ receiving apparatus also, (200) shows a receiving device. Reference numeral (21) denotes a telephone on the receiving side, which is connected to the telephone line (11). Sound corresponding to the transmission signal S _TR from the receiving side of the handset of the telephone set (21) (21a) is supplied to the microphone (22) constituting the acoustic coupler, the transmission signal S _TR from the microphone (22) Is output. The transmission signal _STR from this microphone (22) is
3) is supplied to the AGC amplifier (24). The transmission signal _STR output from the AGC amplifier (24) is supplied to an AM detector (25), and the output signal of the AM detector (25) is supplied to a low-pass filter (26). (26) signal SV _C is output from. In this case, the output signal of the AGC amplifier (24) is obtained around the voltage V ₀ (e.g. + 4V), the signal SV _C output from the low-pass filter (26) Accordingly, the voltage V ₀ as a reference (the lowest level) .

RA After this signal SV _C from the low-pass filter (26) is converted is supplied to the A / D converter (27) into a digital signal
It is supplied as a write signal to a field memory (28) made of M. In this case, the A / D converter (2
7) and the field memory (28) contain 2
KHz of the write clock signal LCLK is supplied, and with are those having a capacity of 64K bits (16384 dots) minutes in the field memory (28), the field memory (28) during the period of the signal SV _C as described later T ₃ since it is the between the write enable state through T _4, the field memory (28) the video signal SV _B is written.

Further, the field memory (28), at the monitor at the output of the after picture signal SV _B is written as described above, as described later in this field memory (28) 3M
Since the read clock signal HCLK of Hz is supplied, reading is performed from the field memory (28) at a speed 1500 times faster than the writing time, and the output signal of the field memory (28) is output from the D / A converter (29). ). The D / A converter (29) also is supplied 3MHz of the read clock signal HCLK, a video signal SV _A of one field having a frequency band of 0~1.5MHz from the D / A converter (29) Output repeatedly. Then, this video signal SV _A is output to an output amplifier (3
0) to the monitor receiver (31).

The transmission signal S output from the AGC amplifier (24)
_TR (shown in FIG. 3A, the hatched portion in FIG. 3 is a level corresponding to the content of the video signal) is a comparator (37) via a band-pass filter (36) having a center frequency of 2 KHz.
, And is compared with the reference voltage V _{0. From the} comparator (37), when the transmission signal _STR is higher than the reference voltage V ₀ , the transmission signal _STR becomes a high level “1” (for example, +5 V), and when the transmission signal _STR is the opposite, the low level “ A signal which becomes 0 "(for example, 0V) is output. Therefore, from the comparator (37), the third
As shown in FIG. B, the period T _1, T ₂ ~T ₄ a square wave signal S _A frequency 2KHz synchronized with the carrier is output. However, it is assumed that the noise N is present in the period T _2. After this square wave signal S _A from the comparator (37) which is only 1/4 period phase in the phase shifter (38), is supplied as a clock signal LCLK to the A / D converter (27), switching It is supplied to the fixed terminal on the W side of the switch (39). A 3 MHz clock signal HCLK is supplied to a fixed terminal on the R side of the changeover switch (39). The changeover switch (39) is switch-controlled by a system controller (not shown), and is connected to the W side during reception and to the R side during monitor output. Therefore, the field memory (28) contains
At the time of reception, while a clock signal LCLK of 2 KHz is supplied,
At the time of monitor output, a 3 MHz clock signal HCLK is supplied.

The transmission signal S _TR output by the AGC amplifier (24)
(Shown in FIG. 3A) is supplied to a comparator (42) via a band-pass filter (36) and compared with a reference voltage. From the comparator (42), when the transmission signal _STR is larger than the reference voltage, High level "1" (for example, + 5V)
In the opposite case, a signal of low level “0” (for example, 0 V) is output. In this case, the reference voltage is changed as shown by a broken line in FIG. 3A. That is,
In FIG. 1, (43) and (44) indicate that the voltage value is V _{C, respectively.}
+ V _S2 (for example, +5 V) and V ₀ + V _S1 (for example, +4.1 V). These voltage sources (43) and (44) have a negative terminal grounded and a positive terminal connected to the A of the changeover switch (45). The voltage obtained at the output side of the changeover switch (45) is supplied to the comparator (42) as a reference voltage.
Then, this is the change-over switch (45), the high level "1" during the period T ₃ through T _4, other periods may be supplied as a signal that becomes a low level "0" switching control signal, the changeover switch (4
5) is connected to the A and B sides when this signal is at high level "1" and low level "0", respectively. Therefore, the reference voltage is changed as shown by the broken line in FIG. 3A. Thereby, the third signal is output from the comparator (42).
As shown in FIG. C, period T _1, T ₃ ~T ₄ square wave signal 2KHz synchronized with the carrier S _B is output.

Also, the square wave signal S from this comparator (42)
_B (shown in FIG. 4A) is supplied to a monomultivibrator (46) with a delay time of 0.03 seconds and a monomultivibrator (47) with a delay time of 0.22 seconds. Mono multi vibrator (4
From 6), the period T _1, T ₃ through T ₄ between the high level "1", the other period signals S ₂ which becomes the low level "0" (shown in FIG. 4 B)
Is obtained. In addition, this mono multivibrator (46)
T of the signal S ₂ output from the T flip-flop (48)
Is supplied to the terminal, the output terminal Q of the T flip-flop (48), the period T _1, T between _two high level "1", the other period signal S ₃ becomes low level "0" (the 4 shown in FIG. D). The signal S ₂ output from the monostable multivibrator (46) is supplied to the inverter and the circuit after being inverted by (49) (50). Further, T flip-flop (48) is the signal S ₃ obtained at the output terminal Q of the delay time is 0.
Is supplied to 5 seconds monostable multivibrator (51), the signal S ₄ the things from multivibrator (51) is high level "1", other periods in the first half period of the period T ₁ is to be the low level "0" (4 illustrated in FIG. E) is obtained, the signal S ₄ is supplied to the aND circuit (50). And And Circuit (50)
Signal output from is supplied to an OR circuit (52), memory full signal S ₅ from the field memory (28) to the OR circuit (52) (shown in FIG. 4 F) is supplied,
The signal output from the OR circuit (52) is supplied to the mono multivibrator (47) as a clear signal. As described below, the field memory (28), the writing from the beginning of the period T ₃ of the signal SV _C made, so that the 64K bit (16384 dots) content is written at the end of period T ₄ because, the memory full signal S ₅ is output immediately after the time period T _4. Therefore, the monostable multivibrator (47), a high level during a period T ₁ through T ₄ "1", the other period signal S ₆ to the low level "0" (shown in FIG. 4 C) is obtained.

The output signal of the AGC amplifier (24) is obtained around the voltage V ₀ (e.g. + 4V), thus the signal SV _C output from the low-pass filter (26), the voltage V ₀ as a reference (the lowest level) . Here, the dynamic range of the A / D converter (27), since it is a V ₁ ~V ₂ (e.g. + 4.05V~ + 5V), the signal output from the low-pass filter (26)
The maximum level portion of the SV _C , that is, the black level portion is regulated to be the voltage V ₂ . That is, the signal SV _C output from the low-pass filter (26) is compared with the reference voltage V ₂ is supplied to the error amplifier (33). And this error amplifier (33)
Comparison error signal from being supplied to the sample-and-hold circuit (34), comparing the error signal in the period T ₁ of the signal SV _C is sampled and held. Then, this by the output signal of Sapuru hold circuit (34) the gain of the AGC amplifier (24) is controlled, the maximum level portion of the signal SV _C to be eventually outputted from the low-pass filter (26), i.e. the black level portion voltage V ₂ (FIG. 6A). And this time, the white level portion is made to the voltage V _1. In other words, the white level - black level of the video signal SV _B is made to coincide with the dynamic range of the A / D converter (27).

For example, the parts of the error amplifier (33) and the sample hold circuit (34) are specifically configured as shown in FIG. 5, and the output side of the error amplifier (33) configures the sample hold circuit (34). The connection point of the connection switch (34a) and the capacitor (34b) is grounded through a series circuit of the connection switch (34a) and the capacitor (34b) for holding, and the connection point of the AGC amplifier (24) is connected through the buffer (34c). Connected to control signal input terminal. Reference numeral (34d) denotes a voltage source for preset gain adjustment. The negative terminal of the voltage source (34d) is grounded, and its positive terminal is connected via a connection switch (34e) to a connection switch (34a) and a capacitor (34b). ) Is connected to the connection point. A signal S ₄ (illustrated in FIG. 4E and FIG. 6C) output from the monomultivibrator (51) is supplied to the connection switch (34a) as a control signal, and the connection switch (34a) when the signal S ₄ is at a high level "1" and the low level "0", are respectively turned on and off.
A signal S ₆ (shown in FIGS. 4C and 6B) output from the monomultivibrator (47) is supplied to the connection switch (34e) as a control signal, and the connection switch (34e) when the signal S ₆ is high level "1" and the low level "0", are respectively turned on and off.

Therefore, in the periods other than the period T ₁ through T _4, the connection switch (34a) is turned off, the connection switch (34e) so are turned on, voltage connection switch from a voltage source (34d) (34e),
It is supplied to the AGC amplifier (24) via the buffer (34c),
The AGC amplifier (24) has a constant gain. Also, period T
_{In 1} , the connection switch (34a) is on and the connection switch (34
e) is turned off, so that the comparison error signal from the error amplifier (33) is supplied to the AGC amplifier (24) via the connection switch (34a) and the buffer (34c), and the gain of the AGC amplifier (24) is adjusted. Controlled. That is, the signal SV _C the gain is small when greater than the voltage V _2, whereas the gain when the signal SV _C is less than the voltage V ₂ is large. Therefore, the signal SV _C is quickly controlled to be equal to voltage V ₂ (see FIG. 6 A). Furthermore, comparison from the period T ₂ through T _4, the connection switch (34a) is turned off, the connection switch (34e) so also are turned off, the error amplifier is held in the capacitor (34b) in a period T ₁ (33) The error signal is buffered (34
c) to the AGC amplifier (24) and the AGC amplifier (2
4 gain) is held on the gain set by the period T _1. Thus the maximum level portion of the signal SV _C output from the low-pass filter (26), i.e. the black level portion voltage V ₂
It is controlled so that

The signal SV output from the low-pass filter (26)
_C is supplied to an inverting input terminal of the operational amplifier (53), and a reference voltage V ₂ + V _S3 (for example, +5.25 V) is supplied to the non-inverting input terminal. From the operational amplifier (53), the signal is outputted as a high level "1" when the low level "0", whereas less than the reference voltage V ₂ + V _S3 when the signal SV _C is greater than the reference voltage V ₂ + V _S3 . The signal SV _C output from the low-pass filter (26) is supplied to the non-inverting input terminal of the operational amplifier (54), the reference voltage V ₂ -V _S3 to its inverting input terminal (e.g., + 4.75V) Supplied. From the operational amplifier (54), the signal SV _C high level "1" when it is greater than the reference voltage V ₂ -V _S3, whereas when smaller than the reference voltage V ₂ -V _S3 is output signal which becomes a low level "0" Is done. Further, the output side of the operational amplifier (53) and (54) are connected to each other, a signal S ₇ obtained in the connection point is supplied to a NAND circuit (55).
In this case, as described above, the gain of the AGC amplifier (24) is controlled properly, when the maximum level portion of the signal SV _C, that is, the black level portion is controlled such that the voltage V ₂ is
Signal S ₇ is as shown in FIG. 4 H. Note that a portion indicated by oblique lines becomes a high level "1" or low level "0" by the contents of the video signal SV _B.

A signal S ₃ (shown in FIG. 4D) obtained at an output terminal Q of the T flip-flop (48) is supplied to the NAND circuit (55), and a mono multivibrator (5
The signal S ₄ (shown in FIG. 4E) output from 1) is supplied after being inverted via an inverter (56). Then, the signal S ₈ output from the NAND circuit (55), for example the time constant is inverted and the waveform shaping by the inverter (58) after being integrated by the order of 0.5 second integrator (57), the inverter (58 ) signal S ₉ output from is supplied to a D terminal of the D flip-flop (59). The D signal S ₂ output from the monostable multivibrator (46) to a clock terminal CLK of the flip-flop (59) is supplied after being inverted by an inverter (60). Then, the signal S ₁₀ obtained at the output terminal Q of the D flip-flop (59) is supplied to the AND circuit (61). In this case, the operational amplifier (53) and (54) of the output side of the signal S ₇ obtained at the connection point Figure 4 H
When as shown in the signal S ₈ output from the NAND circuit (55) is as shown in FIG. I, the inverter (58)
As shown in the output signal S ₉ of FIG J from. still,
The broken line shows the output signal of the integrator (57). After all, D
The signal S obtained at the output terminal Q of the flip-flop (59)
₁₀ is as shown in FIG.

A signal S ₃ (shown in FIG. 4D) obtained at an output terminal Q of the T flip-flop (48) is supplied to the AND circuit (61) after being inverted by the inverter (62), A signal S ₆ (shown in FIG. 4C) output from the multivibrator (47) is supplied. Then, the signal S ₁₁ output from the AND circuit (61) is supplied as a switching control signal to the change-over switch (45) is supplied to a field memory (28) as a write control signal. The change-over switch (45) when the signal S ₁₁ is high level "1" and the low level "0", are respectively connected to the A side and B side. The field memory (28)
When S ₁₁ is high level "1", it is a writable state. In this case, when the signal S ₁₀ obtained at the output terminal Q of the D flip-flop (59) is shown in FIG. 4 K, the signal S ₁₁ output from the AND circuit (61) the drawing G
High level "1" during the period T ₃ through T ₄ as shown in, a low level "0" in other periods. Therefore, as described above, the field memory (28) during the period T ₃ through T ₄ including period T ₀ of the video signal SV _B is a writable state, the reference voltage supplied to the comparator (42) Is the third
It is made to change as shown by the broken line in FIG.

This embodiment is constructed as described above, the transmitting apparatus (100) side, the frequency band of the 0~1000Hz video signal SV _A is time-base-decompressed field memory (3) having a frequency band of 0~1.5MHz is a video signal SV _B having. Then, an index signal S _ID (shown in FIG. 2A), which becomes a black level, is added for a predetermined period before and after the period of the video signal SV _B (shown in FIG. 2B), and the signal SV _C (FIG. 2C) is added. Is formed in the AM modulator (6) and the field memory (3)
2K carrier synchronized with the read clock signal LCLK is supplied and AM-modulated to form a transmission signal S _TR (shown in FIG. 2D) having a frequency band of 1000 to 3000 Hz.

Then, the transmission signal S _TR formed on the transmission device (100) side
Is supplied to the receiving device (200) via a telephone line (11) having a transmission frequency band of, for example, 300 to 3400 Hz.

Then, on the receiving device (200) side, the transmission signal _STR is
After the level is controlled by the amplifier (24), the signal is detected by the AM detector (25), and the signal SV _C (see FIG. 6A) is obtained from the low-pass filter (26). In this case, the signal SV _C is the voltage V ₀
Is the reference (lowest level). And this signal SV _C
Period T ₁ of the portion of is compared with the reference voltage V ₂ at the error amplifier (33), the comparison error signal sample-and-hold circuit (34)
Supplied to the AGC amplifier (24) via the AGC amplifier (24)
The gain of which is controlled, the maximum level portion, i.e., the black level portion voltage V _2, and the white level - black level of the signal SV _C output from the low-pass filter (26) of the signal SV _C is, A / D converter comes to coincide with the dynamic range V ₁ ~V ₂ vessels (27).

The signal SV output from the low-pass filter (26)
_C is supplied as a write signal to the field memory (28) via the A / D converter (27). In this case, the transmission signal _STR output from the AGC amplifier (24) is
It is supplied to 7), from the comparator (37), synchronized with the carrier signal SV _C periods T _1, T ₃ signals corresponding to through T ₄ S _A
(Shown in FIG. 3B) is obtained, and a clock signal LCLK obtained by shifting the phase of the signal S _A by 周期 period is supplied to the A / D converter (27). The data is supplied to the field memory (28) via the memory. The AGC amplifier (2
The transmission signal S _TR outputted from 4) is supplied to the comparator (42), from the comparator (42), synchronized to the carrier, the period T ₁ of the signal SV _C, T ₃ corresponding to through T ₄ signal S _B (Third
Figure C in the figure) is obtained, this signal S period T ₁ of the signal SV _C from mono-multivibrator (46) on the basis of _B, T ₃ between the through T ₄ is high level "1", other periods of low level "0" signal which becomes S ₂ (shown in FIG. 4 B) is obtained, also from monostable multivibrator (47) on the basis of the signal S _B, the period of the signal SV _C T
₁ through T ₄ at a high level "1", the other period signal S ₆ to the low level "0" (shown in FIG. 4 C) is obtained. Then, the signal S ₂ T flip-flop (48) is operated by, from the T flip-flop (48), during the period T _1, T ₂ of the signal SV _C is high level "1", other times the low-level A signal S ₃ (shown in FIG. 4D) that becomes “0” is obtained. Therefore, the AND circuit (61), during the period T ₃ through T ₄ is high level "1", other signals S ₁₁ periods of a low level "0" (shown in FIG. 4 G) is obtained . Then, this signal S ₁₁ is supplied to the field memory (28), this signal S ₁₁ is the duration field memory high level "1" (28) is a writable state. Thus, the field memory (28), the portion of the period T ₃ through T ₄ of the signal SV _C, including a video signal SV _B are sequentially written.

In the field memory (28), a read clock signal HCLK of 3 MHz is supplied to the changeover switch (3
9), and 0-1.5M from D / A converter (29)
Video signal SV _{A for} one field having a frequency band of Hz
Are repeatedly obtained, and this video signal SV _A is output from an output amplifier (3
0) to the monitor receiver (31)
A still image is displayed on the monitor receiver (31).

In this example, when the 2 KHz signal output from the comparator (42) is not output continuously for 0.5 seconds or more, the signal output from the mono multivibrator (46) is output.
S ₂ is low level "0" in the first half period of the period T _1, the signal of high level "1" is outputted from the AND circuit (50),
A monostable multivibrator (47) is cleared, the output signal S ₆ becomes low level "0". Therefore, the output signal S ₁₁ is low level "0", and a field memory (28) of the AND circuit (61) is not a write enable state, writing is not performed.

In this example, even when the 2 KHz signal output from the comparator (42) is continuously output for 0.5 seconds or more,
In the absence period T ₂ carrier rest period 0.22 seconds or more corresponding 0.03 seconds, the output signal S ₁₁ of the AND circuit (61)
Becomes low level "0", the field memory (28) is not in a writable state, and writing is not performed. That is, the output signal S ₂ is temporarily high monostable multivibrator when the carrier rest period is less than 0.03 seconds (46) "1"
And it remains not become the low level "0", since the remains of the T flip-flop (48) once the high-level signal S ₃ obtained at the output terminal Q of "1" when it comes to as high level "1",
The output signal S ₁₁ of the AND circuit (61) is low level "0", whereas, when the carrier suspension period of more than 0.22 seconds,
Since the output signal S ₆ of the mono-multivibrator (47) is a low level "0", the output signal S ₁₁ of the AND circuit (61) is because a low level "0".

Therefore, when the signal transmitted over the telephone line (11) is other than the transmission signal _STR , the field memory (2
The signal is not written in 8).

In the present embodiment, AGC amplifier in the first half period of the period T ₁ (2
When the gain of 4) is not controlled properly, the signal S ₇ obtained at the output side of the connection point of the operational amplifier (53) and (54) in the second half period of the period T ₂ are a low level "0", this time NAND the output signal S ₈ of the circuit (55) becomes high level "1". Accordingly, the signal S ₁₀ obtained at the output terminal Q of the D flip-flop (59) will remain low level "0", the output signal S ₁₁ is low level "0" of the AND circuit (61), and
The field memory (28) is not in a writable state and no writing is performed. That is, the field memory (28)
In this case, the gain of the AGC amplifier (24) is not correctly controlled, and the video signal is not written in a defective state.

As described above, according to this example, since the video signal is subjected to AM modulation after being extended on the time axis and transmitted to the receiving device (200), transmission efficiency can be improved and the cost can be reduced. On the receiving device (200) side, AGC is _added to the transmission signal STR.
After that, the video signal is obtained by AM detection and further time-axis compression. The attenuation by the telephone line (11) is corrected, and an image of good image quality (particularly contrast) can be obtained. When the AGC is defective, the transmission signal S _TR
When other signals are transmitted, no signals are written into the field memory (28), so that an image of good image quality can be obtained by only a good video signal. Further, according to the present example, the clock signal LCLK supplied to the A / D converter (27) of the receiving device (200) is a signal synchronized with the carrier, so that the output signal SV _C of the low-pass filter (26) is output. Has peaks and valleys of 4 KHz, but it is not affected by sampling at a fixed position. In particular, the present embodiment, since the clock signal LCLK that is 1/4 period phase signal S _A, the peak portions are sampled, it is possible optimum sampling.

By the way, a video telephone system for transmitting an AM modulated signal to a receiving side using a telephone line is described in JP-B-42-27496. In this system, a video signal is converted into a pulse code and then converted. This is a method in which the signal is AM-modulated and transmitted, which is completely different from the method in which the video signal is transmitted as it is by AM modulation as it is originally.

In the above embodiments, the index signal S _ID is a video signal to be added to the video signal SV _B in the transmission apparatus (100) side
It is the same level as the maximum level of SV _B ,
The level may be another level, and it is necessary that the level be constant. Further, the delay time of the mono-multi vibrators (46), (47) and (51) in the above-described embodiment is an example, and is not limited to this. Further, the format of the transmission signal _STR is also an example, and the present invention is not limited to this. In other words, in addition to the video signal part, a signal that distinguishes the video signal from other signals, a signal that indicates the start of the video signal part, indicates the dynamic range of the transmission signal, and if the signal that is the reference for AGC is multiplexed Good.

Further, in the above-described embodiment, the writing to the field memory (28) of the receiving device (200) is configured to be controlled by hardware, but the writing is controlled by software using a microcomputer. May be configured.
In this case, for example, the output signal S ₂ of the monostable multivibrator (46), the output signal S _B of the comparator (42), an operational amplifier (53) and (54) output connection point the signal S ₇ and the like obtained in the in the microcomputer The write control and the changeover switch (45) of the field memory (28) are supplied as in the embodiment.
Is controlled.

Further, in the above-described embodiment, the transmitting device (100) and the receiving device (200) are provided with the acoustic coupler. However, although not shown, the transmission signal _STR is directly transmitted without using the acoustic coupler. Supply to telephone line (11) or telephone line (1
1) It can be configured to obtain more transmission signals.

Further, in the above-described embodiment, the AM modulation may be in any form such as DSB, SSB, VSB other than simple AM modulation.

In the above embodiment, the A / D of the transmitting device (100)
A time base expander is constituted by the converter (2), the field memory (3), and the D / A converter (4). A video camera (1) having a function of the time base expander is used. You can also. For example, in a CCD camera, the time width can be easily extended by controlling the transfer clock.

H Effects of the Invention According to the present invention described above, after a video signal is expanded in time axis, a transmission signal obtained by AM modulation is transmitted to a receiving side by a signal transmission means, so that transmission efficiency is improved, Moreover, an inexpensive video signal transmission device can be obtained without using an expensive modem. On the transmitting side, a transmission signal is obtained by adding an index signal of a predetermined level to a predetermined period before the video signal expanded on the time axis and performing AM modulation to obtain a transmission signal. On the reception side, the transmission signal is subjected to an AM detector through an AGC amplifier. Supply to
The output signal of the AM detector is supplied to a digital memory circuit constituting a time axis compression circuit so that an original video signal can be obtained, and an error detector is used as a reference for an index signal in the output signal of the AM detector. An error with respect to the level is detected, and the AGC amplifier is controlled by the error detector so that the level of the index signal matches the reference level, so that the attenuation of the transmission signal by the signal transmission means is accurately corrected, A video signal with good image quality can be obtained. Furthermore, the level comparator compares the level of the index signal in the output signal of the AM detector with the above-mentioned reference level, and when it is detected that they do not match, that is, the gain of the AGC amplifier is not correctly controlled. At the time, the digital memory circuit was controlled by the level comparator so that the writing of the output signal of the AM detector to the digital memory circuit constituting the time axis compressor was controlled, so the gain of the AGC amplifier was correct. It is possible to avoid image quality degradation of the video signal due to non-control.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIGS.
The figure is a diagram for the explanation. (2) and (27) are A / D converters, (3) and (28) are field memories, (4) and (29) are D / A converters,
(6) AM modulator, (11) telephone line, (24) AGC amplifier, (25) AM detector, (100) transmitter, (200)
Is a receiving device.

Claims (1)

(57) [Claims] 1. A time axis expander for expanding the time axis of a video signal, and adding a predetermined level of an index signal to a predetermined period before an output signal of the time axis expander to perform AM modulation to form a transmission signal. A transmission device including a transmission signal former, a signal transmission unit for transmitting the transmission signal from the transmission device, and the transmission signal transmitted by the signal transmission unit are supplied.
An AGC amplifier, an AM detector to which an output signal of the AGC amplifier is supplied, a digital memory circuit constituting a time axis compression circuit to which an output signal of the AM detector is supplied, and the index in the output signal of the AM detector An error detector for detecting an error of a signal level with respect to a reference level; and a level comparator for comparing the level of the index signal in the output signal of the AM detector with the reference level. The AGC by the error detector so that the level of the index signal of the
While controlling the gain of the amplifier, when the level comparator detects that the level of the index signal does not match the reference level, the output signal of the AM detector is sent to the digital memory circuit. A video signal transmission device, comprising: a reception device that controls the digital memory circuit by the level comparator so as to inhibit writing.