JP2583328B2 - Vending machine data holding circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

This invention relates to various memories and watches in vending machines.
The present invention relates to a data holding circuit for backing up an IC.

[Prior art]

FIG. 2 shows a conventional data holding circuit of this kind. A voltage line L ₁ of 5V than system power diodes 1
The line L ₂ which is connected via includes a RAM2 for storing data for sales control is connected and IC3 for clock,
To back up the data of the RAM 2 and the clock IC 3, a battery 5 is connected to the line L ₂ via a diode 4. Further, the voltage line L ₁ is connected to the base of the common emitter of the transistor 8 through the Zener diode 6 and the resistor 7, the collector of the transistor 8 is connected to the operation enable terminal G of the decoder 9, this terminal G pull-up resistor 10 having one end connected to the line L ₂ is connected to. In this circuit, when the power of the vending machine is turned on, the voltage line L ₁ of the voltage (5V) is diode 1
Since the supply line (hereinafter referred to as a backup line) L ₂ via, for RAM2 and a clock for data storage IC3
Each performs a storage and counting operations of the data, also by the voltage of the voltage line L ₁ is applied to the transistor 8 through the Zener diode 6, to the transistor 8 turn on, the operation permission terminal G of the decoder 9 To the L level, the decoder 9 is in the operating state,
The CPU (not shown) supplies the data output from the decoder 9 to the RAM 2 or the clock IC 3 via the address line to make any one of them operable and transmits / receives data on the data line. When the power of the vending machine in this state is turned off, the voltage line L ₁ begins to drop, because the backup line L ₂ is held in the battery voltage by the battery 5, RAM 2 and a clock IC
The operations of 3 are backed up, and the storage data retention and timekeeping operations are respectively connected. Now, when the voltage line L ₁ falls below the Zener voltage of the Zener diode 6, the transistor 8 is cut off the base current to the transistor 8 is is turned off, by the action of the pull-up resistor 10, the operation permission terminal G is H level and the output of the decoder 9 turns off all, the high impedance state, the CPU which has become unstable operation by a voltage drop of the voltage line L _1, stopping access to RAM2 or watch IC3.

[Problems to be solved by the invention]

In the above-described circuit configuration, the backup time of the RAM 2 and the clock IC depends on the life of the battery 5, and the life thereof is RA
It greatly depends on the current consumption of M2 and clock IC3. By the way, the current consumption at the time of backup is small for a storage element such as RAM2, but the clock IC needs to always perform a timekeeping operation, so the current consumption is relatively large, and is one digit or more compared to the storage element. Since the value is large, the backup time is short for a small-capacity battery, and a time-consuming replacement of the battery is required. SUMMARY OF THE INVENTION The present invention has been made to eliminate the above-described problems, and has as its object to provide a data holding circuit of a vending machine that enables long-term backup.

[Means for Solving the Problems]

A data holding circuit for a vending machine according to the present invention is a data holding circuit for backing up a memory for storing sales control data set by a data setting device and a clock IC having a clock function with a battery when power is turned off. A signal output unit that outputs a predetermined signal when time data in which a clock IC is involved in the set data is not set, and a signal output from the signal output unit is held even after power is turned off. And a power supply interrupting means for interrupting the power supply from the battery to the timepiece IC when the predetermined signal is output from the holding means when the power is shut off.

[Action]

When the time data is not included in the sales control data set by the data setting device, a predetermined signal is output by the signal output unit, and this signal is held by the holding unit even after the power is turned off. When the power of the vending machine is cut off due to a power failure or the like, the power supply cutoff means cuts off the power supply from the battery to the clock IC, stops the clock IC, and only the memory is backed up by the battery. On the other hand, when the time data is not included in the control data for sale, the signal output means does not output the predetermined signal, and therefore, the power supply cutoff means does not operate. You.

【Example】

FIG. 1 is a circuit diagram showing an embodiment of a data holding circuit according to the present invention. In FIG. 1, the same parts as those in the conventional example in FIG. Omitted. The transistor 21 between the connection point of the RAM2 and watch IC3 in backup line L _2, and inserted to the emitter RAM2 side is provided with a feed interruption means for disconnecting the clock IC3 from the line L _2. Reference numeral 22 denotes a CPU for centrally controlling the vending machine, and reference numeral 23 denotes sales data such as the price of each product, and a time period during which the lighting of the lighting panel unit is turned off at night to save energy or automatic sales of alcoholic beverages. In a vending machine, it is a keyboard for inputting time data such as a time period during which sales are stopped at night.Information input from this keyboard 23 is taken into the CPU 22 via the input / output unit 24 and stored in the RAM 2. It is memorized. The CPU 22 uses the clock IC3
A predetermined signal is output to the data bus depending on whether or not the time data involved is included, and the decoder 25 receives the predetermined signal and, when the time data is included, sends the decoder 25 to the output terminal 25A. A pulse is output, and a pulse is output to the terminal 25B when time data is not included. This CPU
22 and the decoder 25 correspond to the signal output means. 26 and 27 are AND gates, and the output signals of the terminals 25A and 25B are input to one input of each of the AND gates 26 and 27, and to the other input of the AND gates 26 and 27. Is input by inverting the collector voltage of the transistor 8 by the inverter 29. Numeral 28 denotes a flip-flop circuit, and a set terminal S and a reset terminal R of the flip-flop circuit 28 have AND gates respectively.
Signals from 26 and 27 are input. Reference numeral 30 denotes an AND gate, and a signal from the output terminal Q of the flip-flop circuit 28 and a collector signal of the transistor 8 are input to an input portion. It is connected to the base of the transistor 21. AND gates 26, 27, 30 and flip-flop circuit
28 and the inverter 29 are connected to the backup line L ₂
Power is supplied by Next, the operation of the data holding circuit having the above configuration will be described. With the vending machine powered on,
Operation of the transistors 8 and decoder 9 are the same as the conventional example, RAM 2, by the supply voltage from the voltage line L ₁ is fed via the backup line L _2, performs memory retention of data. Therefore, when sales data and time data are set and input as necessary using the keyboard 23 as initial settings, these data are stored in the RAM 2 via the CPU 22. Further, since the collector of the transistor 8 is at the L level, the H level is input to one of the input portions of the AND gates 26 and 27 by the inverter 29. Therefore, if time data is included in the setting data,
26 is turned on and a pulse is input to the set terminal S of the flip-flop circuit 28, so that the flip-flop circuit
An output terminal Q of 28 outputs an L level and is input to the AND gate 30. On the other hand, when the time data is not included, the AND gate 27 gates on and a pulse is input to the reset terminal R of the flip-flop circuit 28, so that the output terminal Q of the flip-flop circuit 28 goes to H level. However, since the L level from the transistor 8 is input to the other input portion of the AND gate 30, the AND gate 30 outputs the L level regardless of the presence or absence of the time data. State and clock
IC3 also its counting operation is performed because it is powered from the line L ₂ through a transistor 21. When the power is turned off due to a power failure or the like from this energized state, the CPU 22 stops operating as in the conventional example, but the RAM 22
Since is powered by the line L ₂ which is backed up by the voltage of the battery 5 retains its stored data, also, since the flip-flop circuit 28 is backed up, L level (time is outputted to the output terminal Q (With data)
Alternatively, H data (when there is no time data) is also held. When the power is turned off, the collector of the transistor 8 is connected to the pull-up resistor 10
Therefore, the AND gate 30 outputs the L level when there is time data, and outputs the H level when there is no time data. When the time data is present, the transistor 21 is on as in the case of the power-on, so that the clock IC 3 continues the clocking operation and the clock function is also backed up. On the other hand, when there is no time data, the transistor 21 is turned off, the clock IC3 is opened by the line L ₂ being backed up, the counting operation is stopped in order to no longer powered. As described above, when the time data is set, as in the conventional device, even when the power is turned off, the RA is used by the battery 5.
The backup of both M2 and the clock IC3 is performed, but when the time data is not set, the clock IC3 does not need the clocking operation when the power is turned off. Is not performed, the current consumption of the battery 5 required at the time of backup can be reduced, and the backup time can be lengthened.

【The invention's effect】

As described above, according to the present invention, when the time data is not included in the data set for the sales control, at the time of a power failure, the clock IC that consumes a large amount of current during the backup is not backed up. Backup time can be lengthened, and the trouble of battery replacement can be saved.

[Brief description of the drawings]

FIG. 1 is a control circuit diagram showing an embodiment of a data holding circuit of a vending machine according to the present invention, and FIG. 2 is a circuit diagram for conventional data holding. 1 ... Diode, 2 ... RAM, 3 ... Watch IC, 4 ... Diode, 5 ... Battery, 6 ... Zener diode, 7 ... Resistance, 8 ... Transistor, 9 ... Decoder, 10 ... resistance. 21: Transistor, 22: CPU, 23: Keyboard, 24: Input / output unit, 25: Decoder, 26, 27: AND gate, 28: Flip-flop circuit, 30: AND gate, 31 ... …resistance.

Claims (1)

(57) [Claims] 1. A data holding circuit for backing up a memory for storing sales control data set by a data setting device and a clock IC having a clock function with a battery when power is turned off, wherein Signal output means for outputting a predetermined signal when the time data involving the clock IC is not set in the received data, holding means for holding the signal output from the signal output means even after power-off, and power-off A power supply interrupting means for interrupting the power supply from the battery to the clock IC when the predetermined signal is output from the holding means.