JP2579986B2 - Binary and octal detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] Especially used for modems of CCITT standard V.27 / bis / ter
Register means for detecting binary data and octal signal accurately without being affected by mixed noise, and a register means to which received data is serially applied;
A correlation calculating means for obtaining a correlation between the present data and the previous data applied to the register means, a subtracting means for subtracting a predetermined level from the correlation output from the correlation calculating means, Determining means for determining binary data and octal data.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a binary and octal detector used for a modem conforming to CCITT standard V.27 / bis / ter, and more particularly, to a method for modulating a carrier signal transmitted via a communication line. The present invention relates to a binary and octal detection device capable of accurately detecting a training signal (binary) and a data signal (octal) obtained by the above method.

When transmitting data via a communication line, a training signal consisting of binary data of a predetermined pattern is transmitted prior to data transmission, and a scramble one (SCR-ONE) consisting of octal data indicating the head of data to be transmitted subsequently. )
Is transmitted. On the receiving side, SCR-ONE
The received data is processed using a signal, that is, a transition point from binary data to octal data as a trigger. For this reason, a detection device for binary data and octal data is required.

[Prior Art] FIG. 3 is an explanatory diagram of points to be taken of a training signal (binary data) shown in an X, Y coordinate system, and FIG. 4 is an SCR-O.
FIG. 4 is an explanatory diagram of points to be taken by an NE signal (8-level data). It should be noted that the point to be taken by the scrambled signal is a complex space as shown below because of the CCITT standard V.27 / bis / te described above.
The reason for expressing information to be transmitted and received at the time of modulation and demodulation in a complex space by r is generally used by those skilled in the art. First, the receiving station first determines the point A (x + y) in FIG.
j) and the training signal is recognized by detecting the point B (−x−jy), and then the point C (y−jx) in FIG.
And the point D (−y + jx), the signal is recognized as an SCR-ONE signal.

Note that the coordinates of points A to D are represented as described above.
Since the above-mentioned standard does not have fixed coordinates, it is expressed as such for convenience.

FIG. 5 is a diagram for explaining a conventional binary octal detection method. In the conventional method, the points A to D in FIG.
After setting the points on the X-axis and the Y-axis as shown in FIG. 6, a threshold level of ± THY is set in the Y-axis direction to detect the points A and B and the points C and D. I was

[Problems to be Solved by the Invention] However, according to such a conventional method, points A and B
When noise or the like is mixed in the vicinity of the point and the value exceeds the region setting level, the points C and D are detected regardless of the reception of the points A and B (at the time of receiving the training signal), that is, the SCR −ON
There is a problem in that it is determined that an E signal has been detected, and transmission data cannot be processed accurately.

The present invention has been made in order to solve such a problem, and an object of the present invention is to provide an apparatus capable of accurately detecting a binary signal and an octal signal without being affected by mixed noise. I do.

[Means for Solving the Problems] FIG. 1 is a principle block diagram of the present invention. In the figure, 1 is a register means to which a binary signal and an octal signal are applied serially, and 2 is a correlation between the present data applied to the register means 1 and the previous data applied to the register means 1. Correlation calculating means 3 is a subtracting means for subtracting a predetermined level TH from the correlation output from the correlation calculating means 2, and 4 is a judging means for making a binary or octal judgment based on the output of the subtracting means 3. is there.

Here, the reason why the predetermined level TH is subtracted from the correlation output from the correlation calculating means 2 is to prevent erroneous determination of binary or octal detection due to the influence of noise, line distortion and the like.

[Operation] Since noise is very likely to be on the same level during a short time, by correlating two data within the short time, the noise can be largely cancelled. Therefore, the magnitude of the imaginary component of both data is obtained by correlating the current data with the previous data. In the case of correlation between binary data and in the case of correlation between binary data and octal data, there is a difference in the magnitude of the imaginary component. When the magnitude of the imaginary component is equal to or larger than a predetermined value, the judging means 4 judges a signal output from the subtracting means 3 to detect a change point from a binary signal to an octal signal. According to the present invention, since the change point is detected based on the correlation between the previous data and the present data, there is no influence of noise generated on the communication line or the like.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a configuration block diagram showing one embodiment of the present invention. Here, a case where the present invention is applied to a modem will be exemplified.

5 is a demodulator for receiving a carrier signal and demodulating the transmitted signal, 6 is a roll-off filter for removing unnecessary band information in the signal demodulated by the demodulator 5, 7 is an AGC circuit, 8 is The equalizer keeps the amplitude characteristic of the signal from the roll-off filter 6 constant regardless of the frequency.
Reference numeral 9 denotes a binary octal detector for inputting a signal from the equalizer 8, and those corresponding to FIG. 1 are denoted by the same reference numerals. In the binary / eight-value detecting device 9, as the register means 1, a shift register is used in which a signal from the equalizer 8 is applied to one end and the signal is sequentially shifted.
For example, data such as points A, B, B, B, and D are stored and shifted in the order in which they are received. A multiplier is used as the correlation calculating means 2,
The present data (for example, point D) and the previous data (for example, point B) from the shift register means 1 and the previous data (for example, point B) from the shift register means 1 are applied to the input terminal, and the two data are multiplied.
Get im. A predetermined level (threshold) TH is subtracted from the imaginary component signal Im by the subtraction means 3 and applied to the determination means 4. This predetermined level corresponds to ± THY in FIG.

In the case of the embodiment, the multiplier output becomes 0 in the case of binary, and the multiplier output becomes -1 in the case of octal. Therefore,
By providing the threshold value in the vicinity of the middle of these values, binary and eight values can be separated. For example, if the threshold is -1 /
If it is set to 2, it can be determined as binary if it is larger than -1/2 and as octal if it is smaller than -1/2.

The operation of the device configured as described above will be described below.

First, the received carrier applied to the demodulator 5 is converted into the base band here, and the roll-off filter 6
And the information of the unnecessary band (high frequency band) is removed. The output from the roll-off filter 6 is made uniform in amplitude by the action of the AGC circuit 7 and the equalizer 8, the intersymbol interference of the communication line is removed, and the output is sequentially stored in the register means 1.

The multiplier as the correlation calculating means 2 takes a conjugate complex number between the current data and the previous data input to the register means 1 and multiplies the imaginary component thereof. Here, for example, when the current data and the previous data are data at points A and B, the output of the multiplier 2 is 0, whereas the current data is data at point D (D = −y + jx). And the previous data is B
In the case of point data (B = −x + jy), that is, A,
When switching from the reception at the point B to the reception at the points C and D, a phase rotation of 270 ° C. occurs at the output of the multiplier 2 multiplied by the imaginary components of both data. Here, taking the complex conjugate of D and B, B × D * = (− x + jy) × (−y + jx) = 2xy−j (x ² + y ² ) * indicates the complex conjugate Here, the complex component Im Extracting only: Im = − (x ² + y ² ) = − 1 Here, x ² + y ² = 1 is as follows.
V.27 signal points are arranged in a circle. In the receiving unit, in order to accurately determine a signal point, level adjustment is performed before the determination processing so that the size of the signal point has a radius of 1 (AGC processing). Therefore, x ² + y ² = 1.
In the embodiment, the size of the modem used is 1, but it is not necessary to be 1 for convenience of processing, and the size determined by the AGC process is determined as the size of x ² + y ² .

Here, the phase rotation of 270 ° occurs because of the aforementioned C
This is because the CITT standard V.27 / bis / ter specifies that when switching from binary to octal, a signal whose phase is rotated by 270 ° is extracted.

The determination means 4 determines the amount of data phase rotation of the two points output via the subtraction means 3, that is, the value of the imaginary component, to change the reception of the points A and B from the reception of the points C and D. The switching point can be accurately detected.

In the above-described embodiment, the case where the serial data input to the register means is based on the CCITT standard V.27 standard is taken as an example. However, the present invention is not limited to this, and can be similarly applied to the transmission of serial data of other types of standards.

[Effects of the Invention] As described in detail below, the present invention obtains a correlation between the current data and the immediately preceding data, and detects binary or octal data from the phase rotation amount of both data. It is possible to accurately calculate 8 values from binary data without being affected by mixed noise.
The point of change to the value data can be detected.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the principle of the present invention, FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 3 is an explanatory diagram of points to be taken by a training signal shown in an X, Y coordinate system. FIG. 4 is an explanatory diagram of points to be taken by the SCR-ONE signal, and FIGS. 5 and 6 are diagrams for explaining a conventional binary and octal detection method. In FIGS. 1 and 2, 1 is a register, 2 is a correlation operation, 3 is a subtraction, and 4 is a determination.

Claims (1)

(57) [Claims] 1. Register means to which received data is serially applied, correlation calculating means for correlating present data and previous data applied to the register means, and a transmission output from the correlation calculating means. A value between an output of the correlation operation means in the case of binary and an output of the correlation operation means in the case of eight values is defined as a predetermined level, and subtraction means for subtracting the predetermined level; A binary octal detection device comprising: a determination unit that determines binary data and octal data based on the binary data.