JP2576377B2 - ISDN data communication terminal equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ISDN data communication terminal, and more particularly to an International Telegraph and Telephone Consultative Committee (CCIT).
T) The present invention relates to an ISDN data communication terminal device used as a data communication terminal of an integrated services digital network (ISDN).

[0002]

2. Description of the Related Art Integrated Services Digital Network (ISDN)
Is defined in the CCITT Recommendation Definitions (I.112)
It is defined as an integrated service network having the function of making a digital connection between the user and the network interface.
In other words, it refers to a network that comprehensively provides various services such as telephone, data, facsimile communication services, and various communication processing services for processing communication information through one digital communication network.

[0003] One of the CCITT recommendations for ISDN, I. At 430, the Basic User / Network Interface First Layer Specification is defined. This defines the electrical and physical conditions of the user / network interface. It is recommended that the basic interface that is the basis of ISDN, and the primary interface that is considered to be used for business establishments such as multiple access and high-speed access. ing. Here, since the specifications of the basic interface are related, the outline is as follows.

That is, the interface speed is 192K.
bit / s (hereinafter Kbps), the interface structure is composed of two B channels (64 Kbps) for information transmission and a D channel (16 Kbps) for signal transmission.
That is.

Using two of these B channels, 64K
When data transmission is performed at a communication speed of bps or more, the original data to be communicated is divided into two child data having a communication speed of 64 Kbps or less so as to conform to each of the two B channels, and each is transmitted. The original data is reconstructed by combining the child data from the two B channels again. At this time, since the two B channels are treated as independent lines, even when both B channels are used for the same partner station, the phase between the two B channels, that is, the matching of the delay time is performed. Sex is not guaranteed. That is, since the transmission paths of these two B channels are not always the same, there is a delay difference between the received child data of each B channel. Therefore, these child data are simply added and the original data is reproduced. It cannot be composed.

Conventionally, based on the transmission path difference, the two B
In order to compensate for the delay difference of channel data, the original data is reconstructed by temporarily storing each received child data in a buffer memory and then synchronizing the two child data.

Referring to FIG. 3, which is a block diagram showing a configuration example of a conventional ISDN data communication terminal device (hereinafter referred to as a data communication terminal device), a data communication terminal device 6 shown in FIG. A terminal adapter (TA) 3 for connecting the DTE 2 to an ISDN line;

TA3 is 128 Kbps from DTE2
Original data DH into two 64Kbps child data DBs
1 and DB2, and the two B channels B1 and B2 of the ISDN network for the child data DB1 and DB2.
A data transmission circuit 12 for transmitting via B2, a data reception circuit 13 for receiving child data DB1 and DB2 from B channels B1 and B2, respectively, and temporary storage of child data DB1 and DB2 from data reception circuit 13, respectively. Buffer memories 141 and 142 and buffer memory 14
A, and a data assembling circuit 15 for reconstructing original data by synthesizing the child data DB1 and DB2 read from 14B.

Referring to FIG. 4, which is a block diagram showing an example of the configuration of a conventional data communication system using two B channels of ISDN, the data communication system shown in FIG. It comprises two data communication terminals 6A, 6B each having DTEs 2A, 2B and TAs 3A, 3B, and an exchange 7.

Next, the operation of the conventional ISDN data communication terminal will be described. The data communication system has a two-way communication function of transmitting and receiving data in both directions between the data communication terminals 6A and 6B. Here, DTE2
It is assumed that the communication target data (original data) of 128 Kbps is transmitted from A, and the DTE2B receives the original data.

First, the DTE 2A supplies 16-bit data as the original data DH to the TA 3A at a period of 8 KHz (125 μS), ie, 128 Kbps. TA3A
The data dividing circuit 11A in the
Is divided into two 8-bit child data DB1 and DB2. These child data DB1 and DB2 are transmitted by the data transmission circuit 12A via the corresponding B channels B1 and B2, respectively. The child data DB1 and DB2 on these B channels B1 and B2 are transmitted via the exchange 7 to the other party's TA.
3B. Since each of these B channels B1 and B2 generally takes a different path as a different line, the transmission times, that is, the delay times of these two child data DB1 and DB2 are different from each other, and a delay time difference occurs.

The child data DB1, D on each of the B channels B1, B2 received by the data receiving circuit 13 in the TA3B
B2 is stored in the buffer memories 141B and 142B, respectively. When the child data DB1 and DB2 for the communication unit, which is the minimum transmission data that needs to be transmitted at one time, are prepared in the buffer memories 141B and 142B, the data assembling circuit 15B synthesizes the 8-bit child data DB1 and DB2, respectively. Reconstruct the original data DH of
2B.

Here, as the data for the communication unit, 5
Assuming a data file of 00 Kbytes, the required memory capacity of the buffer memories 141 and 142 is a total of the above communication unit, that is, 500 Kbytes, and therefore each of them is 25 Kbytes.
The capacity is as large as 0 Kbytes.

[0014]

The above-mentioned conventional ISD
In order to compensate for the delay difference between the two B channels caused by the difference between the transmission paths of the two B channels, the N data communication terminal apparatus needs to transmit at least the minimum transmission data, which is the minimum transmission data at a time, for the communication unit. There is a drawback in that two large-capacity buffer memories for temporarily storing the respective receiver data corresponding to the data are required.

[0015]

SUMMARY OF THE INVENTION An ISDN data communication terminal according to the present invention comprises an integrated services digital network (ISD).
N) The first communication speed corresponding to the B channel is transmitted from the first station on the data transmission side to the second station on the data reception side using two B channels for information transmission of the basic interface.
A data dividing circuit for dividing the original data into first and second child data at the first communication speed for transmitting predetermined original data at a second communication speed, A data transmission circuit for transmitting each of the two child data via each of the two B channels;
A data receiving circuit for receiving the first and second child data transmitted via each of the channels, and an original data assembling circuit for combining the first and second child data to reconstruct the original data In the ISDN data communication terminal device comprising the following, a difference in delay time between the first and second child data is detected, a corresponding delay difference signal is supplied, and a child arriving earlier with a smaller delay time is provided. A delay difference detection circuit for supplying a selection signal for selecting data as selector data; and the first and second delay circuits in response to the selection signal.
A switch circuit for selecting one of the child data as the selector data, and a buffer memory for temporarily storing the selector data and controlling readout of the selector data to be delayed in response to the delay difference signal. It is provided with.

[0016]

Next, embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1 showing a block diagram of an embodiment of an ISDN data communication terminal device (hereinafter referred to as a data communication terminal device) of the present invention, a data communication terminal device 5 of this embodiment shown in FIG. In addition to the DTE2, the conventional TA3 data dividing circuit 11, the data transmitting circuit 12, the data receiving circuit 13, and the data assembling circuit 15, one child data selected in place of the buffer memories 141 and 142 is used. A small-capacity buffer memory 14 for storing certain selector data and delaying the reading of the selector data in response to the delay difference data TD;
A difference in delay time between DB2s is detected, corresponding delay difference data TD is supplied, and the smaller of the delay times is detected .
That is , a delay time difference detection circuit 16 that supplies a selection signal S for selecting the child data that has arrived earlier as the selector data, and selects one of the child data DB1 and DB2 as the selector data by the selection signal S. A switch circuit 17 connected to store data in the buffer memory 14 and a switch circuit TA1 connected to read selected data from the buffer memory 14 and supply the selected data to the data assembling circuit 15 are provided.

Referring to FIG. 2, which is a block diagram showing an example of the configuration of a data communication system according to the present embodiment using two ISDN B channel lines, the data communication system shown in FIG.
Similarly each DTE2A the data communication terminal apparatus 5 described above,
2B and two data communication terminals 5A and 5B having TAs 1A and 1B, and an exchange 7.

Next, the operation of the present embodiment will be described. As in the case of the conventional example, it is assumed that data to be communicated (original data) of 128 Kbps is transmitted from the DTE 2A and that the original data is received by the DTE 2B.

First, the DTE 2A stores the original data DH in the TA
1A, and the data division circuit 11A in the TA 1A converts the supplied original data DH into two 8-bit child data D.
B1 and DB2, transmitted by the data transmission circuit 12A via the corresponding B channels B1 and B2, transmitted to the other party's TA1B via the exchange 7, and transmitted by the data receiving circuit 13B in the TA1B to the B channel B1. , B2 until the child data DB1 and DB2 are received is the same as in the above-described conventional example.

Next, each of the child data DB1 and DB2 output from the data receiving circuit 13B is divided into two, one of which is provided to the switch circuit 17 and the other is provided to the delay time difference detecting circuit 16.
B.

Data DB of delay time difference detection circuit 16B
A method of detecting the delay time difference between DB1 and DB2 will be described. First, as a data format of the original data DH transmitted by the TA1A, a logical value "1" is filled in the entire non-data section leading to the beginning of the original data DH. First format and high level data link control procedure (HDCL)
For example, a second format is used in which a block number is assigned to each block data that is a set of data using a data format such as. The child data DB1 and DB2 obtained by dividing the original data DH also hold the first or second format.

First, when the child data DB1 and DB2 supplied from the data receiving circuit 13B have the first format, the delay time difference detecting circuit 16B terminates the continuation of the logical value "1" in the non-data section. To detect and identify the head of the data. Further, a delay time difference between the child data DB1 and DB2 is detected based on the detection result. After the first data, the number of received data of the block data constituting each of the child data DB1 and DB2 from the first data is counted, the number of received data is obtained, and the number of received data is compared with each other. The time difference is detected and corresponding delay difference data TD is output. In addition, the child data of the smaller delay time,
The selection signal S is output so as to select the data. For example, if the child data DB1 has arrived earlier than the child data DB2
Supplies a selection signal S for selecting the child data DB1 as selectors data to the switch circuits 17 and 18,
The corresponding delay difference data TD is output.

When the child data DB1 and DB2 are in the second format, the delay time difference detection circuit 16B
The delay time difference is detected by comparing the block numbers corresponding to the child data DB1 and DB2, and the corresponding delay difference data TD and the selection signal S are output.

The switch circuits 17 and 18 select one of the child data DB1 and DB2 as the selector data in response to the supply of the selection signal S. In the above example, the child data DB1 is selected and connected so as to be supplied to the buffer memory 14, and the read output from the buffer memory 14 is connected so as to be supplied as the data DB1 of the data assembling circuit 15. At the same time, connection is made so that the data DB2 is directly supplied from the data receiving circuit 13 to the data assembling circuit 15.

The selector data stored in the buffer memory 14, that is, the data DB1, is the delay difference data TD
, The data DB1 is read out and supplied to the data assembling circuit 15 after a lapse of time corresponding to the delay difference data TD. The data assembling circuit 15 receives the child data DB1 and DB2 whose delay time difference has been adjusted in this way, and combines these child data DB1 and DB2 to reconstruct the original data DH.

By using the above control method, it is possible to adjust the delay time difference between the child data DB1 and DB2 passing through each of the two B channels B1 and B2. As an example, assuming that a data file of 500 Kbytes as in the related art is transmitted as the data for the communication unit, and that the delay time of the child data DB1 is smaller and the delay time difference is 0.1S, the delay time difference is 0S. .
The data amount of the child data DB1 received during 1S is 64
(Kbps) × 0.1 (S) = 6.4 Kbits = 0.8
It becomes K bytes. In addition, the child data D by the above control method
If it takes 0.1S to adjust the delay time difference between B1 and DB2, child data DB1 and DB2
Each have a data amount of 0.8 Kbytes. Therefore, the memory capacity required for the buffer memory 14 is 2 × 0.8 (K bytes) = 1.6 K bytes,
This can be greatly reduced as compared with the required memory capacity of each buffer memory of 250 Kbytes in the prior art.

[0028]

As described above, the ISDN of the present invention is
A data communication terminal device outputs a delay difference data between two child data, and supplies a selection signal for selecting the child data having the smaller delay time as selector data. And a switch circuit for selecting either one of the two child data as the selector data in response to the selector signal, temporarily storing the selector data, and delaying the reading of the selector data in response to the delay difference signal. Providing a buffer memory that performs such control has the effect that the capacity of the buffer memory that temporarily stores the child data can be significantly reduced in order to compensate for the delay time difference between the two B channel lines.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of an ISDN data communication terminal device of the present invention.

FIG. 2 is a block diagram illustrating an example of a communication system configured using the ISDN data communication terminal device of the embodiment.

FIG. 3 is a block diagram showing an example of a conventional ISDN data communication terminal device.

FIG. 4 is a block diagram illustrating an example of a communication system configured using a conventional ISDN data communication terminal device.

[Explanation of symbols]

1, 1A, 1B, 3, 3A, 3B Terminal adapter (TA) 2, 2A, 2B Data terminal equipment (DTE) 5, 5A, 5B, 6, 6A, 6B Data communication terminal equipment 7 Switching equipment 11 Data division circuit 12 Data Transmission circuit 13 Data reception circuit 141, 142 Buffer memory 15 Data assembly circuit 16 Delay time difference detection circuit 17, 18 Switch circuit

Claims (3)

(57) [Claims] 1. Integrated Services Digital Network (ISDN)
Using two B channels for information transmission of the basic interface from the first station on the data transmitting side to the second station on the data receiving side for a second communication rate twice as high as the first communication speed corresponding to the B channel. To transmit the original data determined at the communication speed,
A data dividing circuit for dividing the original data into first and second child data at the first communication speed, and dividing each of the first and second child data via each of the two B channels A data transmitting circuit for transmitting, a data receiving circuit for receiving the first and second child data transmitted via each of the two B channels, and a combining of the first and second child data An ISDN data communication terminal device comprising an original data assembling circuit for reconstructing the original data, wherein a difference in delay time between the first and second child data is detected and a corresponding delay difference signal is supplied. a delay difference detecting circuit supplying a selection signal for selecting the data children who arrived at a small tip of the delay time as the selector data, either to the first and second child data in response to said selection signal A switch circuit that selects one of the selector data as the selector data, and a buffer memory that temporarily stores the selector data and controls to delay the reading of the selector data in response to the delay difference signal. ISDN data communication terminal device. 2. The delay difference detection circuit counts first and second reception numbers of a first and second block data constituting each of the first and second child data in a preset counting period. 3. The ISDN data communication terminal device according to claim 1, further comprising a reception data counter for detecting a difference between the first and second count values. 3. The delay difference detection circuit constitutes each of the first and second child data, and determines predetermined first and second block data in which first and second block numbers are respectively set in advance. 2. The ISDN data communication terminal device according to claim 1, further comprising a block number comparison circuit for detecting a difference between the first and second block numbers at a reception time.