JP2575145B2 - Control circuit monitoring method and device - Google Patents

Description

The present invention relates to a control circuit monitoring method, and particularly to an integrated digital network (IS).
The present invention relates to a control circuit monitoring method for activating / deactivating a line in a terminal device (TE) connected to a terminal device (DN) and a device thereof.

[Prior art] The International Telegraph and Telephone Consultative Committee (CCITT)
The transmission control procedure between E) and the line termination (NT) is defined as a layer 1 protocol. The activation / non-activation procedure is included in the layer 1 protocol, and it is required that all terminals connected to the ISDN network have this layer 1 protocol, such as telephone and facsimile.

Conventionally, the communication protocol has been controlled by software by a microprocessor. Therefore, when a communication failure occurs due to a line failure or the like, the cause of the failure can be easily investigated by analyzing the history of the communication protocol stored in the memory managed by the microprocessor. Was. For example, there is a method in which communicated commands, responses, and the like are stored in a memory and output as necessary.

However, the protocol of the layer 1 in the ISDN network must be performed at a high speed, and a small-scale circuit configuration such as a telephone terminal must be used. Therefore, it is general that the monitoring of the control circuit is implemented by hardware and is implemented as an LSI, and it is not suitable to realize the control circuit by software using a microprocessor.

[Problems to be Solved by the Invention] According to the present invention, the history of high-speed communication such as the ISDN layer 1 protocol is stored in hardware, and the communication is unsuccessfully terminated due to the occurrence of a line failure or the like. Provided is a control circuit monitoring method and a device therefor for promptly analyzing the cause when the control circuit is used.

[Means and Actions for Solving the Problems] As one means for solving the problems, the control circuit monitoring method of the present invention is a control circuit monitoring method for activating / deactivating a line. The control circuit includes a state counter indicating a state of the circuit and a state control circuit that performs control in accordance with the value of the state counter, and outputs an output of the state counter in response to a change in the state counter. And storage means for outputting the contents of the storage means under predetermined conditions, and monitors the control circuit based on the history of the state counter.

Further, the control circuit monitoring device according to the present invention is a control circuit for activating / deactivating a line, comprising: a state counter indicating a state of the circuit; and a state control circuit performing control in accordance with the value of the state counter. A control circuit monitoring device for monitoring
A storage unit that stores the output of the state counter while maintaining a history, a change in the state counter, and a write pulse generation unit that generates a write pulse of the storage unit; and a full state of the storage unit, or Read pulse generating means for detecting a command from outside and generating a read pulse for the storage means; and output means for outputting the contents of the storage means in response to the read pulse generated by the read pulse generating means. Is provided.

Embodiment FIG. 1 is a diagram showing the configuration of an embodiment of an apparatus for realizing a control circuit monitoring method according to the present invention.

In the figure, 1 is a state counter indicating the state of the control circuit 10, 2
Is a state control circuit that performs line control according to the communication protocol corresponding to the state counter 1, 3 is a FIFO memory that stores the output of the state counter, 4 is a display circuit that displays the output of the FIFO memory, and 5 is the output of the state counter. Detect changes in
A write pulse generating circuit for generating a write pulse of the FIFO memory, 6 is a non-switch switch for display activation which is depressed when the output of the FIFO memory is to be displayed, 7 is a non-clock switch for display activation which is depressed, or This is a read pulse generation circuit that generates a read pulse for the FIFO memory when a full state of the memory is detected.

In the above configuration, when the terminal device (TE) executes a start-up procedure which is an ISDN layer 1 protocol, the state control circuit 2 performs communication while controlling the state counter 1 based on a signal received from the line termination device. Do. At this time, the value of the state counter 1 indicates the state number of the state transition table of the layer 1 protocol.

The write pulse generation circuit 5 detects a change in the output of the state counter 1, that is, a change in the state number, and generates a write pulse for the FIFO memory 3. Accordingly, when the state number changes, the state number is written to the FIFO memory 3 for each change. Where FIFO
When the memory 3 is full, the input ready signal from the FIFO memory 3 is turned off, and the read pulse generation circuit 7 which detects the OFF state of the input ready signal generates one read pulse from the FIFO memory 3 and outputs the read pulse. The data in the memory 3 is read and discarded. By this operation, the latest output of the state counter 1, that is, the state number, is always stored in the FIFO memory 3.

Here, when the state number stored in the FIFO memory 3 is displayed, the display activation non-switch switch 6 is pressed.

The display activation non-rotating switch 6 is pressed once.
The read pulse of the FIFO memory 3 is generated for one clock.
The state number output from the FIFO memory 3 by this read pulse is input to the display unit 4 and displayed. By repeating the above operation, the layer 1 protocol can be started and
A history of non-startup procedures can be taken.

Next, FIG. 2 shows an embodiment of an apparatus for reading the output of the FIFO memory 3 by the MPU and automatically checking the history of the activation / deactivation procedure of the layer 1 protocol.

Here, when reading the state number stored in the FIFO memory 3 to the MPU 8, a read instruction generated by the MPU 8 is input to the read pulse generation circuit 7a, and the read pulse generation circuit 7a
A read pulse for the FO memory 3 is generated. The history of the communication protocol read by the MPU 8 by the above operation is directly output to an output unit (printer or LCD) or the like connected to the MPU 8 or further analyzed and the result is output. still,
Those having the same reference numbers as in FIG. 1 perform the same operations as described above.

Further, the read pulse generation circuit may be controlled from both the manual switch and the MPU.

As described above, the history of the communication state control circuit composed of hardware can be left without using a logic analyzer, etc., and it is possible to analyze the cause when communication is unsuccessful, such as when a failure occurs. Can be used.

In this embodiment, the monitoring of the control circuit for controlling the activation / deactivation of the line has been described. However, according to the technical idea of the present invention, the state counter indicating the state of the circuit and the control corresponding to the value of the state counter are performed. If the circuit is composed of a state control circuit, the monitoring can be applied.

[Effects of the Invention] According to the present invention, the history of high-speed communication such as the ISDN layer 1 protocol is stored in a hardware manner, and the cause analysis when the communication is unsuccessfully terminated due to the occurrence of a line failure or the like. A control circuit monitoring method and a device therefor can be provided for promptly performing the control.

[Brief description of the drawings]

FIG. 1 is a block diagram of an apparatus for realizing a control circuit monitoring method of the present invention according to one embodiment, and FIG. 2 is a block diagram of an apparatus of another embodiment for realizing a control circuit monitoring method of the present invention. In the figure, 1... State counter, 2... State control circuit, 3.
... FIFO memory, 4 is a display unit, 5 is a write pulse generating circuit, 6 is a non-rotary switch, 7 is a read pulse generating circuit, 7a is a read pulse generating circuit, 8 is an MPU, 10
... A control circuit.

Claims (4)

(57) [Claims] 1. A monitoring method for a control circuit that activates and deactivates a line, comprising: a state counter that indicates a state of the circuit; and a state control circuit that controls the control circuit in accordance with the value of the state counter. Storage means for storing the output of the state counter while keeping a history in accordance with the change of the state counter; and output means for outputting the contents of the storage means under predetermined conditions. And a control circuit monitoring method for monitoring the control circuit based on a history of the state counter. And a state control circuit for performing control in accordance with the value of the state counter. A control circuit monitoring device that monitors a control circuit that activates and deactivates a line, a storage unit that stores an output of the state counter while keeping a history, and a storage unit that detects a change in the state counter and stores the output. A write pulse generating means for generating a write pulse, a read pulse generating means for detecting a full state of the storage means or an external instruction, and generating a read pulse for the storage means; Output means for outputting the contents of the storage means in response to the read pulse generated by the control circuit. 3. The read pulse generating means includes an external switch, and generates a read pulse according to an instruction from the switch.
3. The control circuit monitoring device according to claim 2, wherein the output means includes a display means, and the contents of the storage means are displayed on the display means. 4. The apparatus according to claim 2, further comprising control means for controlling said read pulse generating means and analyzing the contents of said storage means outputted by said output means.
The control circuit monitoring device according to the item.