JP2570387B2 - Differentiator circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A Industrial field B Outline of the invention C Conventional technology (FIGS. 6 and 7) D Problems to be solved by the invention (FIGS. 6 to 8) E Means for solving problems (Fig. 1) F action (Fig. 1) G embodiment (G1) First embodiment (Figs. 1 to 4) (G2) Second embodiment (Fig. 5) (G3) Others Embodiment H Effect of the Invention A Industrial Field of the Invention The present invention relates to a differentiating circuit, and is suitably applied to, for example, a speed detecting circuit of a magnetic disk device.

B. Outline of the Invention The present invention provides a differentiating circuit that uses two current sources for a charging current and a discharging current to drive terminal voltages of a charging / discharging capacitor, respectively, and outputs the charging current and the discharging current as differential signals. By doing so, a differential signal can be obtained with high accuracy.

C. Prior Art Conventionally, in a magnetic disk device, a magnetic head is moved at a high speed to a desired recording track in order to shorten an access time. The moving speed is detected, and the magnetic head is driven based on the detection result.

That is, in the magnetic disk, when the magnetic head moves across the recording track, a triangular wave signal whose signal level changes every four tracks can be obtained.

Accordingly, if a differential signal of a triangular wave signal is obtained by using a differentiating circuit as proposed in Japanese Patent Publication No. 53-31586, for example, a differential circuit in which the signal level changes according to the moving speed of the magnetic head. A signal can be obtained, whereby the moving speed of the magnetic head can be detected.

That is, in FIG. 6, reference numeral 1 denotes a speed detection circuit as a whole, and supplies triangular wave signals _STA and _STB to capacitors 2 and 3, respectively.

Incidentally, as shown in FIG. 7, the triangular wave signal S _TA (7
The phase of the triangular wave signal _STB (FIG. 7B) with respect to FIG. 7A is advanced or delayed by 90 degrees according to the moving direction of the magnetic head.

The capacitors 2 and 3 are configured to form a differentiating circuit together with the resistors 4 and 5, respectively, and the triangular wave signals S _TA and S
The differential signals S _DA and S _{DB of TB} (FIGS. 7C and 7D) are output to the switch circuits 7 and 8.

Accordance connexion, in a period of the triangular wave signal S _TA and S signal level increase of _TB, in proportion to the increase rate of the signal level, the signal level rises to the positive side, the signal level of the triangular wave signal S _TA and S _TB There in a period of decline, may be in proportion to the reduction ratio of the signal level to obtain a differential signal S _DA and S _DB of the rectangular wave shape signal level rises to the negative side.

On the other hand, the switch circuits 9 and 10 respectively provide the inverted differential signals S _DIA and S _{DIB of} the differential signals S _DA and S _DB via the inverting amplifier circuits 11 and 12 (FIGS. 7 (E) and (F)). Receive.

Accordance connexion, in the triangular wave signal S _TA and S signal level period decline of _TB is opposite to the differential signal S _DA and S _DB, the signal level is falling to the negative side in proportion to the increase rate of the signal level During the period in which the signal levels of the triangular wave signals _STA and _STB tend to increase, the inverted differential signals _SDIA and _{SDIB in the} form of rectangular waves whose signal levels rise to the positive side in proportion to the rate of decrease of the signal levels. Can be obtained.

Therefore, during the period when the signal levels of the differential signals S _DA , S _DB , _SDIA and _SDIB rise to the positive side, the differential signals S _DA ,
If _SDB , _SDIA and _SDIB are sequentially switched and output in quarter cycles, an output signal whose signal level rises in proportion to the rate of increase and decrease of the signal level of the triangular wave signals _STA and _STB On the other hand, if the differential signals S _DA , S _DB , S _DIA and S _DIB are sequentially switched and output in quarter periods during the period in which the signal level falls to the negative side, a triangular wave can be obtained. An output signal whose signal level falls in proportion to the rate of increase and decrease of the signal levels of the signals _STA and _STB can be obtained.

Thus, if the sequentially switch the switching circuit 7, 8, 9 and 10 in accordance with the phase of the triangular wave signal S _TB with respect to the triangular wave signal S _TA, the signal level is inverted in response to the movement direction of the magnetic head, the moving velocity An output signal whose signal level changes in proportion can be obtained.

That comparator circuit 14 receives the triangular wave signal S _TA and S _TB, the triangular wave signal S when the signal level of the triangular wave signal S _TB is lower than the _TA, the logic level falls to a logic "L" comparison signal S _HA ( 7 (G) is output to the NAND circuits 15 to 18.

The comparison circuit 20 outputs the inverted signal S _TIA (the seventh signal) of the triangular wave signal _STA .
Figure (H)) and receives the triangular wave signal S _TB, the signal level of the triangular wave signal S _TB as compared with the inverted signal S _TIA is lower, the comparison signal S _HB (Fig. 7 the logic level falls to a logic "L" (I)) is output to the NAND circuits 15-18.

Therefore, the comparison signals _SHA and _SHB can be obtained via the comparison circuits 14 and 20, in which the timing at which the logic level is inverted changes according to the moving direction of the magnetic head.

The NAND circuit 15 obtains the logical product of the inverted signals of the comparison signals S _HA and S _HB , while the NAND circuits 17 and 18 respectively output the inverted signal of the comparison signal S _HA or S _HB and the comparison signal S _{HB. For HA} or _SHB , the NAND circuit 16 is configured to obtain a logical product of the comparison signal _SHA and the comparison signal _SHB .

Accordingly, the four control signals S whose logic levels sequentially fall to logic "L" in accordance with the moving direction of the magnetic head in quarter cycles with respect to the triangular wave signal _STA via the NAND circuits 15 to 18.
_C1 , S _C2 , S _C3 and S _C4 (Fig. 7 (J), (K), (L)
And (M)), and the control signals S _C1 ,
By sequentially switching the switch circuits 7 to 10 on based on S _C2 , S _C3 and S _C4 , a speed detection signal whose signal level changes to the positive side and the negative side according to the moving direction and the moving speed of the magnetic head. S _V (FIG. 7 (N)) can be obtained.

D Problems to be Solved by the Invention However, in this type of speed detection circuit 1, if the differentiation circuit is constituted by the capacitors 2, 3 and the resistors 4, 5, the inverted signals of the differentiation signals S _DA and S _DB ( That is, in order to obtain the differential signals _SDIA and _SDIB ), the inverting amplifier circuits 11 and 12 must be used.
There was a problem that the detection accuracy deteriorated due to the influence of the offset voltages 11 and 12.

Further, a differentiating circuit is constituted by the capacitors 2 and 3 and the resistors 4 and 5, and the differential signals S _DA and S _DB (FIG. 8 (B)) of the triangular wave signals _STA and _STB (FIG. 8 (A)) are converted. To obtain, the input voltage of the differentiating circuit is V ₁ , the capacitance of the capacitors 2 and 3 is C,
Assuming that the resistance values of the resistors 4 and 5 are R, the following equation: V ₀ = −2ACR · exp (−t / CR) + ACR (1) It is possible to obtain a differential signal of the output voltage V ₀ which is represented by the equation.

Therefore, in order to obtain the differential signals S _DA and S _DB having a large signal level, it is necessary to increase the capacitance of the capacitors 2 and 3 or the resistances of the resistors 4 and 5 to increase the specific number of the differentiation circuits. in this case increasing the time constant of the differentiating circuit, there is a problem that the differential signal S _DA and the waveform of the rise and fall of the S _DB is rounded.

As a result, in the speed detection signal S _v, Ritsupuru become so degraded detection accuracy mixed, to obtain a large differential signal S _DA and S _DB signal level after all there has been a difficult problem.

In particular, the magnetic disk device has a feature that the period of the triangular wave signal changes greatly because the magnetic head moves at a high speed. As the moving speed of the magnetic head increases, the detection accuracy deteriorates accordingly.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to propose a differentiating circuit that can solve the conventional problems at a glance and obtain a highly accurate speed detection signal.

Means for Solving Problem E In order to solve such a problem, in the present invention, a charging current _IA2 is applied to a charging / discharging capacitor 45 and a first terminal of the charging / discharging capacitor 45, and the first terminal Voltage V _C2 is a predetermined voltage
A first current source 3 adapted to hold V _REF −V _BE / 2
And 5,46,48,49,51,52,53, giving a discharge current I _B1 to a first terminal of a charge and discharge capacitor 45, the voltage of the first terminal V
_C2 was the made to hold a predetermined voltage V _REF -V _BE second
A current source 35,46,48,49,51,52,54 of giving charge current I _A1 to the second terminal of the charge and discharge capacitor 45, the voltage V _C1 at the second terminal to the input voltage V _I1 in response to the third current source 36,37,38,39,41,42 which is adapted to vary, giving a discharge current I _B2 to the second terminal of the charge and discharge capacitor 45, the voltage of the second terminal V so that and a fourth current source 36,37,38,39,41,42,43 which is adapted to vary in response to the input voltage V _I1 to _C1.

F action The charge currents _IA2 and _IA1 and the discharge currents _IB1 and _IB2 are given to the first and second terminals of the charge / discharge capacitor 45, respectively.
If so as to drive the charge and discharge capacitor 45, by outputting switching the charging current I _A2, I _A1 and the discharge current I _B1, I _B2 as necessary, it is possible to obtain high accuracy differential signal .

G Example Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

(G1) First Embodiment In FIG. 2, in which parts corresponding to those in FIG. 6 are assigned the same reference numerals, reference numeral 30 denotes an integrated speed detection circuit as a whole. Obtain the differential signal of the signal.

That is, as shown in FIG. 1 and FIG.
Is a triangular wave signal with a voltage equal to the voltage _VREF of the reference power supply 35.
Triangular wave signal S _STA (FIG. 3 (A)) obtained by level-shifting the S _TA to be provided to the transistors 36 and 37.

The transistor 36 connects a diode-connected transistor 38 and a current source 39 to an emitter to form a buffer circuit having an emitter follower circuit configuration.
The voltage between the emitter and the collector of the transistor 38 (in this case, the voltage between the base and the emitter of the transistor 38 is V _BE because the transistor 38 is diode-connected).
Is divided by the resistors 41 and 42 having the same resistance value, so that the voltage V _I1 of the triangular wave signals S _STA and S _STB is Gives the voltages V ₁ represented by the relationship to the transistor 43.

The transistors 37 and 43 have an emitter commonly connected to a charge / discharge capacitor 45 external to the integrated circuit, and have their collectors connected to the power supply line V _CC and the ground, respectively. The voltage V _{C1 is changed} to the voltage V of the input triangular wave signals T _STA and S _STB .
It is made to change according to _I1 .

That is, in the transistor 37, the triangular wave signals S _STA and S _{STA are set with} respect to the terminal voltage V _C1 of the charge / discharge capacitor 45.
_When the voltage V _{I1 of the STB} reaches the voltage expressed by the following equation V _I1 = V _C1 + V _BE ... (4), the transistor is switched to the ON state. ,
Next formula When the voltage represented by the relational expression is reached, the state is switched to the ON state.

Therefore, the voltage V _I1 of the triangular wave signal S _STA changes from the negative maximum value to V _BE
/ 2 [V], the transistors 37 and 43 are turned on and off, respectively, during a period T1 until the positive maximum value is reached, whereby the terminal voltage V _C1 (FIG. 3B) rises at the voltage represented by the relational expression of the expression (4).

On the other hand, during a period in which the voltage V _I1 of the triangular wave signal S _STA falls from the positive maximum value by V _BE / 2 [V], both the transistors 37 and 43 are turned off, and the charge / discharge capacitor 45 Terminal voltage V _C1 is maintained at a predetermined voltage.

Further, during a period T2 from when the positive maximum value falls to V _BE / 2 [V] until the negative maximum value, the transistor
43 is switched to the ON state, whereby the terminal voltage V _C1 of the charging / discharging capacitor 45 falls at the voltage represented by the relational expression of Expression (5), and rises from the negative maximum value to V _BE 2 [V]. During this period, both the transistors 37 and 43 are turned off, and the terminal voltage V _C1 of the charge / discharge capacitor 45 is maintained at the predetermined voltage.

Thus, transistors 36-43, current source 39, resistor 41 and
Reference numeral 43 denotes a class B operation amplifier circuit as a whole, and the terminal voltage V _C1 of the charge / discharge capacitor 45 is changed to the input triangular wave signal S.
It is changed according to the voltage V _I1 of _STA.

On the other hand, the transistor 46 receives the voltage V _REF of the reference power supply 35 by connecting the diode-connected transistor 48 and the current source 49 to an emitter, and
And 52, a voltage lower than the emitter voltage by 3 / 2V _BE [V] is applied to the transistor 53.

On the other hand, the transistor 54 receives the reference voltage V _REF and holds the terminal voltage V _C2 of the charge / discharge capacitor 45 together with the transistor 53 at a predetermined voltage.

Thus, while the terminal voltage V _{C1 at the} other end is driven based on the triangular wave signal S _STA at the terminal voltage V _C2 of the charging / discharging capacitor 45, the triangular wave signal S
_{The STA} is driven based on a reference voltage V _REF instead of the voltage V _I1 of the _STA .

Therefore, the voltage V _I1 of the triangular wave signal S _STA changes from the negative maximum value to V
_While the voltage rises by _BE / 2 [V] and the transistor 53 switches to the ON state during the period T1 when the transistor 37 switches to the ON state, the voltage V _I1 of the triangular wave signal S _STA becomes
During a period T2 in which the transistor 43 switches to the ON state by falling from the positive maximum value by V _BE / 2 [V], the transistor 54 switches to the ON state.

Thus, in the discharge capacitor 45, the periods T1 and T2
During this period, the transistors 37 and 53 and the transistors 43 and 54 alternately switch on and off, and during the period T1, the charging current I _A1 (= I _A2 ) flows through the path of the transistor 37-discharge capacitor 45-transistor 53. In contrast, while the terminal voltage V _C of the charge / discharge capacitor 45 changes in proportion to the triangular wave signals S _STA and S _STB , the discharge current I _B1 flows through the path between the transistor 54, the discharge capacitor 45, and the transistor 43 during the period T2. (=
I _B2 ) flows, and the terminal voltage V _C changes in proportion to the triangular wave signal S _STA .

Therefore, for the current I flowing through the discharge capacitor 45 during the periods T1 and T2, if the capacitance of the discharge capacitor 45 is set to C _S , the following equation is obtained. And the differential current of the triangular wave signal S _STA can be obtained.

Thus, the reference current 35, the transistors 46, 48 and 53,
The current source 49 and the resistors 51 and 52 are connected to the first
A first current source configured to supply the charging current _IA2 to the terminal of the first terminal to maintain the voltage V _C2 of the first terminal at a predetermined voltage V _REF −V _BE / 2, 35, transistor
46, 48 and 54, the current source 49, and the resistors 51 and 52 apply the discharge current _IB1 to the first terminal of the charge / discharge capacitor 45, and change the voltage _VC2 of the first terminal to a predetermined voltage _VREF - _VBE. In a second current source.

Further, transistors 36, 37 and 38, a current source 39, a resistor 41
And 42 are charging currents at the second terminal of the charging / discharging capacitor 45.
I _A1 is applied to form a third current source that changes the voltage V _C1 of the second terminal according to the input voltage V _I1 , whereas the transistors 36, 38 and 43, the current source 39, The resistors 41 and 42 connect the discharge current I to the second terminal of the charge / discharge capacitor 45.
By providing _B2 , a fourth current source is configured to change the voltage V _C1 of the second terminal according to the input voltage V _I1 .

Therefore, a triangular wave signal is generated at transistors 37 and 53.
In the S period of the signal level is increasing the _STA T1, whereas the collector current I _A1 and I _A2 proportional to the rate of increase in the signal level is obtained, the transistors 54 and 43, the triangular wave signal S _STA signal level in the period of decreasing T2, it is possible to obtain a collector current I _B1 and I _B2 proportional to the reduction ratio of the signal level.

Therefore, if the collector currents I _A1 and I _B2 or I _A2 and I _B1 are output by, for example, a current mirror circuit, the emitter resistances of the transistors 37, 43, 53 and 54 are set to R _E and the triangular wave signal S
_STA of the amplitude and frequency at the V and f, it is possible to obtain a differential signal of the formula _{I 0 = 4C S R E Vf} ...... current I ₀ which is represented by the relational expression (7).

At this time, the emitter resistance of the transistor 37,43,53 and 54, from becoming small resistance value as negligible in practical circuit operation, it is possible to obtain a steep current I ₀ of the rise and fall .

By outputting the Supporting connexion the current I ₀ to the load resistance of the resistance value R _L (sufficiently large value with respect to the resistance value R _E), the following equation _{V 0 = R L I 0 =} 4C S R L Vf ...... ( 8) It is possible to obtain the output voltage V ₀ expressed by the relational expression, and to obtain a differential signal in which the waveform is prevented from being rounded.

Further, since a differential signal of a current output can be obtained from the differentiating circuit 30, a differential signal having a desired signal level can be obtained by selecting the resistance value _RL of the load resistor as shown in Expression (8). Can be.

Further, in this case, the triangular wave signal S is only provided during the periods T1 and T2.
The differential signal of the _STA can be obtained, and the moving speed can be detected with high accuracy.

That is, the triangular wave signal S _{STA of the} magnetic disk device is actually
In the case of _SSTB and _SSTB , the waveform is rounded and output near the maximum value, so that there is a problem that the detection accuracy of the moving speed is deteriorated.

Therefore, if the differential signal is obtained only during the period in which the triangular wave signal _SSTA has good linearity as in this embodiment, the detection accuracy can be improved accordingly.

Further, in this embodiment, the currents I _A1 and I _B1 flowing out of the power supply line V _CC and the currents I _A2 and I A
_Since it is possible to obtain a current having the same current value with _B2 , the transistors 37 and 54 and the collector currents of the transistors 53 and 54 are received by a current mirror circuit, and are switched and output according to the moving direction of the magnetic head. A differential signal having a polarity corresponding to the moving direction can be obtained.

Therefore, unlike the related art, it is not necessary to use an inverting amplifier circuit, so that the generation of the offset voltage can be prevented correspondingly.

That is, the differentiating circuit 32 has the same configuration as that of the differentiating circuit 31, and the triangular wave signal has a voltage equal to the voltage _VREF of the reference power supply 57.
Receives triangular wave signal S _STB obtained by level shifting _STA .

Further, based on the charging / discharging current of the charging / discharging capacitor 56, the differentiating circuit 32 generates the differential currents I _A3 , I _A4 , I _B3 during a period in which the signal level of the triangular wave signal S _STB rises and a period in which the signal level falls.
And _IB4 are output.

In the speed detection circuit 30, a current mirror circuit composed of transistors 60 and 61 and a power supply line V _CC
Selector circuits 62, 63, 64 and 65 each having a contact connected thereto are provided, and output currents I _A1 , I _B1 and I of the differentiating circuits 31 and 32 are respectively provided.
_A3 and _IB3 are received by the selection circuits 62, 63, 64 and 65.

Further, the speed detection circuit 30 includes transistors 70, 71, and 72.
And includes four current-mirror circuit formed by 73, 74 and 75, 76 and 77, along with receiving the output current I _B2, I _A2, I _B4 and I _A4, respectively to the current mirror circuit differentiating circuit 31 and 32 The output current of the current mirror circuit is output to the load resistor 82 via the selection circuits 78, 79, 80 and 81.

One end of the load resistor 82 is grounded via a power supply 83, and the other end receives an output signal of a current mirror circuit composed of transistors 60 and 61.

Therefore, selection circuits 62, 63, 64 and 65 and selection circuits 78 and 7
By sequentially switching the contacts of 9, 80 and 81 in accordance with the moving direction of the magnetic head, a speed detection signal having a polarity corresponding to the moving direction of the magnetic head and a signal level corresponding to the moving speed.
S _vo can be obtained as the terminal voltage of the load resistor 82.

That is, as shown in FIG. 4, the triangular wave signals T _TA and S _TB
(FIG. 4 (A) and (B)) with the triangular wave signal S _TA inverted signal S _TIA (FIG. 4 (C)) the comparison signal obtained from S _HA and S of
Four control signals S _C1 , S _C2 , and S _C3 output from the NAND circuits 15 to 18 with reference to _HB (FIGS. 4D and 4E).
And S _C4 (FIGS. 4 (F), (G), (H) and (I))
The selection circuits 62 and 78, 63 and 79, 64 and 80, respectively,
65 and 81, and during the period when the logic levels of the control signals S _C1 , S _C2 , S _C3 and S _C4 fall to logic “L”, the selection circuits 62 and 78, 63 and 79, 64 and 80, 65 And 81 output current
I _A1 and I _B2, I _B1 and I _A2, I _A3 and I _B4, I _B3 and I _A4 (Fig. 4 (J), (K), (L) and (M)) by sequentially outputs) , The speed detection signal S _VO (FIG. 4 (N)) can be obtained.

Thus, it is possible on the basis of the rounding with no differential signal waveform rise and fall, it is possible to obtain a speed detection signal S _VO, detects the speed with high accuracy by reducing correspondingly Ritsupuru.

In the above configuration, the triangular wave signals S _STA and S _STB are level-shifted by a voltage equal to the voltage V _REF of the reference power supply 35 and input to the differentiating circuits 31 and 32.

In the differentiating circuit 31, the triangular wave signal S _STA is given to a buffer circuit composed of the transistors 36 and 38 and the current source 39, whereby the signal level of the triangular wave signal S _STA rises during a period T1 and during a falling period T2. The charge current _IA1 and the discharge current _IB2 are supplied to the second terminal of the charge / discharge capacitor 45 via the transistors 37 and 43, respectively.

Thus, during the period T1 in which the signal level of the triangular wave signal S _STA rises, respectively via the transistor 37 and 53, the triangular wave signal charge current becomes a differential current S _STA I _A1
And _IA2 are obtained, and during the period T2 during which the signal level of the triangular wave signal _SSTA falls, the discharge currents _IB1 and _IB2 are obtained via the transistors 54 and 43.

Similarly, in the differentiating circuit 32, during a period during which the signal level of the triangular wave signal S _STB rises and a period during which the triangular wave signal S _STB falls, a charging current _IA3 and a discharging current, each of which is a differential current of the triangular wave signal S _STB flowing out of the power supply line V _CC. and I _B3, the charging current I _A3 and the discharge current I _B3 and values are equal, the charging current I _A4 and the discharge current I _B4 flowing into the earth line can be obtained.

Charging current I _A1 and the discharge current I _B1 and the charging current I _A3 and the discharge current I _B3 flows from the power supply line V _CC, the selection circuit 6
2, 63, 64 and 65 to a current mirror circuit composed of transistors 60 and 61, thereby sequentially controlling the control signals S _C1 , S _C2 , S _C3 and S _C4 every quarter cycle. It is switched and applied to the load resistor 82.

In contrast, the charging current I _A2 flowing into the ground line
And the discharge current _IB2 , the charge current _IA4, and the discharge current _IB4 are current mirror circuits (70, 71), (72, 73),
Selection circuits 78, 79, 80 via (74, 75) and (76, 77)
And 81, whereby the control signals S _C1 , S _C2 , S _C2
, And are sequentially switched every quarter cycle based on _SC4 and applied to the load resistor 82.

Control signals S _C1, S _C2, S _C3 and S _C4, based on the inverted signal S _TIA triangular wave signal S _TA and S _TB with a triangular wave signal S _TA, logic level sequential logic in accordance with the moving direction of the magnetic head " L "
Thus, a speed detection signal _SVO having a polarity corresponding to the moving direction of the magnetic head and a signal level corresponding to the moving speed can be obtained.

According to the above configuration, the terminal voltage V _C2 at one end of the charge / discharge capacitor 45 is maintained at a predetermined voltage, and the terminal voltage V _C1 at the other end is changed according to the signal levels of the triangular wave signals S _STA and S _STB. In this way, waveform distortion is prevented beforehand, and the charging current I _A1 which is a differential current of the triangular wave signals S _STA and S _STB respectively flowing out of the power supply line V _CC is obtained.
And the discharge current _IB1 , the charge current _IA3, and the discharge current _IB3 are obtained.On the other hand, the charge current _{IA1, the} discharge current _IB1 , the charge current _IA3, and the discharge current _IB3 have the same value. charging current flows into the I _A2 and the discharge current I _B2 and the charging current I _A4
And a discharge current _IB4 .

Therefore, the charging currents I _A1 , I A flowing out of the power supply line V _CC
A3 and discharge currents _IB1 , _IB3 and charge currents _IA2 , _IA4 and discharge currents _IB2 , _IB4 flowing into the ground line are sequentially switched at predetermined timing and output to the load resistor 82, The influence of the offset voltage is prevented beforehand, and a differentiated signal without waveform distortion can be obtained. Thus, a speed detection signal with high detection accuracy can be obtained.

(G2) Second Embodiment In FIG. 5, in which parts corresponding to those in FIG. 1 are assigned the same reference numerals, reference numeral 85 denotes a differentiating circuit as a whole, in which an NPN transistor and a PNP transistor are replaced.

That is, the triangular wave signal _SSTA is received by the transistors 38 and 43, and the transistor 36 is diode-connected.

Further, the voltage between the collector and the emitter of the transistor 36 is divided by the resistors 41 and 42, and the divided voltage is
Output to 37.

Correspondingly, reference voltage V _REF is applied to transistors 48 and
At 53, the transistor 46 is diode-connected.

Further, the voltage between the collector and the emitter of the transistor 46 is divided by the resistors 51 and 52, and the divided voltage is
Output to 54.

Therefore, in the first embodiment, the first current source including the reference power source 35, the transistors 46, 48, and 53, the current source 49, and the resistors 51 and 52, and the reference power source 35, the transistor 46,
48 and 54, a current source 49, and a second current source composed of resistors 51 and 52 are connected to a voltage V of a first terminal of the charge / discharge capacitor 45.
_{While C2} is held at the voltage V _REF -V _BE / 2 and the voltage V _REF -V _BE respectively, in this embodiment, the voltage V _C2 at the first terminal of the charge / discharge capacitor 45 is changed to the voltage V _REF + V _BE and V _REF
+ V _BE / 2.

Further, in the first embodiment, the transistors 36 and 37
And 38, a current source 39, a third current source composed of resistors 41 and 42, transistors 36, 37 and 43, a current source 39, and a resistor 41.
And a fourth current source composed of (42)
In contrast to changing the second terminal voltage V _C1 of the charging / discharging capacitor 45 in accordance with the input voltage V _I1 so that the relational expression of the expression (5) holds, in this embodiment, V _C1 = V _I1 + V _BE … (10)
The second terminal voltage V _C1 at 45 is changed.

Therefore, similarly to the first embodiment, a differential current of the triangular wave signal _SSTA can be obtained.

According to the above configuration, the same effect as that of the first embodiment can be obtained even if the NPN transistor and the PNP transistor are replaced.

(G3) Other Embodiments In the above embodiment, the case where the voltage dividing resistors 41 and 42 having the same resistance value are used has been described.
And 42 are not limited to these, and can be freely selected as needed.

Further, in the above-described embodiment, the case where the second terminal voltage of the charge / discharge capacitor is driven with reference to the reference voltage V _REF is described. However, the present invention is not limited to this. May be driven on the basis of.

Further, in the above-described embodiment, the differentiating circuits 31 and 32
Has been described in connection with the case of sequentially switching and outputting the eight differential currents obtained from the above. However, the present invention is not limited to this, and a desired differential current can be selected from the differential signals and used as necessary. You may.

Further, in the above-described embodiment, the case where the differentiating circuit according to the present invention is applied to the speed detecting circuit of the magnetic disk device has been described, but the present invention is not limited to this, and for example, the speed detecting circuit of the optical disk device, etc. The present invention can be widely applied not only to the speed detection circuit but also to various differentiating circuits.

H Effect of the Invention As described above, according to the present invention, the terminal voltage at one end of the charge / discharge capacitor is maintained at a predetermined voltage, and the terminal voltage at the other end is changed according to the signal level of the input signal. Accordingly, it is possible to prevent the waveform from being rounded, and obtain a charging current and a discharging current whose current values change in accordance with the rate of increase and decrease of the signal level of the input signal.

Further, at this time, since the charging current and the discharging current flowing out of the power supply line V _CC and the charging current and the discharging current flowing into the earth line can be obtained at the same current value, the charging current and the discharging current are set to predetermined values. By sequentially switching at the timing described above and outputting to the load resistor, the influence of the offset voltage can be prevented beforehand, and a differentiated signal without waveform distortion can be obtained. Thus, a speed detection signal with high detection accuracy can be obtained.

[Brief description of the drawings]

FIG. 1 is a connection diagram showing a differentiating circuit according to an embodiment of the present invention, FIG. 2 is a connection diagram showing a speed detecting circuit, FIGS. 3 and 4 are signal waveform diagrams for explaining the operation thereof, and FIG. FIG. 6 is a connection diagram showing a second embodiment of the differentiating circuit, FIG. 6 is a connection diagram showing a conventional speed detection circuit, FIG. 7 is a signal waveform diagram for explaining the operation thereof, and FIG. FIG. 3 is a signal wave diagram for explanation. 1, 30 ... speed detection circuit, 31, 32 ... differentiation circuit, 45, 56
…… charge / discharge capacitor, 82 …… load resistance.

Claims (1)

(57) [Claims] A charging / discharging capacitor; a first current source configured to supply a charging current to a first terminal of the charging / discharging capacitor to maintain a voltage of the first terminal at a predetermined voltage; A second current source configured to supply a discharge current to the first terminal of the charge / discharge capacitor and maintain a voltage of the first terminal at a predetermined voltage; and a second terminal of the charge / discharge capacitor. A third current source configured to change a voltage of the second terminal according to an input voltage by applying a charging current to the second terminal of the charging / discharging capacitor; And a fourth current source adapted to change the voltage of the second terminal according to the input voltage.