JP2560203B2 - Integrated photo detector - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called optical IC, which is an integrated light receiving element in which a light receiving element and its signal processing circuit are integrated into one chip.

[0002]

2. Description of the Related Art Conventionally, there are optical ICs as shown in FIGS.

That is, FIG. 6 is an electric circuit diagram thereof, in which 1 is a photo diode, 2 is an amplifier for amplifying the output signal of the photo diode, and 3 is on-off processing of the amplified signal. Schmitt trigger circuit,
4 is an output transistor driven by the Schmitt trigger signal, 5 is its load resistance, and 6 is a stabilized power supply.

Further, FIG. 7 shows a device structure in which the above circuit is made into one chip, and its constituent elements are a photodiode 1 and an output transistor 4, which is an NP.
A portion of the N-transistor 7 and the base diffusion resistor 8 corresponding to the load resistor 5 is shown.

Namely, the device structure is an n ⁺ buried layer 10 provided on the left and right side in the P-type silicon substrate 9, the n ⁺
An n ⁻ epitaxial layer 11 is provided on the upper surface of the buried layer 10 and the central upper surface of the P-type silicon substrate 9. Further, a P-type base diffusion layer 12 is provided on the surface of the n ^- epitaxial layer 11 on the left and right sides, of which the P-type base diffusion layer 12 on the left side and the n ^- epitaxial layer 11 on the left side and the center are provided.
An n ⁺ emitter diffusion layer 13 is provided on the upper surface. The upper surface is covered with an oxide film 14, and an Al wiring 15 is provided so as to penetrate the oxide film 14.

In the above device structure, the photodiode 1 in the central portion has a pn junction formed between the P type silicon substrate 9 and the n ⁻ epitaxial layer 11, and the P type silicon substrate 9 serves as an anode. In the NPN transistor 9, the n ⁺ emitter diffusion layer 13 on the left P-type base diffusion layer 12 is the emitter, the P-type base diffusion layer 12 is the base, and the n ⁻ epitaxial layer 11 is the collector. Further, the base diffusion resistor 8 is formed by the P-type base diffusion layer 12 on the right side.

In the optical IC having the above structure, when light strikes the photodiode 1 reverse biased, a minute photocurrent flows. This current is converted into a voltage by the amplifier 2 and input to the Schmitt trigger circuit 3. You. The Schmitt trigger circuit 3 has a hysteresis that turns on when the input voltage exceeds a certain level and turns off when the input voltage falls below a certain level.

The output of the Schmitt trigger circuit 3 drives the output transistor 4 and the signal is taken out from there. That is, the output transistor 4 compares the light intensity of the irradiation light with a reference value with a predetermined hysteresis, and outputs a signal of "0" or "1" corresponding thereto.

[0009]

However, in the above-mentioned conventional optical IC, since the photocurrent detection portion of the photodiode is composed of the amplifier and the Schmitt trigger circuit, the number of constituent elements is very large. There is a problem that the occupied area becomes large, and the detection is performed by converting the voltage and then comparing with the reference voltage, so that there are many error factors, so that there are many sensitivity variations and a large temperature dependence.

In view of the above problems, an object of the present invention is to provide a small-sized integrated photodetector with high detection accuracy.

[0011]

In order to achieve the above-mentioned object, the present invention is formed integrally on a chip, and the anode is contacted.
The grounded cathode and a photodiode connected to the output end are integrally formed on the chip. One end is connected to the positive power supply and the other end is connected to the output end. An integrated light-receiving element including an element, wherein the current source element has a junction type transistor having a gate connected to a positive power source and a drain connected to an output terminal, and a source connected to a source of the junction type transistor. And a MOS transistor connected to the drain of the junction transistor by short-circuiting the drain and the gate,
A resistor connected between the gate and the source of the junction transistor, and a voltage between the positive power supply and the output terminal is lower than a predetermined voltage, a first current value, It is characterized in that it has a current-voltage characteristic of being a second current value lower than the first current value when it is high.

[0012]

In the present invention, when the photodiode is irradiated with light and the intensity of the light is weak, the photocurrent is the first of the current source element.
The voltage between the terminals of the current source element corresponding to the current value is sufficiently small and the voltage at the output terminal remains at the H level.

On the other hand, when the light intensity becomes strong and the photocurrent reaches the first current value of the current source element, the voltage between the terminals of the current source element sharply increases and the potential of the output end sharply decreases. ,
The potential converges to the L level.

At this time, the voltage between the terminals of the current source element exceeds a predetermined voltage, and the output has a second current value.

On the other hand, when the light intensity becomes weak again, the photo-excited electron holes of the photodiode decrease in proportion to it, and when the corresponding photocurrent reaches the second current value of the current source element. The voltage between the terminals of the current source element sharply decreases, and the voltage at the output end sharply rises to reach the H level. Further, at this time, the voltage between the terminals of the current source element falls below the predetermined voltage, and the output thereof has the first current value.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. The same components as those in the related art will be described with the same reference numerals.

FIG. 1 shows an electric circuit diagram of an optical IC according to the present invention, which includes a photodiode 1, a current source element 16 having a current-voltage characteristic which will be described later, and a source-follower type impedance converter 17. It consists of The parts corresponding to the stabilized power supply 6 and the output transistor 4 in FIG. 6 described above are omitted for simplification of the drawing.

In the photodiode 1, the anode is grounded and the cathode is connected to one of the current source elements 16,
The connection point a is connected to the input side of the impedance converter 17.

The other of the current source elements 16 is connected to a positive power source, and the voltage / current characteristics of the current source element 16 are shown in FIG.

That is, when the applied voltage V at the point a given by the current of the photodiode 1 is less than the predetermined value V ₁ , the output current value I generated by the current source element 16 is I.
_{When the} applied voltage V exceeds a predetermined value V ₁ , a current I ₂ smaller than I ₁ is output.

FIG. 3 shows an example of a circuit in which the current source element 16 is a normal integrated circuit element.

That is, the gate of a P-channel junction field effect transistor (hereinafter referred to as "JFET") 18,
Resistor 19 is connected between the sources and P channel MO
The source of the S transistor 20 is connected to the source of the JFET 18, and the drain and the gate are short-circuited to be connected to the drain of the JFET 18.

The characteristic of the circuit having the above-mentioned structure is JFET1.
When the drain current I _DS of No. 8 is approximated by the square characteristic, it is expressed by the following equation.

[0024]

[Equation 1]

The drain current _I'DS of the MOS transistor 20 in the same manner shown by the following equation is expressed by approximation with the square characteristics.

[0026]

[Equation 2]

The gate of the MOS transistor 20
Since the drains are short-circuited, they are always kept in the saturated region.

Now, let the resistance value of the resistor 19 be R _0, and now,
The voltage V ₀ applied to both terminals of the current source element 16 is low, and
When S transistor 20 is in OFF state current value I _P between the both terminals become equal to the drain current I _DS of JFET18, therefore, I ₁ and substituting V _GS = R ₀ I ₁ of the above (1) Is calculated as follows.

[0029]

(Equation 3)

Further, the applied voltage V ₀ increases and V
_{When TH} + R ₀ I ₁ (= V ₁ ) is reached, the MOS transistor 20 is turned on, and positive feedback is applied via the resistor 19, so that the output current decreases and shows a negative resistance. Further, when the value of I _{2 in} the characteristics shown in FIG. 2 above is approximated to the L-level convergence value, I ₂ can be expressed by the following equation.

[0031]

[Equation 4]

Therefore, the current source element 16 can realize a current source having a hysteresis as shown in FIG. 4 by turning on and off the MOS transistor 20.

FIG. 5 shows a sectional structure in which the photodiode 1 and the current source element 16 of the above-described circuit are made into a one-chip device.

That is, the n ⁺ buried layer 10 is provided in the center on the right side of the P-type silicon substrate 9, and n ^{− is formed on} the left and right upper surfaces.
An epitaxial layer 11 is provided. In the drawings, 12 and 12 'right n ^- is a P-type base diffusion region connected by P-type channel region 21 on the epitaxial layer 11, further both n ^- n ⁺ emitter diffusion region 13 on the epitaxial layer 11 , 13 are provided.

In the figure, 14 is a SiO ₂ film and 15 is a SiO film.
₂ is an Al wiring provided through the film 14.

In the above device structure, the photodiode 1 is formed by using the pn junction formed between the P-type silicon substrate 9 and the left n ^- epitaxial layer 11 with the P-type silicon substrate 9 as the anode. ing.

The P-type diffusion region 12 'realizes the resistance 19 and the SiO ₂ film 1 on the P-type diffusion region 12' is formed.
4 forms a gate oxide film 22, and JFET 18 and MOS
The transistor 20 shares the gate and the drain.
Further, the P-type diffusion regions 12 and 12 'are connected to JFET 18 and M
The drain and the source of the OS transistor 20 are shared.

Now, the optical IC having the above-mentioned structure
The operation will be described with reference to FIG.

Now, when the photo diode 1 is irradiated with light and the light intensity is weak, the photocurrent I _P is the photocurrent I _P.
It is smaller than the ON current I _{1 of} 6 and the voltage at the point a remains at the H level.

On the other hand, when the light intensity increases, the photocurrent I
_P becomes larger than the ON current I ₁ of the current source element 16, and a
The potential at the point sharply decreases, and when the potential becomes lower than V ₁ , positive feedback works and converges to 0, that is, L level.

On the other hand, when the light intensity becomes weak again, the photocurrent I _P of the photodiode 1 decreases in proportion to it, and when it becomes smaller than the OFF current I ₂ of the current source element 16, the voltage at point a rises sharply. Then, the positive feedback acts at a point where it becomes larger than V ₁ and reaches the H level, that is, Vcc volt at once.

As described above, the photocurrent corresponding to the intensity of light at the point a is compared with the current of the current source element , and the output signal of "0" or "1" is output from the output transistor (not shown) through the impedance converter 17. Can be sent.

As described above, according to the present embodiment, by connecting the photodiode and the current source element having the above-mentioned current-voltage characteristic in series on one chip, the voltage at point a with respect to the photocurrent. Since the configuration has the hysteresis characteristic, the number of constituent elements is small, the occupied area can be reduced, and since voltage conversion is not performed, variations in sensitivity and temperature dependence can be reduced.

[0044]

INDUSTRIAL APPLICABILITY The present invention provides a photodiode and a positive electrode.
First if the voltage between the source and the output is lower than a predetermined voltage
If the current value is higher than the predetermined voltage, the first
By connecting in series with a current source element having a current-voltage characteristic that is a second current value lower than the current value of, the potential at the output end has a hysteresis characteristic with respect to the photocurrent. Is less, and therefore the occupied area is smaller, and sensitivity variations and temperature dependence are also reduced.
It is possible to make the optical IC small in size and high in detection accuracy.

[Brief description of drawings]

FIG. 1 is an electric circuit diagram of an integrated light receiving element according to the present invention.

FIG. 2 is a characteristic diagram of a current source element.

FIG. 3 is an electric circuit diagram of an example of a photocurrent source element.

FIG. 4 is an explanatory diagram showing a relationship between current and voltage at point a shown in FIG.

5 is a cross-sectional view showing a device structure in which the integrated light receiving element shown in FIG. 1 is made into one chip.

FIG. 6 is an electric circuit diagram of a conventional integrated light receiving element.

7 is a cross-sectional view of a device structure in which the integrated light receiving element shown in FIG. 6 is made into one chip.

[Explanation of symbols]

1 Photo Diode 9 P-type Silicon Substrate 10 n ⁺ Buried Layer 11 n ^- Epitaxial Layer 12 P-type Base Diffusion Region 13 n ⁺ Emitter Region 14 Oxide Film 15 Al Wiring 16 Current Source Element 17 Impedance Converter 18 P-Channel Junction Type Electric Field Effect transistor (JF
ET) 19 resistor 20 MOS transistor 21 P-type channel region

Claims (1)

(57) [Claims] 1. An anode integrally formed on a chip
Is a grounded and photodiode whose cathode is connected to the output end, and a current source element which is integrally formed on the chip and has one end connected to the positive power supply and the other end connected to the output end. An integrated light-receiving element, wherein the current source element includes a junction type transistor having a gate connected to a positive power source and a drain connected to an output terminal, and a source connected to a source of the junction type transistor. A MOS transistor connected between the drain and the gate of the junction transistor by shorting the drain and the gate; and a resistor connected between the gate and the source of the junction transistor, and between the positive power supply and the output terminal. If the voltage is lower than the predetermined voltage, the first current value is reached, and if it is higher than the predetermined voltage, the second current value is lower than the first current value. An integrated light-receiving element having a current-voltage characteristic of a flow value.