JP2560042Y2 - Elevator speed detector - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to speed control of an elevator, and more particularly to an improvement of a speed detecting device capable of economically and accurately detecting the speed of an elevator in the entire speed range.

[0002]

2. Description of the Related Art In recent years, a system has been put into practical use in which a car speed of an elevator or a rotation speed of a hoisting motor is digitally detected. This is to detect the actual speed of the car by generating a pulse signal corresponding to the moving amount and moving direction of the car and counting the pulse signal at predetermined time intervals.

An apparatus for generating such a pulse signal is disclosed in, for example, Japanese Patent Application Laid-Open No. 57-72583.

A pulse signal according to this method is generally directly connected to a drive sheave of a hoist or a sheave of a governor, or connected to a rotating disk or car via a transmission mechanism such as a pulley. It is obtained from a disk directly connected to a sheave around which a main rope or the like is wound.

[0005] Further, in this type of disk, fine holes are provided at equal intervals on the periphery thereof, and by detecting these fine holes optically or electromagnetically, the fine holes are proportional to the rotation speed of the disk. A pulse of a frequency is obtained.

In the speed control of an elevator, when used for determination of a deceleration position or position feedback control during deceleration, the unit for detecting the distance of a pulse signal may be about several mm.
When used for speed feedback control, detection accuracy becomes a problem, and in the method of counting the pulse signals arriving within a predetermined time and detecting the speed, it is necessary to reduce the distance detection unit by one or two digits, In addition, in the low-speed region, the number of pulse signals generated per unit time is reduced. Therefore, when detecting the speed, the distance conversion value of one pulse must be further reduced.

Therefore, at present, in order to increase the number of pulses generated in a low-speed region, a method of increasing the distance detection resolution per pulse by mechanical means of speed-up coupling using gears and pulleys is adopted.

[0008]

However, in this method, the number of pulse signals generated in a unit time in a high-speed region is extremely increased. Therefore, a multi-digit counter for speed calculation must be used. However, a general-purpose IC cannot be used, and an economical speed detecting device cannot be obtained.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to provide an economical speed detecting device that provides good speed control performance in both low speed and medium speed regions.

[0010]

According to the present invention, (1) an encoder for outputting a pulse signal in accordance with the rotation of an electric motor for driving an elevator is installed, and the speed of the elevator is detected by the encoder to perform speed feedback control. A first frequency divider, a second frequency divider, a second frequency divider, a switching device for switching between an output of the second frequency device and an output of the first frequency divider, and at least two or more counters; The counter directly receives the output pulse signal of the encoder, the second counter receives the output of the switching device as an input, and the switching device outputs the output of the frequency dividing device to the second when the output of the first counter is a predetermined value or more. Otherwise, the output of the frequency multiplier is input to the second counter. (2) An encoder that outputs a pulse signal in accordance with the rotation of the motor for driving the elevator is installed, the speed of the elevator is detected by the encoder, and the speed feedback control is performed using a central processing unit. An output pulse signal frequency multiplier and frequency divider; a switching device for switching between the output of the frequency multiplier and the output of the frequency divider; and at least two or more counters. The second counter receives the output of the switching device as an input, and the switching device inputs the output of the frequency dividing device to the second counter when the output of the first counter is equal to or greater than a predetermined value. Inputs the output of the frequency multiplier to the second counter, and the central processing unit selects the second counter output at normal times and the first counter output at abnormal times. Things.

[0011]

With the above construction, even if the elevator speed changes over a wide range, the speed detection counter does not overflow.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a speed detecting device according to the present invention, FIG. 2 is a block diagram showing a speed control system of an elevator, and FIG. 3 is a diagram showing a timing chart of output pulses in FIG. 1 is a sheave driven by an electric motor 2 for hoisting the elevator, 3 is a main rope connected to the elevator car 4 and connected to the weight 5, and 6 is a pulse encoder directly connected to a shaft of the electric motor 2 for hoisting the elevator. Two signals of an A-phase pulse and a B-phase pulse having a phase difference of about 90 ° as shown are output. Reference numeral 7 denotes a speed detection device according to the present invention that calculates the speed of the elevator car 4 based on the output pulse of the pulse encoder 6 by a procedure described later.

Reference numeral 8 denotes a drive control device for comparing the speed set value S with the output V of the speed detection device 7 and amplifying the difference to control the elevator hoisting motor 2. Reference numeral 71 denotes an A-phase pulse of a pulse encoder or A counter for counting the number of pulses in a certain sampling time in the B-phase pulse,
Numeral 72 converts the A-phase pulse and the B-phase pulse into a pulse signal (quadrupled signal) which becomes one pulse at each pulse edge as shown in FIG. 3 in order to increase the detection resolution.
The frequency multiplying circuit 73 outputs a pulse signal (1 for every four pulses of a signal that becomes one pulse at the edge of the A-phase pulse or the B-phase pulse).
A 波形 frequency dividing circuit for converting the waveform of (multiplied signal).

A counter 74 counts the number of pulses within a certain sampling time in the output pulse of the quadruple frequency dividing circuit 72 or the output pulse of the 1/4 frequency dividing circuit 73.
Is the 1/4 frequency divider circuit 7 when the elevator car 4 is operating at high speed.
3 and a switch connected to the quadruple frequency circuit 72 during low-speed operation, which is automatically switched by the frequency division ratio selection latch 76. The division ratio selection latch 76 has a counter 71
Switch 75 is actuated depending on whether the output is equal to or greater than a predetermined value.

Reference numeral 77 denotes a well-known central processing unit which is connected to the counters 71 and 74 and the division ratio selection latch 76 via a data bus line 80 and performs various operations. 78 denotes a central processing unit for speed detection operation. This is an interrupt timer for applying an interrupt when used in the system.

That is, in the case of the present invention, the output V of the speed detecting device 7 is obtained from the quadruple frequency circuit 72 in the low speed region during the acceleration and deceleration of the elevator as shown in FIG. The signal 72a has an extremely high accuracy, and in a high-speed region such as when the elevator is at a constant speed, the 1/4 frequency dividing circuit 7a is used.
If the signal output from the counter 74 through the quadruple frequency dividing circuit 72 or the 1/4 frequency dividing circuit 73 is abnormal, the counter 73 outputs a signal as a backup. The signal 71a is used.

[0017]

As described above, according to the present invention, even if the elevator speed increases, the frequency of the pulse signal to be counted does not become excessive, and a general-purpose IC counter having a small number of digits is sufficient. In addition, when the elevator speed is low, the frequency of the pulse signal does not become extremely low, so that good speed control accuracy can be obtained. Further, since speed information of two independent systems is always obtained, it is possible to confirm the presence / absence of abnormality by comparing and checking them, and to back up immediately if there is an abnormality, thereby always obtaining highly reliable speed information.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a speed detection device according to the present invention.

FIG. 2 is a block diagram showing an elevator speed feedback control system.

FIG. 3 is a diagram showing a timing chart of output signals of each device in FIG. 1;

FIG. 4 is a diagram illustrating a relationship between a speed region and a speed signal according to the present invention in FIG.

[Explanation of symbols]

 2 Motor 6 Encoder 7 Speed Detector 71, 74 Counter 72 Quadruple Frequency Circuit 73 1/4 Frequency Dividing Circuit 76 Frequency Division Ratio Selection Latch 77 Central Processing Unit

Claims (2)

(57) [Scope of request for utility model registration] An encoder for outputting a pulse signal in accordance with rotation of an electric motor for driving an elevator is installed, and the encoder detects the speed of the elevator to perform speed feedback control. A frequency multiplier and a frequency divider; a switching device for switching between the output of the frequency multiplier and the output of the frequency divider; and at least two or more counters, wherein the first counter outputs the output pulse signal of the encoder. Directly input, the second counter receives the output of the switching device as an input, and the switching device inputs the output of the frequency dividing device to the second counter when the output of the first counter is equal to or more than a predetermined value. And an output of the frequency multiplier is input to the second counter. An encoder for outputting a pulse signal in accordance with rotation of an electric motor for driving an elevator is installed, the speed of the elevator is detected by the encoder, and the speed feedback control is performed using a central processing unit. A multiplying device and a dividing device for the output pulse signal of the encoder, a switching device for switching between the output of the multiplying device and the output of the dividing device, and at least two or more counters; The output pulse signal of the encoder is directly input, the second counter receives the output of the switching device as an input, and the switching device outputs the output of the frequency dividing device when the output of the first counter is equal to or more than a predetermined value. Otherwise, the output of the frequency multiplier is input to the second counter, and the central processing unit normally outputs the output of the second counter. , Abnormal speed detection device for an elevator, characterized by selecting said first counter output.