JP2555969B2 - Semiconductor device manufacturing apparatus and semiconductor device manufacturing method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method, and more particularly to a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method for selectively growing polycrystalline silicon on a silicon substrate. It is a thing.

[0002]

2. Description of the Related Art Conventionally, in forming an emitter diffusion layer of a bipolar bipolar transistor having a planar structure, polycrystalline silicon has been formed in a contact hole and this polycrystalline silicon has been used as an impurity diffusion source. That is, the emitter contact hole and the base contact hole are simultaneously opened in the insulating film by one photolithography process, and then the polycrystalline silicon doped with the n-type impurity is selectively formed only in the emitter contact. In such a semiconductor device manufacturing method, since both openings of the emitter contact and the base contact are simultaneously formed by the same photolithography process, it is possible to avoid the influence of so-called misalignment. Therefore, the contact window can be accurately opened, and a device having a fine pattern can be manufactured.

The above-described method of manufacturing a semiconductor device can be classified into the following two types. The first method of manufacturing a semiconductor device is to form a polycrystalline silicon film on the entire surface of a silicon substrate and then form a film on the insulating film. This is a method of removing polycrystalline silicon, and the second semiconductor device manufacturing method is a method of selectively forming polycrystalline silicon only in the contact holes.

First, a first method of manufacturing a semiconductor device (a method of forming an entire surface polycrystalline silicon) will be described with reference to FIG. This manufacturing method is the most widely adopted technology at present. First, as shown in FIG. 3A, the base region 6 is formed on the single crystal silicon substrate 5 by diffusion or the like, and the insulating film 12 is further formed. The insulating film 12 is formed of a silicon dioxide (SiO ₂ ) film, a silicon nitride (Si ₃ N ₄ ) film, or a laminated film thereof. This insulating film 12
Then, the openings of the emitter contact 7 and the base contact 8 are formed by using the photolithography technique.

Next, using a mixed gas of monosilane (SiH ₄ ) and nitrogen (N ₂ ) as a reaction gas, a reaction temperature of 600
Polycrystalline silicon 21 is grown on the entire surface of the single crystal silicon substrate 5 by the low pressure chemical vapor deposition method under the conditions of ˜700 ° C. and reaction pressure of 10˜100 Pa ((b) of FIG. 3). N-type impurities are ion-implanted over the entire surface of this polycrystalline silicon 21 or over the emitter contact hole 7 using a photoresist as a mask. Then, the single crystal silicon substrate 1 is annealed at 700 to 800 ° C. to activate the crystal defects and n-type impurity atoms introduced by ion implantation.
As a result, the impurity atoms segregate at the crystal grain boundaries.

Then, as shown in FIG. 3C, a photolithography technique and an etching technique are used to leave only the polycrystalline silicon 21 on the emitter contact 7,
The other polycrystalline silicon 21 portion is removed. At this time,
Considering the alignment margin of photolithography,
The width of the polycrystalline silicon 21 on the emitter contact 7 must be made wider than the width of the opening of the emitter contact 7.

Further, heat treatment is performed at 900 to 1000 ° C. to form an emitter diffusion layer 23 under the emitter contact 7.
Are formed ((d) of FIG. 3). That is, the n-type impurities in the polycrystalline silicon 21 are solid-phase diffused into the base region.
Thereafter, aluminum (Al) electrode wiring 22 is formed on the polycrystalline silicon 21 on the base contact 8 and the emitter contact 7, and passivation processing is performed.
With the above, all steps of the first semiconductor device manufacturing method are completed.

Next, a second semiconductor device manufacturing method (selective polycrystalline silicon growth method) will be described with reference to FIG. This manufacturing method is a method of selectively growing polycrystalline silicon only in the exposed portion of single crystal silicon in the contact hole using the insulating film as a mask, and has been extensively researched in recent years (Japanese Patent Laid-Open No. 61-61). 256626, JP-A-61-131434). As an example,
The manufacturing method disclosed in Japanese Patent Laid-Open No. 61-131434 will be described below.

In this manufacturing method, the growing single crystal silicon is polycrystallized by using a doping gas that prevents epitaxial growth in the low pressure vapor phase growth method. That is, trichlorosilane (SiHCl ₃ is bubbled with hydrogen as a reaction gas: flow rate 40
0 sccm), nitrogen (N _2: flow rate 6 slm), ammonia / nitrogen _{(NH 3 / N 2: 10ppm} ), 13.3~ as reaction pressure
Low pressure chemical vapor deposition is carried out under the conditions of 1333 Pa and a reaction temperature of 700 to 1100 ° C. Then, the crystal seed of silicon is first deposited on the exposed portion of the single crystal silicon in the contact hole, and the epitaxial growth proceeds on this crystal seed.

At this time, the ammonia (NH ₃ ) gas added to the reaction gas is trichlorosilane (SiHCl ₃ )
Reacts with the following chemical formula to form silicon nitride (Si ₃ N ₄ ) microcrystals during vapor deposition. The silicon nitride (Si ₃ N ₄ ) formed by 3SiHCl ₃ + 4NH ₃ → Si ₃ N ₄ + 9HCl + 3H ₂ divides the crystal of the epitaxially grown silicon, so that not the single crystal but the polycrystalline silicon grows. On the other hand, on the insulating film, silicon crystal seeds are not deposited under the above-mentioned conditions, so that silicon does not grow. As a result, polycrystalline silicon is grown only in the contact holes.

A method of manufacturing a semiconductor device using this selective polycrystalline silicon growth method will be described with reference to FIG. As shown in FIG. 4A, first, the insulating film 12 is formed on the semiconductor substrate 5 on which the base region 6 is formed. An emitter contact 7 and a base contact 8 are simultaneously opened in the insulating film 12 by using a photolithography technique. As shown in FIG. 4B, polycrystalline silicon 24, 2 is formed only in the emitter contact 7 and the base contact 8 by using the above-described selective polycrystalline silicon growth method.
5 is formed.

Subsequently, as shown in FIG. 4C, a resist film 26 is applied on the insulating film 12 by using a photolithography technique, and only a portion of the resist film 26 on the emitter contact 7 is coated. Open. Further, n-type impurities are selectively ion-implanted only into the polycrystalline silicon 24 using the resist film 26 as a mask. In the step shown in FIG. 4D, the insulating film 1 is formed by the photolithography technique.
A resist film 26 is formed on the resist film 2, and the base contact 8 of the resist film 26 is opened. Using this resist film 26 as a mask, p-type impurities are selectively ion-implanted only into the polycrystalline silicon 25.

After that, the resist film 26 is removed, and 900
A heat treatment is performed at up to 1000 ° C. to form an emitter diffusion layer 23 under the emitter contact 7 as shown in FIG. Finally, the aluminum (Al) electrode wiring 22 is formed on the polycrystalline silicon 24 and 25, and passivation processing is further performed.

[0014]

However, the conventional semiconductor device manufacturing method (manufacturing apparatus) described above has the following problems.

The first conventional semiconductor device manufacturing method (manufacturing apparatus) requires an etching step for removing an unnecessary portion of the polycrystalline silicon after forming the polycrystalline silicon on the insulating film. However, it has been difficult to efficiently manufacture a semiconductor device. In addition, the polycrystalline silicon must be formed to have a large width so as to cover the entire contact hole, which hinders miniaturization of the semiconductor device. Further, since the unnecessary portion is removed by etching after the polycrystalline silicon is formed on the entire surface of the insulating film, the polycrystalline silicon after etching has a shape protruding from the surface of the insulating film (see FIG. 3). (C)). As a result, there is a problem that a step also occurs in the aluminum electrode wiring formed on the polycrystalline silicon and the insulating film, and the aluminum electrode wiring is broken.

In the second conventional method for manufacturing a semiconductor device (manufacturing apparatus), polycrystalline silicon is selectively formed only in the contact holes, so that the surface of the polycrystalline silicon and the surface of the insulating film become flat. . Therefore, the above-mentioned problem such as disconnection of the aluminum electrode wiring does not occur. However, after selectively growing polycrystalline silicon in the emitter contact hole and the base contact hole at the same time, p-type impurities and n-type impurities must be separately ion-implanted into the polycrystalline silicon in the contact hole. Therefore, the photolithography process must be performed for at least two steps for this ion implantation, which makes it difficult to efficiently manufacture the semiconductor device.

[0017]

SUMMARY OF THE INVENTION Therefore, an object of the present invention is, in a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method, to perform fine processing of a semiconductor device, prevent disconnection of metal wiring, and improve the efficiency of manufacturing a semiconductor device.

[0018]

According to the first aspect of the present invention,
A semiconductor substrate in which an insulating film having an opening is formed in a part is housed, and a synchrotron orbit radiant light is irradiated toward a growth chamber filled with a predetermined reaction gas and the opening of the insulating film. By applying a predetermined voltage to the synchrotron orbital radiation source that activates the reaction gas on the opening and the semiconductor substrate, a voltage is applied to accelerate the activated reaction gas toward the opening of the insulating film. And a means for vapor-depositing polycrystalline silicon on the semiconductor substrate exposed at the opening of the insulating film by using the activated reaction gas.

According to a second aspect of the present invention, a semiconductor substrate on which an insulating film having an opening is partially formed is accommodated, and a growth chamber filled with a predetermined reaction gas and the semiconductor substrate are provided. By irradiating synchrotron orbital synchrotron radiation, a synchrotron orbital radiant light source that activates the reaction gas, and is interposed between the synchrotron orbital radiant light source and the semiconductor substrate, and in non-contact with the semiconductor substrate. A mask that selectively transmits the synchrotron orbital radiation toward the opening of the insulating film and a predetermined voltage is applied to the semiconductor substrate, and the activated reaction gas is supplied to the opening of the insulating film. And a voltage applying means for accelerating the polycrystalline silicon on the semiconductor substrate exposed at the opening of the insulating film by using the activated reaction gas. An apparatus for manufacturing a semiconductor device, characterized in that to phase growth.

According to a third aspect of the invention, the reaction gas is
A silane-based gas containing nitrogen trifluoride and selectively mixed with arsenic trichloride or boron trichloride.
Alternatively, it is the semiconductor device manufacturing apparatus according to claim 2.

According to a fourth aspect of the present invention, a semiconductor substrate on which an insulating film having an opening is formed is placed in a growth chamber filled with a predetermined reaction gas, and the semiconductor substrate is directed toward the opening of the insulating film. By activating the reaction gas in the growth chamber by irradiating synchrotron orbital radiation, by accelerating the activated reaction gas toward the opening of the insulating film by applying a predetermined voltage to the semiconductor substrate, A method of manufacturing a semiconductor device is characterized in that polycrystalline silicon is vapor-grown on a semiconductor substrate exposed in the opening of the insulating film by using the activated reaction gas.

According to a fifth aspect of the present invention, a semiconductor substrate on which an insulating film having an opening partly formed is placed in a growth chamber filled with a predetermined reaction gas, and the mask is not in contact with the semiconductor substrate. Is used to activate the reaction gas in the growth chamber by irradiating the opening of the insulating film with synchrotron orbital radiation, and by applying a predetermined voltage to the semiconductor substrate, the activated reaction gas is Manufacturing of a semiconductor device characterized by accelerating toward an opening of an insulating film and vapor-depositing polycrystalline silicon on a semiconductor substrate exposed in the opening of the insulating film by using the activated reaction gas. Is the way.

According to a sixth aspect of the present invention, the reaction gas is
A silane-based gas containing nitrogen trifluoride and selectively mixed with arsenic trichloride or boron trichloride.
Alternatively, it is the method for manufacturing a semiconductor device according to claim 5.

[0024]

In the semiconductor device manufacturing apparatus according to the first aspect of the present invention, the synchrotron orbit radiation light source has a synchrotron orbit toward the opening of the insulating film on the semiconductor substrate placed in the growth chamber. Irradiate with synchrotron radiation. As a result, an electron generation phenomenon occurs due to the interaction between the reaction gas and the photons, and the reaction gas in the growth chamber obtains large energy and is activated. The voltage applying means applies a predetermined voltage to the semiconductor substrate to accelerate the activated reaction gas toward the opening of the insulating film. Then, polycrystalline silicon vapor-deposits on the semiconductor substrate exposed in the opening of the insulating film. Since etching with the activated reactive gas is performed on the insulating film other than the openings, the polycrystalline silicon film is not formed on the insulating film.

Therefore, polycrystalline silicon can be selectively grown only on the semiconductor substrate exposed in the opening of the insulating film. Since the surface of the polycrystalline silicon film is flat with respect to the insulating film, the step shown in (c) of FIG. 3 does not occur. Therefore, disconnection of the metal wiring in the step portion can be prevented. Further, since the polycrystalline silicon film is not formed on the insulating film, it is possible to allow a margin for mask alignment for selectively irradiating the opening with the synchrotron orbital radiation.

In the semiconductor device manufacturing apparatus according to the second aspect of the present invention, the opening of the insulating film is selectively irradiated with synchrotron orbital radiation using a mask. When an electron pair generation phenomenon occurs due to the interaction between the reaction gas and photons, the reaction gas in the growth chamber obtains large energy and is activated. The voltage applying means applies a predetermined voltage to the semiconductor substrate to accelerate the activated reaction gas toward the opening of the insulating film. Then, polycrystalline silicon vapor-deposits on the semiconductor substrate exposed in the opening of the insulating film.
According to the present invention, since a non-contact mask is used for the semiconductor substrate, complicated steps such as mask generation and removal by ordinary photolithography are unnecessary. Therefore,
According to the present invention, polycrystalline silicon can be efficiently vapor-deposited on the semiconductor substrate exposed in the opening of the insulating film.

According to the invention of claim 3, claim 1
Alternatively, the reaction gas according to claim 2 is a gas containing a silane-based gas and nitrogen trifluoride and selectively mixed with arsenic trichloride and boron trichloride. When the silane-based gas and the reaction gas containing nitrogen trifluoride are activated by synchrotron orbital radiation, fluorine ions are generated. Since fluorine ions have a function of etching polycrystalline silicon on the insulating film, the polycrystalline silicon film is not formed on the insulating film. Therefore, polycrystalline silicon can be selectively vapor-grown only on the semiconductor substrate exposed in the opening of the insulating film. Further, by selectively and selectively mixing arsenic trichloride and boron trichloride into the reaction gas, it is possible to grow polycrystalline silicon containing p-type and n-type impurities. Therefore, the photolithography process for introducing p-type and n-type impurities into the polycrystalline silicon film after vapor-depositing the polycrystalline silicon film can be eliminated.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device manufacturing apparatus and a semiconductor device manufacturing method according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a semiconductor device manufacturing apparatus according to the first embodiment of the present invention. This semiconductor device manufacturing apparatus includes a growth chamber 1 and synchrotron orbital radiation (hereinafter referred to as SOR).
The light source 2 and the like are provided. A beryllium window 3 for introducing SOR light is installed above the growth chamber 1. The outer wall of the growth chamber 1 is electrically grounded,
A single crystal silicon substrate 5 is placed inside the growth chamber 1
The F electrode 9 is provided. A blocking capacitor 10 and a high frequency oscillator 11 are connected in series to the RF electrode 9, and a high frequency of 13.56 MHz is applied to the RF electrode 9. Further, a heater is incorporated inside the RF electrode 9, and the electrode temperature can be arbitrarily controlled by this heater. A vacuum exhaust pump 14 and a solenoid valve 13 are connected to the lower part of the growth chamber 1 so that the degree of vacuum in the growth chamber 1 can be arbitrarily controlled.

In the growth chamber 1, disilane (Si ₂ H ₆ ) cylinder 16, nitrogen trifluoride (NF ₃ ) cylinder 17, arsenic chloride (AsCl ₃ ) cylinder 18, boron chloride (BCl ₃ )
Each of the cylinders 19 is connected via the mass flow controller 15 and the solenoid valve 13. The mass flow controller 15 controls the flow rate of gas from each of the cylinders 16 to 19.

Next, the operation of the semiconductor device manufacturing apparatus shown in FIG. 1 will be described. First, the single crystal silicon substrate 5 is placed on the RF electrode 9. A p-type base region 6 is formed on the single crystal silicon substrate 5, and the single crystal silicon substrate 5 is formed.
Surface is emitter contact 7 and base contact 8
Is covered with an insulating film 12 having an opening for. After opening the solenoid valve 13, the pressure in the growth chamber 1 is reduced to 10 ⁻⁴ Pa by the vacuum exhaust pump 14. Then R
The single crystal silicon substrate 5 is continuously heated at a temperature of 450 ° C. by using the heater built in the F electrode 9.

Disilane (SiH ₄ ) gas of 40 sccm is supplied from the disilane cylinder 16 to the nitrogen trifluoride cylinder 17 for 5 s.
Nitrogen trifluoride (NF ₃ ) gas of ccm is supplied into the growth chamber 1. At this time, the mass flow controller 15 is controlled so that the pressure in the growth chamber 1 becomes 1 Pa. Next, from the high frequency oscillator 11 to the RF electrode 9, 13.56 MH
A high frequency of 130 W is applied. Then, glow discharge is generated between the grounded outer wall of the growth chamber 1 and the RF electrode 9, and the introduced gas is turned into plasma. Since the mobility of electrons in the plasma thus generated is higher than the mobility of ions, the electrons flow toward the outer wall of the growth chamber 1, which is an anode. As a result, a current flows between both electrodes, and charges are accumulated in the blocking capacitor 10. As the charge is accumulated in the blocking capacitor 10, a cathode drop occurs, and an ion sheath layer is formed near the surface of the RF electrode 9. Ion particles active in the ion sheath layer are further accelerated by an electric field perpendicular to the single crystal silicon substrate 5.

Fluorine ions (F ⁺ ) generated by converting nitrogen trifluoride (NF ₃ ) into plasma obtain a large amount of energy in the ion sheath layer and collide with the insulating film 12. Therefore, the following reaction formula is generated in the insulating film 12 made of a silicon dioxide film (SiO ₂ ) film or silicon nitride (Si ₃ N ₄ ) and the etching of the insulating film 12 progresses. SiO ₂ + 4F ⁺ → SiF ₄ ↑ + O ₂ ↑ Si ₃ N ₄ + 12F ⁺ → 3SiF ₄ ↑ + 2N ₂ ↑ On the other hand, the reaction by the above reaction does not occur on the exposed surface of the single crystal silicon in the emitter contact 7 and the base contact 8. Etching of silicon (Si) with fluorine ions (F ⁺ ) does not proceed.

Disilane (Si ₂ H ₆ ) gas is also contained in the reaction gas, and this gas is also turned into plasma by glow discharge like nitrogen trifluoride (NF ₃ ). Particles of activated ions, radicals, etc. are also generated from the plasma-converted disilane (Si ₂ H ₆ ). These particles have the property of forming a silicon film, but the temperature of the electrode 9 is about 45
Due to the low temperature of 0 ° C., these particles do not nucleate silicon at this temperature. However, as described below, when the disilane (Si ₂ H ₆ ) is irradiated with the SOR light 4, the disilane (Si ₂ H ₆ ) obtains a large amount of energy to form silicon nuclei on the exposed silicon surface.

The surface of the single crystal silicon 5 is irradiated with the SOR light 4 from the SOR light source 2 through the beryllium window 3. At this time, a mask 20 made of quartz glass is placed on the single crystal silicon 5. The mask 20 is formed by patterning lead on quartz glass, and the lead can block the SOR light 4. Of the mask 20, only the upper portion of the emitter contact 7 is opened, and the emitter contact 7
The SOR light 4 is irradiated only on the.

Next, 1 sccm from the cylinder 18 in the growth chamber 1.
Arsenic trichloride (AsCl ₃ ) gas is introduced. When only the emitter contact 7 is irradiated with the SOR light 4 in this state, plasma of disilane (Si ₂ H ₆ ) gas and arsenic trichloride (AsC) generated in the emitter contact 7 are irradiated.
l ₃ ) Interaction between the gas and photons in the SOR light 4 occurs. Since the SOR light 4 is white light, its wavelength distribution has a wide range. Of these, especially the energy (hν)
A photon having a value of more than 1.02 MeV causes an electron pair generation phenomenon due to the interaction with the nucleus of the reaction gas, and efficiently gives a large amount of energy to the active particles in the plasma. SOR
Disilane (Si ₂ H ₆ ) that gained large energy by light 4
The gas and active particles of arsenic trichloride (AsCl ₃ ) gas cause silicon nucleation on the exposed surface of silicon.

As a result of silicon nucleation and growth, a polycrystalline silicon film grows on the exposed silicon surface of the emitter contact 7. The polycrystalline silicon film thus grown contains As, which is an n-type impurity, in an amount of about 2 × 10 ²¹ cm ⁻³ . On the insulating film 12, since the etching reaction by the fluorine ions (F ⁺ ) always occurs, the polycrystalline silicon film is not formed.

As a result, polycrystalline silicon containing an n-type dopant is selectively grown only on the emitter contact 7. When the thickness of the polycrystalline silicon film becomes the same as the thickness of the insulating film 12, the irradiation of the SOR light 4 is stopped, whereby the step of selectively growing the polycrystalline silicon on the emitter contact 7 is completed.

Subsequently, polycrystalline silicon is selectively grown on the base contact 8 by the following procedure. First, after the introduction of arsenic trichloride (AsCl ₃ ) gas is stopped, 1 sccm of boron trichloride (BCl ₃ ) gas is flown into the growth chamber 1 from the cylinder 19. Further, the mask 20 is replaced, the emitter contact 7 is cut off, and the base contact 8 is irradiated with the SOR light 4. As a result, it becomes possible to selectively grow polycrystalline silicon containing p-type impurities only on the base contact 8. Boron (B) as a p-type impurity is 9 × in the selectively grown polycrystalline silicon film.
About 10 ²⁰ cm ^{-3 is} included.

In the present embodiment, the positional accuracy of the opening of the mask 20 may be such that it can block the SOR light 4 on the base contact 8. Therefore, the polycrystalline silicon can be selectively grown at the correct position of the emitter contact 7 without considering the alignment accuracy of the mask 20.

Next, a semiconductor device manufacturing apparatus according to the second embodiment of the present invention will be described. Instead of the disilane (Si ₂ H ₆ ) gas used as the silicon source for the polycrystalline silicon in the first embodiment described above, in this embodiment 3
0 sccm of trichlorosilane (SiHCl ₃ ) is used.
When trichlorosilane (SiHCl ₃ ) is used, the nucleation temperature on the exposed surface of single crystal silicon can be made relatively low, and for example, selective growth of a silicon film is possible even at a low temperature of about 300 ° C. However, since the growth temperature is as low as 300 ° C., the selectively grown film is not polycrystalline silicon but amorphous (amorphous) silicon. Therefore, in order to obtain polycrystalline silicon, 35
It is necessary to polycrystallize the amorphous silicon by annealing at 0 to 400 ° C. According to this embodiment, the process temperature (about 450 ° C.) in the first embodiment can be lowered, and the process temperature can be lowered. As a result, problems such as autodoping can be avoided.

FIG. 2 is a diagram showing a semiconductor device manufacturing method (bipolar device manufacturing process) using the semiconductor device manufacturing apparatus according to the first and second embodiments. In FIG. 3A, the p-type base region 6 is formed on the single crystal silicon substrate 5, and the insulating film 12 is formed on the single crystal silicon substrate 5. The insulating film 12 is provided with openings for the emitter contact 7 and the base contact 8 by photolithography.

Next, using the semiconductor device manufacturing apparatus according to this embodiment, polycrystalline silicon 27 containing n-type impurities is selectively grown on the emitter contact 7, and p-type impurities are contained on the base contact 8. The polycrystalline silicon 28 is selectively grown ((b) in the figure). Furthermore, 900-100
Thermal diffusion is performed at about 0 ° C. to form an emitter diffusion layer 23 under the emitter contact 7 as shown in FIG. Subsequently, the aluminum (Al) electrode wiring 22 is formed on the polycrystalline silicon 27, 28, and finally passivation processing is performed to complete the whole process.

[0044]

As described above, according to the present invention, the active particles of disilane gas and arsenic trichloride gas activated by synchrotron orbital radiation are used to form silicon nuclei on the exposed surface of silicon. There is. on the other hand,
Since etching with fluorine ions is always performed on the insulating film, polycrystalline silicon does not grow. That is, polycrystalline silicon can be selectively formed only in the contact hole. Therefore, the polycrystalline silicon film and the insulating film can be made flat, and the disconnection of the metal electrode wiring due to the step can be prevented.

Further, as described above, since the polycrystalline silicon film is not formed on the insulating film, even if the position of the opening of the mask is slightly displaced, the polycrystalline silicon is selectively grown only in the contact hole. It becomes possible.

Furthermore, according to the present invention, p is added to the reaction gas.
Type and n-type impurities such as arsenic trichloride (AsCl ₃ ), boron trichloride (BCl ₃ ) and the like can be mixed to grow polycrystalline silicon containing p-type or n-type impurities. Therefore, the number of photolithography steps can be reduced as compared with the case where p-type or n-type impurities are introduced after vapor-phase growth of polycrystalline silicon.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a semiconductor device manufacturing apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a manufacturing process of a bipolar device using the semiconductor device manufacturing apparatus according to the first and second embodiments of the present invention.

FIG. 3 is a diagram for explaining a conventional method for manufacturing a semiconductor device.

FIG. 4 is a diagram for explaining a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Growth chamber 2 Synchrotron orbital radiation source 4 Synchrotron orbital radiation 5 Single crystal silicon substrate (semiconductor substrate) 9 RF electrode (voltage applying means) 10 Blocking capacitor (voltage applying means) 11 High frequency oscillator (voltage applying means) 12 Insulating film 27, 28 Polycrystalline silicon

Claims (6)

(57) [Claims] 1. A growth chamber, which accommodates a semiconductor substrate having an insulating film having an opening partly formed therein, is filled with a predetermined reaction gas, and a synchrotron orbit toward the opening part of the insulating film. A predetermined voltage is applied to the synchrotron orbital radiation source that activates the reaction gas on the opening by irradiation with synchrotron radiation and the semiconductor substrate, and the activated reaction gas is directed toward the opening of the insulating film. And a voltage applying means for accelerating the gas, and vapor-depositing polycrystalline silicon on the semiconductor substrate exposed in the opening of the insulating film by using the activated reaction gas. . 2. A growth chamber filled with an insulating film having an opening partly formed therein, filled with a predetermined reaction gas, and synchrotron orbital radiation toward the semiconductor substrate. The insulating film is interposed between the synchrotron orbital radiation source that activates the reaction gas by irradiation and the synchrotron orbital radiation source and the semiconductor substrate, and is not in contact with the semiconductor substrate. And a mask that selectively transmits the synchrotron orbital radiation toward the opening of the semiconductor substrate and a voltage that applies a predetermined voltage to the semiconductor substrate and accelerates the activated reaction gas toward the opening of the insulating film. And vapor-growing polycrystalline silicon on the semiconductor substrate exposed in the opening of the insulating film by using the activated reaction gas. Apparatus for manufacturing a semiconductor device according to claim. 3. The manufacturing of a semiconductor device according to claim 1, wherein the reaction gas contains a silane-based gas, nitrogen trifluoride, and arsenic trichloride or boron trichloride is selectively mixed. apparatus. 4. A semiconductor substrate on which an insulating film having an opening partly formed is placed in a growth chamber filled with a predetermined reaction gas, and synchrotron orbit radiant light is directed toward the opening part of the insulating film. To activate the reaction gas in the growth chamber, and by applying a predetermined voltage to the semiconductor substrate to accelerate the activated reaction gas toward the opening of the insulating film, the activated reaction gas A method of manufacturing a semiconductor device, characterized in that polycrystalline silicon is vapor-grown on a semiconductor substrate exposed in the opening of the insulating film by using. 5. A semiconductor substrate on which an insulating film having an opening partly formed is placed in a growth chamber filled with a predetermined reaction gas, and the insulating film is formed using a non-contact mask on the semiconductor substrate. The reactive gas in the growth chamber is activated by irradiating the synchrotron orbital radiation toward the opening of, and the activated reactive gas is applied to the opening of the insulating film by applying a predetermined voltage to the semiconductor substrate. A method for manufacturing a semiconductor device, which comprises accelerating and vapor-depositing polycrystalline silicon on a semiconductor substrate exposed in an opening of the insulating film by using the activated reactive gas. 6. The manufacturing of a semiconductor device according to claim 4, wherein the reaction gas contains a silane-based gas and nitrogen trifluoride, and arsenic trichloride or boron trichloride is selectively mixed. Method.