JP2549694B2 - Tape carrier for semiconductor chip and method of manufacturing semiconductor device using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] A semiconductor chip tape carrier used for a semiconductor chip test in which a semiconductor chip to be tested is electrically connected and supported, and a position of the tape carrier with respect to a test jig. For the purpose of improving the alignment accuracy and ensuring the mating property of the tape carrier and slide carrier, multiple test pads are formed in the layout corresponding to the probe of the test jig. A semiconductor chip tape carrier in which a semiconductor chip to be electrically connected to and supported by the test pad is fitted with a reference pin of the test jig when the tape carrier is attached to the test jig, and A reference hole for positioning the tape carrier so that each test pad faces the probe, and a metal film pattern on the periphery of the reference hole. Provide and configure.

[Industrial applications]

The present invention relates to a semiconductor chip tape carrier used for testing a semiconductor chip, in which a semiconductor chip to be tested is electrically connected and supported, and a method of manufacturing a semiconductor device using the same.

In recent years, TAB (Tape Automated Bonding) method has been widely used as a bonding method with the increase in the number of pins of semiconductor chips.

In this bonding method, immediately before mounting the semiconductor chip on the printed board, that is, in the state where the semiconductor chip is electrically connected to and supported by the tape carrier,
The characteristics of the semiconductor chip are tested. This exam is
The reference hole of the tape carrier is fitted to the alignment pin of the test jig, and the tape carrier is aligned and attached.

With the increasing number of pins in semiconductor chips in recent years, the pitch of the test pads on the tape carrier has been reduced to about 0.25 mm. Accompanying this, the positioning accuracy of the tape carrier with respect to the test jig has become important.

[Conventional technology]

FIG. 9 shows an example of a conventional tape carrier 1. 2 is a test pad, and 6 is a reference hole.

Reference numeral 4 denotes a semiconductor chip, which is electrically connected to and supported by the test pad 2 by the finger 3.

The reference hole 6 has the center hole of the sprocket holes 5 as the reference hole 6, and is simply formed in the tape carrier 1 which is a thin film, and the strength of the peripheral edge of the reference hole 6 is weak.

Similarly, in the slide carrier insertion hole 8, the holes at both ends of the sprocket hole 5 are the slide carrier insertion holes 8, and the strength of the peripheral edge is weak.

[Problems to be Solved by the Invention] Therefore, as shown in FIG. 10, when the reference hole 6 is engaged with the reference pin 45 of the test jig, the peripheral portion of the reference hole 6 is indicated by reference numeral 7. It may turn up.

In addition, the peripheral portion of the reference hole 6 and the peripheral portion of the slide carrier insertion hole 8 are also flipped up due to improper engagement between the sprocket hole and the tape feeding sprocket such as the inner lead bonder that connects the semiconductor chip 4 and the tape carrier 1. It may happen.

In this case, the positioning accuracy of the tape carrier 1 with respect to the test jig deteriorates, the test pad comes off the probe of the test jig, and the semiconductor chip cannot be tested.

Further, the fitting property of the tape carrier 1 with the slide carrier 31 is deteriorated, and the tape carrier is detached by the slide carrier, so that the semiconductor chip cannot be tested.

It is an object of the present invention to provide a semiconductor test tape carrier that improves the positioning accuracy of the tape carrier with respect to the test jig and ensures the fitting property of the tape carrier and the slide carrier.

[Means for solving the problem]

The present invention provides a semiconductor chip tape carrier in which a plurality of test pads are formed in an arrangement corresponding to a probe of a test jig, and a semiconductor chip to be tested is electrically connected to and supported by the test pad, A reference hole that fits with a reference pin of the test jig when the tape carrier is attached to the test jig, and positions the tape carrier so that each test pad faces the probe, and the tape carrier. The slide carrier insertion hole for attaching to the slide carrier is provided with a metal film pattern on the periphery thereof.

Further, the reference hole and the slide carrier insertion hole are provided separately from the sprocket holes for feeding the tape carrier.

[Action]

The peripheral metal pattern increases the mechanical strength of the peripheral of the reference hole and the slide carrier insertion hole. As a result, when the reference hole is fitted into the reference pin or when the slide carrier insertion hole is fitted into the claw of the slide carrier, the peripheral portion of the reference hole or the slide carrier insertion hole is turned up or the reference hole or the slide carrier insertion hole is It is prevented that the peripheral edge is worn.

This improves the alignment accuracy of the tape carrier with respect to the test jig.

Further, by providing the reference hole and the slide carrier insertion hole separately from the sprocket hole, the reference hole and the slide carrier insertion hole are used only for fitting to the reference pin and the slide carrier. This improves the alignment accuracy of the tape carrier with respect to the test jig and the fitting property with the slide carrier.

〔Example〕

FIG. 1 shows a semiconductor chip tape carrier 20 according to an embodiment of the present invention.

Reference numeral 21 denotes a tape carrier body, which is made of a polyimide film.

Reference numeral 22 denotes a test pad, which is formed in an arrangement corresponding to the probe 43 of the test jig described later.

Reference numeral 23 is a finger, which extends from each test pad 22 toward the center.

24 is a semiconductor chip, and each electrode is connected to the tip of the finger 23. The semiconductor chip 24 is provided in the center of the tape carrier 20 while being electrically connected to each test pad 22 through the fingers 23 and mechanically supported by the fingers 23.

Reference numeral 25 is a sprocket hole, which is formed on the upper and lower edge sides in FIG.

Reference numeral 36 is a reference hole which is an essential part of the present invention, and has a rectangular hole 27 formed in the tape carrier body 21, and a metal film pattern 39 formed on the upper surface of the tape carrier body 21 so as to face the hole 27. And the configuration. That is, the reference hole 36 is
The periphery is reinforced by the metal film pattern 39.

The reference hole 36 corresponds to a reference pin 45 of a test jig described later, and the center hole of the sprocket holes 25 is used as the reference hole.

Reference numeral 38 denotes a slide carrier insertion hole which is another essential part of the present invention, and similarly has a structure in which the peripheral edge thereof is reinforced by the metal film pattern 39.

The slide carrier insertion hole 38 uses the holes at both ends of the sprocket hole 25 as slide carrier insertion holes.

This tape carrier 20 has a slide carrier insertion hole 38
Is attached to the slide carrier 31 of FIG. 3 by engaging with the claw 32, and is attached to the test jig 40 as shown in FIGS. 4 and 5.

The test jig 40 includes a base 41 and a holding lid 42. The base 41 has a plurality of probes 43, bosses 44, and reference pins 45.
Is provided. The probe 43 is connected to a test device (not shown) by a cable 46.

The slide carrier 31 and the tape carrier 20 are placed on the base 41 with the test pad 22 facing downward.

The slide carrier 31 is supported by the boss 44, and the tape carrier 20 is positioned by engaging the reference hole 36 with the reference pin 45.

Here, since the reference hole 36 has a structure in which the peripheral edge is reinforced by the metal film pattern 39, it does not turn up as in the conventional case, and normally engages with the reference pin 45 as shown in FIG.

The peripheral edge of the slide carrier hole 38 is also a metal film pattern.
Since it has a structure reinforced by 39, it does not turn over like the conventional one, and normally engages with the claw 32 as shown in FIG.

As a result, the tape carrier 20 is accurately aligned with the base 41, and the pitch of the test pads 22 is 0.
Even when the test pad 22 is as narrow as 25 mm, it accurately abuts on the probe 43.

The slide carrier 31 is pressed against the base 41 by the pressing lid 42 as shown in FIG.

In this state, each electrode of the semiconductor chip 20 is connected to the finger 2
3, connected to a test device (not shown) through the test pad 22, the probe 43, and the cable 46, and the characteristics of the semiconductor chip 20 are tested.

Further, the portion of the metal film pattern 39 that faces the hole 27 also prevents the peripheral edge of the hole 27 from being worn when the reference pin 45 is fitted.

Similarly, the metal film pattern 39 has a slide carrier insertion hole 38.
Prevents the peripheral edge of the hole from being worn when meshing with a tape feed sprocket such as an inner lead border.

The tape carrier 20 can be positioned with high accuracy by not causing wear.

FIG. 7 shows a semiconductor chip tape carrier 50 according to another embodiment of the present invention. In the figure, those parts that substantially correspond to the parts shown in FIG. 1 are designated by the same reference numerals, and a description thereof will be omitted.

In addition to the sprocket hole 25, the tape carrier 50 has a reference hole 26 and a tape carrier 50 on the left and right sides of the tape carrier 50.
The slide carrier insertion hole 28 for attaching the slide carrier 31 to the slide carrier 31 is provided. The reference hole 26 and the slide carrier insertion hole 28 have a structure in which both surfaces are reinforced by metal film patterns 29 and 30.

The metal film patterns 28, 29 are strip-shaped, and the peripheral edges of the reference hole 26 and the slide carrier insertion hole 28 are reinforced on one surface as compared with the frame-shaped metal film pattern 39.

Further, since the reference hole 26 and the slide carrier insertion hole 22 are provided separately from the sprocket hole, the reference hole 26 and the slide carrier insertion hole 28 are used only for fitting to the reference pin and the slide carrier.

After the test is completed, the semiconductor chip 24 is cut off from the tape carrier body 21 by cutting the vicinity of the portion A of each finger 23, the semiconductor chip 24 is fixed to a printed circuit board (not shown), and the free end of each finger 23 is fixed. The semiconductor chip 24 is mounted on a printed board (not shown) by connecting to the wiring pattern.

〔The invention's effect〕

As described above, according to the present invention, the reference hole and the slide carrier insertion hole are configured such that the peripheral edges thereof are reinforced, and the reference pin and the slide carrier insertion hole are properly fitted to the reference pin without being flipped up or worn. Further, by providing the reference hole and the slide carrier insertion hole separately from the sprocket hole, they can be used only for engagement with the reference pin and the claw of the slide carrier, and the fitting property is ensured. Therefore, the alignment accuracy of the tape carrier with respect to the test jig is improved, and even if the semiconductor chip has a large number of pins and the test pads are arranged at a narrow pitch, each test pad faces each probe. Can be aligned.

In addition, since the alignment is stabilized and the alignment accuracy is improved, the semiconductor device can be manufactured with high reliability.

[Brief description of drawings]

FIG. 1 is a plan view of a tape carrier for semiconductor chips according to an embodiment of the present invention, FIG. 2 shows a structure of a reference hole, an enlarged sectional view taken along the line I--I in FIG. 1, and FIG. FIG. 4 is a plan view of the slide carrier, FIG. 4 is an enlarged cross-sectional view of the tape carrier attached to the slide carrier, FIG. 5 is a perspective view showing the tape carrier attached to the slide carrier in association with a test jig, and FIG. FIG. 7 is a view showing the alignment state of the tape carrier, FIG. 7 is a plan view of a tape carrier for semiconductor chips according to another embodiment of the present invention, and FIG. 8 is a structure of reference holes II-II in FIG. FIG. 9 is an enlarged cross-sectional view taken along the line, FIG. 9 is a plan view of a conventional tape carrier for semiconductor chips, and FIG. 10 is a view showing a modification of the reference hole when the reference hole in FIG. 9 is fitted with the reference pin. is there. In the figure, 1,21 is a tape carrier body, 2,22 is a test pad, 3,23 is a finger, 4,24 is a semiconductor chip, 5,25 is a sprocket hole, 6,26,36 are reference holes, and 7 is a deformation. Reference holes, 8, 28, 38 are slide carrier insertion holes, 20, 50 are semiconductor chip tape carriers, 27 are holes, 29, 30, 39 are metal film patterns, 31 is a slide carrier, 32 is a claw, 40 is a A test jig, 41 is a base, 42 is a cover, 43 is a probe, 44 is a boss, 45 is a reference pin, and 46 is a cable.

Claims (3)

(57) [Claims] 1. A plurality of test pads (22) are formed in an arrangement corresponding to a probe (43) of a test jig (40), and a semiconductor chip (24) to be tested is electrically connected to the test pad. In a tape carrier for a semiconductor chip, which is connected and supported, when the tape carrier is attached to the test jig, the tape carrier is fitted with a reference pin (45) of the test jig (40), A tape carrier for a semiconductor chip comprising a reference hole (26, 36) for positioning each test pad so as to face the probe, and a metal film pattern (29, 30, 39) provided on the periphery thereof. 2. The tape carrier for semiconductor chips according to claim 1, wherein the reference hole (26) and the tape carrier are engaged with a claw (32) of a slide carrier (31) to slide the tape carrier. A tape carrier for semiconductor chips, comprising slide carrier insertion holes (28, 38) for attaching to a carrier, which are provided separately from the sprocket holes (25) for feeding the tape carrier. 3. A plurality of test pads (22) are formed in an arrangement corresponding to a probe (43) of a test jig (40), and a semiconductor chip (24) to be tested is electrically connected to the test pad. Connected and supported, metal film putter (29,30,
39) A tape carrier (20,50) having a reference hole (26,36) having a configuration provided with the reference hole (26,36) is used as a reference of the test jig (40). The semiconductor chip (24) is tested by fitting and positioning the pins (45) and electrically connecting each test pad (22) of the tape carrier to the probe (43) of the test jig (40). A method of manufacturing a semiconductor using a tape carrier for a semiconductor chip, comprising: