JP2537279B2 - Phase shifter - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a phase shifter called a digital type phase shifter used in a microwave band or the like, and particularly to reduction of a phase shift amount error. .

[Prior Art] A digital type phase shifter is conventionally configured by combining a plurality of types of line switching type single bit phase shifters having different phase shift amounts, or a loaded line type single bit phase shifter.

Figure 2 shows, for example, "Microwav" by Robert V. Garver.
e Diode Contorol Devices "(ARTECH HOUSE, INC., 197
6) The conventional digital type phase shifter shown in pp.238
It is a block diagram showing an example of a bit phase shifter. In the figure, 1 is a 180 degree bit phase shifter, 2 is a 90 degree bit phase shifter, 3 is a 45 degree bit phase shifter, 4 is a 22.5 degree bit phase shifter, 5 is an input terminal, 6 is an output terminal .

Further, FIG. 3 shows, for example, the above-mentioned “Microwave Diode Co”.
2 is a block diagram showing a line switching type single bit phase shifter used as each of the conventional single bit phase shifters 1 to 4 shown in pp.239 of "Ntorol Devices". In the figure, 7a and 7b are single-pole double-throw switches, 8 and 9 are transmission lines in which the difference in line length is the phase shift amount, 10 is an input terminal of a single-bit phase shifter, and 11 is a single-bit phase shifter. It is an output terminal.

 Next, the operation will be described with reference to the drawings.

In FIG. 2, when a signal is input to the input terminal 5, it is first input to the 180 degree bit phase shifter 1 and the passing phase is switched between 0 degree and 180 degree by a signal from the outside. Next, the passing phase is input to the 90-degree bit phase shifter 2 and the passing phase is switched between 0 degree and 90 degrees by a signal from the outside similarly to the 180-degree bit phase shifter 1. Similarly, the signals are sequentially input to the 45-degree bit phase shifter 3 and the 22.5-degree bit phase shifter 4, and the operation of the 4-bit phase shifter capable of controlling the phase shift amount in units of 22.5 degrees is performed.

Next, the operation of each of the bit phase shifters 1 to 4, that is, the single bit phase shifter shown in FIG. 3, will be described. Input terminal
The signal from 10 is switched to the transmission line 8 or 9 having a different line length by the single-pole double-throw switches 7a and 7b, and the output terminal 11
Be led to. The length of the transmission line 8 is L1 and the length of the transmission line 9 is L2, and the phase difference caused by the difference between the two line lengths, that is, 2π · (L1−L2) / λ (where λ is the signal wavelength)
For example, if it is set to 180 degrees, it operates as a 180-bit single-bit phase shifter (180-degree bit phase shifter 1 in FIG. 1). It operates as a bit phase shifter, and the same applies to 45-degree bits and 22.5-degree bits.

[Problems to be Solved by the Invention] As described above, the conventional phase shifter of this type is configured by combining a plurality of single-bit phase shifters as shown in FIG. Since this single-bit phase shifter switches the length of the passing line as described above, the amount of phase shift is expressed by the following equation.

Phase shift amount = 2π · (L1−L2) / λ Here, since λ is the signal wavelength, the phase shift amount has a frequency characteristic and the phase shift amount error has a large frequency characteristic. This phase shift amount error is basically small in the 180 degree bit phase shifter, but is large in the 90 degree, 45 degree and 22.5 degree single bit phase shifters. Although omitted in the description, the load line type phase shifter also has a large frequency characteristic in the phase shift amount error.

The present invention has been made to solve such a problem, and an object thereof is to reduce the frequency characteristic of the phase shift amount error and reduce the phase shift amount error over a wide band.

[Means for Solving the Problem] A phase shifter according to the present invention is a first means (frequency multiplier) for multiplying a frequency by 2 (N-1) times (N is an integer of 2 or more).
12), and N second means (0 / π phase modulators 13a to 13d) composed of modulation means having no frequency characteristic in the amount of phase shift and capable of switching between 0 degree and 180 degrees, and each of the above Second means (0 /
(N-1) third means (1/2 frequency dividers 14a to 14) which are located between the π phase modulators 13a to 13d and reduce the frequency to 1/2.
c) is composed of and.

[Operation] The phase shifter in the present invention is the second means (0 / π phase) in which the signal whose frequency has been multiplied by the predetermined value by the first means (frequency multiplier 12) is sequentially reduced in principle. Modulator 13
a to 13d) switch the phase shift amount to 0 degree and 180 degrees, and the third means (1/2 frequency dividers 14a to 14c) frequency divides the frequency in half, so the phase shift amount error The frequency characteristic can be reduced, and the phase shift amount error can be reduced over a wide band.

[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a 4-bit digital phase shifter shown as an embodiment of the present invention. In the figure, 12 is a frequency multiplier (first means) for multiplying the frequency of the signal from the input terminal 5 by 8 and 13a to 13d are capable of switching the phase shift amount between 0 degree and π, that is, 180 degrees. The phase shift amount error at the time is basically small 0 / π phase modulator (second means), 14a to 14c are between the above 0 / π phase modulators 13a to 13d, and halve the frequency 1 / 2 frequency divider (3rd means)
And the first 0 / π phase modulator in the next stage of the frequency multiplier 12
13a is connected, and hereinafter, the first to third 1/2 frequency dividers 14
a, 14b, 14c and the second to fourth 0 / π phase modulators 13b, 13c, 13d are alternately connected, and the fourth 0 / π phase modulator 13d at the final stage is connected.
The output terminal 6 is connected to.

 Next, the operation will be described.

When a signal having a frequency of F0 is input to the input terminal 5, it is converted by the frequency multiplier 12 into a frequency of 8 × F0. next,
It is input to the first 0 / π phase modulator 13a and switched to a phase of 0 ° or 180 ° at a frequency of 8 × F0. Next, since the frequency and the phase of this signal are both halved by the first 1/2 frequency divider 14a, the signal is converted to the frequency of 4 × F0 and the phase is converted to 0 ° and 90 °. It The second 0 / π
By the phase modulator 13b and the second 1/2 frequency divider 14b, the frequency and the phase are halved in the same manner as described above, so that the frequency becomes 2 × F0, the phase becomes 0 ° / 45 °, and further 0 This means that the 1/90 degree single-bit phase shifters are connected in series. Also,
Further, by the third 0 / π phase modulator 13c and the third 1/2 frequency divider 14c, 0 ° / 22.5 °, 0 ° / 45 at the frequency F0.
It operates as a 0 degree / 90 degree phase shifter. Finally the fourth 0 /
By passing through the π phase modulator 13d, 0 degree / 22.5
It operates as a 4-bit phase shifter of 0 degree, 0 degree / 45 degree, 0 degree / 90 degree, 0 degree / 180 degree.

By the way, in the above embodiment, the 4-bit digital type phase shifter is described, but the present invention is not limited to this, and it can be applied to two or more N-bit digital type phase shifters. In that case, one frequency multiplier that is a power of (N-1) times 2 is 0 / π.
N phase modulators and (N-1) 1/2 frequency dividers may be used and configured in the same manner as the above embodiment.

Further, the frequency multiplier of 2 (N-1) times in the above embodiment may have any structure such as an analog type and a digital type, and further, for example, a structure in which the doubler is connected in multiple stages. I do not care.

As the 0 / π phase modulator in the above embodiment, a balanced type modulator, a double balanced type modulator, a ring type modulator or the like having no frequency characteristic in the amount of phase shift is used.

Further, the 1/2 frequency divider in the above embodiment may be either analog type or digital type.

EFFECT OF THE INVENTION As described above, according to the present invention, the frequency is set to 2 (N
-1) N pieces that are configured by first means for multiplying (N is an integer of 2 or more) and modulation means that does not have frequency characteristics in the amount of phase shift, and that can switch the amount of phase shift between 0 degree and 180 degrees The second means and the (N-1) third means which halves the frequency between the second means are used, so that the frequency characteristic of the phase shift amount error can be reduced. The effect that the phase shift amount error can be reduced over a wide band is obtained.

[Brief description of drawings]

1 is a block diagram showing a digital type phase shifter according to an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional digital type phase shifter, and FIG. 3 is a line switching type single bit phase shifter. It is a block diagram showing a container. In the figure, 12 is a frequency multiplier (first means), 13a to 13d are 0 /
The π phase modulator (second means) and 14a to 14c are 1/2 frequency dividers (third means). In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

(57) [Claims] 1. A first means for multiplying a frequency by a power of 2 (N-1) (N is an integer of 2 or more) and a modulation means having no frequency characteristic in a phase shift amount. It is characterized by comprising N second means which can be switched between 0 degree and 180 degrees, and (N-1) third means which is between the respective second means and which halves the frequency. And a phase shifter.