JP2537084Y2 - Radio control equipment receiver - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver of a radio control device mounted on a radio-controlled model of a remotely steered body such as an airplane, a car, a ship, or the like.

[0002]

2. Description of the Related Art In a conventional radio control apparatus of this kind, an AM or FM modulation method is used as a carrier, and a PP is used.
Signal formats such as M and PCM are used. In the radio control device, as shown in the following [Table 1] and [Table 2], usable frequency bands are set to, for example, 27 MHz and 40 MHz bands in Japan, and a plurality of frequencies are set in each band. ing.

[0003]

[Table 1]

[0004]

[Table 2]

That is, in the 27 MHz band, as shown in Table 1, from 26.995 MHz to 27.245 MHz
6 bands at intervals of 50 KHz (however, band 6
Are used as a common band for 27.245 MHz and 27.255 MHz). Also, 40
In the MHz band, 40.61 MHz as shown in [Table 2]
The frequency band is divided into 13 bands every 20 KHz from to 40.85 MHz.

By the way, if a plurality of steered bodies operate simultaneously in the same area, there is a risk of interference with other steered bodies, so that it is necessary to change the frequency setting.
In order to use different bands in each band, a crystal oscillator called a crystal was exchanged and used.

[0007] Therefore, in the conventional radio control device, a crystal oscillator is used to change the reception frequency. Therefore, the operator needs to use a spare crystal oscillator of a different frequency to avoid interference with other steered bodies. Had to be carried around. In order to solve this problem, in recent years, a PLL (Phase Locked Loop) generally used in the communication field has been used.
) Development of a radio control device in which the frequency can be easily changed by incorporating a circuit is being developed.

[0008]

[Problems to be Solved by the Invention] By the way, this PLL
In a frequency synthesizer type radio control device incorporating a circuit, for example, by changing the frequency division ratio of a frequency divider by switching a dip switch, the frequency switching can be easily adjusted, but the device operates. When the switch switches and the division ratio changes,
The receiving frequency is switched at any time.

For this reason, when the steered body is, for example, a car, the vibration applied to the vehicle body due to the road surface condition during running, the vibration of the engine loaded on the steered body, and the frequency is set once, and then the erroneous operation is performed. When the switch is switched by applying some action to the steered body, the frequency division ratio changes and the receiving frequency changes, and does not match the frequency of the transmitter used so far. There was a problem of being unable to control.

Therefore, the present invention has been made in view of the above-mentioned problems, and an object of the present invention is to fix a frequency selected at the time of turning on a power supply as a reception frequency.
An object of the present invention is to provide a receiver of a radio control device in which a set reception frequency is not intentionally changed until the power is turned off next time.

[0011]

In order to achieve the above object, a radio control apparatus receiver according to the present invention comprises:
P for controlling the oscillation frequency based on the phase difference from the reference signal
What is claimed is: 1. A receiver for a frequency synthesizer type radio control device using an LL circuit, comprising: frequency selection means for selecting a predetermined frequency from a plurality of predetermined frequency data; and power-on selected by the frequency selection means. And frequency setting means for holding the frequency data at the time and fixing the reception frequency to the frequency of the held frequency data.

[0012]

When the power supply is turned on in a state where a predetermined frequency is selected from a plurality of frequency data predetermined by the frequency selection means, the frequency setting means determines the power-on frequency selected by the frequency selection means. Hold the data,
The frequency division number of the frequency divider in the PLL circuit is varied so that the reception frequency is fixedly set to the frequency of the held frequency data.

[0013]

1 is a block diagram showing an embodiment of a receiver of a radio control device according to the present invention, and FIG. 2 is an external view of the receiver.

The receiver in this embodiment is mounted on a radio-controlled model such as an airplane, a car, a ship, or the like as a remotely steered object, and includes a power source 1, an antenna 2, first amplifying means 3, frequency selecting means. 4, a frequency varying means 5, a mixing means 6, a second amplifying means 7, a state detecting means 8, a storage means 9, and a control means (CPU) 10 are provided. The frequency setting means 11 is constituted by these.

This receiver employs a heterodyne detection system in which a signal to be received and a signal from the frequency variable means 5 are mixed, a frequency-converted signal is reduced to an intermediate frequency, amplified, and then detected. In addition, the reception frequency is determined by using the frequency of the frequency variable means 5 fixedly set when the power supply 1 is started up as the local oscillation frequency.

The first amplifying means 3 is composed of an RF amplifier, and amplifies a signal received via the antenna 2 at a high frequency and outputs the amplified signal to the mixing means 6.

The frequency selecting means 4 comprises, for example, two rotary type dip switches 4a and 4b, and these two switches 4a and 4b are provided with a lid 13 as shown in FIG.
Are arranged side by side in the concave portion 12a of the receiver main body 12 covered by the cover. Each of the switches 4a and 4b is provided with an adjusting unit 4 for a switch body 4c in which numbers from 0 to 9 are equally divided.
By rotating d, band information corresponding to a desired frequency is selected, and the band information at this time is supplied to the control means 10 via the interface 14.

More specifically, when selecting the frequency, for example, the number of bands is set to 65 so that the combination of the scales at the position indicated by the mark 4da of the adjusting unit 4d matches the number of bands.
Then, the adjustment part 4d of the two switches 4a and 4b is adjusted so that the mark 4da of the left switch 4a matches the scale of 6, and the mark 4da of the right switch 4b matches the scale of 5.
Is adjusted with a screwdriver or the like.

The frequency variable means 5 constitutes a PLL circuit including a reference oscillator 5a, a frequency divider 5b, a phase comparator 5c, a loop filter (low-pass filter) 5d, and a voltage controlled oscillator 5e. The phase of the divided output of the voltage controlled oscillator 5e is compared with the phase of the reference signal, and the frequency and phase of the voltage controlled oscillator 5e are controlled by a feedback method based on the phase difference between the two.

More specifically, the frequency variable means 5
Then, based on the band information of the frequency selecting means 4,
When the power supply is turned on, the frequency division ratio 1 / N of the frequency divider 5b is set by the frequency division number setting signal S3 output from the control means 10 described later, and the frequency is divided by the set frequency division ratio 1 / N. The output fv / N of the voltage controlled oscillator 5e and the reference oscillator 5a
Is compared with the reference signal fr from the phase comparator 5c.
The error signal is integrated by a loop filter 5d and then converted into an error voltage. The frequency fv of the voltage controlled oscillator 5e is controlled by a DC voltage proportional to the error voltage. And outputs an output signal locked to a frequency fv (= N · fr) that is an integral multiple of the reference signal fr to the mixing means 6.

The mixing means 6 mixes the signal amplified at high frequency by the first amplifying means 3 with the signal from the voltage controlled oscillator 5e having a fixed frequency and outputs the mixed signal to the second amplifying means 7. .

The second amplifying means 7 is constituted by an IF amplifier, and amplifies the signal mixed by the mixing means 6 by lowering the signal to an intermediate frequency. The amplified signal is processed by a processing circuit (not shown) and received. It is used to drive the servo circuit of each channel connected via the output connector 15 of the machine body 12 to control each part of the steered body.

The state detecting means 8 detects the on / off state of a power supply for supplying a necessary drive signal to each circuit, and divides the frequency of the control means 10 while the power supply 1 is turned on and on. It outputs a frequency setting permission signal S1 for permitting switching of the frequency division number of the device 5b.

The control means 10 comprises a frequency discriminating means 10a, a data processing means 10b, a presetting means 10c, and a frequency division number varying means 10d. The frequency discriminating means 10a checks whether or not the band information input from the frequency selecting means 4 via the interface 14 corresponds to usable frequency group data (for example, 27 MHz band, 40 MHz band). If the frequency information corresponds to the proper frequency group data, it is further determined whether or not the frequency based on the band information corresponds to the normal frequency, and the data processing means 10b sends the data acquisition permission signal S2
Is output.

The data processing means 10b includes the frequency discriminating means 1
0a, the band information from the frequency selecting means 4 is fetched based on the data fetch permission signal S2, and when the frequency based on the band information corresponds to the regular frequency, the frequency data of the band information is Addresses are stored in the storage unit 9 in which addresses are allocated so that the number of the band in each band and the number of the two switches 4a and 4b as the frequency selection unit 4 are equal.

The preset means 10c stores in the storage means 9 preset frequency data indicating the maximum or minimum value of the frequency within the same band when the frequency according to the band information does not correspond to the regular frequency.

The frequency dividing number varying means 10d stores the data in the storage means 9 by the data processing means 10b or the presetting means 10c in order to vary the frequency dividing number of the frequency divider 5b based on the frequency setting permission signal S1 from the state detecting means 8. The frequency division number setting signal S3 corresponding to the stored frequency data is transmitted to the frequency divider 5b.
, And the frequency divider 5b outputs the frequency division number setting signal S3
The frequency division ratio 1 / N is determined, and the reception frequency based on the frequency division ratio 1 / N is fixedly set until the input of the frequency setting permission signal S1 is stopped and the power is turned off next time. ing.

Next, the frequency setting operation of the receiver having the above configuration will be described with reference to the flowchart of FIG. First, two switches 4a and 4 as frequency selecting means 4
The desired frequency is selected by operating b (ST1). For example, a frequency of 65 bands of 40 MHz band (40, 65 M
Hz), the switch 4 on the left side in FIG.
The mark 4da of a is changed to the number 6 and the mark 4 of the switch 4b on the right side.
Set db to number 5. Here, when the power supply 1 of the receiver is turned on and turned on (ST2-Yes), the usable frequency group data stored in the receiver is checked (ST3).

The band information selected by the two switches 4a and 4b is fetched (ST4), and it is determined whether the frequency of the band information corresponds to a regular frequency (ST5). If the frequencies correspond (ST
5-Yes), the frequency data corresponding to the band information is stored in the storage means 9 (ST6). If the frequencies do not correspond (ST5-No), the preset frequency data preset to the maximum or minimum value of the frequency of the band (for example, 40 MHz band) in the same group is stored in the storage means 9 (ST7). .

Then, the frequency division ratio of the frequency divider 5b is determined based on the frequency data (or preset frequency data) stored in the storage means 9 (ST8). The frequency locked at this frequency division ratio is set as the reception frequency (ST
9) Until the power is turned off, the once set reception frequency is fixed (ST10).

Therefore, according to the receiver of the above-described embodiment, the reception frequency is set based on the frequency data selected by the two switches 4a and 4b as the frequency selection means 4 when the power is turned on and started. Since the reception frequency is fixed during operation until the power is turned off next time, there is no danger that the reception frequency once set will be changed intentionally due to disturbances such as vibration, erroneous operation, etc. Improvement can be achieved.

By the way, in addition to the configuration of the above-described embodiment, a timer means is added, and a predetermined time after the power supply 1 is turned on,
For example, the frequency setting permission signal S1 may be delayed and supplied to the control means 10 so that the frequency can be changed by the two switches 4a and 4b of the frequency selection means 4 until several tens of seconds elapse.

[0033]

As described above, according to the receiver of the present invention, the frequency selected when the power is turned on is fixedly set as the reception frequency without the risk of intentionally changing until the power is turned off. And reliability can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a receiver of a radio control device according to the present invention;

FIG. 2 is an external view of the receiver.

FIG. 3 is a flowchart showing a frequency setting operation of the receiver.

[Explanation of symbols]

4 frequency selection means, 4a, 4b switches, 5 frequency variable means, 8 state detection means, 9 storage means, 10 ...
Control means, 11 ... frequency setting means.

Claims (1)

(57) [Scope of request for utility model registration] 1. A receiver for a frequency synthesizer-type radio control device using a PLL circuit for controlling an oscillation frequency based on a phase difference from a reference signal, wherein a predetermined frequency data is determined from a plurality of predetermined frequency data. Frequency selecting means for selecting a frequency, and the frequency selecting means
Holds the selected power-on frequency data and stores this data.
A frequency setting means for fixedly setting a reception frequency to the frequency of the held frequency data .