JP2535961B2 - Video memory system - Google Patents

Description

TECHNICAL FIELD The present invention relates to a video memory system for creating a still screen or a multi-screen of these during TV broadcasting and VTR reproduction.

[Summary of the Invention] The present invention relates to a Y / C separation circuit that separates a composite video signal into a luminance signal and a chroma signal in a video memory system that captures a predetermined video signal in a memory to create a still screen or a multi-screen. Switching means for selectively switching between the luminance signal and the composite video signal of the Y / C separation circuit and outputting one of them, a first memory for storing the output signal of this switching means, and a chroma for the Y / C separation circuit. By providing a second memory for storing signals, the composite video signal is stored in the first memory when creating a still screen, and the luminance signal and the chroma signal are separated when creating a multi-screen. Since the signal processing is performed and the luminance signal is stored in the first memory and the chroma signal is stored in the second memory, a high-quality screen can be obtained in a still screen and Signal processing surface creation can be easily.

[Prior Art] Some televisions, video tape recorders, video disc players, etc. are equipped with a video memory system for displaying still images and multi-images on the display.

2. Description of the Related Art There is a conventional video memory system which has one memory capable of storing a signal for one frame and which takes a digitized composite video signal and outputs the signal stored in this memory.

Further, as another example, it has two memories, and the luminance signal and the chroma signal obtained by separating the composite video signal are separately fetched into both memories, and the signals stored in both memories are added. There is something to output.

[Problems to be Solved by the Invention] In the former system, a composite video signal is sampled as it is to obtain a digital signal, and this digital signal is stored in a memory, so that a still image without image quality deterioration can be obtained. However, the chroma signal of the composite video signal is quadrature-quadrature-modulated and added to the luminance signal, and the modulated wave of this chroma signal is always continuous and inverted every line. In order to create a multi-screen, it is necessary to perform signal processing such as thinning out so that the composite video signal satisfies these conditions, which is a drawback that signal processing is very difficult.

On the other hand, in the latter system, the Y / C separation circuit is used to separate the composite video signal into a luminance signal and a chroma signal, and the luminance signal and the chroma signal are separately processed, so that the chroma signal is processed to satisfy the above conditions. It is simple and the signal processing for multi-screen creation is easy. However, there is a drawback that signal degradation occurs in the process of separating the composite video signal and the image on the still screen is degraded.

Therefore, it is an object of the present invention to provide a video memory system that solves the above-mentioned drawbacks.

[Means for Solving the Problems] The configuration of the present invention for achieving the above object is a Y / C for separating a composite video signal into a luminance signal and a chroma signal.
A separation circuit, a switching means for selectively switching between the luminance signal output by the Y / C separation circuit and the composite video signal, and outputting either one of the signals, and a first signal storing the output signal of the switching means. Screen, a second memory for storing the chroma signal output from the Y / C separation circuit, and an adder for adding the output signals of the first memory and the second memory, The switching means is controlled according to the mode.

[Operation] When creating a still screen, the composite video signal is taken into the first memory without being separated into a luminance signal and a chroma signal, and when creating a multi screen, the composite video signal is separated into a luminance signal and a chroma signal. ,
For example, the chroma signal is demodulated to baseband and signal processing is performed, and the luminance signal is stored in the first memory and the chroma signal is stored in the second memory. Then, if writing or reading to or from both of these memories is controlled, signals are thinned out,
Signal processing such as rearrangement on the screen can be performed.

[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, a video memory system is shown, and an NTSC composite video signal is input to an input terminal a of this video memory system. The input composite video signal is sent to the Y / C separation circuit 2 and the changeover switch 3.

The Y / C separation circuit 2 is composed of a comb filter, a bandpass filter, etc., and separates the composite video signal into a luminance signal (Y signal) and a chroma signal (C signal). The luminance signal is output to the changeover switch 3 and the chroma signal is output to the second A / D converter 5.

The composite video signal and the luminance signal are input to the changeover switch 3 which is a changeover means, and the composite video signal and the luminance signal are selectively changed over by the control signal of the memory controller 11 described below, and either one of the signals is changed to the first signal. of
Output to A / D converter 4. The first A / D converter 4 and the second A / D converter 5 each convert an input signal into an 8-bit digital signal at a sampling frequency of 14 MHz of the oscillator 6. The output of the first A / D converter 4 is output to the first memory 7, and the second A / D converter 5 is also output to the second memory 10 via the digital decoder 8 and the decimation point sequential circuit 9. Is output to. The digital decoder 8 demodulates the digitized chroma signal to a baseband state and demodulates the RY signal.
The signal and the BY signal are sent in parallel to the thinning-out point sequential circuit 9. The thinning point sequential circuit 9 sequentially sends R-
The Y signal and the BY signal are fetched once every several times to thin out the signals. This is because the chroma signal has a narrower frequency band than the luminance signal, and it is not necessary to use the same number of data as the luminance signal. RY captured at the same time
The signal and the BY signal are sent to the second memory 10 in a dot-sequential manner. That is, RY signal → BY signal → RY signal → B−
It is sent out like the Y signal.

The first memory 7 has a capacity for storing data for one screen, and the second memory 10 is composed of a frame memory having a capacity smaller than this. First memory 7
The second memory 10 writes and reads data based on the write control signal and the read control signal of the memory controller 11. The memory controller 11 outputs a write control signal to the first memory 7 and the second memory 10 in order to control the data to be stored and its storage location according to the mode selection signal of the microprocessor 12. When the still screen mode consisting of one frame of video signal is selected,
The memory controller 11 outputs a write control signal to the first memory 7 in order to write all the data sent to the first memory 7, and does not output a write control signal to the second memory 10. For example, when a multi-screen mode which is composed of video signals of 2 frames and displays different images on the right half screen and the left half screen is selected, the memory controller 11 is sent to the first memory 7 and the second memory 11. The first memory 7 and the second memory 7 are arranged so that every other data is written, and the signal of the frame displayed on the right half screen is written in the right half of the memory and the signal of the frame displayed on the left half screen is written in the left half of the memory. And outputs a write control signal to the memory 10. Further, the memory controller 11 receives the mode change signal of the microprocessor 12 from the two changeover switches 3 and 13.
The switching signal is output to. That is, when a mode selection signal indicating that the still screen mode has been selected is sent, the selector switch 3 is switched to a selector position for outputting a composite video signal, and the selector switch 13 is switched to an open position. Output a signal. When a mode selection signal indicating that the multi-screen mode has been selected is sent, a changeover signal is output so that the changeover switch 3 is set to a changeover position for outputting a luminance signal and the changeover switch 13 is set to a connection position.

The microprocessor 12 outputs a mode selection signal to the memory controller 11 to execute the selected mode based on the operator's mode command.

The output of the first memory 7 is output to the adder 14, and the output of the second memory 10 is output to the synchronization circuit 15.
The synchronizing circuit 15 is arranged to alternately send the RY signal and the B signal.
The -Y signal is sent as a pair of RY signal and BY signal to the digital encoder 16 at the same time. The digital encoder 16 performs quadrature two-phase modulation on the RY signal and the BY signal in the baseband state, and restores the digital signal on the 3.58 MHz subcarrier. The output of the digital encoder 16 is sent to the adder 14 via the changeover switch 13.

The adder 14 adds the output signal of the first memory 7 and the output signal of the second memory 10 and outputs the result to the D / A converter 17.
When the changeover switch 13 is in the open position, the output signal of the first memory 7 is output as it is. The D / A converter 17 converts the input digital signal into an analog signal and outputs it to the output terminal b.

 The operation of the above configuration will be described below.

Microprocessor when static screen mode is selected
12 outputs a mode selection signal indicating that the still screen mode has been selected, to the memory controller 11. The memory controller 11 outputs a changeover signal to the two changeover switches 3 and 13, and as shown in FIG. 1, the changeover switch 3 is placed in a changeover position for outputting a composite video signal, and the changeover switch 13 is placed in an open position. . The composite video signal input from the input terminal a is output to the first A / D converter 4 via the changeover switch 3. The first A / D converter 4 converts the composite video signal as it is into a digital signal, and all the digital signals are written in the first memory 7. The memory controller 11 uses a DRAM for the first memory 7.
When using, it is necessary to perform the refresh operation during the writing period, but control is performed so that the phase of the subcarrier F _SC does not change before and after the refresh operation. On the other hand, the composite video signal input from the input terminal a is input to the Y / C separation circuit 2. The chroma signal separated here is output to the second memory 10 through the second A / D converter 5, the digital decoder 8 and the thinning-out point sequential circuit 9, and the memory controller 11 causes the second memory 10 to operate. Since the write control signal is not sent to the second memory 10, it is not stored in the second memory 10. The signals stored in the first memory 7 are stored in the memory controller 11
Is read out based on the read control signal and the read output signal is output to the D / A converter 17 via the adder 14. The D / A converter 17 converts the digitized composite video signal into an analog signal and outputs it to the output terminal b. The signal stored in the first memory 7 is repeatedly read many times, and the same composite video signal is repeatedly output from the output terminal b to obtain a still image.

Also, when the multi-screen mode that shows different images on the right half screen and the left half screen is selected, the microprocessor
Reference numeral 12 outputs a mode selection signal indicating that the multi-screen mode has been selected to the memory controller 11. The memory controller 11 outputs a changeover signal to the two changeover switches 3 and 13, and the changeover switch 3 is at a changeover position for outputting a luminance signal,
The changeover switches 13 are respectively located at the connecting positions. The composite video signal displayed on the right half screen is input terminal a
Input from this composite video signal is Y / C
The separator 2 separates the luminance signal and the chroma signal. The luminance signal is output to the first A / D converter 4 via the changeover switch 3 and digitized, and this digital signal is output to the first memory 4. The chroma signal is converted into a digital signal by the second A / D converter 5, and this digital signal is demodulated by the digital decoder 8 into a baseband state in which the subcarrier f _SC is removed. The demodulated digital signal is decimated by the decimating point sequential circuit 9 by a predetermined number and output to the second memory 10. The memory controller 11 fetches every other signal input to the first memory 7 and the second memory 10 and sends a write control signal to the first memory 7 and the second memory 10 to store it in the right half area of the memory. To the memory 10 of. Since the chroma signal is demodulated to baseband,
It suffices to simply write without considering the continuity and phase of the subcarrier f _SC . When the composite video signal displayed on the left half screen is input from the input terminal a, signal processing is performed in the same manner as described above, the luminance signal is stored in the left half area of the first memory 7, and the chroma signal is stored in the second half area. Each is stored in the left half area of the memory 10. When all the writing to the first memory 7 and the second memory 10 is completed, the memory controller 11 outputs a read control signal to the first memory 7 and the second memory 10, and the first memory 7 and the second memory 10 are read. The signals stored in the memory 10 are output in a predetermined order. Second
The RY signal and the BY signal which are sequentially output from the memory 10 are synchronized by the synchronizing circuit 15, and the synchronized signal is orthogonalized by the digital encoder 16 between the RY signal and the BY signal. It is two-phase modulated and modulated into a digital signal on a 3.58 MHz subcarrier f _SC . The modulated digital signal is output to the adder 14 via the changeover switch 13. The adder 14 adds the luminance signal output from the first memory 7 and the chroma signal that has been subjected to the above processing to form a digital composite video signal. This composite video signal is converted into an analog signal by the D / A converter 17 and sent to the output terminal b, so that a multi-screen in which different images are displayed on the right half screen and the left half screen can be obtained.

As described above, according to the present invention, a Y / C separation circuit for separating a composite video signal, and a luminance signal and a composite video signal output by the Y / C separation circuit are selectively switched. And a second memory for storing the chroma signal output by the Y / C separation circuit is provided, and when a still screen is created, Signals are handled in the state of composite video signals, and when creating a multi-screen, the signals are separated into the state of the luminance signal and the state of chroma signal to handle the signals, so a high-quality screen can be obtained on a still screen. This has the effect of facilitating processing.

[Brief description of drawings]

FIG. 1 is a block diagram of a video memory system showing an embodiment of the present invention. 2 ... Y / C separation circuit, 3 ... selector switch (switching means), 7
... first memory, 10 ... second memory, 14 ... adder.

Claims (1)

(57) [Claims] 1. A Y / C separation circuit for separating a composite video signal into a luminance signal and a chroma signal, and either one of the luminance signal output from the Y / C separation circuit and the composite video signal is selectively switched. Switching means for outputting the signal, a first memory for storing the output signal of the switching means, and a second memory for storing the chroma signal output by the Y / C separation circuit.
And a adder that adds the output signals of the first memory and the second memory, and the switching means is controlled according to the screen mode to be displayed.