JP2502281B2 - Information signal processor - Google Patents

Description

The present invention relates to an information signal processing device for determining whether or not a digital information signal is recorded in a predetermined area of a recording medium.

<Description of Prior Art> In recent years, in the field of magnetic recording, high-density recording has been pursued, and even in a video tape recorder (VTR), the tape traveling speed is reduced to perform higher-density magnetic recording. There is. Therefore, if the audio signal is recorded by using a fixed head as in the conventional case, the relative speed cannot be made large and the reproduced sound quality is deteriorated. Therefore, as one solution to this problem, there is a method in which the length of the track formed by the rotary head is made longer than in the conventional case, and the time-axis-compressed audio signal is sequentially recorded in the extended portion.

For example, in a rotary 2-head helical scan type VTR, magnetic tape was wound around 180 ° or more on a conventional rotary cylinder, but (180 + θ) on the rotary cylinder.
A VTR has been devised that records an audio signal that is time-compressed by PCMizing it in the part that is wound more than 0 ° and is wound extra. FIG. 2 is a diagram showing a tape running system of such a VTR, and FIG. 3 is a diagram showing recording tracks on a magnetic tape by the VTR shown in FIG. In the figure, 1 is a magnetic tape,
2 is a rotary cylinder, 3 and 4 are heads mounted on the cylinder 2 with a phase difference of 180 ° and having different azimuth angles.
Is the video area part of the track formed on tape 1,
Reference numeral 6 is also an audio area portion. The video area 5 is a part where the heads 3 and 4 trace the tape at 180 ° of the rotary cylinder 2, and the audio area 6 is θ ° of the rotary cylinder 2.
Heads 3 and 4 are the traced parts of the tape in minutes. Also the third figure f ₁ ~f ₄ is well known 4-frequency system, shows the frequency of the tracking pilot signal superimposed on each track, the relationship of the frequency _{(f 2 -f 1) = f} 3 - f ₄ ≒
At f _H , f ₄ −f ₂ ≈2f _H. However, f _H indicates the horizontal scanning frequency of the video signal.

In this way, the sound quality of the audio signal reproduced into PCM in the audio area and compressed on the time axis is considerably high, and is comparable to the sound quality of the dedicated audio device which records and reproduces the analog signal.

On the other hand, it has been proposed to record another audio signal in the video area 5 in the VTR as described above. That is, when θ = 36, for example, if the rotary head rotates by 180 °, five other audio regions such as 6 are provided. Then, by recording the time-compressed audio signals in each area independently, an audio dedicated tape recorder capable of recording a total of 6 channels of audio signals can be obtained.

The tape recorder will be briefly described below. FIG. 4 is a diagram showing a tape running system of the above-mentioned tape recorder, and FIG. 5 is a diagram showing recording loci on the tape by this tape recorder. Incidentally, the numbering is shared with FIG. 2 and FIG.

In FIG. 5, CH1 to CH6 are head 3 or head 4 in FIG. 4, respectively, from A to B, B to C, C to D, D to E, E.
To F and F to G are areas where an audio signal is recorded. It is possible to separately record audio signals in each area, and so-called azimuth overwriting is performed in each area, but the tracks in each area CH1 to CH6 need not be on the same straight line. The pilot signal for tracking control is recorded in each area. It is assumed that each area is recorded with a predetermined rotation (f ₁ → f ₂ → f ₃ → f ₄ ). There is no correlation between them.

Areas indicated by CH1 to CH3 are recorded and reproduced when the tape 1 is running at a predetermined speed in a direction shown by an arrow 7 in FIG. 4, and areas shown by CH4 to CH6 are also run in a direction shown by an arrow 9. It is recorded and reproduced when Therefore, as shown in FIG. 5, the slope of each track in the areas CH1 to CH3 and CH4
~ The inclination of each track in the area CH6 is slightly different.
However, the difference in relative speed at this time is not a problem because the tape 1 travels much less than the heads 3 and 4 rotate.

FIG. 6 is a time chart of recording / reproduction of the tape recorder as described above. In the figure, (a) is a phase detection pulse (hereinafter, PG) generated in synchronization with the rotation of the cylinder 2, which has a frequency of 30 Hz which repeats "high level (H)" and "low level (L)" in 1/60 seconds. It is a square wave. Further, (b) is a PG having a polarity opposite to that of PG (a). It is assumed that (PG (a) is H while the head 3 is rotating from B to G in FIG. 4 and PG (b) is H while the head 4 is also rotating from B to G in FIG.

FIG. 6 (c) is a pulse for reading data obtained from PG (a), in order to sample the audio signal every other field for the period corresponding to one field (1/60 seconds) of the video signal. belongs to. FIG. 6 (d) shows a signal processing period H for adding an error correction redundant code or the like to the sampled audio data for one field using a RAM or changing the arrangement. FIG. 6 (e) shows the data recording period by H, and shows the timing of recording the recording data obtained by the above-described signal processing on the tape 1.

For example, when the signal flow is temporally tracked using FIG. 6,
The data sampled during the period from t1 to t3 (head 3 is moving from B to G) is subjected to signal processing at t3 to t5 (head 3 from G to A), and t5 to t6 (head 3 from A to B). ) Period is recorded. That is, it is recorded in the CH1 area of FIG. 5 by the head 3. On the other hand, the data sampled during the period when PG (b) is H is subjected to signal processing at the same timing and is recorded in the CH1 area by the head 4.

FIG. 6 (f) shows a PG in which the PG (a) is phased by a predetermined phase (here, 36 ° for one area). Hereinafter, a case where an audio signal is recorded by PG (f) and a PG (not shown) having an opposite characteristic will be described. The data sampled from t2 to t4 in FIG. 6 is signal-processed according to the signal shown in FIG. 6 (g) during t4 to t6 and recorded according to the signal shown in FIG. 5 (h) during the period from t6 to t7. . That is, the head 3 records in the area indicated by CH2 in FIG. 5 during the period in which the head 3 traces B to C. The data sampled in the period of t4 to t7 in synchronization is recorded by the head 4 in the area indicated by CH2.

Next, the operation of reproducing the signal recorded in the area indicated by CH2 will be described.

Data reading from the tape 1 by the head 3 is performed at t6 to t7 (t1 to t2 are the same) in accordance with the signal shown in FIG. 6 (h), and t7 to t8 (t2 in accordance with the signal shown in FIG. The signal processing opposite to that at the time of recording is performed from ~ t3). That is, error correction is performed during this period, and then t8 is applied in accordance with the signal shown in FIG. 6 (j).
The playback audio signal is output at ~ t9 (t3 ~ t6). Of course, the reproducing operation by the head 4 is performed with a phase difference of 180 ° from the above operation, and a continuous reproducing audio signal can be obtained by this.

Also, for other areas CH3 to CH6, PG (a) is set to n × 36.
It goes without saying that the recording / reproducing operation described above may be performed on the basis of the phase shift of .degree., And this does not depend on the tape running direction.

In this way, the VTR is used as a multi-channel audio-only device.
Can be used.

<Problems to be Solved by the Invention> In the above-mentioned device, it is possible to record an audio signal for an extremely long time, but on the other hand, if the recording situation is not grasped, there is a high possibility of erroneous operation. That is, there are recorded and unrecorded portions of the audio signal for each channel, and video signals may be recorded on CH2 to CH6, and there is an unerased portion of the video signal. Therefore, it is difficult to accurately determine the recording status.

Moreover, if a video signal is erroneously recorded on such a recording medium, all audio signals from CH2 to CH5 will be erased. Also, if the audio signal is recorded even on a channel of CH2 to CH5 on the medium on which the video signal is recorded, the video signal itself will become invalid in the future.

Therefore, it is conceivable to determine the recording status of each area, but it is difficult to determine whether the recorded signal is a digital audio signal or a video signal.
However, it is not preferable to separately record an identification signal for this determination because it hinders high density recording.
Further, if the identification signal is superimposed on the digital audio signal for recording, the error rate during recording and reproduction of the digital audio signal increases.

In view of the problems as described above, the present invention provides an information signal processing device capable of reliably determining whether or not a digital information signal is recorded in a predetermined area of a recording medium without adding a special signal. The purpose is to do.

<Means for Solving Problems> In the information signal processing device according to the present invention, a digital information signal including a main information data and a check code forming an error detection code or a signal other than the digital information signal can be recorded. In an information signal processing device having a different recording medium, a reproduction signal for reproducing the information signal recorded on the recording medium, a reproduction output detecting means for detecting a reproduction output of the reproducing means, and a predetermined area on the recording medium. Error detection means for detecting a code error of the main information data contained in the digital information signal recorded by using the check code, and the recording using the output of the reproduction output detection means and the error detection means. A discriminator for discriminating whether the digital information signal is recorded in a predetermined area of the medium or a signal other than the digital information signal is recorded. It is characterized by having a step.

<Embodiment> FIG. 1 is a diagram showing a schematic configuration of a tape recorder as an embodiment of the present invention. In FIG. 1, the same components as those in FIGS. 2 to 5 are designated by the same reference numerals.

PG obtained from the rotation detector 11 of the rotating cylinder 2 is supplied to the cylinder motor control circuit 15 to rotate the cylinder 2 at a predetermined rotation speed and a predetermined rotation phase. Reference numeral 12 is a rotation detector of the flywheel 14 of the capstan 13, and the output of the rotation detector 12 is supplied to a capstan motor control circuit 25, which controls the capstan 13 to have a predetermined rotation speed during recording.

On the other hand, the above-mentioned PG is supplied to the window pulse generation circuit 16. Figure 7 shows the window pulse and gate pulse
It is a timing chart for explaining the phase relation to PG.

FIG. 7 (a) shows a PG, which is at a high level while the head 3 is moving from the point B to the point G in FIG. FIGS. 7 (b) to 7 (g) are window pulses showing the recording / reproducing timings of the regions CH1 to CH6, respectively. In FIG. 7, the solid line is for the head 3 and the dotted line is for the head 4.

By operating the operation unit 18 manually, operation modes such as recording and reproduction, and an area to be recorded and reproduced are designated. This data is supplied to the system controller 27 and controls each part of the device. The area designating circuit 19 supplies the area designating data to the gate pulse generating circuit 17 to obtain a desired gate pulse. When the operation section 18 is instructed to record or reproduce a video signal, the area designating circuit 19 automatically designates CH1 by the output of the system controller 27.

The control gate pulse of the gate circuit 20 is selectively supplied based on the area designation data for each of the head 3 and the head 4 as shown in the above-mentioned window pulse (FIG. 7 (b) to (g)). To be done. If the area shown in CH2 in FIG. 5 is designated, the gate circuit 20 is controlled by the window pulse shown in FIG. 7 (c).

At the time of recording, the analog audio signal input from the terminal 21i is supplied to the PCM audio signal processing circuit 22 and is sampled at the circuit 22 at the above-mentioned timing related to the window pulse (c) to be digital data.
The aforementioned signal processing is performed. The recording audio data thus obtained is added by the adder 24 to the tracking pilot signal generated by the rotation of f ₁ → f ₂ → f ₃ → f ₄ from the pilot signal generating circuit 23 for each field.
The output of the adder 24 is appropriately gated by the gate circuit 20 as described above, and is written in the area CH2 by the heads 3 and 4.

During reproduction, the reproduction signals of the heads 3 and 4 are also transmitted by the window pulse (c) via the gate circuit 20 to the ATF circuits 26 and P.
It is supplied to the CM audio circuit 22. PCM audio circuit 2
Contrary to recording, in 2, signal processing such as error correction, time axis expansion, digital-analog conversion is performed, and a reproduced analog audio signal is output from a terminal 21o.

The ATF circuit 26 is a circuit for obtaining a tracking error output by the well-known 4-frequency system, and outputs the reproduced tracking pilot signal and the pilot signal generated by the pilot signal generating circuit 23 at the same rotation as during recording. It is well known to use. However, in this case, since the tracking is performed on the area designated by the area designating circuit 19, the tracking error signal must be sampled and held within the period in which the heads 3 and 4 trace the designated area. .
Incidentally, when the video signal is simultaneously recorded and reproduced, the tracking error signal is obtained by the conventional method.

The tracking error signal thus obtained is supplied to the capstan motor control circuit 25, and the running of the tape 1 during reproduction is controlled via the capstan 13 to perform tracking control.

The recording / reproducing of the video signal when the recording / reproducing of the video signal is designated will be described below. The video signal input from the terminal 28i is subjected to well-known signal processing in the video signal processing circuit 29, added with the tracking pilot signal in the adder 31, and recorded via the post-gate circuit 30.
The gate circuit 30 is controlled by the PG, and the video signals are sequentially and continuously recorded at the heads 3 and 4. The video signals reproduced from the heads 3 and 4 are converted into continuous signals by the gate circuit 30 and input to the video signal processing circuit 29. Video signal processing circuit
At 29, the reproduced video signal is returned to the original signal form. At the same time, the reproduction pilot signal is supplied to the ATF circuit 26 to obtain a tracking error signal. Since this tracking error signal is a continuous signal, it is not necessary to sample and hold it, and it is supplied to the capstan motor control circuit 25 via the LPF.

Reference numeral 37 is a CRCC status discrimination circuit, which detects whether or not there is an error in each data block of the PCM audio signal using a well-known CRCC check code, and compares the block error rate with a predetermined error rate. Determine whether small or small.

In the PCM audio signal, a cyclic code called CRCC is added in the recorded data in advance in order to detect or correct an error added in the recording medium during reproduction. This CRCC corresponds to the time of 1 field of video signal
The recorded data of the PCM audio signal is divided into 132 blocks in the NTSC system and 157 blocks in the CCIR system, for example, and added to each block.

This CRCC is calculated as "0" as the CRCC calculation result when no error is added to the reproduced data, and is calculated as data other than "0" when an error is added.
The calculation method of CRCC is originally determined so that the probability of false detection due to addition of an error is extremely low. Therefore CR
It can be asserted with an extremely high probability that the data string for which the CC calculation result is calculated as “0” matches the data string at the time of recording.
Furthermore, it is even less likely that a portion of the video signal that differs greatly from the original data string in the spectrum will be input to the PCM reproduction signal processing circuit, and that this will be erroneously detected as a correct data string.

FIG. 8 is a diagram showing a specific example of the CRCC state discrimination circuit in FIG. 1, in which 90 is an amplifier for amplifying the RF signal reproduced from the head 3 and 91 is a waveform equalization circuit. Reference numeral 92 is a circuit for extracting a clock component from the output of the PCM audio signal obtained from the waveform equalization circuit 91, 93 is a clock reproducing circuit for newly generating a control clock based on the extracted clock component, and 94 is based on the control clock. Is a bit synchronizing circuit for restoring the data of each bit, 95 is a synchronizing signal detecting circuit, and 96 is a well-known CRCC arithmetic circuit.

Since the CRCC calculation result is valid data only at the final bit of the CRCC inspection point of the input data, a latch pulse indicating this timing is generated by using the above-mentioned synchronization signal and the above-mentioned control clock. As a result of CRCC calculation, "0" is output when there is no error, and this is gated by the logic gate 98 with the latch pulse and supplied to the counter 101. The counter 101 counts up each time the information that there is no error is input. If no error occurs in all data blocks, the counter 101 counts up to 132 in the NTSC system and 157 in the CCIR system, for example. Alternate set pulse generation circuit 106
Operates based on PG, and the counter 101 is reset by the reset and pulse generated by the reset pulse generation circuit 106 every time the head 3 enters each area.

On the other hand, from the data generation circuit 102, predetermined data, for example N
About 30 data are generated in the TSC system and about 40 data are generated in the CCIR system. When the counter 101 counts up more than this data, the digital comparator 103 generates an H output. It is also possible to replace the digital comparator with an OR gate that outputs H if any of the data at the 6th bit and above of the counter 101 is "1". At this time, it is equivalent to the case where the output data from the data generation circuit 102 is 32.

The sampling pulse generation circuit 104 generates a sampling pulse based on PG at a predetermined timing when the head 3 traces each area described above (here, the timing when the head 3 traces the center of each area). This sampling pulse is gated by the output of the digital comparator 103 in the sampling circuit 105 and output as OUT1. The sampling pulse itself is output as OUT2. Here, when the sampling pulse is output to OUT1, it can be determined that the PCM audio signal is recorded in the area, and when it is not output, it can be determined that the PCM audio signal is not recorded.

Reference numeral 35 is a recording state discriminating circuit, and the circuit 35 uses the reproduction output of the head 3 and the output of the CRCC state discriminating circuit 37 to determine whether an audio signal or a video signal is recorded in each area. Furthermore, it is discriminating whether it is unrecorded.

FIG. 9 is a diagram showing an example of a specific configuration of the recording state determination circuit. Reference numeral 40 is a terminal to which OUT1 of the CRCC state discrimination circuit 38, 41 is a reproduction output signal of the head 3, and 45 is a terminal to which OUT2 of the circuit 38 is supplied, and the reproduction output signal of the head 3 is supplied to the LPF 42. The LPF 42 is for extracting the RF signal component in the reproduction signal, and this RF signal is detected by the detection circuit 43 and then compared with a predetermined voltage (Vth) by the comparison circuit 44. Therefore, the output of the comparison circuit 44 becomes high level (H) when the head 3 traces the portion where the video signal or the PCM audio signal is recorded.

On the other hand, the sampling pulse input from the terminal 45 is delayed for a minute time by the delay circuit 46, and then the AND gate
It is supplied to 47 and gated by the output of the comparison circuit 44 described above.
Of the delayed sampling pulses output from the AND gate 47, those in the PCM audio signal recording area are muted by the AND gate 48. That is, the sampling pulse in the PCM audio signal recording area triggers the mono-multi 57, and the period inverter including the timing when the sampling pulse is output from the AND gate 47
This is because 58 becomes L.

Therefore, the signal indicated by A in the figure is a pulse signal for the area where the head 3 is reproducing the PCM audio signal, and the signal indicated by V is a pulse signal for the area where the head 3 is reproducing the video signal. From these pulse signals, it is possible to discriminate from which region the audio signal and the video signal are reproduced by using the window pulse described above.

Window pulse corresponding to CH1 to CH6 is AND gate
When the reproduction audio signal is obtained from a certain area, the AND gate corresponding to the area outputs H once every one rotation of the rotary head 3. On the other hand, the window pulse corresponding to CH2 to CH6 is AND gate
Similarly, when a reproduction video signal is obtained from a certain area, the AND gate corresponding to that area outputs H once every one rotation of the rotating head. It is assumed here that no video signal is recorded or reproduced on CH1.

Mono-multi (MM) 71-76 and 82-86 are AND gates
Holds the output signals of 51-56 and 62-66.
It is assumed that the holding period can be retriggered with the rotation cycle of the head 3 or more. Therefore, the area where the audio signal is recorded in CH1 to CH6 can be identified by the terminals H1 to CH6 in FIG. 9 becoming H. The area where the video signal of CH2 to CH6 is recorded can be identified by looking at the output of MM82 to 86, but since the video signal is valid only when it is recorded in all of CH2 to CH6, these Whether or not a valid video signal is recorded can be determined by the logical sum of the outputs of the MMs 82 to 86. That is, when the output of the AND gate 49 is H, a valid video signal is described. The outputs (CH1 to CH6 and VIDEO) of the discrimination circuit 35 are displayed on the display unit 36.

According to the device as described above, it is possible to confirm whether or not the digital audio signal is described in each channel without overlapping the identification signal.

In the above embodiment, the digital information signal is PCM.
Although the audio signal has been described as an example, the present invention is not limited to this, and the present invention is also applied to the case of a digital image signal, a character signal, or the like, which is extremely effective.

Further, in the CRCC state discrimination circuit 37 described above, the portion indicated by 100 is also normally provided in the PCM audio signal reproduction processing circuit, so that this circuit can be used. However, this circuit is for generating the reproduction output of the audio signal in units of one field period.
Since the arithmetic circuit is also configured to operate only in a specific area, it is possible to judge the recording status in all areas by one rotation of the head 3 by changing the supply method of the control clock. However, if the head 3 is rotated 6 times, this is not a concern.

<Effects of the Invention> As described above, according to the information processing apparatus of the present invention, a special signal is generated by the double check using the reproduction output of the information signal and the error detection result by the check code included in the digital information signal. It is possible to surely determine whether or not the digital information signal is recorded in the predetermined area of the recording medium without using it.

Further, since it is not necessary to record a special identification signal, the amount of information of the digital information signal is not reduced, and a circuit for adding a special identification signal or a circuit for extracting the identification signal is not required. Therefore, it can be achieved by almost the conventional circuit configuration.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic structure of a tape recorder as one embodiment of the present invention, FIG. 2 is a diagram showing a tape running system of a conventional VTR, and FIG. 3 is a magnetic tape by the VTR shown in FIG. FIG. 4 is a diagram showing a recording track on the above, FIG. 4 is a diagram showing a tape running system of a multi-channel tape recorder, FIG. 5 is a diagram showing a recording track on a magnetic tape by the tape recorder shown in FIG. 4, and FIG. Recording / reproducing time chart of the tape recorder shown in FIG. 4, FIG. 7 is a timing chart for explaining the phase relationship of the window pulse with respect to PG, and FIG. 8 is a specific example of the CRCC state discrimination circuit in FIG. FIG. 9 is a diagram showing a specific example of the recording state discrimination circuit in FIG. 1 is a magnetic tape as a recording medium, 3 and 4 are rotating heads respectively, 22 is a PCM audio signal processing circuit, 35 is a recording state discrimination circuit, 38 is a CRCC state discrimination circuit, 96 is a CRCC arithmetic circuit, 10
1 is counter, 103 is digital comparator, CH1 to CH6
Are regions extending in the longitudinal direction, respectively.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hiroyuki Takimoto Inventor Hiroyuki Takimoto, 770 Shimonoge, Takatsu-ku, Kawasaki Canon Inc., Tamagawa Works (72) Inventor, Hiroji Takahashi 770, Shimonoge, Takatsu-ku, Kawasaki, Canon Inc., Tamagawa Works (72) ) Inventor Kenichi Nagasawa 770 Shimonoge, Takatsu-ku, Kawasaki City Canon Inc. Tamagawa Plant (56) References JP 59-218613 (JP, A) JP 58-169306 (JP, A) JP 55- 157114 (JP, A) Actual development Sho 58-190818 (JP, U)

Claims (1)

(57) [Claims] 1. An information signal processing apparatus having a recording medium capable of recording a digital information signal containing main information data and a check code forming an error detection code or a signal other than the digital information signal, wherein the recording medium is Reproduction means for reproducing the recorded information signal, reproduction output detection means for detecting the reproduction output of the reproduction means, and the main information included in the digital information signal recorded in a predetermined area of the recording medium. Error detection means for detecting a code error of data using the check code; and whether the digital information signal is recorded in a predetermined area of the recording medium by using the outputs of the reproduction output detection means and the error detection means. An information signal processing device, comprising: a discriminating means for discriminating whether a signal other than a digital information signal is recorded.