JP2025526905A - イーサネットのためのリプレイマイクロアーキテクチャ - Google Patents

イーサネットのためのリプレイマイクロアーキテクチャ

Info

Publication number
JP2025526905A
JP2025526905A JP2025508895A JP2025508895A JP2025526905A JP 2025526905 A JP2025526905 A JP 2025526905A JP 2025508895 A JP2025508895 A JP 2025508895A JP 2025508895 A JP2025508895 A JP 2025508895A JP 2025526905 A JP2025526905 A JP 2025526905A
Authority
JP
Japan
Prior art keywords
node
packets
packet
link
hardware
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025508895A
Other languages
English (en)
Japanese (ja)
Other versions
JP2025526905A5 (https=
Inventor
クィネル，エリック，シー．
ウィリアムズ，ダグラス，アール．
ヒョン，クリストファー
ウルタド，ヘラルド ナバロ
Original Assignee
テスラ，インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by テスラ，インコーポレイテッド filed Critical テスラ，インコーポレイテッド
Publication of JP2025526905A publication Critical patent/JP2025526905A/ja
Publication of JP2025526905A5 publication Critical patent/JP2025526905A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/111—Switch interfaces, e.g. port details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/32—Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/28—Flow control; Congestion control in relation to timing considerations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/28—Flow control; Congestion control in relation to timing considerations
    • H04L47/283—Flow control; Congestion control in relation to timing considerations in response to processing delays, e.g. caused by jitter or round trip time [RTT]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/113—Arrangements for redundant switching, e.g. using parallel planes
    • H04L49/115—Transferring a complete packet or cell through each plane
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H04L49/1546—Non-blocking multistage, e.g. Clos using pipelined operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3063—Pipelined operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H04L49/352—Gigabit ethernet switching [GBPS]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9015—Buffering arrangements for supporting a linked list
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/04—Protocols for data compression, e.g. ROHC
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/26—Special purpose or proprietary protocols or architectures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/28—Timers or timing mechanisms used in protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/324—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the data link layer [OSI layer 2], e.g. HDLC

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Computing Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
JP2025508895A 2022-08-19 2023-08-17 イーサネットのためのリプレイマイクロアーキテクチャ Pending JP2025526905A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US202263373016P 2022-08-19 2022-08-19
US63/373,016 2022-08-19
US202363503349P 2023-05-19 2023-05-19
US63/503,349 2023-05-19
PCT/US2023/030503 WO2024039800A1 (en) 2022-08-19 2023-08-17 Replay micro-architecture for ethernet

Publications (2)

Publication Number Publication Date
JP2025526905A true JP2025526905A (ja) 2025-08-15
JP2025526905A5 JP2025526905A5 (https=) 2025-12-01

Family

ID=88020740

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2025508895A Pending JP2025526905A (ja) 2022-08-19 2023-08-17 イーサネットのためのリプレイマイクロアーキテクチャ
JP2025508894A Pending JP2025526904A (ja) 2022-08-19 2023-08-17 イーサネットのためのトランスポートプロトコル
JP2025508896A Pending JP2025526906A (ja) 2022-08-19 2023-08-17 イーサネットのためのリンクタイマ

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP2025508894A Pending JP2025526904A (ja) 2022-08-19 2023-08-17 イーサネットのためのトランスポートプロトコル
JP2025508896A Pending JP2025526906A (ja) 2022-08-19 2023-08-17 イーサネットのためのリンクタイマ

Country Status (7)

Country Link
US (1) US20260052110A1 (https=)
EP (3) EP4573730A1 (https=)
JP (3) JP2025526905A (https=)
KR (3) KR20250049388A (https=)
CN (3) CN119999170A (https=)
TW (1) TW202415044A (https=)
WO (3) WO2024039793A1 (https=)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005502225A (ja) * 2001-04-24 2005-01-20 アイレディ コーポレーション ギガビット・イーサネット・アダプタ
JP2008113327A (ja) * 2006-10-31 2008-05-15 Matsushita Electric Ind Co Ltd ネットワークインターフェース装置
WO2010110356A1 (ja) * 2009-03-27 2010-09-30 日本電気株式会社 パケット再送制御システム、パケット再送制御方法および再送制御プログラム
WO2011068186A1 (ja) * 2009-12-03 2011-06-09 日本電気株式会社 パケット受信装置、パケット通信システム、パケット順序制御方法
WO2011074454A1 (ja) * 2009-12-14 2011-06-23 日本電気株式会社 パケット再送制御システム、方法、及びプログラム
WO2012066824A1 (ja) * 2010-11-16 2012-05-24 株式会社日立製作所 通信装置および通信システム
US20140108603A1 (en) * 2012-10-16 2014-04-17 Robert Bosch Gmbh Distributed measurement arrangement for an embedded automotive acquisition device with tcp acceleration
US20200177540A1 (en) * 2018-07-26 2020-06-04 Secturion Systems, Inc. In-line transmission control protocol processing engine using a systolic array
CN113300819A (zh) * 2021-04-13 2021-08-24 中国科学技术大学 一种鲁棒的逐跳可靠数据传输方法、装置及系统

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US6091737A (en) * 1996-11-15 2000-07-18 Multi-Tech Systems, Inc. Remote communications server system
US7251256B1 (en) * 2000-05-18 2007-07-31 Luminous Networks, Inc. Synchronization of asynchronous networks using media access control (MAC) layer synchronization symbols
US7535913B2 (en) * 2002-03-06 2009-05-19 Nvidia Corporation Gigabit ethernet adapter supporting the iSCSI and IPSEC protocols
JP2004128786A (ja) * 2002-10-01 2004-04-22 Fujitsu Ltd パケット再送制御装置
CN1254065C (zh) * 2002-10-29 2006-04-26 华为技术有限公司 用随机存储器实现的tcp连接定时器及其实现方法
US7551638B2 (en) * 2005-03-31 2009-06-23 Intel Corporation Network interface with transmit frame descriptor reuse
JP2007288428A (ja) * 2006-04-14 2007-11-01 Fujitsu Ltd 中継装置およびデータ再送方法
JP5074872B2 (ja) * 2007-09-25 2012-11-14 キヤノン株式会社 プロトコル処理装置及び制御方法
WO2011102312A1 (ja) * 2010-02-16 2011-08-25 日本電気株式会社 パケット転送装置、通信システム、処理規則の更新方法およびプログラム
US9628382B2 (en) * 2014-02-05 2017-04-18 Intel Corporation Reliable transport of ethernet packet data with wire-speed and packet data rate match
GB2542373A (en) * 2015-09-16 2017-03-22 Nanospeed Tech Ltd TCP/IP offload system
EP3652721A1 (en) * 2017-09-04 2020-05-20 NNG Software Developing and Commercial LLC A method and apparatus for collecting and using sensor data from a vehicle
US12341687B2 (en) * 2017-09-29 2025-06-24 Microsoft Technology Licensing, Llc Reliable fabric control protocol extensions for data center networks with failure resilience
US12137001B2 (en) * 2020-12-26 2024-11-05 Intel Corporation Scalable protocol-agnostic reliable transport

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005502225A (ja) * 2001-04-24 2005-01-20 アイレディ コーポレーション ギガビット・イーサネット・アダプタ
JP2008113327A (ja) * 2006-10-31 2008-05-15 Matsushita Electric Ind Co Ltd ネットワークインターフェース装置
WO2010110356A1 (ja) * 2009-03-27 2010-09-30 日本電気株式会社 パケット再送制御システム、パケット再送制御方法および再送制御プログラム
WO2011068186A1 (ja) * 2009-12-03 2011-06-09 日本電気株式会社 パケット受信装置、パケット通信システム、パケット順序制御方法
WO2011074454A1 (ja) * 2009-12-14 2011-06-23 日本電気株式会社 パケット再送制御システム、方法、及びプログラム
WO2012066824A1 (ja) * 2010-11-16 2012-05-24 株式会社日立製作所 通信装置および通信システム
US20140108603A1 (en) * 2012-10-16 2014-04-17 Robert Bosch Gmbh Distributed measurement arrangement for an embedded automotive acquisition device with tcp acceleration
US20200177540A1 (en) * 2018-07-26 2020-06-04 Secturion Systems, Inc. In-line transmission control protocol processing engine using a systolic array
CN113300819A (zh) * 2021-04-13 2021-08-24 中国科学技术大学 一种鲁棒的逐跳可靠数据传输方法、装置及系统

Also Published As

Publication number Publication date
WO2024039793A1 (en) 2024-02-22
JP2025526904A (ja) 2025-08-15
CN119999170A (zh) 2025-05-13
KR20250050079A (ko) 2025-04-14
EP4573743A1 (en) 2025-06-25
WO2024039794A1 (en) 2024-02-22
EP4573730A1 (en) 2025-06-25
CN119999171A (zh) 2025-05-13
CN120035982A (zh) 2025-05-23
KR20250052400A (ko) 2025-04-18
US20260052110A1 (en) 2026-02-19
EP4573729A1 (en) 2025-06-25
JP2025526906A (ja) 2025-08-15
WO2024039800A1 (en) 2024-02-22
KR20250049388A (ko) 2025-04-11
TW202415044A (zh) 2024-04-01

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