JP2024064085A - Overcurrent Detection Circuit - Google Patents

Abstract

[Problem] To provide an overcurrent detection circuit capable of detecting an overcurrent without using a shunt resistor. [Solution] A MOS transistor T1 inputs an input voltage VIN from an input terminal 12. A first body diode D1 of a MOS transistor T2 is connected in series with a second body diode D2 of the MOS transistor T2 for output voltage control in the opposite directions. The input voltage VIN and the output voltage VOUT are compared, and when the output voltage VOUT becomes high, the MOS transistor T1 turns off to prevent sneak current from flowing from the output terminal 12 to the input terminal 11. An operational amplifier OP2 detects an overcurrent in an output current IOUT of a power supply LA based on a difference voltage between a voltage VN1 that depends on the voltage drop of the first body diode D1 and a voltage VN2 that depends on the voltage drop of a third body diode D3. [Selected Figure] FIG.

Description

This disclosure relates to an overcurrent detection circuit.

This type of overcurrent detection circuit is disclosed in, for example, Patent Document 1. In the technology described in Patent Document 1, a comparator detects the current flowing between the input/output terminals based on the terminal voltage of a shunt resistor that is connected in series between the power supply input terminal and the power supply output terminal. A switching circuit turns off a first transistor when a detected value of a current flowing from the power supply output terminal to the power supply input terminal exceeds a first detection judgment value. In addition, the switching circuit turns off a second transistor when a detected value of a current flowing from the power supply input terminal to the power supply output terminal exceeds a second detection judgment value. In other words, an overcurrent is detected by detecting the potential difference across the shunt resistor.

JP 2015-090587 A

In the technology described in Patent Document 1, the input voltage must be higher than the output voltage by at least the amount of voltage drop caused by the shunt resistor. Because heat is generated based on the current flowing through the shunt resistor, it is desirable to make the value of the power supply voltage as small as possible. However, because the shunt resistor causes a voltage drop, it was necessary to increase the power supply voltage to meet the requirements.

The objective of this disclosure is to provide an overcurrent detection circuit that can detect overcurrent without using a shunt resistor.

The invention described in claim 1 is directed to an overcurrent detection circuit for a series regulator type power supply. An output voltage control MOS transistor with a second body diode outputs power from an output terminal. An input voltage is input to the input terminal of an MOS transistor with a first body diode, and the MOS transistor is connected in series with the second body diode of the output voltage control MOS transistor in the reverse direction. An input voltage is input to a sense MOS transistor with a third body diode, and a current flows through the sense MOS transistor.

At this time, when the input voltage and output voltage are compared and the output voltage becomes higher than normal, the MOS transistor turns off to prevent leakage current from the output terminal to the input terminal. The overcurrent detection unit detects overcurrent in the output current of the power supply based on the difference voltage between the voltage that depends on the voltage drop of the first body diode of the MOS transistor and the voltage that depends on the voltage drop of the third body diode of the sense MOS transistor. This makes it possible to detect overcurrent without using a shunt resistor.

FIG. 1 is an electrical configuration diagram illustrating a first embodiment. A time chart showing changes in voltage, current, etc. in the first embodiment. FIG. 11 is an electrical configuration diagram illustrating a second embodiment. FIG. 13 is an electrical configuration diagram illustrating a third embodiment.

Below, several embodiments will be described with reference to the drawings. Configurations that perform the same or similar operations in each embodiment described below will be denoted with the same or similar reference numerals, and descriptions may be omitted as necessary.

First Embodiment
A first embodiment will be described with reference to Figures 1 and 2. A power supply circuit 1 is used, for example, in an ECU mounted on a vehicle. The power supply circuit 1 includes a series regulator type power supply LA that steps down an input voltage VIN provided through an input terminal 11 from, for example, an on-board battery, and outputs an output voltage VOUT having a desired voltage value from an output terminal 12. The steady-state value of the input voltage VIN is, for example, 12V, and the target value of the output voltage VOUT is set to 5V.

The power supply circuit 1 is composed of transistors T1 to T4, a switching circuit SW1, a comparator CP1, operational amplifiers OP1 and OP2, a reference voltage generating circuit Vref1, voltage dividing resistors R1 and R2, and constant current sources Isrc1 and Isrc2.

Transistors T1 to T3 are all composed of N-channel power MOS transistors, and body diodes D1 to D3 with the source side serving as the anode are formed as parasitic diodes between the source and drain of each transistor. Transistor T3 is composed of a transistor smaller in size than transistor T1, and is configured as a sense MOS transistor that senses a current that is dependent on and proportional to the current passing through transistor T1. By adjusting the sizes of transistors T1 and T3, the amount of voltage drop from the input voltage VIN when each of transistors T1 and T3 is off can be adjusted.

The series regulator type power supply LA is composed of an operational amplifier OP1, a transistor T2, and voltage dividing resistors R1 and R2. A reference voltage Vref is input from a reference voltage generating circuit GR to the non-inverting input terminal of the operational amplifier OP1. The gate of the transistor T2 is connected to the output of the operational amplifier OP1 and is configured as a MOS transistor for output voltage control. A second body diode D2 is attached to the transistor T2. The second body diode D2 is configured with the output terminal 12 side as the anode and the drain node N1 as the cathode.

The source of the transistor T2 is connected to the output terminal 12 that outputs the output voltage VOUT. Voltage-dividing resistors R1 and R2 are connected between the source of the transistor T2 and the ground node, and the voltage at the common connection point of the voltage-dividing resistors R1 and R2 is fed back to the inverting input terminal of the operational amplifier OP1. The transistor T2 forms a negative feedback loop for the operational amplifier OP1 and controls the output voltage VOUT.

Transistor T1 is composed of a MOS transistor with a first body diode D1 attached, and input voltage VIN is input to its source from input terminal 11. The drains of transistors T1 and T2 are a common node. The first body diode D1 is connected in series with the second body diode D2 of transistor T2 in the opposite directions.

Specifically, the first body diode D1 of the transistor T1 is configured with the input terminal 11 side as the anode and the output terminal 12 side as the cathode. The second body diode D2 of the transistor T2 is configured with the output terminal 12 side as the anode and the input terminal 11 side as the cathode. The drain common connection point of the transistors T1 and T2 is the node N1.

Node N1 is connected to the inverting input terminal of operational amplifier OP2 and to constant current source Isrc1, which is configured to draw a constant current from node N1 to the ground node. A resistor may be used in place of constant current source Isrc1. This applies a voltage VN1, which serves as a reference for overvoltage detection, to node N1, the inverting input terminal of operational amplifier OP2.

The source-drain of transistor T3 and constant current source Isrc2 are connected between input terminal 11, which inputs input voltage VIN, and the ground node. Transistor T3 is a MOS transistor that inputs input voltage VIN to its source and through which the current of constant current source Isrc2 flows, and is equipped with a third body diode D3.

The common connection point between the drain of transistor T3 and the constant current source Isrc2 is node N2, and the third body diode D3 is configured with the source on the input terminal 11 side as the anode and node N2 as the cathode. The constant current source Isrc2 is configured to draw a constant current from node N2 to the ground node.

Node N2 is connected to the non-inverting input terminal of operational amplifier OP2. The output of operational amplifier OP2 is connected to the gate of transistor T4. The drain of transistor T4 is connected to the gate of transistor T2, and the source is connected to the ground node. Transistor T4 is an N-channel MOS transistor, and is provided as an adjustment transistor that adjusts the gate voltage of transistor T2.

The operational amplifier OP2 operates as an amplifier, and feedback is provided to the power supply LA to perform negative feedback operation. If the voltage VN2 at node N2 becomes higher than the voltage VN1 at node N1 and the output of the operational amplifier OP2 becomes higher, the drain current of the transistor T4 increases, and the gate voltage of the transistor T2 can be reduced. This allows the output current IOUT to be reduced. Conversely, if the voltage VN2 at node N2 becomes lower than the voltage VN1 at node N1 and the output of the operational amplifier OP2 becomes lower, the drain current of the transistor T4 decreases, and the gate voltage of the transistor T2 can be increased. This allows the output current IOUT to be increased. The power supply LA can control the current value of the output current IOUT to be constant. The operational amplifier OP2 and the transistor T4 function as an abnormal operation protection circuit, and the operational amplifier OP2 is configured as an overcurrent detection unit that detects an overcurrent of the output current IOUT flowing out from the output terminal 12.

The gates of transistors T1 and T3 are commonly connected, and switching circuit SW1 is configured to switch between inputting an on-voltage Von or an off-voltage Voff to the gates of transistors T1 and T3.

Comparator CP1 is configured to input the input voltage VIN to the non-inverting input terminal and the output voltage VOUT to the inverting input terminal. Switching circuit SW1 switches between inputting the on voltage Von or the off voltage Voff to the gates of transistors T1 and T3 based on the output of comparator CP1.

When the output of comparator CP1 is at H level, switching circuit SW1 outputs on voltage Von, and when the output is at L level, it outputs off voltage Voff. When switching circuit SW1 outputs on voltage Von, transistor T1 is turned on. When switching circuit SW1 outputs off voltage Voff, transistor T1 is turned off.

The following describes the monitoring operation of the input voltage VIN, the output voltage VOUT, and the output current IOUT. The comparator CP1 compares the input voltage VIN and the output voltage VOUT, and the switching circuit SW1 outputs the on-voltage Von or the off-voltage Voff to the gates of the transistors T1 and T3 according to the comparison result of the comparator CP1.

The output terminal 12 of the power supply LA is led to the outside of the ECU, for example, through a wire. For this reason, there is a possibility that the wire may short out to a high-voltage or low-voltage part present outside. During normal operation, the relationship of target value of output voltage VOUT < steady-state value of input voltage VIN is satisfied. At this time, transistor T1 remains in the on state.

For example, if the wiring of the output terminal 12 is shorted to an external high-voltage part, the input voltage VIN becomes smaller than the output voltage VOUT. Since the output voltage VOUT becomes higher than the input voltage VIN, the switching circuit SW1 outputs the off voltage Voff and the transistor T1 is turned off.

Even if the voltage at node N1 becomes higher than the voltage at input terminal 11 when transistor T1 is turned off, the current flow through first body diode D1 can be cut off, and leakage from output terminal 12 to input terminal 11 can be prevented. In other words, first body diode D1 is provided to prevent leakage of current from the drain side of transistor T2 to input terminal 11 of input voltage VIN when output voltage VOUT is higher than input voltage VIN.

Next, referring to FIG. 2, we will explain the overcurrent detection operation of the output current IOUT when the output terminal 12 is shorted to an external low-voltage part. FIG. 2 shows an enlarged schematic diagram of the transient operation. Please note that this is a diagram for explaining the operating principle, and the actual waveforms may differ.

While the power supply LA is outputting the output voltage VOUT, the operational amplifier OP2 compares a voltage VN1 that depends on the voltage drop across the first body diode D1 of the transistor T1 with a voltage VN2 that depends on the voltage drop across the third body diode D3 of the transistor T3.

Transistor T2 operates normally, but if the output terminal 12 shorts out to the low-voltage part due to some influence, an overcurrent will flow from the input terminal 11 to the output terminal 12 through transistors T1 and T2.

As more current flows toward the output terminal 12, the voltage VN1 at node N1 decreases. When the output current IOUT reaches the overcurrent detection threshold Ith, the voltage drop across transistor T1 increases, causing the voltage VN1 at node N1 to become smaller than the voltage VN2 at node N2.

As a result, at timing t2 in FIG. 2, the output of operational amplifier OP2 is fed back to the gate of transistor T4, and the drain voltage of transistor T4 is adjusted. By adjusting the gate input voltage of transistor T2, the output current IOUT can be controlled. This makes it possible to prevent the output current IOUT from becoming an overcurrent.

<Summary of Comparative Example and Present Embodiment>
Conventionally, there has been a method of detecting an overcurrent by inserting a shunt resistor, but this is not preferable because it requires a high power supply voltage.

According to this embodiment, the input voltage VIN is compared with the output voltage VOUT, and a transistor T1 is provided to prevent leakage from the output terminal 12 to the input terminal 11 when the output voltage VOUT becomes high. The operational amplifier OP2 detects an overcurrent in the output current IOUT of the power supply LA based on the difference voltage between the voltage VN1 that depends on the voltage drop of the first body diode D1 of the transistor T1 and the voltage VN2 that depends on the voltage drop of the third body diode D3 of the transistor T3. This makes it possible to detect an overcurrent without inserting a shunt resistor, eliminating the need to increase the power supply voltage.

Second Embodiment
The second embodiment will be described with reference to FIG.
The power supply circuit 21, which replaces the power supply circuit 1, includes a switch SW2 at the output of the operational amplifier OP2. Other configurations of the power supply circuit 21 are the same as those of the power supply circuit 1, so description thereof will be omitted. The switch SW2 is configured to use the output of the operational amplifier OP2 as a control signal, and applies an on-voltage Von2/off-voltage Voff2 to the transistor T4 to limit the current flowing through the transistor T2, thereby limiting the function of the power supply LA.

When the output of the operational amplifier OP2 is at a low level, the normal state is established, the switch SW2 outputs the off voltage Voff2, and the transistor T4 maintains its off state. Conversely, when the output of the operational amplifier OP2 is at a high level, the switch SW2 outputs the on voltage Von2, and the transistor T4 is in the fully on state. The gate voltage of the transistor T2 becomes zero, so the transistor T2 is turned off.

This allows the output current IOUT and output voltage VOUT to be cut off. According to this embodiment, a switch SW2 is provided at the output of the operational amplifier OP2, and the switch SW2 shapes the waveform and applies an on voltage Von2/off voltage Voff2 to the gate of the transistor T4. This allows the transistor T2 to be stably turned off without being affected as much as possible by the output characteristics of the operational amplifier OP2. This provides the same effects as the previous embodiment.

Third Embodiment
The third embodiment will be described with reference to FIG.
A power supply circuit 31 replacing the power supply circuits 1 and 21 includes NPN bipolar transistors NPN1 and NPN2 and PNP bipolar transistors PNP1 and PNP2.

The bipolar transistors NPN1 and PNP1 are diode-connected by connecting their bases and collectors. These diode-connected bipolar transistors NPN1 and PNP1 are forward-connected between the common drain node of transistors T1 and T2 and node N1 to form a level shift circuit LV1. The level shift circuit LV1 shifts the level of the voltage at the common drain node of transistors T1 and T2 by twice the forward voltage Vf, and inputs it as voltage VN1 to the inverting input terminal of the operational amplifier OP2.

The bipolar transistors NPN2 and PNP2 are diode-connected by connecting their bases and collectors. These diode-connected bipolar transistors NPN2 and PNP2 are forward-connected between the drain node of transistor T3 and node N2 to form a level shift circuit LV2. The level shift circuit LV2 shifts the voltage of the drain node of transistor T3 by twice the forward voltage Vf, and inputs it as voltage VN2 to the non-inverting input terminal of the operational amplifier OP2.

As a result, the operational amplifier OP2 can compare voltages VN1 and VN2 that have been level-shifted by the same voltage by the level shift circuits LV1 and LV2, respectively. According to this embodiment, by providing the level shift circuits LV1 and LV2, each voltage can be adjusted to match the input voltage of the operational amplifier OP2. This has the effect of preventing backflow of current to the input nodes N1 and N2 of the operational amplifier OP2.

Other Embodiments
The present disclosure is not limited to the above-described embodiment, and for example, the following modifications or extensions are possible.
Although the embodiment has been shown in which the transistor T2 is turned off by the transistor T4 being turned on when an overcurrent is detected, the transistor T2 does not necessarily have to be turned off. The gate voltage of the transistor T2 may be lowered to reduce the current flowing between the drain and source of the transistor T2, thereby reducing the overcurrent. Resistors and resistive elements may be used instead of the constant current sources Isrc1 and Irc2. This is because it is sufficient to pass a current.

Although the present disclosure has been described with reference to an embodiment, it is understood that the present disclosure is not limited to the embodiment or structure. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

In the drawing, OP2 indicates an operational amplifier (overcurrent detection unit), T1 indicates a transistor (MOS transistor), D1 indicates a first body diode, T2 indicates a transistor (MOS transistor for controlling output voltage), D2 indicates a second body diode, T3 indicates a transistor (sense MOS transistor), D3 indicates a third body diode, T4 indicates a transistor (adjustment transistor), and SW2 indicates a switch.

Claims (2)

An overcurrent detection circuit for a series regulator type power supply,
an output voltage control MOS transistor (T2) with a second body diode (D2) for outputting the power supply from an output terminal;
a MOS transistor (T1) which receives an input voltage from an input terminal and has a first body diode (D1) connected in series in the opposite directions to the second body diode (D2) of the output voltage control MOS transistor;
a sense MOS transistor (T3) having a third body diode (D3) through which a current flows when the input voltage is input;
The input voltage and the output voltage are compared, and when the output voltage becomes higher, the MOS transistor (T1) is turned off to prevent sneak current from the output terminal to the input terminal,
an overcurrent detection circuit comprising: an overcurrent detection unit (OP2) that detects an overcurrent in the output current of the power supply based on a differential voltage between a voltage (VN1) that depends on a voltage drop of a first body diode of the MOS transistor (T1) and a voltage (VN2) that depends on a voltage drop of a third body diode of the sense MOS transistor (T3). The overcurrent detection unit is configured with a comparator,
an adjustment transistor (T4) for adjusting the gate voltage of the output voltage control MOS transistor;
a switch (SW2) using the output of the comparator as a control signal;
2. The overcurrent detection circuit according to claim 1, wherein the function of the power supply is restricted by applying an on-voltage/off-voltage to the adjustment transistor by the switch to restrict a current flowing through the output voltage control MOS transistor (T2).

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