JP2024061069A - Signal output device and resistance measuring device - Google Patents

Abstract

[Problem] To suppress an increase in manufacturing costs. [Solution] The device includes a constant current control unit 3 that outputs a current control signal Sic, a variable power supply unit 4p that varies a power supply voltage +Vcc to output a supply voltage +Vc, a variable power supply unit 4m that varies a power supply voltage -Vcc to output a supply voltage -Vc, FETs 5p, 5m that amplify the current control signal Sic to output constant currents Ip, Im, a voltage control unit 6p that controls the variable power supply unit 4p so that the supply voltage +Vc is higher than the voltage value of the source of the FET 5p, and a voltage control unit 6m that controls the variable power supply unit 4m so that the supply voltage -Vc is lower than the voltage value of the source of the FET 5m, the voltage control unit 6p controls the variable power supply unit 4p so that the drain voltage of the FET 5p is higher than the source voltage by a predetermined voltage value, and the voltage control unit 6m controls the variable power supply unit 4m so that the drain voltage of the FET 5m is lower than the source voltage by a predetermined voltage value. [Selected Figure] Figure 1

Description

The present invention relates to a signal output device configured to be capable of outputting either a positive output signal or a negative output signal to a load, and a resistance measuring device equipped with such a signal output device and capable of measuring the resistance value of an object to be measured.

As a signal output device of this type, the current output device disclosed in the following patent document (hereinafter also referred to as "current output device 1X") is known. As shown in FIG. 7, this current output device 1X is configured with a differential amplifier OPX, a transistor TRX (semiconductor element), a FET2X, resistors Ra, Rb, Rs1, and a voltage control unit VCX.

In this current output device 1X, the differential amplifier OPX outputs to the base of the transistor TRX a differential signal between the voltage value of the input signal Vs input from the outside to the non-inverting input terminal and the feedback voltage Vf input to the inverting input terminal. The transistor TRX also amplifies the differential signal using the stepped-down voltage Vc input to the collector, and outputs a constant load current IL to the external load RL. As a result, the voltage of the emitter of the transistor TRX becomes the load voltage VL. At this time, the voltage control unit VCX steps down the power supply voltage Vdd supplied from the power supply, and outputs it to the collector of the transistor TRX as the stepped-down voltage Vc. The resistors Ra and Rb also generate a reference voltage Vref (=α×Vc+β×ID) proportional to both the stepped-down voltage Vc output from the voltage control unit VCX and the drain current ID output from the FET2X, and output it to the voltage control unit VCX. As a result, the voltage control unit VCX controls the stepped-down voltage Vc within a range from a predetermined minimum voltage to the power supply voltage Vdd so that the value of the reference voltage Vref is kept constant.

In this case, when the collector-emitter voltage Vce (=Vc-VL) of transistor TRX increases, if the gate-source voltage of FET2X, which is equal in magnitude to this potential difference (Vc-VL), exceeds the threshold voltage Vth of FET2X, the drain current ID flows, and the reference voltage Vref increases.

On the other hand, the voltage control unit VCX controls the voltage Vc so that the value of the reference voltage Vref is kept constant, and therefore reduces the voltage Vc when the drain current ID flows. This suppresses the rise in the collector-emitter voltage Vce (Vc-VL) of the transistor TRX. Therefore, with this current output device 1X, even when the input signal Vs is large and the external load RL is small, the rise in the collector-emitter voltage Vce (=Vc-VL) of the transistor TRX is suppressed, and the rise in the power consumption of the transistor TRX, expressed as (Vc-VL) x IL, is suppressed.

Japanese Patent No. 6257536 (pages 5-11, Figure 4)

However, the above current output device 1X has the following problems. Specifically, in the current output device 1X, in order to suppress an increase in the power consumption of the transistor TRX, the voltage control unit VCX controls the voltage value of the stepped-down voltage Vc in the range from a predetermined minimum voltage to the power supply voltage Vdd so that the value of the reference voltage Vref is kept constant. On the other hand, the power consumption of the transistor TRX is expressed as (Vc-VL) x IL. Therefore, even if the value of the reference voltage Vref is kept constant, when the stepped-down voltage Vc, which is the collector voltage of the transistor TRX, rises, the power consumption of the transistor TRX increases in response to the rise. In this case, in the above current output device 1X, although the rise in the collector-emitter voltage Vce (=Vc-VL) of the transistor TRX is suppressed, the collector-emitter voltage Vce of the transistor TRX still increases in response to the rise in the load current IL. Therefore, in order to prevent the transistor TRX from catching fire or breaking down due to increased power consumption of the transistor TRX, this current output device 1X must use a transistor with a large rated loss as the transistor TRX, connect multiple transistors in parallel, and use a large heat sink, which causes the problem of increased manufacturing costs for the device.

The stepped-down voltage Vc input to the collector of transistor TRX is expressed as (reference voltage Vref/α-β/α×ID). Here, reference voltage Vref is a constant value, and α and β are constant values determined by the resistance values of resistors Ra and Rb. Therefore, the voltage value of the stepped-down voltage Vc is determined by the current value of drain current ID flowing through FET2X and the resistance values of resistors Ra and Rb. In this case, the current value of drain current ID of FET2X changes depending on the gate-source voltage of FET2X, but even if the gate-source voltage is the same, it changes greatly depending on the individual characteristics of FET2X. In other words, the voltage value of the stepped-down voltage Vc changes greatly depending on the resistance values of resistors Ra and Rb and the individual characteristics of FET2X. For this reason, when attempting to uniformly reduce the power consumption of each current output device 1X during mass production, it is extremely cumbersome to uniformly match the resistance values of resistors Ra and Rb and the characteristics of each FET 2X, resulting in an increase in the manufacturing costs of the device.

The present invention has been made in consideration of these problems, and aims to provide a signal output device that can suppress increases in manufacturing costs, and a resistance measurement device that is equipped with such a signal output device and measures the resistance value of a measurement object that is connected as a load.

In order to achieve the above object, the signal output device according to the present invention includes a signal value control unit that outputs a signal value control signal that controls the signal value of a positive output signal; a first variable power supply unit that varies the voltage value of a first power supply voltage of a positive voltage input in accordance with a first voltage control signal and outputs it as a first supply voltage; a first semiconductor element that amplifies the signal value control signal output from the signal value control unit using the first supply voltage and outputs it as the output signal from a current output terminal to a load; and a first voltage control unit that outputs the first voltage control signal to control the first variable power supply unit so that the voltage value of the first supply voltage follows the high and low voltage value of the current output terminal of the first semiconductor element and is a voltage value higher than the voltage value of the current output terminal. The first voltage control unit outputs the first voltage control signal to control the first variable power supply unit so that the voltage of the current input terminal to which the first supply voltage of the first semiconductor element is input is a predetermined voltage value higher than the voltage of the current output terminal of the first semiconductor element.

According to this signal output device, the first voltage control unit outputs a first voltage control signal to control the first variable power supply unit so that the voltage at the current input terminal of the first semiconductor element is higher than the voltage at the current output terminal by a predetermined voltage value, thereby making it possible to keep the voltage between the current input terminal and the current output terminal of the first semiconductor element constant at a low voltage. Therefore, according to this signal output device, the power consumption of the first semiconductor element can be reduced, and heat generation can be reduced, which allows the use of small, inexpensive FETs and transistors, and also allows the use of small, inexpensive heat sinks for dissipating heat from the FETs and transistors. Therefore, according to this signal output device, it is possible to suppress an increase in its manufacturing costs.

In addition, this signal output device eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of the first semiconductor element, thereby reducing the manufacturing costs of the device and keeping the power consumption of the first semiconductor element low when outputting an output signal to a load, without being affected by the individual characteristics of the first semiconductor element.

In order to achieve the above object, the signal output device according to the present invention includes a signal value control unit that outputs a signal value control signal that controls the signal value of a negative polarity output signal, a second variable power supply unit that varies the voltage value of an input second power supply voltage of a negative voltage according to a second voltage control signal and outputs it as a second supply voltage, a second semiconductor element that amplifies the signal value control signal output from the signal value control unit using the second supply voltage and outputs it to a load from a current output terminal as the output signal, and a second voltage control unit that outputs the second voltage control signal to control the second variable power supply unit so that the voltage value of the second supply voltage follows the high and low voltage value of the current output terminal of the second semiconductor element and is a voltage value lower than the voltage value of the current output terminal, and the second voltage control unit outputs the second voltage control signal to control the second variable power supply unit so that the voltage of the current input terminal to which the second supply voltage of the second semiconductor element is input is a voltage value lower than the voltage of the current output terminal of the second semiconductor element by a predetermined voltage value.

According to this signal output device, the second voltage control unit outputs a second voltage control signal to control the second variable power supply unit so that the voltage at the current input terminal of the second semiconductor element is lower than the voltage at the current output terminal by a predetermined voltage value, thereby making it possible to keep the voltage between the current input terminal and the current output terminal of the second semiconductor element constant at a low voltage. Therefore, according to this signal output device, the power consumption of the second semiconductor element can be reduced, and heat generation can be reduced, which allows the use of small, inexpensive FETs and transistors, and also allows the use of small, inexpensive heat sinks for dissipating heat from the FETs and transistors. Therefore, according to this signal output device, it is possible to suppress an increase in its manufacturing costs.

In addition, this signal output device eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of the second semiconductor element, thereby reducing the manufacturing costs of the device and keeping the power consumption of the second semiconductor element low when outputting an output signal to a load, without being affected by the individual characteristics of the second semiconductor element.

In order to achieve the above object, the signal output device according to the present invention includes a signal value control unit that outputs a signal value control signal for controlling the signal value of either one of a positive output signal and a negative output signal; a first variable power supply unit that varies the voltage value of a first power supply voltage of an input positive voltage in accordance with a first voltage control signal and outputs it as a first supply voltage; a second variable power supply unit that varies the voltage value of a second power supply voltage of an input negative voltage in accordance with a second voltage control signal and outputs it as a second supply voltage; a first semiconductor element that operates when a signal value control signal that specifies the signal value of the positive output signal is output from the signal value control unit, amplifies the signal value control signal output from the signal value control unit using the first supply voltage, and outputs it from a current output terminal to a load as the positive output signal; a second semiconductor element that operates when a signal value control signal that specifies the signal value of the negative output signal is output from the signal value control unit, amplifies the signal value control signal output from the signal value control unit using the second supply voltage, and outputs it from a current output terminal to the load as the negative output signal; a first voltage control unit which outputs the first voltage control signal to control the first variable power supply unit so that a voltage value of the second supply voltage follows the voltage value of the current output terminal of the first semiconductor element and is higher than the voltage value of the current output terminal; and a second voltage control unit which outputs the second voltage control signal to control the second variable power supply unit so that a voltage value of the second supply voltage follows the voltage value of the current output terminal of the second semiconductor element and is lower than the voltage value of the current output terminal, and the first voltage control unit The first voltage control signal is output to control the first variable power supply unit so that the voltage of the current input terminal to which the first supply voltage of the first semiconductor element is input is a predetermined voltage value higher than the voltage of the current output terminal of the first semiconductor element, and the second voltage control unit is output to control the second variable power supply unit so that the voltage of the current input terminal to which the second supply voltage of the second semiconductor element is input is a predetermined voltage value lower than the voltage of the current output terminal of the second semiconductor element.

According to this signal output device, the first voltage control unit outputs a first voltage control signal to control the first variable power supply unit so that the voltage of the current input terminal of the first semiconductor element is higher than the voltage of the current output terminal by a predetermined voltage value, and the second voltage control unit outputs a second voltage control signal to control the second variable power supply unit so that the voltage of the current input terminal of the second semiconductor element is lower than the voltage of the current output terminal by a predetermined voltage value, thereby making it possible to keep the voltage between the current input terminal and the current output terminal of the first semiconductor element and the second semiconductor element constant at a low voltage. Therefore, according to this signal output device, the power consumption of the first semiconductor element and the second semiconductor element can be reduced, and heat generation can be reduced, which allows the use of small and inexpensive FETs and transistors, and allows the use of small and inexpensive heat sinks for heat dissipation of the FETs and transistors. Therefore, according to this signal output device, it is possible to suppress an increase in its manufacturing cost.

In addition, this signal output device eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of the first and second semiconductor elements, thereby reducing the manufacturing costs of the device and keeping the power consumption of the first and second semiconductor elements low when outputting an output signal to a load, without being affected by the individual characteristics of the first and second semiconductor elements.

In addition, the signal output device according to the present invention is configured such that the first voltage control section includes a first differential amplifier circuit that inputs the voltage of the current output terminal of the first semiconductor element to an inverting input terminal and inputs a reference potential to a non-inverting input terminal via a resistor, and outputs a differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as the first voltage control signal from an output terminal to control the first variable power supply section, and a voltage regulation circuit that is disposed between the current input terminal of the first semiconductor element and the non-inverting input terminal of the first differential amplifier circuit and regulates the voltage of the current input terminal to be a predetermined voltage value higher than the voltage of the non-inverting input terminal.

According to this signal output device, the first differential amplifier circuit of the first voltage control unit inputs the voltage of the current output terminal of the first semiconductor element to the inverting input terminal and inputs a reference potential to the non-inverting input terminal, and outputs the difference voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a first voltage control signal from the output terminal to control the first variable power supply unit, and the voltage regulation circuit regulates the voltage of the current input terminal of the first semiconductor element to be higher than the voltage of the non-inverting input terminal by a predetermined voltage value, thereby regulating the voltage between the current input terminal and the current output terminal of the first semiconductor element to a constant value despite the simple configuration. Therefore, according to this signal output device, it is possible to suppress the increase in manufacturing costs while suppressing heat generation, and as a result, it is possible to use small and inexpensive FETs and transistors, and to use small and inexpensive heat sinks for heat dissipation of the FETs and transistors.

In addition, the signal output device according to the present invention is configured such that the second voltage control section includes a second differential amplifier circuit that inputs the voltage of the current output terminal of the second semiconductor element to an inverting input terminal and inputs a reference potential to a non-inverting input terminal via a resistor, and outputs a differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as the second voltage control signal from an output terminal to control the second variable power supply section, and a voltage regulation circuit that is disposed between the current input terminal of the second semiconductor element and the non-inverting input terminal of the second differential amplifier circuit and regulates the voltage of the current input terminal to be a predetermined voltage value lower than the voltage of the non-inverting input terminal.

According to this signal output device, the second differential amplifier circuit of the second voltage control section inputs the voltage of the current output terminal of the second semiconductor element to the inverting input terminal and inputs a reference potential to the non-inverting input terminal, and outputs the difference voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a second voltage control signal from the output terminal to control the second variable power supply section, and the voltage regulation circuit regulates the voltage of the current input terminal of the second semiconductor element to be lower than the voltage of the non-inverting input terminal by a voltage value that is regulated in advance, thereby regulating the voltage between the current input terminal and the current output terminal of the second semiconductor element to a constant value despite the simple configuration. Therefore, according to this signal output device, it is possible to suppress the increase in manufacturing costs while suppressing heat generation, and as a result, it is possible to use small and inexpensive FETs and transistors, and to use small and inexpensive heat sinks for heat dissipation of the FETs and transistors.

In addition, with this signal output device, the voltage regulation circuit is configured with diodes, so that the voltage between the current input terminal and the current output terminal of the first semiconductor element and the second semiconductor element can be regulated to a constant value with a simple configuration. Therefore, with this signal output device, it is possible to suppress increases in manufacturing costs.

To achieve the above object, the resistance measuring device of the present invention includes the above signal output device and a measuring unit that supplies the output signal to a measurement target as the load and measures the resistance value of the measurement target based on the voltage generated across both ends of the measurement target and the current value of the output signal flowing through the load.

This resistance measuring device allows the signal output device to be constructed simply and inexpensively, so the resistance measuring device can be constructed simply and inexpensively.

The signal output device of the present invention can reduce the power consumption of the first semiconductor element and the second semiconductor element, which reduces heat generation. As a result, small, inexpensive FETs and transistors can be used, and small, inexpensive heat sinks can be used to dissipate heat from the FETs and transistors. This makes it possible to suppress increases in the manufacturing costs of the signal output device and, ultimately, the resistance measuring device.

1 is a diagram showing a configuration of a resistance measuring device 100. FIG. FIG. 2 is a diagram showing the configuration of a resistance measuring device 100A. FIG. 2 is a diagram showing the configuration of a resistance measuring device 100B. FIG. 2 is a diagram showing the configuration of a resistance measuring device 100C. FIG. 2 is a diagram showing the configuration of a resistance measuring device 100D. FIG. 2 is a diagram showing the configuration of a resistance measuring device 100E. FIG. 1 is a diagram showing a configuration of a conventional current output device 1X.

Below, an embodiment of the signal output device and resistance measurement device will be described with reference to the attached drawings.

First, a resistance measuring device 100 will be described as a first embodiment. The resistance measuring device 100 shown in FIG. 1 is an example of a "resistance measuring device" that includes a "signal output device (in this example, a current output device 1)" and is configured to be able to measure, for example, the resistance value of a resistor Rt (an example of an object to be measured) as a load. Specifically, the resistance measuring device 100 includes a current output device 1, a measuring unit 2, and measurement probes PR1 to PR4.

The current output device 1 includes a constant current control unit 3, variable power supply units 4p, 4m, FETs 5p, 5m, a bias resistor Rb for the FETs 5p, 5m, voltage control units 6p, 6m, a cutoff circuit 7, an output unit 8, and a processing unit 9, and outputs either a positive constant current Ip as a positive output signal or a negative constant current Im as a negative output signal (hereinafter, when no distinction is made, this is also referred to as "constant current I (constant current signal)") to resistor Rt via probes PR1 and PR2.

The constant current control unit 3 is configured to be able to output a current control signal Sic (signal value control signal) that controls (specifies) the current value (an example of a signal value) of the constant current I of either positive or negative polarity. Specifically, the constant current control unit 3 includes voltage sources Bp and Bm, an operational amplifier OP1, a switch SW1, and a reference resistor R1. Here, the voltage source Bp functions as a voltage source that outputs a positive voltage for controlling (specifying) the current value of the positive constant current Ip. The voltage source Bm functions as a voltage source that outputs a negative voltage for controlling (specifying) the current value of the negative constant current Im. In this example, as an example, it is assumed that a constant current I of 1A of positive polarity or 1A of negative polarity is output from the current output device 1, and a type with an output voltage of +1V is used as the voltage source Bp and can be connected to the non-inverting input terminal of the operational amplifier OP1 with a positive polarity, and a type with an output voltage of +1V is used as the voltage source Bm and can be connected to the non-inverting input terminal of the operational amplifier OP1 with a negative polarity. In addition, as the voltage sources Bp and Bm, not only voltage sources with a fixed output voltage, but also voltage sources with a variable output voltage can be used.

The operational amplifier OP1 functions as a differential amplifier, and outputs the differential voltage between the voltage Vp at the non-inverting input terminal and the voltage Vm at the inverting input terminal as a current control signal Sic. The output voltage of one of the voltage sources Bp and Bm is input as the voltage Vp to the non-inverting input terminal of the operational amplifier OP1, and the feedback voltage Vf generated in the resistor R1 is input as the voltage Vm to the inverting input terminal of the operational amplifier OP1. In this case, for example, when a positive constant current of +1A is output from the current output device 1 as the constant current Ip, the resistance value of the resistor R1 is set to 1Ω, and a voltage Vp of +1V is supplied from the voltage source Bp to the non-inverting input terminal of the operational amplifier OP1. At this time, the voltage value of the feedback voltage Vf generated across the resistor R1 is +1V (1Ω x current value of the constant current Ip), which is approximately equal to the voltage value of the non-inverting input terminal of the operational amplifier OP1. On the other hand, for example, when a negative constant current of 1 A is output from the current output device 1 as the constant current Im, a voltage Vm of -1 V is supplied from a voltage source Bm to the non-inverting input terminal of the operational amplifier OP1 with the resistance value of the resistor R1 set to 1 Ω. At this time, the voltage value of the feedback voltage Vf generated across the resistor R1 becomes -1 V (1 Ω × the current value of the constant current Im), which is approximately equal to the voltage value of the non-inverting input terminal of the operational amplifier OP1. The switch SW1 is controlled by the processing unit 9, and when a positive constant current Ip is output from the current output device 1, the movable contact is brought into contact with the fixed contact on the voltage source Bp side, causing the positive voltage (+1V) of the voltage source Bp to be output as voltage Vp to the non-inverting input terminal of the operational amplifier OP1, and when a negative constant current Im is output from the current output device 1, the movable contact is brought into contact with the fixed contact on the voltage source Bm side, causing the negative voltage (-1V) of the voltage source Bm to be output as voltage Vp to the non-inverting input terminal of the operational amplifier OP1.

The variable power supply unit 4p corresponds to the first variable power supply unit, and is composed of a step-down converter. It varies the voltage value of the input positive voltage power supply voltage +Vcc (first power supply voltage: for example, 15 V) by stepping down (reducing the absolute value of the voltage value) according to the voltage control signal Svcp (first voltage control signal), and outputs it to the drain of the FET 5p as the supply voltage +Vc (first supply voltage). The variable power supply unit 4p also outputs a voltage signal Sp indicating the voltage value of the supply voltage +Vc to the processing unit 9. The variable power supply unit 4m corresponds to the second variable power supply unit, and is composed of a step-down converter. It varies the voltage value of the input negative voltage power supply voltage -Vcc (second power supply voltage: for example, -15 V) by stepping down (reducing the absolute value of the voltage value) according to the voltage control signal Svcm (second voltage control signal), and outputs it to the drain of the FET 5m as the supply voltage -Vc (second supply voltage). Additionally, the variable power supply unit 4m outputs a voltage signal Sm indicating the voltage value of the supply voltage -Vc to the processing unit 9. In this example, the variable power supplies 4p and 4m are configured as step-down converters, but they can also be configured as step-up converters to boost the power supply voltages +Vcc and -Vcc (increase the absolute value of the voltage value) to generate the supply voltages +Vc and -Vc.

FET5p is a first semiconductor element using an n-channel FET, and is activated when a positive voltage current control signal Sic that controls the current value of the positive constant current Ip is output from the constant current control unit 3, amplifying the current control signal Sic using the supply voltage +Vc output from the variable power supply unit 4p and outputting it from the source (current output terminal) to the resistor Rt as a positive constant current Ip. FET5m is a second semiconductor element using a p-channel FET, and is activated when a negative voltage current control signal Sic that controls the current value of the negative constant current Im is output from the constant current control unit 3, amplifying the current control signal Sic using the supply voltage -Vc output from the variable power supply unit 4m and outputting it from the source (current output terminal) to the resistor Rt as a negative constant negative current Im.

The voltage control unit 6p functions as a first voltage control unit, and outputs a voltage control signal Svcp to control the variable power supply unit 4p so that the voltage value of the supply voltage +Vc follows the high and low voltage value of the source of the FET 5p and is higher than the voltage value of the source. Specifically, the voltage control unit 6p outputs a voltage control signal Svcp to control the variable power supply unit 4p so that the voltage of the drain (current input terminal) to which the supply voltage +Vc of the FET 5p is input is higher than the source voltage by a predetermined voltage value. More specifically, the voltage control unit 6p is configured to include an operational amplifier OPp, a diode Dp, and a resistor Rp.

The operational amplifier OPp functions as a first differential amplifier circuit, inputting the voltage (voltage at the high potential terminal of the resistor Rt: also the voltage of the probe PR1) of the source of the FET 5p (current output terminal for the positive constant current Ip) to the inverting input terminal and inputting a reference potential (in this example, the potential of ground G) to the non-inverting input terminal via the resistor Rp, outputting the difference voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal (reference potential) as a voltage control signal Svcp from the output terminal to control the variable power supply unit 4p. The diode Dp also functions as a voltage regulation circuit, and is disposed between the drain (current input terminal) of the FET 5p to which the supply voltage +Vc is input and the non-inverting input terminal of the operational amplifier OPp in such a direction that a current flows from the drain of the FET 5p to the non-inverting input terminal of the operational amplifier OPp (with the cathode connected to the non-inverting input terminal of the operational amplifier OPp). This diode Dp regulates the drain voltage (supply voltage + Vc) of FET 5p to be a predetermined voltage value (in this example, the voltage value of the forward voltage of diode Dp) higher than the voltage of the non-inverting input terminal of operational amplifier OPp. In this case, since the voltages of the non-inverting input terminal and the inverting input terminal of operational amplifier OPp are equal, diode Dp regulates the drain voltage (supply voltage + Vc) of FET 5p to be a predetermined voltage value (in this example, the voltage value of the forward voltage of diode Dp) higher than the source voltage of FET 5p (output voltage Vo, which is the voltage applied to resistor Rt).

The voltage control unit 6m functions as a second voltage control unit, and outputs a voltage control signal Svcm to control the variable power supply unit 4m so that the voltage value of the supply voltage -Vc follows the high and low voltage value of the source of the FET 5m and is a voltage value lower than the voltage value of the source. Specifically, the voltage control unit 6m outputs a voltage control signal Svcm to control the variable power supply unit 4m so that the voltage of the drain (current input terminal) to which the supply voltage -Vc of the FET 5m is input is a predetermined voltage value lower than the source voltage. More specifically, the voltage control unit 6m is configured with an operational amplifier OPm, a diode Dm, and a resistor Rm.

The operational amplifier OPm functions as a second differential amplifier circuit, inputting the voltage at the source of the FET 5m (current output terminal for the negative constant current Im) (the voltage at the low potential terminal of the resistor Rt: also the voltage of the probe PR1) to the inverting input terminal and inputting a reference potential (in this example, the potential of ground G) to the non-inverting input terminal via the resistor Rm, and outputting the differential voltage between the voltage at the inverting input terminal and the voltage at the non-inverting input terminal (reference potential) as a voltage control signal Svcm from the output terminal to control the variable power supply unit 4m. The diode Dm also functions as a voltage regulation circuit, and is disposed between the drain (current input terminal) of the FET 5m to which the supply voltage -Vc is input and the non-inverting input terminal of the operational amplifier OPm in a direction in which a current flows from the non-inverting input terminal of the operational amplifier OPm to the drain of the FET 5m (in a direction in which the cathode is connected to the drain of the FET 5m). This diode Dm regulates the drain voltage (supply voltage -Vc) of FET5m to be a predetermined voltage value (in this example, the voltage value of the forward voltage of diode Dm) lower than the voltage of the non-inverting input terminal of operational amplifier OPm. In this case, since the voltages of the non-inverting input terminal and the inverting input terminal of operational amplifier OPm are equal, diode Dm regulates the drain voltage (supply voltage -Vc) of FET5m to be a predetermined voltage value (in this example, the voltage value of the forward voltage of diode Dm) lower than the source voltage (output voltage Vo) of FET5m.

The interruption circuit 7 functions as an interruption section and is configured with a switch SW2. In this case, the switch SW2 is disposed between a connection point P1 of the sources of FET 5p and FET 5m and a resistor Rt (also a probe PR1), and interrupts the connection between the connection point P1 (i.e., the sources which are the current output terminals of FETs 5p and 5m) and the resistor Rt according to an interruption control signal Sc output from the processing section 9. The switch SW2 is configured with semiconductor elements such as FETs and transistors, and relays.

The output unit 8 is, for example, configured with a display device such as a liquid crystal panel or an organic EL panel, and inputs display data Dd including data indicating the resistance value of resistor Rt output from the processing unit 9 and data indicating the details of the cutoff control for the cutoff circuit 7, and displays the resistance value of resistor Rt and the cutoff control state for the cutoff circuit 7 on the screen. Note that instead of a display device, the output unit 8 can also be configured with an interface device that performs data communication with an external device and outputs the display data Dd to this external device.

The processing unit 9 executes various controls in the resistance measuring device 100. Specifically, when measuring the resistance value of the resistor Rt, the processing unit 9 executes switching control for the switch SW1, display control for the output unit 8, and cutoff control for the cutoff circuit 7. Specifically, when outputting a positive constant current Ip during switching control, the processing unit 9 controls the switch SW1 so that the output voltage of the voltage source Bp is input as voltage Vp to the non-inverting input terminal of the operational amplifier OP1, and when outputting a negative constant current Im, controls the switch SW1 so that the output voltage of the voltage source Bm is input as voltage Vp to the non-inverting input terminal of the operational amplifier OP1. In addition, during display control, the processing unit 9 outputs display data Dd to the output unit 8 to display the resistance value of the resistor Rt and the cutoff control state of the cutoff circuit 7 (on/off state of the switch SW2) on the screen.

During cut-off control, when the constant current control unit 3 outputs a current control signal Sic for controlling the current value of the positive constant current Ip, the processing unit 9 monitors the voltage value of the supply voltage +Vc output from the variable power supply unit 4p based on the voltage signal Sp, and when the voltage value of the supply voltage +Vc falls below a predefined first threshold voltage (in this example, +1V), outputs a cut-off control signal Sc to the cut-off circuit 7 to turn off the switch SW2, thereby cutting off the connection between the connection point P1 and the resistor Rt. During cut-off control, when the constant current control unit 3 outputs a current control signal Sic for controlling the current value of the negative constant current Im, the processing unit 9 monitors the voltage value of the supply voltage -Vc output from the variable power supply unit 4m based on the voltage signal Sm, and when the voltage value of the supply voltage -Vc rises above a predefined second threshold voltage (in this example, -1V), outputs a cut-off control signal Sc to the cut-off circuit 7 to turn off the switch SW2, thereby cutting off the connection between the connection point P1 and the resistor Rt.

In this case, the first and second threshold voltages are defined as above for the following reason. In the current output device 1, it is assumed that a resistor Rt or the like is normally connected as a load, and in the normal state in which the resistor Rt is connected, when a positive constant current Ip is output, the output voltage Vo becomes a positive voltage. For example, when the resistance value of the resistor Rt is 5 Ω and a positive constant current Ip of 1 A is output, the voltage value of the output voltage Vo becomes +6 V (the sum of the voltage across the 5 Ω resistor Rt (5 V) and the voltage across the 1 Ω resistor R1 (+1 V)). Therefore, in this case, the operational amplifier OPp of the voltage control unit 6p outputs the voltage control signal Svcp to the variable power supply unit 4p so that the voltage of the supply voltage +Vc is higher than the voltage of the output voltage Vo at the inverting input terminal by the forward voltage of the diode Dp (about 0.7 V). As a result, the variable power supply unit 4p generates the supply voltage +Vc by stepping down the power supply voltage +Vcc so that the voltage is higher than the output voltage Vo by the forward voltage of the diode Dp. Therefore, the power consumption of the FET 5p is the voltage Vds between the drain and source of the FET 5p (in this example, the forward voltage of the diode Dp (approximately 0.7 V)) multiplied by the current value of the constant current Ip (in this example, 1 A), and is a constant value regardless of the resistance value of the resistor Rt.

Also, when a negative constant current Im is output, the output voltage Vo becomes a negative voltage. For example, when the resistance value of resistor Rt is 5Ω and a negative constant current Im of 1A is output, the voltage value of the output voltage Vo becomes -6V (the sum of the voltage across resistor Rt of 5Ω (-5V) and the voltage across resistor R1 of 1Ω (-1V)). Therefore, at this time, the operational amplifier OPm of the voltage control unit 6m outputs a voltage control signal Svcm to the variable power supply unit 4m so that the voltage of the supply voltage -Vc is lower than the voltage of the output voltage Vo at the inverting input terminal by the forward voltage of diode Dm (approximately 0.7V). As a result, the variable power supply unit 4m generates the supply voltage -Vc by stepping down the power supply voltage -Vcc so that the voltage is lower than the voltage of the output voltage Vo by the forward voltage of diode Dm. Therefore, the power consumption of FET5m is the voltage Vds between the drain and source of FET5m (in this example, the forward voltage of diode Dm (approximately 0.7 V)) multiplied by the current value of constant current Im (in this example, 1 A), and is a constant value regardless of the resistance value of resistor Rt.

However, as shown in FIG. 1, when a positive constant current Ip is output, for example, when a battery Bat is connected in reverse as a voltage source instead of a resistor Rt, the voltage at the probe PR1, that is, the voltage at the connection point P1 (the source of FETs 5p and 5m) may become negative. In this case, the operational amplifier OPp of the voltage control unit 6p outputs a voltage control signal Svcp to the variable power supply unit 4p so that the voltage of the supply voltage +Vc is higher than the negative voltage at the inverting input terminal by the forward voltage of the diode Dp (about 0.7 V). As a result, the variable power supply unit 4p generates the supply voltage +Vc by stepping down the power supply voltage +Vcc so that the voltage is higher than the negative voltage by the forward voltage of the diode Dp. However, because the power supply voltage +Vcc is a positive voltage, the minimum voltage of the supply voltage +Vc that the variable power supply unit 4p can generate is a positive voltage close to zero volts, resulting in an abnormal state. Therefore, in this state, when the constant current Ip is output from the FET 5p, the power consumption in the FET 5p is the value obtained by multiplying the drain-source voltage Vds of the FET 5p (in this example, the absolute value of the negative voltage at the connection point P1) by the current value of the constant current Ip (1 A in this example), and there is a possibility that the excessive power consumption may cause the FET 5m to fail. Therefore, when the battery Bat is reverse-connected instead of the resistor Rt, it is necessary to immediately stop the output of the constant current Ip. For this reason, when the voltage value of the supply voltage +Vc output from the variable power supply unit 4p falls below the first threshold voltage (+1 V in this example), it is determined that an abnormal state has occurred in which the voltage at the connection point P1 (source of the FETs 5p and 5m) is a voltage (negative voltage or a positive voltage with a small absolute value) lower than at least the voltage (feedback voltage Vf) generated across the resistor R1, and the processing unit 9 outputs the cutoff control signal Sc to the cutoff circuit 7.

On the other hand, when outputting a negative constant current Im, for example, when a battery Bat is connected positively as a voltage source instead of resistor Rt, the voltage at probe PR1, that is, the voltage at connection point P1 (source of FETs 5p and 5m) may become a positive voltage. In this case, the operational amplifier OPm of the voltage control unit 6m outputs a voltage control signal Svcm to the variable power supply unit 4m so that the voltage of the supply voltage -Vc is lower than the positive voltage at the inverting input terminal by the forward voltage of diode Dm (about 0.7 V). As a result, the variable power supply unit 4m generates the supply voltage -Vc by stepping down the power supply voltage -Vcc so that the voltage is lower than the positive voltage by the forward voltage of diode Dm. However, because the power supply voltage -Vcc is a negative voltage, the minimum voltage of the supply voltage -Vc that the variable power supply unit 4m can generate is a negative voltage close to zero volts, resulting in an abnormal state. Therefore, in this state, when the constant current Im is output from the FET 5m, the power consumption in the FET 5m is the value obtained by multiplying the drain-source voltage Vds of the FET 5m (in this example, the absolute value of the positive voltage at the connection point P1) by the current value of the constant current Im (in this example, 1 A), and there is a possibility that the excessive power consumption may cause the FET 5m to break down. Therefore, when the battery Bat is positively connected instead of the resistor Rt, it is necessary to immediately stop the output of the constant current Im. For this reason, when the voltage value of the supply voltage -Vc output from the variable power supply unit 4m rises above the second threshold voltage (in this example, -1 V), it is determined that an abnormal state has occurred in which the voltage at the connection point P1 (the source of the FETs 5p and 5m) is a voltage (positive voltage or a negative voltage with a small absolute value) higher than at least the voltage (feedback voltage Vf) generated across the resistor R1, and the processing unit 9 outputs the cutoff control signal Sc to the cutoff circuit 7.

The measurement unit 2 inputs the voltage Vt between the probes PR and PR4, and measures the resistance value of the resistor Rt to be measured based on the voltage value of the voltage Vt and the current value of the constant current I output from the constant current control unit 3. After the measurement, the measurement unit 2 outputs measurement value data Ds indicating the measured resistance value of the resistor Rt to the processing unit 9.

Next, the measurement process for measuring the resistance value of resistor Rt as the measurement target using the resistance measuring device 100 and the interruption process will be described with reference to the attached drawings.

First, the type of constant current I to be output from the current output device 1 is selected. For example, when a positive constant current Ip is selected, the processing unit 9 controls the switch SW1 to connect a voltage source Bp with an output voltage of 1 V to the non-inverting input terminal of the operational amplifier OP1. At this time, the voltage Vp of the non-inverting input terminal of the operational amplifier OP1 becomes +1 V. After that, a resistor Rt is connected to the probes PR1 to PR4.

Next, the measurement start switch (not shown) is operated. This causes the operational amplifier OP1 to output a current control signal Sic. The variable power supply unit 4p varies the voltage value of the positive power supply voltage +Vcc by stepping it down in accordance with the voltage control signal Svcp, outputs it to the drain of FET 5p as a supply voltage +Vc, and outputs a voltage signal Sp to the processing unit 9. The variable power supply unit 4m varies the voltage value of the negative power supply voltage -Vcc by stepping it down in accordance with the voltage control signal Svcm, outputs it to the drain of FET 5m as a supply voltage -Vc, and outputs a voltage signal Sm to the processing unit 9.

Next, when the positive voltage current control signal Sic that controls the current value of the positive constant current Ip is output from the constant current control unit 3, the FET 5p operates, amplifying the current control signal Sic with a predetermined gain using the supply voltage +Vc output from the variable power supply unit 4p, and outputting it as a positive constant current Ip from the source. At this time, the constant current Ip flows through a current path consisting of the power supply voltage +Vcc, the variable power supply unit 4p, the FET 5p, the cutoff circuit 7, the probe PR1, the resistor Rt, the probe PR2, the resistor R1, and the reference potential. In this state, a feedback voltage Vf of +1V is generated at one end of the resistor R1 on the inverting input terminal side of the operational amplifier OP1 due to the feedback control of the operational amplifier OP1. As a result, the current output device 1 stably outputs a positive constant current Ip of 1A to the resistor Rt. Note that in this state, the negative voltage current control signal Sic that controls the current value of the negative constant current Im is not output from the constant current control unit 3, so the FET 5m stops operating.

On the other hand, in the voltage control unit 6p, the operational amplifier OPp inputs the source voltage of the FET 5p (the voltage at this time is the output voltage Vo) to the inverting input terminal and inputs a reference potential (in this example, the potential of ground G) to the non-inverting input terminal via the resistor Rp, and outputs the differential voltage between the voltage of the inverting input terminal (the voltage value of the output voltage Vo) and the voltage of the non-inverting input terminal (the reference potential) as a voltage control signal Svcp from the output terminal to control the variable power supply unit 4p. Also, the diode Dp specifies the drain voltage (supply voltage + Vc) of the FET 5p to a voltage higher than the source voltage (output voltage Vo) of the FET 5p by a predetermined voltage (in this example, the voltage of the forward voltage of the diode Dp). Therefore, the drain-source voltage Vds of the FET 5p, which is the differential voltage between the voltage value of the supply voltage + Vc output from the variable power supply unit 4p and the voltage value of the output voltage Vo, is about +0.7 V, and since the current value of the constant current I is 1 A, the power consumption of the FET 5p is about 0.7 W. As a result, this current output device 1 generates less heat, making it possible to use small, inexpensive FETs and transistors, and to use small, inexpensive heat sinks to dissipate heat from the FETs and transistors.

Then, the measurement unit 2 inputs the voltage Vt between the probes PR3 and PR4, and measures the resistance value of the resistor Rt as the measurement target based on the voltage value of the voltage Vt and the current value of the constant current I output from the constant current control unit 3. Next, after the measurement, the measurement unit 2 outputs measurement value data Ds indicating the measured resistance value of the resistor Rt to the processing unit 9. At this time, the processing unit 9 executes display control, outputs display data Dd, and causes the output unit 8 to display the resistance value of the resistor Rt on the screen. Next, the measurement end switch (not shown) is operated. This ends the measurement of the resistance value of the resistor Rt.

When a negative constant current Im is selected as the type of constant current I to be output from the current output device 1, the processing unit 9 controls the switch SW1 to connect a voltage source Bm with an output voltage of 1 V to the non-inverting input terminal of the operational amplifier OP1. At this time, the voltage Vp of the non-inverting input terminal of the operational amplifier OP1 becomes -1 V. After that, a resistor Rt is connected to the probes PR1 to PR4.

Next, the measurement start switch (not shown) is operated. This causes the operational amplifier OP1 to output a current control signal Sic. The variable power supply unit 4p also varies the voltage value of the negative power supply voltage +Vcc by stepping it down in accordance with the voltage control signal Svcp, outputs it to the drain of FET 5p as a supply voltage +Vc, and outputs a voltage signal Sp to the processing unit 9. The variable power supply unit 4m also varies the voltage value of the negative power supply voltage -Vcc by stepping it down in accordance with the voltage control signal Svcm, outputs it to the drain of FET 5m as a supply voltage -Vc, and outputs a voltage signal Sm to the processing unit 9.

Next, when the negative voltage current control signal Sic that controls the current value of the negative constant current Im is output from the constant current control unit 3, the FET 5m operates, amplifying the current control signal Sic with a predetermined gain using the supply voltage -Vc output from the variable power supply unit 4m, and outputting it as a negative constant current Im from the source. At this time, the constant current Im flows through a current path consisting of the reference potential, resistor R1, probe PR2, resistor Rt, probe PR1, interrupter circuit 7, FET 5m, variable power supply unit 4m, and a power supply with a power supply voltage -Vcc. In this state, a feedback voltage Vf of -1V is generated at one end of the resistor R1 on the inverting input terminal side of the operational amplifier OP1 due to feedback control of the operational amplifier OP1. As a result, the current output device 1 stably outputs a negative constant current Im of -1A to the resistor Rt. Note that in this state, the positive voltage current control signal Sic that controls the current value of the positive constant current Ip is not output from the constant current control unit 3, so the FET 5p stops operating.

On the other hand, in the voltage control unit 6m, the operational amplifier OPm inputs the source voltage of the FET 5m (the voltage at this time is the output voltage Vo) to the inverting input terminal and inputs a reference potential (in this example, the potential of ground G) to the non-inverting input terminal via the resistor Rm, and outputs the differential voltage between the voltage of the inverting input terminal (the voltage value of the output voltage Vo) and the voltage of the non-inverting input terminal (the reference potential) as a voltage control signal Svcm from the output terminal to control the variable power supply unit 4m. Also, the diode Dm specifies the drain voltage (supply voltage -Vc) of the FET 5m to a voltage that is lower than the source voltage (output voltage Vo) of the FET 5m by a predetermined voltage (in this example, the voltage of the forward voltage of the diode Dm). Therefore, the source-drain voltage Vsd of the FET 5m, which is the differential voltage between the voltage value of the supply voltage -Vc output from the variable power supply unit 4m and the voltage value of the output voltage Vo, is about +0.7V, and since the current value of the constant current I is 1A, the power consumption of the FET 5m is about 0.7W. As a result, this current output device 1 generates less heat, making it possible to use small, inexpensive FETs and transistors, and to use small, inexpensive heat sinks to dissipate heat from the FETs and transistors.

Then, the measurement unit 2 inputs the voltage Vt between the probes PR3 and PR4, and measures the resistance value of the resistor Rt as the measurement target based on the voltage value of the voltage Vt and the current value of the constant current I output from the current output device 1. Next, after the measurement, the measurement unit 2 outputs measurement value data Ds indicating the measured resistance value of the resistor Rt to the processing unit 9. At this time, the processing unit 9 executes display control, outputs display data Dd, and causes the output unit 8 to display the resistance value of the resistor Rt on the screen. Next, the measurement end switch (not shown) is operated. This ends the measurement of the resistance value of the resistor Rt.

On the other hand, when outputting a positive constant current Ip, for example, if a battery Bat with a battery voltage of 3V is reverse-connected as a voltage source instead of resistor Rt, the voltage at connection point P1 (source of FETs 5p and 5m) becomes -2V. In this case, the operational amplifier OPp of the voltage control unit 6p outputs a voltage control signal Svcp to the variable power supply unit 4p so that the supply voltage +Vc is higher than the voltage of -2V at the inverting input terminal by the forward voltage of diode Dp (approximately 0.7V). As a result, the variable power supply unit 4p attempts to generate the supply voltage +Vc by stepping down the power supply voltage +Vcc so that the voltage is higher than the voltage of -2V by the forward voltage of diode Dp. However, as described above, this state is abnormal and may lead to failure due to heat generation in FET 5p. For this reason, the processing unit 9 monitors the voltage signal Sp output from the variable power supply unit 4p, and when the voltage value of the supply voltage +Vc falls below the first threshold voltage of +1V, it outputs a cutoff control signal Sc to the cutoff circuit 7 to cut off the connection between the connection point P1 and the resistor Rt. As a result, the output of the positive constant current Ip is stopped, and a breakdown due to excessive power consumption (loss) of the FET 5p is avoided.

When outputting a negative constant current Im, for example, if a battery Bat with a battery voltage of 3V is connected positively instead of the resistor Rt as a voltage source, the voltage at the connection point P1 (the source of FETs 5p and 5m) becomes +2V. In this case, the operational amplifier OPm of the voltage control unit 6m outputs a voltage control signal Svcm to the variable power supply unit 4m so that the voltage of the supply voltage -Vc is lower than the voltage of +2V at the inverting input terminal by the forward voltage of the diode Dm (about 0.7V). As a result, the variable power supply unit 4m attempts to generate the supply voltage -Vc by stepping down the power supply voltage -Vcc so that the voltage is lower than the voltage of +2V by the forward voltage of the diode Dm. However, as described above, this state is abnormal and may lead to a failure due to heat generation in the FET 5m. For this reason, the processing unit 9 monitors the voltage signal Sm output from the variable power supply unit 4m, and when the voltage value of the supply voltage -Vc falls below the second threshold voltage of -1V, it outputs a cutoff control signal Sc to the cutoff circuit 7 to cut off the connection between the connection point P1 and the resistor Rt. As a result, the output of the negative constant current Im is stopped, and a breakdown due to excessive power consumption (loss) of the FET 5m is avoided.

In this way, according to the current output device 1, the voltage control unit 6p outputs the voltage control signal Svcp to control the variable power supply unit 4p so that the drain voltage (supply voltage + Vc) of the FET 5p is higher than the source voltage (output voltage Vo) by a predetermined voltage value, and the voltage control unit 6m outputs the voltage control signal Svcm to control the variable power supply unit 4m so that the drain voltage (supply voltage - Vc) of the FET 5m is lower than the source voltage (output voltage Vo) by a predetermined voltage value, thereby making it possible to keep the drain-source voltage Vds of the FETs 5p and 5m constant at a low voltage. Therefore, according to the current output device 1, the power consumption of the FETs 5p and 5m can be reduced, so that heat generation can be reduced, and as a result, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors. Therefore, according to the current output device 1, it is possible to suppress an increase in its manufacturing cost.

In addition, this current output device 1 does not require the cumbersome task of matching the resistance values of resistors and the characteristics of FETs 5p and 5m, and therefore can reduce the manufacturing costs of the device and can uniformly match the power consumption of FETs 5p and 5m without being influenced by the individual characteristics of FETs 5p and 5m when outputting a constant current to resistor Rt (load). In addition, this current output device 1 can keep the power consumption of FETs 5p and 5m constant regardless of the resistance value of resistor Rt as long as the FETs 5p and 5m output a constant current of the same current value, and therefore can keep the temperature rise of FETs 5p and 5m constant.

In addition, according to this current output device 1, the operational amplifier OPp of the voltage control unit 6p inputs the source voltage of the FET 5p to the inverting input terminal and inputs a reference potential (ground G potential) to the non-inverting input terminal, and outputs the difference voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a voltage control signal Svcp from the output terminal to control the variable power supply unit 4p, and the diode Dp specifies the drain voltage of the FET 5p to be higher than the voltage of the non-inverting input terminal by a predetermined voltage value, and the operational amplifier OPm of the voltage control unit 6m specifies F The voltage of the source of ET5m is input to the inverting input terminal, and the reference potential (ground G potential) is input to the non-inverting input terminal, and the differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal is output from the output terminal as a voltage control signal Svcm to control the variable power supply unit 4m, and the diode Dm regulates the drain voltage of FET5m to a predetermined voltage value lower than the voltage of the non-inverting input terminal, thereby allowing the drain-source voltage Vds of FET5p, 5m to be regulated to a constant value despite the simple configuration. Therefore, according to this current output device 1, it is possible to prevent the failure of FET5p, 5m while suppressing the increase in manufacturing costs, and to suppress heat generation to a small extent, which allows the use of small and inexpensive FETs and transistors, and also allows the use of small and inexpensive heat sinks for dissipating heat from FETs and transistors.

In addition, with this current output device 1, the voltage regulation circuit is configured with diodes (diodes Dp, Dm), so that the drain-source voltage Vds of FETs 5p, 5m can be regulated to a constant value even with a simple configuration. Therefore, with this current output device 1, it is possible to suppress increases in manufacturing costs.

In addition, with this resistance measuring device 100, the current output device 1 can be constructed simply and inexpensively, so the resistance measuring device 100 can be constructed simply and inexpensively.

Next, we will explain the resistance measuring device 100A as a second embodiment.

The resistance measuring device 100A shown in FIG. 2 is an example of a "resistance measuring device" equipped with a "signal output device (in this example, current output device 1A)" and is configured to be able to measure, for example, the resistance value of a resistor Rt (an example of an object to be measured) as a load. Specifically, the resistance measuring device 100A is configured with a current output device 1A, a measuring unit 2, and measurement probes PR1 to PR4. Note that corresponding components in the resistance measuring device 100A that function in the same way as the components in the resistance measuring device 100 are given the same reference numerals and duplicate explanations are omitted.

The current output device 1A includes a constant current control unit 3A, a variable power supply unit 4p, a FET 5p, a bias resistor Rb for the FET 5p, a voltage control unit 6p, a cutoff circuit 7, an output unit 8, and a processing unit 9, and outputs a positive constant current Ip as a constant current signal to a resistor Rt via probes PR1 and PR2.

The constant current control unit 3A is configured to be able to output a current control signal Sic that controls (specifies) the current value of the positive constant current Ip. Specifically, the constant current control unit 3A includes a voltage source Bp, an operational amplifier OP1, and a reference resistor R1. Here, the voltage source Bp is directly connected to the non-inverting input terminal of the operational amplifier OP1 and functions as a voltage source for controlling (specifying) the current value of the positive constant current Ip. In this example, as an example, a type with an output voltage of +1V is used as the voltage source Bp, assuming that a positive constant current Ip of 1A is output from the current output device 1A. The cutoff circuit 7 is configured in the same manner as the cutoff circuit 7 in the current output device 1, and is disposed between the source of the FET 5p and the resistor Rt (load), and cuts off the connection between the source of the FET 5p and the resistor Rt according to the cutoff control signal Sc.

The operation of the current output device 1A is also the same as when the current output device 1 outputs a positive constant current Ip, so a description of that operation will be omitted.

According to this current output device 1A, in the same manner as the current output device 1, the voltage control unit 6p outputs the voltage control signal Svcp to control the variable power supply unit 4p so that the drain voltage (supply voltage + Vc) of the FET 5p is higher than the source voltage (output voltage Vo) by a predetermined voltage value, thereby making it possible to keep the drain-source voltage Vds of the FET 5p constant at a low voltage. Therefore, according to this current output device 1A, the power consumption of the FET 5p can be reduced, so that failure of the FET 5p can be avoided and heat generation can be reduced. As a result, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors. Therefore, according to this current output device 1A, it is possible to suppress an increase in its manufacturing cost.

In addition, this current output device 1A eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of FETs 5p, and therefore reduces the manufacturing costs of the device, while allowing the power consumption of FETs 5p to be uniform and low when outputting a constant current to resistor Rt (load) without being affected by the individual characteristics of the FETs 5p.

In addition, according to this current output device 1A, the operational amplifier OPp of the voltage control unit 6p inputs the source voltage of the FET 5p to the inverting input terminal and inputs a reference potential (ground G potential) to the non-inverting input terminal, and outputs the difference voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a voltage control signal Svcp from the output terminal to control the variable power supply unit 4p, and the diode Dp specifies the drain voltage of the FET 5p to be a predetermined voltage value higher than the voltage of the non-inverting input terminal, so that the drain-source voltage Vds of the FET 5p can be specified to a constant value despite the simple configuration. Therefore, according to this current output device 1A, it is possible to prevent the FET 5p from breaking down while suppressing an increase in manufacturing costs, and to suppress heat generation to a small amount, which allows the use of small and inexpensive FETs and transistors, and also allows the use of small and inexpensive heat sinks for dissipating heat from the FETs and transistors.

In addition, with this current output device 1A, the voltage regulation circuit is configured with a diode (diode Dp), so that the drain-source voltage Vds of FET 5p can be regulated to a constant value even with a simple configuration. Therefore, with this current output device 1A, it is possible to suppress increases in manufacturing costs.

In addition, with this resistance measuring device 100A, the current output device 1A can be constructed simply and inexpensively, so the resistance measuring device 100A can be constructed simply and inexpensively.

Next, we will explain the resistance measuring device 100B as a third embodiment.

The resistance measuring device 100B shown in FIG. 3 is an example of a "resistance measuring device" that includes a "signal output device (in this example, current output device 1B)" and is configured to be able to measure, for example, the resistance value of a resistor Rt (an example of an object to be measured) as a load. Specifically, the resistance measuring device 100B includes a current output device 1B, a measuring unit 2, and measurement probes PR1 to PR4. Note that corresponding components in the resistance measuring device 100B that function in the same way as the components in the resistance measuring device 100 are given the same reference numerals and duplicate explanations will be omitted.

The current output device 1B includes a constant current control unit 3B, a variable power supply unit 4m, a FET 5m, a bias resistor Rb for the FET 5m, a voltage control unit 6m, a cutoff circuit 7, an output unit 8, and a processing unit 9, and outputs a negative constant current Im as a constant current signal to a resistor Rt via probes PR1 and PR2.

The constant current control unit 3B is configured to be able to output a current control signal Sic that controls (specifies) the current value of the negative constant current Im. Specifically, the constant current control unit 3B includes a voltage source Bm, an operational amplifier OP1, and a reference resistor R1. Here, the voltage source Bm is directly connected to the non-inverting input terminal of the operational amplifier OP1 and functions as a voltage source for controlling (specifying) the current value of the negative constant current Im. In this example, as an example, a type with an output voltage of -1V is used as the voltage source Bm, assuming that a negative constant current Im of -1A is output from the current output device 1B. The cutoff circuit 7 is configured in the same manner as the cutoff circuit 7 in the current output device 1, and is disposed between the source of the FET 5m and the resistor Rt (load), and cuts off the connection between the source of the FET 5m and the resistor Rt according to the cutoff control signal Sc.

The operation of the current output device 1B is also the same as when the current output device 1 outputs a negative constant current Im, so a description of that operation will be omitted.

According to this current output device 1B, in the same manner as the current output device 1, the voltage control unit 6m outputs the voltage control signal Svcm to control the variable power supply unit 4m so that the drain voltage (supply voltage -Vc) of the FET 5m is lower than the source voltage (output voltage Vo) by a predetermined voltage value, thereby making it possible to keep the drain-source voltage Vds of the FET 5m constant at a low voltage. Therefore, according to this current output device 1B, the power consumption of the FET 5m can be reduced, so that failure of the FET 5m can be avoided and heat generation can be reduced. As a result, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors. Therefore, according to this current output device 1B, it is possible to suppress an increase in its manufacturing cost.

In addition, this current output device 1B eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of FETs 5m, and therefore reduces the manufacturing costs of the device. When outputting a constant current to resistor Rt (load), the power consumption of FETs 5m can be made uniform and kept low without being affected by the individual characteristics of the FETs 5m.

In addition, according to this current output device 1B, the operational amplifier OPm of the voltage control unit 6m inputs the source voltage of the FET 5m to the inverting input terminal and inputs a reference potential (ground G potential) to the non-inverting input terminal, and outputs the differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a voltage control signal Svcm from the output terminal to control the variable power supply unit 4m, and the diode Dm specifies the drain voltage of the FET 5m to be a predetermined voltage value lower than the voltage of the non-inverting input terminal, thereby allowing the drain-source voltage Vds of the FET 5m to be specified to a constant value despite the simple configuration. Therefore, according to this current output device 1B, it is possible to prevent the FET 5m from breaking down while suppressing an increase in manufacturing costs, and to suppress heat generation to a small amount, which allows the use of small and inexpensive FETs and transistors, and also allows the use of small and inexpensive heat sinks for dissipating heat from the FETs and transistors.

In addition, with this current output device 1B, the voltage regulation circuit is configured with a diode (diode Dm), so that the drain-source voltage Vds of FET 5m can be regulated to a constant value even with a simple configuration. Therefore, with this current output device 1B, it is possible to suppress increases in manufacturing costs.

In addition, with this resistance measuring device 100B, the current output device 1B can be constructed simply and inexpensively, so the resistance measuring device 100B can be constructed simply and inexpensively.

Next, we will explain the resistance measuring device 100C as the fourth embodiment.

The resistance measuring device 100C shown in FIG. 4 is an example of a "resistance measuring device" equipped with a "signal output device (in this example, a voltage output device 1C)" and is configured to be able to measure, for example, the resistance value of a resistor Rt (an example of a measurement target) as a load. Specifically, the resistance measuring device 100C is configured with a voltage output device 1C, a measuring unit 2A, and measurement probes PR1 and PR2. Note that corresponding components in the resistance measuring device 100C that function in the same way as the components in the resistance measuring device 100 are given the same reference numerals and duplicate explanations are omitted.

The voltage output device 1C includes a constant voltage control unit 3C, variable power supply units 4p, 4m, FETs 5p, 5m, a bias resistor Rb for the FETs 5p, 5m, voltage control units 6p, 6m, an output unit 8, and a processing unit 9, and outputs either a positive constant voltage Vp as a positive output signal or a negative constant voltage Vm as a negative output signal (hereinafter, when no distinction is made, these are also referred to as "constant voltage V (constant voltage signal)").

The constant voltage control unit 3C is configured to be able to output a voltage control signal Svc (signal value control signal) that controls (specifies) the voltage value (one example of a signal value) of the constant voltage V of either positive or negative polarity. Specifically, the constant voltage control unit 3C includes voltage sources Bp and Bm, an operational amplifier OP1, and a switch SW1. Here, the voltage source Bp functions as a voltage source for controlling (specifying) the voltage value of the positive constant voltage Vp. The voltage source Bm functions as a voltage source for controlling (specifying) the voltage value of the negative constant voltage Vm. In this example, it is assumed that a constant voltage V of 5V of positive polarity or 5V of negative polarity is output from the voltage output device 1C, and a type with an output voltage of +5V is used as the voltage source Bp and can be connected to the non-inverting input terminal of the operational amplifier OP1 with a positive polarity, and a type with an output voltage of +5V is used as the voltage source Bm and can be connected to the non-inverting input terminal of the operational amplifier OP1 with a negative polarity.

The operational amplifier OP1 functions as a differential amplifier, and outputs the differential voltage between the voltage Vp at the non-inverting input terminal and the voltage Vm at the inverting input terminal as the voltage control signal Svc. The output voltage of one of the voltage sources Bp and Bm is input as the voltage Vp to the non-inverting input terminal of the operational amplifier OP1, and the feedback voltage VfA generated at the output terminal of the voltage output device 1C (also the probe PR1) is input as the voltage Vm to the inverting input terminal of the operational amplifier OP1. In this case, for example, when a positive constant voltage of +5V is output from the voltage output device 1C as the constant voltage Vp, the voltage Vp of +5V is supplied from the voltage source Bp to the non-inverting input terminal of the operational amplifier OP1. At this time, the voltage value of the feedback voltage VfA is +5V, which is approximately equal to the voltage value of the non-inverting input terminal of the operational amplifier OP1. On the other hand, for example, when a negative constant voltage of 5V is output from the voltage output device 1C as the constant voltage Vm, a voltage Vm of -5V is supplied from the voltage source Bm to the non-inverting input terminal of the operational amplifier OP1. At this time, the voltage value of the feedback voltage VfA becomes -5V, which is a voltage substantially equal to the voltage value of the non-inverting input terminal of the operational amplifier OP1. The switch SW1 is controlled by the processing unit 9, and when a positive constant voltage Vp is output from the voltage output device 1C, the movable contact is brought into contact with the fixed contact on the voltage source Bp side to output the positive voltage (+5V) of the voltage source Bp as the voltage Vp to the non-inverting input terminal of the operational amplifier OP1, and when a negative constant voltage Vm is output from the voltage output device 1C, the movable contact is brought into contact with the fixed contact on the voltage source Bm side to output the negative voltage (-5V) of the voltage source Bm as the voltage Vp to the non-inverting input terminal of the operational amplifier OP1.

The variable power supply unit 4p corresponds to the first variable power supply unit, and is configured and operates in the same manner as the variable power supply unit 4p in the resistance measuring device 100, except that it does not output a voltage signal Sp. The variable power supply unit 4m corresponds to the second variable power supply unit, and is configured and operates in the same manner as the variable power supply unit 4p in the resistance measuring device 100, except that it does not output a voltage signal Sm.

The processing unit 9 executes various controls in the resistance measuring device 100C. Specifically, when measuring the resistance value of the resistor Rt, the processing unit 9 executes switching control on the switch SW1 as described above. When measuring the resistance value of the resistor Rt, the processing unit 9 inputs the measurement value data Ds output from the measurement unit 2A, and measures the resistance value of the resistor Rt based on the current value of the current flowing through the resistor Rt and the voltage value of the constant voltage V output from the voltage output device 1C. Furthermore, the processing unit 9 executes display control on the output unit 8 described above. Unlike the processing unit 9 of the resistance measuring device 100, the processing unit 9 of the resistance measuring device 100C does not execute shutoff control.

The measurement unit 2A is an ammeter that is disposed between the probe PR2 and the ground G, which is a reference potential, and measures the current value of the current flowing through the resistor Rt and outputs measurement value data Ds indicating the measured current value to the processing unit 9.

Next, the measurement process for measuring the resistance value of resistor Rt as the measurement target using resistance measuring device 100 will be described with reference to the attached drawings.

First, the type of constant voltage V to be output from the voltage output device 1C is selected. For example, when a positive constant voltage Vp is selected, the processing unit 9 controls the switch SW1 to connect a voltage source Bp with an output voltage of 5 V to the non-inverting input terminal of the operational amplifier OP1. In this case, the voltage Vp at the non-inverting input terminal of the operational amplifier OP1 becomes +5 V. Then, a resistor Rt is connected to the probes PR1 and PR2.

Next, the measurement start switch (not shown) is operated. This causes operational amplifier OP1 to output a voltage control signal Svc. Also, variable power supply unit 4p varies the voltage value of the positive power supply voltage +Vcc by stepping it down in accordance with the voltage control signal Svcp, and outputs it to the drain of FET 5p as a supply voltage +Vc. Also, variable power supply unit 4m varies the voltage value of the negative power supply voltage -Vcc by stepping it down in accordance with the voltage control signal Svcm, and outputs it to the drain of FET 5m as a supply voltage -Vc.

Next, when the positive voltage control signal Svc that controls the voltage value of the positive constant voltage Vp is output from the constant voltage control unit 3C, the FET 5p operates, amplifying the voltage control signal Svc at a predetermined gain using the supply voltage +Vc output from the variable power supply unit 4p, and outputting it as a positive constant voltage Vp from the source. As a result, the constant voltage Vp is output to the resistor Rt via the probe PR1. In this state, a feedback voltage VfA of +5V is generated at one end of the inverting input terminal side of the operational amplifier OP1 due to feedback control of the operational amplifier OP1. As a result, the voltage output device 1C stably outputs a positive constant voltage Vp of 5V to the resistor Rt. Note that in this state, the negative voltage control signal Svc that controls the voltage value of the negative constant voltage Vm is not output from the constant voltage control unit 3C, so the FET 5m is not operating.

Meanwhile, the voltage control unit 6p operates in the same manner as the voltage control unit 6p of the resistance measuring device 100. In this case, in this resistance measuring device 100C, the current value of the drain current IDp flowing through the FET 5p is the value obtained by dividing the voltage value (5V) of the constant voltage V by the resistance value of the resistor Rt, and changes according to the resistance value of the resistor Rt being measured. Also, as described above, the drain-source voltage Vds of the FET 5p is constant at a low voltage of about +0.7V. Therefore, the power consumption in the FET 5p is the value obtained by multiplying the drain-source voltage Vds by the drain current IDp, which is small. Therefore, in this voltage output device 1C, as a result of low heat generation, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors.

Then, the measurement unit 2A measures the current value of the current flowing through the resistor Rt and outputs measurement value data Ds indicating that current value to the processing unit 9. At this time, the processing unit 9 inputs the measurement value data Ds output from the measurement unit 2A and measures the resistance value of the resistor Rt based on the current value of the current flowing through the resistor Rt and the voltage value of the constant voltage V output from the voltage output device 1C. Furthermore, the processing unit 9 executes the display control for the output unit 8 described above. Next, a measurement end switch (not shown) is operated. This ends the measurement of the resistance value of the resistor Rt.

When a negative constant voltage Vm is selected as the type of constant voltage V to be output from the voltage output device 1C, the processing unit 9 controls the switch SW1 to connect a voltage source Bm with an output voltage of 5V to the non-inverting input terminal of the operational amplifier OP1 with reverse polarity. In this case, the voltage Vp of the non-inverting input terminal of the operational amplifier OP1 becomes -5V. After that, a resistor Rt is connected to the probes PR1 and PR2.

Next, the measurement start switch (not shown) is operated. This causes operational amplifier OP1 to output a voltage control signal Svc. Furthermore, variable power supply unit 4p varies the voltage value of the negative power supply voltage +Vcc by stepping it down in accordance with the voltage control signal Svcp, and outputs it to the drain of FET 5p as a supply voltage +Vc. Furthermore, variable power supply unit 4m varies the voltage value of the negative power supply voltage -Vcc by stepping it down in accordance with the voltage control signal Svcm, and outputs it to the drain of FET 5m as a supply voltage -Vc.

Next, when the constant voltage control signal Svc of the negative voltage that controls the voltage value of the negative constant voltage Vm is output from the constant voltage control unit 3C, the FET 5m operates, amplifying the voltage control signal Svc at a predetermined gain using the supply voltage -Vc output from the variable power supply unit 4m, and outputting it as the negative constant voltage Vm from the source. As a result, the constant voltage Vm is output to the resistor Rt via the probe PR1. In this state, a feedback voltage VfA of -5V is generated at one end of the inverting input terminal side of the operational amplifier OP1 due to the feedback control of the operational amplifier OP1. As a result, the voltage output device 1C stably outputs the negative constant voltage Vm of -5V to the resistor Rt. Note that in this state, the constant voltage control signal Svc of the positive voltage that controls the voltage value of the positive constant voltage Vp is not output from the constant voltage control unit 3C, so the FET 5p is not operating.

Meanwhile, the voltage control section 6m operates in the same manner as the voltage control section 6m of the resistance measuring device 100. In this case, in this resistance measuring device 100C, the current value of the drain current IDm flowing through the FET 5m is the absolute value (5V) of the voltage value of the constant voltage V divided by the resistance value of the resistor Rt, and changes according to the resistance value of the resistor Rt being measured. Also, as described above, the source-drain voltage Vsd of the FET 5m is constant at a low voltage of about +0.7V. Therefore, the power consumption in the FET 5m is the value obtained by multiplying the source-drain voltage Vsd by the drain current IDm, which is small. Therefore, in this voltage output device 1C, as a result of low heat generation, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors.

Then, the measurement unit 2A measures the current value of the current flowing through the resistor Rt and outputs measurement value data Ds indicating that current value to the processing unit 9. At this time, the processing unit 9 inputs the measurement value data Ds output from the measurement unit 2A and measures the resistance value of the resistor Rt based on the current value of the current flowing through the resistor Rt and the voltage value of the constant voltage V output from the voltage output device 1C. Furthermore, the processing unit 9 executes the display control for the output unit 8 described above. Next, a measurement end switch (not shown) is operated. This ends the measurement of the resistance value of the resistor Rt.

In this way, according to the voltage output device 1C, the voltage control unit 6p outputs the voltage control signal Svcp to control the variable power supply unit 4p so that the drain voltage (supply voltage + Vc) of the FET 5p is higher than the source voltage (output voltage Vo) by a predetermined voltage value, and the voltage control unit 6m outputs the voltage control signal Svcm to control the variable power supply unit 4m so that the drain voltage (supply voltage - Vc) of the FET 5m is lower than the source voltage (output voltage Vo) by a predetermined voltage value, thereby making it possible to keep the drain-source voltage Vds of the FETs 5p and 5m constant at a low voltage. Therefore, according to the voltage output device 1C, the power consumption of the FETs 5p and 5m can be reduced, so that heat generation can be reduced, and as a result, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors. Therefore, according to the voltage output device 1C, it is possible to suppress an increase in its manufacturing cost.

In addition, this voltage output device 1C eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of FETs 5p and 5m, and therefore reduces the manufacturing costs of the device while keeping the power consumption of FETs 5p and 5m low when outputting a constant voltage to resistor Rt (load) without being affected by the individual characteristics of FETs 5p and 5m.

In addition, according to this voltage output device 1C, the operational amplifier OPp of the voltage control unit 6p inputs the source voltage of the FET 5p to the inverting input terminal and inputs a reference potential (ground G potential) to the non-inverting input terminal, and outputs the difference voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a voltage control signal Svcp from the output terminal to control the variable power supply unit 4p, and the diode Dp specifies the drain voltage of the FET 5p to be higher than the voltage of the non-inverting input terminal by a predetermined voltage value, and the operational amplifier OPm of the voltage control unit 6m specifies F The voltage of the source of ET5m is input to the inverting input terminal, and the reference potential (ground G potential) is input to the non-inverting input terminal, and the differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal is output from the output terminal as a voltage control signal Svcm to control the variable power supply unit 4m, and the diode Dm regulates the drain voltage of FET5m to be a predetermined voltage value lower than the voltage of the non-inverting input terminal, thereby allowing the drain-source voltage Vds of FET5p, 5m to be regulated to a constant value despite the simple configuration. Therefore, with this voltage output device 1C, it is possible to suppress the increase in manufacturing costs while suppressing heat generation, and as a result, it is possible to use small and inexpensive FETs and transistors, and to use small and inexpensive heat sinks for heat dissipation of the FETs and transistors.

In addition, with this voltage output device 1C, the voltage regulation circuit is configured with diodes (diodes Dp, Dm), so that the drain-source voltage Vds of FETs 5p, 5m can be regulated to a constant value even with a simple configuration. Therefore, with this voltage output device 1C, it is possible to suppress increases in manufacturing costs.

In addition, with this resistance measuring device 100C, the voltage output device 1C can be constructed simply and inexpensively, so the resistance measuring device 100C can be constructed simply and inexpensively.

Next, we will explain the resistance measuring device 100D as the fifth embodiment.

The resistance measuring device 100D shown in FIG. 5 is an example of a "resistance measuring device" equipped with a "signal output device (in this example, a voltage output device 1D)" and is configured to be able to measure, for example, the resistance value of a resistor Rt (an example of a measurement target) as a load. Specifically, the resistance measuring device 100D is configured with a voltage output device 1D, a measuring unit 2A, and measurement probes PR1 and PR2. Note that corresponding components in the resistance measuring device 100D that function in the same way as the components in the resistance measuring device 100C are given the same reference numerals and duplicate explanations are omitted.

The voltage output device 1D includes a constant voltage control unit 3D, a variable power supply unit 4p, a FET 5p, a bias resistor Rb for the FET 5p, a voltage control unit 6p, an output unit 8, and a processing unit 9, and outputs a positive constant voltage Vp as a positive output signal to resistor Rt via probes PR1 and PR2.

The constant voltage control unit 3D is configured to be capable of outputting a voltage control signal Svc that controls (specifies) the voltage value of the positive constant voltage Vp. Specifically, the constant voltage control unit 3D includes a voltage source Bp and an operational amplifier OP1. Here, the voltage source Bp is directly connected to the non-inverting input terminal of the operational amplifier OP1, and functions as a voltage source for controlling (specifying) the voltage value of the positive constant voltage Vp. In this example, as an example, it is assumed that a positive constant voltage Vp of 5V is output from the voltage output device 1D, and a type with an output voltage of +5V is used as the voltage source Bp.

The operation of the voltage output device 1D is also similar to that of the voltage output device 1C when it outputs a positive constant voltage Vp, so a description of that operation will be omitted.

According to this voltage output device 1D, in the same manner as the voltage output device 1C, the voltage control unit 6p outputs the voltage control signal Svcp to control the variable power supply unit 4p so that the drain voltage (supply voltage + Vc) of the FET 5p is higher than the source voltage (output voltage Vo) by a predetermined voltage value, thereby making it possible to keep the drain-source voltage Vds of the FET 5p constant at a low voltage. Therefore, according to this voltage output device 1D, the power consumption of the FET 5p can be reduced, and heat generation can be reduced. As a result, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors. Therefore, according to this voltage output device 1D, it is possible to suppress an increase in manufacturing costs.

In addition, this voltage output device 1D eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of FET5p, and therefore reduces the manufacturing costs of the device while keeping the power consumption of FET5p low when outputting a constant voltage to resistor Rt (load) without being affected by the individual characteristics of FET5p.

In addition, according to this voltage output device 1D, the operational amplifier OPp of the voltage control unit 6p inputs the source voltage of the FET 5p to the inverting input terminal and inputs a reference potential (ground G potential) to the non-inverting input terminal, and outputs the difference voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a voltage control signal Svcp from the output terminal to control the variable power supply unit 4p, and the diode Dp specifies the drain voltage of the FET 5p to be a predetermined voltage value higher than the voltage of the non-inverting input terminal, so that the drain-source voltage Vds of the FET 5p can be specified to a constant value despite the simple configuration. Therefore, according to this voltage output device 1D, it is possible to suppress the increase in manufacturing costs while suppressing heat generation, and as a result, it is possible to use small and inexpensive FETs and transistors, and to use small and inexpensive heat sinks for heat dissipation of the FETs and transistors.

In addition, with this voltage output device 1D, the voltage regulation circuit is configured with a diode (diode Dp), so that the drain-source voltage Vds of FET 5p can be regulated to a constant value even with a simple configuration. Therefore, with this voltage output device 1D, it is possible to suppress increases in manufacturing costs.

In addition, with this resistance measuring device 100D, the voltage output device 1D can be constructed simply and inexpensively, so the resistance measuring device 100D can be constructed simply and inexpensively.

Next, we will explain the resistance measuring device 100E as the sixth embodiment.

The resistance measuring device 100E shown in FIG. 6 is an example of a "resistance measuring device" equipped with a "signal output device (in this example, a voltage output device 1E)" and is configured to be able to measure, for example, the resistance value of a resistor Rt (an example of a measurement target) as a load. Specifically, the resistance measuring device 100E is configured with a voltage output device 1E, a measuring unit 2A, and measurement probes PR1 and PR2. Note that corresponding components in the resistance measuring device 100E that function in the same way as the components in the resistance measuring device 100C are given the same reference numerals and duplicate explanations are omitted.

The voltage output device 1E includes a constant voltage control unit 3E, a variable power supply unit 4m, a FET 5m, a bias resistor Rb for the FET 5m, a voltage control unit 6m, an output unit 8, and a processing unit 9, and outputs a negative constant voltage Vm as a negative output signal to resistor Rt via probes PR1 and PR2.

The constant voltage control unit 3E is configured to be able to output a voltage control signal Svc that controls (specifies) the voltage value of the negative constant voltage Vm. Specifically, the constant voltage control unit 3E includes a voltage source Bm and an operational amplifier OP1. Here, the voltage source Bm is directly connected to the non-inverting input terminal of the operational amplifier OP1, and functions as a voltage source for controlling (specifying) the voltage value of the negative constant voltage Vm. In this example, as an example, it is assumed that a negative constant voltage Vm of -5V is output from the voltage output device 1E, and a type with an output voltage of -5V is used as the voltage source Bm.

The operation of the voltage output device 1E is similar to that of the voltage output device 1C when it outputs a negative constant voltage Vm, so a description of that operation will be omitted.

In this way, according to the voltage output device 1E, similar to the voltage output device 1C, the voltage control unit 6m outputs the voltage control signal Svcm to control the variable power supply unit 4m so that the drain voltage (supply voltage -Vc) of the FET 5m is lower than the source voltage (output voltage Vo) by a predetermined voltage value, thereby making it possible to keep the drain-source voltage Vds of the FET 5m constant at a low voltage. Therefore, according to the voltage output device 1E, the power consumption of the FET 5m can be reduced, and heat generation can be reduced. As a result, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors. Therefore, according to the voltage output device 1E, it is possible to suppress an increase in manufacturing costs.

In addition, this voltage output device 1E eliminates the need for the cumbersome task of matching the resistance values of resistors and the characteristics of FET5m, and therefore reduces the manufacturing costs of the device while keeping the power consumption of FET5m low when outputting a constant voltage to resistor Rt (load) without being affected by the individual characteristics of FET5m.

In addition, according to this voltage output device 1E, the operational amplifier OPm of the voltage control unit 6m inputs the source voltage of the FET 5m to the inverting input terminal and inputs a reference potential (ground G potential) to the non-inverting input terminal, and outputs the differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as a voltage control signal Svcm from the output terminal to control the variable power supply unit 4m, and the diode Dm specifies the drain voltage of the FET 5m to be a predetermined voltage value lower than the voltage of the non-inverting input terminal, thereby making it possible to specify the drain-source voltage Vds of the FET 5m to a constant value despite the simple configuration. Therefore, according to this voltage output device 1E, it is possible to suppress the increase in manufacturing costs while suppressing heat generation, and as a result, it is possible to use small and inexpensive FETs and transistors, and to use small and inexpensive heat sinks for heat dissipation of the FETs and transistors.

In addition, with this voltage output device 1E, the voltage regulation circuit is configured with a diode (diode Dm), so that the drain-source voltage Vds of FET 5m can be regulated to a constant value even with a simple configuration. Therefore, with this voltage output device 1E, it is possible to suppress increases in manufacturing costs.

In addition, with this resistance measuring device 100E, the voltage output device 1E can be constructed simply and inexpensively, so the resistance measuring device 100E can be constructed simply and inexpensively.

The signal output device is not limited to the above configuration and can be modified as appropriate. For example, in the current output devices 1, 1A, 1B and the voltage output devices 1C, 1D, 1E, an example was described in which FETs were used as the first and second semiconductor elements, but transistors can be used. When configured with transistors, the collector functions as a current input terminal and the emitter functions as a current output terminal. In addition, an example was described in which diodes (diodes Dp, Dm) were used as a voltage regulation circuit that makes the drain voltage of FET 5p (or FET 5m) higher (or lower) than the source voltage by a predetermined voltage value, but the voltage regulation circuit can be configured using transistors, FETs, integrated circuits, etc. However, when configuring the voltage regulation circuit simply, it is preferable to use diodes (diodes Dp, Dm). In addition, in order to suppress the power consumption in the first semiconductor element and the second semiconductor element, it is preferable to specify the "predetermined voltage value" as low as possible (approximately 0.7V to 1.2V). In addition, the first threshold voltage and the second threshold voltage are not limited to the above example and can be modified as appropriate. Furthermore, the reference potential is not limited to the potential of ground G, but may be any potential with a constant voltage value. Furthermore, a primary battery or a secondary battery may be used instead of the voltage sources Bp and Bm.

According to the present invention, the power consumption of the first semiconductor element and the second semiconductor element can be reduced, and heat generation can be suppressed. As a result, small and inexpensive FETs and transistors can be used, and small and inexpensive heat sinks can be used to dissipate heat from the FETs and transistors, thereby suppressing increases in the manufacturing costs of the signal output device and the resistance measuring device. As a result, the present invention can be widely applied to such signal output devices and resistance measuring devices that perform resistance measurements.

100, 100A to 100E Resistance measuring device 1, 1A, 1B Current output device 1C to 1E Voltage output device 2, 2A Measuring unit 3, 3A, 3B Constant current control unit 3C to 3E Constant voltage control unit 4p, 4m Variable power supply unit 5p, 5m FET
6p, 6m Voltage control section 9 Processing section Dp, Dm Diode OPp, OPm Operational amplifier

Claims (9)

a signal value control unit that outputs a signal value control signal that controls a signal value of a positive output signal;
a first variable power supply unit that varies a voltage value of an input first power supply voltage, which is a positive voltage, in accordance with a first voltage control signal and outputs the voltage as a first supply voltage;
a first semiconductor element that amplifies the signal value control signal output from the signal value control unit by using the first supply voltage and outputs the amplified signal as the output signal from a current output terminal to a load;
a first voltage control unit that outputs the first voltage control signal to control the first variable power supply unit so that a voltage value of the first supply voltage follows a voltage value of the current output terminal of the first semiconductor element and becomes a voltage value higher than the voltage value of the current output terminal,
The first voltage control unit is a signal output device that outputs the first voltage control signal to control the first variable power supply unit so that the voltage of a current input terminal to which the first supply voltage is input in the first semiconductor element is higher by a predetermined voltage value than the voltage of the current output terminal of the first semiconductor element. a signal value control unit that outputs a signal value control signal that controls a signal value of a negative output signal;
a second variable power supply unit that varies a voltage value of an input second power supply voltage, which is a negative voltage, in accordance with a second voltage control signal and outputs the voltage value as a second supply voltage;
a second semiconductor element that amplifies the signal value control signal output from the signal value control unit by using the second supply voltage and outputs the amplified signal as the output signal from a current output terminal to a load;
a second voltage control unit that outputs the second voltage control signal to control the second variable power supply unit so that a voltage value of the second supply voltage follows a voltage value of the current output terminal of the second semiconductor element and is a voltage value lower than the voltage value of the current output terminal,
The second voltage control unit is a signal output device that outputs the second voltage control signal to control the second variable power supply unit so that the voltage of a current input terminal to which the second supply voltage is input in the second semiconductor element is lower by a predetermined voltage value than the voltage of the current output terminal of the second semiconductor element. a signal value control unit that outputs a signal value control signal that controls a signal value of either one of the positive output signal and the negative output signal;
a first variable power supply unit that varies a voltage value of an input first power supply voltage, which is a positive voltage, in accordance with a first voltage control signal and outputs the voltage as a first supply voltage;
a second variable power supply unit that varies a voltage value of an input second power supply voltage, which is a negative voltage, in accordance with a second voltage control signal and outputs the voltage value as a second supply voltage;
a first semiconductor element that operates when a signal value control signal defining a signal value of the positive output signal is output from the signal value control section, amplifying the signal value control signal output from the signal value control section using the first supply voltage, and outputting the amplified signal from a current output terminal to a load as the positive output signal;
a second semiconductor element that operates when a signal value control signal defining a signal value of the negative output signal is output from the signal value control section, amplifying the signal value control signal output from the signal value control section using the second supply voltage, and outputs the amplified signal from a current output terminal to the load as the negative output signal;
a first voltage control unit that outputs the first voltage control signal to control the first variable power supply unit so that a voltage value of the first supply voltage follows a voltage value of the current output terminal of the first semiconductor element and is higher than the voltage value of the current output terminal;
a second voltage control unit that outputs the second voltage control signal to control the second variable power supply unit so that a voltage value of the second supply voltage follows a voltage value of the current output terminal of the second semiconductor element and is a voltage value lower than the voltage value of the current output terminal,
the first voltage control unit outputs the first voltage control signal to control the first variable power supply unit so that a voltage of a current input terminal to which the first supply voltage is input in the first semiconductor element becomes higher by a predetermined voltage value than a voltage of the current output terminal of the first semiconductor element;
The second voltage control unit is a signal output device that outputs the second voltage control signal to control the second variable power supply unit so that the voltage of a current input terminal to which the second supply voltage is input in the second semiconductor element is lower by a predetermined voltage value than the voltage of the current output terminal of the second semiconductor element. The signal output device according to claim 1, wherein the first voltage control section is configured to include a first differential amplifier circuit that inputs the voltage of the current output terminal of the first semiconductor element to an inverting input terminal and inputs a reference potential to a non-inverting input terminal via a resistor, and outputs a differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as the first voltage control signal from an output terminal to control the first variable power supply section, and a voltage regulation circuit that is disposed between the current input terminal of the first semiconductor element and the non-inverting input terminal of the first differential amplifier circuit and regulates the voltage of the current input terminal to be higher than the voltage of the non-inverting input terminal by a predetermined voltage value. The signal output device according to claim 3, wherein the first voltage control section is configured to include a first differential amplifier circuit that inputs the voltage of the current output terminal of the first semiconductor element to an inverting input terminal and inputs a reference potential to a non-inverting input terminal via a resistor, and outputs a differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as the first voltage control signal from an output terminal to control the first variable power supply section, and a voltage regulation circuit that is disposed between the current input terminal of the first semiconductor element and the non-inverting input terminal of the first differential amplifier circuit and regulates the voltage of the current input terminal to be higher than the voltage of the non-inverting input terminal by a predetermined voltage value. The signal output device according to claim 2, wherein the second voltage control section is configured to include a second differential amplifier circuit that inputs the voltage of the current output terminal of the second semiconductor element to an inverting input terminal and inputs a reference potential to a non-inverting input terminal via a resistor, and outputs a differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as the second voltage control signal from an output terminal to control the second variable power supply section, and a voltage regulation circuit that is disposed between the current input terminal of the second semiconductor element and the non-inverting input terminal of the second differential amplifier circuit and regulates the voltage of the current input terminal to be lower than the voltage of the non-inverting input terminal by a voltage value that is regulated in advance. The signal output device according to claim 3, wherein the second voltage control section is configured to include a second differential amplifier circuit that inputs the voltage of the current output terminal of the second semiconductor element to an inverting input terminal and inputs a reference potential to a non-inverting input terminal via a resistor, and outputs a differential voltage between the voltage of the inverting input terminal and the voltage of the non-inverting input terminal as the second voltage control signal from an output terminal to control the second variable power supply section, and a voltage regulation circuit that is disposed between the current input terminal of the second semiconductor element and the non-inverting input terminal of the second differential amplifier circuit and regulates the voltage of the current input terminal to be lower than the voltage of the non-inverting input terminal by a predetermined voltage value. A signal output device according to any one of claims 4 to 7, wherein the voltage regulation circuit is composed of a diode. A resistance measuring device comprising a signal output device according to any one of claims 1 to 7, and a measuring unit that supplies the output signal to a load as an object to be measured and measures the resistance of the object to be measured based on the voltage generated across the object to be measured and the current value of the output signal flowing through the load.

Images