JP2024046525A - Through electrode, structure using the same, and three-dimensional laminated structure - Google Patents

Abstract

A through electrode capable of improving heat dissipation performance, and a structure and a three-dimensional laminated structure using the same are provided. [Solution] Through electrodes (21), (31) that penetrate supports (20), (30), the supports (20), (30) have through holes (25), (35) that penetrate between a first surface (26), (36) and a second surface (27), (37), the through electrodes (21), (31) have thermal conductors (22), (32) that connect between the first surface (26), (36) and the second surface (27), (37), and superconductors (23), (33) that connect between the first surface (26), (36) and the second surface (27), (37), and the thermal conductors (22), (32) and the superconductors (23), (33) are formed in contact with each other inside the through holes (25), (35). [Selected Figure] Figure 2

Description

The present invention relates to a through electrode, a structure using the same, and a three-dimensional laminated structure.

Three-dimensional packaging technology is attracting attention as a method for interconnecting electronic devices. Through silicon vias (TSVs) and other through silicon vias are one of the techniques for achieving three-dimensional packaging. Through electrodes are used to electrically connect three-dimensionally stacked devices such as logic, memory, sensors, actuators, etc. (see, for example, Patent Document 1).

Japanese Patent Application Publication No. 2016-213349

In a three-dimensional stacked structure manufactured using three-dimensional mounting technology, it is important to have a method for efficiently dissipating heat from a semiconductor chip to the outside. In particular, when three-dimensional packaging technology is applied to quantum bit chips used at extremely low temperatures and in a vacuum environment, a problem arises in which heat from the quantum bit chips cannot be efficiently dissipated. For stable operation of qubit chips, it is important to keep them at extremely low temperatures.

The present invention was made in consideration of these circumstances, and its purpose is to provide a through electrode capable of improving heat dissipation performance, and a structure and a three-dimensional laminated structure using the same.

A first aspect of the present invention is a through electrode penetrating through a support, wherein the support is formed with a through hole penetrating between a first surface and a second surface, and the through hole is formed in the support. The electrode has a thermal conductor communicating between the first surface and the second surface, and a superconductor communicating between the first surface and the second surface, The through electrode is characterized in that the thermal conductor and the superconductor are formed in contact with each other inside the through hole.

A second aspect of the present invention is that the superconductor is a substance that exhibits superconductivity at a temperature of 4.2K or lower, and the thermal conductor is a substance that exhibits normal conductivity at a temperature of 4.2K or lower. This is a characteristic feature of the first aspect of the through electrode.
A third aspect of the present invention is the through electrode according to the first or second aspect, wherein the thermal conductor is copper.

A fourth aspect of the present invention is a structure characterized by having the through electrode according to any one of the first to third aspects and the support body.
In a fifth aspect of the present invention, the support body is made of silicon (Si), and a silicon oxide film is formed between the silicon (Si) and the through electrode on the inner wall surface of the through hole. , the structure according to the fourth aspect, wherein the silicon oxide film has a thickness of 10 nm or less.
A sixth aspect of the present invention is the structure according to the fourth or fifth aspect, wherein the through electrode protrudes from at least one of the first surface and the second surface of the support. It is the body.

A seventh aspect of the present invention is the structure according to any one of the fourth to sixth aspects, further comprising a semiconductor chip, the through electrode being used for connection to the semiconductor chip.
An eighth aspect of the present invention is the structure according to the seventh aspect, characterized in that the semiconductor chip is a quantum bit chip.
A ninth aspect of the present invention is the structure according to the seventh or eighth aspect, characterized in that the through electrode protrudes from the support and is directly connected to the semiconductor chip.
A tenth aspect of the present invention is the structure according to any one of the seventh to ninth aspects, characterized in that the semiconductor chip operates in a vacuum environment.

An eleventh aspect of the present invention is a three-dimensional laminated structure comprising two or more laminated structures of any one of the fourth to tenth aspects.
A twelfth aspect of the present invention is the three-dimensional laminated structure of the eleventh aspect, characterized in that the three-dimensional laminated structure includes a circuit board and an interposer including a cooling surface, and the circuit board and the interposer each have the through electrode.

According to the first aspect of the present invention, the through electrode can perform heat transfer and superconductivity between the first surface and the second surface of the support using a thermal conductor and a superconductor, respectively. can. Since the thermal conductor and the superconductor are formed in contact with each other inside the through hole, heat transfer is mainly performed by the thermal conductor, and electricity supply is mainly performed by the superconductor. Current flow through the thermal conductor is suppressed, and heat transfer through the superconductor is also suppressed.

According to the second aspect of the present invention, it is useful when it is necessary to use it in an extremely low temperature environment of 4.2K or lower.
According to the third aspect of the present invention, heat transfer performance can be improved.

According to the fourth aspect of the present invention, heat transfer and superconductivity between the first surface and the second surface of the support can be performed by the thermal conductor and superconductor of the through electrode, respectively. can. Since the thermal conductor and the superconductor are formed in contact with each other inside the through hole, heat transfer is mainly performed by the thermal conductor, and electricity supply is mainly performed by the superconductor. Current flow through the thermal conductor is suppressed, and heat transfer through the superconductor is also suppressed.

According to the fifth aspect of the present invention, since processing techniques for silicon (Si) substrates can be applied, high-precision processing becomes easy. Since silicon has a low thermal conductivity, the heat transfer performance can be improved by using the through electrode. Since the thickness of the silicon oxide film on the inner wall surface of the through hole is 10 nm or less, a process of forming a silicon oxide film by thermal oxidation or the like is not required.
According to the sixth aspect of the present invention, the process of superconductingly connecting the through electrode protruding from the support to a superconducting device or the like outside the support can be facilitated.

According to the seventh aspect of the present invention, a through electrode having a thermal conductor and a superconductor can be used for connection with a semiconductor chip.
According to the eighth aspect of the present invention, when a quantum bit chip is used as a semiconductor chip, it is possible to operate the quantum bit chip more stably.
According to the ninth aspect of the present invention, the process of superconductively connecting the through electrode protruding from the support to the semiconductor chip is facilitated.
According to the tenth aspect of the present invention, even if the structure has poor heat dissipation performance through air, the heat dissipation performance can be improved.

According to the eleventh aspect of the present invention, high density can be achieved by stacking integrated circuits using through electrodes.
According to the twelfth aspect of the present invention, heat from a device such as a semiconductor chip can be efficiently transferred to the cooling surface of the circuit board via the interposer and the through electrode of the circuit board.

FIG. 1 is a cross-sectional view showing an example of a three-dimensional laminated structure. FIG. 2 is a cross-sectional view showing an example of a through electrode. 3 is a cross-sectional view of the through electrode taken along line III-III in FIG. 2. 1 is a plan view showing an example of an arrangement of through electrodes in an interposer; FIG. FIG. 2 is a cross-sectional view showing an example of a through electrode directly connected to a semiconductor chip. FIG. 13 is a diagram showing an example of heat distribution in an embodiment. It is a figure which shows an example of heat distribution in a comparative example. It is a graph showing the thermal conductivity of Cu, Si, and Al at extremely low temperatures.

The present invention will be described below based on preferred embodiments. The following embodiments are merely examples for explaining the present invention, and are not intended to limit the present invention to the embodiments. Furthermore, the present invention can be modified in various ways without departing from the gist of the invention.

Figure 1 shows an example of a three-dimensional laminated structure. Figure 2 shows an example of a through electrode. Figure 3 shows a cross section of the through electrode taken along line III-III in Figure 2.

The three-dimensional stacked structure 10 includes, for example, a semiconductor chip 1, an interposer 2 including a through electrode 21, and a circuit board 3 including a through electrode 31. Bumps 4 are formed between the semiconductor chip 1 and the through electrodes 21 of the interposer 2. A bump 5 is formed between the through electrode 21 of the interposer 2 and the through electrode 31 of the circuit board 3. The interposer 2 and the circuit board 3 are examples of structures having through electrodes 21 and 31 and supports 20 and 30, respectively. Therefore, the three-dimensional structure 10 includes two or more structures stacked together.

Semiconductor chip 1 is a chip whose substrate material is a semiconductor such as silicon, similar to a normal semiconductor chip. Semiconductor chip 1 may be a quantum bit chip. A quantum bit chip is a chip equipped with quantum bits. Examples of quantum bits include, but are not limited to, flux quantum bits and transmon quantum bits. Examples of quantum bit chips include, but are not limited to, circuit-based or annealing-based quantum computers.

Since quantum bits are extremely unstable and susceptible to noise, in order to homogenize and stabilize them, they must be placed in an extremely low temperature environment, for example, at about 20 mK. By using the through electrodes 21 and 31 of the embodiment, even when a quantum bit chip is used as the semiconductor chip 1, the quantum bit chip can be operated more stably.

In the three-dimensional laminated structure 10 shown in FIG. 1, one semiconductor chip 1 is mounted on a circuit board 3 via an interposer 2. Multiple semiconductor chips 1 may be mounted along the surface of the circuit board 3. Multiple semiconductor chips 1 may be mounted on one circuit board 3 via one interposer 2. Multiple interposers 2 may be used for one circuit board 3. One semiconductor chip 1 may be mounted on one interposer 2. Multiple semiconductor chips 1 may be mounted on one interposer 2.

The interposer 2 may have a through electrode 21 in a through hole 25 that penetrates at least between the first surface 26 and the second surface 27 of the support 20. A semiconductor substrate such as silicon is preferable as the support 20. The through electrode 21 has a thermal conductor 22 that connects between the first surface 26 and the second surface 27, and a superconductor 23 that connects between the first surface 26 and the second surface 27. That is, the thermal conductor 22 and the superconductor 23 included in the through electrode 21 are formed so as to be connectable to a member when the member is provided on the first surface 26 and the second surface 27 of the support 20. Inside the through hole 25, the thermal conductor 22 and the superconductor 23 are formed in contact with each other. In the example shown in FIG. 1, the thermal conductor 22 is formed so as to surround the outer periphery of the superconductor 23. The superconductor 23 may be formed so as to surround the outer periphery of the thermal conductor 22. The thermal conductor 22 and the superconductor 23 may also be arranged opposite each other.

Since the interposer 2 has the through electrode 21 including the thermal conductor 22 and the superconductor 23, the thermal conductor 22 transfers heat between the first surface 26 and the second surface 27, and the superconductor 23 can exhibit superconductivity. Since the thermal conductor 22 and the superconductor 23 are formed in contact with each other inside the through hole 25, the thermal resistance or electrical resistance between the thermal conductor 22 and the superconductor 23 is sufficiently small. This suppresses current flow through the thermal conductor 22 and heat transfer through the superconductor 23.

In addition to the through electrodes 21, active elements such as logic, memory, sensors, and actuators may be formed on the interposer 2. In this case, the interposer 2 may also be called an interposer chip. In the interposer 2 of this embodiment, when the support 20 is made of silicon, it is different from a conventional interposer in which wiring is formed on a resin substrate.

The interposer 2 can have a plurality of through electrodes 21. In this case, at least one of the plurality of through electrodes 21 is configured to transmit and receive signals to and from the semiconductor chip 1. FIG. 4 shows an example of the arrangement of the through electrodes 21 on the interposer 2.

FIG. 1 shows an example in which a single layer of interposer 2 is arranged between a semiconductor chip 1 and a circuit board 3. In the three-dimensional stacked structure 10 of the embodiment, two or more layers of interposers 2 may be arranged between the semiconductor chip 1 and the circuit board 3.

The circuit board 3 may have a through electrode 31 in a through hole 35 that penetrates at least between the first surface 36 and the second surface 37 of the support 30. The arrangement of the through electrode 31 on the circuit board 3 may be the same as the arrangement of the through electrode 21 on the interposer 2. A semiconductor substrate such as silicon is preferable as the support 30. The through electrode 31 has a thermal conductor 32 that connects between the first surface 36 and the second surface 37, and a superconductor 33 that connects between the first surface 36 and the second surface 37. That is, the thermal conductor 32 and the superconductor 33 included in the through electrode 31 are formed so as to be connectable to the member when the member is provided on the first surface 36 and the second surface 37, respectively. Inside the through hole 35, the thermal conductor 32 and the superconductor 33 are formed in contact with each other. In the example shown in FIG. 1, the thermal conductor 32 is formed to surround the outer periphery of the superconductor 33. The superconductor 33 may be formed to surround the outer periphery of the thermal conductor 32. The thermal conductor 32 and the superconductor 33 may also be arranged facing each other.

Since the circuit board 3 has the through electrode 31 including the thermal conductor 32 and the superconductor 33, the thermal conductor 32 transfers heat between the first surface 36 and the second surface 37, and The body 33 is capable of superconducting. Since the thermal conductor 32 and the superconductor 33 are formed in contact with each other inside the through hole 35, the thermal resistance or electrical resistance between the thermal conductor 32 and the superconductor 33 is sufficiently small. This suppresses current flow through the thermal conductor 32 and heat transfer through the superconductor 33.

The circuit board 3 has a cooling surface 6 as a heat dissipation surface. The cooling surface 6 may be arranged, for example, on the surface of the circuit board 3 opposite to the surface on which the interposer 2 is mounted (first surface 36 in FIG. 2). The circuit board 3 may be a mounting board that supports the semiconductor chip 1 via the interposer 2 and is used to mount the semiconductor chip 1.

In addition to the through electrodes 31, the circuit board 3 may also include wiring, etc., although not shown. In this case, the circuit board 3 is also called a wiring board or a package board. In the circuit board 3 of this embodiment, when the support body 30 is silicon, the material is different from that of a conventional wiring board in which wiring is formed on a resin board. The circuit board 3 can include multiple through electrodes 31.

The wiring of the circuit board 3 may be formed on the surface of the circuit board 3 on which the interposer 2 is mounted (the second surface 37 in FIG. 2). In this case, the wiring of the circuit board 3 is connected to the through electrode 21 of the interposer 2 via the bump 5. The through electrodes 31 of the circuit board 3 are connected to the through electrodes 21 of the interposer 2 via bumps 5. The through electrodes 31 of the circuit board 3 may not play a role in transmitting and receiving signals to and from the semiconductor chip 1, but may only play a role in transmitting heat to the cooling surface 6. In this case, the through electrode 31 of the circuit board 3 may be formed only from the thermal conductor 32 without the superconductor 33.

In the circuit board 3 of the embodiment, the through electrode 31 has a thermal conductor 32 and a superconductor 33. Therefore, the thermal conductor 32 is responsible for transmitting heat to the cooling surface 6, and the superconductor 33 can be responsible for sending and receiving signals with the semiconductor chip 1. When the circuit board 3 has multiple through electrodes 31, at least one of the multiple through electrodes 31 can be configured to be responsible for sending and receiving signals with the semiconductor chip 1.

In the three-dimensional laminated structure 10 of this embodiment, not only is a through electrode 21 formed in the interposer 2, but a through electrode 31 is also formed in the circuit board 3. The thermal conductor 22 of the through electrode 21 is made of a material with a higher thermal conductivity than the support 20 of the interposer 2. Similarly, the thermal conductor 32 of the through electrode 31 is made of a material with a higher thermal conductivity than the support 30 of the circuit board 3.

The thermal conductors 22 and 32 of the through electrodes 21 and 31 can be made of a metal material such as copper, tungsten, aluminum, polysilicon, etc., for example. Among these materials, it is preferable to use copper as the thermal conductors 22, 32. When the supports 20 and 30 are silicon, the through electrodes 21 and 31 are referred to as through silicon vias (TSV).

The superconductors 23, 33 of the through electrodes 21, 31 may be tantalum nitride (TaN), titanium nitride (TiN), tantalum (Ta), niobium (Nb), indium (In), aluminum (Al), etc. When it is necessary to use the semiconductor chip 1 in an extremely low temperature environment of 4.2 K or less, it is preferable that the superconductors 23, 33 of the through electrodes 21, 31 are materials that exhibit superconductivity at temperatures of 4.2 K or less.

A barrier metal may be formed on the inner wall surface of the through hole 25, 35 around the through electrode 21, 31. Examples of the barrier metal include Ti, TiN, TaN, and Ta, which are exemplified as the barrier layer in Patent Document 1. The superconductors 23, 33 may also serve as the barrier metal. As shown in Figures 2 and 3, the superconductors 23, 33 may be formed in contact with the inner wall surface of the through hole 25, 35, and the thermal conductors 22, 32 may be formed inside the superconductors 23, 33.

An insulating film may be formed between the supports 20, 30 and the through electrodes 21, 31 of the interposer 2 or the circuit board 3. The insulating film may be an inorganic insulating film such as silicon oxide or silicon nitride, or an organic insulating film such as a resin film. When the insulating film between the supports 20, 30 and the through electrodes 21, 31 is a silicon oxide film, the silicon oxide film may be a natural oxide film having a thickness of 10 nm or less. When the insulating film between the supports 20, 30 and the through electrodes 21, 31 is a resin film, examples of the insulating film include Parylene (registered trademark) of Japan Parylene LLC, a polymer of paraxylylene, etc., but are not limited to these.

When the thermal conductors 22, 32 of the through electrodes 21, 31 are responsible for transferring heat, and the superconductors 23, 33 are responsible for sending and receiving signals to and from the semiconductor chip 1, it is preferable that the thermal conductors 22, 32 are substances that exhibit normal conductivity at temperatures of 4.2 K or less. This allows the thermal conductors 22, 32 to play a role solely in transferring heat, without being responsible for sending and receiving signals, when it is necessary to use the semiconductor chip 1 in an extremely low-temperature environment of 4.2 K or less.

The diameter of the through electrodes 21, 31 is not limited, but is, for example, 1 μm to 100 μm. The pitch of the through electrodes 21, 31 is not limited, but is, for example, set to at least twice the diameter of the through electrodes 21, 31. When the semiconductor chip 1 is a quantum bit chip, the through electrodes 21, 31 that are responsible for transmitting signals to and from the active element of the interposer 2 may be formed closely packed. In this case, the diameter and pitch of the through electrodes 21, 31 tend to be small. When the through electrodes 21, 31 are connected to a power source, the diameter and pitch of the through electrodes 21, 31 tend to be large.

The length of the through electrodes 21, 31 in the thickness direction of the supports 20, 30 is not limited, but is, for example, about 20 μm to 600 μm. The first surface 26, 36 and the second surface 27, 37 of the supports 20, 30 may be two surfaces facing each other in the thickness direction of the supports 20, 30, but are not limited to this. In each of the supports 20, 30, the first surface 26, 36 or the second surface 27, 37 is not limited to a flat surface, and may have a curved surface, unevenness, a device, etc.

In order to disperse heat as much as possible on the cooling surface 6, a heat dissipating metal layer may be formed on the cooling surface 6. Here, when a heat dissipation metal layer is formed in the three-dimensional laminated structure 10, the heat dissipation metal layer can be treated as being included in the cooling surface 6. The material of the heat dissipation metal layer is not limited, but it can be made of metal materials such as copper, tungsten, aluminum, and polysilicon. Among these materials, it is preferable to form the heat dissipation metal layer from copper. When the heat dissipation metal layer is made of the same metal material as the heat conductor 32 of the through electrode 31, the heat dissipation metal layer of the cooling surface 6 and the heat conductor 32 can be easily bonded, and the heat dissipation characteristics can be improved.

Since the three-dimensional stacked structure 10 of this embodiment mounts a quantum bit chip as the semiconductor chip 1, the semiconductor chip 1 is used at extremely low temperatures and in a vacuum environment during operation. The three-dimensional laminated structure 10 is used, for example, in an extremely low temperature environment of 4.2K or lower. Furthermore, the three-dimensional laminated structure 10 is used, for example, in a vacuum environment of 10 ⁻² Pa or less. In such a vacuum environment, heat dissipation performance through air is poor unlike in an air atmosphere, so it is useful to improve heat dissipation performance by providing through electrodes 31 including thermal conductors 32 on circuit board 3. According to the three-dimensional laminated structure 10, heat from the semiconductor chip 1 can be efficiently transferred to the cooling surface 6 of the circuit board 3 via the interposer 2 and the through electrodes 21, 31 of the circuit board 3. .

There is no limitation on the material of the bumps 4 and 5, but they can be made of, for example, gold (Au), copper (Cu), silver (Ag), nickel (Ni), or solder materials such as Sn-Ag-Cu, Sn-Bi, Au-Sn, and Sn-Pb. When two or more layers of interposers 2 are stacked, bumps 4 may be used between the semiconductor chip 1 and interposer 2, and bumps 5 may be used between the interposers 2, just as bumps 4 are used between the semiconductor chip 1 and interposer 2, and bumps 5 are used between the interposer 2 and circuit board 3.

Figure 5 is a cross-sectional view showing an example of a through electrode 21 directly connected to the semiconductor chip 1. As shown in Figure 5, the through electrode 21 of the interposer 2 may protrude from the support 20 and be directly connected to the semiconductor chip 1. In this case, the protruding portion 24 of the through electrode 21 performs the function of the bump 4, so that the bump 4 between the semiconductor chip 1 and the interposer 2 can be omitted.

The protruding portion 24 of the through electrode 21 is not limited to the surface of the interposer 2 facing the semiconductor chip 1, but may be formed on at least one surface of the interposer 2 or the support 20, 30 of the circuit board 3. By having the through electrode 21, 31 protruding from at least one of the first surface 26, 36 or the second surface 27, 37 of the support 20, 30, the process of superconductingly connecting the through electrode 21, 31 to a superconducting device or the like outside the support 20, 30 is facilitated.

When at least one of the through electrodes 21 and 31 protrudes from the supports 20 and 30 between the interposer 2 and the circuit board 3, the bump 5 can be omitted. The through electrodes 21 of the interposer 2 and the through electrodes 31 of the circuit board 3 may be directly joined. The through electrodes 21 protruding from the support body 20 of the interposer 2 may be joined to the wiring on the circuit board 3 side. The structure of the through electrode 31 of the circuit board 3 may have a protruding shape similar to the structure of the through electrode 21 shown in FIG. It may be connected to the wiring.

Although the present invention has been described above based on preferred embodiments, the present invention is not limited to the embodiments, and various modifications can be made without departing from the gist of the present invention.

In the embodiment, a quantum bit chip has been described as an example of a semiconductor chip, but the present invention can also be applied to semiconductor chips other than quantum bit chips and devices other than semiconductor chips. A device such as a semiconductor chip may be a device that operates at a temperature higher than cryogenic temperatures. A device such as a semiconductor chip may be mounted on a structure having a through electrode of the embodiment, not limited to a three-dimensional stacked structure 10 having an interposer 2 and a circuit board 3. The through electrodes 21 and 31 shown in Figures 1 and 2 may be applied to a structure other than an interposer 2 and a circuit board 3. The through electrode 21 shown in Figures 3 to 5 may be applied to a structure other than an interposer 2.

Examples of through electrodes will be described below with reference to FEM (Finite Element Method) results. FEM is a commonly used method for analyzing the stress state and reliability caused by through electrodes.

In the example, the semiconductor chip 1 is a quantum bit chip, and the semiconductor chip 1, the support 20 of the interposer 2, and the support 30 of the circuit board 3 are made of silicon with a thickness of 400 μm. In the through electrodes 21 and 31 of the example, the thermal conductors 22 and 32 and the bumps 4 and 5 were made of copper (thermal conductivity: 0.530 W/mK). The superconductors 23 and 33 of the through electrodes 21 and 31 were made of TiN, TaN, or the like.

The supports 20 and 30 are squares with sides measuring 1 mm (i.e., 1000 μm). As shown in FIG. 4, in the interposer 2, five through electrodes 21 are arranged in five locations: one at the center of the square and four at the midpoints between the center and the vertices of the square. The through electrodes 31 of the circuit board 3 are also arranged in five locations.

The diameter of the through electrodes 21 and 31 was 50 μm. The pitch between adjacent through electrodes 21 and 31 is approximately 353 μm, which is equal to the length of a diagonal line of a square with one side of 250 μm. The length (height in the stacking direction) of the through electrodes 21 and 31 is equal to the thickness of the supports 20 and 30, which is 400 μm. The bumps 4 and 5 are located at positions overlapping with the through electrodes 21 and 31. The diameters of the bumps 4 and 5 may be approximately the same as the diameters of the through electrodes 21 and 31 so that the bumps 4 and 5 are in contact with the thermal conductors 22 and 32 and the superconductors 23 and 33 of the through electrodes 21 and 31. . The height of the bumps 4 and 5 is, for example, 4 μm.

As a comparative example, the same as the example was used except that it did not have two layers of thermal conductors 22, 32 and superconductors 23, 33, and the through electrodes 21, 31 and bumps 4, 5 were made of aluminum only. The semiconductor chip 1 of the comparative example is also a quantum bit chip, and the semiconductor chip 1, the support 20 of the interposer 2, and the support 30 of the circuit board 3 are made of silicon with a thickness of 400 μm.

FIG. 6 is a diagram showing the heat distribution of the example. FIG. 6 shows the thermal distribution 1A of the quantum bit chip in the structure of the example, the thermal distribution 2A of the interposer, the thermal distribution 3A of the circuit board, the thermal distribution 4A of the heat generating surface, and the thermal distribution of the bump between the interposer and the circuit board. 5A is shown.

FIG. 7 is a diagram showing the heat distribution of the comparative example. FIG. 7 shows the thermal distribution 1B of the quantum bit chip, the thermal distribution 2B of the interposer, the thermal distribution 3B of the circuit board, the thermal distribution 4B of the heat generating surface, and the thermal distribution of the bump between the interposer and the circuit board in the structure of the comparative example. 5B is shown.

The surface opposite to the side on which the interposer is mounted on the circuit board is a cooling surface, and the temperature of the cooling surface is 10.0 mK in both Examples and Comparative Examples. The interposer has a heat generating surface on the side on which the quantum bit chip is mounted. The amount of heat generated by the interposer is, for example, 1.56 nW/mm ² .

FIG. 8 is a graph showing the thermal conductivity (W/mK) of copper (Cu), silicon (Si), and aluminum (Al) at extremely low temperatures. Al has a critical temperature (superconducting transition temperature) of about 1.2 K and exhibits superconductivity at extremely low temperatures. When Al undergoes a superconducting transition, its thermal conductivity decreases significantly. It can be seen that silicon also has a lower thermal conductivity than copper.

In the structure of the embodiment, the maximum temperature of the heat distribution 1A of the quantum bit chip was 14.3 mK, whereas in the structure of the comparative example, the maximum temperature of the heat distribution 1B of the quantum bit chip was 38.9 mK. This shows that the comparative example has a lower effect of reducing the temperature of the quantum bit chip than the embodiment.

In the structure of the embodiment, the entire heat distribution 3A of the circuit board was maintained at a temperature of 10.5 mK or less, whereas in the structure of the comparative example, the maximum temperature of the heat distribution 3B of the circuit board was in the range of 16.4 to 19.6 mK. Also, although part of the heat distribution 2B of the interposer of the comparative example was in the range of 32.4 to 35.7 mK, almost the entire interposer and the entire quantum bit chip were in the range of 35.7 to 38.9 mK.

The heat distribution 4A of the heat generating surface of the embodiment was in the range of 10.2 to 14.2 mK, while the heat distribution 4B of the heat generating surface of the comparative example was in the range of 38.0 to 38.8 mK. In the structure of the comparative example, the heat conduction from the heat generating surface of the interposer to the quantum bit chip cannot be suppressed. In the structure of the embodiment, the heat of the heat generating surface of the interposer is more actively conducted to the cooling surface of the circuit board, which has the effect of reducing the temperature of the quantum bit chip.

In the structure of the embodiment, the maximum temperature of the quantum bit chip is 14.2 mK, which is the 20 mK or less required for stable operation of the quantum bit chip. Thus, according to the embodiment, the maximum temperature of the quantum bit chip can be significantly reduced compared to the comparative example.

In order to explain the effects of the embodiment, the results of analysis using FEM are used in the examples, but the present invention is not limited to the specific conditions (material, film thickness, shape, etc.) for performing the FEM analysis.

1... Semiconductor chip, 1A, 1B... Heat distribution of quantum bit chip, 2... Interposer, 2A, 2B... Heat distribution of interposer, 3... Circuit board, 3A, 3B... Heat distribution of circuit board, 4, 5... Bump, 4A, 4B... Heat distribution of heat generating surface, 5A, 5B... Heat distribution of bump, 6... Cooling surface, 10... Three-dimensional laminated structure, 20, 30... Support body, 21, 31... Through electrode, 22, 32... Thermal conductor, 23, 33... superconductor, 24... protrusion, 25, 35... through hole, 26, 36... first surface, 27, 37... second surface.

Claims (12)

A through electrode penetrating the support,
the support has a through hole formed therein, the through hole penetrating between a first surface and a second surface;
the through electrode has a thermal conductor connecting the first surface and the second surface, and a superconductor connecting the first surface and the second surface,
A through electrode, characterized in that the thermal conductor and the superconductor are formed in contact with each other inside the through hole. The through electrode according to claim 1, characterized in that the superconductor is a material that exhibits superconductivity at a temperature of 4.2 K or less, and the thermal conductor is a material that exhibits normal conductivity at a temperature of 4.2 K or less. The through electrode according to claim 1 , wherein the thermal conductor is copper.
A structure comprising the through electrode according to claim 1 and the support body. The support body is made of silicon (Si), and a silicon oxide film is formed between the silicon (Si) and the through electrode on the inner wall surface of the through hole,
5. The structure according to claim 4, wherein the silicon oxide film has a thickness of 10 nm or less. 5. The structure according to claim 4, wherein the through electrode protrudes from at least one of the first surface and the second surface of the support. Further comprising a semiconductor chip;
5. The structure according to claim 4, wherein the through electrode is used for connection to the semiconductor chip. The structure of claim 7, wherein the semiconductor chip is a quantum bit chip. The structure according to claim 7, characterized in that the through electrode protrudes from the support and is directly connected to the semiconductor chip. 8. The structure of claim 7, wherein the semiconductor chip operates in a vacuum environment. A three-dimensional laminated structure comprising two or more of the structures according to any one of claims 4 to 10 in a laminated manner. The three-dimensional laminated structure according to claim 11, characterized in that the three-dimensional laminated structure includes a circuit board and an interposer including a cooling surface, and the circuit board and the interposer each have the through electrode.

Images