JP2024031606A - wiring board - Google Patents

Abstract

An object of the present invention is to provide a fine signal transmission path having good transmission characteristics in a wiring board.
A wiring board 1 according to an embodiment includes a first wiring board 10 having a first surface 10f and a second surface 10s opposite thereto, and a third surface 20f and a fourth surface 20s opposite thereto. A second wiring board 20 having a second wiring board 20. The second wiring board 20 has a support on the fourth surface 20s, and is attached to the first wiring board 10 so that the fourth surface 20s faces the first surface 10f. Of the plurality of conductor layers of the second wiring board 20, the outermost conductor layer on the third surface 20f side is a first conductor pad to which the first component E1 is connected and a conductor pad to which the second component E2 is to be connected. Contains two conductor pads. The plurality of conductor layers of the second wiring board 20 include a first conductor layer having a first wiring pattern connecting a first conductor pad and a second conductor pad.
[Selection diagram] Figure 1

Description

The present invention relates to a wiring board.

Patent Document 1 discloses a wiring board for a semiconductor package that includes a first wiring board and a second wiring board mounted on the first wiring board and having a wiring layer. A plurality of pads connected to the wiring layer are formed on the surface of the second wiring board opposite to the surface facing the first wiring board so that a plurality of semiconductor chips can be mounted thereon.

Japanese Patent Application Publication No. 2020-191323

The printed wiring board disclosed in Patent Document 1 has sufficient resistance to fine wiring corresponding to the electrodes of electronic components such as IC chips connected to the printed wiring board and high frequency signals transmitted between electronic components. In some cases, it may not be possible to provide a signal line with suitable transmission characteristics.

The wiring board of the present invention includes a first wiring board having a first surface and a second surface opposite to the first surface, and a third surface having a third surface and a fourth surface opposite to the third surface. 2 wiring boards. The second wiring board includes a plurality of conductor layers and a plurality of resin insulating layers that are alternately stacked. The second wiring board has a support on the fourth surface, and is attached to the first wiring board so that the fourth surface faces the first surface. The outermost conductor layer on the third surface side of the plurality of conductor layers includes a first conductor pad to which the first component is to be connected, and a second conductor pad to which the second component is to be connected. The plurality of conductor layers include a first conductor layer including a first wiring pattern connecting the first conductor pad and the second conductor pad. The surface of the first conductor layer on the third surface side is a polished surface, and the minimum wiring width of the wiring pattern included in the first conductor layer is 3 μm or less, and the wiring included in the first conductor layer The minimum distance between the patterns is 3 μm or less, and the aspect ratio of the first wiring pattern is 2.0 or more and 4.0 or less.

According to the embodiments of the present invention, it is possible to provide a fine transmission path having excellent signal transmission characteristics in a wiring board connected to a component.

FIG. 1 is a cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. FIG. 2 is a plan view of the wiring board shown in FIG. 1; FIG. 3 is a cross-sectional view showing an example of a second wiring board included in the wiring board of one embodiment. An enlarged view of section IV in FIG. 3. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to an embodiment. FIG. 1 is a cross-sectional view showing an example of a method for manufacturing an electronic component using a wiring board according to an embodiment. FIG. 3 is a cross-sectional view showing an example of a second wiring board included in a wiring board according to another embodiment of the present invention. An enlarged view of section VIII in FIG. 7. FIG. 7 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to another embodiment. FIG. 7 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to another embodiment. FIG. 7 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to another embodiment. FIG. 7 is a cross-sectional view showing an example of a manufacturing process of a wiring board according to another embodiment.

<First embodiment>
An example of a wiring board according to a first embodiment of the present invention will be explained with reference to the drawings. FIG. 1 shows a cross-sectional view of the wiring board 1, and FIG. 2 shows a top view of the wiring board 1. FIG. 1 shows a cross section taken along line II in FIG. Note that the wiring board 1 is only an example of the wiring board of the embodiment. In addition, in the drawings referred to in the following description, certain parts may be enlarged to make it easier to understand the disclosed embodiments, and each component may differ from the other in terms of size and length. may not be drawn to exact proportions.

As shown in FIG. 1, the wiring board 1 is configured to be able to mount a plurality of components. As shown in FIGS. 1 and 2, the wiring board 1 has a first component mounting area A1 where the first component E1 is to be mounted, and a second component E2 which is a separate component from the first component E1. and a second component mounting area A2. Note that "another part" simply means that the first part E1 and the second part E2 are separate parts, and does not necessarily mean that they are different types of parts. The first part E1 and the second part E2 may be the same type of parts, or may be parts having mutually different functions. The first component E1 and the second component E2 mounted on the wiring board 1 are, for example, electronic components such as a semiconductor integrated circuit device such as a microcomputer or a memory. Note that the number of components mounted on the wiring board 1 may be three or more.

As shown in FIGS. 1 and 2, the wiring board 1 includes a first wiring board 10 and a second wiring board 20 attached to the first wiring board 10. The first wiring board 10 has a larger area than the second wiring board 20 in plan view in order to provide a pasting area A0 for pasting the second wiring board 20. The wiring board 1 is configured such that the first component E1 is connectable to the first wiring board 10 and also connectable to the second wiring board 20. Therefore, the first component mounting area A1 in which the first component E1 is to be mounted is the second wiring board 20 and the portion of the first wiring board 10 that is not covered by the second wiring board 20 in plan view. It is set up so that it overlaps with both. Note that "planar view" means viewing the object with a line of sight along the thickness direction of the wiring board 1. Furthermore, the wiring board 1 is configured such that the second component E2 is connectable to the first wiring board 10 and also connectable to the second wiring board 20. Therefore, the second component mounting area A2 where the second component E2 is to be mounted is the second wiring board 20 and the portion of the first wiring board 10 that is not covered by the second wiring board 20 in plan view. It is set up so that it overlaps with both.

In the wiring board of the embodiment, the area of the second wiring board 20 is smaller than the total area of the first component mounting area A1 and the second component mounting area A2 in plan view. Therefore, it is considered that the wiring board of the embodiment can be made smaller by using the second wiring board 20 having an area equal to or smaller than the first component E1 and the second component E2. The area of the second wiring board 20 may be smaller than the area of only the first component mounting area A1, or may be smaller than the area of only the second component mounting area A2.

The number of second wiring boards 20 attached to one first wiring board 10 may be two or more. Further, when the number of components mounted on the wiring board 1 is three or more, at least two of the three or more components may be connected to one second wiring board 20. For example, all three or more components may be connected to one second wiring board 20, or two of the three or more components may be connected to one second wiring board 20, and other components may be connected to one second wiring board 20. may be connected only to the first wiring board 10.

As shown in FIG. 1, the first wiring board 10 has a first surface 10f, which is one of two surfaces (principal surfaces) orthogonal to the thickness direction, and a surface opposite to the first surface 10f. It has a certain second surface 10s. The second wiring board 20 has a third surface 20f, which is one of two surfaces (principal surfaces) orthogonal to the thickness direction thereof, and a fourth surface 20s, which is the opposite surface to the third surface 20f. ing. The second wiring board 20 is attached to the first wiring board 10 so that the fourth surface 20s faces the first surface 10f.

In the description of the embodiment, the third surface 20f side of the second wiring board 20 in the thickness direction (layering direction) of the wiring board 1 is also referred to as the "upper side", "upper", or simply "upper". The second surface 10s side of the first wiring board 10 is also referred to as the "lower side", "lower side", or simply "lower side". Further, in each conductor layer and each insulating layer of the first wiring board 10 and the second wiring board 20, the surface facing the third surface 20f of the second wiring board 20 is also referred to as the "upper surface", and the surface facing the third surface 20f of the first wiring board 10 The surface facing the second surface 10s is also referred to as the "lower surface." Note that the thickness direction of the wiring board in the embodiment is also referred to as the "Z direction."

In the wiring board of the embodiment, the first wiring board 10 is connected to at least the outside of the wiring board 1 other than the components mounted on the wiring board 1 (in the example of FIG. 1, the first component E1 and the second component E2), The wiring board 1 can be connected to the wiring board 1. The first wiring board 10 is made of any wiring board that can be connected to at least two components (in the example of FIG. 1, the first component E1 and the second component E2) among the components mounted on the wiring board 1. can be selected. In the example of FIG. 1, the first wiring board 10 includes a plurality of conductor layers 122 to 127 and a plurality of insulating layers 131 to 136, which are alternately stacked. The first wiring board 10 shown in FIG. 1 includes a core board 11, and a plurality of conductor layers 122 to 127 and a plurality of conductor layers 122 to 127 and a plurality of This is a so-called build-up wiring board manufactured by sequentially forming insulating layers 131 to 136. However, the laminated structure of the first wiring board 10 and the number of conductor layers and insulating layers included in the first wiring board are different from the laminated structure of the first wiring board 10 in FIG. There is no limit to the number of conductive layers and insulating layers. The first wiring board 10 may be, for example, a so-called double-sided wiring board composed only of the core board 11.

In the example of FIG. 1, the core board 11 of the first wiring board 10 has a core insulating layer 113 and a core conductor layer 112 on each of the first surface 10f side and the second surface 10s side of the core insulating layer 113. , contains. The core conductor layers 112 on each of the first surface 10f side and the second surface 10s side are connected to each other by a through-hole conductor 110. Furthermore, the inside of the through-hole conductor 110 is filled with a resin body 111 containing epoxy resin or the like.

In the example of FIG. 1, the first wiring board 10 includes a via conductor 14 that penetrates any one of the insulating layers 131 to 136 and connects the core conductor layer 112 and the conductor layers 122 to 127. . The insulating layer 137, which is the outermost insulating layer on the first surface 10f side and the second surface 10s side of the first wiring board 10, may be a solder resist layer.

In the example of FIG. 1, the conductor layers 122 to 127 of the first wiring board 10 are each patterned to include a predetermined conductor pattern. The conductor layer 127, which is the outermost conductor layer on the first surface 10f side, is connected to the components (first component E1 and second component E2 in the example of FIG. 1) that are mounted on the wiring board 1 when the wiring board 1 is used. It includes one or more conductor pads 171 and one or more conductor pads 172 to be connected. The conductor pad 171 is a conductor pad (first conductor pad) to be connected to the first component E1, and the conductor pad 172 is a conductor pad (second conductor pad) to be connected to the second component E2 ( (See also Figure 2). The conductor pad 171 is provided in the first component mounting area A1, and the conductor pad 172 is provided in the second component mounting area A2 (see FIG. 2).

In the example of FIG. 1, the first wiring board 10 further includes one or more metal posts 151 and one or more metal posts 152 formed on the surfaces of the conductor pads 171 and 172, respectively. The metal post 151 is a metal post (first metal post) for mounting one part (in the example of FIG. 1, the first part E1) of the plurality of parts to be mounted on the wiring board 1, and The upper surface of the post 151 constitutes a component mounting surface (first component mounting surface F1) on which the one component is mounted. The metal post 152 is a metal post (second metal post) for mounting another component (second component E2 in the example of FIG. 1) among the plurality of components to be mounted on the wiring board 1. The upper surface of the metal post 152 constitutes a component mounting surface (second component mounting surface F2) on which the other component is mounted. No conductor layer is formed on the upper surface of the insulating layer 137, and no conductor other than the metal posts 151 and 152 exists. When the wiring board 1 is used, the metal post 151 connects at least a portion of the electrode pad of one of the components to be mounted on the wiring board 1 (in the example of FIG. 1, the electrode pad E10 of the first component E1). , and the conductor pads 171 of the first wiring board 10 are connected to each other. On the other hand, the metal post 152 connects at least a portion of the electrode pad of another component to be mounted on the wiring board 1 (in the example of FIG. 1, the electrode pad E20 of the second component E2) and the first The conductor pads 172 of the wiring board 10 are connected to each other.

The height of the metal posts 151, 152 with respect to the upper surface of the insulating layer 137 is determined by the thickness of the second wiring board 20 (the height of the metal posts 251, 252 of the second wiring board 20 with respect to the upper surface of the insulating layer 137 (details will be described later). It is adjusted so that it is approximately the same as the height. By adjusting the heights of the metal posts 151 and 152, the component mounting surfaces of the components to be mounted on the wiring board 1 (in the example of FIG. 1, the first component mounting surface F1 and the second component mounting surface F2) are 1 (the second surface 10s of the first wiring board 10), for example, when the wiring board 1 is mounted on a chip mounting machine or the like, components (in the example of FIG. 1) are mounted on the wiring board 1. , the first component E1, and the second component E2), it is considered that the components are stably mounted on the wiring board 1.

In the example of FIG. 1, metal posts 151 and 152 each include a post body 15a formed on conductor pads 171 and 172, and a functional layer 15b formed on post body 15a. The post body 15a may be formed to adjust the height of the metal posts 151, 152. The post body 15a is made of any metal such as copper or nickel. The functional layer 15b can function as a protective layer for the end face of the post body 15a and/or as a bonding layer between the first component E1 or the second component E2 and the post body 15a. The functional layer 15b is formed of, for example, a plating film of nickel, tin, palladium, or gold.

In the example of FIG. 1, post body 15a and functional layer 15b are each depicted as having only one layer. However, the post body 15a and the functional layer 15b may each have a multilayer structure including two or more metal films formed by plating, sputtering, or the like.

In the wiring board of the embodiment, the second wiring board 20 connects at least two components (in the example of FIG. 1, the first component E1 and the second component E2) among the components to be mounted on the wiring board 1. obtain. In the example of FIG. 2, the second wiring board 20 includes wiring patterns 211 and 213 (details will be described later) that connect the first component E1 and the second component E2.

In FIG. 3, only the second wiring board 20 of the wiring board 1 shown in FIG. 1 is shown. FIG. 4 shows an enlarged view of section IV in FIG. 3. As shown in FIG. 3, the second wiring board 20 includes a support 21 provided on the fourth surface 20s side and attached to the first wiring board 10, and a support 21 provided on the third surface 20f of the support 21. The laminate 22 includes a plurality of conductor layers 221 to 225 and a plurality of insulating layers 231 to 235, which are stacked and alternately stacked. The second wiring board 20 is a so-called build-up wiring board manufactured by sequentially forming a plurality of conductor layers 221 to 225 and a plurality of insulating layers 231 to 235.

As shown in FIG. 3, the support body 21 is attached to the fourth surface 20s side of the second wiring board 20. In other words, the laminate 22 is formed on one surface of the support 21. The support 21 shown in FIG. 3 is attached to the laminate 22 by an adhesive layer 23. The support 21 shown in FIG. The adhesive layer 23 includes, for example, an arbitrary insulating material such as epoxy resin. The support 21 has higher rigidity than the laminate 22. Therefore, the laminate 22 is supported by the support 21. Therefore, it is considered that components such as the first component E1 and the second component E2 (see FIG. 1) can be stably mounted on the second wiring board 20 shown in FIG. 3. The support body 21 is preferably configured to include an inorganic material such as silicon or glass, and more preferably configured to include silicon so as to have appropriate rigidity. However, the support 21 may also include an organic material such as an epoxy resin impregnated with a reinforcing material such as glass fiber. When the adhesive layer 23 has high insulating properties, or when there is no conductor layer on the surface of the laminate 22 on the fourth surface 20s side (in the example of FIG. 3, when the conductor layer 221 is not present), the support 21 may be configured to include, for example, a metal material such as copper.

As shown in FIGS. 3 and 4, each of the conductor layers 221 to 225 is patterned to include a predetermined conductor pattern. The conductor layer 225, which is the outermost conductor layer on the third surface 20f side, is connected to components mounted on the wiring board 1 (see first component E1 and second component E2 in FIG. 1) when the wiring board 1 is used. One or more conductor pads 271 and one or more conductor pads 272 are included. In the example of FIGS. 3 and 4, the conductor pad 271 is a conductor pad (first conductor pad) to which the first component E1 is to be connected, and the conductor pad 272 is a conductor pad to which the second component E2 is to be connected. (second conductor pad) (see also FIG. 2). The conductor pad 271 is provided in the first component mounting area A1, and the conductor pad 272 is provided in the second component mounting area A2 (see FIG. 2).

As shown in FIGS. 3 and 4, the conductor layers 221 to 225 include wiring patterns 211 to 215 in addition to the conductor pads 271 and 272. Each of the wiring patterns 211 to 212 has a finer wiring width W1 (see FIG. 4) than each of the wiring patterns 213 to 215, as described later. The intervals between adjacent wiring patterns 211 are arranged at intervals G (see FIG. 4) that are finer than the intervals between wiring patterns 213 and the intervals between wiring patterns 214. The same applies to the spacing between adjacent wiring patterns 212. Each of the wiring patterns 211 to 212 functions, for example, as a signal line that connects arbitrary conductor pads included in any of the conductor layers 221 to 225 to propagate an electric signal having a relatively high frequency. In the illustrated example, each of the wiring patterns 211 of the wiring patterns 211 to 212 connects the conductive pad 271 and the conductive pad 272 as described above (see FIG. 2). Each of the wiring patterns 213 to 214 functions as a signal line for propagating an electric signal by connecting arbitrary conductor pads included in any one of the conductor layers 221 to 225, for example. In the illustrated example, wiring pattern 213 of wiring patterns 213 to 214 connects conductor pad 271 and conductor pad 272 as described above (see FIG. 2). The wiring pattern 214 is a so-called solid pattern, and functions, for example, as a power plane or ground plane through which a relatively large current is passed.

In this way, in the second wiring board 20 included in the wiring board of the embodiment, the plurality of conductor layers (in the illustrated example, conductor layers 221 to 225) are one of the plurality of components to be mounted on the wiring board. , a conductor pad to which one component is connected (for example, conductor pad 271 to which the first component E1 is connected) and a conductor pad to which another component is to be connected (for example, the conductor pad 271 to which the second component E2 is connected). (in the illustrated example, a conductor layer 224 including a wiring pattern 211 and a conductor layer 225 including a wiring pattern 213). In addition, in the description of the embodiment, a first conductive pad such as conductive pad 271 to which the first component E1 is to be connected, a second conductive pad such as the conductive pad 272 to which the second component E2 is to be connected, Among wiring patterns such as wiring patterns 211 and 213, which connect wiring patterns 211 and 213, wiring patterns such as wiring pattern 211 having a fine wiring width W1 and a spacing G are appropriately marked with " Also referred to as "first wiring pattern". Further, a conductor layer such as the conductor layer 224 including the "first wiring pattern" is also appropriately referred to as a "first conductor layer" to distinguish it from other conductor layers.

As shown in FIG. 3, among the conductor layers 221 to 225, the conductor layer 221 is formed at the outermost side on the side opposite to the third surface 20f of the laminate 22. The surfaces of the conductor layer 221 other than the surface opposite to the third surface 20f are covered with an insulating layer 231. Then, on the surface of the insulating layer 231 on the third surface 20f side, the conductor layer 222, the insulating layer 232, the conductor layer 223, the insulating layer 233, the conductor layer 224, the insulating layer 234, the conductor A layer 225 and an insulating layer 235 are formed. The conductor layer 225 is the outermost conductor layer on the third surface 20f side of the second wiring board 20. The third surface 20f of the second wiring board 20 is mainly constituted by the surface of the insulating layer 235 covering the conductor layer 225 facing in the opposite direction to the conductor layer 225. On the other hand, the surface of the laminate 22 on the fourth surface 20s side is constituted by the surfaces of the conductor layer 221 and the insulating layer 231 facing in the opposite direction to the conductor layer 222, respectively.

The second wiring board 20 further includes a via conductor 24 that penetrates one of the insulating layers 231 to 234 and connects each of the conductor layers 221 to 225. The second wiring board 20 includes a plurality of via conductors 24 penetrating each of the insulating layers 231 to 234. The via conductor 24 penetrating the insulating layer 231 connects the conductor layer 221 and the conductor layer 222, the via conductor 24 penetrating the insulating layer 232 connects the conductor layer 222 and the conductor layer 223, and the via conductor 24 penetrating the insulating layer 233 connects the conductor layer 222 and the conductor layer 223. The conductor 24 connects the conductor layer 223 and the conductor layer 224, and the via conductor 24 penetrating the insulating layer 234 connects the conductor layer 224 and the conductor layer 225. Each via conductor 24 is formed integrally with a conductor layer formed above itself. Each via conductor 24 has a tapered shape whose width becomes narrower from the third surface 20f side of the second wiring board 20 toward the fourth surface 20s side. Note that the "width" of the via conductor 24 is the longest distance between two points on the outer periphery of the cross section (or end surface) of the via conductor 24 perpendicular to the Z direction.

In the example of FIG. 3, the conductor pad 271 of the conductor layer 225 and the conductor pad 273 of the conductor layer 221 are connected via a plurality of via conductors 24 (so-called stacked via conductors) stacked at the same position in plan view. has been done. Therefore, it is thought that it becomes easier to form the second wiring board 20 with a small area. Further, unlike the example in FIG. 3, when the via conductor 24 connects the wiring patterns 211 as signal lines, the wiring patterns 211 can be easily connected through a short path, so that the intended electrical characteristics can be obtained. It is thought that it is easy to

In the example of FIG. 3, the second wiring board 20 further includes one or more metal posts 251 and one or more metal posts 252 formed on the surfaces of the conductor pads 271 and 272, respectively. The metal post 251 is a metal post (third metal post) for mounting one component (in the example of FIG. 1, the first component E1) among the plurality of components to be mounted on the wiring board 1. The upper surface of the post 251 constitutes a component mounting surface (first component mounting surface F1) on which the one component is mounted. The metal post 252 is a metal post (fourth metal post) for mounting another component (in the example of FIG. 1, the second component E2) among the plurality of components to be mounted on the wiring board 1. The upper surface of the metal post 252 constitutes a component mounting surface (second component mounting surface F2) on which the other component is mounted. The metal posts 251 and 252 each penetrate the insulating layer 235 and protrude from the upper surface of the insulating layer 235 constituting the third surface 20f of the second wiring board 20. No conductor layer is formed on the upper surface of the insulating layer 235, and no conductor other than the metal posts 251 and 252 exists. When the wiring board 1 is used, the metal post 251 connects at least a portion of the electrode pad of one of the components to be mounted on the wiring board 1 (in the example of FIG. 1, the electrode pad E10 of the first component E1). , and the conductor pads 271 of the second wiring board 20 are connected to each other. On the other hand, the metal post 252 connects at least a portion of the electrode pad of another component to be mounted on the wiring board 1 (in the example of FIG. 1, the electrode pad E20 of the second component E2) and the second component. The conductor pads 272 of the wiring board 20 are connected to each other. Since the first component E1 and the second component E2 are connected to the second wiring board 20 via the metal posts 251 and 252, each component can be easily mounted, and the conductor pads 271 can be short-circuited and the conductor pads 272 can be easily mounted. This may prevent short circuits between the two.

In FIG. 3, the amount of protrusion of the metal posts 251 and 252 from the top surface of the insulating layer 235 is shown to be larger than the amount of protrusion of the conductor layers 221 to 225 from the top surface of each of the insulating layers 231 to 235. However, the amount of protrusion of the metal posts 251 and 252 from the upper surface of the insulating layer 235 is determined by the amount of the electrode pads of the components to be mounted on the wiring board 1 (for example, the electrode pads E10 of the first component E1 and the second component E2 in FIG. The amount of protrusion of the conductor layers 221 to 225 from the upper surface of each of the insulating layers 231 to 235 may be equal to or smaller as long as the metal posts 251 and 252 can be connected.

In the example of FIG. 3, metal posts 251 and 252 each include a post body 25a formed on conductor pads 271 and 272, and a functional layer 25b formed on post body 25a. The post body 25a may be formed to adjust the height of the metal posts 251, 252. The functional layer 15b can function as a protective layer for the end face of the post body 15a and/or as a bonding layer between the first component E1 or the second component E2 and the post body 15a.

The aforementioned conductor layers 221 to 225, via conductor 24, and post body 25a are formed using any metal such as copper or nickel. The conductor layers 221 to 225, the via conductor 24, and the post body 25a are simplified in FIG. 3 and depicted as having only one layer, but as shown in FIG. 4, which is an enlarged view, It may have a multilayer structure including two or more metal films each formed by plating or sputtering.

As shown in FIG. 4, the conductor layer 221 may be formed of a single layer of metal film made of an electroplated film. The conductor layer 221 is embedded in the insulating layer 231, and only the surface on the fourth surface 20s (see FIG. 3) is exposed. On the other hand, the conductor layers 222 to 225 and the post body 25a each include a first layer 220a and a second layer 220b formed on the first layer 220a, and are composed of these two layers of metal films. It may have a two-layer structure. The second layer 220b is entirely formed on the first layer 220a, that is, on the third surface 20f side of the second wiring board 20.

The first layer 220a is made of, for example, a metal film such as an electroless plated film or a sputtered film. The second layer 220b is made of a metal film formed by, for example, plating. The second layer 220b may be a metal film formed by electrolytic plating using the first layer 220a as a power supply layer. The first layer 220a is interposed between the second layer 220b and each insulating layer below each conductor layer. When the first layer 220a is made of a sputtered film, strong adhesion between the conductive layers 222 to 225 and the metal posts 251 and 252, respectively, and the insulating layers 231 to 235 may be obtained. Further, the top surfaces of the conductor layers 222 to 225 and the metal posts 251 and 252 may have high flatness.

As shown in FIG. 4, the functional layer 25b of the metal posts 251, 252 may also have a multilayer structure. In the example of FIG. 4, the functional layer 25b includes a lower layer 25ba formed on the post body 25a and an upper layer 25bb formed on the lower layer 25ba. The upper layer 25bb is made of, for example, tin, palladium, gold, or an alloy thereof. The upper layer 25bb functions as a protective film for the post body 25a and/or a bonding material between the post body 25a and the first component E1 or the second component E2 (see FIG. 1). The lower layer 25ba is made of a metal with appropriate properties, such as nickel, and can function as a barrier film between the upper layer 25bb and the metal posts 251, 252 and/or as a film for reinforcing the adhesion between the two.

In the wiring board of the embodiment, the surface 224a on the third surface 20f side of the "first conductor layer" such as the conductor layer 224 of the second wiring board 20 may be a polished surface finished by polishing. Therefore, the surface 224a may have a surface roughness lower than that of the plating film as it is formed by metal precipitation, for example. Therefore, in the wiring pattern 211 and the like included in the conductor layer 224, it is considered that deterioration in signal transmission characteristics and increase in voltage drop due to a substantial increase in conductor resistance due to the skin effect observed in high-frequency signal transmission are unlikely to occur. For example, a polished surface that a "first conductor layer" such as the conductor layer 224 has as a surface on the third surface 20f side has an arithmetic mean roughness of 0.3 μm or less. If such surface roughness is obtained, the above-mentioned favorable effects regarding transmission characteristics may be obtained.

Moreover, the surface 224a, which is a polished surface, tends to have a uniform height (for example, the distance from the fourth surface 20s (see FIG. 3)) over the entire conductor layer 224. Therefore, the heights of the via conductors 24 formed on the conductor layer 224 are easily made equal, and furthermore, the heights of the metal posts 251 and 252 formed thereon are also easily made equal. As a result, it is considered that the first component E1 and/or the second component E2 (see FIGS. 1 and 2) are stably mounted on the second wiring board 20. Further, when the surface 224a is a polished surface, the thickness of the wiring pattern 211 and the like tends to be substantially constant over its entire length, so that the characteristic impedance of the wiring pattern 211 is less likely to fluctuate. Therefore, reflection loss in the wiring pattern 211 may be suppressed.

Further, the wiring pattern 211 included in the conductor layer 224 of the second wiring board 20 has a wiring width W1 and a distance G between adjacent wiring patterns 211. In the wiring board of the embodiment, a "first conductor layer" such as the conductor layer 224, which includes a "first wiring pattern" such as the wiring pattern 211 that connects the conductor pads 271 and 272, is a "first conductor layer" such as the conductor layer 224. Among the wiring patterns included in the wiring board, it includes wiring patterns arranged at relatively fine pitches. In the wiring board of the embodiment, the minimum value of the wiring width W1 of the wiring pattern included in the "first conductor layer" is 1 μm or more and 3 μm or less, and the minimum value of the interval G between the wiring patterns is 1 μm or more and 3 μm or less. It is. That is, the "first conductor layer" includes a wiring pattern having a wiring width of 3 μm or less and a distance of 3 μm or less between adjacent wiring patterns. In the example of FIG. 4, the wiring width W1 of the wiring pattern 211, which is the first wiring pattern, is 1 μm or more and 3 μm or less, and the interval G between the wiring patterns 211 is 1 μm or more and 3 μm or less.

In the wiring board of the embodiment, a "first conductor layer" such as the conductor layer 224 includes a wiring pattern having such a fine minimum wiring width and a fine minimum wiring interval, and in particular, a wiring pattern such as the wiring pattern 211. The "first wiring pattern" has a fine minimum wiring width and a fine minimum wiring interval. Therefore, it is considered that the first component E1 and the second component E2 (see FIGS. 1 and 2) are connected by a plurality of signal lines occupying a small area. Therefore, in the wiring board of the embodiment, the second wiring board 20 may be realized smaller than the conventional wiring board. Further, in the design of the wiring board of the embodiment having a wiring pattern with such a fine wiring width and wiring interval between the conductor pads connected to the components, there may be a high degree of freedom regarding the arrangement of the two components.

In addition, in this embodiment, the "first wiring pattern" such as the wiring pattern 211, which can have such a fine wiring width, has a wiring thickness T that is larger than the wiring width W1. Therefore, in this embodiment, the first wiring pattern has a relatively large aspect ratio (wiring thickness T of the first wiring pattern/wiring width W1 of the first wiring pattern). Specifically, the aspect ratio of a "first wiring pattern" such as the wiring pattern 211 is 2.0 or more and 4.0 or less. The first wiring pattern having such an aspect ratio can have low conductor resistance despite its small wiring width. Therefore, it is considered that the insertion loss of the wiring pattern 211 connecting the conductive pads 271 and 272 is low. Therefore, a signal can be propagated between the first component E1 and the second component E2 (see FIGS. 1 and 2) with little transmission loss, that is, good transmission efficiency may be obtained. Further, in the signal line connecting the first component E1 and the second component E2, a desired characteristic impedance can be easily obtained, and insertion loss can be further reduced.

In the example of FIG. 4, the wiring thickness T of the wiring pattern 211 that is the first wiring pattern, that is, the thickness of the conductor layer 224 that is the first conductor layer, may be 4 μm or more and 7 μm or less. When such a thickness is obtained, effects such as reduction in insertion loss as described above may be obtained without significantly increasing the thickness of the wiring board of the embodiment.

In the wiring board of the embodiment, any of the conductor layers 221 to 225 of the second wiring board 20 may include a wiring pattern such as the wiring pattern 211 arranged at a relatively fine pitch. In this case, the via conductors 24 arranged at a small pitch, that is, the via conductors 24 having a small width may be preferable, and from this point of view, the via conductors 24 having a large aspect ratio may be preferable. In the second wiring board 20, the aspect ratio of the via conductor 24 may be, for example, 0.5 or more and 1.0 or less. A wiring pattern such as the wiring pattern 211 that is arranged at a fine pitch can be connected to a wiring pattern of a conductor layer different from the conductor layer containing the wiring pattern, maintaining a relatively fine pitch even at the connection portion between the conductor layers. There is. The aspect ratio of the via conductor 24 is shown in FIG. The width of the conductor 24 is W2).

In the wiring board of the embodiment, the conductor layers 222, 223, and 225 of the second wiring board 20 may also be "first conductor layers." Therefore, among the plurality of conductor layers included in the second wiring board 20, in all the conductor layers except the outermost conductor layer (the conductor layer 221 in the example of FIG. 4) on the fourth surface 20s (see FIG. 3), The surface on the third surface 20f side may be a polished surface. In each conductor layer, effects such as good transmission characteristics as described above may be obtained. Further, as described above, the conductor layers 222, 223, and 225 may also include a "first wiring pattern" like the wiring pattern 211 of the conductor layer 224. Therefore, among the plurality of conductor layers included in the second wiring board 20, all the conductor layers except the outermost conductor layer on the fourth surface 20s side have a wiring width of 1 μm or more and 3 μm or less, and a wiring width of 2.0 or more and 4 μm or more. The wiring pattern may include a wiring pattern having an aspect ratio of .0 or less. Furthermore, all the conductor layers except the outermost conductor layer on the fourth surface 20s side may include a wiring pattern having an interval between adjacent wiring patterns of 1 μm or more and 3 μm or less. A wiring pattern with low insertion loss can be obtained in each conductor layer, and in addition, the wiring board of the embodiment can be designed with a higher degree of freedom and can be realized smaller than conventional wiring boards. .

The insulating layers 231 to 234 are interlayer insulating layers interposed between the two conductor layers, and are each formed using an insulating resin. Examples of insulating resins include thermosetting resins such as epoxy resins, bismaleimide triazine resins (BT resins), and phenolic resins, as well as fluororesins, liquid crystal polymers (LCP), fluorinated ethylene (PTFE) resins, and polyesters ( Examples include thermoplastic resins such as PE) resins and modified polyimide (MPI) resins. The insulating layers 231-234 may contain inorganic fillers (not shown) such as silica and alumina. The insulating layers 231 to 234 may include a reinforcing material (core material) such as glass fiber (not shown). However, it may be preferable not to include a reinforcing material in terms of ease of forming wiring patterns arranged at fine pitches.

When the insulating layers 231 to 234 contain an inorganic filler, it is considered preferable to use an inorganic filler with a small particle size (the longest distance between two points on the surface of the inorganic filler). For example, the insulating layers 231 to 234 may include a plurality of inorganic fillers having a particle size of at most 1 μm or less. If the particle size of the inorganic filler contained in each insulating layer is small, short-circuit failures due to leak paths along the inorganic filler are unlikely to occur even between wiring patterns arranged at a fine pitch, such as the wiring pattern 211, for example. There is. Further, it may be easy to form minute via conductors 24 or to form a wiring pattern as exemplified in FIG. 7, which will be referred to later.

Furthermore, in order to obtain good high frequency signal transmission characteristics in the wiring patterns included in each of the conductor layers 221 to 225 included in the second wiring board 20, the insulating layers 231 to 234 preferably have a low dielectric constant and dielectric loss. . For example, at a frequency of 5.8 GHz, the relative permittivity of each of the insulating layers 231 to 234 is approximately 3.0 or more and 4.0 or less, and the dielectric loss tangent is approximately 0.001 or more and 0.005 or less.

The insulating layer 235 covering the conductor layer 225 may also be formed using the same insulating resin as the insulating layers 231 to 234. However, the insulating layer 235 forming the third surface 20f of the second wiring board 20 may be an insulating layer functioning as a solder resist. In that case, the insulating layer 235 may be formed of a material whose main components or additives are different from those of the insulating layers 231 to 234. For example, the insulating layer 235 may be formed using epoxy resin or polyimide resin containing a photosensitizer.

Next, an example of a method for manufacturing the wiring board of this embodiment will be described using as an example the case where the wiring board 1 illustrated in FIG. 1 is manufactured. In addition, unless there is a description different from the description of the material of each component of the wiring board 1 made earlier, each component can be formed using any of the materials previously described for each component.

First, among the wiring boards 1, the first wiring board 10 is prepared (see FIG. 1). A plurality of metal posts 151 and 152 are formed on the surfaces of the conductor pads 171 and 172 of the first wiring board 10. For example, the first wiring board 10 is prepared by laminating an insulating layer and a conductor layer on both sides of a core board using a general method for manufacturing a build-up wiring board. The plurality of metal posts 151 and 152 are formed, for example, by pattern plating using electrolytic plating.

Separately from the first wiring board 10, a second wiring board 20 is prepared as shown in FIGS. 5A to 5K. As shown in FIG. 5A, a support 28 for forming the laminate 22 (see FIGS. 3 and 4) of the second wiring board 20 described above is prepared, and a conductor layer 221 is formed on one surface 28a of the support 28. . In the example of FIG. 5A, the support 28 is selected from a member having higher rigidity than the laminate 22 of the second wiring board 20 to be formed thereon. Therefore, the support body 28 can support the stacked body 22 of the second wiring board 20. In the example shown in FIG. 5A, the support 28 includes a base material 281, a first metal film layer 282 laminated on both surfaces of the base material 281, and a peeling layer formed on the first metal film layer 282. layer 283 and a second metal film layer 284 laminated on the peeling layer 283.

The base material 281 is made of, for example, an inorganic material such as glass or silicone having appropriate rigidity, or an organic material such as an epoxy resin impregnated with a reinforcing material such as glass fiber. First metal film layer 282 and second metal film layer 284 may each be comprised of any metal, such as, for example, copper or a copper/titanium alloy. The peeling layer 283 allows the first metal film layer 282 and the second metal film layer 284 to be attached to each other under a predetermined condition, and by undergoing a specific treatment, the attached first metal film layer 282 and the second metal film layer 284 can be attached to each other. The layer 282 and the second metal film layer 284 may be formed of any material that can be separated. For example, a material that softens or becomes brittle or loses its tackiness through certain treatments may be used for the release layer 283. The release layer 283 may be formed of, for example, a thermoplastic adhesive that softens when heated, a photosensitive adhesive that changes in quality when irradiated with ultraviolet rays, or the like.

The conductor layer 221 is formed, for example, by pattern plating using electrolytic plating. A plating resist (not shown) is provided on the second metal film layer 284 constituting one surface 28a of the support 28, and has an opening corresponding to the formation position of a conductor pattern such as a conductor pad 273 to be included in the conductor layer 221. It will be done. Then, a metal such as copper is deposited in the opening of the plating resist by electrolytic plating using the second metal film layer 284 as a power supply layer, and a conductor layer 221 including a conductor pattern made of the deposited metal is formed. The plating resist is then removed. Note that before the plating resist is removed, the upper surface of the conductor layer 221 (the surface opposite to the support 28) may be polished by any method such as chemical mechanical polishing (CMP). Also in the conductor layer 221, good transmission characteristics may be obtained as described above. During this polishing, the vicinity of the upper surface of the plating resist before being removed may be polished together with the upper surface of the conductor layer 221.

As shown in FIG. 5B, an insulating layer 231 covering the conductor layer 221 is formed on the second metal film layer 284. The insulating layer 231 is formed, for example, by laminating a film-like epoxy resin on the second metal film layer 284 and the conductor layer 221 and bonding them by thermocompression. As mentioned above, the insulating layer 231 (and the insulating layers 232 to 234 formed in a later process (see FIG. 5F)) is made of thermosetting resin such as BT resin or phenol resin, or fluororesin in addition to epoxy resin. It can be formed using a thermoplastic resin such as or LCP. Note that in FIG. 5B and FIGS. 5C to 5K referred to below, depiction of the side opposite to the one surface 28a side of the support body 28 is omitted. However, the conductor layer 221 is formed also on the side opposite to the one surface 28a side of the support body 28 in the process shown in FIG. 5A, and furthermore, the process described with reference to FIGS. may be performed.

A through hole 24a is formed in the insulating layer 231 at a position where the via conductor 24 (see FIG. 3) is to be formed by irradiation with carbon dioxide laser light or the like. After the through-holes 24a are formed, desmear processing is preferably performed to remove resin debris (smear) remaining in the through-holes 24a. The desmear treatment may be a wet treatment involving immersion in a chemical solution such as a permanganate solution, but may also include, for example, argon, tetrafluoromethane, a mixture of tetrafluoromethane and oxygen, or hexafluoride. A dry treatment such as a plasma treatment using a plasma gas such as sulfur chloride or the like may be used. For example, desmear treatment using plasma treatment may suppress erosion of the surface of the insulating layer 231 compared to wet treatment.

Then, a metal film 220aa made of, for example, copper or nickel is formed inside the through hole 24a and over the entire surface of the insulating layer 231 by, for example, sputtering or electroless plating. When the metal film 220aa is formed by sputtering, the metal film 220aa exhibiting high adhesion to the insulating layer 231 may be formed. A part of the metal film 220aa can become the first layer 220a (see FIG. 4) of the conductor layer 222 formed on the insulating layer 231.

As shown in FIG. 5C, a plating resist R1 having an opening R11 is provided on the metal film 220aa. The plating resist R1 is formed, for example, by laminating a dry film resist onto the metal film 220aa, and the opening R11 is formed, for example, by photolithography. The opening R11 is formed in a pattern corresponding to a conductor pattern to be included in the conductor layer 222 (see FIGS. 3 and 4) formed on the insulating layer 231.

As described above, conductor patterns such as the wiring pattern 212 (see FIGS. 3 and 4) included in the conductor layer 222 may have a wiring width of 3 μm or less. Each opening R11 is formed with an opening width corresponding to the wiring width that each conductor pattern such as the wiring pattern 212 formed in each opening R11 should have. Further, as described above, the wiring pattern 212 of the conductor layer 222 may have an aspect ratio of 2.0 or more and 4.0 or less. Therefore, in the method illustrated in FIG. 5C, the plating resist R1 is preferably formed to have a thickness (height) greater than or equal to the thickness (height) of the wiring pattern that satisfies the aspect ratio that the wiring pattern to be formed should have. Ru.

By electroplating using the metal film 220aa as a power supply layer, a metal film 220ba made of, for example, copper or nickel is formed in the opening R11 of the plating resist R1. A part of the metal film 220ba can become the second layer 220b (see FIG. 4) of the conductor layer 222 formed on the insulating layer 231. A via conductor 24 is formed in the through hole 24a of the insulating layer 231. The metal film 220ba may be formed to completely fill the opening R11 and have a curved upper surface that protrudes above the upper surface of the plating resist R1, as in the example of FIG. 5C. A conductive pattern having a desired thickness and aspect ratio may be formed more reliably.

As shown in FIG. 5D, a portion of the upper surface of the metal film 220ba is removed by polishing. At least the protruding portion of the metal film 220ba from the upper surface of the plating resist R1 is removed. The metal film 220ba is polished so that the total thickness with the metal film 220aa reaches the thickness required for the conductor layer 222 (see FIG. 5E) formed on the insulating layer 231, for example, 7 μm or less. be done. As in the example of FIG. 5D, a portion of the upper surface of the plating resist R1 may also be removed along with a portion of the metal film 220ba. The metal film 220ba is polished by any method such as CMP. As a result of polishing, the upper surface of the metal film 220ba may have an arithmetic mean roughness of 0.3 μm or less.

After polishing the metal film 220ba, the plating resist R1 is removed. Further, a portion of the metal film 220aa that is not covered by the metal film 220ba is removed by, for example, quick etching.

As a result, as shown in FIG. 5E, a conductor layer 222 including predetermined conductor patterns such as wiring patterns 212 and 214 separated from each other is obtained. Although the conductor layer 222 is shown in FIG. 5E as having only one layer, as in FIG. 3, the conductor layer 222 includes the metal film 220ba shown in FIG. The metal film 220aa is formed by partially removing the metal film 220aa from the state shown in FIG.

As shown in FIG. 5F, insulating layers 232 to 234 and conductive layers 223 to 225 are alternately formed on the insulating layer 231 and the conductive layer 222. The insulating layers 232 to 234 can be formed, for example, by a method similar to the method for forming the insulating layer 231. Further, the conductor layers 223 to 225 can be formed, for example, by a method similar to the method of forming the conductor layer 222. Each of the conductor layers 223 to 225 is a plating resist having an opening corresponding to a conductor pattern to be included in each conductor layer such as the wiring patterns 211, 213, and 215, such as the plating resist R1 for the conductor layer 222 (see FIG. 5C). is formed using

As shown in FIGS. 5G to 5I, metal posts 251, 252 (see FIG. 5I) are formed. The metal posts 251 and 252 can be formed by a general conductor layer formation method such as a semi-additive method, but in FIGS. 5G to 5I, a method similar to the formation method of the conductor layer 222 described above is shown. A method involving polishing is shown. That is, first, as shown in FIG. 5G, an insulating layer 235 is formed on the conductor layer 225 and the insulating layer 234. The insulating layer 235 is formed, for example, by thermocompression bonding of a film-like epoxy resin, similarly to the formation of the insulating layer 231. As described above, when the insulating layer 235 is an insulating layer that functions as a solder resist, the insulating layer 235 is formed by a method different from that used for the insulating layers 231 to 234, such as by spraying using an epoxy resin or polyimide resin containing a photosensitizer. It may also be formed by a method such as curtain coating.

Through holes 25a are formed in the formed insulating layer 235 by, for example, irradiation with carbon dioxide laser light or photolithography. The through holes 25a are formed at positions where metal posts 251, 252 (see FIG. 5I) are to be formed. After forming the through holes 25a, desmear treatment such as plasma treatment may be performed. Then, a metal film 220ab made of, for example, copper or nickel is formed inside the through hole 25a and over the entire surface of the insulating layer 235 by sputtering or electroless plating.

As shown in FIG. 5H, a plating resist R2 is formed on the metal film 220ab by, for example, laminating a dry film resist. Openings R21 corresponding to the metal posts 251 and 252 are formed in the plating resist R2 by photolithography or the like. Then, a metal such as copper or nickel is deposited in the opening R21 and the through hole 25a exposed in the opening R21 by electrolytic plating using the metal film 220ab as a power supply layer, and a metal film 220bb made of the deposited metal is formed. It is formed. The inside of the opening R21 and the through hole 25a is filled with the metal film 220bb. The metal film 220bb may be formed to have a curved upper surface that protrudes above the upper surface of the plating resist R2, as in the example of FIG. 5H.

As shown in FIG. 5I, a portion of the upper surface of the metal film 220bb is removed by, for example, CMP. A portion of the upper surface side of the plating resist R2 may also be removed together with a portion of the metal film 220bb. The metal film 220bb is polished until the height from the top surface of the conductor layer 225 to the top surface of the metal film 220bb reaches a predetermined height required for the metal posts 251 and 252. As a result, post bodies 25a of the metal posts 251 and 252 are formed, which are composed of a portion of the metal film 220ab and the polished metal film 220bb, and have a predetermined height. The metal films 220ab and 220bb can respectively become a first layer 220a and a second layer 220b (see FIG. 4) that constitute the post body 25a.

As shown in FIG. 5J, the functional layer 25b of the metal posts 251, 252 is formed on the metal posts 251, 252 by, for example, electrolytic plating using the metal film 220ab as a power supply layer. For example, one or more metal films made of nickel, tin, palladium, gold, or the like are formed as the functional layer 25b. After that, the plating resist R2 is removed, and furthermore, the portion of the metal film 220ab that is not covered with the metal film 220bb is removed by, for example, quick etching. As a result, electrically isolated individual metal posts 251, 252 are obtained.

As shown in FIG. 5K, support 28 is removed. For example, when the adhesiveness of the release layer 283 provided on the support body 28 is lost or the release layer 283 itself is softened due to heating or irradiation with ultraviolet rays, the base material 281 and the first metal Membrane layer 282 is separated from second metal membrane layer 284. Thereafter, the second metal film layer 284 is removed by etching or the like, and the surfaces of the conductor layer 221 and the insulating layer 231 on the side opposite to the conductor layer 222 are exposed. As a result, the laminate 22 of the second wiring board 20 shown in FIGS. 3 and 4 is obtained.

Thereafter, a support 21 different from the support 28 is attached via the adhesive layer 23 to one side of the laminate 22 from which the support 28 (see FIG. 5K) has been removed (see FIG. 3). As a result, the second wiring board 20 of the example shown in FIG. 3 is obtained. In the second wiring board 20 obtained in this manner, the adhesive layer 23 has insulating properties, so short circuits between the conductor patterns of the conductor layer 221 of the laminate 22 that are in contact with the adhesive layer 23 are prevented. it is conceivable that.

Further, the second wiring board is attached to the second wiring board in the above-mentioned pasting area A0 using an arbitrary adhesive (not shown) so that the fourth surface 20s of the second wiring board 20 faces the first surface 10f of the first wiring board 10. 20 is attached to the first wiring board 10 (see FIG. 1). Through the above steps, the wiring board 1 of the example shown in FIG. 1 is completed.

FIG. 6 shows an example of an electronic component (multi-chip package device) using the wiring board 1 illustrated in FIG. 1. As shown in FIG. 6, in the multi-chip package device EM, a first component E1 and a second component E2, such as a microcomputer and a memory, are mounted on a wiring board 1 by reflow processing, flip-chip bonding, etc. There is. The second wiring board 20, the metal posts 151 and 152, and the first component E1 and second component E2 are sealed with a mold resin M containing epoxy resin or the like. As described above, the first component E1 and the second component E2 are connected to each other by the first wiring pattern of the second wiring board 20, such as the wiring pattern 211. Therefore, it is considered that good transmission characteristics can be easily obtained in the connection between the first component E1, the second component E2, and the wiring board 1.

<Second embodiment>
Next, a wiring board according to a second embodiment will be described with reference to FIGS. 7 and 8. Note that the wiring board of the second embodiment differs from the wiring board 1 of the first embodiment illustrated in FIG. 1 and the like with respect to the structure of the second wiring board. Therefore, only the second wiring board is shown in FIGS. 7 and 8. FIG. 7 shows a cross-sectional view of a second wiring board 200, which is an example of the second wiring board of the wiring board of the second embodiment, and FIG. 8 shows an enlarged view of section VIII in FIG. has been done. In the following, differences between the second wiring board 200 and the second wiring board 20 will be mainly explained, and descriptions of the same structure and materials used as the second wiring board 20 will be omitted.

As shown in FIG. 7, in the second wiring board 200, the conductor layers 222 to 225 are all insulating layers 231 to 225 that are in contact with each other on the lower side (that is, on the fourth surface 200s side of the second wiring board 200). It is buried in 234. The conductor layer 222 is embedded near the upper surface of the insulating layer 231 (the surface on the third surface 200f side of the second wiring board 200), and the upper surface of the conductor layer 222 (the surface on the third surface 200f side) is embedded in the upper surface. It's exposed. Similarly, the conductor layers 223 to 225 are embedded near the upper surface (surface on the third surface 200f side) of each of the insulating layers 232 to 234, and the upper surface of each conductor layer (surface on the third surface 200f side) is embedded in the vicinity of the upper surface (surface on the third surface 200f side) of each of the insulating layers 232 to 234. surface) is exposed.

Also in the second wiring board 200 of the wiring board of this embodiment, the conductor layer 225, which is the outermost conductor layer on the third surface 200f side, is similar to the second wiring board 20 shown in FIGS. 1 to 4. The first component E1 and the second component E2 (see FIG. 1) each include a conductive pad 271 and a conductive pad 272 to be connected. Although not shown, in the second wiring board 200 as well, the wiring pattern 211 included in the conductor layer 224 has a conductor pad 271 and a conductor pad 272, similar to the second wiring board 20 shown in FIGS. They are connected via via conductors 24. That is, in the second wiring board 200 as well, the wiring pattern 211 is the above-mentioned "first wiring pattern", and the conductor layer 224 is the above-mentioned "first conductor layer". Similarly, in the second wiring board 200, the wiring pattern 213 connects the conductor pads 271 and 272.

Also in the second wiring board 200, the minimum wiring width of the wiring pattern included in the conductor layer 224, which is the "first conductor layer" (for example, the wiring width of the wiring pattern 211, which is the "first wiring pattern") is It is 1 μm or more and 3 μm or less. Further, the minimum spacing between the wiring patterns included in the conductor layer 224 (for example, the spacing between the wiring patterns 211) is 1 μm or more and 3 μm or less, and the aspect ratio of the wiring patterns 211 is 2.0 or more and 4.0 It is as follows. Furthermore, in this embodiment, the surfaces of all the conductor layers 222 to 225, including the surface 224a of the conductor layer 224 (see FIG. 8), on the third surface 200f side of the second wiring board 200 are polished surfaces. Note that in the second wiring board 200, the wiring patterns included in each of the conductor layers 222 to 225 may connect the conductor pads 271 and 272. Therefore, each of the conductor layers 222 to 225 may be a "first conductor layer", and the wiring pattern included in each of the conductor layers 222 to 225 may be a "first wiring pattern".

As shown in FIG. 8, each of the insulating layers 231 to 234 has a recess 230r on the surface of the second wiring board 200 on the third surface 200f side. For example, the insulating layer 231 has a recess 230r on the surface 231a, and the insulating layer 233 has a recess 230r on the surface 233a. The via conductor 24 is formed in a through hole 24b that passes through each insulating layer and communicates with the recess 230. On the other hand, the conductor layers 222 to 225 are each made of a conductor that fills the recess 230r of each insulating layer. That is, the conductor layer 222 is formed within the recess 230r of the insulating layer 231, and similarly, the conductor layers 223-225 are formed within the recess 230r of the insulating layers 232-234, respectively. In each conductor layer having such a structure, it is difficult for conductor residues to exist between each conductor pattern such as the wiring pattern 211, and therefore it is considered that short circuit failures are unlikely to occur. Then, it may be possible to realize wiring patterns arranged at even finer pitches.

Similar to the wiring board 1 of FIGS. 1 to 3, the conductor layers 222 to 225 are, for example, a first layer 220a that is a sputtered film, and an electroplated film that is formed on the first layer 220a. and a second layer 220b. In the second wiring board 200, the first layer 220a is formed along the bottom and wall surfaces of the recess 230r. That is, in a conductor pattern such as the wiring pattern 211 that each of the conductor layers 222 to 225 has, the first layer 220a covers the lower surface and side surface of the second layer 220b. The first layer 220a is interposed between the second layer 220b and the insulating layer in which each conductor layer is embedded.

As described above, the surface (upper surface) of the conductor layers 222 to 225 on the third surface 200f side of the second wiring board 200 is a polished surface. The surfaces of the insulating layers 231 to 234 on the third surface 200f side may also be polished surfaces. Each of the conductor layers 222 to 225 has its polished surface on the third surface 200f side exposed to the surface of the insulating layers 231 to 234 on the third surface 200f side. Furthermore, the surfaces of the conductor layers 222 to 225 on the third surface 200f side are substantially flush with the surfaces of the insulating layers 231 to 234 on the third surface 200f side, respectively. For example, the conductor layer 222 has its surface 222a exposed on the surface 231a of the insulating layer 231, and the surfaces 222a and 231a are substantially flush with each other. The surface 224a and the surface 233a are substantially flush with each other. In this way, since the exposed surfaces (polished surfaces) of each of the conductor layers 222 to 225 are flush with the surface of the insulating layer in which each conductor layer is buried, the second It is considered that high flatness can be obtained on the third surface 200f of the wiring board 200. It is considered that components such as the first component E1 and the second component E2 (see FIG. 1) can be stably mounted on the second wiring board 200.

Although omitted in FIG. 7, in this embodiment, the insulating layers 231 to 234 may include a barrier layer 230a, as shown in FIG. 8. The surface of the barrier layer 230a on the third surface 200f side of the second wiring board 200 is the bottom surface of the recess 230r, that is, the surface opposite to the third surface 200f of the second wiring board 200 in each of the conductor layers 222 to 225. It is in contact with the fourth surface (the surface on the 200s side (see FIG. 7)). The insulating layers 231 to 234 in the example of FIG. 8 are constituted by a barrier layer 230a and a main body layer 230b forming portions above and below the barrier layer 230a. The main body layer 230b is made of thermosetting resin such as epoxy resin or various thermoplastic resins, which are exemplified as the material of each insulating layer of the second wiring board 20 shown in FIGS. 1 to 4.

On the other hand, the barrier layer 230a is formed of a material that has higher resistance to the processing means used to form the recesses 230r in each insulating layer than the constituent material of the main body layer 230b. For example, when the recess 230r is formed by laser processing using excimer laser light, the barrier layer 230a may be formed of silicon oxide or silicon nitride. When the insulating layers 231 to 234 include such a barrier layer 230a, it may be easy to form a recess 230r having a desired depth. Note that the barrier layer 230a does not need to be included in each insulating layer in this embodiment. For example, the recess 230r with a desired depth can be formed by adjusting the processing conditions for forming the recess 230r, such as the power of the laser beam.

Note that when the insulating layers 231 to 234 including the barrier layer 230a illustrated in FIG. 8 are formed, lamination and thermocompression bonding of film-like resin are performed twice in forming the insulating layer 231 and the like described above. A barrier layer 230a is formed therebetween. That is, by the first lamination and thermocompression bonding of the film-like resin, the main body layer 230b below the barrier layer 230a in the insulating layers 231 to 234 is formed. Thereafter, a silicon oxide film or a silicon nitride film is formed as a barrier layer 230a on the main body layer 230b, for example, by sputtering. By performing a second lamination and thermocompression bonding of a film-like resin on the barrier layer 230a, a main body layer 230b above the barrier layer 230a is formed.

With reference to FIGS. 9A to 9D, a method for manufacturing the wiring board of the second embodiment will be described, taking as an example the case where the second wiring board 200 of FIGS. 7 and 8 is manufactured. As described above, the second wiring board 200 included in the wiring board of the second embodiment is different from the wiring board 1 of the first embodiment illustrated in FIG. Since they are different, the method for forming the conductor layers 222 to 225 of the second wiring board 200 (representatively the method for forming the conductor layer 222) will be mainly explained.

As shown in FIG. 9A, from the state shown in FIG. 5A referred to above, an insulating layer 231 is formed, a through hole 24b is formed in the insulating layer 231, and a recess 230r is further formed. At the stage shown in FIG. 9A, the insulating layer 231 may be formed thicker than the thickness that the insulating layer 231 should have when the second wiring board 200 is completed. In forming the insulating layer 231, the barrier layer 230a (see FIG. 8) may be formed using the method described above. The through hole 24b is formed at the formation position of the via conductor 24 (see FIG. 7), for example, by irradiation with carbon dioxide laser light. When the barrier layer 230a is formed, the through hole 24b is formed so as to penetrate through the barrier layer 230a and reach the conductor layer 221.

After the through holes 24b are formed, recesses 230r are formed at the formation positions of each conductor pattern in the conductor layer 222 (see FIG. 7). For example, the recess 230r with a predetermined depth is formed by irradiation with excimer laser light. When the barrier layer 230a illustrated in FIG. 8 is formed, the barrier layer 230a prevents laser light from passing through, so it may be possible to easily form the recess 230r with a desired depth. Even if the barrier layer 230a is not formed, the recess 230r of a desired depth can be formed by, for example, adjusting the conditions of the excimer laser beam, as described above. After forming the recesses 230r, desmear processing, such as plasma processing, is preferably performed.

As shown in FIG. 9B, a metal film 220aa is formed over the entire exposed surface of the insulating layer 231, including the inside of the through hole 24b and the recess 230r. FIG. 9B is an enlarged view of the IXB section shown in FIG. 9A after the metal film 220aa is formed. When the barrier layer 230a is formed, the metal film 220aa is also formed on the exposed surface of the barrier layer 230a. The metal film 220aa is formed by, for example, sputtering or electroless plating.

As shown in FIG. 9C, a metal film 220ba is formed inside the through hole 24b, inside the recess 230r, and on the entire surface (upper surface) of the insulating layer 231 on the side opposite to the conductor layer 221. The metal film 220ba is preferably formed to have a desired thickness on a region of the upper surface of the insulating layer 231 where the recess 230r is not formed. The metal film 220ba is formed, for example, by electroplating using the metal film 220aa (see FIG. 9B) as a power supply layer. The recess 230r is filled with the metal film 220ba. The inside of the through hole 24b is also filled with the metal film 220ba to form the via conductor 24.

As shown in FIG. 9D, the metal film 220ba and metal film 220aa (see FIG. 9B) on the upper surface of the insulating layer 231 are removed by polishing using an arbitrary method such as CMP. The metal film 220ba is polished until the total thickness of the metal film 220aa on the bottom surface of the recess 230r reaches the thickness required for the conductor layer 222. When polishing the metal film 220ba, the vicinity of the upper surface of the insulating layer 231 may also be removed together with the metal film 220ba. A surface 231a of the insulating layer 231 that is flush with the surface 222a of the conductor layer 222 is obtained.

By removing the metal film 220ba and the metal film 220aa (see FIG. 9B) on the upper surface of the insulating layer 231, the conductor patterns of the conductor layer 222 are separated from each other. A conductor layer 222 containing the desired conductor pattern and having the desired thickness is obtained. In the method described with reference to FIGS. 9A to 9D, the conductor such as the metal film 220aa formed between each conductor pattern included in the conductor layer 222 is more reliably removed by polishing rather than etching. removed. Therefore, it is considered that short-circuit defects between conductor patterns are unlikely to occur. Furthermore, since such short circuit failures are less likely to occur, the wiring patterns may be arranged at even finer pitches.

Thereafter, insulating layers 232-234 and conductor layers 223-225 (see FIG. 7) are alternately formed in a manner similar to that described with reference to FIGS. 9A-9D. Thereafter, the insulating layer 235 and metal posts 251, 252 are formed using the method previously described with reference to FIGS. 5G to 5J. Further, the support plate 28 and the second metal film layer 284 are removed by the method described with reference to FIG. 23 (see FIG. 7). As a result, the second wiring board 200 of the example shown in FIG. 7 is obtained.

Thereafter, the second wiring board is attached in the above-mentioned pasting area A0 using an arbitrary adhesive (not shown) so that the fourth surface 200s of the second wiring board 200 faces the first surface 10f of the first wiring board 10. 200 is attached to the first wiring board 10 (see FIG. 1). Through the above steps, the wiring board according to the second embodiment is completed.

The wiring board of the embodiment is not limited to the structure illustrated in each drawing and the structure, shape, and material illustrated in this specification. As mentioned above, wiring boards of embodiments may include any number of conductive layers and insulating layers. A wiring pattern (first wiring pattern) that connects conductor pads to which mounted components are to be connected may be formed in one or more arbitrary number of conductor layers. The metal posts 251 and 252 provided in the second wiring board 20 illustrated in FIGS. 3 and 4 or the second wiring board 200 illustrated in FIGS. 7 and 8 are connected to electrodes of mounted components and conductor pads of the second wiring board. If it is possible to connect directly, it is not necessarily provided.

1 Wiring board 10 First wiring board 10f First surface 10s Second surface 151 Metal post (first metal post)
152 Metal post (second metal post)
20, 200 Second wiring board 20f, 200f Third surface 20s, 200s Fourth surface 21 Support body 211 Wiring pattern (first wiring pattern)
212 to 215 Wiring pattern 220a First layer 220b Second layer 224 Conductor layer (first conductor layer)
224a Surfaces 221 to 223, 225 of conductor layer (first conductor layer) Conductor layer 230r Recesses 231 to 235 Insulating layer 24 Via conductor 251 Metal post (third metal post)
252 Metal post (4th metal post)
271 Conductor pad (first conductor pad)
272 Conductor pad (second conductor pad)
A1 First component mounting area A2 Second component mounting area E1 First component E2 Second component F1 First component mounting surface F2 Second component mounting surface G Interval between wiring patterns (first wiring pattern) W1 Wiring pattern (first Wiring width T of the wiring pattern (wiring pattern) Wiring thickness D of the wiring pattern (first wiring pattern) Thickness W2 of the via conductor Width Z of the via conductor Thickness direction of the wiring board

Claims (9)

a first wiring board having a first surface and a second surface opposite to the first surface;
a second wiring board having a third surface and a fourth surface opposite to the third surface;
A wiring board comprising:
The second wiring board includes a plurality of conductor layers and a plurality of resin insulation layers that are alternately laminated,
The second wiring board has a support on the fourth surface, and is attached to the first wiring board so that the fourth surface faces the first surface,
Of the plurality of conductor layers, the outermost conductor layer on the third surface side includes a first conductor pad to which the first component is to be connected, and a second conductor pad to which the second component is to be connected. It's here,
The plurality of conductor layers include a first conductor layer including a first wiring pattern connecting the first conductor pad and the second conductor pad,
The surface of the first conductor layer on the third surface side is a polished surface,
The minimum wiring width of the wiring pattern included in the first conductor layer is 3 μm or less,
The minimum interval between wiring patterns included in the first conductor layer is 3 μm or less,
The first wiring pattern has an aspect ratio of 2.0 or more and 4.0 or less. The wiring board according to claim 1,
The wiring width of the first wiring pattern is 3 μm or less,
The distance between the first wiring patterns is 3 μm or less. The wiring board according to claim 1,
The support includes an inorganic material. The wiring board according to claim 2,
The thickness of the first wiring pattern is 7 μm or less. The wiring board according to claim 1,
The second wiring board further includes a via conductor that penetrates any one of the plurality of resin insulating layers and connects each conductor layer of the plurality of conductor layers,
The via conductor has an aspect ratio of 0.5 or more and 1.0 or less. The wiring board according to claim 1,
The plurality of conductor layers include a first layer made of a sputtered film and a second layer made of a metal film formed on the first layer. The wiring board according to claim 1,
The plurality of resin insulating layers include a resin insulating layer having a recessed portion on the third surface side,
The plurality of conductor layers are made of a conductor filling the recessed portions, and expose the surface on the third surface side, which is the polished surface, to the surface of each of the plurality of resin insulating layers. The wiring board according to claim 1,
The first wiring board has a first metal post and a second metal post that respectively protrude from the first surface,
The second wiring board has a third metal post formed on the first conductor pad, and a fourth metal post formed on the second conductor pad,
The upper surfaces of the first metal post and the third metal post constitute a first component mounting surface on which the first component is to be mounted,
The upper surfaces of the second metal post and the fourth metal post constitute a second component mounting surface on which the second component is to be mounted. The wiring board according to claim 8,
The area of the second wiring board is the sum of the area of the first component mounting area where the first component is to be mounted and the area of the second component mounting area where the second component is to be mounted, in plan view. smaller than the area.

Images