JP2023179125A - Digital audio signal synchronization device and program - Google Patents

Abstract

To provide a digital audio signal synchronization device and program that, even when one system receives a digital audio signal in different synchronization system containing non-PCM data, can pull the received signal into synchronization of the system with the data of the digital audio signal being retained in bit units, in a large facility consisting of a combination of multiple systems operating in different synchronization systems.SOLUTION: An audio signal synchronization device 1 is provided with: a buffer section 2 that temporarily stores input digital audio signals and performs clearing processing as necessary; a sample number adjustment section 3 that performs thinning or insertion of the digital audio signals to accommodate difference in clock speed between the input digital audio signals and synchronization signals; and an audio signal playback section 4 that plays back the digital audio signals read from the buffer section 2 in sync with the synchronization signals.SELECTED DRAWING: Figure 1

Description

In a large-scale facility configured by a combination of a plurality of systems operating in different synchronization systems, the present invention enables bit-by-bit processing even when one system receives digital audio signals of different synchronization systems. The present invention relates to a digital audio signal synchronization device and a program that can synchronize a system that receives the digital audio signal while the data of the digital audio signal is held.

First, abbreviations used in this specification will be explained.
“ADM” stands for Audio Definition Model, and is a standardized metadata model for describing the technical characteristics of audio. "S-ADM" is an abbreviation for Serial Audio Definition Model.
"AES" is an abbreviation for Audio Engineering Society, and standards established by the association are prefixed with "AES."
"IEC" is an abbreviation for International Electrotechnical Commission, and the standards established by the same commission are also prefixed with "IEC."
"MADI" is an abbreviation for Multichannel Audio Digital Interface, and is an interface technology standard (AES10) that enables multi-channel long-distance audio transmission with sample-level accuracy. MADI-X (MADI-Extended), which was expanded in 2001, supported variable pitch with a sampling rate of 48kHz±1% and 64 channels.
"PCM" is an abbreviation for Pulse Code Modulation.
"SDI" is an abbreviation for Serial Digital Interface.
"SMPTE" is an abbreviation for the Society of Motion Picture and Television Engineers, and is also the symbol given to the standards established by the society.
"ST" is an abbreviation for Standard.

When using object-based audio in broadcasting or streaming services, it is necessary to transmit the audio signal and audio metadata together. As one of the transmission methods, the method of storing and transmitting serially expressed international standard audio metadata (S-ADM) in AES3, which is widely used as a professional digital audio signal, has been standardized internationally. (Non-Patent Document 1), it is possible to synchronize and transmit audio signals and audio metadata on a sample-by-sample basis.

This transmission method is based on a standard (Non-Patent Document 2) that stores and transmits non-PCM data such as encoded audio signals instead of PCM in an area for storing AES3 audio signals. The stored data can be handled and recorded, reproduced, and transmitted in the same way as audio signals, and the advantage is that there is no need to prepare a special recording/reproducing device or cable for non-PCM data. However, in order to correctly decode the stored non-PCM data, the data needs to be held in bits (no omissions) before and after transmission.

On the other hand, large-scale facilities such as broadcasting stations are made up of a combination of many systems, from relay destinations to in-house studios, sub-control rooms to main control rooms, and so on. When transferring PCM digital audio signals between multiple systems operating in different synchronization systems, it is common to insert a sampling rate converter to bring the audio signals into synchronization with the receiving system. be. Here, since the sampling rate of audio signals used by broadcasting stations is basically unified to a constant value (48 kHz, etc.), there is no need to convert the sampling rate itself; all that is required is to bring the audio signal into synchronization with the receiving system. is often the purpose.

SMPTE ST 2116 Format for Non-PCM Audio and Data in AES3 - Carriage of Metadata of Serial ADM (Audio Definition Model)

SMPTE ST 337 Format for Non-PCM Audio and Data in an AES3 Serial Digital Audio Interface

When transmitting non-PCM data such as S-ADM, which is acoustic metadata for object-based audio, and encoded audio signals within large-scale facilities such as broadcasting stations, audio signals are exchanged between studios, etc. In some cases, it is necessary to bring the audio signal into synchronization on the receiving side, similar to PCM. However, conventional sampling rate converters convert the received digital audio signal back into the waveform of an analog audio signal (or a digital audio signal with a high sampling rate that can be considered equivalent to an analog audio signal) (oversampling), The signal is resampled at an appropriate sampling rate based on the synchronization signal of the receiving system to bring it into new synchronization, so even if the sampling rate is the same before and after transmission and reception (input and output) between studios, digital audio The bit string of the signal is not retained, and if non-PCM data such as S-ADM was being transmitted, data would be missing.

In order to retain the bit string of a digital audio signal and pull it into a different synchronization, the simplest method would be to add a delay to the original digital audio signal to align the timing with the synchronization signal to which it is pulled. However, in general, synchronized signal sources used to generate digital audio signals have slight errors in each signal source even if they are set to the same clock frequency, and even if a delay is added, accurate synchronization cannot be achieved, resulting in noise. It was the cause of this.

Also, by temporarily decoding the original non-PCM data, re-encoding it, and storing it in AES3 again, it is possible to pull the same data into the synchronization system of the receiving system even though the bit string itself is not retained. However, this was not practical from the perspective of increased equipment costs due to the need for decoding and encoding processing capabilities in all synchronization devices within the facility, and from the standpoint of quality deterioration due to repeated encoding and decoding.

The object of the present invention, which was made in view of the above circumstances, is that in a large-scale facility configured by a combination of a plurality of systems operating in different synchronous systems, one system operates in different synchronous systems including non-PCM data. To provide a digital audio signal synchronizing device and a program capable of synchronizing a receiving system even when a digital audio signal is received, while data of the digital audio signal is held bit by bit. There is a particular thing.

The digital audio signal synchronization device according to the present invention includes a buffer unit that temporarily stores an input digital audio signal and performs clearing processing as necessary, and a clock speed adjustment device for the input digital audio signal and the synchronization signal. A sample number adjustment section that thins out or inserts the digital audio signal in order to accommodate the difference, and an audio signal playback section that plays back the digital audio signal read from the buffer section in synchronization with the synchronization signal. .

The buffer unit may temporarily store non-PCM data stored in the digital audio signal.

The buffer section detects a data burst of non-PCM data stored in the digital audio signal based on the data of the digital audio signal, and clears the buffer section during a period in which the non-PCM data is not input. Alternatively, the read/write interval may be reset.

The sample number adjustment unit detects overflow or underflow of the buffer unit caused by a difference in clock speed between the input signal and the synchronization signal, and detects the overflow in a 0 data interval between data bursts of non-PCM data. The number of samples of the digital audio signal may be adjusted by thinning out 0 data when the underflow is detected, and inserting 0 data when the underflow is detected.

The digital audio signal synchronizer includes a non-PCM data determination unit that determines non-PCM data in order to distinguish between non-PCM data and PCM data stored in the digital audio signal and separate subsequent processing; A sampling rate converter synchronizes the PCM data with the synchronization signal by performing sampling rate conversion processing on the converted PCM data, and a sampling rate converter that performs sampling rate conversion processing on the PCM data, and temporarily stores non-PCM data in the buffer section. The apparatus may further include a delay unit that aligns the timings of the PCM data and non-PCM data by adding a delay equivalent to the delay.

Further, the present invention may be a program for controlling a computer, and a digital audio signal synchronization program for causing the computer to function as the digital audio signal synchronization device.

According to the present invention, in a large-scale facility configured by a combination of a plurality of systems operating in different synchronous systems, one system receives digital audio signals of different synchronous systems including non-PCM data. Even in cases where data is not lost, it is possible to synchronize the receiving system while preventing data loss.

1 is a diagram showing a configuration example of an audio signal synchronization device 1 of the present invention. 1 is a diagram showing an example of implementation of the audio signal synchronization device 1 of the present invention. FIG. It is a figure which shows the other implementation example of the audio signal synchronization apparatus 1 of this invention. It is a processing flowchart of the audio signal synchronization device 1 of the present invention. 1 is a diagram showing a configuration example of Example 1. FIG. 3 is a processing flowchart of Example 1. FIG. FIG. 3 is a diagram illustrating an example of pointer processing.

Embodiments of the present invention will be described in detail below with reference to the drawings.
FIG. 1 is a block diagram showing a configuration example of an audio signal synchronization device 1 according to an embodiment of the present invention. The audio signal synchronization device 1 shown in FIG. 1 includes a buffer section 2, a sample number adjustment section 3, and an audio signal reproduction section 4.

The audio signal synchronizer 1 temporarily stores the input digital audio signal including non-PCM data in the buffer unit 2, and uses the sample number adjustment unit 3 to adjust the number of samples due to a slight error in the input/output clock frequency. After adjusting the deviation appropriately, the audio signal reproducing section 4 reproduces the digital audio signal in synchronization with the synchronization signal.

The audio signal synchronizer 1 is typically installed as an input section of a system that receives a synchronous digital audio signal. In this case, since reception of a digital audio signal in the receiving system is input to the system, "reception" in the receiving system may be considered to be synonymous with "input." Similarly, "transmission" in the sending system may be considered to be synonymous with "output". However, it should be noted that the "system" here may be a single device or a combination of multiple devices.

FIG. 2 is a diagram showing one implementation example of the audio signal synchronization device 1, and FIG. 3 is a diagram showing another implementation example of the audio signal synchronization device 1. FIG. 2 shows equipment configured by a combination of studio A and studio B operating in different synchronous systems, and FIG. 3 shows only the studio B side of the equipment. In the implementation example shown in FIG. 2, the audio signal synchronizer 1 is implemented as an input section of studio B, which is a system that receives digital audio signals, and in the implementation example shown in FIG. 3, it is implemented as an input section of an audio console in studio B. Implemented. Here, the sync signal generated by sync signal generator A in studio A and the sync signal generated by sync signal generator B in studio B are set to the same clock frequency, but there may be a slight error. be.

FIG. 4 is an example of a flowchart showing a processing procedure of the audio signal synchronization device 1 according to an embodiment of the present invention. Each process will be explained below with reference to the flow shown in FIG.

The audio signal synchronizer 1 of the present invention first stores input digital audio signals of different synchronization systems in the buffer section 2 (step 101 in FIG. 4). Writing and reading data on the buffer causes a certain delay in the entire process, but the device can automatically adjust the buffer size to the shortest size required for subsequent processing, or The user may manually determine the size to ensure a margin, or if the input audio signal is assumed to match the video, the size may be determined to be the same time length as one frame of the video signal. You may.

Next, the non-PCM data stored in the buffer section 2 is checked, and it is determined whether there is a silent section that continues for a certain period of time (step 102). If a certain silent period (for example, a period of several seconds, which is relatively long compared to the transmission cycle of non-PCM data) cannot be detected ("No" in step 102), the process proceeds to the sample number adjustment section 3, which will be described later. If a silent section of a certain length or more is detected ("Yes" in step 102), it is determined that the transmission of non-PCM data is interrupted, the data accumulated in the buffer is cleared (step 103), and the data is input again. Start storing the data. By clearing the data stored in the buffer section 2 at any time, buffer overflows and underflows that may occur due to the accumulation of slight clock frequency errors between the input audio signal and the destination synchronization signal can be prevented. It can be prevented. Even if the non-PCM data is not interrupted, if the user can determine that the data currently stored in the buffer is unnecessary, the buffer may be forcibly cleared by the user's intentional operation.

Here, instead of clearing all the data accumulated in the buffer unit 2, adjusting the data write position and read position on the buffer may be used instead of clearing the buffer. For example, if the writing speed is faster than the reading speed, the write pointer is rewound within the silent interval, or conversely, when the reading speed is faster than the writing speed, null data separate from the buffer is temporarily stored in the silent interval. It is also possible to return the difference between the write pointer and read pointer to the same value as when the process started, thereby preventing buffer overflow or underflow. The buffer in this case is preferably one that does not run out even if continuous reading and writing is performed, such as a ring buffer in which the beginning and end are connected.

Since the content of the non-PCM data transmitted in Non-Patent Document 2 is encoded audio signals and metadata, the amount of data is generally smaller than that of the corresponding PCM data. Therefore, non-PCM data is stored in a certain amount of continuous digital audio signals and transmitted, ie, so-called burst transmission is performed, and 0 data is embedded in the period until the next data burst is transmitted. The standard in Non-Patent Document 2 limits the period from one data burst to the next to a maximum of 4096 samples, so 4096 samples may be used as is for determining the silent period of the audio signal synchronization device. , if it is known in advance that a data burst of non-PCM data will be input at a certain period, a length that matches that period may be used, or a length specified by the standard in Non-Patent Document 2 may be used. The silent section may be identified by confirming data on the number of bytes of the data burst (referred to as Pd) written in the fourth audio sample of the data burst.

If silence cannot be detected continuously for a certain period of time in step 102, then the sample number adjustment unit 3 compares the clock speeds of the input signal and the synchronization signal (output signal) (step 104). The clock speeds may be directly compared, or the speed difference may be determined based on a change in the positional relationship between the write pointer and read pointer of the buffer. The audio signal synchronizer of the present invention assumes that the sampling rate of the input signal and the synchronization signal are set to be the same, but a slight error in the clock speed and an overflow or underflow of the buffer due to the accumulation of errors may occur. (“overflow” or “underflow” in step 105). If the buffer is cleared sequentially in buffer unit 2, it can be determined that overflow or underflow is prevented, but if non-PCM data continues to be transmitted without interruption for a long time, If the clearing cannot be performed, the process proceeds to adjusting the number of samples (steps 106 to 108) as a countermeasure against overflow or underflow.

Specifically, data (sample) of a digital audio signal that is the starting point of a data burst is detected, and 0 data is thinned out or 0 data is inserted in the embedding section immediately before that data. In Non-Patent Document 2, special data called Pa and Pb are stored in the first and second samples of the data burst in order to indicate the starting point of the data burst. For Pa and Pb, the data size is defined according to the bit depth of the digital audio signal, for example, Pa is 0xF872 when the bit depth is 16 bits, and 0x96F872 when it is 24 bits. In addition, it is also specified that 4 or more samples of embedded 0 data are consecutively placed immediately before Pa and Pb. If there were only two samples of Pa and Pb, the PCM audio signal or encoded data would coincidentally become the same bit string as Pa and Pb, and there was a possibility that a data burst would be erroneously detected, but when combined with the previous four samples, By detecting a data burst using 6 samples (0, 0, 0, 0, Pa, Pb), it is possible to reduce the possibility of false detection to a level that poses no problem in practice.

When it is determined that overflow and underflow will not occur, such as when the buffer is being cleared sequentially in the buffer section 2, or when the clock speeds of the input signal and the synchronization signal match with extremely high precision ( In step 105, the number of samples is not adjusted if "other").

Here, even if errors accumulate to a certain extent, you can accept the errors and wait for the timing when the buffer can be cleared without thinning out or inserting 0 data as long as overflow or underflow does not occur (buffer clear priority mode), zero data may be successively thinned out or inserted when the accumulation of errors exceeds one sample of the audio signal (sample number adjustment priority mode).

In addition, in the sample number adjustment priority mode, when thinning out or inserting 0 data sequentially when the accumulation of errors exceeds one sample of the audio signal, the number of samples of 0 data to be thinned out/inserted is naturally 1 sample. becomes.

On the other hand, in buffer clear priority mode, errors are allowed until overflow or underflow occurs, so basically no thinning/insertion is performed, but the buffer can be cleared if the program length is extremely long. If the timing does not arrive for a long time and errors accumulate to the extent that overflow or underflow of the buffer is likely to occur, thinning/insertion or forced clearing of the buffer must be performed. When performing thinning/insertion, one sample may be thinned out/inserted as in the sample number adjustment priority mode, or a plurality of samples may be thinned out/inserted at once in order to reduce the adjustment timing. However, the 0 data that can be adjusted periodically is guaranteed only for 4 samples before Pa and Pb, so even if multiple samples are used, the limit is 4 samples, and 0 data is thinned out/inserted in buffer clear priority mode. In this case, the number of samples is 1 to 4 samples.

In buffer clear priority mode, the digital audio signal input to the device is completely retained until the buffer is cleared, or until errors accumulate and it becomes necessary to thin out or insert 0 data. , higher stability can be expected with respect to the operation of a system that connects audio signals via this device. On the other hand, in sample number adjustment priority mode, when handling PCM data and non-PCM data separately as described later, the absolute times of PCM data and non-PCM data are matched in data burst units, resulting in a higher time You can expect accurate results.

Finally, the audio signal reproducing unit 4 reproduces the non-PCM data for which the number of samples has been adjusted or for which it has been determined that adjustment is not necessary, in synchronization with the synchronization signal (step 110). Thereafter, the series of processing is repeated until the audio signal synchronization device 1 is stopped.

In addition, with AES3 and MADI (AES10), which is an extension of AES3, it is possible to transmit data from multiple channels in one audio stream, and it is possible that a mixture of PCM data and non-PCM data may be input. . In that case, the series of processes described above may also be applied to PCM data, or the channels of PCM data and channels of non-PCM data may be separated and separate processes may be applied before applying the series of processes. In the latter case, for example, the above series of processing is performed on non-PCM data, conventional sampling rate conversion processing is performed on PCM data, and each processing is completed after adding the delay caused by processing of non-PCM data. The PCM data and non-PCM data are output as one audio stream.

In the case of PCM data, if samples are forcibly inserted or thinned out, even if only one sample is processed, audible noise may occur. If the buffer cannot be cleared in the buffer section 2 and samples need to be inserted or thinned out, the PCM data can be synchronized using conventional sampling rate conversion processing, which improves the audibility even if the bit string is not retained. It is possible to reduce the possibility of problems occurring to the same extent as with conventional sampling rate converters.

Examples of the present invention will be described below.
(Example 1)
As a first embodiment of the present invention, a case will be described taking as an example a case where a stream of object-based audio content is input using MADI. Of the 64 channels of MADI, channels 1 to 60 store PCM data, channels 61 to 64 store S-ADM (non-PCM data), and data bursts are transmitted every 4096 samples, which is the maximum according to the standard. shall be. The amount of delay in the buffer section 2 is set to 1÷30≈33 ms (milliseconds) in accordance with the frame rate (60 Hz) of interlaced video.

Most professional audio synchronization signal generators (master clock generators) use rubidium for their oscillators and output highly accurate synchronization signals. For example, Grade 1 of AES11, which is a type of synchronization signal for digital audio signals and is specified in IEC 60958-4, stipulates that the allowable range of frequency accuracy is within ±1 ppm (parts per million). There is. In the first embodiment, assuming the maximum deviation within the standard range, the clock frequencies of the input/output signals are set to 48 kHz+1 ppm and 48 kHz-1 ppm.

FIG. 5 is a block diagram showing a configuration example of the first embodiment, and FIG. 6 is an example of a processing flow of the first embodiment. As shown in FIG. 5, the audio signal synchronization device 1 according to the first embodiment includes, in addition to the buffer section 2, the sample number adjustment section 3, and the audio signal reproduction section 4, a non-PCM data determination section 5, a delay section 6, The sampling rate converter section 7 is further included.

First, the input MADI signal is determined by the non-PCM data determination unit 5 as to whether it is a PCM channel or a non-PCM channel (step 201 in FIG. 6), and the data of channels 61 to 64 in which non-PCM data is stored is The data of channels 1 to 60 whose PCM is stored in the buffer section 2 is sent to the delay section 6, respectively.

Here, 6 samples (0, 0, 0, 0, Pa, Pb), including Pa and Pb indicating the start of the data burst, and the 4 samples immediately before them, are used to determine the channel in which non-PCM data is stored. The device may automatically switch the processing depending on whether the data exists, or if a mixture of PCM data and non-PCM data such as a stream of object-based audio content is transmitted, S-ADM (non-PCM data) may be used. Since it is quite conceivable that the channels transmitting the data are determined in advance, the user may specify in advance that only channels 61 to 64 are to be treated as non-PCM data.

The non-PCM data of the 61st to 64th channels are written into the buffer in the buffer section 2 and are in a state of waiting for reading (step 202).
The clock frequencies of the input and output signals are 48kHz + 1ppm and 48kHz - 1ppm, and the deviation is 2ppm of 48kHz, so the maximum time in one hour is 3600 (seconds) x 48000 (samples/second) x 2 x 10 ^-6 ≒ 346 samples ( 7.2ms). It takes about 4.6 hours for the error accumulation to exceed the preset delay amount of 33 ms. Considering the length of a typical broadcast program, it is thought that the program will end before errors accumulate, and the stream of object-based audio, including S-ADM (non-PCM data), will be interrupted and cleared. .

In this way, considering the typical length of a program, the buffer is cleared appropriately in object-based audio, and there are few cases where it is necessary to thin out/insert 0 data to prevent underflow or overflow. is assumed. Therefore, the buffer clear priority mode may be used to prioritize completely retaining the original data, or the sample number adjustment priority mode may be used to prioritize sequential correction to minimize sample deviation. Good too.

Note that when the buffer clear priority mode is used, there is a possibility that a time difference will occur between the PCM data and the S-ADM (non-PCM data) depending on the accumulation of errors. In S-ADM, it is possible to dynamically change the gain multiplied by PCM data depending on the time, and an error may occur in the gain multiplied by PCM data due to time lag, but as mentioned above, the time lag is about 1 hour. It is sufficiently small at 7ms. Among commercially available digital audio consoles for professional use, there are some products in which the cycle for reading the gain of the fader operated by an audio engineer is 20 ms, which is several times longer than 7 ms, and this is not considered to be a problem in practice.

When the buffer clear priority mode is used, 0 data thinning/insertion processing is not performed, and the samples (non-PCM data) read from the buffer are reproduced as they are in synchronization with the input synchronization signal. When using sample number adjustment priority mode, 1÷(48000×2×10 ⁻⁶ )≒10.42÷(4096÷48000) to correct the deviation of 1 sample that occurs every 10.42 seconds. One sample of 0 data is thinned out or inserted immediately before one out of approximately 122 data bursts.

PCM data of channels 1 to 60 are processed separately from non-PCM data.
First, in order to match the delay caused by the buffer of non-PCM data, delay processing is also applied to the PCM data (step 203). The delay value is determined according to the amount of delay automatically or manually set in the buffer unit 2 for non-PCM data.
Thereafter, conventional sampling rate conversion processing is applied (step 204). Here, when comparing the PCM data of channels 1 to 60 before and after the input/output of the device of Example 1, although bit-by-bit accuracy is lost, the input synchronization signal is It is possible to pull in. In addition, when multi-channel input via MADI or the like is assumed, the amount of memory required for the buffer section 2 can be reduced by storing only non-PCM data in the buffer section 2 as in the first embodiment. There is also the advantage of being able to

Through the above processing, both non-PCM data and PCM data are synchronized with the input synchronization signal, so these signals are finally integrated (step 205) and re-assigned as MADI for channels 1 to 64. Output.

(Example 2)
As a second embodiment of the present invention, a case where a stream of object-based audio content accompanied by video is transmitted using an SDI signal will be described as an example. The frame synchronizer used to pull SDI signals into different synchronization systems separates (demultiplexes) the audio signal embedded in the input video signal, and synchronizes the video and audio separately. Re-integrate (multiplex) and output. At this time, the audio signal synchronization pull-in process is generally performed using conventional sampling rate conversion processing. Embodiment 2 will be described assuming that this sampling rate conversion process is replaced with the process of the apparatus of the present invention.

Since the audio signal is intended to match the video, PCM data is stored in SDI channels 1 to 15, S-ADM (non-PCM data) is stored in channel 16, and the data burst is at the video frame rate (60Hz). It is assumed that data is transmitted every 48,000÷60=800 samples. The amount of delay in the buffer section 2 and the clock speed of the input signal and the synchronization signal are the same as in the first embodiment, and the buffer section 2 uses a ring buffer. Note that data clearing in the buffer section 2 is substituted by pointer adjustment.

The block diagram and flow diagram are the same as in the first embodiment. The input 16-channel audio signal is first processed by a non-PCM data determining section 5. The 16-channel data containing non-PCM data is stored in the buffer section 2, and the data of channels 1 to 15 containing PCM is stored in the buffer section 2. The signals are sent to the delay section 6, respectively.

The 16 channels of non-PCM data are written into a buffer in the buffer unit 2 and are in a state of waiting for reading. Since the clock frequency difference between the input signal and the synchronization signal is the same as in the first embodiment, it is considered that the data can be cleared in the buffer section 2.

Here, without actually clearing the buffer unit 2, it can be substituted by adjusting the write pointer and read pointer of the ring buffer. FIG. 7 is an example of pointer adjustment. The delay in the buffer unit 2 is set to 1÷60≈16.7ms, and at the beginning of the operation, the read pointer is delayed by 800 samples from the write pointer. If the clock speeds of the input audio signal and the synchronization signal are completely the same, the difference (interval) between the read pointer and write pointer will be maintained at 800 samples even after the operation starts, but if there is a difference in the clock speeds, This difference gradually increases or decreases. When the difference is expanding, by changing (rewinding) the write pointer to the read pointer + 800 (interval) at the timing when the ring buffer can be cleared, it is possible to return to the beginning of operation without clearing the ring buffer. can be reset to the interval. On the other hand, when the difference is decreasing, a separate auxiliary buffer is prepared in which 0 (Null) data for the interval is stored, and the read pointer is moved to the auxiliary buffer at the timing when the ring buffer can be cleared. By setting the read pointer to the same value as the write pointer at the time when the ring buffer can be cleared when the auxiliary buffer has been read, it is possible to reset to the initial interval of operation without clearing the ring buffer. . Here, for the sake of clarity, the write pointer may be changed to the first index of the ring buffer at the timing when the ring buffer can be cleared.

As in Example 1, after thinning/inserting 0 data by selecting buffer clear priority mode and sample number adjustment priority mode, samples (non-PCM data) read from the buffer are input separately and synchronized. Play in sync with the signal.

PCM data of channels 1 to 15 are separated from non-PCM data as in the first embodiment, and delay processing and sampling rate conversion processing are added.

Through the above processing, both the non-PCM data and PCM data are synchronized with the input synchronization signal, so finally, by integrating these signals into audio signals of channels 1 to 16, SDI It becomes possible to multiplex the signal and output it.

According to this embodiment, in a large-scale facility configured by a combination of a plurality of systems operating in different synchronous systems, one system receives digital audio signals of different synchronous systems including non-PCM data. Even in such cases, the received system can be synchronized by buffering a certain amount of digital audio signals, including channels containing non-PCM data, and outputting the buffered data in synchronization with a separately input synchronization signal. Since data is pulled into the system, it is possible to synchronize the receiving system while preventing data loss.

In addition, without decoding non-PCM data, the decoding and encoding process is performed by detecting the timing at which the buffer clear timing and the number of samples can be adjusted based on the data of the digital audio signal in which non-PCM data is stored. It becomes possible to realize processing with low delay without requiring any additional capacity.

Although the embodiments described above have been described as representative examples, it will be apparent to those skilled in the art that many modifications and changes can be made within the spirit and scope of the invention. Therefore, the present invention should not be construed as being limited to the embodiments described above, and various modifications and changes can be made without departing from the scope of the claims. For example, the processing shown in FIG. 4 can be implemented as a function of the studio shown in FIG. 2, the input section of the digital audio console shown in FIG. 3, or a digital audio signal input board (not shown) of a computer. It is possible.

Further, the effects described in the present embodiment described above are only a list of the most preferable effects resulting from the present invention, and the effects according to the present invention are not limited to those described in this embodiment. .

Furthermore, a computer can be suitably used to function as the audio signal synchronization device 1 described above, and a program that describes the processing contents for realizing each function of the audio signal synchronization device 1 can be stored in the storage section of the computer. The audio signal synchronization device 1 can be realized by reading and executing this program by the CPU of the computer.

Moreover, such a program may be recorded on a computer-readable medium. Computer-readable media allow programs to be installed on a computer. Here, the computer-readable medium on which the program is recorded may be a non-temporary recording medium. The non-temporary recording medium is not particularly limited, and may be, for example, a recording medium such as a CD-ROM or a DVD-ROM.

1 Audio signal synchronizer 2 Buffer section 3 Sample number adjustment section 4 Audio signal reproduction section 5 Non-PCM data determination section 6 Delay section 7 Sampling rate converter section

Claims (6)

A digital audio signal synchronization device,
A buffer section that temporarily stores the input digital audio signal and performs clearing processing as necessary;
a sample number adjustment unit that thins out or inserts the digital audio signal in order to accommodate the difference in clock speed between the input digital audio signal and the synchronization signal;
an audio signal reproducing unit that reproduces the digital audio signal read from the buffer unit in synchronization with the synchronization signal;
A digital audio signal synchronization device comprising: The digital audio signal synchronization device according to claim 1, wherein the buffer section temporarily stores non-PCM data stored in the digital audio signal. The buffer section detects a data burst of non-PCM data stored in the digital audio signal based on the data of the digital audio signal, and performs a clearing process on the buffer section during a period in which the non-PCM data is not input. The digital audio signal synchronization device according to claim 2, wherein the digital audio signal synchronization device resets the read/write interval. The sample number adjustment section is
detecting an overflow or underflow of the buffer section caused by a difference in clock speed between an input signal and a synchronization signal, and thinning out 0 data if the overflow is detected in a 0 data interval between data bursts of non-PCM data; 3. The digital audio signal synchronization device according to claim 2, wherein the number of samples of the digital audio signal is adjusted by inserting 0 data when the underflow is detected. a non-PCM data determination unit that determines non-PCM data in order to distinguish between non-PCM data and PCM data stored in the digital audio signal and separate subsequent processing;
a sampling rate converter that synchronizes the PCM data separated from non-PCM data with the synchronization signal by performing a sampling rate conversion process;
a delay unit that aligns the timings of the PCM data and the non-PCM data by adding a delay equivalent to a delay caused by temporary storage of the non-PCM data in the buffer unit to the PCM data subjected to the sampling rate conversion process;
The digital audio signal synchronization device according to claim 2, further comprising: A digital audio signal synchronization program for controlling a computer, the program for causing the computer to function as the digital audio signal synchronization device according to any one of claims 1 to 5.

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