JP2023176764A - Resistivity measurement method - Google Patents

Abstract

To provide a resistivity measurement method having a novel resistivity conversion performing when tracing an international standard of a C-V method by using a PW wafer.SOLUTION: A resistivity measurement method for measuring a resistivity of an EP layer formed in an EPW manufactured by using a resistivity substrate with a C-V method, is a resistivity measurement method for obtaining a four-probe resistivity of the EP layer of a measurement object by performing: a conversion by a first conversion formula obtained by comparing a C-V resistivity obtained by measuring a reference PW to which the with a four-probe reference resistivity with the C-V method and the four-probe reference resistivity to the resistivity to which a SEMI conversion resistivity obtained by measuring the resistivity of the EP layer of the measurement object with the C-V method or the resistivity obtained by executing a predetermined conversion thereto; and a conversion by a second conversion formula calculated by comparing a high resistivity substrate EPW manufactured by using the high resistivity substrate with the resistivity which can be measured by the C-V method and a C-V resistivity of the EP layer of a low resistivity substrate EPW manufactured by using the low resistivity substrate.SELECTED DRAWING: Figure 4

Description

The present invention relates to a resistivity measurement method, and more particularly to a resistivity measurement method for converting the resistivity of a silicon epitaxial layer measured by the CV method into a four-probe resistivity that can be traced to international standards such as NIST.

Conventionally, polished wafers (PW) (hereinafter simply referred to as PW), in which the main surface of a silicon single crystal wafer has been polished, or a silicon epitaxial layer (hereinafter simply referred to as PW) on the main surface of the PW wafer, have been used. As a method for measuring the resistivity of a silicon epitaxial wafer (hereinafter sometimes simply referred to as EPW) on which a silicon epitaxial wafer (hereinafter sometimes referred to as an epi layer) is grown in a vapor phase, the CV (capacitance-voltage) method is used. It has been known.

For example, as described in Patent Document 1, in order to measure the CV characteristics of a silicon single crystal wafer, a metal electrode is used to shoot the main surface (first main surface) of a silicon single crystal wafer as a sample. A depletion layer is formed inside the silicon single crystal wafer by forming a key junction, fixing the sample on the wafer stage of a CV measurement device, and applying a continuously changing reverse bias voltage to the electrode. Expand and change its capacity.

Then, the impurity concentration and resistivity at a predetermined depth from the main surface of the silicon single crystal wafer are calculated from the relationship between the bias voltage and the capacitance of the depletion layer.

In order to obtain highly accurate CV characteristics, it is necessary to keep the contact resistance between the main back surface (second main surface) of the sample and the wafer stage small.

Patent Document 1 discloses that a conductive cushion is placed on the wafer stage, and a silicon single crystal wafer whose main back surface is coated with a conductive paste is brought into close contact with the conductive cushion to improve the CV characteristics. A method of measuring is disclosed.

As the conductive cushion, it is preferable to use silicone rubber into which silver or carbon is kneaded, a resistivity of 0.01 Ω·cm or less, and a thickness of 0.2 mm or more and 0.75 mm or less.

SEMI MF723-0307 or Irvin curve is used to convert the CV characteristics to resistivity. Resistivity measurements using the four-probe method are based on seven resistance levels from SRM2541 (0.01 Ωcm) to SRM2547 (200 Ωcm) provided by NIST (National Institute of Standards and Technology). Correction can be performed using a standard wafer that has traceability to international standards such as standard reference material (SRM).

It is desirable that the resistivity measurement value by the CV method also has traceability to international standards such as NIST. Therefore, it has been proposed to ensure traceability by measuring, for example, a standard wafer with traceability to the resistivity standard material SRM using the CV method.

For example, in Patent Document 2, the epitaxial layer resistivity of a silicon epitaxial wafer having a P/N junction is measured using a four-probe method measurement device calibrated using the resistivity standard materials SRM2541 to SRM2547 as primary standard samples. The epitaxial layer is attached as a secondary standard sample, and the surface electrode CV method measuring device is calibrated by measuring the epitaxial layer with the surface electrode CV method measuring device.

Then, the epitaxial layer resistivity of the P/P type or N/N type silicon epitaxial wafer is measured using the surface electrode CV method measurement device calibrated with the secondary standard sample, and the epitaxial layer resistivity is measured as a tertiary standard sample. It has been proposed to calibrate a back electrode CV method measurement device using a tertiary standard sample.

Japanese Patent Application Publication No. 2016-76662 JP2018-32771A

When using the method proposed in Patent Document 2, it is necessary to calibrate the resistivity using a silicon epitaxial wafer (EPW) having a P/N junction. Furthermore, both a CV method measuring device for the front electrode and a CV method measuring device for the back electrode are required.

The present invention has been made to address the above-mentioned problems, and provides a resistivity measurement method using a PW wafer and having a new resistivity conversion when tracing the CV method to international standards such as NIST. The purpose is to

In order to solve the above problems, in the present invention, the resistivity of the silicon epitaxial layer to be measured is A method for measuring resistivity using the CV method,
With respect to the SEMI equivalent resistivity obtained by measuring the resistivity of the silicon epitaxial layer to be measured by the CV method, or the resistivity obtained by performing a predetermined conversion on the SEMI equivalent resistivity,
First conversion obtained by comparing the CV resistivity obtained by measuring a standard polished wafer with a four-probe standard resistivity value using the CV method and the four-probe standard resistivity. Conversion by formula and
A silicon epitaxial layer of a high resistivity substrate silicon epitaxial wafer produced using a high resistivity substrate having a resistivity that can be measured by the CV method, and a low resistivity substrate having a resistivity of 0.02 Ω cm or less. Conversion using a second conversion formula obtained by comparing the CV resistivity with the silicon epitaxial layer of the low resistivity substrate silicon epitaxial wafer produced using the method,
Provided is a resistivity measuring method characterized in that the four-probe resistivity of the silicon epitaxial layer to be measured is obtained by performing the following steps.
Here, the resistivity of the high resistivity substrate having a resistivity that can be measured by the CV method is, for example, 0.1 Ω·cm or more and 1000 Ω·cm or less.

Using the present invention, in addition to the conversion using the first conversion formula obtained by comparing the CV resistivity of a standard polished wafer and the four-probe standard resistivity, By performing conversion using a second conversion formula obtained by comparing the CV resistivity of the silicon epitaxial layer formed on the silicon epitaxial layer formed on the low resistivity substrate silicon epitaxial wafer. , it becomes possible to convert the CV resistivity of a silicon epitaxial layer formed on a low resistivity substrate into a four-probe resistivity that can be traced to international standards such as NIST.

That is, according to the present invention, it is possible to provide a resistivity measurement method having a new resistivity conversion performed when tracing the CV method to an international standard such as NIST using a PW wafer.

The four-probe standard resistivity value for the standard polished wafer is as follows:
a four-probe resistivity measuring device calibration step of calibrating the four-probe resistivity measuring device using a standard wafer that can be traced to an international standard;
a polished wafer standard resistivity value valuing step of valuing the four-probe standard resistivity on the polished wafer using the four-probe resistivity measuring device calibrated in the four-probe resistivity measuring device calibration step; ,
It is desirable to have

The first conversion formula is determined using the standard polished wafer obtained in this way, and by performing the conversion using this first conversion formula, the CV resistance of the silicon epitaxial layer formed on the high resistivity substrate is determined. can be converted into a four-probe resistivity that can be traced to international standards such as NIST with higher accuracy.

In this case, in the polished wafer standard resistivity value determining step, the main surface of the polished wafer may be measured by the four-probe resistivity measuring device.

Alternatively, the polished wafer may be ground to obtain a ground surface, and the ground surface may be measured by the four-probe resistivity measuring device. It is desirable to perform surface grinding as the grinding.

In this way, the measurement using the four-probe resistivity measuring device may be performed on the main surface (PW surface) of the polished wafer, or may be performed on the ground surface. When the ground surface is measured using a four-probe resistivity measuring device, the measurement accuracy of the four-probe resistivity is improved compared to when measuring the PW surface.

It is desirable to use a polished wafer that has been subjected to heat treatment to eliminate oxygen donors.

By doing so, the four-probe standard resistivity can be valued with higher accuracy.

Alternatively, as a standard polished wafer with the four-probe standard resistivity value,
a four-probe resistivity measuring device calibration step of calibrating the four-probe resistivity measuring device using a standard wafer traceable to an international standard;
Using the four-probe resistivity measuring device calibrated in the four-probe resistivity measuring device calibration step, the resistivity of a silicon single crystal wafer that has been previously heat-treated to eliminate oxygen donors is measured. a pricing process for pricing standard resistivity;
a processing step of processing at least the first main surface of the priced silicon single crystal wafer to form a polished wafer;
a cleaning step of cleaning the polished wafer;
It is desirable to use one that has been given. As the silicon single crystal wafer, for example, one whose main surface is a lapped surface, a ground surface, or a chemically etched surface is used.

By using such a standard polished wafer, the CV resistivity of the silicon epitaxial layer to be measured can be converted into a four-probe resistivity that can be traced to international standards such as NIST with higher precision.

The second conversion formula is
A substrate polished wafer preparation step of preparing a high resistivity polished wafer having a resistivity that can be measured by the CV method and a low resistivity polished wafer having a resistivity of 0.02 Ωcm or less;
A silicon epitaxial layer having the same resistivity and the same conductivity type as the high resistivity polished wafer is grown on the high resistivity polished wafer and the low resistivity polished wafer under the same dopant concentration growth conditions. an epitaxial wafer preparation step of preparing the high resistivity substrate silicon epitaxial wafer and the low resistivity substrate silicon epitaxial wafer by epitaxial growth;
A CV measurement step of a comparison epitaxial wafer in which the silicon epitaxial layer of the low resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high resistivity substrate silicon epitaxial wafer are CV measured;
Determining the silicon epitaxial layer of the low resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high resistivity substrate silicon epitaxial wafer through a comparison step of comparing CV resistivity,
The CV resistance measurement result of the silicon epitaxial layer formed on the low resistivity substrate is converted to the CV resistance of the silicon epitaxial layer formed on the silicon epitaxial wafer including the high resistivity substrate using the second conversion formula. It is desirable to perform a second conversion step of converting into a rate.

By performing the second conversion process in addition to the conversion using the first conversion formula, the CV resistivity of the silicon epitaxial layer formed on the low-resistivity substrate can be calculated with higher accuracy by international standards such as NIST. It can be converted to four-probe resistivity that can be traced to the standard.

When determining the first conversion formula, before measuring the resistivity of the standard polished wafer by the CV method, the standard polished wafer is heat-treated in a hydrogen atmosphere at a temperature of 250° C. or more and 1150° C. or less. This is desirable.

By subjecting the standard polished wafer heat-treated in this manner to CV measurement, it is possible to prevent a high resistance region from appearing in the surface layer portion of the impurity concentration profile or resistivity profile.

Further, when determining the first conversion formula, the standard polished wafer is It is desirable to apply a high frequency voltage to the first main surface of the polished wafer and measure the resistivity of the standard polished wafer by the CV method.

When determining the first conversion formula, by measuring the CV resistivity of a standard polished wafer with the conductive cushion arranged in this way, even if the wafer has a high resistivity with a different resistivity, the wafer stage Since the contact resistance is kept constant, it is expected that the accuracy of the first conversion formula and the second conversion formula will be improved.

As described above, with the present invention, in addition to the conversion using the first conversion formula obtained by comparing the CV resistivity of a standard polished wafer and the standard four-probe resistivity, the high resistivity substrate silicon epitaxial Using a second conversion formula obtained by comparing the CV resistivity of the silicon epitaxial layer formed on the wafer and the CV resistivity of the silicon epitaxial layer formed on the low resistivity substrate silicon epitaxial wafer. By performing the conversion, it becomes possible to convert the CV resistivity of a silicon epitaxial layer formed on a low resistivity substrate into a four-probe resistivity that can be traced to international standards such as NIST.

FIG. 2 is a schematic process diagram showing a schematic process of determining a first conversion formula in the resistivity measuring method according to the first embodiment of the present invention. It is a schematic process diagram which shows the outline process of calculating|requiring a second conversion formula among the resistivity measuring methods of this invention. FIG. 1 is a schematic diagram of a CV measuring device. By performing conversion using the second conversion formula and conversion using the first conversion formula, the CV resistivity measurement result of the silicon epitaxial layer formed on the silicon epitaxial wafer to be measured is converted into four-probe resistivity. It is a schematic diagram showing a process. It is a schematic process diagram which shows the schematic process of calculating|requiring a 1st conversion formula among the resistivity measurement methods based on the 2nd embodiment of this invention. It is a graph showing the bias amount of the resistivity when the second conversion formula is not used, with respect to the resistivity converted using the second conversion formula. 3 is a graph comparing the four-probe standard resistivity with the CV resistivity measurement results of a silicon epitaxial layer formed on a silicon epitaxial wafer after conversion using a second conversion formula and a first conversion formula.

As mentioned above, resistors with a new resistivity conversion that is performed when tracing the CV method to international standards such as NIST using polished wafers (hereinafter sometimes simply referred to as "PW wafers") There was a need to develop a method for measuring the rate.

As a result of intensive studies on the above-mentioned problem, the present inventors have determined that, in addition to the conversion using the first conversion formula obtained by comparing the CV resistivity of a standard polished wafer and the four-probe standard resistivity, By performing conversion using a second conversion formula obtained by comparing the CV resistivity of the epitaxial layer of the high resistivity substrate silicon epitaxial wafer and the epitaxial layer of the low resistivity substrate silicon epitaxial wafer, The present invention was completed by discovering that it is possible to convert the CV resistivity of a silicon epitaxial layer to be measured into a four-probe resistivity that can be traced to international standards such as NIST.

That is, the present invention measures the resistivity of a silicon epitaxial layer to be measured formed on a silicon epitaxial wafer manufactured using a low resistivity substrate having a resistivity of 0.02 Ω·cm or less using the CV method. A method for measuring resistivity, comprising:
With respect to the SEMI equivalent resistivity obtained by measuring the resistivity of the silicon epitaxial layer to be measured by the CV method, or the resistivity obtained by performing a predetermined conversion on the SEMI equivalent resistivity,
First conversion obtained by comparing the CV resistivity obtained by measuring a standard polished wafer with a four-probe standard resistivity value using the CV method and the four-probe standard resistivity. Conversion by formula and
A silicon epitaxial layer of a high resistivity substrate silicon epitaxial wafer produced using a high resistivity substrate having a resistivity that can be measured by the CV method, and a low resistivity substrate having a resistivity of 0.02 Ω cm or less. Conversion using a second conversion formula obtained by comparing the CV resistivity with the silicon epitaxial layer of the low resistivity substrate silicon epitaxial wafer produced using the method,
This resistivity measurement method is characterized in that the four-probe resistivity of the silicon epitaxial layer to be measured is obtained by performing the following steps.

Hereinafter, the present invention will be explained in detail with reference to the drawings, but the present invention is not limited thereto.

[First embodiment]
A first embodiment of the present invention will be described below based on the drawings.

FIG. 1 is a schematic process diagram showing a schematic process for determining a first conversion formula in a resistivity measuring method according to a first embodiment of the present invention.

First, a four-probe resistivity measuring device is calibrated using a standard wafer that can be traced to an international standard, for example, NIST (FIG. 1(a) four-probe resistivity measuring device calibration step).

For example, for resistivity measurements using the four-probe method, SRM2541 (0.01Ω・cm) to SRM2547 (200Ω・cm) provided by NIST (National Institute of Standards and Technology) are used. A four-probe resistivity measuring device can be calibrated and corrected using a standard wafer that has traceability to seven levels of resistivity reference material (SRM) and the like.

In this example, to calibrate the four-probe resistivity measuring device, measure the resistivity standard materials such as SRM2541 to SRM2547 with the four-probe resistivity measuring device, and confirm that the measurement results are within the control standards. confirm. In addition, in order to correct, measure the resistivity standard material with the four-probe resistivity measuring device, calculate the ratio of the measurement result to the standard value given to the resistivity standard material, and calculate the ratio as described above. Multiply the value measured by the four-probe resistivity measuring device.

Next, the resistivity of the PW wafer is measured using the four-probe resistivity measuring device calibrated in the four-probe resistivity measuring device calibration process, and the four-probe standard resistivity is valued (see Fig. 1). b) Standard resistivity pricing process).

As the PW wafer, it is desirable to use one that has a resistivity that can be measured by the CV method and that has been subjected to heat treatment to eliminate oxygen donors. When measuring the PW surface of the PW wafer with the four-probe resistivity measuring device, in order to ensure the accuracy of the four-probe standard resistivity, the resistivity is measured many times and the average value is used as the standard value. This is desirable. When the PW wafer is processed by grinding (for example, surface grinding) to obtain a ground surface and the ground surface is measured with the four-probe resistivity measuring device, the measurement of the four-probe standard resistivity is faster than when measuring the PW surface. Accuracy improves. Hereinafter, a PW wafer with a four-probe standard resistivity value may be referred to as a standard PW.

Subsequently, the standard PW is subjected to CV measurement (FIG. 1(c) CV measurement process of the standard PW). When the surface is ground in the PW standard resistivity value determining process (FIG. 1(b)), another PW wafer having the same resistivity is subjected to CV measurement. If a high resistance region appears in the surface layer of the impurity concentration profile or resistivity profile during CV measurement, the standard PW should be placed in a hydrogen atmosphere at 250°C or higher and 1150°C or lower before performing CV measurement. It is desirable that the heat treatment be carried out for 10 to 60 minutes.

Then, compare the CV resistivity obtained by measuring the standard PW using the CV method with the four-probe standard resistivity (Figure 1 (d)). A first conversion formula for converting the CV measurement value of the PW wafer into a four-probe resistivity that can be traced to the international standard is obtained by comparing the resistivity with the four-probe standard resistivity (Fig. 1(e)). ).

The first conversion formula obtained in this way is based on the use of high resistivity substrates, such as P ^- type PW, N ^- type PW, and P/P ^- type silicon epitaxial wafers (hereinafter simply referred to as "EPW"). However, it cannot be applied to P/P ⁺ type EPWs or N/N ⁺ type EPWs that use low resistivity substrates, such as P/P ⁺ type EPWs. This is because the contact resistance between the wafer stage that fixes the wafer and the backside of the EPW during CV measurement is different depending on whether the backside of the EPW is a high-resistivity substrate or a low-resistivity substrate. This is because it affects the measurement results of CV resistivity.

Therefore, we prepared a high resistivity substrate EPW and a low resistivity substrate EPW in which the dopant concentration of the silicon epitaxial layer (hereinafter sometimes simply referred to as "epi layer") is the same, and the epitaxial layer of these EPWs was C- By comparing the V resistivities, a second conversion formula for converting the epi layer CV resistivity of the low resistivity substrate EPW to the epi layer CV resistivity of the high resistivity substrate EPW is calculated. (Figure 2). That is, FIG. 2 is a schematic process diagram showing a schematic process of determining the second conversion formula in the resistivity measuring method of the present invention.

In FIG. 2, first, a high resistivity PW wafer having a resistivity measurable by the CV method and a low resistivity PW wafer having a resistivity of 0.02 Ωcm or less are prepared (FIG. 2(a) ) PW wafer preparation process for substrate). Here, the resistivity of the high resistivity substrate having a resistivity that can be measured by the CV method is, for example, 0.1 Ω·cm or more and 1000 Ω·cm or less.

Next, a silicon epitaxial layer having substantially the same resistivity and the same conductivity type as the high resistivity PW wafer is formed on each of the high resistivity PW wafer and the low resistivity PW wafer with the same dopant concentration. Epitaxial growth is performed under growth conditions. As a result, a high resistivity substrate EPW and a low resistivity substrate EPW are prepared (FIG. 2(b) comparative EPW preparation step).

Subsequently, the epitaxial layer of the low resistivity substrate EPW and the epitaxial layer of the high resistivity substrate EPW are subjected to CV measurement (FIG. 2(c) CV measurement process of comparative EPW). Furthermore, the CV resistivity of the epitaxial layer of the low resistivity substrate EPW and the epitaxial layer of the high resistivity substrate EPW is compared (FIG. 2(d)) The EP layer of the low resistivity substrate EPW and the high resistivity CV resistivity comparison process with respect to the EP layer of the substrate EPW).

Then, a second conversion formula for converting the CV resistivity of the epitaxial layer of the low resistivity substrate EPW to the CV resistivity of the epitaxial layer of the high resistivity substrate EPW is determined (Fig. 2(e) )). A high resistivity substrate EPW, in which the epi layer and the substrate have the same resistivity, is substantially the same as PW. Therefore, the second conversion formula can also be used to convert from the CV resistivity of the epitaxial layer of the low resistivity substrate EPW to the CV resistivity of PW.

As mentioned above, the contact resistance between the wafer stage to which the EPW is fixed during CV measurement and the back surface of the EPW is different between when the back surface of the EPW is a high resistivity substrate and when the back surface of the EPW is a low resistivity substrate. The difference affects the CV resistivity measurement results. Furthermore, even if the same high resistivity substrate or high resistivity PW is used, the contact resistance with respect to the wafer stage is different between, for example, 1 Ω·cm and 100 Ω·cm.

Therefore, when performing CV measurement with a high resistivity substrate EPW or high resistivity PW (hereinafter sometimes referred to as high resistivity wafer) fixed to a wafer stage, the high resistivity wafer and the wafer stage It is desirable to measure CV while sandwiching a conductive cushion between the two. Then, even if high resistivity wafers have different resistivities, the contact resistance with respect to the wafer stage is kept constant, so it can be expected that the accuracy of the first conversion formula and the second conversion formula will be improved.

FIG. 3 shows a CV measuring device 10 (hereinafter simply referred to as the device 10) used to perform CV measurement while sandwiching a conductive cushion 7 between a high resistivity wafer 3 and a wafer stage 6. ) is shown.

The high resistivity wafer 3 is formed by vapor phase growth of a silicon epitaxial layer 2 on the high resistivity substrate 1, and can be applied to either P/P ^- or N/N ^- , but for convenience of explanation, , P/P ^- is illustrated. Furthermore, although the device 10 uses back electrodes as electrodes, it is also applicable to front electrodes.

As a pretreatment for CV measurement, the high resistivity wafer 3 is treated with, for example, hydrofluoric acid (HF) to remove an oxide film formed on the surface. Next, a metal electrode 4 is formed at a desired position on the surface of the silicon epitaxial layer 2. The metal of the metal electrode 4 is preferably samarium (Sm) when the silicon epitaxial layer 2 is P type, and is preferably gold (Au) when the silicon epitaxial layer 2 is N type. When using mercury (Hg) as the metal electrode 4, it can be applied to both P-type and N-type.

Next, the conductive cushion 7 is sandwiched between the second main surface (main back surface) of the HF-treated high resistivity wafer 3 and the measurement stage 6 of the CV measuring device 10, and the high resistivity wafer 3 is A high frequency voltage is applied to the metal electrode 4 in contact with the first main surface of the sample 3, and CV measurement is performed.

As the conductive cushion 7, silicone rubber kneaded with silver or carbon and having a resistivity of 1 Ωcm or less is desirable. The reason why the conductive cushion 7 is used is to maintain ohmic contact between the second main surface of the high resistivity wafer 1 and the measurement stage 6 of the CV measurement device 10 at a good constant resistivity.

When the conductive cushion 7 is not used, the magnitude of the resistance formed between the second main surface of the high resistivity wafer 3 and the measurement stage 6 varies depending on the resistivity of the high resistivity substrate 1. It also varies depending on the strength of adsorption between the back surface of the high resistivity wafer 3 and the measurement stage 6. The magnitude of the resistance formed between the second main surface of the high resistivity wafer 3 and the measurement stage 6 becomes smaller if the attraction force is strong, and increases if the attraction force is weak.

When a reverse bias voltage is applied to the metal electrode 4 in contact with the first main surface of the high resistivity wafer 3, the depletion layer formed near the surface of the EP layer 2 in contact with the metal electrode 4 expands.

The depletion layer width W can be determined from the following equation.
(Formula 1)
W=Aε ₀ ε _Si /C
Here, A is the area of the metal electrode 4, ε ₀ is the vacuum dielectric constant, ε _Si is the relative dielectric constant of silicon, and C is the capacitance formed by the depletion layer of the epitaxial layer 2.

Then, the dopant concentration N(W) in the depletion layer width W is determined by the following equation.
(Formula 2)
N(W)=2/(qε ₀ ε _Si A ² )*{d(C ^-2 )/dV} ^-1
Here, q is the amount of charge of the electron.

Once a list of correspondence between the dopant concentration N (W) and the depletion layer width W (depth) is created, it can be output as a dopant concentration profile. In addition, the dopant concentration N(w) is converted to resistivity (SEMI equivalent resistivity) using SEMI MF723-0307, and a list of correspondence with the depletion layer width (depth) is created. It can also be output as a profile.

The measurement result of the CV resistivity of the high resistivity wafer 3 is obtained by converting the SEMI-converted resistivity or the resistivity obtained by performing a predetermined conversion on the SEMI-converted resistivity using the first conversion formula. can be converted into four-probe resistivity that can be traced to NIST.

When the target of CV measurement does not include the high resistivity substrate 1, that is, when it is a low resistivity substrate EPW such as P/P ⁺ type EPW or N/N ⁺ type EPW, the conductive cushion 7 is used. There's no need. The CV resistivity of the epitaxial layer (hereinafter sometimes referred to as "EP layer") formed on the low resistivity substrate EPW was also determined as shown in FIG. 3, except that the conductive cushion 7 was not used. can be measured. Then, with respect to the SEMI-converted resistivity or the CV resistivity measurement result (FIG. 4(a)) of the EP layer formed on the low-resistivity substrate EPW, which is obtained by performing a predetermined conversion on the SEMI-converted resistivity. , by performing conversion using the second conversion formula (FIG. 4(b)) and conversion using the first conversion formula (FIG. 4(c)), the CV of the silicon epitaxial layer to be measured is calculated. The resistivity measurement results can be converted into four-probe resistivity that can be traced to NIST (FIG. 4(d)).

Predetermined conversions applied to SEMI-converted resistivity include, for example, conversions to match other CV method resistivity measurement devices, conversions to match customer measured values (customer conversion), conversions to match standard values, etc. There are conversions to correct bias, etc.

[Second embodiment]
A second embodiment of the present invention will be described below based on the drawings.
In the first embodiment, the resistivity of a PW wafer is measured using a calibrated four-probe resistivity measuring device, and a four-probe standard resistivity is determined. On the other hand, in the second embodiment, the value of the four-probe standard resistivity is determined using a silicon single crystal wafer (hereinafter sometimes simply referred to as the LW surface) whose main surface is lapped (hereinafter referred to simply as the LW surface). (hereinafter sometimes simply referred to as LW), a silicon single crystal wafer whose main surface is ground (hereinafter sometimes simply referred to as a ground surface), or a surface whose main surface is chemically etched. (Hereinafter, this may be simply referred to as CW surface.) Silicon single crystal wafer (hereinafter, this may be simply referred to as CW).

FIG. 5 is a schematic process diagram showing the schematic steps of the resistivity measuring method according to the second embodiment of the present invention. First, a four-probe resistivity measuring device is calibrated using a standard wafer that can be traced to NIST (FIG. 5(a) four-probe resistivity measuring device calibration step).

Next, a four-probe standard resistivity value is determined for a silicon single crystal wafer whose main surface is an LW surface, a ground surface, or a CW surface (FIG. 5(b) standard resistivity value determination step). As a result, variations in repeated measurements become smaller than when measuring a PW wafer whose main surface is a PW plane using the four-probe method. The CW surface includes a high brightness plane ground surface.

When oxygen in a silicon single crystal is subjected to heat treatment at around 450° C., several atoms come together and release one electron, producing a donor. For this reason, it is desirable to use a crystal with a low oxygen concentration for the silicon single crystal wafer used to value the four-probe standard resistivity. Furthermore, it is desirable to perform heat treatment for the purpose of eliminating oxygen donors (donor killer heat treatment) before setting the value of the four-probe standard resistivity.

Subsequently, at least the first main surface of the priced silicon single crystal wafer is processed to form a PW wafer (FIG. 5(c) processing step). When the main surface of the wafer is an LW surface, etching, chemical mechanical polishing, etc. are performed to obtain a PW wafer. Furthermore, the PW wafer is cleaned to clean the PW surface. For example, a combination of ammonia/hydrogen peroxide, hydrochloric acid/hydrogen peroxide, ozone water, and hydrofluoric acid is used for cleaning.

When a PW wafer is cleaned, hydrogen is introduced into the PW wafer, which increases the resistivity of the surface layer of the PW wafer. As a countermeasure, the cleaned PW wafer is heat-treated at a temperature of 250° C. or higher and 1150° C. or lower. The heat-treated standard PW thus prepared is used for CV measurement.

This standard PW CV measurement step (FIG. 5(d)) and subsequent steps are the same as the CV measurement step (FIG. 1(c) standard PW CV measurement step) and subsequent steps described in the first embodiment. It is.

By performing the four-probe standard resistivity value measurement on a silicon single crystal wafer whose main surface is an LW surface, a ground surface, or a CW surface, it is easier to repeat than when measuring a PW wafer whose main surface is a PW surface. Measurement variation is reduced. As a result, it is possible to obtain the first conversion formula and the second conversion formula with higher accuracy, so that the CV resistivity measurement results of the EP layer formed on the low resistivity substrate EPW can be calculated more accurately. It can be converted into needle resistivity.

Hereinafter, the present invention will be specifically explained using Examples and Comparative Examples, but the present invention is not limited thereto. Note that the reference numbers in the following description of the embodiments correspond to the reference numbers shown in FIG.

[Example 1]
First, as a PW wafer for a substrate to obtain the second conversion formula, for a PW wafer with a diameter of 300 mm, P type, and <100>, five levels having a resistivity of 1 to 100 Ω・cm that can be measured by the CV method are used. Five high resistivity PW wafers with a resistivity of 0.015 Ω·cm and five low resistivity PW wafers with a resistivity of 0.015 Ω·cm were prepared.

Next, on each of the high resistivity PW wafer 1 and the low resistivity PW wafer 1, a silicon epitaxial layer 2 having substantially the same resistivity and the same conductivity type as the high resistivity PW wafer is coated. Epitaxial growth was performed under growth conditions of dopant concentration. For example, on a high resistivity P type PW wafer 1 with a resistivity of 1 Ω·cm and on a low resistivity P type PW wafer 1 with a resistivity of 0.015 Ω·cm, a P type with a resistivity of approximately 1 Ω·cm is applied. The silicon epitaxial layer 2 was epitaxially grown under the same dopant concentration growth conditions to form EPW3 (low resistivity substrate EPW and high resistivity substrate EPW).

Subsequently, an electrode 4 was formed on the main surface of the EPW 3, and CV measurement was performed on each of the epitaxially grown epitaxial layers 2 of the EPW 3 having the high resistivity PW1 and the EPW 3 having the low resistivity PW1. When performing CV measurement on the epitaxial layer 2 of the high resistivity substrate EPW3, a conductive cushion 7 with a resistivity of 0.9 Ω cm was sandwiched between the high resistivity substrate EPW3 and the wafer stage 6. In this state, the high resistivity substrate EPW3 was held by suction on the wafer stage 6 for measurement.

Then, the CV resistivity of the epitaxial layer 2 of the low resistivity substrate EPW3 and the epitaxial layer 2 of the high resistivity substrate EPW3 is compared, and the CV resistivity of the epitaxial layer of the low resistivity substrate EPW is A second conversion formula for converting to the CV resistivity of the epitaxial layer of the high resistivity substrate EPW was determined.

FIG. 6 shows the CV resistivity ratio of the epitaxial layer of the high resistivity substrate EPW and the epitaxial layer of the low resistivity substrate EPW, that is, the second The bias amount of resistivity (measured value - standard value) when no conversion formula is used is shown as a percentage. It can be seen that when the second conversion formula is not used, the resistivity is measured to be higher by about 1% at a resistivity level of 10 Ω·cm and by about 6% at a resistivity level of 100 Ω·cm.

The definition of "bias (%)" on the vertical axis in FIG. 6 is as follows.
Bias (%) = (measured value - standard value) / standard value x 100 (%)

Furthermore, the CV resistivity obtained by measuring the standard PW with the four-probe standard resistivity determined in advance by the four-probe method using the CV method, and the four-probe standard resistivity determined in advance by the four-probe method. By comparing the resistivity with the resistivity, a first conversion formula for converting the CV measurement value of the high resistivity PW wafer into a four-probe resistivity that can be traced to the international standard was determined.

On the other hand, a silicon epitaxial wafer (EPW) manufactured using a low resistivity substrate having a resistivity of 0.015 Ω·cm was prepared as a measurement target. The resistivity of the silicon epitaxial layer formed on this EPW was measured by CV, and the SEMI equivalent resistivity of the silicon epitaxial layer (EP layer) formed on the low resistivity substrate to be measured was obtained.

Finally, the SEMI equivalent resistivity of the silicon epitaxial layer to be measured is converted using the second conversion formula and the first conversion formula to obtain the low resistivity substrate EPW. The measurement result of the CV resistivity of the formed EP layer to be measured was converted into a four-probe resistivity that can be traced to NIST.

Figure 7 shows the four-probe standard resistivity determined in advance by measuring with the four-probe method, and the CV resistivity measurement of the EP layer that is the measurement target, converted to the four-probe resistivity that can be traced to NIST. A graph comparing the results (after conversion) is shown. As shown in FIG. 7, according to the present invention, the four-probe resistivity and the CV resistivity measurement result of the EP layer to be measured have substantially the same value.

That is, according to the present invention, the four-point probe is capable of tracing the CV resistivity of a silicon epitaxial layer to be measured, which is formed on a silicon epitaxial wafer manufactured using a low resistivity substrate, to an international standard such as NIST. It becomes possible to convert it into resistivity. In other words, it is possible to provide a resistivity measurement method having a new resistivity conversion performed when tracing the CV method to an international standard such as NIST using a PW wafer.

In addition to the conversion using the first conversion formula that compares the CV resistivity of the standard PW and the four-probe standard resistivity, the present invention can be used to calculate EP for the high resistivity substrate EPW and the low resistivity substrate EPW. By performing conversion using the second conversion formula obtained by comparing the CV resistivities of the layers, the CV resistivity of the EP layer formed on the EPW manufactured using the low resistivity substrate can be calculated using the NIST It becomes possible to convert it into a four-probe resistivity that can be traced to international standards such as

Note that the present invention is not limited to the above embodiments. The above-mentioned embodiments are illustrative, and any embodiment that has substantially the same configuration as the technical idea stated in the claims of the present invention and has similar effects is the present invention. covered within the technical scope of.

DESCRIPTION OF SYMBOLS 1... High resistivity substrate, 2... Silicon epitaxial layer, 3... Epitaxial wafer, 4... Metal electrode, 6... Wafer stage, 7... Conductive cushion, 10... CV measuring device.

Claims (11)

A resistivity measurement method that measures the resistivity of a silicon epitaxial layer to be measured formed on a silicon epitaxial wafer manufactured using a low resistivity substrate having a resistivity of 0.02 Ω cm or less using the CV method. There it is,
With respect to the SEMI equivalent resistivity obtained by measuring the resistivity of the silicon epitaxial layer to be measured by the CV method, or the resistivity obtained by performing a predetermined conversion on the SEMI equivalent resistivity,
First conversion obtained by comparing the CV resistivity obtained by measuring a standard polished wafer with a four-probe standard resistivity value using the CV method and the four-probe standard resistivity. Conversion by formula and
A silicon epitaxial layer of a high resistivity substrate silicon epitaxial wafer produced using a high resistivity substrate having a resistivity that can be measured by the CV method, and a low resistivity substrate having a resistivity of 0.02 Ω cm or less. Conversion using a second conversion formula obtained by comparing the CV resistivity with the silicon epitaxial layer of the low resistivity substrate silicon epitaxial wafer produced using the method,
A method for measuring resistivity, characterized in that the four-probe resistivity of the silicon epitaxial layer to be measured is obtained. The four-probe standard resistivity value for the standard polished wafer is as follows:
a four-probe resistivity measuring device calibration process of calibrating the four-probe resistivity measuring device using a standard wafer that can be traced to an international standard;
a polished wafer standard resistivity value valuing step of valuing the four-probe standard resistivity of the polished wafer using the four-probe resistivity measuring device calibrated in the four-probe resistivity measuring device calibration step; ,
The resistivity measuring method according to claim 1, characterized in that it has the following. 3. The resistivity measuring method according to claim 2, wherein in the polished wafer standard resistivity value determining step, the main surface of the polished wafer is measured by the four-probe resistivity measuring device. 3. In the polished wafer standard resistivity value setting step, the polished wafer is ground to obtain a ground surface, and the ground surface is measured by the four-probe resistivity measuring device. Resistivity measurement method. 5. The resistivity measuring method according to claim 4, wherein surface grinding is performed as the grinding. 5. The resistivity measuring method according to claim 4, wherein the polished wafer is a wafer that has been subjected to a heat treatment to eliminate oxygen donors. As a standard polished wafer with the four-probe standard resistivity value,
a four-probe resistivity measuring device calibration step of calibrating the four-probe resistivity measuring device using a standard wafer traceable to an international standard;
Using the four-probe resistivity measuring device calibrated in the four-probe resistivity measuring device calibration step, the resistivity of a silicon single crystal wafer that has been previously heat-treated to eliminate oxygen donors is measured. a pricing process for pricing standard resistivity;
a processing step of processing at least the first main surface of the priced silicon single crystal wafer to form a polished wafer;
a cleaning step of cleaning the polished wafer;
2. The resistivity measuring method according to claim 1, wherein a resistivity measuring method is used. 8. The resistivity measuring method according to claim 7, wherein the silicon single crystal wafer is a wafer whose main surface is a lapped surface, a ground surface, or a chemically etched surface. The second conversion formula is
A substrate polished wafer preparation step of preparing a high resistivity polished wafer having a resistivity that can be measured by the CV method and a low resistivity polished wafer having a resistivity of 0.02 Ωcm or less;
A silicon epitaxial layer having the same resistivity and the same conductivity type as the high resistivity polished wafer is grown on the high resistivity polished wafer and the low resistivity polished wafer under the same dopant concentration growth conditions. an epitaxial wafer preparation step of preparing the high resistivity substrate silicon epitaxial wafer and the low resistivity substrate silicon epitaxial wafer by epitaxial growth;
A CV measurement step of a comparison epitaxial wafer in which the silicon epitaxial layer of the low resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high resistivity substrate silicon epitaxial wafer are CV measured;
Determining the silicon epitaxial layer of the low resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high resistivity substrate silicon epitaxial wafer through a comparison step of comparing CV resistivity,
The CV resistance measurement result of the silicon epitaxial layer formed on the low resistivity substrate is converted to the CV resistance of the silicon epitaxial layer formed on the silicon epitaxial wafer including the high resistivity substrate using the second conversion formula. 2. The resistivity measuring method according to claim 1, further comprising performing a second conversion step of converting into a resistivity. When determining the first conversion formula, before measuring the resistivity of the standard polished wafer by the CV method, heat treating the standard polished wafer in a hydrogen atmosphere at a temperature of 250° C. or more and 1150° C. or less. The method for measuring resistivity according to claim 1, characterized in that: When determining the first conversion formula, the standard polished wafer is 2. The resistivity measuring method according to claim 1, wherein the resistivity of the standard polished wafer is measured by a CV method by applying a high frequency voltage to the first main surface of the wafer.

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