JP2023160173A - Manufacturing method for circuit on substrate and substrate having the same - Google Patents

Abstract

To provide a manufacturing method for a circuit on a substrate that suppresses the excessive etching of edges of the circuit and improves the dimensional accuracy of the circuit and to provide a substrate having the circuit.SOLUTION: The manufacturing method has a first step in which a first etching resist covering the surface of a first conductor is provided on a portion to be a circuit intermediate, a second step in which the first conductor is etched to provide a circuit intermediate, a third step in which a space provided after the etching is filled with a first insulating resin, a fourth step in which a second etching resist is provided on the surface of the circuit intermediate, and a fifth step in which a side surface of the circuit intermediate is half-etched in a state of being protected with the first insulating resist and a first circuit and a second circuit are provided.SELECTED DRAWING: Figure 1

Description

The present invention relates to a technique for improving the dimensional accuracy of circuits constituting a substrate.

Conventionally, as a method for creating a circuit on a substrate, it is known to create a circuit by providing an etching resist on a conductor provided on the surface of a base material and etching it.
FIG. 3(e) of Patent Document 1 shows an upper interlayer circuit (expressed as an upper wiring section 311 in Patent Document 1) extending in the board thickness direction and a lower interlayer circuit (expressed as an upper wiring section 311 in Patent Document 1) extending in the board thickness direction. 312) and a planar circuit extending in the plane direction (expressed as interlayer connection portion 313 in Patent Document 1) are manufactured as a circuit without a connection surface.
As shown in FIGS. 3(a) and 3(b) of Patent Document 1, the circuit of Patent Document 1 protects the portion that will become the upper interlayer circuit with an etching resist and performs half etching to form the upper interlayer circuit. create.
After that, the half-etched part is filled with insulating resin, and as shown in FIG. 3(c), the part that will become the lower interlayer circuit is protected with an etching resist, and then half-etched to form the lower interlayer circuit. Create.
Thereafter, as shown in FIGS. 3(d) and 3(e), etching is performed while the lower interlayer circuit and the portion that will become the planar circuit are protected, thereby forming a circuit without a connection surface. It is stated that.

International Publication No. 2012/133380

In the manufacturing method of Patent Document 1, since the lower interlayer circuit is subjected to the etching process twice, the side surface of the lower interlayer circuit is excessively etched, resulting in a convex shape with rounded edges. It is difficult to control the width of the intended circuit, and there is a risk of disconnections when the circuit is miniaturized.

The present invention has been made in view of the above-mentioned background art, and provides a method of manufacturing a substrate that suppresses excessive etching of the edges of a circuit and improves the dimensional accuracy of the circuit. In other words, the present invention provides a method for manufacturing a board that achieves a finished precision close to the design value of the circuit.

As a result of intensive study on the above-mentioned issues, the inventor of the present invention discovered that by protecting the surface portion of the circuit that has been etched once with an insulating resin, it is possible to suppress the second etching treatment of the surface portion, and the edge of the circuit can be prevented. The present invention was completed based on the discovery that dimensional accuracy can be improved by suppressing excessive etching of parts.

More specifically, the surface portion of the circuit that has been etched once corresponds to the side surface of the circuit, and the purpose is to suppress excessive etching from the side surface of the circuit.

As shown in FIGS. 3 to 5, the substrate manufacturing method (claim 1) of the present invention for solving the above problems includes forming a first etching resist (40) covering the surface of the first conductor (60). ) is provided in the portion that will become the circuit intermediate (20), a second step in which the first conductor (60) is etched and the circuit intermediate (20) is provided, and a step in which the circuit intermediate (20) is provided after etching. a third step in which the first insulating resin (30) is filled into the space (401); a fourth step in which the second etching resist (50) is provided on the surface of the circuit intermediate; a fifth step in which the side surface (203) is half-etched while being protected by the first insulating resin (30) to provide the first circuit (21) and the second circuit (22); It is characterized by having.
According to the substrate of the present invention, it is possible to provide a method for manufacturing a circuit of a substrate and a substrate having the circuit, which suppress excessive etching of the edge of the circuit and improve the dimensional accuracy of the circuit.

Furthermore, as an embodiment (claim 2) of the substrate manufacturing method of the present invention, as shown in FIG. ) and the upper surface of the first insulating resin (30).

Furthermore, the method for manufacturing a substrate of the present invention (claim 3) for solving the above problems includes a first etching resist that covers the surface of the first conductor (60), as shown in FIGS. 9 to 11. (40) is provided in the portion that will become the first circuit (21); and an eighth step, in which the first conductor (60) is etched and the first circuit (21) is provided. , a ninth step in which the space (402) provided after etching is filled with the first insulating resin (30B), and a second conductor (61) is placed on the surface of the first circuit (21) and the first a tenth step in which the second etching resist (50) is provided over the surface of the second conductor (61); A twelfth circuit in which the side surface (214) of the conductor is etched while being protected by the first insulating resin (30B) to provide a second circuit (22) connected to the first circuit (21). It is characterized by having a process.

Furthermore, as an embodiment (claim 4) of the substrate manufacturing method of the present invention, as shown in FIG. 10(B), the second etching resist (50) in the eleventh step is It is characterized in that it is provided across the upper surface of the first circuit (21) and the upper surface of the first insulating resin (30B) with the body (61) interposed therebetween.

Furthermore, the method for manufacturing a substrate of the present invention (claim 5) for solving the above problems includes a first etching resist that covers the surface of the first conductor (60), as shown in FIGS. 14 to 16. (40) is provided in the portion that will become the first circuit (21C), an eighth step in which the first conductor is etched and the first circuit (21C) is provided, and after etching. a fourteenth step of filling the provided space (402) with the first insulating resin (30C); a fifteenth step of providing a protective coating (7) on the surface of the first circuit (21C); a sixteenth step in which a second conductor (61) is provided over the surface of the first circuit (21C), the surface of the first insulating resin (30C), and the surface of the protective coating (7); A seventeenth step in which a second etching resist (50) is provided on the surface of the conductor (61), and the side surface (214C) and surface of the first conductor (60) are made of the first insulating resin (30C). and an eighteenth step in which a second circuit (22C) connected to the first circuit (21C) is provided by etching while protected by the protective film (7).

Further, in an embodiment (claim 6) of the substrate manufacturing method of the present invention, the second etching resist (50) in the seventeenth step is formed with the second conductor (61) interposed therebetween. It is characterized in that it is provided over the upper surface of the protective coating (7) and the upper surface of the first insulating resin (30C).

Furthermore, an embodiment (claim 7) of the method for manufacturing a substrate according to the present invention is characterized in that the conductor is a rolled conductor.

Furthermore, as an embodiment (claim 8) of the method for manufacturing a substrate of the present invention, the state after the manufacturing method according to claim 7 is used as a base material, and the surface of the base material is electrolytically conductive by plating treatment. and a step of the manufacturing method according to any one of claims 3 to 6.

Further, in an embodiment (claim 9) of the substrate manufacturing method of the present invention, the first circuit (21, 21C, 21C1) is a planar circuit extending in the planar direction of the substrate, and the second circuit ( 22, 22C, 22C1) are characterized in that they are interlayer circuits extending in the thickness direction of the substrate.

Further, in an embodiment (claim 10) of the method for manufacturing a substrate of the present invention, the first circuit (21, 21C, 21C1) and the second circuit (22, 22C, 22C1) It is characterized by being an interlayer circuit extending in the direction.

Furthermore, the substrate of the present invention (claim 11) for solving the above problem has a first circuit (21) and a second circuit (22), as shown in FIGS. 6(B) and 7. , an insulator (3B), in the cross section of the portion where the first circuit (21) and the second circuit (22) are overlapped adjacently, in the thickness direction of the substrate. The width (W1) of the bottom of the first circuit (21), which is the center side of the board, is larger than the width (W2) of the top part of the first circuit 21, which is the front side of the board in the thickness direction. The circuit (21) and the second circuit (22) have a connection surface (23) between the conductors between the top (211) of the first circuit and the bottom (215) of the second circuit (22). ), and the connection surface (23) between the conductors is arranged in such a manner that there is a connection surface of the conductors extending in the plane direction and there is no connection surface of the conductors extending in the thickness direction. do.

Furthermore, as an embodiment (claim 12) of the substrate of the present invention, the insulator (3B) is connected to the insulating resin (30B) of the first circuit that contacts the side surface (214) of the first circuit; There is a connecting surface (301) between the insulating resins between the side surface (223) of the second circuit and the insulating resin (31B) of the second circuit that contacts, and the connecting surface (301) between the insulating resins is a flat surface. It is characterized in that there is a connecting surface of insulating resin extending in the direction, and that the connecting surface between the conductors and the connecting surface between the insulating resins are on the same plane without a step.

Furthermore, as an embodiment (claim 13) of the substrate of the present invention, as shown in FIG. 12(B), a protective film (7) is provided on the surface of the first circuit (21C), The coating (7) is characterized by a lower height than the second circuit (22C).

Furthermore, as an embodiment (claim 14) of the substrate of the present invention, as shown in FIG. 11(B), it has a third circuit (21') different from the first circuit (21), In the cross section of the portion where the third circuit (21') and the second circuit (22) are overlapped adjacently, the second circuit (22) and the third circuit (21') are similar to the second circuit (21'). A connection surface (23A) for connecting other conductors is provided between the top (221) of the circuit (22) and the bottom of the third circuit (21'). ) is characterized in that it is arranged in a state where there is a connection surface of the conductor extending in the plane direction and there is no connection surface of the conductor extending in the thickness direction.

Furthermore, as an embodiment (claim 15) of the substrate of the present invention, the insulator (3B) is a second insulating resin (31B) that contacts the side surface of the second circuit, and a third circuit (21 A connecting surface (301A) between the second insulating resins is provided between the third insulating resin (30B') that is in contact with the side surface of the insulating resin (30B'), and the connecting surface (301A) between the second insulating resins is It is characterized in that there is a connecting surface of the insulating resin extending in the plane direction, and that the connecting surface of the other conductors and the connecting surface of the second insulating resin are on the same plane with no step.

Furthermore, as an embodiment (claim 16) of the substrate of the present invention, as shown in FIG. It is characterized by being larger than the width (W4) of the top of the second circuit, which is the front side in the thickness direction.

Furthermore, as an embodiment (claim 17) of the substrate of the present invention, the width of the bottom of the third circuit (21'), which is the center side in the thickness direction of the substrate, is on the front side of the substrate in the thickness direction. It is characterized by being larger than the width of the top of the third circuit (21').

Furthermore, as an embodiment (claim 18) of the substrate of the present invention, as shown in FIG. 1(B), a first circuit (21) of a rolled plate made of a rolled plate, and a rolled plate made of a rolled plate and a second circuit (22) of the rolled plate, wherein the first circuit (21) of the rolled plate and the second circuit (22) of the rolled plate are an integral conductor without a connecting surface. do.

Furthermore, as an embodiment (claim 19) of the board of the present invention, as shown in FIG. 17, it has a reinforcing structure (29) in the same plane as the first circuit (21) of the rolled plate, The first circuit (21) of the rolled plate and the reinforcing structure (29) are characterized in that they are formed from the same rolled plate.

Furthermore, as an embodiment (claim 20) of the substrate of the present invention, as shown in FIG. It is characterized by being arranged so as to be covered by a part where the first circuit (21C1) and the second circuit (22C1) are connected or a part where the second circuit (22C1) and the third circuit are connected. .

According to the present invention, it is possible to provide a method for manufacturing a circuit of a substrate and a substrate having the circuit, in which excessive etching of the edge of the circuit is suppressed and dimensional accuracy of the circuit is improved.

(A) is a schematic diagram showing a plan view of the substrate of the first embodiment of the present invention. Figure (B) is a schematic diagram showing the aa cross section of Figure (A). Figure (C-1) in Figure (C) is a schematic diagram showing the bb cross section in Figure (B), and Figure (C-2) is a schematic diagram showing the cc cross section in Figure (B). It is. (A) is a schematic diagram showing the bb cross section of FIG. 1(B), and (B) is a schematic diagram showing the cc cross section of FIG. 1(B). FIG. 3 is a diagram showing the manufacturing process of the substrate according to the first embodiment of the present invention. FIG. 3 is a diagram showing the manufacturing process of the substrate according to the first embodiment of the present invention. FIG. 3 is a diagram showing the manufacturing process of the substrate according to the first embodiment of the present invention. (A) is a schematic diagram showing a plan view of a substrate according to a second embodiment of the present invention. Figure (B) is a schematic diagram showing the aa cross section of Figure (A). Figure (C-1) in Figure (C) is a schematic diagram showing the bb cross section in Figure (B), and Figure (C-2) is a schematic diagram showing the cc cross section in Figure (B). It is. 6(A) is a schematic diagram showing the bb cross section of FIG. 6(B), and FIG. 6(B) is a schematic diagram showing the cc cross section of FIG. 6(B). 6A is a cross-sectional view showing a modification of the substrate according to the second embodiment of the present invention, FIG. 6A is a schematic diagram showing the bb section of FIG. 6B in the modification, The figure is a schematic diagram showing the cc cross section of FIG. 6(B) in a modified example. FIG. 2 is a schematic diagram showing a state in which the plate is cut in the thickness direction. It is a figure which shows the manufacturing process of the board|substrate of the 2nd embodiment of this invention. It is a figure which shows the manufacturing process of the board|substrate of the 2nd embodiment of this invention. It is a figure which shows the manufacturing process of the board|substrate of the 2nd embodiment of this invention. (A) is a schematic diagram showing a plan view of a substrate according to a third embodiment of the present invention. Figure (B) is a schematic diagram showing the aa cross section of Figure (A). Figure (C-1) in Figure (C) is a schematic diagram showing the bb cross section in Figure (B), and Figure (C-2) is a schematic diagram showing the cc cross section in Figure (B). It is. 12(A) is a schematic diagram showing the bb cross section of FIG. 12(B), and FIG. 12(B) is a schematic diagram showing the cc cross section of FIG. 12(B). It is a figure which shows the manufacturing process of the board|substrate of the 3rd embodiment of this invention. It is a figure which shows the manufacturing process of the board|substrate of the 3rd embodiment of this invention. It is a figure which shows the manufacturing process of the board|substrate of the 3rd embodiment of this invention. (A) is a schematic diagram illustrating a cross-sectional view of the substrate according to the fourth embodiment of the present invention, cut in the thickness direction along the first circuit. Figure (B) is a schematic diagram showing the aa cross section of Figure (A). (A) is a schematic diagram showing the bb cross section of FIG. 17(A), and (B) is a schematic diagram showing the cc cross section of FIG. 17(A). (A) is a schematic diagram showing a cross section taken along line dd in the figure. It is a figure which shows the manufacturing process of the board|substrate of the 4th embodiment of this invention. It is a figure which shows the manufacturing process of the board|substrate of the 4th embodiment of this invention. It is a figure which shows the manufacturing process of the board|substrate of the 4th embodiment of this invention. It is a schematic diagram showing a modification of the board of the fourth embodiment of the present invention, and (A) shows a state of a cross-sectional view of the board of the modification taken along the first circuit in the board thickness direction. It is a schematic diagram. Figure (B) is a schematic diagram showing the aa cross section of Figure (A). . FIG. 2 is a schematic diagram showing a board manufactured by a conventional manufacturing method, and FIG. Figure (B) is a schematic diagram showing the aa cross section of Figure (A). Figure (C-1) in Figure (C) is a schematic diagram showing the bb cross section in Figure (B), and Figure (C-2) is a schematic diagram showing the cc cross section in Figure (B). It is.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a method for manufacturing a substrate circuit and a substrate having the circuit according to the present invention will be described in detail with reference to the drawings.
Note that the method for manufacturing a circuit on a substrate and the substrate having the circuit described in the embodiments are merely exemplified to explain the method for manufacturing a circuit on a substrate and the substrate having the circuit according to the present invention. It is not limited to.

The substrate of the present invention includes a circuit body made of a conductor and an insulator, and the circuit body and electronic components are connected so that electricity flows to constitute an electronic device.

[First embodiment]
(substrate)
Referring to FIG. 1, the structure of a substrate according to an embodiment of the invention will be described. The substrate 1A of the present invention has a circuit layer 4 including a circuit body 2 and an insulator 3.
Further, the substrate 1 of the present invention has a circuit layer 4 and a base material 5, which are stacked on top of each other.

<Circuit body>
The circuit body 2 includes a first circuit 21 and a second circuit 22. The circuit body 2 is formed from a conductor, and is formed from a rolled plate-shaped conductor or an electrolytic conductor provided by plating.
The circuit body 2 includes a circuit for passing electricity and/or a circuit for passing heat.
The first circuit 21 is a planar circuit extending in the direction of the plane of the XY axis, and the second circuit 22 is an interlayer circuit extending in the direction of the board thickness of the Z axis.

A planar circuit is a circuit that extends in a plane direction. The planar circuit has an interlayer circuit on at least one side and an interlayer circuit on the other side extending in a direction opposite to the one side.
Further, an interlayer circuit is a circuit extending in the thickness direction of the board, and is a circuit for connecting circuits in different layers.
In addition, in the embodiment of the present invention, in order to simplify the explanation, only one interlayer circuit is illustrated.
The first circuit 21 and the second circuit 22 are provided as an integral conductor without a connection surface. Therefore, since there is no connection surface between the conductors, there is an effect of suppressing the possibility of connection failure due to thermal expansion of the conductors.

≪First circuit≫
The planar circuit of the first circuit 21 has a top portion 211 of the planar circuit that is a gentle curve that is recessed inward from the surface (upper surface) of the substrate 1, and an end portion of the boundary between the planar circuit and the insulating resin. has a top protrusion 212 that protrudes toward the front side. This protruding top protrusion 212 is formed as one continuous protrusion so as to surround the center portion 213 of the planar circuit when viewed from the plane of the substrate (XY axis direction).
Furthermore, the ceiling protrusion 212 is located at a location that extends inside the insulating resin 30 from the surface thereof.
The side surface 214 of the planar circuit contacts the insulating resin 30 and forms a gently sloped surface that widens toward the bottom 215 of the planar circuit.
This sloped surface structure is a shape realized by using the method of manufacturing a substrate circuit of the present invention, and is the result of the side surface of the first circuit 21 being left without being etched too much.

In the conventional manufacturing method, when insulating resin 930 is provided after performing half etching twice, as shown in FIG. The substrate 910 has a shape with a curved surface that gently descends toward the center (lower side) in the thickness direction. In other words, in the conventional method, during the second etching process, excessive etching is performed from the sides of the circuit, and excessive etching is performed toward the bottom 925 of the planar circuit 921, resulting in the width of the circuit becoming narrower. Tend.
In the present invention, by etching the side surface 214 of the circuit (first circuit 21) while protecting it with the insulating resin 30, it is possible to prevent the circuit from becoming too thin, and it is easy to form the circuit to a width close to the design value. This has the effect of suppressing the possibility of circuit breakage.
In addition, in addition to cases where the top protrusion 212 protrudes outward (upward) in the board thickness direction, depending on the conditions of the etching process, the top protrusion 212 may not be visible and the top portion 211 may be in a nearly flat state. Sometimes it happens. However, unlike circuits manufactured using conventional manufacturing methods, the boundary between the planar circuit and the insulating resin can be suppressed from having a curved shape that gently slopes down to the center in the board thickness direction. The effect of suppressing etching remains unchanged.

As shown in (A) of FIG. The cross section of the planar circuit when cut perpendicularly to the direction in which it extends has a trapezoidal shape with a concave upper side.
The width W1 of the bottom portion 215 of the first circuit 21 is larger than the width W2 of the top portion 211 of the first circuit 21 (width between the top protrusions 212).
The insulating resin 30 covering the side surface of the first circuit 21 also includes a lateral protrusion 305 that protrudes toward the center portion 213 (laterally) of the first circuit 21 so as to cover the top of the ceiling protrusion 212 . is formed.

≪Second circuit≫
The interlayer circuit of the second circuit 22 has a top portion 221 of the interlayer circuit with a flat surface so as to be flush with the insulating resin 30 and the insulating resin 31. The bottom portion 222 of the second circuit 22 corresponds to an imaginary line 225 connecting the top protrusions 212.
A side surface 223 of the second circuit 22 (interlayer circuit) that contacts the insulating resin 30 forms a gentle slope that widens toward the bottom 222 of the interlayer circuit.
This sloped surface structure is a shape realized by using the method of manufacturing a substrate circuit of the present invention, and is the result of leaving the side surface 223 of the second circuit 22 without being etched too much.

In the conventional manufacturing method, as shown in FIG. 23, the edges of the circuit are etched too much, so that the edge 927 of the boundary between the interlayer circuit and the insulating resin gently descends toward the center of the substrate 910 in the thickness direction. It becomes a shape with a curved surface. That is, conventional methods tend to over-etch from the sides of the circuit and over-etch toward the bottom 926 of the interlayer circuit, resulting in a thinner circuit.
In the present invention, by etching the side surface of the circuit (second circuit 22) while protecting it with the insulating resin 30, it is possible to prevent the circuit from becoming too thin, and it becomes easier to form the circuit to a width close to the design value. This has the effect of suppressing the risk of circuit disconnection.

As shown in FIG. 2B, the second circuit 22 is located at a portion where the first circuit 21 and the second circuit 22 are superimposed adjacent to each other. The cross section of the interlayer circuit when cut perpendicularly to the direction extending in the plane direction is trapezoidal.
The width W3 of the bottom portion 222 of the second circuit 22 is larger than the width W4 of the top portion 221 of the second circuit 22.

Note that in this embodiment, the first circuit 21 and the second circuit 22 are cut so as to be perpendicular to the direction extending in the planar direction of the planar circuit, which is the first circuit, at a portion where the first circuit 21 and the second circuit 22 are overlapped adjacently. In this case, the cross section of the circuit becomes one trapezoid, and the side surface 214 of the first circuit and the side surface 223 of the second circuit 22 form one gentle slope. In other words, the width W2 of the first circuit 21 and the width W3 of the second circuit are equal.

<Insulator>
The insulator 3 includes an insulating resin 30 and an insulating resin 31.
The insulating resin 30 and the insulating resin 31 may be made of the same material or different materials as long as they do not conduct electricity.
The insulating resin 30 and the insulating resin 31 have a connecting surface 32 that is inclined in the thickness direction.

≪Insulating resin 30≫
The insulating resin 30 is arranged so as to be in contact with the side surface 214 of the first circuit 21, the side surface 223 of the second circuit, the side surface of the insulating resin 31, and the base material 5.
The insulating resin 30 is arranged to cover the side surface 214 of the first circuit 21 and the side surface 223 of the second circuit, and also serves to protect the side surface of the circuit from the etching solution during the circuit manufacturing process.

≪Insulating resin 31≫
The insulating resin 31 is arranged so as to be in contact with the top 211 of the first circuit 21 , the side surface 223 of the second circuit, and the side surface of the insulating resin 30 .
The insulating resin 31 is filled into the etched space while the side surfaces of the circuit intermediate body 20 (described later) are covered with the insulating resin 30.

<Base material>
The base material 5 may be anything that supports the first circuit 21 and the second circuit 22, and may be a plate-like insulating plate made of a sheet-like body woven from glass fibers and an insulating resin. The base material may be a circuit layer including a circuit made of a conductor connected to the bottom 215 of the first circuit 21 so as to conduct electricity and/or heat.

(About the manufacturing method of the board)
With reference to FIG. 3, a method for manufacturing the substrate 1A of the first embodiment will be described. Each process is represented by a number, such as the first step, second step, and third step, but there are cases where the steps do not proceed in the numerical order, so the It is not mandatory to proceed with this.

First, as shown in FIG. 3(A), a conductor 60 is provided on the entire surface of the base material 5. The conductor 60 corresponds to a first conductor, and may be either a rolled conductor or an electrolytic conductor.
A first etching resist 40 covering the surface of the conductor 60 is provided in a portion of the circuit intermediate body 20 that becomes the first circuit 21 and the second circuit 22. This step is the first step.

As shown in FIG. 3(B), an etching process is performed and a circuit intermediate body 20 is provided. As a result, a portion of the base material 5 is exposed, and an etched space 401 is provided. This step is referred to as the second step.

As shown in FIG. 3C, the first etching resist 40 is removed, and the space 401 provided after etching is filled with insulating resin 30. Then, the surface of the circuit intermediate body 20 is exposed, and the side surface 203 of the circuit intermediate body 20 and the surface of the base material 5 are covered with the insulating resin 30. This step is referred to as the third step.
Although not shown, the third step includes a surface smoothing treatment (step) in which the surface of the circuit intermediate body 20 and the surface of the insulating resin 30 are made into one flat surface (same plane) with no step. You may be

As shown in FIG. 4A, a second etching resist 50 is provided over the surface of the circuit intermediate body 20 and the insulating resin 30 in a portion that will become the second circuit 22. As shown in FIG. Thereby, the end portion 201 of the circuit intermediate body 20 and the side surface 203 of the circuit intermediate body 20 are protected. Note that the end portion 202 of the circuit intermediate body 20 where the second etching resist 50 is not provided is protected by the insulating resin 30. This step is referred to as the fourth step.

As shown in FIG. 4(B), the end portion 201 and side surface 203 of the circuit intermediate body 20 are protected by the second etching resist 50 and the insulating resin 30, and the side surface 203 of the circuit intermediate body 20 is protected by the insulating resin 30. The half-etching process is performed while protected by . Then, by providing the space 501, the first circuit 21 and the second circuit 22 are completed. Note that the end portion 202 is prevented from being etched from the side surface 203, the height of the end portion 201 is reduced, and the end portion 202 becomes a ceiling portion 212. This step is referred to as the fifth step.

As shown in FIG. 4C, the second etching resist 50 is removed and the space 501 is filled with the insulating resin 31. Then, the top portion 211 of the first circuit is in a buried state. This step is referred to as the sixth step.
Although not shown, in the sixth step, the top 221 of the second circuit 22 (interlayer circuit), the surface of the insulating resin 30, and the surface of the insulating resin 31 are formed into one flat surface with no step. (same plane) may be included.

Through the above steps, the circuit layer 4 is completed.
Thereafter, necessary surface treatments such as solder resist are performed on the substrate 1A, and the substrate 1A having the circuit layer 4 and the base material 5 is completed.

Note that after the circuit layer 4, an electrolytic conductor is provided, for example, by plating over the entire top portion 221 of the second circuit (interlayer circuit), the surface of the insulating resin 30, and the surface of the insulating resin 31. A process may be performed to form the necessary circuitry using electrolytic conductors. Specifically, as shown in FIG. 5A, a base material 5' including the circuit layer 4 and the base material 5 manufactured in the first to sixth steps is used, and a conductor 60 is newly provided. , repeat the first to sixth steps to create a third circuit 21' (corresponding to the first circuit) and a fourth circuit 22' (corresponding to the second circuit 22) connected to the second circuit 22. It is also possible to create a substrate 1A in which a plurality of circuit layers 4 and circuit layers 4' are stacked.
In this case, between the insulating resin 30 and the insulating resin 30' or between the insulating resin 31 and the insulating resin 30', a connecting surface 300 between the insulating resins, which has no connecting surface in the thickness direction and extends in the planar direction, is formed. Ru.
Further, between the second circuit 22 and the third circuit 21', there is formed a connection surface 60A between conductors that has no connection surface in the thickness direction and extends in the plane direction. Further, the connection surface 300 between the insulating resins and the connection surface 60A between the conductors exist on one and the same plane without any difference in level.
In addition, in the section in the plate thickness direction of the portion where the second circuit 22 and the third circuit 21' are overlapped adjacently, the width of the bottom of the third circuit 21' is equal to the width of the top of the second circuit 22. It is preferable that the width is larger than the width of the portion 221. Excessive etching of the end portion of the top portion 221 of the second circuit 22 can be suppressed.

Furthermore, in the present embodiment, in the fourth step in FIG. However, as shown in FIG. 5B, the second etching resist 50 may be provided only on the surface of the circuit intermediate body 20 in a portion that will become the second circuit 22. Even in this case, since the side surface 203 of the circuit intermediate body 20 is covered with the insulating resin 30, etching from the side surface can be prevented and excessive etching can be suppressed. There is no difference.

[Second embodiment]
A second embodiment of the present invention will be described with reference to FIG.
Components having the same configuration as those in the first embodiment are given the same reference numerals, and description thereof will be omitted.
The present invention is different from the first embodiment in that a connection surface 23 between conductors is provided between the first circuit 21 and the second circuit 22 of the circuit body 2B.
Further, this embodiment differs from the first embodiment in that there is a connecting surface 301 between the insulating resins 30B and 31B, which has no connecting surface in the thickness direction and has a connecting surface in the planar direction.

<Circuit body>
The circuit body 2B includes a connection surface 23 between the conductors between the first circuit 21 and the second circuit 22. The connection surface 23 between the conductors is a connection surface that has no connection surface in the thickness direction and extends in the plane direction.
The circuit body 2B includes a first circuit 21 and a second circuit 22. The circuit body 2B is formed from a conductor, such as a rolled conductor or an electrolytic conductor.
The circuit body 2B may be either a circuit for passing electricity and/or a circuit for passing heat.
<Insulator>
The insulator 3B includes an insulating resin 30B and an insulating resin 31B.
The insulating resin 30B and the insulating resin 31B may be made of the same material or different materials as long as they do not conduct electricity.
Insulating resin 30B and insulating resin 31B have a connecting surface 301 between the insulating resins. The connection surface 301 between the insulating resins is a connection surface that has no connection surface in the thickness direction and extends in the plane direction.
Furthermore, the connection surface 301 between the insulating resins and the connection surface 23 between the conductors exist on one and the same plane with no difference in level.

In this embodiment, as shown in FIG. 7B, the width W2 of the top portion 211 and the width W3 of the bottom portion 222 are equal, and the first circuit 21 and the second circuit 22 have a trapezoidal shape. The example below shows the case where However, as shown in FIGS. 8A and 8B, depending on the circuit design, the width W2 of the top portion 211 may be smaller than the width W3 of the bottom portion 222 (W2<W3), or the width W2 of the top portion 211 may be smaller than the width W3 of the bottom portion 222. may be larger than the width W3 of the bottom portion 222 (W2>W3).

(About the manufacturing method of the board)
With reference to FIG. 9, a method for manufacturing the substrate 1 according to the second embodiment will be described.

First, as shown in FIG. 9(A), a conductor 60 is provided on the entire surface of the base material 5. The conductor 60 corresponds to a first conductor, and may be either a rolled conductor or a conductor formed by plating.
A first etching resist 40 covering the surface of the conductor 60 is provided in a portion that will become the first circuit 21 . This step is referred to as the seventh step.

As shown in FIG. 9(B), an etching process is performed and a first circuit 21 is provided. As a result, a portion of the base material 5 is exposed, and a space 402 from which the conductor 60 is removed is provided. This step is referred to as the eighth step.

As shown in FIG. 9C, the first etching resist 40 is removed, and the space 402 provided after etching is filled with an insulating resin 30B. Then, the surface of the first circuit 21 is exposed, and the side surface 214 of the first circuit 21 and the surface of the base material 5 are covered with the insulating resin 30B. This step is referred to as the ninth step.
Although not shown, the ninth step includes a surface smoothing treatment (step) in which the surface of the first circuit 21 and the surface of the insulating resin 30B are made into one flat surface (same plane) with no step. May be included.
By this surface smoothing treatment, the surface of the first circuit 21 and the surface of the insulating resin 30B become flat surfaces with no difference in level.

As shown in FIG. 10A, plating is performed to provide a conductor 61, which is an electrolytic conductor, over the surface of the first circuit 21 and the surface of the insulating resin 30B. The conductor 61 corresponds to a second conductor. Note that this step brings about a state in which there is no connection surface in the thickness direction between the first circuit 21 and the conductor 61, and there is a connection surface that extends in the plane direction. This step is referred to as the tenth step.

As shown in FIG. 10(B), a second etching resist 50 is provided in a portion that will become the second circuit 22. At this time, the second etching resist 50 is placed so as to cover the end portion 217 of the first circuit 21 with the conductor 61 interposed therebetween. This step is referred to as the eleventh step.

As shown in FIG. 10C, the end portion 217 of the first circuit 21 is disposed so as to be covered with the second etching resist 50 with the conductor 61 interposed therebetween, and the side surface of the first circuit 21 is The etching process is performed while 214 is protected by the insulating resin 30B.
Further, the top portion 211 of the first circuit 21 is arranged without being covered with the second etching resist 50 with the conductor 61 interposed therebetween, and the side surface 214 of the first circuit 21 is protected with the insulating resin 30B. In this state, the etching process is performed.
Then, the side surface 223 of the second circuit 22, the surface of the insulating resin 30B, and the surface (top portion 211) of the first circuit 21 are exposed, and the first circuit 21 and the second circuit 22 are exposed. provided. Further, the top protrusion 212 of the first circuit 21 is shaped, and the top protrusion 212 is located at a lower position than the surface of the insulating resin 30B. Further, a space 501 is provided in which the conductor 61 is removed by etching. Furthermore, a state is reached in which a connection surface 23 between the conductors exists. This step is referred to as the twelfth step.

As shown in FIG. 11A, the space 501 is filled with the insulating resin 31B, so that the top 211 of the first circuit 21 and the side surface 223 of the second circuit 22 are buried. In addition, through this process, a connecting surface 301 between insulating resins is provided between the insulating resin 30B and the insulating resin 31B, and the connecting surface 301 between the insulating resins and the connecting surface 23 between the conductors are on the same plane with no step. It will be in a state of being above. This step is referred to as the thirteenth step.
Although not shown, in the thirteenth step, the top part 221 of the second circuit 22 (interlayer circuit 22) and the surface of the insulating resin 31B are one flat surface (same plane) with no step. It may also include a surface preparation process (process).

Through the above steps, the circuit layer 4B is completed.
Thereafter, necessary surface treatments such as solder resist are performed on the substrate 1B, and the substrate 1B including the circuit layer 4B and the base material 5 is completed.

In this embodiment, after the first circuit 21 is created, the insulating resin 30B is filled. By providing the electrolytic conductor and the second circuit 22, the circuit width (W4) can be made smaller relative to the height (thickness) of the electrolytic conductor, making it easier to refine the circuit and design. This has the effect of increasing the degree of freedom.

Note that after the circuit layer 4B, a step is performed in which an electrolytic conductor is provided entirely by plating over the top 221 of the second circuit (interlayer circuit) and the surface of the insulating resin 31B, thereby making the electrolytic conductor The necessary circuits may be formed using the body. Specifically, as shown in FIG. 11(B), a state including the circuit layer 4B and the base material 5 manufactured in the seventh to thirteenth steps of this embodiment is referred to as a base material 5', A new conductor 60 is provided and the seventh to thirteenth steps are performed again to form a third circuit 21' (corresponding to the first circuit) and a fourth circuit 22' (corresponding to the first circuit) which are connected to the second circuit 22. It is also possible to create a substrate 1B in which a plurality of circuit layers 4B and 4B' are stacked.

In this case, a second insulating resin connection surface 301A that has no connection surface in the thickness direction and extends in the plane direction is formed between the insulating resin 31B and the insulating resin 30B'. In other words, a second insulating resin connection surface 301A different from the insulating resin connection surface 301 is formed.
Further, between the second circuit 22 and the third circuit 21', there is formed a connection surface 23A between conductors that has no connection surface in the thickness direction and extends in the planar direction. In other words, a connection surface 23A between conductors different from the connection surface 23 between conductors is formed.
Further, the connection surface 301A between the insulating resins and the connection surface 23A between the conductors exist on one and the same plane without any difference in level.
In addition, in the section in the plate thickness direction of the portion where the second circuit 22 and the third circuit 21' are overlapped adjacently, the width of the bottom of the third circuit 21' is equal to the width of the top of the second circuit 22. It is preferable that the width is larger than the width of the portion 221. Excessive etching of the end portion of the top portion 221 of the second circuit 22 can be suppressed.

Furthermore, in this embodiment, in the eleventh step of FIG. 10(B), a case where the second etching resist 50 is provided in the portion that will become the second circuit 22 has been exemplified, but FIG. 11(C) As shown in , the second etching resist 50 is provided so as to cover only the central portion of the first circuit 21 without covering the end portion 217 of the first circuit 21 with the conductor 61 interposed therebetween. In some cases. Even in this case, since the side surface 214 of the first circuit 21 is covered with the insulating resin 30B, etching from the side surface can be prevented and excessive etching can be suppressed. There is no difference.

[Third embodiment]
A third embodiment of the present invention will be described with reference to FIGS. 12 and 13.
Components having the same configuration as those in the first embodiment and the second embodiment are given the same reference numerals, and explanations thereof will be omitted.
The present invention differs from the first and second embodiments in that the top portion 211 of the first circuit 21 is provided with a protective coating 7.
(substrate)
The substrate 1C of the present invention has a circuit layer 4C including a circuit body 2C, an insulator 3, and a protective coating 7.
The substrate 1C of the present invention has a circuit layer 4C and a base material 5, which are stacked on top of each other.

<Circuit body>
The circuit body 2C includes a first circuit 21C and a second circuit 22C. The circuit body 2C is formed from a conductor, such as a rolled conductor or an electrolytic conductor.
The circuit body 2C may be either a circuit for passing electricity and/or a circuit for passing heat.
The first circuit 21C is a planar circuit extending in the direction of the plane of the XY axis, and the second circuit 22C is an interlayer circuit extending in the direction of the board thickness of the Z axis.
The circuit body 2C includes a connection surface 23C between the conductors between the first circuit 21C and the second circuit 22C. The connection surface 23C between the conductors is a connection surface that has no connection surface in the thickness direction and extends in the plane direction.

≪First circuit≫
The planar circuit of the first circuit 21C has a planar circuit top portion 211C and a top corner portion 216.
The top portion 211C is a flat plane, and is formed to be on the same plane as a connection surface 23C between conductors and a connection surface 301C between insulating resins, which will be described later.
The top corner portion 216 is a corner portion that contacts the insulating resin 30C and the protective coating 7, and is a boundary portion located so as to surround the center portion 25 of the planar circuit when viewed from the plane of the substrate (XY axis direction). It is.
Furthermore, the side surface 214C of the planar circuit that contacts the insulating resin 30C forms a gentle slope that widens toward the bottom 215 of the first circuit 21C.

As shown in FIG. 13(A), the first circuit 21 is located in the planar direction of the planar circuit that is the first circuit 21C in a portion where the first circuit 21C and the second circuit 22C are not overlapped. The planar circuit has a trapezoidal cross section when cut perpendicular to the direction in which it extends.
The width W1C of the bottom 215C of the first circuit 21C is larger than the width W2C of the top 211C of the first circuit 21C.

≪Second circuit≫
The interlayer circuit of the second circuit 22C has a top portion 221C of the interlayer circuit that is flat so as to be flush with the insulating resin 31C. Further, the bottom portion 222C of the interlayer circuit of the second circuit 22C corresponds to the portion connected to the top portion 211C of the first circuit 21C.
The side surface 223C of the interlayer circuit in contact with the insulating resin 31C forms a gentle slope that widens toward the bottom 222C of the interlayer circuit.
This sloped surface structure is a shape realized by using the method of manufacturing a substrate circuit of the present invention, and is a result of the side surface 223C of the second circuit 22 being left without being etched too much.

In the present invention, by etching the side surface of the circuit (second circuit 22) while protecting it with the insulating resin 31C, it is possible to prevent the first circuit 21C from becoming too thin, and the circuit is close to the design value. This makes it easier to shape the width and has the effect of suppressing the risk of circuit breakage.

As shown in FIG. 12(C), the second circuit 22C is a planar circuit that is the first circuit in a portion where the first circuit 21C and the second circuit 22C are overlapped adjacently. The cross section of the interlayer circuit when cut perpendicularly to the direction extending in the plane direction is trapezoidal.
The width W3C of the bottom portion 222C of the second circuit 22C is smaller than the width W4C of the top portion 221C of the second circuit 22C.
Note that in this embodiment, as shown in FIGS. 13A and 13B, the width W2 of the top portion 211C and the width W3 of the bottom portion 222C are equal to each other. Even if the width W2 of the top portion 211C is smaller than the width W3 of the bottom portion 222C (W2<W3) or the width W2 of the top portion 211C is larger than the width W3 of the bottom portion 222C (W2>W3). good.

<Insulator>
The insulator 3C includes an insulating resin 30C and an insulating resin 31C.
The insulating resin 30C and the insulating resin 31C may be made of the same material or different materials as long as they do not conduct electricity.
The insulating resin 30C and the insulating resin 31C have an insulating resin connection surface 301C. The connection surface 301C between the insulating resins is a connection surface that has no connection surface in the thickness direction and extends in the planar direction.
Furthermore, the connection surface 301C between the insulating resins and the connection surface 23C between the conductors exist on the same plane and are arranged in a flat state with no steps.

≪Insulating resin 30C≫
The insulating resin 30C is placed in contact with the side surface 214C of the first circuit 21C and the base material 5.
The insulating resin 30C is disposed to cover the side surface 214C of the first circuit 21C, and also serves to protect the side surface of the circuit from the etching solution during the circuit manufacturing process.

≪Insulating resin 31C≫
The insulating resin 31C is arranged so as to be in contact with the side surface 223C of the second circuit 22C, the surface of the protective coating 7, and the surface of the base material 5.
The insulating resin 31C is filled into the etched space 501 while the side surface of the first circuit 21, which will be described later, is covered with the insulating resin 30C.

<Protective film>
The protective coating 7 is arranged to cover a part of the surface of the first circuit 21C and the surface of the insulating resin 30C. In other words, the protective coating 7 is arranged to cover the portion that will become the planar circuit, but not cover the portion that will form the second circuit 22C.
The protective film 7 protects the conductor of the top portion 221C and the top corner portion 216 of the first circuit 21C from the etching solution during the etching process, and serves as an electrolytic conductor that becomes the basis of the second circuit 22C during the plating process. When providing the electrolytic conductor 62, a material that does not affect the formation of the electrolytic conductor 62 is used.
Specifically, a material having insulating properties can be used, and for example, the same material as the insulating resin 30C and/or the insulating resin 31C can be used.
Moreover, the protective coating 7 has a connection surface between it and the insulating resin 30C.

The protective coating 7 is preferably provided with a height (thickness) lower in the thickness direction than the second circuit 22C, and is preferably the minimum height that can protect the first circuit 21C from the etching solution. preferable. Due to the low height of the protective coating 7, when forming the electrolytic conductor 62, which is the basis of the second circuit 22C, by plating, it is possible to minimize the level difference corresponding to the thickness of the protective coating 7, and the plating solution This has the effect of making it easier to make contact with each other, thereby making it easier to form the electrolytic conductor 62 in a good state.

The protective coating 7 may not be provided on the part that will become the second circuit 22C and may be placed so as to cover the first circuit 21C and the insulating resin 30C, or the second circuit may be formed by cutting after the protective coating 7 is provided on the entire area. The circuit 22C is arranged by removing the protective coating 7 at the portion that will become the circuit 22C. Preferably, the protective coating 7 is placed using a dispenser, inkjet or screen printing. If the protective coating 7 is disposed on the entire surface and then removed by cutting, there is a risk that the protective coating 7 will be removed from the surface of the first circuit 21 so as to be recessed into the inside of the conductor. There is a possibility that plating processing cannot be performed in such a condition. On the other hand, when the protective coating 7 is provided using a dispenser, inkjet, or screen printing, it is arranged so as to cover a part of the first circuit 21C and the insulating resin 30C, and does not cover the part that will become the second circuit 22C. This is preferable because it is easy to arrange.

Moreover, it is preferable that a part of the protective coating 7 has an intrusion part 71 formed so as to penetrate into the inside of the second circuit 22C. By having the recessed portion 71, the height in the thickness direction becomes constant over the entire planar circuit of the first circuit 21C. In other words, unlike the top portion 221 of the first embodiment, the etching process does not cause the top portion 221 to curve into the inside, so the height of the planar circuit remains constant throughout. becomes easier to control.

(About the manufacturing method of the board)
With reference to FIG. 14, a method for manufacturing the substrate 1C according to the third embodiment will be described.
First, as shown in FIG. 14(A), the same steps (seventh step and eighth step) as in FIGS. 9A and 9B of the second embodiment are performed, and a first circuit is formed on the surface of the base material 5. 21C and an insulating resin 30C are provided. This step is designated as the fourteenth step.

Next, as shown in FIG. 14(B), a protective film is provided on the surface of the first circuit. The protective coating 7 is provided over the surface of the first circuit 21C and the surface of the insulating resin 30C. This process is called the 15th process.

As shown in FIG. 14(C), similar to FIG. 10(A) of the second embodiment, the first circuit 21, the surface of the insulating resin 30C, and the surface of the protective coating 7 are A conductor 61, which is a second conductor, is provided. Note that this step brings about a state in which there is no connection surface in the thickness direction between the first circuit 21 and the conductor 61, but there is a connection surface extending in the plane direction. This step is designated as the 16th step.

Next, as shown in FIG. 15(A), a second etching resist 50 is provided on the surface of the second conductor, similar to FIG. 10(B) of the second embodiment. At this time, the second etching resist 50 is provided over the portion that will become the second circuit 22C, the insulating resin 30C, and the protective coating 7 with the second conductor 61 interposed therebetween. Furthermore, the second etching resist 50 is arranged to cover a portion of the upper part of the protective coating 7 with the second conductor 61 interposed therebetween. This step is designated as the seventeenth step.

As shown in FIG. 15(B), similar to FIG. 10(C) of the second embodiment, the side and surface (top portion 221C) of the first circuit 21C are protected by the insulating resin 30C and the protective coating 7. The etching process is performed in a state where the side surface 214C of the first circuit 21C is protected by the insulating resin 30C. Then, the side surface 223C of the second circuit 22C, the surface of the insulating resin 30C, and the surface of the protective coating 7 are exposed, and the first circuit 21C and the second circuit 22C are formed. This step is referred to as the eighteenth step.
At this time, since the protective film 7 protects the surface (ends and top portion 211) of the first circuit 21C, the first circuit 21C is not etched and the entire first circuit 21C is covered. Etching can be performed while maintaining the height (circuit thickness), which has the effect of improving the accuracy of the circuit height.
Furthermore, by providing the second etching resist 50 so that the protective film 7 enters the second circuit 22C, excessive etching at the connecting portion between the first circuit 21C and the second circuit 22C can be suppressed. Further, a space 501 is provided in which the conductor 61 is removed by etching. Then, between the first circuit 21C and the second circuit 22C, there is a connection surface 23C between the conductors, which has no connection surface in the thickness direction and extends in the plane direction.

As shown in FIG. 15(C), similarly to FIG. 11(A) of the second embodiment, the space 501 is filled with the insulating resin 31C, and the protective coating 7 and the side surface 223C of the second circuit 22C are filled. It will be in a state where it is This step is designated as the nineteenth step.
In addition, through this step, a connecting surface 301 between the insulating resins is provided between the insulating resin 30C and the insulating resin 31C, and the connecting surface 301C between the insulating resins and the connecting surface 23C between the conductors are on the same plane with no step. It will be in a state of being above.
Although not shown, the nineteenth step may include a process (step) of aligning the top portion 221C of the second circuit 22 (interlayer circuit 22) with the surface of the insulating resin 31C. .

Through the above steps, the circuit layer 4C is completed.
Thereafter, necessary surface treatments such as solder resist and the like are performed on the substrate 1 to complete the substrate 1C.

In this embodiment, after the first circuit 21C is created, the insulating resin 30C is filled. By providing the electrolytic conductor and the second circuit 22C, the circuit width (W4) can be made smaller relative to the height (thickness) of the electrolytic conductor, making it easier to refine the circuit and design. This has the effect of increasing the degree of freedom.

In addition, after the circuit layer 4C, an electrolytic conductor is provided, for example, by plating, over the entire top part 221C of the second circuit (interlayer circuit) and the surface of the insulating resin 31C, and the necessary circuits are formed. may be formed. Specifically, as shown in FIG. 16(A), a state including the circuit layer 4C and the base material 5 manufactured in the fourteenth to nineteenth steps of this embodiment is referred to as the base material 5'. , a new conductor 60 is provided and the 14th to 19th steps are performed again to form a third circuit 21C' (corresponding to the first circuit) and a fourth circuit 22C connected to the second circuit 22. ' (corresponding to the second circuit 22) may be created to form a substrate 1C in which a plurality of circuit layers 4C (4C') are stacked.
In this case, a second insulating resin connection surface 301C1 that has no connection surface in the thickness direction and extends in the plane direction is formed between the insulating resin 31C and the insulating resin 30C'. In other words, a second insulating resin connection surface 301C1 different from the insulating resin connection surface 301 is formed.
Moreover, between the second circuit 22C and the third circuit 21'C, there is formed a connection surface 23C1 between conductors that has no connection surface in the thickness direction and extends in the planar direction. In other words, a connection surface 23C1 between conductors different from the connection surface 23C between conductors is formed.
Further, the connection surface 301C1 between the insulating resins and the connection surface 23C1 between the conductors exist on one and the same plane without any difference in level.
In addition, in the cross section of the part where the second circuit 22C and the third circuit 21C' are overlapped adjacently, the width of the bottom part of the third circuit 21C' is the width of the top part 221C of the second circuit 22C. It is preferable that it is larger than . Excessive etching of the end portion of the top portion 221C of the second circuit 22C can be suppressed.

In this embodiment, in the fifteenth step of FIG. 14(B), a case is illustrated in which the protective coating 7 is not placed at the location where the second circuit 22C is formed using a dispenser, inkjet, or screen printing.
However, instead of the fifteenth step, as shown in FIG. 16(B), a step (twentieth step) of providing the protective coating 7 on the entire surface of the first circuit 21C is performed, and as shown in FIG. 16(C). As shown, a step (twenty-first step) may be used in which the portion of the protective coating 7 that will become the second circuit 22C is removed by cutting to expose the surface of the first circuit 21C.

[Fourth embodiment]
A fourth embodiment of the present invention will be described with reference to FIG. 17.
Components having the same configuration as those in the first to third embodiments are designated by the same reference numerals, and description thereof will be omitted.
The substrate 1D of this embodiment uses a rolled conductor, includes a lower circuit 80 as a base material 5D, and has a point where the lower circuit 80 and the circuit body 2 of the first embodiment are connected and a reinforcing structure. This embodiment differs from other embodiments in that 29 is provided. Furthermore, this is an embodiment in which a circuit body 2C of the third embodiment is connected to the circuit body 2 of the first embodiment.

(substrate)
The substrate 1D of the present invention includes the circuit body 2, the insulator 3, and the reinforcing structure 29 of the first embodiment on the base material 5D including the lower circuit 80. Furthermore, it has a circuit layer 4C including a circuit body 2C of the third embodiment, an insulator 3, and a protective coating 7 so as to be laminated.
<Circuit body>
The circuit body 2D of this embodiment includes the first circuit 21 and the second circuit 22 of the first embodiment. Note that parts having the same structure are designated by the same reference numerals, and description thereof will be omitted.

<Reinforcement structure>
The reinforcing structure 29 is formed from the same conductor as the first circuit 21, and is formed from a rolled conductor that is a rolled plate.
As shown in FIG. 17(B), the reinforcing structure 29 may be formed of a mesh-like conductor or a solid conductor (not shown). This is desirable in that the weight of the substrate 1D can be reduced while suppressing the warpage of the substrate. Note that from the viewpoint of increasing the heat dissipation effect, it is preferable to have a solid shape rather than a mesh shape.

The reinforcing structure 29 is arranged for the purpose of increasing the rigidity of the substrate 1D. In addition, as another function, by arranging the first circuit 21 so as to surround it in a continuous state, the heat of the first circuit 21 can be received evenly from the surroundings via the insulating resin 30. , thermal expansion of the first circuit 21 and a circuit connected to the first circuit 21 is suppressed, thereby suppressing warpage of the substrate 1D. It also plays a role of lowering the temperature of electronic components connected to the first circuit 21.

As shown in FIG. 17(B), the reinforcing structure 29 is arranged in the same plane as the first circuit 21 and separated from the first circuit 21 in the plane direction by an insulating resin 30. Further, as shown in FIG. 17(A), an insulating resin 31 and an insulating resin 35 of the base material 5D are arranged on the front and back surfaces of the reinforcing structure 29 so as not to be connected to other circuits.
Note that, as shown in FIG. 22, by arranging and exposing the reinforcing structure 29 on the end surface of the substrate 1D so as to surround the peripheral portion of the substrate 1D, the heat dissipation effect can be further improved.
<Base material>
The base material 5D has a lower circuit 80 and an insulating resin 35, and supports the first circuit 21 and the second circuit 22.
The lower circuit 80 is connected to the bottom 215 of the planar circuit of the first circuit 21 . Further, there is no connection surface between the lower circuit 80 and the first circuit 21 in the plate thickness direction and the plane direction, and the circuit 80 and the first circuit 21 are formed of an integral conductor from the same rolled plate as the first circuit 21.

(About the manufacturing method of the board)
A method for manufacturing the substrate 1D according to the first embodiment will be described with reference to FIG. 19.
First, as shown in FIG. 19A, a lower etching resist 81 is provided on the back side of the plate-shaped rolled conductor 65 in a portion that will become the lower circuit 80. As shown in FIG. This step is referred to as the twenty-second step.

Next, conductor 65 is half-etched to form space 810 and underlying circuit 80. This process is called the 23rd process.

The space 810 is filled with the insulating resin 35, and the etching resist 81 below is removed. As a result, the base material 5D including the lower circuit 80 and the insulating resin 35 is completed. This step is designated as the twenty-fourth step.
The base material 5D corresponds to the base material 5 in the first embodiment, and the upper surface side of the conductor 65 corresponds to the conductor 60 in the first embodiment.

Next, by performing the first to sixth steps of the first embodiment, the circuit layer 4 shown in FIG. 21(C) is formed.
In addition, in the step shown in FIG. 20(A), a first etching resist 40 is provided in a portion that will become the reinforcing structure 29 together with the first step. This step is designated as the twenty-fifth step.

Next, in the step shown in FIG. 20(B), a second step of etching treatment is performed to form the circuit intermediate body 20 and the reinforcing structure intermediate body 28. This step is designated as the twenty-sixth step.

Then, in the step shown in FIG. 20(C), by performing the third step, the state after the third step is reached, and the surface of the reinforcing structure intermediate body 28 is exposed, and the reinforcing structure intermediate body 28 is in a state after the third step. The side surfaces of the base material 5 and the surface of the base material 5 are now covered with the insulating resin 30. This step is designated as the twenty-seventh step.

Next, a fourth step is performed in the step shown in FIG. 21(A). At this time, the second etching resist 50 is placed without covering the surface of the reinforcing structure intermediate body 28. This step is designated as the twenty-eighth step.

Next, in the step shown in FIG. 21(B), by performing the fifth step, the state after the fifth step is achieved, and the upper part of the reinforcing structure intermediate body 28 is removed and a space 501 is provided. As a result, a reinforcing structure 29 is formed. This step is designated as the 29th step.

Next, in the step shown in FIG. 21(C), the sixth step is performed, so that the state after the sixth step is reached, and the space 501 above the reinforcing structure 29 is filled with the insulating resin 31, The reinforcing structure 29 is in a buried state. This step is designated as the 30th step.

Through the above steps, the circuit layer 4 including the reinforcing structure 29 is formed.

After the circuit layer 4, for example, a step is performed in which an electrolytic conductor is provided by plating over the entire top part 221 of the second circuit (interlayer circuit) and the surface of the insulating resin 31, and the electrolytic conductor is formed. may be used to form the necessary circuits. Specifically, as shown in FIG. 21(C), the state including the circuit layer 4 and the base material 5D manufactured in the twenty-fifth to thirty-fourth steps of this embodiment is referred to as the base material 5D'. shall be. At this time, the first circuit 21 corresponds to a first circuit of a rolled plate made of a rolled plate, and the second circuit 22 corresponds to a second circuit of a rolled plate made of a rolled plate.
By newly providing a conductor 60 on the surface of the base material 5D' and performing the fourteenth to nineteenth steps of the third embodiment, the substrate 1D shown in FIG. 17(A) can be manufactured. . In this case, the first circuit 21C connected to the second circuit of the rolled plate corresponds to the first circuit. Further, the second circuit 22C corresponds to a second circuit.

Further, when forming the first circuit 21C, the first circuit 21C1 may be arranged with the insulating resin 31 interposed so as to cover the upper part of the reinforcing structure 29, and the second circuit 21C When forming the reinforcing structure 22C, the second circuit 22C1 may be arranged to be connected to the first circuit 21C1 with the insulating resin 31 interposed so as to cover the upper part of the reinforcing structure 29.
Note that the first circuit 21C1 may or may not be connected to the first circuit 21C. Further, the second circuit 22C1 may or may not be connected to the second circuit 22C.
However, in particular, the reinforcing structure 29 can be arranged with the insulating resin 31 interposed in the portion where the first circuit 21C and the second circuit 22C1 are overlapped. This increases the degree of freedom in circuit design since there is no need to provide through holes in the plate thickness direction in the reinforcing structure 29 compared to when conventional through holes are used for interlayer circuits. Furthermore, since a large volume of the conductor can be maintained, there is also the effect of increasing the heat dissipation effect.

Note that, as shown in FIG. 22, by arranging and exposing the reinforcing structure 29 on the end surface of the substrate 1D, the heat dissipation effect can be further improved. When creating this, a connecting structure 2921 and a connecting structure 2922 connected to the reinforcing structure 29 may be provided on the same plane. The connecting structure 2921 and the connecting structure 2922 are made of a conductive material and are arranged for the same purpose as the reinforcing structure 29. By providing the connecting structure 2921 and the connecting structure 2922, the heat dissipation effect is particularly improved since the connecting structure 2921 and the connecting structure 2922 are connected to the reinforcing structure 29.
Note that the connecting structure 2921 and the connecting structure 2922 may be arranged inside the substrate 1D, and as shown in FIG. The effect can be improved. Note that the reinforcing structure 29 may be placed inside the substrate 1D, and the connecting structure 2921 and the connecting structure 2922 may be placed on the end surface of the substrate 1D.
When providing the etching resist for creating the first circuit 21C1 and the second circuit 22C, the connecting structure 2921 and the connecting structure 2922 are formed by applying etching resist to the portions that will become the connecting structure 2921 and the connecting structure 2922. It can be created by providing
Further, in the twenty-eighth step, the surface of the reinforcing structure intermediate body 28 is covered with the etching resist 50, and the twenty-ninth step is performed, so that the reinforcing structure 29 can be created without creating the space 501. In other words, the reinforcing structure 29 can be created without interposing the insulating resin 31, and the reinforcing structure 29, the connecting structure 2921, and the connecting structure 2922 can be connected without interposing the insulating resin 31.

In this embodiment, the steps from the 25th step including the first step to the 30th step including the 6th step of the first embodiment are performed on the base material 5D, and then the third step is performed on the base material 5D. Although the case where the 25th to 30th steps of the embodiment are performed is illustrated, the 14th to 19th steps of the second embodiment may be performed instead of the third embodiment. Further, the third embodiment and/or the second embodiment may be performed multiple times to form a multilayer substrate 1D.

The present invention can be made into a multilayer substrate by repeating and laminating the first to third embodiments, and when repeating the same embodiment to a base material, the first to third embodiments It is possible to combine multiple types of embodiments 3 and repeat them multiple times.
Specifically, the state after the first embodiment is used as a base material, a step of providing a first conductor on the surface of the base material by plating treatment is performed, and the second embodiment or/and the third embodiment are An example of this is the case where the above embodiment is implemented.

In the present invention, the first circuit is a planar circuit and the second circuit is an interlayer circuit, but the first circuit may be an interlayer circuit. In other words, it is applicable even when the interlayer circuit of the first circuit and the interlayer circuit of the second circuit are overlapped adjacently.

The conductor in the present invention includes a rolled plate-shaped conductor and an electrolytic conductor formed by plating.
Rolled conductors are manufactured by inserting a conductor ingot, which is the raw material, between two rotating rolls, and stretching the ingot while crushing it to thin it to the desired thickness. It is a conductor. Specifically, a rolled copper plate or a rolled aluminum plate is applicable. Note that the present invention is not limited to rolled plates, and it is also possible to use rolled copper ingots and rolled aluminum ingots.

The electrolytic conductor is not particularly limited as long as it is a conductor created by plating, but a specific example is copper plating.

The rolled conductor has a layered metal structure extending in the rolling direction (in the case of using a plate-shaped conductor, the direction of the plane of the substrate (XY axis)). Furthermore, due to the heat treatment during the process of creating the substrate, the crystal grains are characterized by nearly equiaxed crystal grains.
On the other hand, an electrolytic conductor formed by plating has a feature of having a columnar metal structure in the thickness direction (Z-axis direction).
Rolled conductors and electrolytic conductors have these differences in characteristics. Therefore, even though they are made of the same material, rolled conductors are more effective in improving the rigidity of the substrate than electrolytic conductors because of these differences in characteristics.
Therefore, a rolled conductor is preferably applied to the reinforcing structure 29 of the fourth embodiment of the present invention.

By mounting electronic components on the substrates 1A to 1D of the present invention, an electronic device including the substrates 1A to 1D can be obtained.
Furthermore, with the substrate 1D of the present invention, the reinforcing structure made of a rolled plate is provided on the same plane as the first circuit 21, thereby making it possible to provide an electronic device with improved rigidity of the substrate.
The conductor that is the circuit of the substrate of the present invention is made of a rolled conductor and/or a conductor created by plating. The conductor is not particularly limited as long as it is a substance that can conduct electricity better than an insulator.

The electrolytic conductor is not particularly limited as long as it is a conductor created by plating, but a specific example is copper plating.

In this specification, the insulating resins 30, 30B, and 30C correspond to the first insulating resin, the insulating resins 31, 31B, and 31C correspond to the second insulating resin, and the insulating resin 30' corresponds to the third insulating resin. This corresponds to an insulating resin, and the insulating resin 35 corresponds to a fourth insulating resin.

The electronic device of the present invention is an electronic device equipped with the substrate of the present invention, and its uses are not particularly limited, but include, for example, electronic devices for the space industry, automobiles, aircraft, unmanned aerial vehicles, mobile phones, smartphones, personal computers, Examples include LED modules and power semiconductor modules. According to this electronic device, since the circuit width is controlled on the board, it is possible to make the electronic device less prone to connection failures. .

1A, 1B, 1C, 1D are substrates, 2, 2B, 2C, 2D are circuit bodies, 3, 3B, 3C are insulators, 4, 4B, 4C are circuit layers, 5, 5D are base materials, 7 is a protective coating , 20 is a circuit intermediate, 21, 21C, 21C1 is a first circuit, 21' is a third circuit, 22, 22C, 22C1 is a second circuit, 22' is a fourth circuit, 23, 23A, 23C , 23C1 is a connecting surface, 25 is a central portion, 28 is a reinforcing structure intermediate body, 29 is a reinforcing structure, 30, 30B, 30C are insulating resins, 31, 31B, 31C are insulating resins, 32 is a connecting surface, 35 is insulating Resin, 40 is a first etching resist, 50 is a second etching resist, 60 is a conductor, 60A is a connection surface, 61 is a conductor, 62 is a second conductor, 65 is a conductor, 71 is an intrusion part , 80 is the lower circuit, 81 is the lower etching resist, 201 is the end, 202 is the end, 203 is the side, 211, 211C is the top, 212 is the ceiling, 213 is the center, 214, 214C is the top. 215, 215C are the bottom, 216 is the top, 217 is the end, 221, 221C is the top, 222, 222C is the bottom, 223, 223C is the side, 225 is the virtual line, 301 is the connection surface, 301A is the side. Connection surface, 301C is a connection surface, 301C1 is a connection surface, 305 is a horizontal projection, 401 is a space, 402 is a space, 501 is a space, 810 is a space, 910 is a substrate, 921 is a planar circuit, 924 is an end, 925 926 is the bottom, 927 is the end, and 930 is the insulating resin.

Claims (20)

A first step in which a first etching resist covering the surface of the first conductor is provided in a portion that will become a circuit intermediate;
a second step in which the first conductor is etched to provide a circuit intermediate;
a third step in which the space provided after etching is filled with a first insulating resin;
a fourth step in which a second etching resist is provided on the surface of the circuit intermediate;
a fifth step in which a side surface of the circuit intermediate is half-etched while being protected by the first insulating resin to provide a first circuit and a second circuit;
A method for manufacturing a substrate, comprising: 2. The method of manufacturing a substrate according to claim 1, wherein the second etching resist in the fourth step is provided over an upper surface of the circuit intermediate body and an upper surface of the first insulating resin. a seventh step in which a first etching resist covering the surface of the first conductor is provided in a portion that will become a first circuit;
an eighth step in which the first conductor is etched to provide a first circuit;
a ninth step in which the space provided after etching is filled with a first insulating resin;
a tenth step in which a second conductor is provided across the surface of the first circuit and the surface of the first insulating resin;
an eleventh step in which a second etching resist is provided on the surface of the second conductor;
a twelfth step in which a side surface of the first conductor is etched while being protected by the first insulating resin to provide a second circuit connected to the first circuit;
A method for manufacturing a substrate, comprising: The second etching resist in the eleventh step is provided over the top surface of the first circuit and the top surface of the first insulating resin, with the second conductor interposed therebetween. The method for manufacturing a substrate according to claim 3. a seventh step in which a first etching resist covering the surface of the first conductor is provided in a portion that will become a first circuit;
an eighth step in which the first conductor is etched to provide a first circuit;
a fourteenth step of filling the space provided after etching with a first insulating resin;
a fifteenth step of providing a protective coating on the surface of the first circuit;
a sixteenth step in which a second conductor is provided across the surface of the first circuit, the surface of the first insulating resin, and the surface of the protective coating;
a seventeenth step in which a second etching resist is provided on the surface of the second conductor;
18. A second circuit connected to the first circuit is provided by etching the side surface and surface of the first conductor while being protected by the first insulating resin and the protective coating. process and
A method for manufacturing a substrate, comprising: The second etching resist in the seventeenth step is provided over the top surface of the protective coating and the top surface of the first insulating resin, with the second conductor interposed therebetween. The method for manufacturing a substrate according to claim 5. 3. The method of manufacturing a substrate according to claim 1, wherein the first conductor is a rolled conductor. A step of using the state after the manufacturing method according to claim 7 as a base material, and providing an electrolytic conductor on the surface of the base material by plating treatment, and the manufacturing method according to any one of claims 3 to 6. A method for manufacturing a substrate, comprising the steps of: Any one of claims 1 to 8, wherein the first circuit is a planar circuit extending in the planar direction of the substrate, and the second circuit is an interlayer circuit extending in the thickness direction of the substrate. The method for manufacturing the substrate described in section. 10. The method of manufacturing a substrate according to claim 1, wherein the first circuit and the second circuit are interlayer circuits extending in the thickness direction of the substrate. A substrate having a first circuit, a second circuit, and an insulator,
In a cross section of a portion where the first circuit and the second circuit are overlapped adjacently,
The width of the bottom of the first circuit on the center side of the board in the thickness direction is larger than the width of the top of the first circuit on the front side of the board in the thickness direction,
The first circuit and the second circuit have a connection surface between conductors between the top of the first circuit and the bottom of the second circuit,
A board, characterized in that the connection surfaces between the conductors are arranged in such a manner that there is a connection surface of the conductors extending in the plane direction and there is no connection surface of the conductors extending in the thickness direction. The insulator is configured to form an insulating resin connection between an insulating resin of a first circuit that contacts a side surface of the first circuit and an insulating resin of a second circuit that contacts a side surface of the second circuit. has a surface,
The connection surface between the insulating resins includes a connection surface of the insulating resin extending in a plane direction,
12. The board according to claim 11, wherein the connection surface between the conductors and the connection surface between the insulating resins are on the same plane with no step. 13. The substrate according to claim 11, wherein a protective coating is provided on the surface of the first circuit, and the protective coating has a lower height than the second circuit. having a third circuit different from the first circuit,
In a cross section of a portion where the third circuit and the second circuit are overlapped adjacently,
The second circuit and the third circuit have a connection surface between other conductors between the top of the second circuit and the bottom of the third circuit,
11. The connection surfaces between the other conductors are arranged such that there is a connection surface of the conductors extending in the planar direction and there is no connection surface of the conductors extending in the thickness direction. 14. The substrate according to any one of items 1 to 13. The insulator is arranged between a second insulating resin that contacts a side surface of the second circuit and a third insulating resin that contacts a side surface of the third circuit, and a connection surface between the second insulating resins. has
The connection surface between the second insulating resins includes a connection surface of the insulating resin extending in the plane direction,
15. The board according to claim 14, wherein the connection surface between the other conductors and the connection surface of the second insulating resin are on the same plane with no step. The width of the bottom of the second circuit on the center side of the board in the thickness direction is larger than the width of the top of the second circuit on the front side of the board in the thickness direction. The substrate according to any one of claims 11 to 15. The width of the bottom of the third circuit on the center side of the board in the thickness direction is larger than the width of the top of the third circuit on the front side of the board in the thickness direction. The substrate according to claim 14 or 15. further comprising a first circuit of rolled plates made of a rolled plate and a second circuit of rolled plates made of a rolled plate,
The substrate according to any one of claims 11 to 17, characterized in that the first circuit of the rolled plate and the second circuit of the rolled plate are an integral conductor without a connecting surface. A reinforcing structure is provided in the same plane as the first circuit of the rolled plate, and the first circuit of the rolled plate and the reinforcing structure are formed from the same rolled plate. 19. The substrate according to 18. The reinforcing structure covers a portion where the first circuit and the second circuit are connected or a portion where the second circuit and the third circuit are connected with a second insulating resin interposed therebetween. 20. The substrate according to claim 19, wherein the substrate is arranged such that the substrate is