JP2023124978A - Photosensor - Google Patents

Abstract

To improve electric noise reduction performance.SOLUTION: A light receiving unit 10 of a photosensor includes a p-type substrate 120, an n layer 121, a p layer 122, and a p+ layer 123. The n layer 121 is formed in the p-type substrate 120. The p layer 122 is formed in the n layer 121. The p+ layer 123 is formed in the p layer 122. The p+ layer 123 has an impedance lower than that of the p layer 122. The p+ layer 123 is grounded.SELECTED DRAWING: Figure 2

Description

TECHNICAL FIELD This disclosure relates to optical sensors.

JP-A-7-30143 (Patent Document 1) discloses an optical sensor. In this optical sensor, an N+ layer is provided on a P-type substrate. In this optical sensor, the N+ layer serves as an electromagnetic shield to remove electrical noise.

Japanese Patent Application Publication No. 7-30143

In optical sensors, there is a need to improve electrical noise removal performance.
The present disclosure has been made to solve the above-mentioned problems, and its purpose is to provide an optical sensor that improves electrical noise removal performance.

The optical sensor of the present disclosure includes a semiconductor substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. The first semiconductor layer is disposed on the semiconductor substrate and has a second conductivity type different from the first conductivity type. The second semiconductor layer is disposed on the first semiconductor layer and is of the first conductivity type. The third semiconductor layer is disposed on the second semiconductor layer and has lower impedance than the second semiconductor layer. The third semiconductor layer is grounded.

According to the present disclosure, electrical noise removal performance can be improved.

FIG. 1 is a block diagram showing an example of the configuration of an optical sensor. FIG. 2 is a sectional view of the light receiving section of the first embodiment. FIG. 3 is a diagram showing the sheet resistance of the semiconductor layer of this embodiment. FIG. 4 is a sectional view of the light receiving section of the second embodiment. FIG. 5 is a cross-sectional view of the light receiving portion of the optical sensor of Experimental Example 1. FIG. 6 is a cross-sectional view of the light receiving portion of the optical sensor of Experimental Example 2. FIG. 7 is a diagram showing detection values of the optical sensor of Experimental Example 1. FIG. 8 is a diagram showing detection values of the optical sensor of Experimental Example 2.

Embodiments of the present disclosure will be described in detail below with reference to the drawings. In addition, the same reference numerals are attached to the same or corresponding parts in the drawings, and the description thereof will not be repeated.

<First embodiment>
[About the optical sensor]
FIG. 1 is a block diagram showing an example of the configuration of the optical sensor 1. As shown in FIG. As shown in FIG. 1, the optical sensor 1 includes a light receiving section 10, an amplifier section 15, an ADC 30, a calculation section 40, an oscillator 61, and an external terminal 21. The optical sensor 1 is a semiconductor integrated circuit in which a light receiving section 10, an amplifier section 15, an ADC 30, and a calculation section 40 are formed on one semiconductor substrate.

The light receiving section 10 includes a first photodiode 101 and a second photodiode 102. The first photodiode 101 and the second photodiode 102 are also collectively referred to as a "photodiode." When irradiated with light, the photodiode generates a current or voltage depending on the amount of light irradiated, and outputs an analog signal depending on the current or voltage. The analog signal from the first photodiode 101 and the analog signal from the second photodiode 102 are integrated and input to the amplifier section 15 .

The amplifier section 15 generates an amplified signal by amplifying the integrated analog signal. Note that the amplifier section 15 uses, for example, a PGA (programmable gain amplifier) whose gain can be arbitrarily adjusted. The amplified signal from the amplifier section 15 is output to the ADC 30.

The ADC (Analog-to-digital converter) 30 is, for example, an integral type analog/digital conversion circuit. The amplifier section 15 is electrically connected to the ADC 30. ADC 30 converts the analog signal (amplified signal) from amplifier section 15 into a digital signal.

The calculation unit 40 is formed of an integrated circuit such as an LSI (Large Scale Integration), and includes various circuit elements such as transistors, capacitors, and registers. The calculation unit 40 receives the digital signal from the ADC 30. The calculation unit 40 calculates predetermined optical parameters using numerical values based on these digital signals. The predetermined light parameter is, for example, one of illuminance, light intensity, and light brightness. The calculation unit 40 corresponds to the "detection circuit" of the present disclosure. In this way, the optical sensor 1 calculates the optical parameter based on the sum of the value based on the signal from the first photodiode 101 and the value based on the signal from the second photodiode 102.

The optical sensor 1 is connected to a power terminal (VCC) via an external terminal 21. Further, the optical sensor 1 is grounded via an external terminal 21 to the ground (GND). The optical sensor 1 boosts or steps down the voltage applied to the external terminal 21 to generate a predetermined voltage, and supplies the voltage to the light receiving section 10, ADC 30, calculation section 40, and the like.

The calculation unit 40 is connected to the control circuit 170 via the external terminal 21 via a communication line. In the example of FIG. 1, the communication line is composed of a serial data bus (SDA: Serial Data Access) and a serial clock (SCL: Serial CLock). The calculation unit 40 outputs a signal indicating the calculated illuminance to the control circuit 170 via a communication line. The control circuit 170 receives the optical parameters and executes control according to the optical parameters. The oscillator 61 generates a clock signal pulse-driven at a predetermined frequency, and outputs the clock signal to the arithmetic unit 40.

[Configuration of light receiving section]
Next, the light receiving section 10 will be explained. FIG. 2 is a cross-sectional view of the light receiving section 10 of this embodiment. The light receiving section 10 has a light receiving surface 150. The optical sensor 1 detects the light incident on the light receiving surface 150 and calculates the above-mentioned optical parameters. In this embodiment, the light receiving surface 150 is an XY plane. Further, the thickness direction of the optical sensor 1 (the normal direction of the light receiving surface 150) is defined as the Z-axis direction. Further, the X-axis direction, the Y-axis direction, and the Z-axis direction are orthogonal to each other.

The optical sensor 1 has a P-type substrate 120. The P-type substrate 120 corresponds to an example of a "semiconductor substrate" in the present disclosure. Further, the P type corresponds to an example of the "first conductivity type" of the present disclosure. The P-type substrate 120 is, for example, a silicon substrate doped with P-type impurities. The Z-axis direction may be referred to as the "thickness direction of the P-type substrate 120."

In the surface layer of the P-type substrate 120, an N-type impurity is doped from the surface of the P-type substrate to an inner region separated by a predetermined width from the periphery of the P-type substrate when viewed from the normal direction of the light-receiving surface 150. By doing so, the N layer 121 is buried (formed). In this way, the N layer 121 is arranged on the P type substrate 120. Further, the N type corresponds to an example of the "second conductivity type" of the present disclosure. The second conductivity type is different from the first conductivity type.

In the surface layer portion of the N layer 121, a P-type impurity is doped from the surface of the N layer 121 to an inner region separated from the periphery of the N layer 121 when viewed in plan from the normal direction of the light receiving surface 150. The P layer 122 is buried (formed) by. In this way, the P layer 122 is arranged on the N layer 121. The P layer 122 corresponds to the "second semiconductor layer" of the present disclosure.

In the surface layer portion of the P layer 122, a P-type impurity is doped from the surface of the P layer 122 to an inner region spaced apart from the periphery of the P layer 122 when viewed in plan from the normal direction of the light receiving surface 150. A P+ layer 123 is buried (formed). In this way, the P+ layer 123 is arranged on the P layer 122. The P+ layer 123 corresponds to the "third semiconductor layer" of the present disclosure.

Further, the impedance of the P+ layer 123 is lower than the impedance of the P layer 122. That is, the P type impurity concentration of the P+ layer 123 is higher than the P type impurity concentration of the P layer 122. Therefore, the conductivity of the P+ layer 123 is high. Further, P+ layer 123 is connected to ground 104. In other words, the P+ layer 123 is grounded. Note that in the present disclosure, "+" indicates a semiconductor layer with a high impurity concentration, that is, a semiconductor layer with low impedance.

The example in FIG. 2 shows a configuration in which the surface of the P+ layer 123 coincides with the light-receiving surface 150, that is, light is incident on the surface of the P+ layer 123. For example, a protective layer may be formed on the surface of the P+ layer 123. Further, the N layer and the P layer may be referred to as an N layer well and a P layer well, respectively.

The first photodiode 101 is formed by the PN junction between the P type substrate 120 and the N layer 121. Further, the second photodiode 102 is formed by the PN junction between the N layer 121 and the P layer 122.

Further, the shallower the formation position of the photodiode from the light receiving surface 150, the more efficiently light with a short wavelength is absorbed in the diode. Therefore, the wavelength of the light detected by the first photodiode 101 is shorter than the wavelength of the light detected by the second photodiode 102.

In the case of such a configuration, it is assumed that electromagnetic noise E is input to the light receiving surface 150. As described above, the analog signals output from the first photodiode 101 and the second photodiode 102 are amplified by the amplifier section 15. Therefore, the electromagnetic noise E can also be amplified by the amplifier section 15. Therefore, the accuracy of light detection by the optical sensor 1 decreases (the S/N ratio decreases).

Therefore, in the present embodiment, a P+ layer 123, which has lower impedance than the P layer 122 and is grounded, is formed in the P layer 122. Therefore, when electromagnetic noise E is input to the light-receiving surface 150, the component based on the electromagnetic noise E is discharged from the ground 104 because the conductivity of the P+ layer 123 is high as described above. In this way, the P+ layer 123 serves as a shield layer, and the electromagnetic noise E is removed by the P+ layer 123. Therefore, according to the optical sensor 1 of this embodiment, the removal performance of electrical noise (electromagnetic noise E) can be improved.

Further, the optical sensor 1 calculates optical parameters based on the signal from the first photodiode 101 and the signal from the second photodiode 102. Specifically, the optical parameters are calculated based on an analog signal obtained by integrating the analog signal from the first photodiode 101 and the analog signal from the second photodiode 102. Therefore, the optical sensor 1 can appropriately calculate optical parameters while improving the removal performance of electrical noise (electromagnetic noise E).

FIG. 3 is a diagram showing the sheet resistance of the semiconductor layer of this embodiment. In FIG. 3, the type of semiconductor layer is shown in the layer column, and the sheet resistance of the semiconductor layer is shown in the sheet resistance column.

In the example of FIG. 3, it is shown that the sheet resistance of the P layer 122 is 5000 Ω/sq, and the sheet resistance of the P+ layer 123 122 is 100 Ω/sq. Further, the ratio C of the sheet resistance of the P layer 122 (second semiconductor layer) to the sheet resistance of the P+ layer 123 (third semiconductor layer) is 0.02. The inventor has confirmed that this ratio C is preferably 0.002 or more and 0.2 or less.

<Second embodiment>
In the second embodiment, the light receiving section 10 described in the first embodiment is replaced by a light receiving section 20 (see parentheses in FIG. 1). The light receiving section 10 of the first embodiment has a P+ layer 123 as the third semiconductor layer. The light receiving section 20 of the second embodiment has an N+ layer as the third semiconductor layer. Further, in the second embodiment, the first conductivity type is P type, and the second conductivity type is N type.

FIG. 4 is a cross-sectional view of the light receiving section 20 of the second embodiment. As shown in FIG. 4, in the surface layer part of the P layer 122, in a plan view from the normal direction of the light-receiving surface 150, there is an inner region spaced apart from the periphery of the P layer 122 from the surface of the P layer 122. An N+ layer 133 is buried (formed) by doping with N-type impurities. In this way, the N+ layer 133 is arranged on the P layer 122. The N+ layer 133 corresponds to the "third semiconductor layer" of the present disclosure.

Further, the third photodiode 103 is formed by a PN junction formed by the N+ layer 133 and the P layer 122. In this embodiment, the calculation unit 40 does not use the signal from the third photodiode 103.

Further, the impedance of the N+ layer 133 is lower than the impedance of the P layer 122 and the impedance of the N layer 121. That is, the P type impurity concentration of the N+ layer 133 is higher than the P type impurity concentration of the P layer 122 and the N type impurity concentration of the N layer 121. Therefore, the conductivity of the N+ layer 133 is high.

Further, in the example of FIG. 3, it is shown that the sheet resistance of the P layer 122 is 5000Ω/sq, and the sheet resistance of the N+ layer 133 (second embodiment) 122 is 100Ω/sq. There is. Further, the ratio C of the sheet resistance of the P layer 122 (second semiconductor layer) to the sheet resistance of the N+ layer 133 (third semiconductor layer) is 0.02. The inventor has confirmed that this ratio C is preferably 0.002 or more and 0.2 or less.

Furthermore, N+ layer 133 is connected to ground 104. In other words, the N+ layer 133 is grounded.

According to such a configuration, when electromagnetic noise E is input, components based on the electromagnetic noise E are discharged from the ground 104 because the conductivity of the N+ layer 133 is high as described above. In this way, the N+ layer 133 serves as a shield layer, and the electromagnetic noise E is removed by the N+ layer 133. Therefore, according to the optical sensor of this embodiment, the electrical noise removal performance can be improved.

Furthermore, as described above, the shallower the formation position of the photodiode from the light-receiving surface 150, the more efficiently light with a short wavelength is absorbed in the diode. Therefore, the third photodiode 103 absorbs short wavelength light (that is, visible light). The N+ layer 133 and the P layer 122 forming the third photodiode 103 are grounded. Therefore, components based on the light absorbed by the third photodiode 103 are discharged from the ground 104. In other words, not only the N+ layer 133 but also the P layer 122 serves as a shield layer. Therefore, the second photodiode 102 and the third photodiode 103 can absorb (detect) light with reduced noise based on the above-mentioned visible light. Therefore, for example, the optical sensor of the second embodiment is preferably applied to a device or application that detects long wavelength light (for example, infrared rays).

<Experiment results>
Next, the experimental results will be explained. FIG. 5 is a cross-sectional view of the light receiving section 10A of the optical sensor of Experimental Example 1. Further, FIG. 6 is a cross-sectional view of the light receiving section of the light receiving section 10B of the optical sensor of Experimental Example 2.

In the light receiving section 10A of FIG. 5, an N layer 121A is formed on a P type substrate 120A. Further, the optical sensor of Experimental Example 1 uses a signal from the first photodiode 101A at the PN junction between the P-type substrate 120A and the N layer 121A. Furthermore, no shield layer is formed in the light receiving section 10A.

In the light receiving section 10B of FIG. 6, an N layer 121A is formed on a P type substrate 120A. Further, a P layer 122A is formed on the N layer 121A. A first photodiode 101 is formed by a PN junction formed by the P type substrate 120A and the N layer 121A. A second photodiode 102 is formed by a PN junction formed by the N layer 121A and the P layer 122A. Further, in the optical sensor of Experimental Example 2, the sum of the signal from the first photodiode 101 and the signal from the second photodiode 102 is used. Furthermore, the P layer 122A is connected to the ground 104A (grounded). Therefore, the P layer 122A plays the role of a shield layer.

FIG. 7 shows values detected by the first photodiode 101A of the light receiving section 10A. FIG. 8 shows the total detection value of the first photodiode 101 and the second photodiode 102 of the light receiving section 10B. In FIGS. 7 and 8, the vertical axis represents voltage, and the horizontal axis represents time.

The example in FIG. 7 shows that the detected values oscillate greatly due to the influence of electrical noise. Further, in the example of FIG. 8, the vibration of the detected value is smaller than that of FIG. This is because the light receiving section 10A does not have a shield layer.

Furthermore, in the light receiving section 10B of FIG. 6, it is possible to reduce the impedance of the P layer 122A and use it as the light receiving section of this embodiment. However, the inventor has confirmed that in a configuration in which the P layer 122A with reduced impedance is formed on the N layer 121A, the voltage resistance of the light receiving section 10B tends to be lower. Therefore, in this embodiment, a P layer 122 having higher impedance than the P+ layer 123 and the N+ layer 133 is provided, and the P+ layer 123 or the N+ layer 133 is formed on the P layer 122 (see FIGS. 2 and 4). . With such a configuration, the pressure resistance of the light receiving section 10 and the light receiving section 20 can be ensured.

<Modified example>
(1) In the embodiments described above, the first conductivity type is P type and the second conductivity type is N type. However, a configuration may be adopted in which the first conductivity type is N type and the second conductivity type is P type. When such a configuration is adopted, the semiconductor substrate becomes N type, the first semiconductor layer becomes P type, and the second semiconductor layer becomes N type. In the first embodiment employing such a configuration, the third semiconductor layer is an N+ layer. Furthermore, in the second embodiment employing such a configuration, the third semiconductor layer is a P+ layer. Even with such a configuration, the same effects as the above-described embodiment can be achieved.

(2) In the above-described embodiment, as shown in FIG. 1, the calculation unit 40 is configured to detect the signal from the first photodiode 101 and the signal from the second photodiode 102. However, the calculation unit 40 may detect the signal from the first photodiode 101 or the signal from the second photodiode 102.

For example, a configuration may be adopted in which the calculation unit 40 detects a signal from the first photodiode 101 but does not detect a signal from the second photodiode 102. When such a configuration is adopted, the calculation unit 40 acquires a digital signal from the ADC 30 (signal from the first photodiode 101), and calculates the above-mentioned optical parameters based on the digital signal. .

Further, a configuration may be adopted in which the calculation unit 40 detects the signal from the second photodiode 102 but does not detect the signal from the first photodiode 101. When such a configuration is adopted, the calculation unit 40 acquires a digital signal from the ADC 30 (signal from the second photodiode 102), and calculates the above-mentioned optical parameters based on the digital signal. .

<Additional notes>
This embodiment as described above includes the following technical idea.

(Section 1) The optical sensor of the present disclosure includes a semiconductor substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. The first semiconductor layer is disposed on the semiconductor substrate and has a second conductivity type different from the first conductivity type. The second semiconductor layer is disposed on the first semiconductor layer and is of the first conductivity type. The third semiconductor layer is disposed on the second semiconductor layer and has lower impedance than the second semiconductor layer. The third semiconductor layer is grounded.

According to such a configuration, the third semiconductor layer has lower impedance than the second semiconductor layer and is grounded. Therefore, even if electrical noise is input to the optical sensor, the component based on the electrical noise is discharged to the ground by the highly conductive third semiconductor layer. Therefore, the electrical noise removal performance can be improved.

(Section 2) The first conductivity type is P type, the second conductivity type is N type, and the third semiconductor layer is P type.

According to such a configuration, the electrical noise removal performance can be improved.
(Section 3) The first conductivity type is P type, the second conductivity type is N type, and the third semiconductor layer is N type.

According to such a configuration, the electrical noise removal performance can be improved.
(Section 4) In Section 3, the second semiconductor layer is grounded.

According to such a configuration, noise based on short wavelength light can be removed.
(Section 5) The range of the ratio of the sheet resistance of the second semiconductor layer to the sheet resistance of the third semiconductor layer is 0.002 or more and 0.2 or less.

According to such a configuration, the electrical noise removal performance can be improved.
(Section 6) The optical sensor detects at least one of a signal at a PN junction between the semiconductor substrate and the first semiconductor layer and a signal at a PN junction between the first semiconductor layer and the second semiconductor layer. It further includes a detection circuit.

According to such a configuration, the incident light can be detected while improving the electrical noise removal performance.

The embodiments disclosed this time should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is indicated by the claims rather than the description of the embodiments described above, and it is intended that all changes within the meaning and scope equivalent to the claims are included.

1 optical sensor, 10, 20 light receiving section, 15 amplifier section, 21 external terminal, 30 ADC, 40 calculation section, 61 oscillator, 101 first photodiode, 102 second photodiode, 103 third photodiode, 104 ground, 120 P type substrate, 121 N layer, 122 P layer, 123 P+ layer, 133 N+ layer, 150 light receiving surface, 170 control circuit.

Claims (6)

a semiconductor substrate of a first conductivity type;
a first semiconductor layer of a second conductivity type different from the first conductivity type disposed on the semiconductor substrate;
a second semiconductor layer of the first conductivity type disposed on the first semiconductor layer;
a third semiconductor layer disposed on the second semiconductor layer and having a lower impedance than the second semiconductor layer,
The third semiconductor layer is an optical sensor that is grounded. The first conductivity type is P type,
the second conductivity type is N type;
The optical sensor according to claim 1, wherein the third semiconductor layer is of P type. The first conductivity type is P type,
the second conductivity type is N type;
The optical sensor according to claim 1, wherein the third semiconductor layer is of N type. The optical sensor according to claim 3, wherein the second semiconductor layer is grounded. The light according to any one of claims 1 to 4, wherein the ratio of the sheet resistance of the second semiconductor layer to the sheet resistance of the third semiconductor layer is 0.002 or more and 0.2 or less. sensor. Claim 1 further comprising a detection circuit that detects at least one of a signal at a PN junction between the semiconductor substrate and the first semiconductor layer and a signal at a PN junction between the first semiconductor layer and the second semiconductor layer. - The optical sensor according to any one of claims 5 to 6.

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