JP2023112726A - game machine - Google Patents

Abstract

To provide a game machine capable of performing appropriate progression of games.SOLUTION: A game machine (a smart Pachinko-slot machine) has a first control unit for controlling the progress of games and a second control unit for managing game values used for games. The first control unit transmits commands to the second control unit. The commands include a first command and a second command. Orders are set in advance for the transmissions of the first command and the second command. The second control unit determines whether or not the first command and the second command are received in the orders set in advance.SELECTED DRAWING: Figure 27

Description

The present invention relates to gaming machines.

A smart pachislot machine has been studied that allows a game to be played without the intervention of real medals while maintaining the playability of the slot machine (for example, Patent Document 1). In addition, a smart pachinko machine is being studied, in which a pachinko machine is of the enclosed circulation type so that the player can proceed with the game without touching the game balls (for example, Patent Document 2).

JP 2015-134014 A JP 2020-156551 A

With such smart pachislot machines and smart pachinko machines, there is no longer a need to provide a route outside the machine for distributing game media such as game balls and medals, and smart pachislot machines do not require physical game media themselves. Become. In this way, smart pachislot does not use the game media itself, and smart pachinko uses non-magnetic game balls, thereby preventing the use of metal game media. It becomes possible. Also, since there is no need to provide a mechanism for inserting and dispensing game media in the game machine, design costs and manufacturing costs can be reduced. Furthermore, by centrally managing the lending of game media to players, the counting of acquired game media, and the like, it is possible to prevent fraud and suppress gambling.

On the other hand, for the configuration for using electronic game media (game value) or non-magnetic game media instead of physical game media, it is possible to appropriately progress the game while managing the electronic game media. A new mechanism is required.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a gaming machine that allows a game to proceed appropriately.

In order to solve the above-mentioned problems, the gaming machine of the present invention is a gaming machine having a first control section for controlling the progress of a game and a second control section for managing a game value provided for the game, The first control unit transmits a command to the second control unit, the command includes a first command and a second command, and the order of transmission of the first command and the second command is predetermined. The second control unit determines whether or not the first command and the second command are received in a predetermined order.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a gaming machine that allows a game to proceed appropriately.

1 is an external view for explaining a schematic mechanical configuration of a smart pachislot; FIG. 1 is a block diagram showing a schematic electrical configuration of a smart pachislot machine and a dedicated unit; FIG. 1 is an external view for explaining a schematic mechanical configuration of a smart pachislot machine and a dedicated unit; FIG. It is an explanatory view for explaining other substrate composition. It is an explanatory view for explaining an enclosure mode of a case. FIG. 2 is an explanatory diagram for explaining the CPU and areas that execute each function of the smart pachislot; FIG. 10 is an explanatory diagram for explaining the format of the gaming machine information notification; FIG. 10 is an explanatory diagram for explaining the format of the gaming machine information notification; FIG. 10 is an explanatory diagram for explaining the format of the gaming machine information notification; FIG. 10 is an explanatory diagram for explaining the format of the gaming machine information notification; It is an explanatory view for explaining a format of a count notification. FIG. 10 is an explanatory diagram for explaining the format of a lending acceptance result response; FIG. 10 is an explanatory diagram for explaining the format of a rental notice; It is a timing chart showing the notification timing of gaming machine information notification, count notification, lending notification, and lending reception result response. FIG. 10 is an explanatory diagram for explaining transmission timing of gaming machine information notification; 10 is a flow chart showing the flow of counting switch monitoring processing in the medal count control CPU. FIG. 10 is a flow chart showing the flow of counting processing in a medal count control CPU; FIG. 4 is a timing chart for explaining counting processing; FIG. 4 is a timing chart for explaining how the number of game medals is displayed; FIG. FIG. 10 is a flow chart showing the flow of counting switch processing in the medal number control CPU; FIG. 4 is a time chart for explaining setting of the number of medals to be counted; FIG. 10 is a flow chart showing the flow of counting switch processing according to a modification in which all signals are effectively processed a plurality of times; FIG. FIG. 10 is a time chart for explaining the setting of the number of counted medals according to a modified example in which all signals are effectively processed a plurality of times; FIG. FIG. 10 is a flow chart showing the flow of command reception processing in a medal number control CPU; FIG. FIG. 10 is a flow chart showing the flow of command reception processing in a medal number control CPU; FIG. FIG. 10 is a flow chart showing the flow of command reception processing in a medal number control CPU; FIG. 4 is a flowchart showing the flow of command monitoring processing; 4 is a flowchart showing the flow of command monitoring processing; 4 is a flowchart showing the flow of command monitoring processing; 4 is a flowchart showing communication specifications when power is turned on; 4 is a flow chart showing communication specifications at the time of operation; 10 is a flow chart showing communication specifications at the end of a game; FIG. 10 is a flow chart showing the flow of bet processing in a medal number control CPU; FIG. FIG. 11 is an explanatory diagram showing an example of actual calculation of bet processing; It is the flowchart which showed the update process of the signal during a setting change. It is the flowchart which showed the update process of the signal during a setting check. FIG. 10 is an explanatory diagram showing a comparative example of communication processing between the main CPU and the medal count control CPU; FIG. 10 is a diagram showing a flowchart and a command showing the concept of 1-byte transmission of a command; FIG. 10 is an explanatory diagram showing communication processing between the main CPU and the medal count control CPU; FIG. 10 is an explanatory diagram for explaining a trial firing test of smart pachislot; FIG. 4 is an explanatory diagram for explaining the operation of the slot machine; FIG. 4 is an explanatory diagram for explaining the operation of the smart pachislot;

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The dimensions, materials, and other specific numerical values shown in these examples are merely examples for facilitating understanding of the invention, and do not limit the invention unless otherwise specified. In the present specification and drawings, elements having substantially the same function and configuration are given the same reference numerals to omit redundant description, and elements that are not directly related to the present invention are omitted from the drawings. do.

(First Embodiment: Smart Pachislot 100)
The smart pachi-slot 100 can progress the game without the intervention of real medals while maintaining the playability of the slot machine. In the smart pachislot 100, instead of real medals, electronic medals are used as electronic game values for games.

(Mechanical Configuration of Smart Pachislot 100)
As shown in the external view of FIG. 1, a smart pachislot 100 as a gaming machine includes a housing 102, a front upper door 104 and a front lower door rotatably arranged vertically at one end of the front surface of the housing 102. 106 are provided. A colorless and transparent design display window 108 made of a glass plate, a transparent resin plate, or the like is provided at substantially the center of the lower portion of the upper front door 104 . Three reels 110 (a left reel 110a, a middle reel 110b, and a right reel 110c) are independently rotatable at positions corresponding to the symbol display windows 108 in the housing 102 . A plurality of types of symbols are arranged in each area divided into, for example, 20 areas on the outer peripheral surfaces of the left reel 110a, the middle reel 110b, and the right reel 110c. Through the symbol display window 108, the player can visually recognize a total of nine symbols, which are three continuous symbols of the left reel 110a, the middle reel 110b, and the right reel 110c located in the upper, middle, and lower stages.

An operation unit installation table 111 is formed on the upper part of the lower front door 106, and the operation unit installation table 111 includes a counting switch 112, a game medal number display device 114, a bet switch 116, a start switch 118, a stop switch 120, and an adjustment switch. 121, production switches 122, and the like are provided.

The counting switch 112 consists of a push switch, and detects an operation to transfer some or all of the electronic medals electronically held in the smart pachislot 100 that can be used for games to a dedicated unit 350 described later. do. For operation of the counting switch 112, a short press for less than 500 msec and a long press for 500 msec or more are prepared. When the count switch 112 is pressed for a short time, one electronic medal is counted for each operation, and when the count switch is pressed for a long time, 50 electronic medals are counted at the timing of notifying the counting every 300 msec. The total number of electronic medals electronically held by the smart pachislot 100 that can be used in games is called the "number of game medals", and the storage unit holding the electronic medals is called the "medal holding unit". sometimes referred to as

The game medal number display device 114 displays the total number of electronic medals held in the medal holding section, that is, the number of game medals. However, the number of game medals does not include bet electronic medals. Therefore, the game medal number display device 114 displays the number obtained by subtracting the number of electronic medals bet from the electronic medals won by the player. The display of the number of game medals is indicated by a 5-digit or 6-digit 7-segment display or the like arranged at a position visible to the player, as follows. That is, the numerical value range is represented by 0 to 16368 in consideration of the maximum difference in the number of sheets in one business day, and when the significant numerical value has a higher digit of 0, the numerical value is blanked (turned off). Here, when the numerical value reaches 15000 or more, the player is notified to count, the lending process of electronic medals is restricted, and a test count signal is output for about 3500 msec. However, the player can continue playing the game. Then, when the numerical value becomes 16369 or more, the progress of the game is restricted. Specifically, acceptance of the bet switch 116, the start switch 118, and the settlement switch 121 is prohibited. Instead of the case where the numerical value becomes 16369 or more, when the numerical value is likely to become 16369 or more, the payout of electronic medals may be prohibited until the player counts the numbers. For example, if the number is 16357 or more by subtracting 12 cards (maximum payout number (eg 15 cards) - specified number (eg 3 cards)) from 16369, which is the maximum difference number that can be obtained in one game The game may be stopped. Further, the game medal number display device 114 reflects and displays the updated number of game medals within approximately 300 msec after the number of game medals held by the smart pachislot 100 is updated.

The bet switch 116 inserts (bets) a predetermined number of electronic medals among the electronic medals held in the medal holding portion. The bet switch 116 includes a max bet switch that inserts (bets) a prescribed number of electronic medals required for one game, and additionally inserts one electronic medal within the prescribed number. Includes 1-bet switch.

The start switch 118 is composed of, for example, a lever capable of detecting a tilting operation, and detects a game start operation by the player. The stop switches 120 (stop switch 120a, stop switch 120b, stop switch 120c) are provided corresponding to the left reel 110a, middle reel 110b, and right reel 110c, respectively, and detect a player's stop operation. The settlement switch 121 detects an operation of returning all the electronic medals betted by one operation of the bet switch 116 to the medal holder. The effect switch 122 is composed of, for example, a push switch and cross switches arranged vertically and horizontally, and detects a player's push operation and rotation operation.

A liquid crystal display section 124 for displaying various images associated with the performance is provided at approximately the center of the upper portion of the front upper door 104 . In addition, on the upper part and on the left and right of the front upper door 104, there are provided lamps 126 for effect, which are composed of, for example, high-intensity light-emitting diodes (LEDs). Speakers 128 are provided on the left and right sides of the lower front door 106 to produce auditory effects such as sound effects and musical tones.

In smart pachi-slot 100, when a game can be started and a prescribed number of electronic medals are betted, the activated line is activated and the operation of the start switch 118 is activated. Here, for betting, electronic medals held in the medal holding section are inserted through operation of the bet switch 116, and electronic medals are automatically inserted based on the fact that a replay combination is displayed on the activated line. including both cases. Also, the activated line is a line for judging the winning of the winning combination.

Then, when the player operates the start switch 118, the game is started, various processes such as the lottery for winning types are executed, and the rotation of the left reel 110a, the middle reel 110b, and the right reel 110c is controlled. After that, according to the operation of the stop switches 120a, 120b and 120c, the corresponding left reel 110a, middle reel 110b and right reel 110c are respectively stopped. Then, when a winning combination capable of receiving the payout of electronic medals wins according to the combination of the drawing result of the winning type lottery and the symbols displayed on the activated line, the number of electronic medals corresponding to the winning combination is stored in the medal holding unit. are paid out (stored) to end the game. In the case where the winning type that can receive the payout of electronic medals is not won, or in the case of winning but not winning, the game ends when the left reel 110a, the middle reel 110b, and the right reel 110c all stop. .

In the present embodiment, the above-mentioned one game is the insertion of the electronic medals held in the medal holding portion through the operation of the bet switch 116, or the electronic medals based on the display of the replay combination on the activated line. , the rotation of the left reel 110a, the middle reel 110b, and the right reel 110c is controlled according to the operation of the start switch 118 by the player, and the winning type lottery is executed. The left reel 110a, the middle reel 110b, and the right reel 110c corresponding to the operated stop switches 120a, 120b, and 120c are respectively stopped according to the lottery result of the lottery and the operation of the plurality of stop switches 120a, 120b, and 120c by the player. It means a game until the payout of electronic medals is executed when a winning combination that is controlled and can receive the payout of electronic medals wins. In addition, when the winning type that can receive the payout of electronic medals is not won, or when winning is not won, one game ends when the left reel 110a, middle reel 110b, and right reel 110c all stop. do. However, the start of one game may be read as the operation of the start switch 118 by the player instead of inserting the electronic medals or winning the replay combination. Also, the number of times such one game is repeated is the number of games.

(Electrical Configuration of Smart Pachislot 100)
FIG. 2 is a block diagram showing a schematic electrical configuration of smart pachislot 100 and dedicated unit 350. As shown in FIG. As shown in FIG. 2, the smart pachislot 100 and the dedicated unit 350 are electrically connected via a game ball lending device connection terminal plate 206 . The smart pachislot machine 100 includes a main control board 200 (main control section) for controlling the progress of the game, a sub-control board 202 (sub-control section) for controlling the effect according to the progress of the game, and a medal holding section. A control board including a medal number control board 204 for controlling the number of electronic medals (the number of game medals) is provided. Note that electrical signal transmission between the main control board 200 and the sub control board 202 is limited to one direction only from the main control board 200 to the sub control board 202 from the viewpoint of fraud prevention. Also, the dedicated unit 350 is provided with a dedicated unit control board 360 for transmitting and receiving electronic tokens to and from the smart pachislot machine 100 .

(Main control board 200)
The main control board 200 has a semiconductor integrated circuit including a main CPU 200a that is a central processing unit, a main ROM 200b that stores programs and the like, a main RAM 200c that functions as a work area, etc., and controls the entire smart pachislot machine 100. . The data in the main RAM 200c is retained without being erased, even when the power is turned off, unless the setting is changed and the RAM is cleared.

In addition, the main control board 200 functions by the main CPU 200a cooperating with the main RAM 200c based on the program stored in the main ROM 200b. 306, determination means 308, payout control means 310, game state control means 312, effect state control means 314, command transmission means 316 and other functional units.

The main control board 200 receives various detection signals from the bed switch 116, the start switch 118, the stop switches 120a, 120b, and 120c, and the settlement switch 121. Based on the received detection signals, the main CPU 200a performs various processes. to run.

The initialization means 300 executes initialization processing in the main control board 200 . The betting means 302 bets electronic medals to be used in games. Based on the operation of the start switch 118, the winning type lottery means 304 performs a winning type lottery for determining the suitability of the winning combination, more specifically, the suitability of the winning combination including the winning combination, as will be described in detail later.

The reel control means 306 controls the rotation of the left reel 110a, the middle reel 110b and the right reel 110c according to the operation of the start switch 118, and corresponds to the rotating left reel 110a, the middle reel 110b and the right reel 110c. Depending on the operation of the stop switches 120a, 120b, 120c, the corresponding left reel 110a, middle reel 110b, and right reel 110c are controlled to stop.

A reel drive control section 150 is also connected to the main control board 200 . The reel drive control unit 150 drives a stepping motor 152 based on a rotation start signal for the left reel 110a, the middle reel 110b, and the right reel 110c, which is transmitted from the reel control means 306 in response to the operation signal of the start switch 118. do. In addition, the reel drive control unit 150 detects the respective stop signals of the left reel 110a, the middle reel 110b, and the right reel 110c, which are transmitted from the reel control means 306, and the rotation position detection circuit 154 in response to the operation signal of the stop switch 120. Drive of the stepping motor 152 is stopped based on the signal.

The determining means 308 determines whether or not the symbol combination corresponding to the winning combination is displayed on the active line. Here, the fact that the symbol combination corresponding to the winning combination is displayed on the active line may simply be called winning. Based on the fact that the symbol combination corresponding to the winning combination is displayed on the activated line (that the winning combination has been won), the payout control means 310 distributes electronic medals by the number (amount of value) corresponding to the winning combination to the medal holding unit. pay out to

The game state control means 312 refers to the result of the winning type lottery and the determination result of the determination means 308, and shifts the game state to one of a plurality of types of game states. Also, the effect state control means 314 refers to the result of the winning type lottery, the determination result of the determination means 308, and the game state transition information, and shifts the effect state to one of a plurality of types of effect states. In the game state, a non-internal game state, an internal medium game state that is shifted by winning a bonus combination in the non-internal game state, and a symbol combination corresponding to the bonus combination in the internal medium game state are displayed on the activated line. It includes a bonus game state that is shifted by. In addition, in the production state, when a specific role (correct role) and another winning role (incorrect role) are won in a winning type that overlaps, a non-AT ( Assist time) production state and AT production state for executing auxiliary production are included. It should be noted that the special winning combination not only pays out electronic medals due to the winning of the winning combination, but also offers a winning combination that is more advantageous than other winning combinations, including all gaming profits obtained by winning the winning combination. To tell.

The command transmission means 316 is a game-related command associated with the operation of the betting means 302, the winning type lottery means 304, the reel control means 306, the determination means 308, the payout control means 310, the game state control means 312, the effect state control means 314, and the like. are sequentially determined, and the determined commands are sequentially transmitted to the sub control board 202 .

The main control board 200 is also provided with a random number generator (random number generating means) 200d. The random number generator 200d sequentially increments the count value, and resets the count value (determines the initial value by changing the numerical sequence) after a predetermined number of counts, thereby looping the count value within a predetermined numerical range. The main control board 200 obtains a random number by extracting a count value from the random number generator 200d at a predetermined time. The random number generated by the random number generator 200d of the main control board 200 (hereinafter referred to as the winning type lottery random number) is used to determine the game profit to be given to the player, for example, the winning type lottery means 304 to determine the winning type. be done.

(Sub control board 202)
The sub-control board 202, like the main control board 200, has various semiconductor integrated circuits including a sub-CPU 202a as a central processing unit, a sub-ROM 202b storing programs and the like, and a sub-RAM 202c functioning as a work area. , based on the command from the main control board 200, especially controls the performance. A backup power supply (not shown) is connected to the sub-RAM 202c as well as the main RAM 200c, so that data is retained without being erased even when the power is turned off. The sub control board 202 is also provided with a random number generator (random number generating means) 202d, similar to the main control board 200. Mainly used to determine the mode of production.

Also, in the sub-control board 202, the sub-CPU 202a functions by cooperating with the sub-RAM 202c based on the program stored in the sub-ROM 202b. It has a functional part.

The initialization determination means 330 executes initialization processing in the sub control board 202 . The command receiving means 332 receives commands from other control boards such as the main control board 200 and processes the commands.

The effect control means 334 receives the detection signal from the effect switch 122, and determines the effect of the game performed by each device of the liquid crystal display unit 124, the speaker 128, and the effect lamp 126 based on the received command. Specifically, the effect control means 334 determines the image data to be displayed on the liquid crystal display unit 124 and the illumination data for the effect through the illumination equipment such as the effect lamp 126, and outputs the data from the speaker 128. Determine the audio data that constitutes the audio to be generated. And the production|presentation control means 334 performs the production|presentation of the determined game. Note that the production includes an auxiliary production.

(Medal number control board 204)
The medal number control board 204 is connected to the main control board 200 and has various semiconductor integrated circuits including a medal CPU 204a as a central processing unit, a medal ROM 204b storing programs and the like, and a medal RAM 204c functioning as a work area. and manage electronic medals to be used in games. Also, the medal number control board 204 is connected to the dedicated unit 350 through the game ball rental device connection terminal board 206 .

Here, the game ball lending device connection terminal plate 206 is a connection terminal plate for connecting the smart pachislot 100 and the dedicated unit 350, and receives a signal related to lending of electronic tokens and receives the lending of electronic tokens. Transmission of results, transmission of signals related to the counting of electronic medals, and transmission of various information of the smart pachislot 100 are performed.

(dedicated unit 350)
The dedicated unit 350 is installed in the vicinity of the smart pachislot 100 and can lend electronic medals to the player and count the electronic medals won by the player. A dedicated unit control board 360 is provided in the dedicated unit 350 . The dedicated unit control board 360 is connected with a cash slot 362 , a card slot 364 , a lending switch 366 , a return switch 368 , a game switch 370 , a frequency display device 372 , and an earned medal number display device 374 .

The cash insertion unit 362 functions as an insertion slot for inserting cash. The card insertion section 364 enables insertion and withdrawal of a card medium capable of storing electronic medals. The lending switch 366 is composed of a press switch and detects an operation to transfer electronic tokens corresponding to the number of cash held in the dedicated unit 350 to the smart pachislot machine 100 . The return switch 368 is composed of a press switch, and detects an operation of transferring the electronic medals held by the dedicated unit 350 to a card medium and pulling out the card medium from the dedicated unit 350 through the card insertion portion 364 . The game switch 370 is a press switch and detects an operation to transfer electronic medals held by the dedicated unit 350 to the smart pachislot 100 . The point display device 372 displays the point held by the dedicated unit 350, that is, the point corresponding to the cash inserted from the cash insert section. The won medal number display device 374 displays the number of won medals, which is the total number of electronic medals held in the dedicated unit 350 .

FIG. 3 is an external view for explaining a schematic mechanical configuration of smart pachislot 100 and dedicated unit 350. As shown in FIG. Here, the flow of starting a game and the flow of ending a game in the smart pachislot 100 will be described with reference to FIG.

When a player tries to play a game on the smart pachislot 100, he/she first inserts cash into the cash insert section 362 of the dedicated unit 350 shown in FIG. Then, the point display device 372 of the dedicated unit 350 displays the point corresponding to the amount of cash inserted (for example, "10" for the amount of 1,000 yen inserted). When the player operates the lending switch 366, electronic medals (for example, "50") corresponding to the number of points held in the special unit 350 are transferred to the smart pachislot 100 at once. Then, the number of transferred electronic medals (for example, "50") is displayed on the game medal number display device 114 of the smart pachislot 100. FIG. Specifically, when smart pachi-slot 100 receives a lending notification, which will be described later, from dedicated unit 350, and if the lending notification is normal, the smart pachislot 100 receives the transfer of electronic tokens and notifies "normal" in the lending receipt result response. . On the other hand, if the message length and command values in the rental notification are normal, but the other information is abnormal, smart pachislot 100 notifies "abnormal" in the rental reception result response, which will be described later. Also, if the lending notification is not received normally, or if the message length and command values of the lending notification are abnormal, Smart Pachi-Slot 100 discards the received message without displaying an error, and at least Wait until the head and command can receive a successful loan notification. If the lending process cannot be performed, i.e., the game machine information notification described later is abnormal, and the number of counted medals in the counting notification described later (the number of electronic medals transferred to the dedicated unit 350 at one time) is "1" or more. The number of game medals displayed on the game medal number display device 114 is 15000 or more, the checksum of the received lending notification is abnormal, the lending serial number of the received lending notification is not consecutive, and the received lending When the number of loaned medals in the notification is "51" or more, or in the gaming machine information notification transmitted from the medal CPU 204a to the dedicated unit 350, which will be described later, information other than hall control/fraud monitoring information is notified, the smart pachislot 100 , notify "abnormality" in the loan receipt result response.

Subsequently, when the player operates the bet switch 116, electronic medals are betted. At this time, the game medal number display device 114 displays a value (for example, "47") obtained by subtracting the number of bet electronic medals (for example, "3"). Thus, the player can start the game. If, as a result of the game, a small winning combination with a payout number of 11 is won, the number of paid electronic medals (for example, "11") is added (for example, "58").

After the player operates the bet switch 116 to bet the electronic medals and before the start switch 118 is operated (game start), if the settlement switch 121 is operated, the bet is made. The number of electronic medals (for example, "3") is added to the game medal number display device 114 (for example, becomes "50"), and the bet state is canceled.

After finishing the game, the player operates the counting switch 112 to transfer the electronic medals held in the medal holding section to the dedicated unit 350 . Then, the number of game medals held in the medal holding portion is displayed on the acquired medal number display device 374 of the dedicated unit 350, and "0" is displayed on the game medal number display device 114. When the player operates the return switch 368 , electronic medals held in the dedicated unit 350 are transferred to a card, and the card is pulled out from the dedicated unit 350 through the card insertion portion 364 . In this way, the player can accumulate the acquired electronic tokens in the card medium.

When trying to play the game again, the player inserts a card medium in which electronic medals are accumulated into a card insertion part 364 instead of cash, and can play with the electronic medals accumulated in the card medium. Then, the electronic medals accumulated in the card medium are transferred to the dedicated unit 350, and the total number of electronic medals accumulated in the card medium is displayed on the acquired medal number display device 374. The player can transfer electronic medals held in the dedicated unit 350 to the smart pachi-slot 100 by operating the game switch 370 instead of the lending switch 366 .

When the lending switch 366 or the counting switch 112 is operated, the medal CPU 204a executes lending processing and counting processing of the electronic medals, and transmits a command to that effect to the main CPU 200a. The CPU 200a transmits a command to that effect to the sub CPU 202a. Then, the sub CPU 202a outputs a predetermined sound indicating movement of the electronic medals to the speaker 128 as the electronic medals are actually lent or counted in the lending process or the counting process. In the counting process, the sub CPU 202a may output a predetermined sound to the speaker 128 when the counting switch 112 is pressed for a short time or when the counting switch 112 is pressed for a long time. A predetermined sound may be output to the speaker 128 only at . Also, when the operation of the count switch 112 in the counting process is completed (for example, pressing and releasing), the sub CPU 202a outputs a predetermined sound indicating that the counting is completed, or, after the counting process is completed, the card insertion unit 364 A predetermined sound may be output to prevent the user from forgetting to pull out the card. In this way, the player can aurally confirm that the lending process and the counting process are properly executed. Further, the sub CPU 202a may notify that the lending process and the counting process are being executed not only through the speaker 128 but also through various devices such as the liquid crystal display unit 124 and the performance lamp 126. FIG. Note that here, a CPU (Central Processing Unit) is used as an example of the main body of control, but other computing devices such as MPU (Micro Processor Unit), DSP (Digital Signal Processor), FPGA (Field Programmable Gate Array), etc. Various possible computing elements can be applied.

Since the smart pachislot 100 does not require real medals, it is possible to prevent fraudulent acts such as inserting medals in a false manner or using medals illegally brought in. Also, since there is no need to provide a mechanism for inserting and dispensing game media in the game machine, design costs and manufacturing costs can be reduced. In addition, unfairness can be prevented by centrally managing the lending of game media to players and the counting of acquired game media. In addition, by centrally managing data, it becomes possible to suppress gambling, and by extension, to strengthen measures against addiction.

(Relationship between substrates)
Also, here, as shown in FIG. 2, in the smart pachislot 100, the medal number control board 204 is provided separately from the main control board 200, and the medal number control board 204 operates independently. Not limited to such a case, it is possible to vary the configuration of the board and the CPU.

FIG. 4 is an explanatory diagram for explaining another substrate configuration. In the above-described embodiment, as shown in FIG. 4A, the main control board 200 is provided with the main CPU 200a (first control unit) for controlling the progress of the game, and the medal number control board 204 is provided with electronic A medal CPU 204a (second control unit) for managing medals is arranged, the main control board 200 and the medal count control board 204 are connected via a harness, and the medal count control board 204 and the game ball lending device connection terminal plate. 206 are connected via a harness. The game ball rental device connection terminal plate 206 receives power (VL) from the dedicated unit 350, uses the power as an input to an insulating element such as a photocoupler, and generates a VL connection signal indicating the connection state with the dedicated unit 350. is generated and output to the medal number control board 204 . The medal number control board 204 is supplied with power from the dedicated unit 350 by the ON/OFF of the VL connection signal, in other words, the dedicated unit 350 is powered on and properly connected to the dedicated unit 350. It can be determined that With such a board configuration, modification of the configuration of the existing main control board 200 and increase in the occupied area can be minimized, so design costs can be reduced.

Note that the medal count control board 204 does not necessarily have to be separate from the main control board 200, and may be formed integrally with the main control board 200 as long as it satisfies its function. Specifically, as shown in FIG. 4B, the main control board 200 is provided with both a main CPU 200a that controls the progress of the game and a medal CPU 204a that manages the electronic medals used in the game. The substrate 200 and the game ball rental device connection terminal plate 206 may be connected via a harness. Here, by arranging both the main CPU 200a and the medal CPU 204a on one main control board 200, connectors and harnesses used for information exchange between the two are eliminated, the area occupied is reduced, and the reliability of information transmission is reduced. It is possible to improve the quality.

In the example of FIG. 4(c), the main CPU 200a arranged on the main control board 200 manages the electronic medals to be used in the game instead of the medal CPU 204a, and connects the main control board 200 with the game ball lending device. The terminal board 206 is connected via a harness. Here, in the main control board 200, the main CPU 200a controls the progress of the game and manages the electronic medals. The size can be reduced and the reliability of information transmission can be improved.

Here, at least the main control board 200 must be enclosed in the main board case for fraud prevention. In addition, if the medal number control board 204 having the function of managing the electronic medals used in the game is separate, it must be enclosed in the main board case together with the main control board 200 .

FIG. 5 is an explanatory diagram for explaining the encapsulation mode of the case. For example, as shown in FIG. 4(a), the main control board 200, the medal number control board 204, and the game ball lending device connection terminal board 206 are formed separately. 204 is connected, and the medal number control board 204 and the game ball rental device connection terminal board 206 are connected, as shown in FIG. It is conceivable to enclose all the game ball rental device connection terminal boards 206 in one main board case 200e. Here, as shown in FIG. 5(a), the main control board 200 and the medal count control board 204 are integrally formed by directly and fixedly connecting the connectors without using a harness. However, both may be connected via a harness.

As shown in FIGS. 4(b) and 4(c), the main control board 200 is provided with a main CPU 200a and a medal CPU 204a, or the main CPU 200a is provided alone. When the rental device connection terminal plate 206 is connected via a harness, in a state where the main control board 200 and the game ball rental device connection terminal plate 206 are connected, as shown in FIG. The main control board 200 may be individually enclosed in the main board case 200e, and the connection terminal board 206 of the game ball lending device may be enclosed in the connection terminal board case 206e. 200 and the game ball rental device connection terminal board 206 are all enclosed in one main board case 200e.

In any case, here, the main control board 200, the medal count control board 204, and the game ball rental device connection terminal board 206 are all enclosed in a case. In this case, the structure must be such that not only the front surface of the substrate but also the rear surface of the substrate can be easily confirmed.

In the example shown in FIGS. 4A and 4B, in the smart pachislot machine 100, the main CPU 200a and the medal CPU 204a operate independently. To manage electronic medals used in games.

FIG. 6 is an explanatory diagram for explaining the CPU that executes each function of smart pachislot 100 and the areas (used area or non-used area described above). In FIG. 6, "◎" indicates a general execution unit in the case where the functions are shared between two CPUs, the main CPU 200a and the medal CPU 204a, as shown in FIGS. 4(a) and 4(b). "O" indicates an executable execution part, and "X" indicates an inexecutable execution part. For example, when the functions are shared by two CPUs, No. in FIG. 12, generally, in the use area of the medal CPU 204a, the function of controlling the game medal number display device 114 and the function of controlling communication with the dedicated unit 350 are performed (indicated by "⊚" in FIG. 6). , a part or all of the area used by the main CPU 200a (indicated by "O" in FIG. 6).

(Communication between Smart Pachislot and dedicated unit)
With the functional units as described above, the smart pachislot 100 and the dedicated unit 350 exchange various information (telegrams) via serial communication to ensure normal operation of each other. The serial communication is asynchronous communication method and full-duplex communication control is performed. expressed in bits. At this time, the character transmission time is 0.16 msec to 3.9 msec, and if the next start bit cannot be received within 3.9 msec, the character is regarded as one message. For example, the following gaming machine information notification, count notification, and loan receipt result response are sent from the smart pachislot 100 (here, for example, the medal CPU 204a of the medal number control board 204) to the dedicated unit 350 through such serial communication.

7 to 10 are explanatory diagrams for explaining the format of the gaming machine information notification. As shown in FIG. 7, the gaming machine information notification transmits one gaming machine information out of three gaming machine information: gaming machine performance information, gaming machine installation information, hall controller/fraud monitoring information, to the dedicated unit 350. The message length is variable from 18 to 57 bytes. Specifically, the first byte of the gaming machine information notification message indicates the length of the message (12h to 39h), and the second byte indicates "01h" indicating the command type (here, gaming machine information notification). be The third byte indicates a sequence number from 00h to FFh as a serial number. Such a serial number notifies 00h when the power is turned on, and is incremented by 1 each time it is notified. However, the notification following FFh is 01h instead of 00h.

The 4th byte indicates the gaming machine type. Bit 7 of the game machine type indicates the management medium, game balls are indicated by "0", game medals are indicated by "1", and bits 6 to 4 indicate group divisions, Nikkogumi is "0", and Nichidenkyo is "0". Represented by "1", bits 3 to 0 indicate the type of gaming machine: "1" for pachinko gaming machines, "2" for reel-type gaming machines, "3" for arrange ball gaming machines, and "3" for rock-ball gaming machines. It is represented by "4". The 5th byte indicates the gaming machine information type. For example, if the gaming machine information is the gaming machine performance information, it will be "00h", if the gaming machine information is the gaming machine installation information, it will be "01h", and if the gaming machine information is hall control/fraud monitoring information, it will be "02h". . From the 6th byte, game machine information (either of game machine performance information, game machine installation information, hall controller/fraud monitoring information) is shown in a variable length.

For example, if the gaming machine information type is "00h", the gaming machine performance information is represented by 51 bytes as the gaming machine information, and as shown in FIG. , Accessory total number of payouts, Continuous accessory total payout number, Accessory ratio, Continuous accessory ratio, Advantageous section ratio, Indicated accessory ratio, Accessory status ratio, Number of games, Reserve, Reservation 1, Reservation 2 included. After being transferred to the dedicated unit 350, the gaming machine performance information is further transmitted to a gaming machine information center (not shown). Here, MY indicates the number of difference between the number of inserted electronic medals (the number of bets) and the number of payouts, which is assumed to be 0 when the difference is the lowest. Also, instead of or in addition to MY, it is possible to adopt the difference in the number of sheets after the power is reset. Among these information, the byte order of the total number of insertions, total number of payouts, MY, total number of payouts, total number of consecutive payouts, and number of games is little endian.

Further, if the game machine information type is "01h", the game machine installation information is represented by 40 bytes as the game machine information, and as shown in FIG. Chip product code, medal count control chip ID number, medal count control chip manufacturer code, and medal count control chip product code are included. Here, the main control chip ID number (9 bytes) and the medal number control chip ID number (9 bytes) are represented by 0 in the upper 4 bytes, followed by the individual chip number or chip code in the following 4 bytes. Bytes are represented by identification codes (LEM50A="21h", LES50A="22h", LEM7OA="23h", IDNAC8701="41h", IDNAC8702="42h", IDNAC8703="43h"). However, when the medal CPU 204a is not installed, all 9 bytes are represented by 0. The byte order of the main control chip ID number, main control chip manufacturer code, main control chip product code, medal number control chip ID number, medal number control chip manufacturer code, and medal number control chip product code is big endian.

If the gaming machine information type is "02h", hall control/fraud monitoring information is expressed in 12 to 16 bytes as gaming machine information, and as shown in FIG. number, main control state 1, main control state 2, gaming machine error state, gaming machine fraud 1, gaming machine fraud 2, gaming machine fraud 3, game information count, type information 1, count information 1, type information 2, count information 2 are included. Here, the relationship between the number of game medals, the number of inserted medals, and the number of paid-out medals is: "Number of game medals" = "Number of game medals sent last time" - "Number of inserted medals" + "Number of paid-out medals" + Game medals sent last time The "number of loaned medals" received after the number - the "number of counting medals" sent after the number of game medals sent last time. be able to. In addition, the signal during setting change in bit 0 of the game machine illegality 1 indicates that the setting is being changed and that the setting has been changed, and is continuously output from the time the setting is being changed until the end of one game after the setting change. Also, the setting confirmation signal of bit 1 indicates that the setting is being confirmed, and must be output for at least 3 seconds as a countermeasure against goto. If the power is interrupted while the setting confirmation signal is being output, the timer that counts 3 seconds may be reset and the setting confirmation signal may be output again for 3 seconds. may be stored, and when power is turned on (recovery from a power failure), timekeeping may be resumed from the stored timer value and a setting confirmation signal may be output. In this case, the total time during which the setting confirmation signal is output before the power failure and after the power failure is 3 seconds. The game information consisting of a combination of type information 1 and count information 1, or a combination of type information 2 and count information 2, is determined by type information 1 and 2 as a specified number (when the start switch 118 is operated) or a payout number (when the start switch 118 is operated). When the game ends) is indicated, and the number thereof is indicated by the count information 1 and 2. In addition, at the time of replay, the stipulated number at the time of replay operation is notified. The number of game information indicates the number of pieces of game information. When the number of game information is 0, four items of type information 1, count information 1, type information 2, and count information 2 are not transmitted.

FIG. 11 is an explanatory diagram for explaining the format of the count notification. The count notification is for transmitting the counted accumulated number of medals, which will be described later, to the dedicated unit 350, and the message length is a fixed length of 7 bytes. Specifically, the first byte of the message indicates the message length (07h), and the second byte indicates "02h" indicating the command type (here, count notification). The third byte indicates a sequence number from 00h to FFh as a counting serial number. This counting serial number notifies 00h when the power is turned on, and is incremented by 1 each time it is notified. However, the notification following FFh is 01h instead of 00h. The fourth byte indicates the number of counted medals. The number of counted medals is the number of electronic medals counted at the timing of the count notification. The fifth byte indicates the number of accumulated medals counted. The accumulated number of counted medals is a value obtained by accumulating the number of counted medals after being cleared to 0000h when the power of the smart pachislot 100 is turned on, and the value next to FFFFh is 0000h. A checksum is shown in the 7th byte.

FIG. 12 is an explanatory diagram for explaining the format of the lending acceptance result response. The lending receipt result response is for responding with the receipt result when there is a lending notification from the dedicated unit 350, and the message length is a fixed length of 5 bytes. Specifically, the first byte of the message indicates the length of the message (05h), and the second byte indicates "03h" indicating the type of command (in this case, the lending acceptance result response). The third byte indicates a sequence number from 00h to FFh as a lending serial number. This lending serial number notifies 00h when the power is turned on, and if the lending medal number reception result described later is normal, the lending serial number received from the dedicated unit 350 is reflected as it is, and if the lending medal number reception result is abnormal, Before that, it reflects the lending serial number when the receipt result of the number of lending medals was normally received from the dedicated unit 350. - 特許庁The fourth byte indicates the result of receiving the number of loaned medals (normal=00h, abnormal=01h). A checksum is shown in the 5th byte.

Further, the dedicated unit 350 sends the following lending notification to the smart pachislot machine 100 (here, for example, the medal CPU 204a).

FIG. 13 is an explanatory diagram for explaining the format of the rental notification. The lending notification is for transmitting the number of tokens to be borrowed to the smart pachislot 100 when the dedicated unit 350 receives the count notification from the smart pachislot 100, and the length of the telegram is a fixed length of 5 bytes. Specifically, the first byte of the message indicates the length of the message (05h), and the second byte indicates "13h" indicating the command type (here, rental notice). The third byte indicates a sequence number from 00h to FFh as a lending serial number. The rental serial number notifies 00h when the power is turned on, and is incremented by 1 each time it is notified. However, the notification following FFh is 01h instead of 00h. The fourth byte indicates the number of loaned medals. The number of lent medals indicates the number of lent electronic medals. In addition, when the game machine information notification is not received, when the game machine information type is notified by other than "02h: hall control / fraud monitoring information", when the number of counted medals in the counting notification is "1" or more , the number of lent medals "0" is notified. A checksum is shown in the 5th byte.

It should be noted that the smart pachislot 100 can be configured not to communicate with the dedicated unit 350 when a specific abnormality occurs inside. For example, when a backup abnormality or RAM (RWM) abnormality occurs as a specific abnormality, or when the manufacturer code does not match, the medal CPU 204a of the smart pachislot 100 issues an operation stop error without completing the activation process. , restricts the initiation of communication with the dedicated unit 350 .

FIG. 14 is a timing chart showing notification timings of game machine information notification, count notification, rental notification, and rental reception result response. As shown in FIG. 14, the smart pachi-slot 100 (here, for example, the medal CPU 204a) transmits gaming machine information notifications to the dedicated unit 350 at intervals of 300 msec (300 msec or more, 310 msec or less) after smart pachi-slot 100 is activated. . In addition, smart pachislot 100 transmits a count notification to dedicated unit 350 100 msec (90 msec or more, 100 msec or less) from the start of gaming machine information notification. The dedicated unit 350 transmits the rental notification to the smart pachislot machine 100 within 170 msec from the start of reception of the counting notification. Smart Pachi-slot 100 notifies dedicated unit 350 of a lending receipt result response within 10 msec after completion of receipt of the lending notification. In this way, it is possible to secure a time of 20 msec or more from when the smart pachi-slot 100 notifies the lending reception result response to when the next gaming machine information notification is performed.

FIG. 15 is an explanatory diagram for explaining the transmission timing of the gaming machine information notification. The gaming machine information notification is sent to the dedicated unit 350 at intervals of 300 msec, as described above. The gaming machine information notification includes three types of gaming machine information: gaming machine performance information, gaming machine installation information, hall control/fraud monitoring information, and as shown in FIG. 15, each has different notification timings and priorities. For example, the gaming machine installation information is notified after 60 seconds have passed since the activation of the smart pachislot 100 is completed, and thereafter is notified at intervals of 60 seconds. Also, the gaming machine performance information is notified after 180 seconds have passed since the activation of the smart pachi-slot 100 is completed, and after that, it is notified at a cycle of 180 seconds. Hall controller/unauthorized monitoring information is notified at a cycle of 300 msec after smart pachislot 100 is activated. However, the transmission timings of the three notifications may overlap. When the transmission timings overlap, the gaming machine information notifications are sequentially notified according to the priority. For example, in 180 seconds, if the gaming machine performance information, the gaming machine installation information, and the hall control/fraud monitoring information overlap, the main control state must not be updated in the hall controller/fraud monitoring information, and there is no game information. For example, the gaming machine installation information with the highest priority is first notified, the gaming machine performance information is notified after the next 300 msec, and the hole controller/fraud monitoring information is notified after the next 300 msec. Also, in 60 seconds, when the gaming machine installation information overlaps with the hall control/fraud monitoring information, if there is no update of the main control state in the hall controller/fraud monitoring information and there is no game information, the priority is given first. The game machine installation information with a high value is notified, and after the next 300 msec, the hole controller/fraud monitoring information is notified. However, if there is an update of the main control state in the hall control/fraud monitoring information, or if there is game information, the hall control/fraud monitoring information with the highest priority is notified first, and then the game machine installation information and the game information are notified. Machine performance information is notified. With such a configuration, the smart pachislot machine 100 and the dedicated unit 350 appropriately transmit gaming machine information notifications (game machine performance information, gaming machine installation information, hall control/illegal monitoring information), counting notifications, lending notifications, and lending receipt result responses. You can check each other at appropriate timing and with appropriate priority.

(VL connection signal)
As described with reference to FIG. 4, the game ball rental device connection terminal board 206 receives power supply from the dedicated unit 350, uses the power as an input to an insulating element such as a photocoupler, and connects with the dedicated unit 350. A VL connection signal indicating the state is generated and output to the medal CPU 204 a of the medal number control board 204 . The medal CPU 204a may or may not transmit a command to the effect that the VL connection signal has been received to the main CPU 200a. When the medal CPU 204a transmits a command to the effect that the VL connection signal has been received to the main CPU 200a, the main CPU 200a determines whether or not the command indicates reception of the VL connection signal. It is possible to restrict (prohibit) activation of only the control board 204 or the main control board 200 and medal number control board 204, or to stop the progress of the game. Further, when the medal CPU 204a does not transmit a command to the effect that the VL connection signal has been received to the main CPU 200a, the medal CPU 204a individually restricts (prohibits) activation of the medal number control board 204 or stops the progress of the game. be able to.

Here, if the VL connection signal is ON, the smart pachislot 100 can determine that it is properly connected to the dedicated unit 350 and that the dedicated unit 350 is powered on. Each targeted process can be performed. On the other hand, if the VL connection signal is OFF, the smart pachi-slot 100 determines that it is not properly connected (unconnected) to the dedicated unit 350, or that the dedicated unit 350 is powered off, and the game progresses. limit. Specifically, the smart pachi-slot 100 executes game stop processing if the VL connection signal is OFF. In this game stop processing, the game is restricted as an error state of the main control board 200 (bet of electronic medals, operation of the settlement switch 121, processing for progressing the game based on the operation of the start switch 118, and counting processing are all performed. restricted (prohibited). At this time, if the VL connection signal is OFF, the main CPU 200a and medal CPU 204a may not be activated.

Here, the counting process refers to a process of transferring part or all of the electronic medals held in the medal holding section to the dedicated unit 350 in accordance with the player's operation of the counting switch 112 . Specifically, when the counting switch 112 is not accepted, when the number of game medals in the medal holding unit is 0, when the VL connection signal is OFF, and when the counting is disabled, the number of counting medals (counting "0" is set as the number of tokens to be counted, and "1" is set as the number of medals to be counted when a short press of the count switch 112 is accepted. When the counting switch 112 is pressed for a long time, if the number of game medals in the medal holder is less than 50, all electronic medals (the number of game medals) are set as the number of counting medals, and if it is 50 or more, the counting medals. "50" is set as the number. Then, the counted number of medals is added to the counted accumulated number of medals, and the counting serial number is updated. Smart Pachi-slot 100 regards the data string of the count notification telegram as a string of integer values, performs a checksum to find the sum, and notifies the dedicated unit 350 of the count. In parallel with this, the number of counted medals is subtracted from the number of game medals held by the medal holding section.

Here, when the counting switch 112 is operated while the game is possible, the counting process is always executed. "While a game can be played" refers to a state in which the smart pachislot 100 and the dedicated unit 350 are connected and both are powered on (a player borrows electronic tokens, plays a game with the smart pachislot 100, A state in which a series of operations for counting the results of the game is possible). When the smart pachi-slot 100 is powered on but the dedicated unit 350 is not powered on, or when the smart pachi-slot 100 and the dedicated unit 350 are not connected, the smart pachi-slot 100 turns on the count switch. Even if the operation of 112 is accepted, the number of medals to be counted may disappear, so the operation of the counting switch 112 is invalidated, and the period is not included in the "playable period". In addition, during initialization processing after power-on, during setting change and setting confirmation, and during an error state that requires recovery processing such as resetting, etc. , is not included in "While you can play". Counting processing may or may not be executed during initialization processing after power-on, during setting change and setting confirmation, and during an error state requiring recovery processing by resetting or the like.

As described above, when the VL connection signal is ON, the smart pachi-slot 100 advances the game and accepts the counting process while the game is possible. On the other hand, if the VL connection signal is OFF, the smart pachislot 100 executes a game stop process, bets electronic medals, operates the checkout switch 121, and processes for progressing the game based on the operation of the start switch 118. , restricts (prohibits) all of the counting processes described above. This is because, as described above, when the VL connection signal is OFF, it can be determined that the smart pachislot 100 is not properly connected to the dedicated unit 350, or that the dedicated unit 350 is powered off. .

As described with reference to FIG. 14, the smart pachislot machine 100 (for example, the medal CPU 204a) transmits a counting notification including information on the number of medals to be counted to the dedicated unit 350. FIG. Here, for example, the smart pachislot 100 and the dedicated unit 350 are not properly connected (for example, not connected), or the dedicated unit 350 is powered off, etc. When smart pachi-slot 100 receives an input operation (for example, pressing operation) of counting switch 112 and transmits the counting notification to dedicated unit 350 when the preparation for receiving the notification is not properly completed, counting based on the input operation is performed. The number of medals may disappear. When the number of counted medals disappears, the total number of electronic medals decreases, resulting in inconsistency of the electronic medals. In the present embodiment, inconsistency refers to the number of electronic medals, which is the sum of the number of game medals and the number of won medals, which is the total number of electronic medals held in the dedicated unit 350, due to unintended disappearance or increase in the number of electronic medals. It means that the total number differs before and after the input operation of the count switch 112 . For example, when the total number of game medals is counted by the count switch 112, the number of game medals held in the smart pachislot 100 before counting differs from the number of won medals transferred to the dedicated unit 350 by counting. , an inconsistency has occurred.

Therefore, the smart pachi-slot machine 100 (for example, the medal CPU 204a) checks ON/OFF of the VL connection signal indicating the connection state with the dedicated unit 350 before sending the count notification to the dedicated unit 350. Determine whether there is a connection. When the VL connection signal is OFF, which indicates that the dedicated unit 350 is not connected, the smart pachislot 100 sets the medal number to "0" in order to limit the counting process itself.

When the number of count medals is set to "0", the smart pachi-slot 100 updates the number of game medals by subtracting the number of count medals "0" from the number of game medals. In other words, the number of game medals after the update does not substantially change from before the update. The smart pachi-slot 100 displays the updated number of game medals on the game medal number display device 114 . Since the number of game medals does not substantially change, the display of the number of game medals display device 114 does not change either.

Smart Pachi-Slot 100 also transmits a counting notification including information on the number of medals set to “0” to dedicated unit 350 . Assuming that the dedicated unit 350 is not connected, the dedicated unit 350 cannot properly receive the notification of counting, so the number of won medals does not change. Since the number of won medals does not change, the display of the number of won medals display device 374 does not change either.

Since the number of medals to be counted is set to "0" in this way, both the number of game medals of smart pachislot 100 and the number of won medals of dedicated unit 350 do not change, and the total number of electronic medals also does not change. Therefore, the smart pachi-slot 100 does not execute the counting process, and it is possible to prevent the electronic medals from disappearing according to the input operation of the counting switch 112 . That is, the smart pachislot 100 can avoid mismatching of the electronic medals.

FIG. 16 is a flow chart showing the flow of counting switch monitoring processing in the medal CPU 204a. The count switch monitoring process is executed when the count switch 112 is pressed. Here, processing related to this embodiment will be described, and processing not related to this embodiment will be omitted. Numerical values of step S in this figure are used only in the explanation of this figure.

As shown in FIG. 16, when the medal CPU 204a detects pressing of the counting switch 112, more specifically, when detecting the ON edge of the counting switch 112 (YES in S1), it acquires the VL connection signal, and obtains the VL connection signal. is ON (S2). If the VL connection signal is ON (YES in S2), the medal CPU 204a starts clocking the clock counter of the smart pachi-slot machine 100 (S3). The clock counter starts clocking when the ON edge of the count switch 112 is detected, and clocks from the ON edge to the OFF edge. Next, the medal CPU 204a determines whether or not the OFF edge of the counting switch 112 is detected (S4). When the OFF edge of the count switch 112 is not detected (NO in S4), the medal CPU 204a determines whether or not a predetermined time (for example, 500 msec) has passed since the timer started counting (S5). If the predetermined time has not elapsed (NO in S5), the medal CPU 204a returns to the process of step S4. When the predetermined time has passed (YES in S5), the medal CPU 204a sets the long press flag to ON (S6), and returns to the process of step S4. The long-press flag is a flag for identifying a long-press, and when it is ON, it indicates a long-press, and when it is OFF, it indicates that it is not a long-press (that is, it is a short-press).

When the OFF edge of the count switch is detected (YES in S4), the medal CPU 204a determines whether or not the long press flag is OFF (S7). If the long press flag is OFF (YES in S7), the medal CPU 204a sets the number of medals to be counted to "1", and proceeds to the process of step S9. The set number of medals to be counted is stored in a predetermined register or RAM. If the long press flag is ON (NO in S7), the medal CPU 204a proceeds to the process of step S9. In step S9, the medal CPU 204a clears (turns off) the long press flag. The medal CPU 204a clears the clock counter and terminates the counting switch monitoring process.

If the ON edge of the counting switch 112 is not detected (NO in S1), the counting switch monitoring process is terminated without executing any process. If the VL connection signal is OFF (NO in S2), the medal CPU 204a sets the number of medals to be counted to "0" (S11), and ends the count switch monitoring process. Note that the count medal number "0" is stored in a predetermined register or RAM. That is, even if the counting switch 112 is pressed, if the VL connection signal is OFF, the number of medals to be counted is set to "0", and the operation of counting electronic medals by the player is not accepted or is accepted. Disable it anyway.

FIG. 17 is a flow chart showing the flow of counting processing in the medal CPU 204a. The counting process is a process for updating the count of the number of game medals, and is executed at an interrupt timing that is repeated at a predetermined cycle (for example, 300 ms) regardless of the pressing operation of the counting switch 112 . Here, processing related to this embodiment will be described, and processing not related to this embodiment will be omitted. Numerical values of step S in this figure are used only in the explanation of this figure.

As shown in FIG. 17, the medal CPU 204a acquires the VL connection signal at an interrupt timing that is repeated at a predetermined cycle, and determines whether or not the VL connection signal is ON (S21). If the VL connection signal is ON (YES in S21), the medal CPU 204a proceeds to the process of step S23. When the VL connection signal is OFF (NO in S21), the medal CPU 204a sets the number of counted medals to "0" (S22), and proceeds to the process of step S23. Note that the count medal number "0" is stored in a predetermined register or RAM. At step S23, the medal CPU 204a acquires the current number of game medals from the medal holder (S23).

Next, the medal CPU 204a determines whether or not the long press flag is ON (S24). If the long press flag is ON (YES in S24), the medal CPU 204a determines whether or not the number of game medals obtained in step S23 is "50" or more (S25). When the number of game medals is "50" or more (YES in S25), the medal CPU 204a sets the number of counting medals to "50" (S26), and proceeds to the process of step S28. When the number of game medals is less than "50" (NO in S25), the medal CPU 204a sets the number of game medals to the number of counting medals (S27), and proceeds to the process of step S28. The number of medals to be counted set in step S26 or step S27 is stored in a predetermined register or RAM. If the long press flag is OFF (NO in S24), the process proceeds to step S28.

In step S28, the medal CPU 204a acquires the latest stored number of medals to be counted from the register or RAM in which the number of medals to be counted is stored (S28). For example, it is assumed that immediately before the current counting process, the counting switch monitoring process (see FIG. 16) is performed and the number of counting medals is set to "1". In this case, in step S28 of the counting process (see FIG. 17), the medal CPU 204a acquires the count medal number "1" stored in the predetermined register or RAM. Also, when the number of medals to be counted is set to "50" in step S26 of the current counting process, the medal CPU 204a acquires the number of medals to be counted "50" stored in a predetermined register or RAM. Further, when the number of game medals less than "50" is set as the number of counted medals in step S27 of the current counting process, the medal CPU 204a determines the number of game medals less than "50" stored in the predetermined register or RAM. is obtained as the number of counting medals. Further, in step S11 of the counting switch monitoring process (see FIG. 16) or step S22 of the counting process (see FIG. 17), when the number of medals to be counted is set to "0", the medal CPU 204a Acquire the count medal number "0" stored in the RAM.

Next, the medal CPU 204a updates the number of game medals by subtracting the acquired number of counted medals from the number of acquired game medals (S29). For example, when the number of counted medals obtained is "1", the number of medals obtained by subtracting "1" from the current number of game medals obtained becomes the updated (subtracted) number of game medals. Further, when the acquired number of counted medals is "50", the number of medals obtained by subtracting "50" from the current number of acquired game medals becomes the updated number of game medals. In addition, when the number of game medals less than "50" is acquired as the number of count medals, all the number of game medals less than "50" as the number of count medals is subtracted from the current number of game medals acquired, and the updated game medal count is calculated. The number of medals is "0". Further, when the acquired number of counted medals is "0", the number of medals obtained by subtracting "0" from the current number of acquired game medals becomes the updated number of game medals. In other words, when the number of medals to be counted is "0", the number of game medals does not substantially change.

Next, the medal CPU 204a updates the display of the game medal count on the game medal count display device 114 to the game medal count derived in step S29 (S30). Next, the medal CPU 204a generates a count notification including information on the number of counted medals obtained and transmits it to the dedicated unit 350 (S31). Next, the medal CPU 204a clears the number of counted medals upon completion of the count notification (S32), and ends the counting process.

In this way, the medal CPU 204a confirms whether the VL connection signal is ON/OFF, and sets the number of counted medals to "0" when the VL connection signal is OFF. Therefore, if the VL connection signal is OFF, even if the counting switch 112 is pressed, the number of game medals after updating does not substantially change from the number of game medals before updating. Also, if the VL connection signal is OFF, the dedicated unit 350 cannot properly receive the count notification, so the number of won medals does not change. Therefore, even if the dedicated unit 350 is not properly prepared to accept the count notification, and the count notification is transmitted, the smart pachislot machine 100 does not lose or increase the number of electronic tokens. It is possible to avoid mismatching of electronic medals.

Further, as shown in FIG. 16, the medal CPU 204a sets the number of counted medals to "0" immediately before updating the number of game medals, in other words, immediately before transmitting the counting notification. Therefore, the smart pachi-slot 100 can more reliably set the number of medals to be counted to "0", and can more reliably avoid mismatching of the electronic medals.

In addition, the smart pachi-slot machine 100 determines whether the VL connection signal is ON/OFF in both the counting switch monitoring process and the counting process, and sets the medal count to "0" if the VL connection signal is OFF. As a result, for example, among the determination processing of the VL connection signal in the counting switch monitoring processing and the determination processing of the VL connection signal in the counting processing, the determination of the VL connection signal executed first after the VL connection signal is turned OFF. Since the number of medals to be counted is set to "0" at the timing of the processing, the number of medals to be counted can be set to "0" at an early stage. In addition, since smart pachislot 100 determines whether the VL connection signal is ON/OFF in both the counting switch monitoring process and the counting process, there are two opportunities to determine whether the VL connection signal is ON/OFF. The number of medals to be counted can be set to "0" more reliably than in the case where the chance to determine ON/OFF is one time.

Also, in the smart pachislot 100, the medal CPU 204a performs counting switch monitoring processing and counting processing. The capacity of the ROM or RAM (storage section) in the medal count control board 204 is smaller than that of the main ROM 200b or the main RAM 200c (storage section). Therefore, a program for determining whether the VL connection signal is ON/OFF and setting the number of medals to "0" when the VL connection signal is OFF in both the counting switch monitoring process and the counting process can There is no pressure on the storable capacity of the number control board 204 .

The smart pachislot machine 100 may determine whether the VL connection signal is ON/OFF in one of the counting switch monitoring process and the counting process, and may omit the ON/OFF determination of the VL connection signal in the other. . In this case, it is more preferable to omit the ON/OFF determination of the VL connection signal in the counting switch monitoring process, and perform the ON/OFF determination of the VL connection signal in the counting process. In the smart pachislot machine 100, the ON/OFF state of the VL connection signal is determined before updating the number of game medals or notifying the count, and if the VL connection signal is OFF, the number of counted medals is set to "0". It is not limited to determining whether the VL connection signal is ON/OFF in the counting switch monitoring process or the counting process.

Also, when the power of the smart pachislot 100 is turned on, if the start-up of the dedicated unit 350 is later than that of the smart pachislot 100, the turn-on of the VL connection signal is delayed accordingly, and an error may occur. In this case, by temporarily setting the output of the error notification, especially the output from the speaker 128, to be low, it is possible to reduce the influence of the unintended error notification.

Also, when the smart pachi-slot 100 is powered on, the main CPU 200a may wait for a predetermined waiting time (for example, 10 seconds) until the sub CPU 202a and medal count control board 204 start up. Such waiting time may be a time obtained by adding a certain time (eg, 5 seconds) to the CPU startup time (eg, 0 to 100 msec).

(Counting process)
As described above, the medal CPU 204a of the smart pachislot 100 performs the counting process of transferring at least part of the electronic medals held in the medal holding section to the dedicated unit 350 in response to the operation of the counting switch 112 by the player. .

FIG. 18 is a timing chart for explaining counting processing. Here, the medal CPU 204a measures the time during which the counting switch 112 is continuously operated in order to grasp the counting mode (short press or long press) desired by the player. For example, as shown in FIG. 18(a), when the count switch 112 is pressed for a short time, that is, when an operation for less than 500 msec is received (time point a), "1" is set as the number of medals to be counted. When the 300 msec cycle (predetermined transmission cycle) due to the timer interruption shown in FIG. 14 arrives (time point b), "1" is subtracted from the number of game medals. Here, it is assumed that the number of game medals becomes "29" by subtracting "1" from "30". The number of counted medals and the number of game medals are variables held in the RAM by the medal CPU 204a. Smart pachi-slot 100 then transmits a count notification to dedicated unit 350 . When receiving the count notification, the dedicated unit 350 adds the number of counted medals (here, "1") indicated in the count notification to the number of won medals (eg, "0"), and the addition result (eg, "1"). is displayed on the acquired medal number display device 374 .

Further, for example, as shown in FIG. 18(b), the player continues to operate the counting switch 112, and when the 300 msec cycle arrives (time point c), the counting switch 112 is long pressed, that is, continued for 500 msec or more. If the number of game medals in the medal holding unit is 50 or more, "50" is set as the number of counted medals, and if the number is less than 50, the total number is set as the number of counted medals. Here, it is assumed that the number of game medals is "30" and the total number of "30" is set as the number of medals to be counted by long pressing. Along with this, the total number of game medals "30" is subtracted, and the number of game medals becomes "0". Then, smart pachislot 100 transmits a count notification to dedicated unit 350, and clears (sets to "0") the number of counted medals. When receiving the counting notification, the dedicated unit 350 adds the number of counted medals (here, "30") indicated in the counting notification to the number of won medals (eg, "0"), and the addition result (eg, "30"). is displayed on the acquired medal number display device 374 .

Incidentally, as described above, when the count switch 112 is operated while the game is possible, the count process is always executed. Therefore, when the player operates the counting switch 112 during the progress of the game, the payout of the electronic medals and the counting process may be executed continuously in a short period of time during the progress of the game. For example, as shown in FIG. 18(c), when the number of game medals is "30", a small winning combination is won according to the progress of the game, and 15 electronic medals are paid out. (time d). The medal CPU 204a receives the payout end command including the number of payouts, adds the number of payouts "15" to the number of game medals "30", and updates the number of game medals to "45" at once. At this time, in parallel, the player continues to operate the counting switch 112, and when the 300 msec period arrives (time point e), the medal CPU 204a long-presses the counting switch 112, that is, continues for 500 msec or more. When the operation is accepted, all electronic medals (here, "45") are set as the number of medals to be counted. Along with this, the total number of game medals "45" is subtracted, and the number of game medals becomes "0". Then, the smart pachi-slot machine 100 transmits a count notification to the dedicated unit 350 and clears the number of counted medals. When receiving the count notification, the dedicated unit 350 adds the number of counted medals (here, "45") indicated in the count notification to the number of won medals (eg, "0"), and the addition result (eg, "45"). is displayed on the acquired medal number display device 374 .

Here, the counting process is executed immediately after the electronic medals are paid out according to the timing of the winning of the small combination and the operation of the counting switch 112 . Therefore, the number of game medals changes from "30"→"45"→"0" each time. However, if the electronic medal payout process and the counting process are continuously executed within the 300 msec cycle for transmitting the counting notification, only the result will be notified in the counting notification. Therefore, regardless of the change in the number of game medals from "30" to "45" to "0", the dedicated unit 350 displays only the change in the number of won medals from "0" to "45" on the won medal display device 374. It will be done.

As shown in FIG. 18, the medal CPU 204a controls the timing at which the number of game medals changes, that is, the timing at which the electronic medal payout process and the counting process are executed. The counting switch 112 is continuously operated for a predetermined time (for example, 500 msec) or longer when the period for transmitting the counting notification arrives without waiting for the change in the number of medals to be displayed on the game medal number display device 114. If so, part or all of the number of game medals (here, "45", which is all) is transmitted to the dedicated unit 350 as the number of medals to be counted. Therefore, even when the electronic medal payout process and the counting process overlap, depending on the timing, the cycle of transmitting the count notification comes, and the number of game medals changes from "30" to "0" with the long press. After transmitting "30" as the number of counted medals to the dedicated unit 350, the number of game medals changes from "0" to "15" by the payout process of electronic medals, and the cycle of transmitting the count notification comes again. However, in some cases, the number of game medals changes from "15" to "0" as the button is pressed for a long time, and "15" is transmitted to the dedicated unit 350 as the number of counted medals. Then, the display contents of the won medal number display device 374 may change from "0"→"30"→"45", and as shown in FIG. may change from "0" to "45". However, since the player has already started counting the number of game medals by pressing the counting switch 112 for a long time, the displayed content of the acquired medal number display device 374 was "0", but the game has started. It is only necessary to confirm that the total number of medals and the number of electronic medals to be paid out is finally "45". Therefore, the difference in the manner of change in the number of game medals displayed on the acquired medal number display device 374 does not affect the progress of the game.

Here, the medal CPU 204a determines that if the counting switch 112 has been continuously operated for a predetermined time (for example, 500 msec) or more when the period for transmitting the count notification arrives, regardless of the timing of change in the number of game medals, By transmitting part or all of the number (here, "45") to the dedicated unit 350, the player can obtain the final number of won medals without waiting unnecessarily for the display update of the number of won medals display device 374. can be grasped at an early stage and the next operation can be started quickly, so that the operability of the smart pachislot machine 100 can be improved.

Further, here, the medal CPU 204a always accepts the operation of the counting switch 112 regardless of the number of game medals (even if the number of game medals is "0"), and determines the time during which the counting switch 112 is continuously operated. is timing.

For example, if the number of game medals is "0", the number of counted medals will be "0" in the count notification regardless of whether or not the counting process is executed. Therefore, when the number of game medals is "0", it is conceivable that the counting process is not executed or the time during which the counting switch 112 is continuously operated is not counted. However, as shown in FIG. 18(c), if the payout process of electronic medals occurs, even if the number of game medals before the payout process is "0", the paid-out electronic medals A counting process can be executed for medals (the number of game medals). At this time, when counting the time that the count switch 112 is continuously operated for the first time after the number of game medals becomes a number other than "0" (after the payout process is completed), the counting process is performed accordingly. Delays and poor operability.

Here, the token CPU 204a measures the time during which the count switch 112 is continuously operated regardless of the number of game tokens, so that when the cycle for transmitting the count notification arrives, it is possible to reliably determine the long press. As a result, the player can quickly grasp the final number of medals to be won, quickly start the next operation, and improve the operability of the smart pachi-slot machine 100 . In addition, the program executed by the medal CPU 204a does not need to determine (branch) whether or not the number of game medals is "0", so it is possible to reduce the processing load and the memory capacity. .

Note that the medal CPU 204a manages the cycle of transmitting count notifications (for example, 300 msec) and the cycle of updating the display of the game medal number display device 114 (predetermined display cycle by timer interruption: for example, 1 msec) independently. . Therefore, the display mode of the number of game medals on the game medal number display device 114 may differ depending on the time relationship between the timing of the above-described electronic medal payout process and counting process and the display update timing of the game medal number display device 114. becomes.

FIG. 19 is a timing chart for explaining how the number of game medals is displayed. Here, as shown in FIG. 18(c), it is assumed that a minor winning combination is won as the game progresses and 15 electronic medals are paid out. In parallel with this, when the player continues to operate the counting switch 112 and the cycle of 300 msec arrives, the medal CPU 204a accepts a long press of the counting switch 112, that is, an operation continued for 500 msec or more. All electronic medals (here, "45") are set as the number of medals to be counted. Here, the number of game medals is changed from "30" to "45" by the electronic medal payout process, and is changed from "45" to "0" by the counting process. Also, in the dedicated unit 350, the number of acquired medals is changed from "0" to "45" by the counting process.

For example, as shown in FIG. 19A, it is assumed that the display contents of the game medal number display device 114 are updated (changed) between the electronic medal payout process and the counting process. Then, the medal CPU 204a responds to the fact that the number of game medals has changed from "30" to "45" by the electronic medal payout process, and when the cycle for updating the display of the game medal number display device 114 arrives (time point f ), the display of the number of game medals on the display device 114 for the number of game medals is changed from "30" to "45". Similarly, the medal CPU 204a receives a cycle of updating the display of the game medal number display device 114 in response to the change in the number of game medals from "45" to "0" by the counting process (time point g). The number of game medals displayed on the medal number display device 114 is changed from "45" to "0".

Here, the display contents of the game medal number display device 114 are updated after the electronic medal payout process is executed and after the counting process is executed. Therefore, as the number of game medals changes from "30"→"45"→"0", the display of the game medal number display device 114 also changes from "30"→"45"→"0". Become. In this case, the player can understand through the game medal number display device 114 that the number of game medals has changed from "30"→"45"→"0".

Further, for example, as shown in FIG. 19(b), it is assumed that both the electronic medal payout process and the electronic medal counting process are executed during the cycle of updating the display of the game medal number display device 114. FIG. Then, the medal CPU 204a changes the number of game medals from "30" to "45" by the electronic medal payout process, and changes from "45" to "0" by the counting process. However, when the period for updating the display of the game medal number display device 114 arrives (time point h), the number of game medals has already become "0". Directly change the number display from "30" to "0".

Here, the display contents of the game medal number display device 114 are updated after both the payout process and the counting process of the electronic medals are executed. Therefore, while the number of game medals once increases from "30" to "45" and then decreases to "0", the display of the game medal number display device 114 immediately decreases from "30". and changes to "0". In this case, the player perceives through the game medal number display device 114 that the number of game medals has changed from "30" to "0".

Here, when the player tries to grasp that the number of game medals has changed in stages such as "30"→"45"→"0" through the game medal number display device 114, the medal CPU 204a The counting process must be performed after waiting for the display contents of the game medal number display device 114 to be updated, and the counting process is delayed accordingly. In order for the player to recognize the update of the display of the game medal number display device 114, it is necessary to lengthen the display time to the extent that the display can be recognized.

Here, as shown in FIG. 19, the medal CPU 204a reaches the cycle of transmitting the counting notification regardless of whether or not the display contents of the game medal number display device 114 have been updated according to the change in the number of game medals. Then, part or all of the number of game medals (here, "45", which is all) is transmitted to the dedicated unit 350 as the number of medals to be counted. Therefore, when the number of game medals changes from "30"→"45"→"0", the number of game medals on the game medal number display device 114 changes from "30"→" In some cases, the number of game medals on the game medal number display device 114 changes from "30" to "0" as shown in FIG. 19(b). However, since the player has already started counting the number of game medals by pressing the count switch 112 for a long time, the displayed content of the game medal number display device 114 was "30", but the final number is "30". Basically, it is sufficient to confirm that it is "0". Also, for the player, the displayed contents of the acquired medal number display device 374, which was "0", finally become "45" by combining the number of game medals and the amount of payout of electronic medals. It would be good if you could confirm the Therefore, the difference in the manner of changing the number of game medals on the game medal number display device 114 does not affect the progress of the game.

Here, the medal CPU 204a determines that if the counting switch 112 has been continuously operated for a predetermined time (for example, 500 msec) or more when the period for transmitting the count notification arrives, regardless of the timing of change in the number of game medals, By transmitting at least part of the number (here, "45") to the dedicated unit 350, the player can check the final number of game medals without waiting unnecessarily for the display update of the game medal number display device 114. Since it can be grasped early and the next operation can be started quickly, the operability of the smart pachislot machine 100 can be improved.

18 and 19, an example in which the process of paying out electronic medals and the process of counting electronic medals are continuously executed has been described. Various processing such as medal insertion processing can be targeted.

By the way, as described with reference to FIG. 14, the smart pachislot machine 100 (for example, the medal CPU 204a) transmits gaming machine information notifications to the dedicated unit 350 at predetermined intervals (for example, 300 msec intervals). In addition, smart pachi-slot 100 transmits a count notification to dedicated unit 350 after 100 msec has passed since the gaming machine information notification was transmitted to dedicated unit 350 . In other words, smart pachislot 100 transmits a counting notification including information on the number of medals to be counted to dedicated unit 350 at a predetermined cycle (for example, a cycle of 300 msec), similar to the game machine information notification.

Also, the counting switch 112 is an input operation unit that receives a predetermined input operation (for example, pressing operation) by the player. The smart pachislot machine 100 (for example, the medal CPU 204a) can receive a signal indicating the input operation from the counting switch 112 (input operation unit). Based on the signal received from the counting switch 112, the smart pachislot 100 sets the number of medals to be counted as described later. Smart Pachi-slot 100 updates the number of game medals by subtracting the set number of counting medals from the current number of game medals at the above-mentioned predetermined period (for example, 300 msec), and updates the number of game medals at a period different from the predetermined period (for example, 1 msec), the display of the game medal number display device 114 is updated to the game medal number after the update as needed.

When the update of the number of game medals is completed, the display content of the game medal number display device 114 is updated immediately, for example, in 1 msec, so that the display content is updated at substantially a predetermined cycle (eg, 300 msec). Accordingly, the smart pachi-slot 100 changes the display contents of the game medal number display device 114 (that is, the number of game medals displayed by the game medal number display device 114) based on the signal received from the counting switch 112, Substantially, it is performed at a predetermined cycle (for example, 300 msec).

In addition, smart pachislot 100 transmits a counting notification including information on the set number of medals to be counted to dedicated unit 350 at the aforementioned predetermined cycle (for example, 300 msec). In other words, smart pachislot 100 outputs a count notification to the outside based on the signal received from count switch 112 at a predetermined cycle.

In addition, the dedicated unit 350 updates the number of won medals based on the received count notification, and displays the display of the number of won medals display device 374 at a cycle different from the predetermined cycle (for example, 1 msec). Update the number of medals from time to time. In the dedicated unit 350, when the update of the number of won medals is completed based on the counting notification, the display content of the number of won medals display device 374 is updated immediately, for example, in 1 msec. Content will be updated. Therefore, the dedicated unit 350 updates the display of the won medal number display device 374 substantially at a predetermined cycle (300 msec) based on the count notification received from the smart pachi-slot machine 100 .

Here, the player may quickly press the counting switch 112 multiple times in succession. In such a case, smart pachislot 100 may receive (input) a signal indicating a pressing operation multiple times during one cycle (for example, within 300 msec) of a predetermined cycle (for example, 300 msec cycle). . In the smart pachislot 100, even if such multiple pressing operations are performed in one cycle, the display on the dedicated unit 350 is properly performed.

Specifically, when the smart pachi-slot machine 100 (for example, the medal CPU 204a) receives a signal from the counting switch 112 multiple times during one cycle, only one of the multiple times is valid. More specifically, even if smart pachislot 100 receives a signal from counting switch 112 multiple times during one cycle, the number of medals to be counted according to the pressing operation of counting switch 112 is fixedly set to "1". Then, smart pachi-slot 100 updates the display on game medal number display device 114 based on the validated one-time signal (more specifically, based on the number of counted medals "1"), and signals (for example, , counting notification) to the outside.

FIG. 20 is a flow chart showing the flow of counting switch processing in the medal CPU 204a. The count switch process is executed when the count switch 112 is pressed. The counting switch process corresponds to the processes of steps S3 to S10 performed when step S1 in FIG. 16 is YES. Here, processing related to this embodiment will be described, and processing not related to this embodiment will be omitted. Numerical values of step S in this figure are used only in the explanation of this figure.

As shown in FIG. 20, when the medal CPU 204a detects pressing of the counting switch 112 (specifically, when detecting the ON edge of the counting switch 112), the clock counter of the smart pachi-slot machine 100 starts counting time (S3). ). The medal CPU 204a determines whether or not the OFF edge of the count switch 112 is detected (S4). When the OFF edge of the count switch 112 is not detected (NO in S4), the medal CPU 204a determines whether or not a predetermined time (for example, 500 msec) has elapsed since the timer started counting (S5). If the predetermined time has not elapsed (NO in S5), the medal CPU 204a returns to the process of step S4. When the predetermined time has passed (YES in S5), the medal CPU 204a sets the long press flag to ON (S6), and returns to the process of step S4.

When the OFF edge of the count switch is detected (YES in S4), the medal CPU 204a determines whether or not the long press flag is OFF (S7). If the long press flag is OFF (YES in S7), the medal CPU 204a sets the number of medals to be counted to "1", and proceeds to the process of step S9. The set number of medals to be counted is stored in a predetermined register or RAM. If the long press flag is ON (NO in S7), the medal CPU 204a proceeds to the process of step S9. In step S9, the medal CPU 204a clears (turns off) the long press flag. The medal CPU 204a clears the clock counter and terminates the counting switch process. Here, in step S8, the number of medals to be counted is set to "1" instead of being incremented by "1".

FIG. 21 is a time chart for explaining the setting of the number of counting medals. As shown in FIG. 21, for example, at time point a, the number of game medals is "50" and a count notification including information that the number of counted medals is "0" is transmitted from smart pachislot 100 to dedicated unit 350, and the number of won medals is is "50". Then, it is assumed that the pressing operation of the counting switch 112 is performed three times until one cycle of 300 msec has elapsed from time a.

The counting switch process described above is started at the ON edge of the pressing operation of the counting switch 112, and if the OFF edge of the pressing operation is pressed for a short time, the count medal number "1" is set. Each time the count switch 112 is pressed for a short time, the number of medals to be counted is set to "1". Therefore, even if the switch is pressed for the third time in one cycle, the number of medals to be counted is set to "3". is set to "1".

At time b after one cycle of 300 msec has elapsed from time a, as described above with reference to FIG. By subtracting, the number of game medals "49" is derived. The smart pachi-slot machine 100 updates the display of the number of game medals on the display device 114 for the number of game medals from "50" to "49". In this way, even if the pressing operation is performed three times in one cycle, if the number immediately before the display update of the game medal number display device 114 is, for example, "50", the display may be updated to "47". The display is updated to "49".

Also, at time point b, smart pachislot 100 transmits a count notification including information that the number of counted medals is “1” to dedicated unit 350 . Upon receiving the counting notification, the dedicated unit 350 adds the received medal number "1" to the acquired medal number "50" to derive the acquired medal number "51". The dedicated unit 350 updates the display of the number of won medals on the display device 374 for the number of won medals from "50" to "51". In this way, even if the pressing operation is performed three times in one cycle, if the number immediately before the display update of the acquired medal number display device 374 is, for example, "50", the display may be updated to "53". Instead, the display is updated to "51".

That is, the medal CPU 204a sets the number of medals to be counted to "1" even if the pressing operation is performed multiple times in one cycle, so that the display of the number of won medals display device 374 of the dedicated unit 350 is displayed in a predetermined cycle ( For example, it can be updated to increase by 1 every 300 msec). For example, the display contents of the acquired medal number display device 374 do not jump from "50" to "53", but continuously change by one from "50" to "51". Therefore, in the smart pachi-slot 100, the number of won medals can be appropriately displayed on the number of won medals display device 374 of the dedicated unit 350, and it is possible to prevent the player from feeling distrustful.

In the smart pachislot machine 100 described above, when the signal (for example, ON edge) of the counter switch 112 is received (inputted) multiple times during one cycle, only one of the multiple signals is considered valid. there was. However, when the smart pachislot 100 receives the signal (for example, ON edge) of the counting switch 112 multiple times during one period, it may effectively process all of the received signals.

FIG. 22 is a flow chart showing the flow of counting switch processing according to a modified example of effectively processing all signals for a plurality of times. The flowchart of FIG. 22 differs from the flowchart of FIG. 20 in that step S8 in the flowchart of FIG. 20 is changed to step S18, and other steps are the same as those of the flowchart of FIG.

As shown in FIG. 22, when the long-press flag is OFF (YES in S7), the smart pachi-slot 100 increments the medal count by "+1" (increments by 1).

FIG. 23 is a time chart for explaining the setting of the number of counted medals according to a modification that effectively processes all signals for a plurality of times. As shown in FIG. 23, it is assumed that the pressing operation of the counting switch 112 is performed three times from time point c until one cycle of 300 msec has elapsed.

The counting switch process in this modification starts at the ON edge of the pressing operation of the counting switch 112, and if the OFF edge of the pressing operation is pressed for a short time, the number of counted medals is incremented by "1". Therefore, each time the counting switch 112 is pressed for a short time during one cycle, the number of medals to be counted increases by "1". For example, the number of medals to be counted is set to "2" at the second OFF edge in one cycle, and the number of medals to be counted is set to "3" at the third OFF edge in one cycle.

At time d after one cycle of 300 msec has elapsed from time c, as described with reference to FIG. By subtracting, the number of game medals "47" is derived. The smart pachi-slot machine 100 updates the display of the number of game medals on the number-of-game-game medal display device 114 so as to decrease by "1" in the order of "50"→"49"→"48"→"47".

Further, at time d, smart pachislot 100 transmits a counting notification including information on the number of medals to be counted "3" to dedicated unit 350 due to three pressing operations in one cycle. Upon receiving the counting notification, the dedicated unit 350 adds the received number of counted medals "3" to the number of won medals "50" to derive the number of won medals "53". The dedicated unit 350 updates the display of the number of won medals on the display device 374 for the number of won medals to increase by "1" in order like "50"→"51"→"52"→"53".

In this way, even in the modified example in which all of the multiple signals are effectively processed, the number of won medals can be appropriately displayed on the won medal number display device 374 of the dedicated unit 350 .

(Communication between main CPU and medal count control CPU)
Communication between smart pachislot 100 and dedicated unit 350 has been described above. However, specifically, in parallel with the above-described serial communication between the medal CPU 204a and the dedicated unit 350, the main CPU 200a and the medal CPU 204a are in serial communication inside the smart pachislot machine 100, and the medal CPU 204a communicates with the main CPU 200a. Information is acquired by transmission/reception of the command, and information is notified to the dedicated unit 350 described above based on the information. In serial communication, for example, the communication speed is 125000 bps, and each byte of data is represented by a 1-bit start bit, an 8-bit data bit, and a 1-bit stop bit. Here, the relationship between the main CPU 200a and the medal CPU 204a, which is the preceding stage of notification between the medal CPU 204a and the dedicated unit 350, will be described, and the communication between the two will be described in detail.

(Contents held in RAM)
Here, using FIGS. 4(a) and 4(b), the main CPU 200a and the medal CPU 204a are separately provided. An example in which the processing is performed using the However, for example, information such as the total number of insertions, the total number of payouts, MY (maximum MY), the total number of payouts, the total number of consecutive payouts, and the number of games are commonly accumulated when the power is turned on. This information is stored until it is reset when power is restored after a power failure. Here, if the main CPU 200a manages part of the information and the medal CPU 204a independently manages the other information, the following problems arise. That is, if either one of the main CPU 200a and the medal CPU 204a is powered off and the power of the other is left on, for example, the total inserted number and the total paid out number are counted from the reset state. However, there is a possibility that the total payout number of the accessory and the total number of continuous accessory payouts are counted in an accumulated state without being reset. Therefore, information involving accumulation such as the total number of insertions, the total number of payouts, MY (maximum MY), the total number of payouts of an accessory, the total number of consecutive payouts of an accessory, and the number of games is managed by one CPU. For example, here, the main CPU 200a manages all such information. With such a configuration, information mismatch can be avoided, and the game can be properly progressed.

(error priority)
The main CPU 200a refers to the number of inserted electronic medals, the number of payouts, the total number of inserted electronic medals, the total number of paid out electronic medals, etc. in payout processing, settlement processing, and counting processing when electronic medals are bet, and there is no inconsistency in the relationship. and may signal an error if there is any inconsistency. Further, the main CPU 200a confirms that the number of inserted medals is 1 or more and 3 or less when betting electronic medals, and confirms that the number of payouts is 0 or more and 15 or less in the process of paying out electronic medals. If not, an error may be reported. Such processing may be performed in the used area or may be performed in the non-used area. In addition to the above, the main CPU 200a may confirm the prescribed number corresponding to the gaming state.

Here, in addition to the error in the main CPU 200a, it is assumed that the medal CPU 204a is also set to perform its own error determination processing. With such a setting, when an error occurs in the main CPU 200a and the medal CPU 204a at the same timing, the error occurring in the main CPU 200a may be preferentially notified by a device such as the speaker 128 or the like. In addition, a specific error that can occur at the same timing in the main CPU 200a and the medal CPU 204a (for example, an error that is determined to have a serious problem such as a backup error, an error indicating that the reading and writing of the RAM is abnormal) is set. If an error occurs at the same timing in the main CPU 200a and the medal CPU 204a, the specific error may be notified by the device. Also, when a plurality of errors occur at the same timing in the medal CPU 204a, the most recent error may be prioritized and notified by a device such as the game medal number display device 114 or the like. In addition, not limited to this case, if a priority is set in advance for a plurality of errors, and a plurality of errors occur at the same timing in the medal CPU 204a, even if the error is notified based on the set priority. good. By predetermining the order of priority for reporting errors in this way, it becomes possible to take prompt and effective measures according to the degree of urgency and priority of the error. For example, if multiple errors occur, the one with the highest priority is reported. Here, when the cause of the error is removed and the error is cleared, the error notification of 1 at that time is erased, and the next highest priority error is sequentially notified. That is, one error notification is erased in response to one cancellation operation. Further, in addition to the case where control is performed so that one error notification is erased in response to such one cancellation operation, a plurality of error notifications whose cause of the error has been eliminated can be displayed simultaneously in response to one cancellation operation. It can also be controlled to be erased. In this case, when the error cancellation operation is performed, a plurality of error reports whose causes have been removed are erased, and the error with the highest priority among the errors whose causes have not been removed is reported. In addition, in the medal number control board 204, an individual device such as 7 segments is separately installed, and if an error occurs in the medal CPU 204a, the individual device can be used instead of or in addition to the game medal number display device 114. may be notified.

(RAM error)
Among errors, processing for RAM abnormality is performed in the non-use area in the main CPU 200a, and is performed in the use area in the medal CPU 204a. This is because the main CPU 200a does not have enough space for the usage area, and the medal CPU 204a has the space for the usage area. With such a configuration, it is possible to appropriately progress the game while suppressing an increase in the memory capacity of the main ROM 200b.

(command transmission/reception)
The main CPU 200a transmits a predetermined command to the medal CPU 204a. For example, when the bet switch 116 is operated, the main CPU 200a may transmit to the medal CPU 204a a game medal insertion command composed of identification information, transmission information indicating the number of insertion requests, and a checksum. Further, the main CPU 200a may transmit, to the medal CPU 204a, a start lever pressing command composed of identification information, transmission information indicating the number of requested coins to be inserted, and a checksum when the start switch is operated. Further, the main CPU 200a may transmit a payout end command composed of identification information, transmission information indicating the number of payouts, and a checksum to the medal CPU 204a at the end of payout. Further, the main CPU 200a may transmit a 1-game end command composed of identification information, role ratio-related transmission information, and a checksum to the medal CPU 204a at the end of 1 game. In addition, the main CPU 200a may transmit to the medal CPU 204a an activation command including identification information, transmission information necessary for activation, transmission information related to role ratios, and a checksum at the time of activation. Also, the main CPU 200a may transmit a state transition command including identification information and a checksum to the medal CPU 204a when the internal state is changed, when an error occurs, or when the error is cleared. The length of the above command can be set arbitrarily. It should be noted that the main CPU 200a transmits role ratio-related transmission information (information related to the use of electronic medals (game value) and information related to the acquisition of electronic medals (game value)), that is, the total inserted number shown in FIG. , Total number of payouts, MY (maximum difference number), Total number of accessories paid out, Total number of continuous accessories paid out, Accessory ratio, Continuous accessory ratio, Advantageous section ratio, Instruction included accessory ratio, Accessory condition ratio, The number of games played is calculated and transmitted to the medal CPU 204a. The medal CPU 204a extracts part of the transmission information related to the role ratio from the command received from the main CPU 200a and stores it in the RAM of the medal number control board 204. FIG. The main CPU 200a may calculate the role ratio-related transmission information in the used area or in the non-used area. Further, the medal CPU 204a may hold the transmission information related to the role ratio in the use area of the RAM, or may hold it in the non-use area. Also, the medal CPU 204a may transfer the transmission information related to the role ratio to the RAM in the use area or the non-use area.

Of the above game medal insertion command, start lever depression command, payout end command, 1 game end command, startup command, state transition command, game medal insertion command, start lever depression command, payout end command, 1 game The main CPU 200a transmits the end command and the startup command to the medal CPU 204a within the main loop, and the main CPU 200a transmits the state transition command to the medal CPU 204a within the timer interrupt (for example, 1.49 msec cycle).

Also, the medal CPU 204a can determine an error based on the command received from the main CPU 200a. For example, the medal CPU 204a extracts the number of inserted and paid out electronic medals in the game medal insertion command, the payout end command, and the one game end command, and determines the relationship between the total number of inserted electronic medals and the total number of paid out electronic medals. Make sure there are no inconsistencies. Also, the medal CPU 204a confirms that the number of inserted electronic medals is not 0 when the start lever pressing command is received. Further, the medal CPU 204a may confirm that there is no mismatch in the specified number of electronic medals corresponding to the game state in the game medal insertion command. In addition, the main CPU 200a controls a 1-bit confirmation signal indicating that the payout end command is to be sent in I/O other than serial communication, and the medal CPU 204a controls the confirmation signal indicating that the payout end command is to be sent. If not, the received command may be discarded regardless of whether or not it is a payout end command.

Here, it is assumed that the command transmitted from the main CPU 200a to the medal CPU 204a has a variable length. Then, since the length of the command is unknown at the start of command reception, the medal CPU 204a is unclear as to how long the command reception state should be maintained and at what timing the command should be analyzed. When the command is made variable in this way, the identification information indicates what kind of command the command is and how many bytes the command is, so that the medal CPU 204a can easily grasp the command. can be made possible.

Further, for example, if there is a bit to which no information is assigned in the identification information, the bit can be assigned to "replay state" which is information required by the medal CPU 204a. In this way, it is possible to make effective use of the empty area of the transmission data, and it is not necessary to generate a separate program for generating and transmitting a 1-byte command for the replay state.

Also, the medal CPU 204a transmits a predetermined command to the main CPU 200a. For example, when the medal CPU 204a receives the above-described commands (game medal insertion command, start lever depression command, payout end command, start-up command) from the main CPU 200a, the medal CPU 204a receives identification information, transmission information indicating the number of insertable medals and the number of game medals, A reply command composed of a checksum may be sent to the main CPU 200a. The main CPU 200a can determine an error by checking the checksum of the reply command received from the medal CPU 204a. In addition, the medal CPU 204a does not transmit a reply command to the one game end command and the state transition command.

Here, it is assumed that a predetermined bit of the identification information of the reply command is associated with "ACK" indicating that the medal CPU 204a has normally received the command transmitted from the main CPU 200a. Such "ACK" is processed independently of other bits. For example, if the predetermined bit of the identification information is 1, the main CPU 200a can proceed to the next processing of the game regardless of the contents of other bits. Further, when a bit other than a predetermined bit is established, the main CPU 200a performs a process corresponding to the established bit while proceeding with the game. With such a configuration, it is possible to effectively use the identification information area and improve the information transfer efficiency.

Also, such communication between the main CPU 200a and the medal CPU 204a may be always executed, or may be subject to a predetermined limit. For example, two-way communication between the main CPU 200a and the medal CPU 204a may be started upon completion of the winning type lottery or AT lottery by operating the start switch 118, and may be restricted upon completion of one game. In this embodiment, when the start switch 118 is operated, a random number is acquired (latched) from the random number generator 200d and used as a winning type lottery random number for a winning type lottery or an AT lottery. Here, communication between the main CPU 200a and the medal CPU 204a is not performed until the winning type lottery or AT lottery by operating the start switch 118 is completed, and communication is triggered by the completion of the winning type lottery or AT lottery by operating the start switch 118. , the communication between the main CPU 200a and the medal CPU 204a does not affect the latch timing of the random number, and the random number can be obtained appropriately.

When the main CPU 200a and the medal CPU 204a are provided separately as shown in FIGS. 4(a) and 4(b), both of them transmit information by means of commands through the above serial communication. On the other hand, as shown in FIG. 4(c), when the main CPU 200a manages electronic medals to be played in a game instead of the medal CPU 204a, information is held as common internal variables in the main RAM 200c.

(command management)
As described above, from the main CPU 200a to the medal CPU 204a, a plurality of types of commands (game medal insertion command, start lever depression command, payout end command, 1 game end command, startup command, state transition command) are transmitted as information. be. Also, a reply command is transmitted from the medal CPU 204a to the main CPU 200a. If the main CPU 200a normally receives the reply command and the content indicates "ACK", the main CPU 200a can proceed to the next process assuming that the communication between the main CPU 200a and the medal CPU 204a has been completed normally.

However, communication between the main CPU 200a and the medal CPU 204a is not necessarily completed normally. For example, although the main CPU 200a normally transmits a command, the medal CPU 204a may not be able to receive the command normally for some reason. Also, although the medal CPU 204a normally receives a command from the main CPU 200a and normally transmits a reply command in response to that command, the main CPU 200a may not be able to normally receive the reply command for some reason. However, in either case, the main CPU 200a cannot determine whether or not the medal CPU 204a has normally received the command. Therefore, in order to proceed with the process, the main CPU 200a resends the command sent immediately before to the medal CPU 204a.

Here, a case is illustrated in which transmission of the payout end command is not completed normally. In the former case, that is, when the main CPU 200a normally transmits the command but the medal CPU 204a cannot receive the command normally, the medal CPU 204a does not effectively process the payout end command itself. Even if it is resent, if the medal CPU 204a can normally receive the resent payout end command, no problem will occur.

However, the latter, that is, the medal CPU 204a normally receives a command from the main CPU 200a and normally transmits a reply command to that command, but when the main CPU 200a cannot normally receive the reply command, the medal CPU 204a pays out. It's likely that you're effectively handling the exit command. For example, it is assumed that the medal CPU 204a normally receives the payout end command and adds the number of payouts included in the payout end command to the number of game medals. The medal CPU 204a normally transmits the reply command, but cannot grasp whether the main CPU 200a has normally received the reply command. Then, when the main CPU 200a fails to receive the reply command normally and resends the payout end command, and the medal CPU 204a normally receives the payout end command, the number of payouts included in the payout end command is increased to the number of game medals. may be added to Then, the number of payouts of the electronic medals will be repeatedly added to the number of game medals for one payout opportunity of the electronic medals, and the player will unfairly obtain a game profit. Also, if the harness between the main control board 200 and the medal number control board 204 is manipulated and the payout end command is illegally transmitted multiple times, the number of payouts will be repeated multiple times in the same manner as described above. Additive events can occur.

Therefore, in the present embodiment, the command transmitted from the main CPU 200a to the medal CPU 204a is appropriately validated only once. Specifically, when the medal CPU 204a continuously receives commands of the same type from the main CPU 200a (external), the medal CPU 204a invalidates commands of the same type received from the second time onward, and does not process the command. Here, the commands refer to the above-described game medal insertion command, start lever pressing command, payout end command, 1 game end command, startup command, state transition command. For example, after the payout end command, another command If the payout end command is received without receiving it, it means that commands of the same type have been received continuously. Note that when the same type of command is received from the main CPU 200a two or more times in succession, the second and subsequent commands of the same type are not necessarily invalidated. For example, if the 1 bet switch is operated two or more times in succession, or if a given command of the same type is received two or more times in succession under a given situation that permits continuous reception of commands, The medal CPU 204a may effectively process the second and subsequent commands of the same type.

Further, when the medal CPU 204a receives a predetermined command from the main CPU 200a, the medal CPU 204a invalidates the predetermined command received after the first received predetermined command until it receives a specific command different from the predetermined command. good. For example, once the medal CPU 204a receives a payout end command from the main CPU 200a, it invalidates the payout end command received later until it receives a specific command, for example, a start lever pressing command. At this time, the predetermined command received after the first received predetermined command is valid only when the specific command is received, and the predetermined command is received first and then received next. Even if a command or information other than a specific command is received by the time, the payout end command received later is invalidated. For example, once a payout end command is received as a predetermined command from the main CPU 200a, another game medal insertion command, one game end command, start-up command, and state transition are received until a start lever depression command is received as a specific command. Even if the hour command is received, the payout end command received later is invalidated.

Here, when the medal CPU 204a receives a predetermined command from the main CPU 200a, it effectively processes the predetermined command received after the predetermined command received first on condition that the specific command is received. However, on the condition that any command other than the predetermined command or arbitrary information is received, the medal CPU 204a receives the predetermined command after the first received predetermined command. It may effectively process the command.

24 to 26 are flowcharts showing the flow of command reception processing in the medal CPU 204a. Here, processing related to the present embodiment will be described, and specific command generation processing, for example, that is not related to the present embodiment will be omitted. Numerical values of step S in this figure are used only in the explanation of this figure. Also, here, 1-byte buffers (insertion request buffer, IN signal confirmation buffer, payout confirmation buffer, main receive command error buffer) are used as flags, and the two values "0h" and "FFh" are switched. Here, the reason why the byte value is used as the flag instead of the bit value is that in the case of the bit value, after reading the byte value, the bit itself must be judged, and the This is because the total command size becomes rather long. The buffers used as flags are backed up and are not initialized even when the power is turned off.

As shown in FIG. 24, when the medal CPU 204a normally receives a command from the main CPU 200a, the medal CPU 204a determines whether or not the received command (received command) is a startup command (S1). As a result, if the received command is a startup command (YES in S1), the medal CPU 204a performs gaming machine installation information reception processing for receiving gaming machine installation information (S2), and confirms the main control chip manufacturer code. A code confirmation process is performed (S3), and the command reception process ends. Also, if the received command is not the activation command (NO in S1), the medal CPU 204a determines whether or not the received command is the payout end command (S4). As a result, if the received command is the payout end command (YES in S4), the medal CPU 204a executes the payout number setting process (S5) and ends the command receiving process. Such payout number setting processing will be described in detail later.

If the received command is not a payout end command (NO in S4), the medal CPU 204a determines whether or not the received command is a one-game end command (S6). As a result, if the received command is a one-game end command (YES in S6), the medal CPU 204a performs gaming machine performance information setting processing for setting gaming machine performance information (S7), and terminates the command reception processing. Also, if the received command is not the one game end command (NO in S6), the medal CPU 204a determines whether or not the received command is the state transition command (S8). As a result, if the received command is a state transition command (YES in S8), the medal CPU 204a executes the main control state reception process (S9) for receiving the main control state, and terminates the command reception process.

Further, if the received command is not a state transition command (NO in S8), the medal CPU 204a executes a requested insertion number update process (S10) for updating the requested number of electronic medals to be inserted. It is determined whether or not it is a command (S11). As a result, if the received command is the start lever pressing command (YES in S11), the medal CPU 204a executes the game start process (S12) and terminates the command receiving process. Such game start processing will be described in detail later. If the received command is not the start lever pressing command (NO in S11), the medal CPU 204a terminates the command receiving process.

In the flowchart of FIG. 24, processing is executed exclusively and independently according to which one of the plurality of types of commands is received. For example, if the received command is a payout end command, the payout number setting process (S5) is performed, but the game start process (S12) is not performed, and if the received command is a start lever pressing command, the game starts. The process (S12) is performed, but the payout number setting process (S5) is not performed. In this embodiment, the payout number setting process (S5) executed in response to receiving the payout end command and the game start process (S12) executed in response to receiving the start lever pressing command are managed independently. By switching the payout confirmation buffer and the IN signal confirmation buffer, the commands received by the medal CPU 204a are appropriately managed.

In the payout number setting process (S5) shown in FIG. 25, the medal CPU 204a sets 0h in the input request buffer (S5-1) and sets 0h in the IN signal confirmation buffer (S5-2). Here, by setting 0h in the IN signal confirmation buffer, invalidation of the start lever pressing command received in the later-described game start process (S12) is cancelled. Subsequently, the medal CPU 204a determines whether or not the payout confirmation buffer is 0h (S5-3). As a result, if the payout confirmation buffer is not 0h (NO in S5-3), it means that the payout end command is not received for the first time, so the medal CPU 204a ends the payout number setting process. On the other hand, if the payout confirmation buffer is 0h (YES in S5-3), it means that the payout end command is received for the first time, so the medal CPU 204a sets FFh in the payout confirmation buffer (S5-4). , invalidate the second and subsequent payout end commands. Next, the medal CPU 204a determines whether or not the number of payouts is 16 or more (S5-5). As a result, if the payout number is 16 or more (YES in S5-5), FFh is set in the main receive command error buffer (S5-6), and the payout number setting process ends.

On the other hand, if the number of payouts is 15 or less (NO in S5-5), the medal CPU 204a determines whether or not replay is in operation (S5-7). As a result, if the replay is not activated (NO in S5-7), the medal CPU 204a determines whether or not the payout number is 0 (S5-8). As a result, if the payout number is 0 (YES in S5-8), the medal CPU 204a ends the payout number setting process. On the other hand, if the number of payouts is not 0 (NO in S5-8), the medal CPU 204a adds the number of payouts to the number of game medals to update the number of game medals (S5-9), and changes the number of payouts to the number of payout medals. Set (S5-10). Thus, the number of game medals is appropriately updated. When the payout number is set to the number of payout medals (S5-10), or if the replay is activated (YES in S5-7), the medal CPU 204a performs game information setting processing for setting game information. (S5-11), the payout number setting process is terminated.

In the game start process (S12) shown in FIG. 26, the medal CPU 204a determines whether or not the IN signal confirmation buffer is 0h (S12-1). As a result, if the IN signal confirmation buffer is not 0h (NO in S12-1), it means that the reception of the start lever pressing command is not the first time, so the medal CPU 204a terminates the game start process. On the other hand, if the IN signal confirmation buffer is 0h (YES in S12-1), it means that the start lever pressing command has been received for the first time. -2), invalidates the start lever pressing command after the second time, performs game information setting processing for setting game information (S12-3), sets 0h in the payout confirmation buffer (S12-4), and performs the game End start processing. Here, by setting 0h in the payout confirmation buffer, invalidation of the payout end command received in the payout number setting process (S5) is cancelled. In the above description, step S12-4 is executed when a YES determination is made in step S12-1, but it may be executed before step S12-1.

Here, when the medal CPU 204a continuously receives payout end commands of the same type from the main CPU 200a, the payout end commands received after the second time are invalidated. Specifically, if the payout confirmation buffer is 0h in step S5-3 of FIG. 25, the medal CPU 204a determines that the payout end command has been received for the first time, switches the payout confirmation buffer to FFh, and determines the number of payouts in step S5. -6 and subsequent processes are executed normally. After that, even if the next payout end command is received, it is determined in step S5-3 that the payout confirmation buffer is not 0h (it is FFh). There is no (dispensing end command is invalidated).

Further, when the medal CPU 204a receives the start lever pressing command from the main CPU 200a under the condition that the payout end command thus received is invalidated, the invalidation of the payout end command is canceled. Specifically, if the payout confirmation buffer is 0h in step S5-3 of FIG. 25, the medal CPU 204a switches the payout confirmation buffer to FFh, and invalidates the payout end command received thereafter. However, when the start lever depression command is received after that, the payout confirmation buffer is reset to 0h in step S12-4 of FIG. Therefore, when the payout end command is received next, it is determined that the payout confirmation buffer is 0h in step S5-3 of FIG. Processing will be executed normally.

Further, when the medal CPU 204a continuously receives start lever pressing commands of the same type from the main CPU 200a, the medal CPU 204a invalidates the start lever pressing commands received from the second time onward. Specifically, if the IN signal confirmation buffer is 0h in step S12-1 of FIG. 26, the medal CPU 204a determines that the start lever pressing command has been received for the first time, switches the IN signal confirmation buffer to FFh, and switches the IN signal confirmation buffer to FFh. Execute the game information setting process of -3 normally. After that, even if the next start lever pressing command is received, it is determined in step S12-1 that the IN signal confirmation buffer is not 0h (it is FFh), so game information setting processing is performed in step S12-3. There is nothing (start lever press command is invalidated).

Further, when the medal CPU 204a receives a payout end command from the main CPU 200a after that, under the condition that the received start lever pressing command is invalidated, the invalidation of the start lever pressing command is canceled. Specifically, if the IN signal confirmation buffer is 0h in step S12-1 of FIG. 26, the medal CPU 204a switches the IN signal confirmation buffer to FFh, and invalidates the start lever pressing command received thereafter. However, when the payout end command is received, the IN signal confirmation buffer is reset to 0h in step S5-2 of FIG. Therefore, when the start lever pressing command is received next, it is determined that the IN signal confirmation buffer is 0h in step S12-1 of FIG. The information setting process is normally executed.

In this way, when a command is received a plurality of times in succession, the second and subsequent received commands of the same type are invalidated. The game is properly progressed without executing it twice. In addition, even if an illegal board is attached between the main control board 200 and the medal count control board 204 and a command is illegally transmitted multiple times by this illegal board, the command is invalidated. Profits are not unfairly obtained.

Here, when the payout end command is received continuously a plurality of times, the payout confirmation buffer is switched to invalidate the reception after the second time, and the start lever pressing command is received continuously a plurality of times. In this case, the IN signal confirmation buffer is switched to invalidate the second and subsequent receptions. Since the payout end command and the start lever pressing command are processed exclusively, one buffer is sufficient. However, if two values in one buffer are assigned to allow the payout end command and allow the start lever press command, respectively, one buffer will allow either the payout end command or the start lever press command, and the other. If a backup error occurs in the medal CPU 204a or a setting change occurs in the main control board 200 when the state is not permitted, the other command that should be permitted is not permitted, and the game may not progress. be. Therefore, here, buffers (dispensing confirmation buffer, IN signal confirmation buffer) are respectively provided for the payout end command and the start lever pressing command, and when predetermined initialization conditions such as backup abnormality or setting change are satisfied, any buffer By setting 0h to both, the transition is made to a state in which any command is permitted. With such a configuration, even if a backup abnormality occurs in the medal CPU 204a or a setting change occurs in the main control board 200, the game can be properly progressed.

This embodiment can also be implemented with one buffer by separately providing a state in which one buffer, for example, a command confirmation buffer, allows both the payout end command and the start lever pressing command. For example, a state in which both the payout end command and the start lever pressing command are allowed is 0h, a state in which only the payout end command is allowed and the start lever pressing command is not allowed is 1h, only the start lever pressing command is allowed and the payout end command is allowed. sets the disallowed state to 2h. Then, when the payout end command is received, the medal CPU 204a switches the command confirmation buffer to 2h in order to invalidate the second and subsequent receptions when the payout end command is received continuously a plurality of times, and also shifts the start lever. When the push command is received, the command confirmation buffer is switched to 1h in order to invalidate the second and subsequent receptions when the start lever push command is received continuously a plurality of times. Then, when a predetermined initialization condition such as a backup error or a setting change is satisfied, the command confirmation buffer is set to 0h, thereby transitioning to a state in which any command is permitted.

Although commands have been described here as an example of information transmitted and received between the main CPU 200a and the medal CPU 204a, the information is not limited to such cases, and can include various contents such as data and signals.

(Illegal command monitoring)
Some commands out of multiple types of commands (game medal insertion command, start lever depression command, payout end command, 1 game end command, startup command, state transition command) sent from the main CPU 200a to the medal CPU 204a are , the order of transmission (the order in which the medal CPU 204a should receive them) is determined.

For example, a game medal insertion command, a start lever depression command, a payout end command, and a one game end command are sequentially transmitted according to the player's operation in one game. Specifically, at the start of one game, when the bet switch 116 is operated by the player, the main CPU 200a transmits a game medal insertion command to the medal CPU 204a. Next, when the player operates the start switch 118, the main CPU 200a transmits a start lever depression command to the medal CPU 204a. Subsequently, the reels 110a, 110b, 110c whose rotation is controlled are stopped in response to the operation of the stop switches 120a, 120b, 120c by the player. Send. Then, when the role ratio-related data is updated, the main CPU 200a transmits a 1-game end command to the medal CPU 204a. Thus, one game is completed.

However, a bet can be placed when the electronic medals held in the medal holding section are inserted through the operation of the bet switch 116, or when the electronic medals are automatically inserted based on the fact that the replay combination is displayed on the active line. There is When electronic medals are automatically inserted based on the replay combination being displayed on the activated line, the main CPU 200a does not transmit the game medal insertion command to the medal CPU 204a. Then, among the game medal insertion command, the start lever depression command, the payout end command, and the one game end command, the game medal insertion command is not necessarily transmitted from the main CPU 200a during one game. Therefore, the commands for which the transmission order of the main CPU 200a is fixed are three commands: the start lever pressing command, the payout end command, and the one game end command. The payout end command is transmitted even when the payout number is 0.

Here, three commands, ie, a start lever pressing command, a payout end command, and a one-game end command are targeted as command fraud monitoring, and it is determined whether or not the command reception order is a predetermined reception order. Specifically, when the medal CPU 204a receives any one of the three commands (a plurality of restricted commands), it determines whether the received command is a command that should be received originally, and determines whether the received command is different from the command that should be received originally. If so, increment the error counter by one. In this way, the medal CPU 204a counts the error counter when there is a possibility of illegality, and when it reaches a predetermined value (for example, 10), it is regarded as a communication error, and the device such as the speaker 128 notifies the communication error. . However, since a communication error is likely to occur in the initialization process for a predetermined period after the power is turned on, updating of the error counter is prohibited to avoid unintended error notification.

Here, an example has been described in which the error counter is incremented by 1 when the command reception order is different from the original reception order. However, the target for incrementing the error counter is not limited to this case. For example, if the order of command reception is different from the original order of reception, if the number of insertions is not consistent, or if the number of payouts is not consistent, the reels 110 rotate without betting being executed. If a command indicating that the game is being played is received, if a game medal insertion command is received after receiving a start lever pressing command, if a start lever pressing command is received again after receiving a start lever pressing command, the checksum in the command is If it is abnormal, the error counter is incremented by one. Here, as for the number of insertions, the total number of insertions included in the transmission information related to the role ratio of the one-game end command is used, and the total number of insertions received in the previous game is retained, and the total number of insertions of this time is used as the previous total number of insertions. If the result of adding the inserted number is equal to the current total inserted number, it is determined that there is consistency, and if it is different, it is determined that there is no consistency. Similarly, for the number of payouts, the total number of payouts included in the transmission information related to the role ratio of the 1-game end command is used, and the total number of payouts received in the previous game is retained, If the result of adding the number of payouts is equal to the total number of payouts for this time, it is determined that there is consistency, and if it is different, it is determined that there is no consistency. Further, when the game medal insertion command is received after receiving the start lever pressing command, and when the start lever pressing command is received again after receiving the start lever pressing command, when the start lever pressing command is received, for example, a flag is set. Information to that effect is held by standing or the like, and when a payout end command is received, the information to the effect that a start lever depression command has been received is cleared. If the order of command reception is different from the original order of reception, if the number of inputs is not consistent, or if the number of payouts is not consistent, the reels 110 are spinning in a state in which no bets have been placed. When a command indicating that the error counter is received, when a game medal insertion command is received after receiving a start lever pressing command, or when a start lever pressing command is received again after receiving a start lever pressing command, the error counter is incremented. , the received command is validated, and the processing corresponding to that command is performed. On the other hand, if the checksum in the command is abnormal, the error counter is incremented and the received command is invalidated and discarded. In addition, when the error counter reaches a predetermined value and a communication error occurs, and the communication error is reported, the power must be turned on again to clear the error counter in order to cancel the communication error. The error counter may be incremented when the number of inserted coins is out of a predetermined range (eg, 1 to 3) and when the number of payouts is out of a predetermined range (eg, 0 to 15). Also, here, when the game medal insertion command is received after receiving the start lever pressing command, and when the start lever pressing command is received again after receiving the start lever pressing command, the error counter is incremented. However, not limited to this case, if a game medal insertion command is received after receiving the start lever depression command, the medal CPU 204a does not perform processing for the game medal insertion command, and after receiving the start lever depression command, the start lever When the pressing command is received again, the medal CPU 204a may not perform processing for the received start lever pressing command again.

27 to 29 are flowcharts showing the flow of command monitoring processing. The command monitoring process is executed when the medal CPU 204a receives any command from the main CPU 200a. 27 shows the case where the start lever pressing command is received, FIG. 28 shows the case where the payout end command is received, and FIG. 29 shows the case where the 1 game end command is received. Here, processing related to this embodiment will be described, and processing not related to this embodiment will be omitted. The numerical values of step S in such figures are used only in the description of each figure.

As shown in FIG. 27, when receiving a command from the main CPU 200a, the medal CPU 204a determines whether or not the received command is a start lever pressing command (S1). As a result, if the received command is not a start lever depression command (NO in S1), the medal CPU 204a ends the command monitoring process for the start lever depression command, and if it is a start lever depression command (YES in S1), The medal CPU 204a determines whether or not the identifier held in the next command (variable) is the identifier indicating the start lever pressing command (S2). Here, the next command is a variable (memory area) for holding the identifier of the command to be received next with respect to the three commands of the start lever pressing command, the payout end command, and the one game end command. As a result, if the identifier held in the next command is not an identifier indicating a start lever pressing command, i.e., an identifier indicating a payout end command, or an identifier indicating a one game end command (NO in S2), medals The CPU 204a determines that the command reception order is different from the original reception order, and increments the error counter by 1 (S3). If the identifier held in the next command is an identifier indicating the start lever pressing command (YES in S2), the medal CPU 204a does not increment the error counter. Then, the medal CPU 204a sets, in the next command, an identifier indicating a payout end command as a command to be received next to the start lever pressing command (S4). Here, the payout end command is set as the command to be received next to the start lever depression command regardless of whether or not the received start lever depression command should be received.

Thus, here, when the start lever depression command is received, it is determined whether or not the identifier held in the next command is the identifier indicating the start lever depression command. Also, the identifier indicating the start lever pressing command is set in the next command when the one-game end command is received, as will be described later. In other words, when the medal CPU 204a receives the start lever pressing command, the command received last time among the three limited commands of the start lever pressing command, the payout end command, and the 1 game end command is the 1 game end command. It is determined whether or not there is.

As shown in FIG. 28, upon receiving a command from the main CPU 200a, the medal CPU 204a determines whether or not the received command is a payout end command (S1). As a result, if the received command is not a payout end command (NO in S1), the medal CPU 204a ends the command monitoring process for the payout end command, and if it is a payout end command (YES in S1), the medal CPU 204a , determines whether or not the identifier held in the next command is an identifier indicating the payout end command (S2). As a result, if the identifier held in the next command is not an identifier indicating a payout end command, that is, an identifier indicating a 1-game end command, or an identifier indicating a start lever pressing command (NO in S2), medals The CPU 204a determines that the command reception order is different from the original reception order, and increments the error counter by 1 (S3). If the identifier held in the next command is an identifier indicating a payout end command (YES in S2), the medal CPU 204a does not increment the error counter. Then, the medal CPU 204a sets an identifier indicating a one-game end command as a command to be received next to the payout end command in the next command (S4). Here, regardless of whether or not the received payout end command should be received originally, the one-game end command is set as the command to be received next to the payout end command.

As shown in FIG. 29, when receiving a command from the main CPU 200a, the medal CPU 204a determines whether or not the received command is a one-game end command (S1). As a result, if the received command is not a 1-game end command (NO in S1), the medal CPU 204a ends the command monitoring process for the 1-game end command, and if it is a 1-game end command (YES in S1), The medal CPU 204a determines whether or not the identifier held in the next command is an identifier indicating a one-game end command (S2). As a result, if the identifier held in the next command is not an identifier indicating a 1 game end command, that is, an identifier indicating a start lever pressing command or an identifier indicating a payout end command (NO in S2), medals The CPU 204a determines that the command reception order is different from the original reception order, and increments the error counter by 1 (S3). If the identifier held in the next command is an identifier indicating the one game end command (YES in S2), the medal CPU 204a does not increment the error counter. Then, the medal CPU 204a sets an identifier indicating a start lever pressing command as a command to be received next to the one game end command in the next command (S4). Here, regardless of whether or not the received one-game end command is a command to be originally received, the start lever depression command is set as the command to be received next to the one-game end command.

Thus, here, when the medal CPU 204a receives a predetermined command among the start lever pressing command, the payout end command, and the one game end command, the identifier held in the next command indicates the received command. It is determined whether or not it is equal to the identifier. In other words, when the medal CPU 204a receives a predetermined command out of the start lever pressing command, the payout end command, and the 1 game end command, the commands received last time are the 1 game end command and the start lever pressing command, respectively. , it is determined whether or not it is a payout end command.

As described above, when electronic medals are automatically inserted based on the replay combination being displayed on the active line at the start of one game, the main CPU 200a does not transmit the game medal insertion command to the medal CPU 204a. Then, the command reception order is "payout end command"→"1 game end command"→"start lever depression command", and the command reception order is observed. However, when the player operates the bet switch 116 at the start of one game, the medal CPU 204a receives the "game medal insertion command" between the "one game end command" and the "start lever depression command". , and there is a risk of judging that the command reception order is different.

Here, as described with reference to FIGS. 27 to 29, the targets for monitoring the order of reception are limited to three commands: the start lever pressing command, the payout end command, and the one-game end command. For example, when the player operates the bet switch 116 at the start of one game, the medal CPU 204a receives commands in the order of "1 game end command" → "game medal insertion command" → "start lever press command". do. In this case, the medal CPU 204a receives the 1-game end command, and sets an identifier indicating the start lever pressing command as a command to be received next to the 1-game end command in the next command, as shown in FIG. Next, the medal CPU 204a receives the game medal insertion command, but since the received game medal insertion command is not the three commands of the start lever pressing command, the payout end command, and the one game end command, it determines and updates the next command. not performed. Subsequently, upon receiving the start lever depression command, the medal CPU 204a determines whether or not the identifier held in the next command is an identifier indicating the start lever depression command, as shown in FIG. Since the next command holds an identifier indicating the start lever pressing command, the error counter is not updated. Therefore, even if the medal CPU 204a receives the "game medal insertion command" between the "1 game end command" and the "start lever depression command", no problem occurs.

Further, as described above, the main CPU 200a transmits the game medal insertion command, the start lever depression command, the payout end command, the one game end command, and the startup command to the medal CPU 204a in the main loop. A transition command is transmitted to the medal CPU 204a. Then, the medal CPU 204a will receive the command at the time of state transition at the timing of the timer interrupt between the three start lever pressing commands, the payout end command, and the one game end command. You may judge.

Even in such a case, the command monitoring process only targets the three commands of the start lever depression command, the payout end command, and the one-game end command. Even if the state transition command is received during this period, the main CPU 200a does not execute the command monitoring process itself. In this way, the medal CPU 204a determines only the order in which the three commands are received, excluding the commands other than the three commands of the start lever pressing command, the payout end command, and the one game end command. . Therefore, even if the medal CPU 204a receives the state transition command at the timing of the timer interruption during the start lever depression command, the payout end command, and the one game end command, the error counter is not updated.

With this command monitoring process, even if a command is falsified by an illegal act such as inserting an illegal board between the main control board 200 and the medal number control board 204, it is possible to appropriately identify it as an error. Become.

Here, when the medal CPU 204a receives the start lever pressing command, the payout end command, and the one game end command as the second commands, the identifier held in the next command is the start lever pressing command. , a payout end command, or a payout end command, or an identifier indicating a one-game end command, that is, whether the previously received command is a one-game end command, a start lever pressing command, or a payout end command as the first command, respectively. An example of determining whether or not has been described. However, the commands to be determined are not limited to this case, and at least two commands having a predetermined reception order are sufficient. is received. At this time, when the second command is received, the medal CPU 204a may determine that the received command among the commands limited to a plurality of commands is the first command.

In addition to the command monitoring process described above, the medal CPU 204a manages timeouts in order to confirm whether command transmission from the main CPU 200a to the medal CPU 204a is being performed stably. Specifically, the main CPU 200a transmits a transmission confirmation command at timer interrupt timing (for example, 1.49 msec cycle). The transmission confirmation command is a command composed of a 1-byte fixed value "AAh" in which 1 and 0 are alternately arranged in units of bits, for example, without an identifier or checksum. The medal CPU 204a periodically receives such a transmission confirmation command to confirm that the command transmission is being performed stably, and during a predetermined time-out (for example, 100 msec), the transmission confirmation command to be originally received is confirmed. is not received, information in the medal RAM 204c used when receiving each command such as a game medal insertion command, a start lever depression command, a payout end command, a 1 game end command, etc., is cleared. Here, since the frequency of transmission and reception of the transmission confirmation command is high, only the information in the medal RAM 204c is cleared in consideration of the influence of noise and the like. If not, the error counter may be incremented by one.

However, depending on the command, the completion of transmission of one command may take longer than the timer interrupt cycle (for example, 1.49 msec). For example, it takes 4 msec or more to complete the transmission of one game end command or start-up command. In this case, there is a possibility that the 1-game end command or the startup command may collide with the transmission confirmation command.

Here, as will be described later, the main CPU 200a temporarily holds each command in the transmission FIFO 380 for serial transmission. Data is transmitted from the transmission FIFO 380 only at transmittable timings (for example, at intervals of 80 μsec), but the main CPU 200a can set each command in the transmission FIFO 380 at once. Further, the main CPU 200a prohibits timer interruption while setting the 1-game end command and the startup command in the transmission FIFO 380. FIG. With such a configuration, the timing at which the main CPU 200a sets the one-game end command and the start-time command in the transmission FIFO 380 and the timing at which the transmission confirmation command is set in the transmission FIFO 380 do not overlap. Therefore, the 1-game end command, the startup command, and the transmission confirmation command do not collide with each other.

However, if the transmission confirmation command is set after the 1-game end command or the start-up command is set, the transmission FIFO 380 outputs the transmission confirmation command after the 1-game end command or the start-up command. Then, depending on the setting timing of the transmission FIFO 380, the transmission confirmation command overlaps in the transmission FIFO 380 after the one-game end command and the activation command, and two or more transmission confirmation commands are output in succession. In this case, the medal CPU 204a continuously receives the transmission confirmation commands. However, even in such a case, the reception interval of the transmission confirmation command is equal to the timer interrupt period on average, so the error counter is not updated.

Due to timeout management by such a transmission confirmation command, an unauthorized board is inserted between the main control board 200 and the medal number control board 204, or an unauthorized command is input by some means, or the command is altered by an illegal act. Even in such a case, it is possible to appropriately identify it as an error.

Here, the medal CPU 204a manages the timeout by means of the transmission confirmation command. Timeouts may be managed (mutually managed) by commands.

Further, means for confirming whether command transmission from the main CPU 200a to the medal CPU 204a is stably performed is not limited to time-out management by the transmission confirmation command. When one of the main CPU 200a and the medal CPU 204a prohibits the transmission of commands by turning off the command permission signal, the other transmits the command. , for example, pointers and the like may be cleared. In addition, if one of the main CPU 200a and medal CPU 204a is inhibiting command transmission by turning off the command permission signal, and the other transmits a command, the error counter is updated in the same manner as the transmission confirmation command. good too.

Also, here, in the smart pachislot 100, an example of transmitting a command from the main CPU 200a as the first control section to the medal CPU 204a as the second control section has been described. However, not limited to this case, for example, when sending and receiving commands between other boards in the smart pachislot 100, it can be applied to serial communication between various independent CPUs as the first control unit and the second control unit. be able to.

Further, here, when the electronic medals are automatically inserted based on the fact that the replay combination is displayed on the activated line, the main CPU 200a does not transmit the game medal insertion command to the medal CPU 204a. As commands whose transmission order is fixed, three commands, ie, the start lever pressing command, the payout end command, and the one game end command have been described. However, not only in this case, even if the electronic medals are automatically inserted based on the replay combination being displayed on the activated line, the main CPU 200a transmits the game medal insertion command to the medal CPU 204a. good. Then, the commands for which the transmission order of the main CPU 200a is fixed are four commands: game medal insertion command, start lever depression command, payout end command, and one game end command. In this case, when the main CPU 200a receives one of the four commands of the game medal insertion command, the start lever depression command, the payout end command, and the one game end command, the main CPU 200a determines whether or not the received command should be received. However, if the command is different from the command that should be received, the error counter is incremented by one.

Furthermore, here, on the premise that the payout end command is transmitted even when the number of payouts is 0, as commands whose transmission order of the main CPU 200a is fixed, the start lever press command, the payout end command, the 1 game end command 3 commands are mentioned and explained. However, the main CPU 200a may not transmit the payout end command to the medal CPU 204a when the payout number is 0, not limited to this case. Then, the commands for which the transmission order of the main CPU 200a is fixed are two commands, the start lever pressing command and the one-game end command. In this case, when the main CPU 200a receives one of the two commands, the start lever pressing command and the one-game end command, it determines whether the received command is a command that should have been received, and determines whether the received command is different from the command that should have been received. If so, the error counter will be incremented by one. The main CPU 200a does not transmit a payout end command to the medal CPU 204a when the number of payouts is 0, and when electronic medals are automatically inserted based on the replay combination being displayed on the activated line. , a game medal insertion command can also be transmitted to the medal CPU 204a. Then, the commands for which the transmission order of the main CPU 200a is fixed are three commands, namely, the game medal insertion command, the start lever depression command, and the one game end command. In this case, when the main CPU 200a receives any one of the three commands of the game medal insertion command, the start lever depression command, and the one game end command, it determines whether or not the received command should be received originally. If it is different from the command to be issued, the error counter will be incremented by one.

(Connection confirmation by VL connection signal)
As described above, when confirming the connection between the smart pachi-slot 100 and the dedicated unit 350, if the VL connection signal is ON, the smart pachi-slot 100 progresses the game and accepts the counting process while the game is possible. On the other hand, if the VL connection signal is OFF, the smart pachislot 100 executes a game stop process, bets electronic medals, operates the checkout switch 121, and processes for progressing the game based on the operation of the start switch 118. , restricts (prohibits) all of the counting processes described above. This is because if the VL connection signal is OFF, it can be determined that the smart pachislot 100 is not properly connected to the dedicated unit 350, or that the dedicated unit 350 is powered off.

However, even if the VL connection signal is ON, that is, even if the smart pachislot 100 and the dedicated unit 350 are properly connected, and even if it can be recognized that the power of the dedicated unit 350 is ON, the counting Sometimes it is better not to do anything. For example, when the VL connection signal is ON, the communication between the main control board 200 and the medal number control board 204 is not established, or once established, the communication connection is disconnected after that. . In this case as well, since the counting process cannot be executed normally, even if the smart pachislot 100 accepts the operation of the counting switch 112 and transmits the information to the dedicated unit 350, there is a possibility that the number of medals to be counted will be lost. Therefore, in the modification of the present embodiment, not only the VL connection signal, but also the established state of communication between the main control board 200 and the medal number control board 204 is determined, and it is determined whether or not to execute the game stop processing, and the communication is performed. is not established, a game stop process is performed to limit the progress of the game. In addition, here, when the communication between the main control board 200 and the medal count control board 204 is not established while the VL connection signal is ON, or once established, the communication connection is disconnected after that. In any case, the game stop processing has been described, but this is not the only case, and communication between the main control board 200 and the medal number control board 204 is not performed while the VL connection signal is ON. If the connection is not established, the game stop processing is performed. However, if the communication connection is once established but the communication connection is disconnected after that, betting of electronic medals and operation of the settlement switch 121 are included in the game stop processing. , the processing for progressing the game based on the operation of the start switch 118 may be limited, and the count processing may be maintained in a possible state.

FIG. 30 is a flow chart showing communication specifications at power-on. Numerical values of step S in this figure are used only in the explanation of this figure. For example, when the smart pachislot 100 is powered on, the main CPU 200a of the main control board 200 transmits and receives a predetermined command (startup command, reply command) to and from the medal CPU 204a of the medal number control board 204, and confirms the established state of communication. to decide.

First, the main CPU 200a sets its own register (S1), confirms the backup at the time of the previous power failure (S2), and shifts to a signal waiting state. In this waiting state, the main CPU 200a confirms that the power failure warning signal indicating that power failure will occur after a predetermined time is OFF, and that the command permission signal received from the medal number control board 204 is ON ( S3), if the power interruption warning signal is ON or the command permission signal is OFF (NO in S3), the waiting state is maintained.

In parallel with this, the medal CPU 204a sets its own register (S4), confirms the backup at the time of the previous power failure (S5), executes initial setting processing at startup (S6), Move to command wait state. In the startup command waiting state, the medal CPU 204a confirms whether or not the startup command is received (S7), and if received (YES in S7), confirms whether the startup command is normal (S8) and starts If the hour command has not been received (NO in S7), or if the startup command is abnormal (NO in S8), the standby state for the startup command is maintained. The start-up command and reply command are composed of a serial signal of a start bit, 1-byte (8-bit) information indicating the type of command, a stop bit, and a parity bit. Therefore, the medal CPU 204a determines that the startup command is normal when the command type indicates the startup command and the parity bit is normal.

If the power interruption warning signal is OFF and the command permission signal is ON (YES in S3), the main CPU 200a transmits a startup command to the medal CPU 204a (S9). Then, the main CPU 200a sets a communication timer (S10), and shifts to a waiting state for a reply command. In such a reply command waiting state, the main CPU 200a checks whether a reply command has been received (S11), and if received (YES in S11), checks whether the reply command is normal (S12), and receives the reply command. If not (NO in S11), or if the reply command is abnormal (NO in S12), the waiting state for the reply command is maintained. If the command type indicates a reply command and the parity bit is normal, the main CPU 200a determines that the reply command is normal.

When the main CPU 200a transmits the startup command (S9), the medal CPU 204a receives the startup command (YES in S7). When the medal CPU 204a determines that the activation command is normal (YES in S8), the medal CPU 204a shifts to a signal waiting state. In this waiting state, the medal CPU 204a confirms that the command permission signal received from the main control board 200 is ON (S13), and if the command permission signal is OFF (NO in S13), the waiting state is maintained. . On the other hand, if the command permission signal is ON (YES in S13), the medal CPU 204a transmits a reply command to the main CPU 200a (S14), starts communication with the dedicated unit 350, and shifts to a countable state.

When the medal CPU 204a transmits the reply command (S14), the main CPU 200a receives the reply command (YES in S11). When the main CPU 200a determines that the reply command is normal (YES in S12), the main CPU 200a shifts to setting change processing or power failure recovery processing. Here, an example has been described in which the main CPU 200a receives a reply command and shifts to the setting change process or the power failure recovery process when it determines that the reply command is normal. However, the main CPU 200a is not limited to such a case, and after transmitting the startup command (S9), the main CPU 200a shifts to the setting change process or the power failure recovery process without waiting for the reply command. is completed, the reception status of the reply command is checked, and if the reply command has not been received, or if the reply command has been received but is not normal, an error state may be entered.

In the state of waiting for the reply command, the communication timer set in step S10 is timed, and when a predetermined time elapses, it times out, shifts to an error state, and displays the content on the game medal number display device 114. Together, the communication processing is terminated. Such communication processing is set so as not to return unless the power is turned on again. Through such a timeout, the main CPU 200a judges that the communication between the main CPU 200a and the medal CPU 204a has not been established, or has been established but the communication connection has been disconnected, and performs game stop processing. , to limit the progress of the game.

FIG. 31 is a flowchart showing communication specifications during operation. Numerical values of step S in this figure are used only in the explanation of this figure. For example, when the bet switch 116, the settlement switch 121, the start switch 118, etc. are operated, the main CPU 200a of the main control board 200 and the medal CPU 204a of the medal number control board 204 send commands (start lever pressing command, reply command). Transmit and receive, and determine the communication establishment status.

For example, when the start switch 118 is operated, the main CPU 200a shifts to a signal waiting state. In this waiting state, the main CPU 200a confirms that the power failure warning signal is OFF and the command permission signal is ON (S1), and confirms that the power failure warning signal is ON or the command permission signal is ON. If it is OFF (NO in S1), the waiting state is maintained.

On the other hand, if the power interruption warning signal is OFF and the command permission signal is ON (YES in S1), the main CPU 200a transmits a start lever pressing command to the medal CPU 204a (S2), and sets a communication timer. (S3).

When the main CPU 200a transmits the start lever pressing command (S2), the medal CPU 204a determines whether the received start lever pressing command is normal (S4). do not. On the other hand, if the received start lever pressing command is normal (YES in S4), the medal CPU 204a shifts to a waiting state until the command permission signal received from the main control board 200 turns ON. In this waiting state, the medal CPU 204a confirms that the command permission signal is ON (S5), and if the command permission signal is OFF (NO in S5), the waiting state is maintained. On the other hand, if the command permission signal is ON (YES in S5), the medal CPU 204a transmits a reply command to the main CPU 200a (S6), and terminates the processing for this operation.

When the reply command is received, the main CPU 200a confirms whether the reply command is normal (S7), and if normal (YES in S7), confirms whether progress of the game is permitted (S8), is abnormal (NO in S7), and if the progress of the game is not permitted (NO in S8), the waiting state for the reply command is maintained. Here, if the reply command is normal (YES at S7) and the progress of the game is permitted (YES at S8), the main CPU 200a progresses the game.

It should be noted that, in the same manner as the communication specification at the time of power-on, in the state of waiting for a reply command, the communication timer set in step S3 is timed, and when a predetermined time elapses, the bet switch 116, the settlement switch 121, and the start switch 118 are timed out. and other operation information are discarded (invalidated). By disabling the operation in this manner, the game is set not to progress.

FIG. 32 is a flow chart showing communication specifications at the end of the game. Numerical values of step S in this figure are used only in the explanation of this figure. For example, when all the reels 110 are stopped and winning determination is completed, the main CPU 200a of the main control board 200 transmits and receives commands (payout end command, reply command) to and from the medal CPU 204a of the medal number control board 204, and establishes communication. determine the state.

When all the reels 110 are stopped and the winning determination is completed, the main CPU 200a shifts to a signal waiting state. In this waiting state, the main CPU 200a confirms that the power failure warning signal is OFF and the command permission signal is ON (S1), and confirms that the power failure warning signal is ON or the command permission signal is ON. If it is OFF (NO in S1), the waiting state is maintained.

On the other hand, if the power interruption warning signal is OFF and the command permission signal is ON (YES in S1), the main CPU 200a transmits a payout end command to the medal CPU 204a (S2), and sets a communication timer ( S3).

When the main CPU 200a transmits a payout end command (S2), the medal CPU 204a determines whether the received payout end command is normal (S4), and if not normal (NO in S4), does not execute the game end processing. . On the other hand, if the received payout end command is normal (YES in S4), the medal CPU 204a shifts to a waiting state until the command permission signal received from the main control board 200 turns ON. In this waiting state, the medal CPU 204a confirms that the command permission signal is ON (S5), and if the command permission signal is OFF (NO in S5), the waiting state is maintained. On the other hand, if the command permission signal is ON (YES in S5), the medal CPU 204a transmits a reply command to the main CPU 200a (S6), and terminates the processing at the end of the game.

When the reply command is received, the main CPU 200a checks whether the reply command is normal (S7), and if the reply command is abnormal (NO in S7), maintains the waiting state for the reply command. Here, if the reply command is normal (YES in S7), update processing of the main RAM 200c is executed and the game proceeds.

As with the communication specification at power-on, while waiting for a reply command, the communication timer set in step S3 is timed, and after a predetermined period of time has elapsed, the main RAM 200c is not updated. It should be noted that even if a time-out does not occur here, as described with reference to FIG. However, the game does not progress.

Here, the state of establishment of communication between the main CPU 200a and the medal CPU 204a is also determined, and if the communication is not established, game stop processing is executed. It becomes possible to perform the counting process appropriately.

(Bet processing)
As described above, by operating the bet switch 116, the player can select any number of electronic medals (the number of game medals) held in the medal holding unit managed by the medal CPU 204a as the main player. A bet can be made through a bet switch 116 managed by the CPU 200a. Further, the player can settle the bet electronic medals by operating the settlement switch 121 and return them to the medal holder.

At this time, the requested number of inserted medals is transmitted from the main CPU 200a to the medal CPU 204a through a game medal insertion command or a start lever depression command. The requested number of inserted medals indicates the total number of electronic medals that the player wishes to bet in one game. For example, when the player operates the bet switch 116, the requested number of coins to be inserted becomes a prescribed number required for one game, for example, three. Also, when the player operates the 1-bet switch, the number of coins requested to be inserted is increased by one each time the operation is performed, up to the specified number as the upper limit. For example, every time the player operates the 1-bet switch, the requested number of insertions changes from "0"→"1"→"2"→"3". The requested number of sheets "3" is maintained. Each time the bet switch 116 or the 1-bet switch is operated, the main CPU 200a transmits a game medal insertion command including the requested insertion number to the medal CPU 204a regardless of whether the requested insertion number has changed.

Then, the number of insertable coins and the number of game medals are transmitted from the medal CPU 204a to the main CPU 200a through a reply command. The number of insertable medals indicates the total number of electronic medals that can be bet from the medal holder in one game. Further, the number of game medals indicated by the reply command is the number of remaining game medals (the number of game medals after updating) when the number of insertable coins is betted (after betting). The main CPU 200a bets the number of electronic medals that can be inserted received from the medal CPU 204a, and updates the number of game medals.

Here, an example has been described in which the main CPU 200a waits for the number of insertable medals and the number of game medals to be received from the medal CPU 204a through a reply command, and then bets as many electronic tokens as the insertable number. However, the main CPU 200a may execute a bet on electronic medals in advance in response to the operation of the bet switch 116 or the 1-bet switch, and a specification may be adopted in which consistency is obtained by a return command from the medal CPU 204a. . For example, the main CPU 200a holds in the main RAM 200c information on the number of inserted medals (the number of inserted medals), which is the total number of electronic medals that have already been betted in the main CPU 200a, the number of requested inserted medals, and the number of game medals. Therefore, it is possible to grasp the number of bets that can be inserted. Therefore, the main CPU 200a bets the number of electronic medals that can be inserted in response to the operation of the bet switch 116 or the 1-bet switch, and transmits a game medal insertion command including the requested number of inserted medals to the medal CPU 204a. In response to this, the medal CPU 204a transmits to the main CPU 200a a reply command indicating the number of insertable coins and the number of game medals. Then, the main CPU 200a confirms that the received number of insertable medals and the number of bet electronic medals are the same (if they are different, the game medal insertion command is resent as will be described later). , an error), and the betting process is terminated. By adopting such a configuration, the main CPU 200a immediately places a bet on electronic medals in response to the operation of the bet switch 116 or the 1-bet switch. It is possible to avoid the delay in the progress of the game.

In this way, the main CPU 200a transmits to the medal CPU 204a the requested number of bets to be inserted, and the medal CPU 204a returns the number of insertable bettable bets. Therefore, basically, the number of sheets that can be inserted should be equal to the number of sheets that can be inserted.

However, since the number of operations of the bet switch 116 and the 1-bet switch is not limited, they can be operated a plurality of times before one game is started. Here, simply assuming that the number of insertable sheets = the number of insert requests, the number of insert requests is transmitted to the medal CPU 204a each time the bet switch 116 or the 1-bet switch is operated, and each time the number of insert requests is calculated from the number of game medals. In addition to the subtraction, electronic medals exceeding the specified number are betted. If the number of requested insertions is simply added to the number of game medals in the settlement process, the number of requested insertions is transmitted to the medal CPU 204a each time the settlement switch 121 is operated, and each time the number of requested insertions is added to the number of game medals. will be added. Furthermore, even if the number of game medals is less than the number of insertable medals, if the number of insertable medals is simply equal to the number of insertable medals, the number of game medals may become negative due to the bet.

Therefore, the medal CPU 204a appropriately manages the number of electronic medals. Specifically, here, not only the main CPU 200a but also the medal CPU 204a store the number of inserted medals as information in RAM, and control is performed so that the number of inserted medals is the same for both CPUs. Then, the medal CPU 204a derives the number of insertable medals based on the number of inserted medals. For example, assuming that electronic medals have already been bet, the medal CPU 204a subtracts the number of inserted medals from the number of inserted medals to derive the number of insertable medals. In addition, when the number of possible inserts derived in this way is larger than the number of game medals, the number of game medals becomes negative when the derived number of possible inserts is transmitted. is the number of sheets that can be inserted.

FIG. 33 is a flow chart showing the flow of bet processing in the medal CPU 204a. Here, processing related to the present embodiment will be described, and specific command generation processing, for example, that is not related to the present embodiment will be omitted. Numerical values of step S in this figure are used only in the explanation of this figure. Here, the medal CPU 204a holds not only the number of game medals but also the number of inserted medals in the RAM belonging to the medal CPU 204a.

If the command is normally received from the main CPU 200a and the command includes the requested number of insertion (game medal insertion command, start lever pressing command), the medal CPU 204a determines that the requested number of insertion is 0, as shown in FIG. It is determined whether or not the number is greater than or equal to 3 and less than or equal to 3 (S1). As a result, if the requested number of sheets to be inserted is less than 0 or 4 or more (NO in S1), error processing such as sending an error command indicating that the requested number of sheets to be inserted is out of the allowable range to the main CPU 200a is performed (S2). ) to end the betting process. Here, the permissible range of the requested number of sheets to be inserted is determined, but the process is not limited to this case, and the process proceeds to step S3 only when various permissible conditions such as the VL connection signal being ON are satisfied. If the allowable condition is not satisfied, error processing such as sending an error command to the main CPU 200a may be performed. In addition, in this embodiment, if the number of sheets requested to be inserted is 0, the settlement process is performed. In this case, if the requested number of sheets to be inserted is 0, error processing such as transmitting an error command to the main CPU 200a may be performed.

On the other hand, if the requested number of inserted medals is 0 or more and 3 or less (YES in S1), the medal CPU 204a subtracts the requested number of inserted medals from the number of inserted medals to increase or decrease the number of inserted medals (S3). Here, the number of inserted medals takes a value of 0 to 3, and the number of required inserted medals takes a value of 0 to 3, so the increase/decrease number of medals is any of -3 to 3. At this time, if the number of increase/decrease numbers is a negative value, it indicates betting of electronic medals from the medal CPU 204a to the main CPU 200a. indicates Therefore, for example, if the requested number of inserted medals is 0, the total number of inserted medals is subject to settlement.

Subsequently, the medal CPU 204a adds the increase/decrease number to the number of game medals, and sets the result as the addition result (S4). The result of such addition is the number of game medals after updating when the number of game medals is not restricted to become negative.

Next, the medal CPU 204a determines whether or not the addition result is a negative value (S5). As a result, if the addition result is a negative value (YES in S5), the medal CPU 204a adds the current number of game medals to the number of inserted medals to derive the number of insertable medals (S6). The fact that the addition result is negative means that even if all the current number of game medals is betted, the required number of medals to be inserted is not reached. Therefore, here, in order to bet as many electronic medals as possible, the number of insertable medals is obtained by adding the total number of current game medals to the number of inserted medals. Then, the medal CPU 204a sets the number of game medals after the update to the remaining number of bets, that is, 0 (S7).

On the other hand, if the addition result is not a negative value (NO in S5), the medal CPU 204a sets the requested insertion number as the insertable number as it is (S8), and sets the addition result as the updated number of game medals (S9). Here, since the number of game medals is sufficient for the required number of inserted medals, the number of insertable medals equals the number of requested inserted medals, and the addition result can be used as the updated number of game medals.

Subsequently, the medal CPU 204a updates the number of inserted medals managed by the medal CPU 204a to the number of insertable medals (S10), and sets the updated number of insertable medals and the updated number of game medals in the reply command (S11). ) to end the betting process. Thus, the reply command is transmitted to the main CPU 200a.

The main CPU 200a acquires the number of coins that can be inserted through the reply command, and can start one game. However, in a specification where the starting condition for one game is the maximum prescribed number of bets, the main CPU 200a holds information on the number of inserted medals and the number of game medals in the main RAM 200c, so that all game medals are betted. However, it is possible to grasp whether or not the number of coins that can be inserted is less than the maximum specified number, and if the maximum specified number is not reached, the start of one game may be restricted. For example, when the main CPU 200a recognizes that the number of possible inserts is less than the maximum specified number, the medal CPU 204a does not transmit a command including the required number of inserts to the medal CPU 204a, or even if the command is transmitted, the medal CPU 204a replaces the reply command. (so-called "optimal max bet" control). In this way, it is possible to prevent the game from progressing while the number of electronic medals less than the maximum prescribed number is betted. For example, 2 and 3 cards are allowed as the specified number, and even if one game can be played with any number of cards inserted, if the number of cards that can be inserted is less than the maximum specified number of 3 cards (for example, , when only two cards are inserted), the progress of the game can be restricted. Therefore, when the number of game medals is 0, a specification is possible in which the main CPU 200a does not transmit a command including the requested number of inserted medals to the medal CPU 204a.

FIG. 34 is an explanatory diagram showing an example of actual calculation of bet processing. For example, as shown in FIG. 34(a), when the number of game medals held in the RAM of the medal CPU 204a is "10" and the number of inserted medals is "0", the main CPU 200a issues an insertion request. Assume that a command including the number of sheets is received and the requested number of sheets to be inserted is "3". The medal CPU 204a subtracts the requested number of input medals "3" from the number of inserted medals "0", derives the number of increase/decrease "-3", adds the number of increase/decrease "-3" to the number of game medals "10", and obtains the addition result. Derive "7". Since the addition result "7" is not a negative value, the number of insertable medals is "3", which is equal to the number of insertion requests, and the updated number of game medals is "7", which is equal to the addition result. The number of sheets that can be inserted is "3". The number of insertable medals "3" and the updated number of game medals "7" are set in the reply command, and the updated number of inserted medals "3" is held in the RAM of the medal CPU 204a.

Further, as shown in FIG. 34(b), when the number of game medals held in the RAM of the medal CPU 204a is "1" and the number of inserted medals is "1", the main CPU 200a issues an insertion request. Assume that a command including the number of sheets is received and the requested number of sheets to be inserted is "3". The medal CPU 204a subtracts the requested number of input medals "3" from the number of inserted medals "1", derives the number of increase/decrease "-2", adds the number of increase/decrease "-2" to the number of game medals "1", and obtains the addition result. Derive "-1". Since the addition result "-1" is a negative value, the number of insertable medals is "2" by adding the current number of game medals "1" to the number of inserted medals "1", and the number of game medals after updating is "0". , and the number of medals to be inserted becomes "2", which is equal to the number of medals that can be inserted. The number of insertable medals "2" and the updated number of game medals "0" are set in the reply command, and the updated number of inserted medals "2" is held in the RAM of the medal CPU 204a.

Further, as shown in FIG. 34(c), when the number of game medals held in the RAM of the medal CPU 204a is "3" and the number of inserted medals is "3", the main CPU 200a issues an insertion request. Assume that a command including the number of sheets is received and the requested number of sheets to be inserted is "0". Such an event can occur when the settlement switch 121 is operated. The medal CPU 204a subtracts the requested number of input medals "0" from the number of inserted medals "3", derives the number of increase/decrease "3", adds the number of increase/decrease "3" to the number of game medals "3", and adds the result "6". ” is derived. Since the addition result "6" is not a negative value, the number of insertable medals is "0", which is equal to the number of insertion requests, and the updated number of game medals is "6", which is equal to the addition result. The number of insertable sheets becomes "0". The number of inserted medals "0" and the updated number of game medals "6" are set in the reply command, and the updated number of inserted medals "0" is held in the RAM of the medal CPU 204a.

Further, as shown in FIG. 34(d), when the number of game medals held in the RAM of the medal CPU 204a is "2" and the number of inserted medals is "3", the main CPU 200a issues an insertion request. Assume that a command including the number of sheets is received and the requested number of sheets to be inserted is "3". Such an event may occur, for example, when the bet switch 116 is operated multiple times. In addition, when the main CPU 200a transmits a command including the requested number of inserted medals to the medal CPU 204a and the medal CPU 204a normally receives the command, but for some reason the main CPU 200a cannot normally receive the reply command from the medal CPU 204a, This may also occur when the main CPU 200a resends a command including the requested number of inserted medals to the medal CPU 204a. The medal CPU 204a subtracts the requested number of input medals "3" from the number of inserted medals "3", derives the number of increase/decrease "0", adds the number of increase/decrease "0" to the number of game medals "2", and obtains the addition result "2". ” is derived. Since the addition result "2" is not a negative value, the number of insertable medals is "3", which is equal to the number of insertion requests, and the updated number of game medals is "2", which is equal to the addition result. The number of sheets that can be inserted is "3". The number of inserted medals "3" and the updated number of game medals "2" are set in the reply command, and the updated number of inserted medals "3" is held in the RAM of the medal CPU 204a.

Further, as shown in FIG. 34(e), when the number of game medals held in the RAM of the medal CPU 204a is "3" and the number of inserted medals is "0", the main CPU 200a issues an insertion request. Assume that a command including the number of sheets is received and the requested number of sheets to be inserted is "0". Such an event may occur, for example, when the settlement switch 121 is operated multiple times. In addition, when the main CPU 200a transmits a command including the requested number of inserted medals to the medal CPU 204a and the medal CPU 204a normally receives the command, but for some reason the main CPU 200a cannot normally receive the reply command from the medal CPU 204a, This may also occur when the main CPU 200a resends a command including the requested number of inserted medals to the medal CPU 204a. The medal CPU 204a subtracts the requested number of input medals "0" from the number of inserted medals "0", derives the increase/decrease number "0", adds the increase/decrease number "0" to the number of game medals "3", and adds the result "3". ” is derived. Since the addition result "3" is not a negative value, the number of insertable medals is "0", which is equal to the number of insertion requests, and the updated number of game medals is "3", which is equal to the addition result. The number of insertable sheets becomes "0". The number of insertable medals "0" and the updated number of game medals "3" are set in the reply command, and the updated number of inserted medals "0" is held in the RAM of the medal CPU 204a.

In this way, both the main CPU 200a and the medal CPU 204a retain the number of inserted medals as information in their respective RAMs, and control is performed so that the number of inserted medals is equal between both CPUs. , the number of inserted medals managed only by the main CPU 200a can be grasped. Therefore, based on the number of game medals managed by the medal CPU 204a, the number of inserted medals, and the requested number of inserted medals obtained from the main CPU 200a, the number of inserted medals - the number of requested inserted medals, the number of game medals + the number of increased/decreased medals, etc. Through calculation, it is possible to appropriately derive the number of insertable medals, the updated number of game medals, and the updated number of inserted medals.

In this way, for example, even if the bet switch 116 or the 1-bet switch is operated multiple times, the medal CPU 204a appropriately derives the required number of inserted medals based on the number of inserted medals, and determines the number of gaming medals by the required number of electronic medals. is subtracted from Therefore, in the betting process, the number of electronic medals exceeding the prescribed number is not betted, and in the settlement process, the electronic medals are not added to the number of game medals unnecessarily. Further, when the number of game medals is less than the number of insertable game medals, the medal CPU 204a bets up to the number of game medals held in the medal holding unit, so that the number of game medals does not become negative by betting.

When a setting change occurs in the main control board 200, both the number of inserted medals and the number of game medals held in the RAM of the main CPU 200a and the RAM of the medal CPU 204a are cleared to zero. Specifically, when a setting change occurs, the main CPU 200a clears the number of inserted medals and the number of game medals held in its own RAM to zero. Then, the main CPU 200a transmits a command indicating that the setting change has been executed to the dedicated unit 350 via the medal CPU 204a. At this time, the medal CPU 204a clears the number of inserted medals to 0 upon receiving a command to the effect that such setting change has been executed. In addition, since the number of game medals held in the medal holding unit is not cleared at a trigger other than when the "game medal number clear button" is operated, the medal CPU 204a sets the current number of game medals as the main number in the reply command to the startup command. The main CPU 200a updates the number of game medals held in its own RAM according to the received number of game medals. By doing so, it is possible to ensure the sameness of the number of inserted medals and the number of game medals between the main CPU 200a and the medal CPU 204a. Also, when a backup abnormality occurs in the medal CPU 204a, the RAM belonging to the medal CPU 204a is cleared to zero. Even in this case, the main CPU 200a can ensure the identity of the inserted medals by transmitting the number of inserted medals held in the main RAM 200c of the main CPU 200a to the medal CPU 204a through the startup command.

Instead of or in addition to the above configuration, the medal CPU 204a sends various calculated values such as the number of inserted medals, the number of game medals, the number of required insertions, the number of possible insertions, etc. You can send it.

(Setting change/setting confirmation)
As described above, in this embodiment, the setting is changed by the setting value setting means. When trying to change the settings, first, the smart pachislot 100 is powered off. Then, when a predetermined operation key is inserted into the setting door key (not shown) and turned from the OFF position to the ON position, the power is turned on through the power switch (not shown) to enter the setting change mode. , the setting change is possible, and the setting change status is turned ON. Here, the setting changing status is ON while the setting is being changed, and is OFF otherwise. If the main RAM 200c is abnormal at the start of the setting change mode, all variables in the main RAM 200c are cleared, and if the main RAM 200c is normal, only the setting change area of the main RAM 200c is cleared. When the main CPU 200a transmits the setting changing status to the dedicated unit 350, the medal CPU 204a can acquire the setting changing status. never. Each time the setting change switch is pressed while the setting is changeable, the setting value is incremented by 1, and the numerical value is from 1 to 6, such as 1→2→3→4→5→6→1→... are repeated in ascending order. Here, when the set value is updated to one of the six set values and the start switch 118 is operated, the set value is determined. Then, by returning the setting door key to the original position (OFF position), the setting change mode is terminated and the game becomes possible. It should be noted that the setting changing status is turned OFF at the end of one game after the setting change mode ends.

Further, in the setting change mode, the main CPU 200a generates a setting changing signal to transmit the setting changing status to the dedicated unit 350. FIG. The setting-changing signal indicates ON/OFF of the setting-changing status, and is set to bit 0 in the gaming machine fraud 1 of hall controller/fraud monitoring information (game machine information) in the gaming machine information notification shown in FIG. , and is notified to the dedicated unit 350 at intervals of 300 msec, as shown in FIG.

Here, in the case where two CPUs (main CPU 200a and medal CPU 204a) are installed independently as shown in FIGS. . Then, the main CPU 200a detects that the setting changing status is ON when the power is turned on through the power switch in a state in which a predetermined operation key is inserted into the setting door key and turned from the OFF position to the ON position. , the signal during setting change is turned ON, and the gaming machine information notification is transmitted to the dedicated unit 350 through the medal CPU 204a. On the other hand, after returning the setting door key to the original position (OFF position), the main CPU 200a turns off the setting changing signal to indicate that the setting changing status has turned off after one game is completed. Then, the gaming machine information notification is transmitted to the dedicated unit 350 through the medal CPU 204a. In other words, the setting changing signal must remain ON until the end of one game. If such processing is to be implemented by the main CPU 200a, not only the processing of setting the setting change signal, but also the processing of turning off the setting change signal upon completion of one game is required. In particular, the control area may be stressed. Therefore, here, the processing of setting the setting changing signal and the processing of turning off the setting changing signal after one game is finished are realized by the medal CPU 204a instead of the main CPU 200a.

FIG. 35 is a flow chart showing the updating process of the setting changing signal. Numerical values of step S in this figure are used only in the explanation of this figure. When the power switch is turned on with the predetermined operation key turned on, the main CPU 200a executes setting change processing for changing the setting value (S1). When the initialization process including the setting change is completed, the main CPU 200a executes the betting process of betting electronic medals in response to the operation of the bet switch 116 by the player (S2). Subsequently, the main CPU 200a executes lottery processing according to the operation of the start switch 118 by the player (S3). Then, the main CPU 200a starts rotating the reels 110a, 110b, and 110c to execute reel rotation processing (S4). Subsequently, according to the operation of the stop switches 120a, 120b, 120c by the player, reel stop processing is executed to stop and control the reels 110a, 110b, 110c corresponding to the operated stop switches 120a, 120b, 120c (S5). ). When the reels 110a, 110b, and 110c are stopped, the main CPU 200a executes determination processing to determine whether or not the symbol combination displayed on the activated line A corresponds to any winning combination (S6). Based on the result, when the symbol combination corresponding to the minor combination is displayed on the activated line A, the medal payout process corresponding to the minor combination is executed (S7). Thus, one game is executed through a series of processes from step S2 to step S7. Thereafter, steps S2 to S7 are repeated.

Further, when starting the setting change process (S1), the main CPU 200a transmits to the medal CPU 204a a state transition command (first command) indicating that the setting change has started. When the medal CPU 204a receives the state transition command, the medal CPU 204a sets 1 to the bit 0 in the gaming machine fraud 1 of the hall control/fraud monitoring information shown in FIG. 10, thereby turning on the setting changing signal (S11). . Further, in the payout process (S7), the main CPU 200a transmits a payout end command (second command) to the medal CPU 204a when the payout of medals is completed. When the payout end command is received, the medal CPU 204a sets the bit 0 in the game machine fraud 1 of the hole controller/fraud monitoring information to 0, thereby turning off the setting changing signal (S12). In this way, at the start of changing the set value, the setting change signal is turned ON and transmitted to the dedicated unit 350, and after completing the change of the set value, the setting change signal is turned OFF at the end of one game to turn the dedicated unit 350 ON. The functional unit that transmits to the unit 350 may be referred to as a setting change signal update unit. The first command is not limited to the state transition command, and may be any command as long as it is specified at the start of changing the setting value. Any command can be used as long as it is specified each time a game is completed.

In this way, by realizing the process of setting the setting changing signal in the medal CPU 204a instead of the main CPU 200a, it is possible to suppress an increase in the number of programs in the main ROM 200b. Therefore, the use area, especially the control area, is not pressed. Since the ROM of the medal CPU 204a has a margin of memory capacity (2.5 Kbytes), there is no problem even if the program is realized by the medal CPU 204a.

Here, the main CPU 200a transmits a payout end command to the medal CPU 204a in the payout process (S7) for each game, and the medal CPU 204a turns off the setting change signal in response to the payout end command (S12). ). In such a configuration, the medal CPU 204a repeatedly turns off the setting changing signal. However, the signal during setting change remains OFF, and the signal during setting change which is once turned OFF is appropriately notified to the dedicated unit 350 at a cycle of 300 msec. Therefore, there is no problem that the medal CPU 204a repeatedly turns off the setting changing signal. Here, when the payout end command is transmitted to the medal CPU 204a, the main CPU 200a does not need to determine the condition that the game is the first game after the setting change process is finished. A program for judging the conditions becomes unnecessary, and an increase in the number of programs in the main ROM 200b can be further suppressed.

Here, an example in which the main CPU 200a transmits a command to the medal CPU 204a in the payout process (S7) has been described. A command may be transmitted in (S6).

Moreover, in the smart pachi-slot machine 100, in addition to changing the setting, it is possible to confirm the set value by confirming the setting. When trying to confirm the setting, first, a predetermined operation key is inserted into the setting door key and turned from the OFF position to the ON position. Then, the setting confirmation mode is entered, the setting value can be confirmed, and the setting confirming status is turned ON. Here, the setting confirmation status is ON while the setting confirmation is being executed, and is OFF otherwise. Note that the operation of the bet switch 116, the settlement switch 121, and the start switch 118 may be disabled during the setting confirmation status. Then, the set value is displayed and the status timer starts to count. Here, the status timer is a timer that measures the time for maintaining the setting checking status. Then, by returning the operation key to the original position (OFF position), the setting confirmation mode is ended and the game becomes possible. The setting confirmation status is turned OFF when the setting door key is OFF and the status timer has elapsed for 5 seconds or more.

Further, in the setting confirmation mode, the main CPU 200a generates a setting confirming signal to transmit the setting confirming status to the dedicated unit 350. FIG. The setting confirmation signal indicates ON/OFF of the setting confirmation status, and as shown in FIG. and is notified to the dedicated unit 350 at intervals of 300 msec, as shown in FIG.

Here, when two CPUs (main CPU 200a and medal CPU 204a) are installed independently as shown in FIGS. A program for executing not only the process of setting the confirming signal but also the process of counting 5 seconds by the status timer is required, and there is a risk that the available area, especially the control area, will be squeezed. Therefore, similarly to the setting change mode, the process of setting the setting confirmation signal and the process of measuring 5 seconds by the status timer are realized by the medal CPU 204a instead of the main CPU 200a.

FIG. 36 is a flow chart showing update processing of the setting confirmation signal. Numerical values of step S in this figure are used only in the explanation of this figure. While one game is being executed through the series of processes shown in FIG. 36, the payout process (S1) of the previous game ends, and in the waiting state for betting electronic medals, a predetermined operation key is turned on. The main CPU 200a starts a setting confirmation process for confirming the setting value (S2). When the setting confirmation is completed, the predetermined operation key is turned off, and the main CPU 200a terminates the setting confirmation process (S3). In this way, the main CPU 200a can perform bet processing (S4).

Further, when the setting confirmation process is started (S2), the main CPU 200a transmits a state transition time command (third command) to the medal CPU 204a in response to the start of setting confirmation. When the medal CPU 204a receives the state transition command, the medal CPU 204a turns on the setting confirmation signal by setting the bit 1 in the gaming machine fraud 1 of the hall controller/fraud monitoring information shown in FIG. 10 to 1 (S11). . Further, the main CPU 200a transmits a state transition command (fourth command) to the medal CPU 204a at the end of the setting confirmation process (S3). When the medal CPU 204a receives the state transition command, the medal CPU 204a sets the status timer to 5 seconds and starts clocking (S12). Then, the medal CPU 204a determines whether or not the status timer has passed 5 seconds (S13), waits until 5 seconds have passed (NO in S13), and when 5 seconds have passed (YES in S13), hall control/fraud monitoring. By setting the bit 1 in the game machine illegality information 1 to 0, the setting confirmation signal is turned off (S14). In this manner, the setting confirmation signal is turned ON at the start of confirmation of the setting value and transmitted to the dedicated unit 350, and after the confirmation of the setting value is completed, the setting confirmation signal is turned OFF after a predetermined time elapses. A function unit that transmits to the dedicated unit 350 may be referred to as a setting confirmation signal update unit. Note that the third command is not limited to the above, and may be any command as long as it is specified at the start of confirmation of the setting value. It can be any command, as long as it is specified as such at the completion of the verification.

In this way, the medal CPU 204a instead of the main CPU 200a implements the process of setting the setting confirmation signal and the process of measuring 5 seconds with the status timer, thereby suppressing an increase in the number of programs in the main ROM 200b. The area, especially the control area, is not compressed.

As described above, the setting-confirming signal indicates that the setting-confirming mode is maintained, and must be output for at least three seconds as a countermeasure against goto. However, the gaming machine information notification including the setting confirmation signal is transmitted to the dedicated unit 350 only at a cycle of 300 msec. Then, for example, when the medal CPU 204a receives the state transition command immediately after the gaming machine information notification is transmitted, there is a possibility that the time from ON to OFF of the setting confirmation signal may be reduced by about 300 msec. Here, by setting the standby time of the status timer to 5 seconds, the time from ON to OFF of the setting confirmation signal can be set to 3 seconds or more regardless of the transmission timing of the gaming machine information notification. In addition, since the timing of 5 seconds is not started when the command indicating the start of setting confirmation is received, but when the command indicating the end of setting confirmation is received, the time is set to 5 seconds. Since the time until the command indicating the end of setting confirmation is added, the time from ON to OFF of the setting confirmation signal can be reliably set to 3 seconds or longer.

(Prize for replay role)
Further, here, the processing load of the main CPU 200a and the memory capacity of the main ROM 200b are reduced by generating the setting change signal and the setting confirmation signal in the medal CPU 204a instead of the main CPU 200a. However, it is not limited to such a case, and various information from the main CPU 200a to the medal CPU 204a may be kept to a minimum, and information requiring notification to the dedicated unit 350 may be generated by the medal CPU 204a. Such a configuration can also reduce the load on the main CPU 200a. For example, the smart pachislot machine 100 must transmit hall control/fraud monitoring information and game information in the game machine information notification shown in FIG. 10 to the dedicated unit 350 every 300 msec. When the start switch 118 is operated or when the game ends, the number of inserted medals and the number of paid-out medals must be transmitted. Here, for example, if the game result is a win in a replay combination, the main CPU 200a transmits only the replay flag and the information that the number of payouts is "0" to the medal CPU 204a, and the medal CPU 204a transmits each information necessary for the dedicated unit 350. For example, when the start switch 118 is operated, the specified number of medals to be inserted (the specified number of bets in the game) is generated as the number of inserted medals, and when the game ends, the specified number of medals to be paid out is generated. to notify. With such a configuration, the processing load of the main CPU 200a and the memory capacity of the main ROM 200b can be reduced.

In addition, at this time, the replay flag that the main CPU 200a transmits to the medal CPU 204a is assigned to a predetermined bit "replay state" (1 bit) of the identification information instead of a 1-byte command, so that the replay state is 1. It is no longer necessary to prepare byte commands, and it is possible to consolidate commands and reduce the processing load.

(data transmission control)
When two CPUs (main CPU 200a and medal CPU 204a) are installed independently as shown in FIGS. 4(a) and 4(b), serial communication is executed between the main CPU 200a and medal CPU 204a. For example, the main CPU 200a transmits a predetermined command to the medal CPU 204a through serial communication. Then, the medal CPU 204a transmits the gaming machine information notification as shown in FIGS. 7 to 15 to the dedicated unit 350. FIG.

FIG. 37 is an explanatory diagram showing a comparative example of communication processing between the main CPU 200a and the medal CPU 204a. Here, an example of transmitting a 5-byte (fixed length) command including a checksum from the main CPU 200a to the medal CPU 204a will be described.

As shown in FIG. 37, the main control board 200 is provided with a transmission FIFO 380 for serial transmission. The transmission FIFO 380 has a memory capacity of 64 bytes, holds the 1-byte data that was input first, and has a buffer function that outputs the 1-byte data first at a transmittable timing (for example, at intervals of 80 μsec). have Also, the main RAM 200c corresponding to the main CPU 200a is provided with a transmission candidate buffer 382 that holds 4-byte commands (data).

In the main CPU 200a, when a command (four bytes excluding the checksum) to be transmitted to the medal CPU 204a is generated, first, it is determined whether or not the command is already held in the transmission candidate buffer 382 or not. Here, if the command is held, the main CPU 200a waits for the transmission candidate buffer 382 to become empty. If no command is held, the main CPU 200a causes the transmission candidate buffer 382 to hold a 4-byte command indicated by cross hatching, as shown in FIG. 37(a). Subsequently, the main CPU 200a determines whether or not the transmission FIFO 380 has 10 bytes of free space in response to the command being held in the transmission candidate buffer 382 . Here, the 10-byte free space means that the data held in the 64-byte buffer of the transmission FIFO 380 is 54 (64-10) or less, and at least 10 bytes of data can be held. The reason why the 10-byte free space is determined here is that there are cases where two 5-byte commands including a checksum are sent in succession. Here, if the transmission FIFO 380 does not have 10 bytes of free space, the main CPU 200a waits until the transmission FIFO 380 becomes free of 10 bytes. Then, if the transmission FIFO 380 has 10 bytes of free space, the main CPU 200a causes the transmission FIFO 380 to hold the command as shown in FIG. 37(b).

Further, as shown in FIG. 37(c), the main CPU 200a calculates the checksum of the 4-byte command held in the transmission candidate buffer 382 when holding the command in the transmission FIFO 380, and converts it into a 4-byte command. In addition, transmit FIFO 380 also holds checksums shown in solid black. A 5-byte command is thus set in the transmission FIFO 380 . Then, as shown in FIG. 37(d), the transmission FIFO 380 transmits a 5-byte command to the medal CPU 204a at intervals of 80 μsec.

FIG. 37 illustrates a comparative example in which the command has a fixed length, but the command may have a variable length. For example, the main CPU 200a transmits a variable length command of 3 bytes to 80 bytes to the medal CPU 204a. In this way, if the command is of variable length, the following problems arise. For example, a 3-byte command can be held in the 4-byte transmission candidate buffer 382 and the 64-byte transmission FIFO 380 at once, but an 80-byte command cannot be held in either of them at once. Therefore, the commands to be transmitted are divided into a plurality of units, and the commands are transmitted in units of a small number of bytes (for example, 1 byte). Also, here, the configuration of the transmission candidate buffer 382 is deleted and the checksum generation process is changed.

FIG. 38 is a flowchart showing the concept of 1-byte transmission of a command and a diagram showing commands. Numerical values of step S in this figure are used only in the explanation of this figure.

As shown in FIG. 38(a), the main CPU 200a first acquires information of the transmission FIFO 380 (S1). Specifically, the value of the AF register is saved in the stack area by the command "PUSH AF" on the first line in FIG. is set as the upper 1 byte of the address, the address "@S0ST__" is set as the lower 1 byte, and the value of the multiplication result register indicated by that address is read into the A register. Thus, the information of the transmission FIFO 380 is obtained from "@S0ST__". Subsequently, as shown in FIG. 38(a), the main CPU 200a determines whether or not there is an empty space of 1 byte or more in the transmission FIFO 380 (S2). NO), the process of step S1 is repeated. Specifically, if bit 6 of the A register is 0 according to the command "JBIT Z, 6, A, MCD_SND01" on the fourth line in FIG. For example, the processing from the index "MCD_SND01" on the second line is repeated, and if bit 6 is not 0, the next command on the fifth line is executed.

Subsequently, as shown in FIG. 38A, if the transmission FIFO 380 has an empty space of 1 byte or more (YES in S2), the main CPU 200a transmits 1 byte of data to the transmission FIFO 380 (S3). Specifically, the data saved in the stack area by the command "POP AF" on the fifth line in FIG. 38(b) is restored to the AF register. By the command "OUT (@S0DT__), A" on the 6th line, the value of the U register is set to the upper 1 byte of the address, the address "@S0DT__" is set to the lower 1 byte, and returned to the transmission FIFO 380 indicated by that address. Output the value of the A register. Subsequently, as shown in FIG. 38(a), the checksum for one byte is updated (S4). Specifically, the command "ADD A, E" on the 7th line in FIG. A" returns the addition result (the value of the A register) to the E register, and the command "RET" on the ninth line returns to the routine one level above.

FIG. 39 is an explanatory diagram showing communication processing between the main CPU 200a and the medal CPU 204a. Here, an example of transmitting an 80-byte command among variable-length commands from the main CPU 200a to the medal CPU 204a will be described.

As shown in FIG. 39, the main CPU 200a is provided with a transmission FIFO 380 for serial transmission. The transmission FIFO 380 has a memory capacity of 64 bytes, similar to FIG. It has an output buffer function. The main RAM 200c belonging to (corresponding to) the main CPU 200a is provided with a checksum buffer 384 that holds a 1-byte checksum.

In the main CPU 200a, when a command (76 bytes excluding the checksum) to be transmitted to the medal CPU 204a is generated, the checksum buffer 384 is cleared (set to 0), and it is determined whether or not the transmission FIFO 380 has a 1-byte space. . Here, if the transmission FIFO 380 does not have a 1-byte vacancy, the main CPU 200a waits for the transmission FIFO 380 to become 1-byte vacant. Then, if the transmission FIFO 380 has 1-byte vacancy, the main CPU 200a causes the transmission FIFO 380 to hold 1-byte data located at the beginning of the command, as shown in FIG. 39(a).

Further, when causing the transmission FIFO 380 to hold 1-byte data, the main CPU 200a calculates the checksum of the data of the checksum buffer 384 and the 1-byte data, and the checksum (calculated result) to the checksum buffer 384 . Thus, the checksum is updated each time one byte of data is sent.

Then, as shown in FIG. 39(b), the main CPU 200a causes the transmission FIFO 380 to hold commands of 1 byte each if there is a 1-byte space in the transmission FIFO 380, and the transmission FIFO 380 transmits commands of 1 byte at a time at intervals of 80 μsec. It is transmitted to the medal CPU 204a. In this way, the main CPU 200a causes the transmission FIFO 380 to sequentially hold commands divided by 1 byte if the transmission FIFO 380 has a space of 1 byte or more. However, since the number of bytes of the command to be transmitted is larger than the capacity of the transmission FIFO 380 as described above, the transmission FIFO 380 may have no free space as shown in FIG. 39(c). In this case, the main CPU 200a waits for the transmission FIFO 380 to become free for one byte.

After causing the transmission FIFO 380 to hold all the commands, the main CPU 200a causes the transmission FIFO 380 to hold the checksum held in the checksum buffer 384 as shown in FIG. 39(d). An 80-byte command is thus set in the transmission FIFO 380 . Then, the transmission FIFO 380 transmits an 80-byte command to the medal CPU 204a at intervals of 80 μsec.

In this manner, commands are divided and stored in the transmission FIFO 380. Regardless of the length of the command, even if the length of the command is larger than the capacity of the transmission FIFO 380, the main CPU 200a allows the medal CPU 204a to: It is possible to send commands appropriately.

In addition, regardless of the number of bytes of the command, for example, even if the command is 3 bytes, the main CPU 200a uniformly classifies the command and stores it in the transmission FIFO 380, so that the program can be simplified. An increase in the number of programs in the main ROM 200b can be suppressed. Therefore, the use area, especially the control area, is not pressed. Also, unlike the configuration of FIG. 37, the number of transmission candidate buffers 382 is reduced, so the capacity of the main RAM 200c can also be secured.

Furthermore, here, the main CPU 200a uniformly updates the checksum each time it causes the transmission FIFO 380 to hold 1-byte data, so the checksum calculation is completed when the command transmission is completed. . Therefore, a separate program for calculating checksums of a plurality of data at once becomes unnecessary, and not only does the control area, especially the control area, of the used area become stressed, but also the processing time can be reduced.

Here, the main CPU 200a divides the command into 1-byte units and stores them in the transmission FIFO 380. However, the command is not limited to this case. It can be partitioned by a predetermined number of bytes less than the length. Here, if the division unit does not become a common divisor of the length of the command, the main CPU 200a repeatedly transmits the command with the division length, and transmits the remaining data in the final transmission. For example, if the command length is 80 bytes and the byte unit is 5 bytes, the main CPU 200a divides the command into 5-byte units and causes the transmission FIFO 380 to hold the command repeatedly (16 times).

Further, here, in the smart pachislot 100, an example of transmitting a command from the main CPU 200a (first control unit) to the medal CPU 204a (second control unit) has been described, but this is not the only case. Applicable to serial communication between various independent CPUs as a first control unit or second control unit, such as when sending commands to other boards in 100, or when sending commands from the main CPU in a smart pachislot to the CPU of the frame control board. can do.

Also, here, an example in which the transmission FIFO 380 has a capacity of 64 bytes has been described, but this is not the only case, and any capacity can be applied. This embodiment is particularly effective when the command is longer than the capacity of the transmission FIFO 380 . Also, here, a microprocessor LEM50A sold by LETech, which is based on a Z80 series CPU, is adopted, and the transmission FIFO 380 has a capacity of 64 bytes. Also, there is a mode in which the capacity of the transmission FIFO 380 is 64 bytes, and it is conceivable that this mode will be selected when, for example, the program of the LEM50A is diverted to the LC701A. Even in this case, it goes without saying that the effects of the present embodiment can be obtained.

In the above-described embodiment, the main control board 200 is provided with the transmission FIFO 380 for serial transmission, and the transmission FIFO 380 is used for communication processing from the main CPU 200a to the medal CPU 204a. In parallel with this, the medal number control board 204 is also provided with a transmission FIFO (not shown) for serial transmission, and the transmission FIFO is used for communication processing from the medal CPU 204a to the main CPU 200a. The transmission FIFO for serial transmission provided in the medal count control board 204 has a memory capacity of 16 bytes, holds the first input 1-byte data, and sets the transmittable timing (for example, 80 μsec intervals). has a buffer function to output the 1-byte data first.

As described above, when the medal CPU 204a receives a predetermined command (game medal insertion command, start lever depression command, payout end command, startup command) from the main CPU 200a, the medal CPU 204a indicates identification information, the number of insertable medals, and the number of game medals. For example, a 5-byte length reply command composed of transmission information and a checksum is sent to the main CPU 200a. If the frequency of transmission of such reply commands increases, there may arise cases where transmission data cannot be held in the transmission FIFO having a memory capacity of only 16 bytes.

Therefore, when the medal CPU 204a transmits the reply command, it transmits the command to the transmission FIFO at intervals of transmission. For example, the medal CPU 204a transmits the next reply command after 4 msec or more have passed (waiting for 4 msec) since the previous reply command was transmitted. At this time, the main CPU 200a executes the reception process at a cycle of 1.49 msec, refers to the FIFO trigger level, waits for completion of reception of all the bytes of the reply command (here, 5 bytes), and Execute the analysis process. With such a configuration, the transmission data is stored in the transmission FIFO for serial transmission provided in the medal number control board 204, making it possible to avoid a state in which the transmission data cannot be held.

In addition, in the reply command, by independently managing the information triggered by the lending process and the counting process in bit units, even if the lending process and the counting process are executed at the same time, the information is returned as 1. Since it can be described simultaneously and independently in the command, the frequency of transmission of reply commands can be reduced.

Also, as described above, here, it is assumed that the command transmitted from the main CPU 200a to the medal CPU 204a has a variable length. Then, the time from the start of command transmission to the completion of transmission will differ. Here, if a power failure occurs, the transmission of the command may not be completed due to the power failure processing. Some commands can be supplemented by other processing even if transmission is not completed, while others require completion of transmission. For example, the 1-game end command does not pose a problem because it is resent when power is restored (at startup) even if command transmission is not completed and the command is not transmitted. Therefore, power-off processing can be started immediately, for example, without waiting for the completion of command transmission. With such a configuration, transmission of unnecessary commands can be avoided, and an increase in interrupt disabled time can be suppressed.

On the other hand, in the payout end command, transmission information indicating the payout number is transmitted. The number of payouts should not be sent multiple times. This is because if the number of payouts is transmitted at the end of the game and then resent when the power is restored (at startup), the number of payouts will be increased (doubled) because the number of payouts will be increased (doubled). . In addition, since the number of payouts is highly important information directly related to the profit of the player, it is necessary to reliably transmit it to the medal CPU 204a. Therefore, among a plurality of commands that the main CPU 200a transmits to the medal CPU 204a, a command with a high degree of importance, such as a payout end command, can be reliably sent to the medal CPU 204a between the detection of the power interruption warning signal and the start of power interruption processing. Send commands to That is, the power-off process is started after command transmission is completed. Since command transmission must be completed in a short period of time before power-off processing is started, the number of bytes of commands with high importance is reduced (for example, 10 bytes). With such a configuration, the main CPU 200a can reliably transmit commands of high importance to the medal CPU 204a, and the game can proceed appropriately.

Also, as described above, here, it is assumed that the command transmitted from the main CPU 200a to the medal CPU 204a has a variable length. Then, the time from the start of transmission to the completion of transmission differs depending on the order of transmission of commands and their contents. For example, if a power interruption warning signal is generated immediately after a relatively long (for example, 60-byte) one-game end command is transmitted, there is a risk that the power will be cut off without completing the transmission of the command. Also, when the power is turned on, the main CPU 200a transmits a startup command longer than one game end command (for example, 80 bytes) to the medal CPU 204a, and resumes processing from the state before the power failure occurred. Here, when one game ends, the role ratio-related data is updated, and a one-game end command is transmitted after the startup command. Then, since there is a high possibility that the start-up command still remains in the transmission FIFO 380, the transmission of the one-game end command is further awaited. If the power interruption warning signal is generated immediately after the one-game end command is transmitted, the completion of the command transmission is further delayed, and there is a possibility that the power will be cut off before the completion of the command transmission.

However, as described above, even if the one-game end command is not transmitted to the medal CPU 204a, it will be resent when the power is restored (at startup), so no problem will occur. It should be noted that when power is restored (at startup), data is not held in the transmission FIFO 380, so the startup command is properly transmitted to the medal CPU 204a as long as there is no power interruption.

Therefore, when the command includes "transmission information related to the role ratio", such as the one-game end command, when the power interruption warning signal is detected, the power interruption process is started immediately without waiting for the completion of the transmission of the command. For example, in step S2 of FIG. 38(a), if the transmission FIFO 380 has a free space of 1 byte or more, the main CPU 200a sends the command "role ratio Related transmission information" is included and a power interruption warning signal is detected. Then, when the power interruption warning signal is detected, the main CPU 200a does not perform subsequent steps S3 and S4, that is, without transmitting 1-byte data (transmitting a 1-game end command including a checksum). cancel), terminate the process, and shift to the power-off process. With such a configuration, transmission of unnecessary commands can be avoided, and an increase in interrupt disabled time can be suppressed.

On the other hand, if the command does not include the "transmission information related to the role ratio", or if the power interruption warning signal is not detected, the main CPU 200a executes steps S3 and S4. With such a configuration, when the power interruption warning signal is detected during the transmission of the 1-game end command of low importance, it is possible to immediately cancel the transmission of the command and appropriately execute the power interruption process.

Also, hypothetically, if the power is turned on, the startup command is transmitted, the processing resumes from the state before the power failure occurred, the 1 game end command is transmitted immediately after that, and the power failure warning signal is detected immediately after that. Suppose that In this case, since no data is held in the transmission FIFO 380 when the power is turned on, the first half 64 bytes of the start-up command are immediately held in the transmission FIFO 380 . After that, when the 1-game end command is transmitted, the second half of the starting command still remains in the transmission FIFO 380 . Therefore, it takes a long time to complete the command transmission. However, due to the configuration for determining whether or not the power interruption warning signal is detected, when the transmission FIFO 380 becomes empty, the transmission of the one-game end command is canceled, so that the power interruption process can be executed appropriately. It becomes possible.

It should be noted that the "transmission information related to the role ratio" is included not only in the 1-game end command but also in the start-up command. Therefore, if the power failure warning signal is detected when sending the command at startup, the process is terminated without sending any subsequent data (by canceling the transmission of the command at startup including the checksum). , it will shift to power off processing.

However, the transmission of "communication information necessary at startup" among the commands at startup is not stopped, and power-off processing is not performed until the transmission is completed. This is for the following reasons. In other words, the "communication information required at startup" includes game machine information, chip ID, manufacturer code, etc., and it is necessary to divide the confirmation of the power failure warning signal into multiple locations, increasing the processing load and memory capacity. may lead to In addition, as described above, since no data is held in the transmission FIFO 380 at startup, the transmission FIFO 380 can hold up to "transmission information necessary at startup" in a short period of time. This is because it does not take a long time.

Here, with regard to the 1-game end command and the start-up command, if the command contains "transmission information related to the role ratio" and the power interruption warning signal is detected, the data after that is transmitted. In the explanation, an example of immediately shifting to power-off processing is given. For other commands (start lever pressing command, payout end command, state transition command), the processing of FIG. At the start, it is determined whether or not a power interruption warning signal is detected, and if detected, power interruption processing is performed immediately without performing all of steps S1 to S4, that is, without transmitting subsequent data. You may move to With such a configuration, all commands are appropriately transferred to power-off processing.

(Communication between main CPU and testing machine)
Smart pachislot 100 is also subjected to model tests by GLI Japan, a designated testing agency of the Public Safety Commission, and the Security Communication Association (Hotsukyo), similar to slot machines that use real tokens to play games. The Connection Specifications for Testing Machines for Spindle-Type Game Machines (7th edition) describes the specifications necessary to properly conduct tests using the testing machines used by designated testing institutions. The outline thereof will be described below.

FIG. 40 is an explanatory diagram for explaining the trial firing test of the smart pachislot 100. FIG. In the trial shooting test, as shown in FIG. 40, smart pachislot 100 and trial shooting tester 400 are connected via first interface board 402 and second interface board 404 for unifying each signal.

First, the test-firing tester 400 outputs a predetermined signal to the smart pachi-slot 100 via the connector CN3 of the first interface board 402 . The predetermined signal output here is, for example, a pseudo signal indicating that the bed switch 116, start switch 118, stop switch 120, etc. have been operated. Incidentally, since these switches are not actually operated, the sensor provided for each switch does not output a detection signal, but a pseudo signal is output assuming that the switch has been operated in a pseudo manner.

Further, in response to such signals, the main control board 200 outputs predetermined signals to the test-firing tester 400 via the connectors CN1 and CN2 of the first interface board 402 . The predetermined signal output here is a signal indicating the state of the performance lamp 126, the state of various sensors, the position of the stepping motor 152, and the like. Also, when the auxiliary effect by the AT effect state or the like is adopted, the main control board 200 outputs a predetermined signal to the test firing tester 400 via the connector CN4 of the second interface board 404. The predetermined signal to be output here is a signal or the like relating to a game method capable of obtaining the maximum payout rate. Here, such signals are mainly represented by discrete signals, ie, binary values of 1 (HIGH) or 0 (LOW).

Then, on the premise of the configuration as shown in FIG. 40, whether the operation status of the game control processing (winning type lottery, reel control, bet, etc.) for the input of the start switch 118, the stop switch 120, the bet switch 116, etc. is normal, In addition, it is tested whether various lamps are displayed normally. In addition, the bet switch 116, the start switch 118, the stop switch 120, various timings of the operation of the game control process, for example, after the start switch 118 is operated, the stop switch 120 is first activated, and the corresponding effect lamp Whether the signal changes after the conditions for turning the signal ON/OFF, such as the timing at which the lamp signal that manages the lighting and extinguishing state of 126 is turned ON, are satisfied, or whether the timing is included in an appropriate time range is tested.

In addition, as a test related to the ball payout performance (to check the upper and lower limits of the ball payout rate), for example, (1) short-time ball payout rate (ball payout rate in an arbitrary 400 game section must be less than 300% ), (2) medium-time ball payout rate (the ball payout rate must be less than 150% in an arbitrary 6000 game section), (3) long-time ball payout rate (ball payout rate in an arbitrary 17500 game section must be (be less than 120% and exceed 55%); (5) Consecutive role ratio (Out of the game medals paid out from the gaming machine, 60% or less of the paid out balls are obtained by operating the consecutive role (RB or BB). be), etc. In addition, as the test method, (A) simulation test (test to acquire the maximum number of sheets that can be acquired in each game), (B) test shooting test 1 (test to play in the same game method as the player plays ), (C) Trial test 2 (playing the game with the lowest ball output rate), and the like. Note that the role ratio and the continuous role ratio become effective when the number of games is 17500 games or more, which is the prescribed number of games. Therefore, when the number of games reaches or exceeds the specified number of games, the information on the role ratio and the continuous role ratio is expressed as, for example, 70 (46H) or 60 (3CH), and the number of games does not reach the specified number of games. FFH is used as an invalid value during the interval.

Here, as a comparative example, the case where the slot machine and the test-firing tester 400 are connected will be described, and then the case where the smart pachi-slot 100 and the test-firing tester 400 are connected will be described.

FIG. 41 is an explanatory diagram for explaining the operation of the slot machine. For example, when the slot machine and the test firing tester 400 are connected, when dummy signals for the bet switch 116, the start switch 118, and the stop switch 120 are sequentially input from the test firing tester 400 to the slot machine, the dummy signals are responded to. , the reel control means 306 of the slot machine stops and controls the reels 110a, 110b, and 110c. With such a pseudo signal, an auto game is executed in which the game is repeated in the slot machine. Here, it is assumed that a symbol combination corresponding to a small winning combination of 15 payouts is displayed on the effective line A in one auto game.

When all the reels 110a, 110b and 110c are stopped by the reel control means 306 at time a in FIG. , the payout control means 310 pays out the number of medals corresponding to the minor combination (here, 15) based on the fact that the symbol combination corresponding to the winning combination (here, minor combination) is displayed on the activated line A. put out. Here, medals are paid out one at a time at regular intervals according to the number of payouts for the minor combination. Then, when the payout of medals is completed, the payout control means 310 permits the start of the next game, that is, the betting by the bet switch 116 .

At this time, a payout count signal (first signal) consisting of 15 pulses with a duty of 50% is transmitted (output to the outside) from the slot machine to the test shooting tester 400 based on the payout of 15 medals. , 178.8 msec later, at time b indicating the end of the payout count signal, the input request lamp signal (second signal) turns ON (output to the outside). The test shooting tester 400 determines whether the number of medals paid out has been appropriately performed based on the payout count signal, and the turn-on of the input request lamp signal enables the next game (the next auto game can be started). what you can start with). Here, the first signal is not limited to the payout count signal. Also, the second signal is not limited to the insertion request lamp signal, and it is sufficient if it can transmit to the test-firing tester 400 that the output of the first signal has been completed, for example, the number of pulses corresponding to the number of electronic medals has been output.

By the way, the slot machine and the smart pachislot 100 are substantially the same in terms of game progress processing. Therefore, the signals sent to and received from the test-firing tester 400 are also substantially equal. However, the slot machine and smart pachislot 100 may operate differently. For example, since a slot machine actually pays out medals, it takes time to pay them out, but in the smart pachislot 100, the game progresses without medals, so the payout control means 310 does not pay out medals. Therefore, actual payout of medals by the payout control means 310 as shown in FIG. 41 does not occur. In the slot machine, the payout control means 310 restricts the start of the next game during the payout of medals and permits the start of the next game after the payout is completed. However, the smart pachislot 100 does not require the actual payout of medals, and the payout of electronic medals is completed instantaneously. Then, as long as all the reels 110a, 110b, 110c are stopped, the next game can be started immediately after that.

However, as described above, since the slot machine and the smart pachislot 100 have substantially the same game progress processing, the signals sent to and received from the test-firing tester 400 are substantially the same. In this case, smart pachi-slot 100 needs to output a payout count signal and an insertion request lamp signal even when medals are not actually paid out. Therefore, in the smart pachi-slot machine 100 as well, a payout count signal consisting of 15 pulses is transmitted to the trial shooting tester 400 based on the payout of 15 medals, and after 178.8 msec, an insertion request is made in response to the end of payout. It is conceivable to turn on the lamp signal and synchronize it with the input request lamp signal so that the smart pachislot 100 can start the next game.

However, in smart pachislot 100, the payout of electronic medals is completed immediately after all the reels 110a, 110b, and 110c are stopped. is completed, the next game is started. Then, the player may operate the bet switch 116 while the start of the next game is restricted, and the operation may not be accepted effectively, resulting in a situation where the operability cannot be improved. In addition, when the payout of the electronic medals is completed and the next game can be started, providing a waiting time for the payout count signal will unnecessarily delay the progress of the game.

Therefore, the progress of the game in the main body of the smart pachislot 100 and the signal transmission to the test firing tester 400 are operated independently to appropriately progress the game.

FIG. 42 is an explanatory diagram for explaining the operation of the smart pachislot 100. FIG. For example, when the smart pachi-slot 100 and the test firing tester 400 are connected, when the pseudo signals of the bet switch 116, the start switch 118, and the stop switch 120 are sequentially input from the test firing tester 400 to the smart pachislot 100, such pseudo signals In response, the reel control means 306 controls the reels 110a, 110b, and 110c to stop. With such a pseudo signal, an auto game is executed in which the game is repeated in the slot machine. Here, as in FIG. 41, it is assumed that a symbol combination corresponding to a small winning combination of 15 payouts is displayed on the activated line A.

When all the reels 110a, 110b, and 110c are stopped at time a by the reel control means 306, the determination means 308 determines whether or not the symbol combination corresponding to the winning combination is displayed on the activated line A, and payout control is performed. Means 310, based on the fact that the symbol combination corresponding to the winning combination (small combination here) is displayed on the activated line A, the number corresponding to the small combination (here, 15 medals) is given to the electronic medals at once. Pay out. In this way, when the payout of medals is completed instantaneously, the payout control means 310 permits the start of the next game. By doing so, the player can start the next game immediately after the payout of the electronic medals.

At this time, a payout count signal (first signal) consisting of 15 pulses is transmitted from the smart pachislot machine 100 to the test firing tester 400 based on the payout of 15 medals, independently of the payout of electronic medals. After 178.8 msec, the input request ramp signal (second signal) turns ON (output to the outside) at time b indicating the end of the payout count signal. The test shooting test machine 400 determines whether or not medals have been appropriately paid out based on the payout count signal, and also recognizes that the next game has been made possible by turning on the throw-in request lamp signal.

Here, the progress of the game of the smart pachislot 100 main body and the signal transmission to the test firing tester 400 are operated independently, and the next game can be started immediately after the payout of the electronic medals is completed, thereby increasing the number of electronic medals. Since the bet switch 116 can be accepted immediately after the payout is completed, the player can improve the operability without being limited to accepting the bet switch 116.例文帳に追加Further, since the next game can be started immediately after the payout of the electronic medals is finished, the game can be properly progressed.

(Second Embodiment: Smart Pachinko)
By the way, a smart pachinko machine is also being studied, in which a pachinko machine is of the enclosed circulation type so that the player can proceed with the game without touching the game balls. In smart pachinko, by applying a frame control board, a counting switch, and a game ball number display device having the same functions as the medal number control board 204, the counting switch 112, and the game medal number display device 114 in the smart pachislot machine 100, smart As in the pachislot 100, the smart pachinko and the dedicated unit enable the game to progress without distributing the game balls. The game ball number display device is a display device that displays the number of game balls, which is the total number of electronic game balls that can be used in a game. Incidentally, the number of game balls corresponds to an example of the number of game values, which is the total number of game values that can be provided for a game.

The main CPU (first control unit) of the smart pachinko sends a starting hole entry command indicating that a game ball has entered the starting hole, and selects one of a plurality of special symbols provided in advance. A lottery for determination is performed, a lottery result command indicating the result, a special symbol variation start command, a special symbol variation end command, a payout command to pay out prize balls in a big win game or a small win game according to the lottery result At least two commands among a plurality of commands, such as a game end command indicating that a big win game or a small win game has ended, are transmitted in a predetermined transmission order. Then, the smart pachinko frame CPU (second control unit) may update the error counter when the command reception order is different from the original reception order.

Further, here, in the smart pachislot 100, an example of transmitting a command from the main CPU 200a (first control unit) to the medal CPU 204a (second control unit) has been described, but this is not the only case. 100, or when sending a command from the main CPU in the management game machine to the CPU of the frame control board, etc., as the first control unit or the second control unit, for serial communication between various independent CPUs. can be applied.

In the smart pachislot 100, the counting switch 112 and the game medal count display device 114 are provided on the operating unit installation base 111, respectively. It may be provided on a plate (not shown), for example, near the cross key (effect switch).

While the preferred embodiments of the present invention have been described above with reference to the accompanying drawings, it goes without saying that the present invention is not limited to such embodiments. It is obvious that a person skilled in the art can conceive of various modifications or modifications within the scope of the claims, and it should be understood that these also belong to the technical scope of the present invention. be done.

For example, security-related signals transmitted from smart pachislot 100 to dedicated unit 350 are to be output continuously for three seconds or longer. Here, if the smart pachi-slot 100 is powered off while outputting the security-related signal, the smart pachi-slot 100 may or may not output the security-related signal again after the power is restored. If the security-related signal is to be output again, smart pachislot 100 may continue to output the security-related signal for three seconds or longer after the power is restored.

In the above-described embodiment, the main CPU 200a acquires the door open error detection flag set to "1" when the front upper door 104 or the front lower door 106 is open, and determines the door open error. mentioned and explained. In smart pachislot, not only the main CPU 200a but also the medal CPU 204a manage door open errors. Specifically, a door opening signal output when the front upper door 104 or the front lower door 106 is opened is input as an electrical signal (hardware) to both the main CPU 200a and the medal CPU 204a, and the main CPU 200a A door opening error is notified through the sub CPU 202a, and in parallel with this, the medal CPU 204a notifies the door opening error through the dedicated unit 350 or hall computer (not shown). With such a configuration, even if one of the main CPU 200a and the medal CPU 204a malfunctions, as long as the other CPU is normal, a door opening error can be notified, thereby ensuring security. A door open error is defined as not a fraudulent monitoring process related to dispensing and lending, and is processed in the non-use area.

Further, in the above-described embodiment, the main control board 200, the sub-control board 202, and the medal number control board 204 are arranged so as to share the functional parts for progressing the game. The functional units may be arranged on the sub-control board 202 or the medal number control board 204, or part of the functional parts of the sub-control board 202 may be arranged on the main control board 200 or the medal number control board 204. Some functional units of the substrate 204 may be arranged on the main control substrate 200 or the sub-control substrate 202, or all functional units may be collectively arranged on one control substrate.

Further, each processing performed by the main control board 200, the sub-control board 202, and the medal number control board 204 described above does not necessarily have to be processed in time series according to the order described as the flow chart, and can be processed in parallel or by a subroutine. may include

100 smart pachislot (game machine)
112 Count switch 114 Game medal number display device 116 Bet switch 118 Start switch 120 Stop switch 121 Settlement switch 122 Effect switch 200 Main control board 200a Main CPU
204 Medal number control board 204a Medal CPU
350 dedicated unit

Claims (1)

A gaming machine having a first control unit that controls the progress of a game and a second control unit that manages game values to be provided for the game,
The first control unit transmits a command to the second control unit,
the commands include a first command and a second command;
An order is predetermined for transmission of the first command and the second command,
The second control unit determines whether or not the first command and the second command are received in a predetermined order.

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