JP2023107757A - Method for controlling operation state of computer system and corresponding computer system - Google Patents

Abstract

To provide a method, or the like, for controlling operation state of a computer system.SOLUTION: In a method, a command is triggered to instruct a computer system to transition from a main operating state to a standby state, the standby state defining the computer system operating with the lowest power consumption compared to the main operating state. Power consumption of the computer system is measured. As long as the measured power consumption exceeds a threshold, a main power supply mode of a power supply unit (2) of the computer system is maintained. As soon as the measured power consumption falls below the threshold, the transition of the computer system from the main operating state to a power-saving state (12) is started. The power-saving state corresponds to a system state in which power consumption is lower than that in the main operating state. The power supply unit is switched, in the power-saving mode, to an auxiliary power supply mode in which power output is lower than that in the main power supply mode.SELECTED DRAWING: Figure 1

Description

The present invention relates to a method of controlling the operating state of a computer system. Furthermore, the invention relates to a corresponding computer system.

Driven by computer industry trends to improve the power consumption of computer systems such as notebook PCs and desktop PCs, more advanced standby states are being introduced into the so-called Advanced Configuration and Power Interface. , ACPI) to replace or extend conventional computer system states such as the S0 (running) state and the S3 (standby) state. In particular, processor and operating system manufacturers have begun pushing to implement a new system state called "Modern Standby." This system state is intended to migrate the standby state known from mobile computing (smartphones, tablets, etc.) to traditional x86 systems.

The main differences of the "modern standby" system state from the traditional S3 standby state are persistent network connectivity, ability to run background tasks (if required), fast system "wake-up" ), and an improved security implementation. In order to reduce power consumption to levels similar to or lower than those achieved in the traditional S3 standby state, the mainboard and all connected components and devices (including the CPU) within the computer system are reduced. Switch to power mode. Additionally, the power supply unit (PSU) of the desktop PC is switched to light load mode. However, the drawback here is that not all power lines can operate with improved light load efficiency.

In order to ensure that the "modern standby" system state is adopted and executed, all connected components and devices (including the CPU) within the computer system must support this system state. For example, a PCIe device (PCIe = Peripheral Component Interconnect express) must support a low power mode, which can result in mains power loss. In addition, operating system driver support is required. A computer system energetically enters the S0 state (in operation) when an individual device or component does not meet all the requirements of a "modern standby" system state or otherwise prevents transition to a power saving mode. , thereby preventing the power supply from transitioning to standby or light load operation.

Another problem is that frequent transitions and changes between main operation and standby modes of the power supply unit can occur when devices or components of the computer system require constant updates or background tasks from the network. It is a matter of nature. Depending on the implementation of the power supply unit, this may result in reduced power supply life or audible switching noise.

Previous implementations of computer systems that use a "modern standby" system state, such as notebooks, do not use internal power supply units (e.g., ATX power supply units) that need to be switched between main power mode and standby mode. It is primarily restricted to battery powered devices. In the context of desktop PCs, so far there are only reference designs that use ATX power supply units with multiple power lines and switch them between main power mode and standby mode constantly, e.g. every second. Not proposed. In the case of a power supply with only one power supply line, for example, an interruption time window of 2 seconds is implemented in the power supply unit, so that the power supply unit can switch between the main power mode and the standby mode, even with an activation signal. does not turn on for 2 seconds even if it is specified to prevent the switching of .

It is therefore an object of the present invention to improve existing solutions for power saving states for x86 systems.

The above problem is solved according to a first aspect by a method according to claim 1. Supplementary or improved implementations are given in the dependent claims.

A method is implemented to control the operating state of a computer system, comprising:
triggering a command to direct the transition of the computer system from a main operating state to a standby state, the standby state defining operation of the computer system with the lowest power consumption compared to the main operating state;
measuring power consumption of the computer system;
maintaining the main power mode of a power supply unit of the computer system as long as the measured power consumption of the computer system exceeds the threshold;
initiating a transition of the computer system from a main operating state to a power saving state as soon as the measured power consumption of the computer system falls below a threshold, the power saving state having a lower power consumption compared to the main operating state. Corresponding to the low system state, the power supply unit of the computer system is switched in the power saving state to an auxiliary power mode with a lower power output compared to the main power mode.

Such a method improves on existing solutions for standby states for x86 systems by implementing power (consumption) dependent (load dependent) power saving states. In this power saving state, individual components of the computer system have their power consumption reduced or completely shut down depending on their power consumption. A power saving state is a power dependent state that fits energetically between the main operating state and the standby state requested by the triggering of a command, according to the power consumption of the computer system. Thus, power saving states are energetically efficient even before the lowest power consumption defined by the standby state. In the power saving state, the power supply unit is switched to auxiliary power mode to save electrical energy. The auxiliary power supply mode of the power supply unit is, for example, standby mode or light load mode.

This can improve the reduction of power consumption of computer systems, especially desktop PCs. The method controls the transition from the main operating state to the power saving state as soon as the measured power consumption of the computer system falls below a threshold and triggers a command to enter the standby state.

Thus, the method is capable of entering a power saving state even if individual components and devices (including the CPU) within the computer system do not support or otherwise interfere with the requested standby state. That is the effect and advantage over conventional solutions. In this way, power consumption can still be reduced and the computer system does not stay in the main operating state energetically.

A standby state is an operating state of a computer system in which the computer system is still operating, ie, not turned off. The standby state corresponds to, for example, the sleep state (sleep) with the lowest power consumption. The standby state is set, for example, by the operating system of the computer system. For example, the standby state is a "modern standby" system state. In this system state, the computer system is in its lowest power consumption state. This system state is such that, for example, individual or several components and devices of the computer system operate under conditions of operational standby similar to S0 operation according to the ACPI standard, but are in their lowest energy consumption state. Defined. This allows the power consumption to be reduced to a very low level, while still allowing the computer system to reactivate and return to the main operating state very quickly.

An effect and advantage of measuring the power consumption of the computer system is that the main power mode of the computer system's power supply is maintained as long as the measured power consumption of the computer system exceeds the threshold. This ensures that the computer system operates stably and that the power supply does not in any case switch to an auxiliary power mode that cannot meet the power requirements of the computer system.

Another advantage and benefit of measuring the power consumption of a computer system is that power saving states can be set depending on the load. This means that the power saving state can be set more or less moderately depending on the remaining power required. A power saving state requires only a few processes or components to run when the computer system still requires significant remaining power, for example, because background tasks or updates from the network need to be completed. It is set more conservatively than without it.

In various implementations of the method, the power saving state corresponds to the standby state when the computer system can operate in the power saving state with the lowest power consumption. For example, in such cases, the power saving state corresponds to a "modern standby" system state.

In various implementations of the method, the power consumption of the computer system is repeatedly measured in multiple measurement processes as long as the measured power consumption of the computer system exceeds the threshold. A timer is started after each measurement process. A new measurement operation is performed as soon as the timer expires. This has the effect and advantage that executing tasks or processes affecting power consumption can be terminated first before the power consumption of the computer system is measured again. In a complementary implementation of the method, a timer is incremented after each measurement process. This has the advantage that different execution tasks or processes with different completion times can be accommodated.

In various implementations of the method, an error signal is generated when a specified number of measurement operations is reached and the measured power consumption of the computer system still exceeds the threshold. This has the advantage that the internal controllers of the computer system or the user can be notified that the power saving state cannot be entered (regardless of the command requested). This improves the system security of the computer system.

In various implementations, the procedure
measuring power consumption of the computer system in a power saving state;
attempting to further reduce the power consumption of the computer system as soon as the measured power consumption of the computer system in the power saving state exceeds the threshold.

These steps have the effect and advantage of allowing controllers within the computer system to respond to changes in power consumption. Further reductions in computer system power consumption are targeted to keep the computer system in a power saving state despite increases in power consumption above the threshold. For example, the CPU is (further) throttled, or other components or devices not needed are turned off.

In various implementations, the process
initiating a transition of the computer system from the power saving state back to the main operating state if the measured power consumption of the computer system in the power saving state continues to exceed the threshold after a (pre)determined period of time; Returning the power supply unit of the system to main power mode.

This measure has the effect and advantage of preventing unintentional shutdown of the computer system due to overload in the power saving state.

According to a second aspect, the above problem is solved by a computer system as claimed in claim 7. Supplementary or improved implementations are given in the dependent claims.

The computer system has a power supply unit and components powered by the power supply unit. The computer system
triggering a command to transition the computer system from a main operating state to a standby state, the standby state defining operation of the computer system with the lowest power consumption compared to the main operating state;
measuring the power consumption of the computer system, maintaining the main power mode of the power supply unit of the computer system as long as the measured power consumption of the computer system exceeds the threshold;
Initiating a transition of the computer system from a main operating state to a power saving state as soon as the measured power consumption of the computer system falls below a threshold, the power saving state being adjustable depending on the load, the main operating state and Corresponding to a system state with relatively low power consumption, the power supply unit of the computer system is switched to an auxiliary power mode with a lower power output compared to the main power mode in the power saving state.

Such a computer system also achieves the effects and advantages previously described in relation to the method according to the first aspect.

In various embodiments of the computer system, measurement circuitry is configured to measure the power consumption of the computer system and generate the control signal. This control signal indicates whether the measured power consumption of the computer system exceeds a threshold. This has the advantage and advantage of being able to easily determine the power consumption of a computer system. The measurement circuit is configured, for example, as an analog circuit with a shunt and a measurement amplifier to detect changes in current consumption over time within the computer system. This can be, for example, the first derivative di/dt of the current. For example, a current signal is averaged over a specified period of time and a control signal is generated when the averaged current signal exceeds a threshold.

In various implementations, the computer system is further configured to provide control signals generated by the measurement circuit to the controller to control transitions of the computer system between the main operating state and the power save state by the controller. This has the effect and advantage that various states can be automatically and reliably controlled. The controller is, for example, an embedded controller on the main board of the computer system.

In various embodiments, a computer system is configured to perform procedures of the types described above.

The invention is explained in more detail below by means of exemplary embodiments with the help of several drawings.

1 shows a schematic flow diagram of an implementation of a method for controlling the operating state of a computer system; FIG. 1 illustrates a schematic diagram of components of a computer system in accordance with an exemplary embodiment; FIG. Fig. 3 shows a circuit layout of a measuring circuit according to an exemplary embodiment; FIG. 4 shows a schematic diagram of a comparison of standby state implementations with and without power saving states.

FIG. 1 shows a schematic flow chart of an implementation of a method for controlling the operational state of a computer system. Here, to the left of the dashed separating line (under the heading "System State") are shown various method steps S1-S7 relating to the system state of the computer system. To the right of the dashed separator line (under the heading "PSU Status") are shown typical states of the computer system's power supply unit.

The procedure begins at step S1, in which the computer system is in its main operating state. In this state, the computer system is powered on and all devices and components of the computer system are active. The power supply unit of the computer system is on (ON state) in this system state and is in main power mode to supply power to the computer system. For example, the main operating state of a computer system corresponds to the S0 state according to the ACPI standard. At step S1, a command is triggered to command the transition of the computer system from the main operating state to the standby state. This command is triggered, for example, by the operating system of the computer system. This is done, for example, by the user of the computer system pressing the computer system's power button or the computer system's operating system software button.

Then, at step S2, the power consumption of the computer system is measured. For this purpose, for example, the current consumption of the components of the computer system from the power supply unit of the computer system is measured at a specified supply voltage and compared with predefined threshold values. The measuring method and measuring circuit for this are described in more detail below. At step S2, the power supply unit of the computer system is still in main power mode (ON state).

A timer is started in step S3. After the timer expires, power consumption is measured again according to step S2. If the measured power consumption is still above the upper limit, the system switches again to step S3 and a new timer is started. For each such iteration between steps S2 and S3, the time on the timer is extended as long as the power consumption remains above the threshold. For example, in the embodiment according to FIG. 1, successive increments of timer delay from 500 ms to 10 s are performed. For example, different timers are set with values 500ms, 1s, 5s and 10s. Such an approach allows executing tasks or processes that affect the computer system's power consumption to finish first before the computer system's power consumption is measured again. The more frequently the switching between steps S2 and S3, the timer is set accordingly to allow longer running or background tasks and their termination.

Steps S2 and S3 are repeated, for example, until a predetermined number of iterations (eg, 5 iterations) are completed or the power consumption of the computer system falls below a threshold. After a predetermined number of iterations, an error signal is generated if the power consumption of the computer system is still above the threshold. This indicates a failure to enter the power save state. This is signaled to the user of the computer system, eg by the operating system, eg by means of an alarm signal or message.

However, if the power consumption falls below the threshold before the maximum number of iterations is reached, the procedure transfers from step S2 to step S4. At step S4, any presetting or entry into a power saving state is performed. Preconfigurations, for example, specify settings for the devices, components, or software (eg, operating system) of the computer system. This includes, for example, specific commands or sets of commands for controlled transitions of devices and components to power saving states. For example, presetting is done once when the power saving state is first entered. Preconfiguration is performed in step S4, and when this is completed, the computer system enters a power saving state. Alternatively, the presetting may be done separately from step S4, eg, prior to the procedures described herein.

A power saving state is a system state that consumes less power than the main operating state. Specifically, the power saving state is an intermediate energy state of the computer system between the main operating state and the standby state commanded by the command in step S1. For example, the standby state defines operation of the computer system with the lowest power consumption compared to the main operating state. For example, the standby state is a "modern standby" system state.

In the power saving state according to step S4, depending on the power consumption, the individual power consumption of the computer system is reduced or they are completely turned off. For example, the computer system's fans are slowed down or turned off completely, and the processor (CPU) is throttled at its clock speed. The power of the computer system can then be switched to auxiliary power mode. The auxiliary power supply mode of the power supply unit is, for example, standby mode or light load mode. The computer system is then in a power saving state which will be described in more detail below in comparison to the standby state.

In the power saving state, the power consumption of the computer system continues to be measured in step S5. If the power consumption exceeds the above threshold in the power saving state, a power warning or system interrupt occurs and the procedure moves to step S6. In this step S6 further power reduction of the computer system is initiated. To this end, attempts are made to further reduce system power, for example, by further throttling the CPU. For example, the CPU is throttled to its lowest clock speed in this case. Power reduction of other devices and components within the computer system may also occur at this stage.

If, as a result of the action in step S6, the power consumption falls below the threshold again within the specified period of time, the procedure returns to step S5 and the computer system remains in the power save state. In an exemplary implementation, the specified period is 5 ms. On the other hand, if the action in step S6 does not result in a reduction in power consumption below the threshold within the 5 ms period, the procedure moves to step S7. The power save state is thereby removed, an overload event is logged, and power is increased, if necessary. The operation of step S7 thus returns the computer system from the power saving state to the main operating state. In this case, the power of the computer system is returned to the main operating state (ON state). According to the embodiment of FIG. 1, the procedure is thus again at step S1.

FIG. 2 shows a schematic diagram of the components of the computer system 1 according to an embodiment. The method described above with respect to FIG. 1 is used, for example, in the computer system 1 according to FIG. The computer system 1 according to FIG. 2 comprises a power supply unit 2 that powers the components 4a, 4b (or other components not shown) of the computer system 1 . The power supply unit 2 is, for example, a so-called single-line power supply unit. This means that the power supply unit outputs only one supply voltage. The power supply unit is for example configured to output the supply voltage in the auxiliary power mode the same as in the main power mode, but with a lower output power than in the main power mode. This has the advantage that the supply voltage is also available in auxiliary power mode and is used to power the critical components 4a, 4b. In the exemplary embodiment shown in FIG. 2, the power supply unit 2 comprises an output to which a 12V supply voltage is applied. This supply voltage is used, for example, to power a PCI Express (PCIe) component 4 a on the main board of the computer system 1 . Various other board voltages may be generated by several voltage regulators 3a-3d. For example, a voltage regulator 3a is provided to supply the supply voltage for the CPU core of the computer system 1, which can be used to power the CPU (component 4b). In addition, voltage regulators 3b-3d generate further board voltages of 5V, 3.3V and 1.8V, as shown by way of example in FIG.

Furthermore, the computer system 1 comprises a measuring circuit 5 connected between the output of the power supply unit 2 and the voltage regulators 3a-d. In the exemplary embodiment according to FIG. 2, the measuring circuit 5 comprises a shunt connected to a circuit for detection of the change in current over time (di/dt). A circuit for detection detects the time variation of the current drawn from the power supply unit. The shunt, for example, has a measuring resistance that measures the current. In the exemplary embodiment according to FIG. 2, the measurement of power consumption by measuring circuit 5 includes only the supply path to component 4b of computer system 1, without considering component 4a. However, in alternative embodiments, component 4a may also be included in the measurement of power consumption.

The measurement circuit 5 thus takes over the task of measuring the power consumption of the computer system 1, as described in steps S2 and S5 in the procedure of FIG. When the power consumption of the computer system 1 exceeds a threshold, the measurement circuit 5 generates a control signal 8 and forwards it to the controller 6 of the computer system 1 as a power warning or system interrupt. In the exemplary embodiment according to FIG. 2, controller 6 is an embedded controller. Controller 6 controls the operating state of computer system 1 according to control signal 8 . For example, if the control signal 8 indicates continuous exceeding of the power consumption threshold of the computer system 1 (by means of a defined first signal level of the control signal 8) and a defined number of repetitions of the measurement operation. If so, the controller 6 generates an error signal 13, as previously described in FIG. 1 for steps S2 and S3. This indicates that computer system 1 has failed to enter the power saving state. The error signal 13 is sent to the chipset 7, which processes it accordingly, takes appropriate action, and issues a signal to the user of the computer system 1, if necessary. Chipset 7 is, for example, a so-called system-on-chip (SoC).

On the other hand, the controller 6 generates the trigger signal 14 if the control signal 8 indicates (by virtue of the defined second signal level of the control signal 8) that the power consumption is below the threshold during the repetitive measurement process. As a result, the power supply unit 2 is switched to the auxiliary power supply mode. As a result, computer system 1 enters a power saving state whereby components 4a and 4b, respectively, curtail or limit their power consumption. See also the above description of step S5 according to FIG. The controller 6 shown in FIG. 2 also uses the measurement circuit 5 to continue to monitor the power consumption of the computer system 1 even after entering a power saving state, and, if necessary, as previously described in connection with FIG. The operations described in steps S6 and S7 are initiated.

Signaling between controller 6 and power supply unit 2 or chipset 7 is performed, for example, by pin signaling according to the so-called General Purpose Input/Output Standard (GPIO).

The detection of the change in current di/dt over time in the measuring circuit 5 is, for example, the current is averaged over a predetermined short period, for example 8 ms, after which period the power consumption exceeds a predefined threshold. It has a current measurement amplifier that detects whether The measurement circuit 5 is for example arranged to send the control signal 8 as a digital output signal to the controller 6 .

An alternative or complementary embodiment of measuring circuit 5 is shown in FIG. The measuring circuit 5 has a measuring resistor R20 acting as a shunt for sensing the current of the computer system. On the left, the measuring resistor R20 is connected to the signal input 1 (IN(+)) of the current measuring amplifier 9; On the right, the measuring resistor R20 is connected to the signal input 10 (IN(-)) of the current measuring amplifier 9. FIG. Thus, the supply signal on the source side is present at the input 1 of the current measurement amplifier 9, while the supply signal on the load side (towards the computer system 1) is present at the input 10 of the current measurement amplifier 9. . Additionally, a capacitor C4 is connected in parallel with the measuring resistor R20 and acts as a filter capacitor.

Current measurement amplifier 9 determines the difference signal from input signals 1 and 10 and compares it to a reference voltage at input 7 (CMPREF) of current measurement amplifier 9 . The reference signal is formed by a voltage divider R26, R28 from the standby power supply (P3V3P_STBY) of the power supply unit. The reference signal also serves as the voltage supply (VS+) at input 2 of current measurement amplifier 9 . The output signal (ALERT#) at output 3 of current measurement amplifier 9 is to signal the behavior of the differential signal at inputs 1 and 10 of current measurement amplifier 9 with respect to the reference signal at input 7 of current measurement amplifier 9. used for In normal operation (the difference signal is below the reference signal), the output signal (ALERT#) is at a HIGH signal level. As a result, transistor Q5, which is also powered by the standby power supply (P3V3P_STBY), conducts. Capacitor C6 is discharged. At this stage, the further transistor Q1 shuts off, is also powered by the standby power supply (P3V3P_STBY) and produces a signal level HIGH at its collector terminal 3, which is the control signal 8.

If the differential signal at the inputs 1 and 10 of the current measurement amplifier 9 exceeds the reference signal at the input 7 of the current measurement amplifier 9, the current measurement amplifier 9 outputs at its output 3 the signal of the output signal (ALERT#). Generate level LOW. This turns off the transistor Q5. This causes capacitor C6 to be charged from the standby power supply (P3V3P_STBY) through resistors R23 and R25.

Capacitor C6 operates as a delay element. As soon as capacitor C6 reaches a certain state of charge (and the voltage drop across C6 exceeds a certain value), a further transistor Q1 is switched into conduction via diode D3 and at its collector terminal 3 is lowered to the signal level LOW, which becomes the control signal 8. Capacitor C6 is adjusted to set a charging constant with a time delay of, for example, 8 ms.

Thus, the measuring circuit 5 determines the current consumption of the computer system according to FIG. 3, which is recognized as the change in current di/dt over time and averaged over a period of 8 ms. The signal level of the control signal 8 is set LOW by the measuring circuit 5 if the current consumption after 8 ms is still above the reference level (input 7 of the current measuring amplifier 9). The control signal 8 thus indicates that the power consumption of the computer system is above the specified upper limit. On the other hand, if the power consumption of the computer system drops again within 8 ms, transistor Q1 remains off (diode D3 non-conducting), which keeps control signal 8 at signal level HIGH. . In this case the control signal 8 indicates that the current consumption does not exceed the critical limit.

In an exemplary embodiment, if the measurement circuit 5 according to FIG. 3 is used in the implementation according to FIG. 2, the control signal 8 according to FIG. , the output signal of the measuring circuit 5 according to FIG. The computer system may be configured such that signal output 8 is ignored when no transition to or operation in a power saving state is required.

FIG. 4 shows a schematic diagram of a comparison of the standby state implementation of a computer system of the type described above, with and without the power saving state described above. The upper portion of FIG. 4 shows the standby state of a computer system of the type described above, in the absence of power saving states. The computer system can now switch between a main operating state 10 and a standby state 11 . The standby state 11 here corresponds, for example, to the "modern standby" system state. In the upper case according to FIG. 4, the computer system is in main operating state 10 at least as long as there is some system activity. The main operating state 10 is assumed when the system is fully turned on and all devices are active (see system state 10a). However, the main operating state 10 is also active when the system is in standby with little or limited system activity (see system state 10b). In this case, the computer system enters standby state 11 only when the system is in standby and no system activity is recorded. Only for such low power consumption is the power switched to standby (auxiliary power mode). In all other cases, the power supply unit is active in mains power mode, supplying electrical energy to the computer system.

Thus, the upper case according to FIG. 4 shows that the power consumption in the power supply unit 2 of the computer system can be reduced only when the standby state 11 can be assumed, regardless of the power saving state described. However, the computer system remains in the main operating state 10 when some or all of the components or devices of the computer system prevent transition to the standby state 11 or are in a state of low system activity.

In contrast, the bottom case of FIG. 4 represents the standby state with the power saving states described. In this case, the computer system is in main operating state 10 only when the system is fully turned on and all devices are active. At such higher power consumption, the power supply is active and in the main operating state (see step S1 in FIG. 1). However, in the lower case according to FIG. 4, the computer system enters power save state 12 . The power saving state 12 can be envisioned according to power consumption. This means that when the system is turned on but some devices are in standby, the power saving state 12 is already assumed (system state 12a). Already in that case the power supply unit is switched to standby (auxiliary power supply mode), resulting in lower power consumption. The less system activity that is recorded, the deeper the computer system goes into the standby state (system state 12b). In this way, the power save state 12 can further limit power consumption. Power saving state 12 in the lower case of FIG. In the power saving state 12 corresponding to the bottom case of FIG. 4, all components and devices of the computer system can be addressed, for example, in the same manner as in state S0 according to the ACPI standard. This has the advantage that no additional software implementation or device or driver support is required.

The overview according to FIG. 4 shows that when the computer system is still active, but some devices have already switched to standby (from system state 12a onwards), the described power saving states (especially the description of FIG. 1) ) indicates that a reduced consumption can already be set under the control of the computer system. Therefore, even if individual components or devices of the computer system do not tolerate the standby state 11 according to the scenario at the bottom of FIG. 4, the power consumption of the computer system can still be reduced according to the present invention.

All designs and implementations are chosen as examples only.

REFERENCE SIGNS LIST 1 computer system 2 power supply unit 3a-3d voltage regulators 4a, 4b components 5 measurement circuit 6 controller 7 chipset 8 control signals 9 current measurement amplifier 10 main operating states 10a, 10b system states within main operating states 11 standby state 12 power saving State 12a, 12b System state in power saving mode 13 Error signal 14 Trigger signal R20 Measuring resistor (shunt)
S1-S7 method steps

Claims (10)

A method for controlling the operating state of a computer system, comprising:
triggering a command to direct the transition of the computer system from a main operating state to a standby state, the standby state defining an operation of the computer system with the lowest power consumption compared to the main operating state. , triggering said command;
measuring power consumption of the computer system;
maintaining a main power mode of a power supply unit of the computer system as long as the measured power consumption of the computer system exceeds a threshold;
initiating a transition of the computer system from the main operating state to a power saving state as soon as the measured power consumption of the computer system falls below the threshold, the power saving state being the main operating state. wherein the power supply unit of the computer system is switched in the power saving state to an auxiliary power mode with a lower power output compared to the main power mode, said transition corresponding to a system state of lower power consumption compared to and a method comprising: the power saving state corresponds to the standby state when the computer system can operate in the power saving state with the lowest power consumption;
The method of claim 1. power consumption of the computer system is measured repeatedly in a plurality of measurement operations as long as the measured power consumption of the computer system exceeds the threshold;
A timer is started after each measurement operation, and a new measurement operation is performed as soon as the timer expires.
The method of claim 1. an error signal is generated when a measurement operation reaches a certain number of times and the measured power consumption of the computer system still exceeds the threshold;
4. The method of claim 3. measuring power consumption of the computer system in the power saving state;
2. The method of claim 1, further comprising attempting to further reduce power consumption of the computer system as soon as the measured power consumption of the computer system in the power saving state exceeds the threshold. transitioning the computer system from the power saving state back to the main operating state if the measured power consumption of the computer system in the power saving state continues to exceed the threshold after a determined period of time. 6. The method of claim 5, further comprising: initiating, the power supply unit of the computer system is returned to the main power mode. A computer system having a power supply unit and components powered by the power supply unit, comprising:
triggering a command to direct the transition of the computer system from a main operating state to a standby state, the standby state defining operation of the computer system with the lowest power consumption compared to the main operating state;
measuring the power consumption of the computer system and maintaining the main power mode of the power supply unit of the computer system as long as the measured power consumption of the computer system exceeds a threshold;
initiating a transition of the computer system from the main operating state to a power saving state as soon as the measured power consumption of the computer system falls below the threshold, wherein the power saving state is compared to the main operating state; wherein the power supply unit of the computer system is switched to an auxiliary power mode having a lower power output compared to the main power mode in the power saving state.
A computer system configured as a measurement circuit configured to measure power consumption of the computer system and generating a control signal indicating whether the measured power consumption of the computer system exceeds the threshold;
8. Computer system according to claim 7. 9. Further configured to forward the control signal generated by the measurement circuit to a controller and control transitions of the computer system between the main operating state and the power saving state by the controller. the computer system described in . The computer system is configured to perform the method of any one of claims 1-6,
8. Computer system according to claim 7.

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