JP2023064361A - semiconductor module - Google Patents

Abstract

To provide a semiconductor module configured with a circuit layer of a metal base board with a semiconductor chip such as an LED element bonded on it, in which the semiconductor chip is difficult to detach and the metal base board is difficult to deform.SOLUTION: A semiconductor module includes a metal base board, a connector, and a plurality of semiconductor chips, the metal base board includes a metal board with the board thickness within a range of 0.5 to 1.2 mm and a circuit layer provided on at least one surface of the metal board through an insulation layer, the plurality of semiconductor chips are disposed on the circuit layer with forming a semiconductor chip array part arranged along one direction, the connector provides a housing part providing a terminal, the housing part is disposed on the circuit layer so as to oppose to the semiconductor chip array part along the one direction, and a ratio B/A between a length B which is the length of the housing part in the one direction and a length A which is the length of the semiconductor chip array part in the one direction is 1 or more.SELECTED DRAWING: Figure 1

Description

The present invention relates to semiconductor modules.

BACKGROUND ART As a light source module, an LED module having a configuration in which a plurality of LED elements (light emitting diode elements) and a connector connected to the plurality of LED elements are arranged on a circuit board is known (Patent Document 1). An LED module using a plurality of LED elements is used, for example, as a light source for lighting devices such as headlights of vehicles such as automobiles.

JP 2019-29058 A

In an LED module using a plurality of LED elements, it is desirable that the solder that joins the LED elements does not crack even after long-term use. However, when a metal base board made of a metal board is used as the circuit board of the LED module, the metal board expands and contracts due to the heat generated by the LED element during light emission, which causes cracks in the solder due to thermal stress. may become easier to enter. If cracks occur in the solder due to thermal stress, the LED element may be easily detached from the substrate. In order to suppress the thermal stress applied to the solder due to the expansion and contraction of the metal substrate, it is conceivable to reduce the thickness of the metal substrate. However, if the thickness of the metal substrate is reduced to the extent that thermal stress can be suppressed, the flexural rigidity of the metal base substrate will decrease, and the metal base substrate will warp during manufacturing of the LED module or screwing of the LED module. deformation is more likely to occur.

The present invention has been made in view of the circumstances described above, and an object of the present invention is to provide a semiconductor module in which a plurality of semiconductor chips such as LED elements are bonded to a metal base substrate, wherein the plurality of semiconductor chips are separated from each other. To provide a semiconductor module whose metal base substrate is hard to deform.

In order to solve the above problems, the semiconductor module of the present invention has a metal base substrate, a connector, and a plurality of semiconductor chips, and the metal base substrate has a thickness of 0.5 mm or more. and a circuit layer provided on at least one surface of the metal substrate with an insulating layer interposed therebetween, wherein the plurality of semiconductor chips are arranged along one direction. A semiconductor chip arrangement portion is formed and arranged on the circuit layer, the connector has a housing portion provided with terminals, and the housing portion faces the semiconductor chip arrangement portion along the one direction. and a ratio B/A of the length B of the housing portion in the one direction to the length A of the semiconductor chip arrangement portion in the one direction is 1 or more. there is

According to the semiconductor module configured as described above, the thickness of the metal substrate of the metal base substrate is in the range of 0.5 mm or more and 1.2 mm or less. deformation due to is suppressed. Therefore, separation of the semiconductor chip and deformation of the metal base substrate due to heat generation of the semiconductor chip are suppressed. The semiconductor chip arrangement portion and the housing portion of the connector are arranged on the circuit layer so as to face each other along one direction, and the one direction of the housing portion of the connector with respect to the length A in one direction of the semiconductor chip arrangement portion is provided. Since the ratio B/A of the length B in is 1 or more, deformation such as warping of the metal base substrate during the screwing operation is also suppressed.

Here, in the semiconductor module of the present invention, the bending rigidity of the housing portion of the connector may be greater than or equal to the bending rigidity of the metal substrate.
In this case, the connector reinforces the metal base board, making it difficult to bend the metal base board, thereby further suppressing deformation such as warpage of the metal base board during the screwing operation.
The flexural rigidity can be calculated by (geometrical moment of inertia)×(Young's modulus), and the geometrical moment of inertia is calculated on a cross section perpendicular to the one direction of the semiconductor chip array portion. In addition, if the geometrical moment of inertia and Young's modulus cannot be obtained individually, the connector housing and the metal substrate are used as test pieces, and a three-point bending tester is used to apply bending stress under the same conditions, and the strain at that time is A smaller amount may be considered to have a larger bending rigidity.

Moreover, in the semiconductor module of the present invention, the number of the semiconductor chips arranged in the semiconductor chip arrangement section may be three or more.
In the semiconductor module of the present invention, even if the number of semiconductor chips arranged in the semiconductor chip arrangement portion is three or more, deformation due to expansion and contraction of the metal substrate due to heat generation of the semiconductor chips is suppressed. are difficult to separate from each other, and the metal base substrate is difficult to deform.

According to the present invention, it is possible to provide a semiconductor module in which a plurality of semiconductor chips are difficult to separate from each other and a metal base substrate is difficult to deform.

1 is a perspective view of a semiconductor module according to one embodiment of the present invention; FIG. 2 is a plan view of the semiconductor module shown in FIG. 1; FIG. 2 is a cross-sectional view taken along line III-III of FIG. 1; FIG.

An embodiment of the present invention will be described below with reference to the attached drawings.
FIG. 1 is a perspective view of a semiconductor module according to one embodiment of the present invention. 2 is a plan view of the semiconductor module shown in FIG. 1, and FIG. 3 is a sectional view taken along line III--III of FIG.
As shown in FIGS. 1 to 3, the semiconductor module 10 has a metal base substrate 20, a connector 30, and a semiconductor chip arrangement portion 50 in which seven semiconductor chips 51a to 51g are arranged.

The metal base substrate 20 includes a metal substrate 21 and a first circuit layer 23 and a second circuit layer 24 provided on at least one surface of the metal substrate 21 with an insulating layer 22 interposed therebetween. The first circuit layer 23 includes circuit wirings 23a-23h that are connected to the semiconductor chips 51a-51g. The second circuit layer 24 includes connector fixing portions 24 a and 24 b that join with the connector 30 .

The metal substrate 21 is a member that serves as the base of the metal base substrate 20 .
The metal substrate 21 has a plate thickness in the range of 0.5 mm or more and 1.2 mm or less. When the plate thickness is 0.5 mm or more, the strength of the metal substrate 21 is increased, so deformation such as warping due to heat can be suppressed. Further, since the plate thickness is 1.2 mm or less, the amount of volumetric change due to thermal expansion/contraction of the metal substrate 21 is small.

Metal substrate 21 is preferably a copper substrate, an aluminum substrate, or an iron substrate. The copper substrate is made of copper or copper alloy. The aluminum substrate is made of aluminum or an aluminum alloy. The iron substrate consists of iron or an iron alloy. Ferrous alloys include carbon steel.

The insulating layer 22 is a layer for insulating the metal substrate 21 and the circuit layers (the first circuit layer 23 and the second circuit layer 24). In addition, the insulating layer 22 has a heat transfer function of transferring heat generated in the semiconductor chips 51a to 51g to the metal substrate 21, and absorbs the volume change of the metal substrate 21 due to heat, thereby separating the first circuit layer 23 and the semiconductor chip. It has a stress relaxation function that relaxes the stress applied to the bonding material to be bonded.

The insulating layer 22 is preferably made of an insulating resin composition containing an insulating resin and an inorganic filler. By forming the insulating layer 22 from an insulating resin composition containing an insulating resin with high insulating properties and an inorganic filler with high thermal conductivity, it is possible to improve the heat transfer function while maintaining the insulating properties. .

As the insulating resin, for example, a polyimide resin, a polyamideimide resin, or a mixture thereof can be used. Since these resins are excellent in properties such as insulation, voltage resistance, chemical resistance, and mechanical properties, these properties of the metal base substrate 20 are improved.

Examples of inorganic fillers include alumina (Al ₂ O ₃ ) particles, alumina hydrate particles, aluminum nitride (AlN) particles, silica (SiO ₂ ) particles, silicon carbide (SiC) particles, and titanium oxide (TiO ₂ ) particles. , boron nitride (BN) particles, and the like can be used. The average particle size of the inorganic filler is preferably in the range of 0.1 µm or more and 20 µm or less.

The content of the inorganic filler in the insulating layer 22 is preferably in the range of 30% by volume or more and 85% by volume or less. When the content of the inorganic filler is 30% by volume or more, the heat transfer function of the insulating layer 22 is improved. On the other hand, when the content of the inorganic filler is 85% by volume or less, the heat transfer function of the insulating layer 22 is improved. From the viewpoint of improving the heat transfer function of the insulating layer 22, the content of the inorganic filler is particularly preferably in the range of 50% by volume or more and 80% by volume or less.

The film thickness of the insulating layer 22 is preferably 100 μm or less. By setting the film thickness of the insulating layer 22 to 100 μm or less, the heat transfer function of the insulating layer 22 is improved, and the heat generated in the semiconductor chips 51 a to 51 g can be efficiently transferred to the metal substrate 21 . The film thickness of the insulating layer 22 is preferably 30 μm or more. Since the thickness of the insulating layer 22 is 30 μm or more, the metal substrate 21 and the circuit layers (the first circuit layer 23 and the second circuit layer 24) can be reliably insulated, and the stress relaxation function of the insulating layer 22 can be achieved. is improved, and the stress applied to the bonding material 40 can be reduced. The film thickness of the insulating layer 22 is preferably 50 μm or more, and preferably 80 μm or less.

The insulating layer 22 has a ratio T _R /E _R of a film thickness T _R (unit: mm) to an elastic modulus E _R (unit: GPa) at 100° C. within a range of 30 or more and 1000 or less, and a thermal conductivity C _R The ratio T _R /C _R of the film thickness T _R (unit: mm) to (unit: W/mK) is preferably in the range of 2 or more and 40 or less. T _R /E _R is preferably 30 or more, more preferably 100 or more. Moreover, T _R /E _R is preferably 300 or less, particularly preferably 200 or less. T _R /C _R is preferably 3 or more, more preferably 5 or more. Moreover, T _R /C _R is preferably 30 or less, more preferably 20 or less. When the insulating layer 22 is a laminate of two or more layers, it is preferable that the sum of _TR / _ER of each layer is within the above range and that _TR / _CR of each layer is within the above range. When the T _R /E _R of the insulating layer 22 is within the above range, the stress relaxation function is improved, and the separation of the semiconductor chips 51a to 51g due to heat generation of the semiconductor chips 51a to 51g is suppressed, thereby improving reliability. do. Further, when T _R /C _R is within the above range, the heat transfer function is improved, and the heat generated by the semiconductor chips 51a to 51g can be efficiently released to the outside.

As materials for the first circuit layer 23 and the second circuit layer 24, metals such as copper, aluminum, and gold can be used. The film thicknesses of the first circuit layer 23 and the second circuit layer 24 are preferably in the range of 2 μm or more and 200 μm or less, and particularly preferably 80 μm or less.

The connector 30 includes a housing portion 31 and support members 33 a and 33 b arranged at both ends of the housing portion 31 . The support members 33 a and 33 b are fixed to support member fixing portions 32 arranged at both ends of the housing portion 31 . The support members 33a and 33b are joined to the connector fixing portions 24a and 24b via the joining material 40. As shown in FIG. The housing portion 31 has a terminal portion 34 . The terminal portion 34 has eight terminals 34a to 34h. The eight terminals 34a to 34h are joined to the eight circuit wirings 23a to 23h via the joining material 40, respectively. As the bonding material 40, for example, Sn--Ag-based, Sn--Cu-based, Sn--In-based, and Sn--Ag--Cu-based solder materials (so-called lead-free solder materials) can be used.

The housing portion 31 has external terminals (not shown) connected to the terminals 34a-34h. A housing portion 31 of the connector 30 is connected to a power source and a control device. The shape of the housing portion 31 is a rectangle having a longitudinal direction in plan view.

Examples of the semiconductor chips 51a to 51g include LED elements, LED chips, LED-CSP (LED-Chip Size Package), MOSFETs (Metal-oxide-semiconductor field effect transistors), IGBTs (Insulated Gate Bipolar Transistors), LSIs (Large Scale Integration ) can be used.

Each of the semiconductor chips 51a-51g is connected to two circuit wirings. The semiconductor chip 51a is connected to the circuit wirings 23a and 23b, the semiconductor chip 51b is connected to the circuit wirings 23b and 23c, the semiconductor chip 51c is connected to the circuit wirings 23c and 23d, and the semiconductor chip 51d is connected to the circuit wirings 23d and 23e. The semiconductor chip 51e is connected to the circuit wirings 23e and 23f, the semiconductor chip 51f is connected to the circuit wirings 23f and 23g, and the semiconductor chip 51g is connected to the circuit wirings 23g and 23h.

In the semiconductor module 10 of the present embodiment, the semiconductor chips 51a to 51g form a semiconductor chip arrangement portion 50 arranged along one direction (X direction) (hereinafter referred to as the semiconductor chips 51a to 51g are arranged). (The direction in which the

On the other hand, the connector 30 is arranged such that the housing portion 31 faces the semiconductor chip arrangement portion 50 along the arrangement direction (X direction) of the semiconductor chip arrangement portion 50 . The connector 30 is preferably arranged such that the longitudinal surface of the housing portion 31 faces the semiconductor chip arrangement portion 50 . The ratio B/A of the length B in the arrangement direction of the housing portion 31 of the connector 30 to the length A in the arrangement direction of the semiconductor chip arrangement portion 50 (the length in the longitudinal direction of the housing portion 31) is set to 1 or more ( See Figure 2). The ratio B/A is preferably in the range of 1.1 to 2.0, particularly preferably in the range of 1.3 to 1.7. The connector 30 is preferably arranged near the semiconductor chip arrangement section 50 . The shortest distance between the housing portion 31 of the connector 30 and the semiconductor chip arrangement portion 50 may be, for example, in the range of 0.1 mm or more and 50 mm or less, preferably in the range of 1 mm or more and 30 mm or less.
The length B in the arrangement direction of the connector 30 (the length in the longitudinal direction of the housing portion 31) is the distance between the support members 33a and 33b. In this embodiment, the distance between the support members 33a and 33b and the length of the housing portion 31 are the same.

The flexural rigidity of the housing portion 31 is preferably greater than or equal to the flexural rigidity of the metal substrate 21 . The ratio of the bending rigidity of the metal substrate 21 to the bending rigidity of the housing portion 31 is preferably in the range of 2 or more and 50 or less, and more preferably in the range of 3 or more and 30 or less.
As the connector 30, a commercially available connector used as a connector for semiconductor modules can be used.

According to the semiconductor module 10 of the present embodiment configured as described above, the thickness of the metal substrate 21 of the metal base substrate 20 is in the range of 0.5 mm or more and 1.2 mm or less. Deformation due to expansion/contraction of the metal substrate 21 due to heat generation of 51 g is suppressed. Therefore, separation of the semiconductor chips 51a to 51g and deformation of the metal base substrate 20 due to heat generation of the semiconductor chips 51a to 51g are suppressed. The semiconductor chip arrangement portion 50 and the housing portion 31 of the connector 30 are arranged to face each other along the arrangement direction, and the arrangement of the housing portion 31 of the connector 30 with respect to the length A in the arrangement direction of the semiconductor chip arrangement portion 50 is Since the ratio B/A of the length B in the direction is 1 or more, deformation such as warpage of the metal base substrate during the screwing operation is also suppressed.

In the semiconductor module 10 of the present embodiment, when the bending rigidity of the housing portion 31 of the connector 30 is greater than or equal to the bending rigidity of the metal substrate 21, the metal base substrate 20 is reinforced by the connector 30, making it difficult to bend the metal base substrate 20. As a result, deformation such as warping of the metal base substrate during the screwing operation is further suppressed.

Although the embodiment of the present invention has been described above, the present invention is not limited to this, and can be modified as appropriate without departing from the technical idea of the invention.
For example, in the semiconductor module 10 of this embodiment, the number of semiconductor chips 51a to 51g arranged in the semiconductor chip arrangement section 50 is seven, but the number of semiconductor chips 51a to 51g is not particularly limited. However, it is preferable that the number of semiconductor chips 51a to 51g arranged in the semiconductor chip arrangement section 50 is three or more.

Further, in the semiconductor module 10 of the present embodiment, the semiconductor chip arrangement portion 50 is arranged in one row, but the semiconductor chip arrangement portion 50 may be arranged in a plurality of rows. In the semiconductor module 10 of this embodiment, the housing portion 31 of the connector 30 has a rectangular shape in plan view. As long as the ratio B/A of B is 1 or more, the shape of the housing portion 31 is not limited. The shape of the housing portion 31 may be, for example, a square shape in plan view, or may be a rounded shape such as a circle or an ellipse.

[Invention Example 1]
(Preparation of metal base substrate)
A polyimide solution having a polyimide concentration of 10% by mass was prepared by mixing polyimide and NMP (N-methyl-2-pyrrolidone) and dissolving the polyimide. Further, α-alumina powder (crystal structure: single crystal, average particle size: 0.3 μm) and NMP were mixed and subjected to ultrasonic treatment for 30 minutes to obtain an α-alumina particle concentration of 10% by mass. An alumina particle dispersion was prepared.
The polyimide solution and the α-alumina particle dispersion were mixed at a ratio such that the α-alumina concentration was 60% by volume. The resulting mixture was subjected to dispersion treatment by repeating high-pressure jetting treatment at a pressure of 50 MPa 10 times using Star Burst manufactured by Sugino Machine Co., Ltd. to prepare an α-alumina particle-dispersed polyimide solution. The α-alumina concentration is the content of α-alumina particles in the solid produced when the α-alumina particle-dispersed polyimide solution is heated and dried.

An α-alumina particle-dispersed polyimide solution was applied to the surface of a copper substrate having a thickness of 0.8 mm and a size of 35 mm×35 mm by a bar coating method to form a coating film. Next, the copper substrate on which the coating film was formed was placed on a hot plate, heated from room temperature to 60°C at a rate of 3°C/min, heated at 60°C for 100 minutes, and further heated to 120°C at a rate of 1°C/min. The temperature was raised and heated at 120° C. for 100 minutes to dry the coating film. The copper substrate was then heated at 250° C. for 1 minute and then at 400° C. for 1 minute. In this way, a copper substrate with an insulating layer was produced, in which an insulating layer made of polyimide resin in which α-alumina single crystal particles were dispersed was formed on the surface of the copper substrate. The film thickness of the insulating layer was set to 30 μm. The elastic modulus E _R (unit: GPa) and thermal conductivity C _R (unit: W/mK) of the insulating layer at 100° C. were measured, and as a result of calculating T _R /E _R and T _R /C _R , T _{The R} /E _R was 111 and the T _R /C _R was 15.

A copper foil (T4X: manufactured by Fukuda Metal Foil & Powder Co., Ltd.) having a thickness of 70 μm was overlaid on the insulating layer of the obtained metal substrate with an insulating layer. Next, the obtained laminate was heated in a vacuum at a pressure bonding temperature of 300° C. for 120 minutes while applying a pressure of 5 MPa using a carbon jig to bond the insulating layer and the copper foil. Thus, a metal base substrate was produced in which the copper substrate, the insulating layer, and the copper foil were laminated in this order.

(Production of LED module)
A pattern was formed by etching the copper foil of the metal base substrate to form the first and second circuit layers. Next, a solder resist was applied onto the first circuit layer and the second circuit layer, and lead-free solder was applied thereon to a thickness of 100 μm. Seven LED elements (Oslon compact) are placed on the lead-free solder applied to the first circuit layer, with a gap of 0.5 mm. A: 20 mm), and the connector (model number SM08B1-CPTK-1A-TB, manufactured by J.S.T. Mfg. Co., Ltd., length in the longitudinal direction) on the lead-free solder applied to the second circuit layer B: 30 mm) was arranged such that the longitudinal surface faces the semiconductor arrangement portion. After that, reflow was performed to produce an LED module. The semiconductor chip arrangement portion was placed in the center of the metal base substrate, and the shortest distance between the connector and the semiconductor chip arrangement portion was 3.3 mm.

[Invention Examples 2 and 3, Comparative Example 1]
An LED module was produced in the same manner as in Invention Example 1, except that the length B in the longitudinal direction of the connector was as shown in Table 1 below.

[Invention Example 4]
An LED module was produced in the same manner as in Invention Example 1, except that a copper substrate having a thickness of 0.8 mm and a size of 50 mm×50 mm was used.

[Invention Examples 5-7, Comparative Examples 2-3]
An LED module was produced in the same manner as in Inventive Example 1, except that a copper substrate having a thickness shown in Table 1 below was used.

[Invention Example 8]
An LED module was produced in the same manner as in Inventive Example 1, except that an aluminum substrate having a thickness of 1.0 mm and a size of 35 mm×35 mm was used instead of the copper substrate.

[evaluation]
The warpage of the LED modules obtained in Inventive Examples 1 to 8 and Comparative Examples 1 to 3 and the reliability (crack resistance rate) of the metal base substrate were measured by the following methods. Table 1 shows the results.

(warp)
The LED module was placed on the flat substrate, and a clearance gauge was used to measure the distance between the substrate and the metal base substrate of the LED module at room temperature. The gap was measured for the four corners of the metal base substrate. The warp was the maximum value of the gap measured at the four corners.

(reliability)
The above LED module (test sample) was subjected to 3,000 cycles of cooling/heating cycles of −30° C.×30 minutes to 105° C.×30 minutes. After applying thermal cycles, the specimen was embedded in resin, and the cross section was observed using a polished specimen to measure the length (mm) of cracks occurring in the solder layer. From the length of one side of the solder layer and the measured crack length, the crack resistance rate was calculated from the following formula.
Crack resistance rate (%) = {(solder layer side length (25 mm) - 2 x crack length)/bonding layer side length (25 mm)} x 100
When the crack resistance rate was 80% or more, the reliability was evaluated as ◯, and when the crack resistance rate was less than 80%, the reliability was evaluated as x.

From the results in Table 1, the ratio B/A of the thickness of the metal substrate and the length B in the longitudinal direction of the connector to the length A in the arrangement direction of the semiconductor chip arrangement portion is within the scope of the present invention. ∼8 had small warp and good reliability. On the other hand, Comparative Example 1, in which B/A is smaller than the range of the present invention, has large warpage. This is presumably because the metal base substrate was not sufficiently reinforced by the connector, and the copper substrate was deformed by heating due to reflow during fabrication of the LED module. Also, in Comparative Example 2 in which the thickness of the copper substrate is thinner than the range of the present invention, the warpage is large. This is presumably because the thickness of the copper substrate was too thin and the connector could not sufficiently reinforce the metal base substrate, and the copper substrate was deformed by heating due to reflow during fabrication of the LED module. On the other hand, in Comparative Example 3 in which the thickness of the copper substrate was thicker than the range of the present invention, the reliability was lowered. This is presumably because the thickness of the copper substrate became too thick, the amount of deformation of the copper substrate due to thermal cycles increased, and the stress applied to the solder increased.

REFERENCE SIGNS LIST 10 semiconductor module 20 metal base substrate 21 metal substrate 22 insulating layer 23 first circuit layer 23a, 23b, 23c, 23d, 23e, 23f, 23g, 23h circuit wiring 24 second circuit layer 24a, 24b connector fixing portion 30 connector 31 housing Part 32 Supporting member fixing part 33a, 33b Supporting member 34 Terminal part 34a, 34b, 34c, 34d, 34e, 34f, 34g, 34h Terminal 40 Bonding material 50 Semiconductor chip arrangement part 51a, 51b, 51c, 51d, 51e, 51f, 51g semiconductor chip

Claims (3)

having a metal base substrate, a connector, and a plurality of semiconductor chips;
The metal base substrate includes a metal substrate having a plate thickness in the range of 0.5 mm or more and 1.2 mm or less, and a circuit layer provided on at least one surface of the metal substrate via an insulating layer,
a plurality of the semiconductor chips forming a semiconductor chip arrangement portion arranged along one direction and arranged on the circuit layer;
The connector has a housing portion with terminals, and is arranged on the circuit layer so that the housing portion faces the semiconductor chip arrangement portion along the one direction,
A semiconductor module, wherein a ratio B/A of a length B of the housing portion in the one direction to a length A of the semiconductor chip arrangement portion in the one direction is 1 or more. 2. The semiconductor module according to claim 1, wherein the bending rigidity of said housing portion of said connector is greater than or equal to the bending rigidity of said metal substrate. 2. The semiconductor module according to claim 1, wherein the number of said semiconductor chips arranged in said semiconductor chip arrangement portion is three or more.

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