JP2023052752A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an active matrix EL display device capable of performing a clear multi-gradation color display, in particular, a large active matrix EL display device at low cost by using a manufacturing method which enables selective pattern formation.

SOLUTION: Power supply lines in a pixel portion are arranged in a matrix shape, by using a manufacturing method which enables selective pattern formation. Further, capacitance between wires is reduced by increasing the distance between adjacent wires, by using the manufacturing method which enables selective pattern formation.

SELECTED DRAWING: Figure 8

COPYRIGHT: (C)2023,JPO&INPIT

Description

The present invention relates to an electronic display (electro-optical device) formed by forming EL (electroluminescence) elements on a substrate. In particular, the present invention relates to a display device using semiconductor elements (elements using semiconductor thin films). The present invention also relates to an electronic device using an EL display device as a display portion.

In recent years, the technology for forming thin film transistors (hereinafter referred to as TFTs in this specification) on a substrate has made great progress, and application development to active matrix display devices is underway. In particular, a TFT using a polycrystalline semiconductor film such as polysilicon has higher field-effect mobility (also called mobility) than a conventional TFT using an amorphous semiconductor film such as amorphous silicon, so high-speed operation is possible. is. Therefore, it is possible to control the pixels, which has conventionally been performed by a driver circuit outside the substrate, by a driver circuit formed on the same substrate as the pixels.

In an active matrix type display device using such a polycrystalline semiconductor film, various circuits and elements can be built on the same substrate, thereby reducing manufacturing costs, miniaturizing the display device, and increasing the yield. , and improved throughput.

Furthermore, active matrix EL display devices having EL elements as self-luminous elements have been actively researched. The EL display device is an organic EL display (OELD: O
rganic EL Display) or organic light emitting diodes (OL
ED: Organic Light Emitting Diode).

An EL element has a structure in which an EL layer is sandwiched between a pair of electrodes (anode and cathode).
The layers are usually laminated. A representative example is the laminated structure of "a hole transport layer, a light emitting layer, and an electron transport layer" proposed by Tang et al. of Kodak Eastman Company. This structure has a very high luminous efficiency, and most EL display devices currently being researched and developed employ this structure.

Alternatively, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, or a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are laminated in this order on the anode. structure is fine. The light-emitting layer may be doped with a fluorescent dye or the like.

In this specification, all layers provided between the cathode and the anode are collectively referred to as EL layers.
Therefore, the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer, the electron injection layer, and the like described above are all E
Included in the L layer.

Then, when a predetermined voltage is applied from a pair of electrodes to the EL layer having the above structure, recombination of carriers occurs in the light emitting layer and light is emitted. In this specification, the operation of the EL element to emit light is referred to as driving the EL element. Further, in this specification, a light-emitting element formed of an anode, an EL layer, and a cathode is called an EL element.

In this specification, the term "EL element" includes both an element that utilizes light emission from a singlet excited state (fluorescence) and an element that utilizes light emission from a triplet excited state (phosphorescence).

As a driving method of the EL display device, there are an analog driving method (analog driving) and a digital driving method (digital driving). First, analog driving of an EL display device will be described with reference to FIGS. 1 and 2. FIG.

FIG. 1 shows the structure of a pixel portion 100 of an analog-driven EL display device. Gate signal lines (G1 to Gy) for inputting selection signals from the gate signal line drive circuit are connected to the gate electrodes of the switching TFTs 101 of each pixel. One of the source and drain regions of the switching TFT 101 of each pixel is connected to a source signal line (also referred to as a data signal line) (S1 to Sx) for inputting an analog video signal, and the other is connected to a driving line of each pixel. It is connected to the gate electrode of the TFT 104 and the storage capacitor 108 of each pixel.

One of the source region and the drain region of the driving TFT 104 of each pixel is connected to the power supply line (V1 to Vx) and the other is connected to the EL element . Power supply line (
V1 to Vx) is called a power supply potential. Power supply lines (V1 to Vx) are connected to storage capacitors 108 of each pixel.

The EL element 106 has an anode, a cathode, and an EL layer provided between the anode and the cathode. When the anode of the EL element 106 is connected to the source region or the drain region of the driving TFT 104, the anode of the EL element 106 is the pixel electrode and the cathode is the counter electrode. Conversely, EL element 1
06 is connected to the source region or the drain region of the driving TFT 104,
The anode of the EL element 106 serves as a counter electrode, and the cathode serves as a pixel electrode.

Note that the potential of the counter electrode is referred to as a counter potential in this specification. A power supply that applies a counter potential to the counter electrode is called a counter power supply. The potential difference between the potential of the pixel electrode and the potential of the counter electrode is the EL drive voltage, and this EL drive voltage is applied to the EL layer.

FIG. 2 shows a timing chart when the EL display device shown in FIG. 1 is driven by an analog method. A period from the selection of one gate signal line to the subsequent selection of another gate signal line is called one line period (L). A period from when one image is displayed to when the next image is displayed corresponds to one frame period (F). In the case of the EL display device of FIG. 1, since there are y gate signal lines, y line periods (L1 to Ly) are provided in one frame period.

First, the power supply lines (V1 to Vx) are kept at a constant power supply potential. The counter potential, which is the potential of the counter electrode, is also maintained at a constant potential. The counter potential has a potential difference with the power supply potential to the extent that the EL element emits light.

In the first line period (L1), the selection signal from the gate signal line driving circuit is input to the gate signal line G1. Then, analog video signals are sequentially input to the source signal lines (S1 to Sx). Since all the switching TFTs connected to the gate signal line G1 are turned on, the analog video signal input to the source signal line is input to the gate electrode of the driving TFT via the switching TFT. .

The amount of current flowing through the channel forming region of the driving TFT is controlled by its gate voltage.

Here, the case where the source region of the driving TFT is connected to the power supply line and the drain region is connected to the EL element will be described as an example.

Since the source region of the driving TFT is connected to the power supply line, the same potential is input to each pixel in the pixel portion. At this time, when an analog signal is input to the source signal line, the difference between the potential of this signal voltage and the potential of the source region of the driving TFT becomes the gate voltage. EL
The current flowing through the element is determined by the gate voltage of the driving TFT. Here, the emission luminance of the EL element is proportional to the current flowing between both electrodes of the EL element. Thus, the EL element emits light under the control of the voltage of the analog video signal.

When the above operation is repeated and the input of the analog video signal to the source signal lines (S1 to Sx) ends, the first line period (L1) ends. Note that the source signal lines (S1 to S
The period until the input of the analog video signal to x) ends and the horizontal retrace line period may be combined into one line period. Next, in the second line period (L2), the gate signal line G
2 receives a selection signal. As in the first line period (L1), the source signal lines (S1 to
Sx) are sequentially input with analog video signals.

When selection signals are input to all gate signal lines (G1 to Gy), all line periods (L
1 to Ly) ends. When all line periods (L1 to Ly) are completed, one frame period is completed. All pixels perform display during one frame period to form one image. All the line periods (L1 to Ly) and the vertical retrace line period may be combined into one frame period.

As described above, the amount of light emitted from the EL element is controlled by the analog video signal, and gradation display is performed by controlling the amount of light emitted. This method is a so-called analog driving method, and gradation display is performed by changing the voltage of the analog video signal input to the source signal line.

Next, digital driving of the EL display device will be described. In the digital gradation method, the gate-source voltage Vg of the EL driving TFT 104 is set within a range in which no current flows through the EL element 106 (below the lighting start voltage) or a range in which the maximum current flows (above the luminance saturation voltage). 2
Works only in stages. That is, the EL element takes only the ON state and the OFF state.

In EL displays, a digital gradation method is mainly used in which variations in characteristics such as threshold values of TFTs hardly affect display. However, in the case of the digital gradation method, since it is possible to display only two gradations as it is, a plurality of techniques for achieving multiple gradations in combination with other methods have been proposed.

One of them is a method combining an area gradation method and a digital gradation method. The area gradation method is a method of producing gradation by controlling the area of the lighted portion. i.e. 1
Each pixel is divided into a plurality of sub-pixels, and the number and area of the lit sub-pixels are controlled to express gradation. A drawback of this method is that the number of sub-pixels cannot be increased, making it difficult to achieve high resolution and multiple gradations. Regarding the area gradation method, see Non-Patent Document 1
, Non-Patent Document 2 and the like.

As another method for achieving multiple gradations, there is a method that combines the time gradation method and the digital gradation method. The time gradation method is a method of producing gradation using the difference in lighting time. In other words, one frame period is divided into a plurality of subframe periods, and the number and length of the subframe periods in which the light is on are controlled to express gradation. (See Patent Document 1)

Non-Patent Document 3 reports on the combination of the digital gradation method, the area gradation method, and the time gradation method.

Next, constant-current driving and constant-voltage driving for gradation display using digital gradation will be described.

Constant current driving is a driving method in which the driving TFT 104 is operated in a saturation region when the EL element 106 is lit, and a constant current is supplied to all pixels. This driving method is the EL element 106
A constant current can be supplied to the EL element 106 even if the voltage-current characteristics change due to the deterioration of the EL display device, which is advantageous in that the life of the EL display device can be extended.

On the other hand, constant voltage driving is a driving method in which the driving TFT 104 is operated in a linear region when the EL element 106 is lit, and a constant voltage is supplied to all pixels. This driving method uses a driving T
Even if the characteristics of the FT 104 vary, since a constant voltage can be supplied to the EL element 106 in all pixels, there is an advantage that there is no unevenness in brightness between pixels and high display quality can be obtained.

JP-A-2001-324958

Euro Display 99 Late News: P71: "TFT-LEPD with Image Uniformity by Area Ratio Gray Scale" IEDM 99: P107: "Technology for Active Matrix Light Emitting Polymer Displays" IDW'99: P171: ``Low-Temperature Poly-Si TFT Driven Light-Emitting-Polymer Displays and Digital Gray Scale for Uniformity''

An object of the present invention is to provide a large-sized, high-resolution EL device that can be manufactured at a low cost with a good yield.
It is to provide a display device. For that purpose, the following problems exist.

First, as a method of driving an EL display device, problems in the case of combining digital gradation and time gradation will be described. When digital gradation and time gradation are combined, in order to express multiple gradations, one frame period is divided into a plurality of subframe periods, and the number and length of the subframe periods that are lit are controlled. to express gradation. In other words, compared to the time it takes to display one image with analog gradation, the time it takes to display one picture when digital gradation and time gradation are combined is longer. The time is reduced to 1/subframe number, and the driving circuit must be operated at a very high speed compared to analog gradation.

In addition, there is a limit to the operating frequency of the driving circuit, and if the number of subframes is too large or the resolution is too high, the writing time will be insufficient. That is, one of the problems when combining digital gradation and time gradation as a method of driving a display device is the lack of writing time. In order to achieve the object of the present invention, the write time should be made as long as possible.

Next, the problem of increased parasitic capacitance will be described. The larger the display device and the higher the resolution, the longer the wiring in the pixel portion, and the more the number of wirings intersecting with the wiring, the larger the parasitic capacitance attached to the wiring in the pixel portion.

When the parasitic capacitance increases, the waveform of the electrical signal transmitted to the wiring increases. The dullness of the waveform interferes with correct transmission of signals, resulting in deterioration of display quality. i.e.
One of the problems in obtaining a large-sized, high-resolution EL display device is an increase in parasitic capacitance.
In order to achieve the object of the present invention, the parasitic capacitance should be made as small as possible.

Next, problems for manufacturing at low cost will be described. At present, TFTs and electronic circuits using them are generally manufactured by laminating various thin films of semiconductors, insulators, conductors, etc. on a substrate and forming a predetermined pattern by appropriate photolithography technology. be. Photolithography technology is a technology that uses light to transfer a pattern such as a circuit formed on a transparent flat plate surface called a photomask using light-impermeable material onto a target substrate. It is widely used in manufacturing processes such as

The manufacturing process using photolithography technology involves exposing, developing, baking,
A multi-step process such as peeling is required. Therefore, as the number of photolithography steps increases, the manufacturing cost inevitably increases.

Next, the problem of wiring resistance will be described. First, the case of using analog driving as a driving method of the EL display device will be described.

FIG. 3 is a graph showing the characteristics of the driving TFT in the saturation region (Vds>Vg-Vth). Here, Vds is the source-drain voltage, Vg is the gate-source voltage, and Vth is the threshold voltage. 301 is called the Id-Vg characteristic (or Id-Vg curve). where Id is the drain current. From this graph, it is possible to know the amount of current that flows with respect to an arbitrary gate voltage.

In the analog driving method, a saturated region is used in the driving TFT, and the drain current is changed by changing the gate voltage.

The switching TFT is turned on, and an analog video signal input from the source signal line is applied to the gate electrode of the driving TFT in the pixel. Thus, the gate voltage of the driving TFT changes. At this time, according to the Id-Vg characteristic shown in FIG. 3, the drain current is determined on a one-to-one basis with respect to the gate voltage. Thus, a predetermined drain current flows through the EL element corresponding to the voltage of the analog video signal input to the gate electrode of the driving TFT, and the EL element emits light in an amount corresponding to the current amount.

As described above, the amount of light emitted from the EL element is controlled by the analog video signal, and gradation display is performed by controlling the amount of light emitted.

Here, even if the same signal is input from the source signal line, the gate voltage of the driving TFT of each pixel changes when the potential of the source region of the driving TFT changes. Here, the potential of the source region of the driving TFT is supplied from the power supply line. However, the potential of the power supply line changes depending on the position inside the pixel section due to the potential drop due to the wiring resistance.

In addition, when the wiring resistance of the power supply line is small, when the display device is relatively small,
If the current flowing through the power supply line is relatively small, this is not so much of a problem. Otherwise, especially if the display device is relatively large, the wiring resistance causes a large change in the potential of the power supply line.

In particular, as the size of the display device increases, the variation in the distance from the external input terminal to each power supply line of the pixel section increases. Therefore, the change in the potential of the power supply line becomes large due to the potential drop of the power supply line routing portion.

Variation in the potential of the power supply line due to these factors affects the light emission luminance of the EL element of each pixel and changes the display luminance, thereby causing display unevenness.

Specific examples of variations in the potential of the power supply line are shown below.

As shown in FIG. 4, when a white or black box was displayed on the display screen, a phenomenon called crosstalk occurred. This is a phenomenon in which a difference in luminance occurs in the horizontal direction of the box above or below the box.

Crosstalk occurs in the driving T
This is caused by the difference in the current flowing through the FT104. This difference is caused by the fact that the power supply lines V1 and V2 are arranged in parallel with the source signal lines S1 and S2.

For example, as shown in FIG. 4, when a white box is displayed on a part of the display screen, the power supply line corresponding to the pixel displaying the box displays the power supply line between the source and the drain of the driving TFT of the box display pixel. Compared to the power supply line that supplies power only to pixels that do not display boxes, the potential drop due to the wiring resistance of this power supply line due to the amount of current flowing through the EL element is
growing. Therefore, at the top and bottom of the box, portions darker than other pixels that do not display the box are generated.
Here, when the size of the display screen of the display device was small, no problem occurred, but when the size of the display screen of the display device increased, the EL
The sum of the currents flowing through the elements increases.

For example, comparing the sum of the currents flowing through the EL elements in a display device having a display screen with a diagonal of 4 inches and a display device having a display screen with a diagonal of 20 inches, the area of the latter display screen is 25 times that of the former. Therefore, the total current flowing through the EL element is also approximately 25 times larger.

Therefore, in a display device having a large display screen, the aforementioned potential drop problem becomes a serious problem.

For example, in a 20-inch display device, even if the wiring length is 700 mm, the wiring width is 10 mm, and the sheet resistance is 0.1 ohm, a current of about 1 A causes a potential drop of 10 V, making normal display impossible. .

Next, as a method for driving an EL display device, the problem of wiring resistance when using constant voltage driving in digital driving will be described.

When constant voltage driving is used, the voltage supplied to the EL element 106 is constant for each pixel.
The luminance of each pixel is not affected by variations in the characteristics of the driving TFT 104, and an EL display device having extremely high image quality display capability can be obtained. However, if the wiring resistance is large,
It becomes impossible to satisfy the condition necessary for constant voltage driving that the voltage supplied to the EL element 106 is constant for each pixel. This will be described with reference to FIGS. 5(A) and 5(B).

FIG. 5A shows the case where one-third of the total number of pixels are lit at the same time. FIG. 5B shows the case where two-thirds of the total number of pixels are lit at the same time.

5A and 5B differ in the number of pixels that are lit at the same time. A) and (B
). Here, if wiring resistance exists in the power supply lines (V1 to Vx) of the pixel portion, the voltage drops according to the magnitude of the current value. That is, (A) of FIG. 5 with different current values
and (B) of FIG. 5, the voltage supplied per pixel is different. The fact that the supplied voltages are different means that when the luminance of the EL element is displayed as shown in FIG.
This means that it is different from when it is displayed as shown in FIG. 5B.

Such a change in the luminance per pixel due to the lighting rate of the display image adversely affects the display of gradation by time gradation. For example, (A) in FIG. 5 and (B) in FIG.
) are continuously displayed for the same time to display three gradations. At this time, the display area 503 should display a gradation of 0, the display area 504 should display a gradation of 2, and the display area 505 should display a gradation of 1. However, if wiring resistance exists, the luminance per pixel in FIG. 5A is greater than that in FIG. 5A and FIG. also becomes smaller. Thus, if wiring resistance exists, intended gradation cannot be obtained in the case of using constant voltage driving in digital driving.

This luminance difference increases as the wiring resistance of the power supply lines (V1 to Vx) increases. As the size of the display device increases, the power supply line lengthens, and the wiring resistance increases. That is, one of the problems in obtaining a large EL display device with high resolution is an increase in wiring resistance. In order to achieve the object of the present invention, wiring resistance must be made as small as possible.

SUMMARY OF THE INVENTION An object of the present invention is to provide an active matrix type EL display device capable of vivid multi-gradation color display. Another object of the present invention is to provide a high-performance electronic equipment (electronic device) using such an active matrix EL display device.

An object of the present invention is to provide a large-sized, high-resolution EL device that can be manufactured at a low cost with a good yield.
It is to provide a display device. As a means for that purpose, the configuration of the present invention will be described below.

The configuration of the present invention includes a plurality of source signal lines, a plurality of gate signal lines, a plurality of power supply lines in the row direction, a plurality of power supply lines in the column direction, and a plurality of pixels in a matrix. Each of the pixels has a switching thin film transistor, a driving thin film transistor, and a light emitting element, and each of the plurality of pixels is connected to one of the plurality of power supply lines in the row direction and the plurality of power supply lines in the column direction. A thin film having insulating properties connected to one of the lines is provided for at least one of the plurality of source signal lines, the plurality of gate signal lines, the plurality of power supply lines in the row direction, and the plurality of power supply lines in the column direction. It is characterized by being formed in one lower part.

In the above invention, the electrode of the switching thin film transistor or the electrode of the driving thin film transistor may be formed by a droplet discharging method or a printing method. Further, any one of the plurality of source signal lines, the plurality of gate signal lines, the plurality of power supply lines in the row direction, and the plurality of power supply lines in the column direction may be formed by a droplet discharge method or a printing method. , sputtering method or C
It may be formed by the VD method. Here, the CVD method means a plasma CVD method (RF plasma CVD method, microwave CVD method, electron cyclotron resonance CVD method, hot filament CV
D method, etc.), LPCVD method, and thermal CVD method.

Alternatively, the insulating thin film may be formed by a droplet discharge method or a printing method.

In another configuration of the present invention, a plurality of source signal lines are formed, a plurality of gate signal lines are formed, a plurality of pixels are formed in a matrix, and each of the plurality of pixels is a switching thin film transistor, A driving transistor and a light-emitting element are provided, a plurality of power supply lines are formed in a row direction and a plurality of power supply lines are formed in a column direction, and each of a plurality of pixels is formed by a droplet discharge method or a printing method. , to one of a plurality of power supply lines in the row direction and to one of a plurality of power supply lines in the column direction.

Further, in the above invention, the insulating thin film is applied to the source signal line, the gate signal line, the plurality of power supply lines in the row direction, and the plurality of power supply lines in the column direction by a droplet discharge method or a printing method. It may be formed in at least one lower portion. Alternatively, any one of the plurality of source signal lines, the plurality of gate signal lines, the plurality of power supply lines in the row direction, and the plurality of power supply lines in the column direction may be formed by a droplet discharge method or a printing method. Alternatively, it may be formed by a sputtering method or a CVD method.

In another configuration of the present invention, a source signal line, a gate signal line, a power supply line, a switching thin film transistor, a driving thin film transistor, and a pixel including a light emitting element are formed, and an insulating element is formed. is formed under at least one of the source signal line, the gate signal line, and the power supply line.

In the above invention, the insulating thin film may be formed by a droplet discharge method or a printing method. Further, any one of the source signal line, the gate signal line, and the power supply line may be formed by a droplet discharging method or a printing method, or may be formed by a sputtering method or a CVD method.

The present invention also provides a personal computer, a television receiver, a camera, an image display device, a head-mounted display, and a portable information terminal using the display device according to the above invention.

According to the present invention, a large-sized, high-resolution EL that can be manufactured at a high yield and at a low cost
A display device can be provided. In addition, since a long signal writing time can be taken, an accurate signal can be input to the pixels, and a clear image can be displayed. In addition, since the influence of wiring resistance can be reduced, image quality defects due to wiring resistance can be reduced.

FIG. 3 is a diagram for explaining a pixel circuit of an EL display device; FIG. 4 is a diagram for explaining driving timing of analog driving; FIG. 4 is a diagram for explaining driving TFT characteristics; FIG. 4 is a diagram for explaining crosstalk by box display; FIG. 4 is a diagram for explaining the influence of potential effects due to wiring resistance of power supply lines; 4A and 4B are diagrams for explaining a configuration for reducing parasitic capacitance between wirings; FIG. FIG. 5 is a diagram for explaining a shape in which wiring resistance variation occurs; BRIEF DESCRIPTION OF THE DRAWINGS The figure explaining Embodiment 1 of this invention. FIG. 4 is a diagram for explaining a second embodiment of the present invention; FIG. 13 is a diagram for explaining a third embodiment of the present invention; FIG. 4 is a diagram for explaining a fourth embodiment of the present invention; FIG. 10 is a diagram for explaining a fifth embodiment of the present invention; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 1A and 1B are diagrams for explaining the configuration of a droplet discharge device that can be applied to the present invention; FIG. FIG. 4 is a top view of a pixel circuit of a display device that can be applied to the present invention; FIG. 10 illustrates a display device that can be applied to the present invention; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied; 4A and 4B are diagrams for explaining a display device to which the present invention can be applied; 1 is a top view of a panel which is one mode of a semiconductor device to which the present invention is applied; FIG. 1 is a block diagram showing the main configuration of an electronic device of the present invention; FIG. 1A and 1B are diagrams showing an electronic device to which the present invention is applied; FIG. 1A and 1B are diagrams showing an electronic device to which the present invention is applied; FIG. 1A and 1B are diagrams showing an electronic device to which the present invention is applied; FIG.

An embodiment of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art will easily understand that various changes can be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the descriptions of the embodiments shown below. In the configuration of the present invention described below, the same reference numerals are used in common for the same parts or parts having similar functions in different drawings, and repeated description thereof will be omitted.

In the present invention, there is no limitation on the types of applicable transistors, and thin film transistors (TFTs) using non-single-crystal semiconductor films typified by amorphous silicon and polycrystalline silicon,
A MOS transistor formed using a semiconductor substrate or an SOI (Silicon On Insulator) substrate, a junction transistor, a bipolar transistor, a transistor using an organic semiconductor or a carbon nanotube, and other transistors can be applied. In addition, there is no limitation on the type of substrate on which the transistor is arranged.
It can be arranged on an OI substrate, a glass substrate, or the like.

(Embodiment 1)
Embodiments of the present invention will be described with reference to FIGS. 13, 14, 15, 16, 8 and 6. FIG. First, one of the problems to be overcome in the present invention is to manufacture an EL display device at a low cost. In order to reduce the cost, the photolithography process is reduced and T
Attempts have been made to manufacture FT.

As a method for reducing the photolithography process, at least one or more of patterns necessary for manufacturing a display panel, such as a conductive layer for forming wiring layers or electrodes, and a mask layer for forming a predetermined pattern. is formed by a method capable of selectively forming a pattern, and a method of manufacturing a display device has been devised. As a method capable of selectively forming a pattern, a droplet discharge method (depending on the method, , also called the inkjet method). In addition, cost reduction can be realized by using a method capable of transferring or drawing a pattern, such as a printing method (a method of forming a pattern such as screen printing or offset printing). That is, one of the problems in obtaining an EL display device at low cost is the large number of photolithography steps. In order to achieve the object of the present invention, the number of photolithography steps should be minimized. As such a method, a method capable of selectively forming a pattern is effective.

Therefore, in the present embodiment, an EL element capable of selectively forming a pattern, which will be described below, is used.
Assume that an EL display device is manufactured by a droplet discharging method, which is one of manufacturing methods of a display device. However, this is an example, and the present embodiment is not limited only to this method.

First, a method for manufacturing a display device having a channel-protective thin film transistor in which means for improving adhesiveness is applied to manufacturing a gate electrode and a source or drain wiring will be described with reference to FIGS.

On the substrate 800, a base film 801 is formed as a base pretreatment to improve adhesion. As the substrate 800, a glass substrate made of barium borosilicate glass, aluminoborosilicate glass, or the like, a quartz substrate, a silicon substrate, a metal substrate, a stainless steel substrate, or a plastic substrate having heat resistance that can withstand the processing temperature of this manufacturing process is used. Further, polishing may be performed by a CMP (Chemical Mechanical Polishing) method or the like so that the surface of the substrate 800 is planarized. Note that an insulating layer may be formed over the substrate 800 . The insulating layer is formed as a single layer or a laminated layer using a silicon-containing oxide material or nitride material by a known method such as CVD, plasma CVD, sputtering, or spin coating. Although this insulating layer does not have to be formed, it has the effect of blocking contaminants and the like from the substrate 800 . In the case of forming a base layer for preventing contamination from the glass substrate, a base film 801 is formed as a pretreatment for the conductive layers 802 and 803 formed thereon by a droplet discharge method.

FIG. 15 shows one mode of a droplet ejection device used for pattern formation. Each head 905 of the droplet ejection means 903 is connected to a control means 907, which is controlled by a computer 910 to draw a pre-programmed pattern. The timing of drawing may be performed based on a marker 911 formed on the substrate 900, for example. Alternatively, the reference point may be determined using the edge of the substrate 900 as a reference. This is detected by an imaging means 904 such as a CCD, converted into a digital signal by an image processing means 909 , recognized by a computer 910 , a control signal is generated and sent to a control means 907 . Of course, the substrate 900
Information of the pattern to be formed on the surface is stored in the storage medium 908, and based on this information, a control signal is sent to the control means 907 to control the individual heads 905 of the droplet discharge means 903.
can be controlled individually. A single head can discharge and draw conductive materials, organic materials, inorganic materials, etc. When drawing over a wide area such as an interlayer film, the same material can be applied simultaneously from multiple nozzles to improve throughput. You can spit and draw. When a large-sized substrate is used, the head 905 can freely scan the substrate and freely set a drawing area, so that a plurality of the same patterns can be drawn on one substrate.

In this embodiment mode, a substance having a photocatalytic function is used as the base film having a function of improving adhesion. The photocatalyst material is a sol-gel dip coating method, a spin coating method, a droplet ejection method, an ion plating method, an ion beam method, a CVD method, a sputtering method, an RF magnetron sputtering method, a plasma thermal spray method, a plasma spray method,
Alternatively, it can be formed by an anodizing method. Also, the substance may not have continuity as a film depending on the method of formation. A photocatalyst material composed of an oxide semiconductor containing a plurality of metals can be formed by mixing and melting salts of constituent elements. When the photocatalyst material is formed by a coating method such as a dip coating method or a spin coating method, baking or drying may be performed when the solvent needs to be removed. Specifically, heating may be performed at a predetermined temperature (for example, 300° C. or higher), preferably in an atmosphere containing oxygen. For example, when Ag is used as a conductive paste and fired in an atmosphere containing oxygen and nitrogen, organic substances such as thermosetting resins are decomposed, so Ag containing no organic substances can be obtained. As a result, the flatness of the Ag surface can be improved.

This heat treatment allows the photocatalyst material to have a predetermined crystal structure. For example, it has anatase type and rutile-anatase mixed type. The anatase form is preferentially formed in the low temperature phase. Therefore, even if the photocatalyst material does not have a predetermined crystal structure, it can be heated.
Further, when forming by a coating method, the photocatalyst substance can be formed a plurality of times in order to obtain a predetermined film thickness.

In this embodiment, a case of forming a TiO _x (typically TiO ₂ ) crystal having a predetermined crystal structure by a sputtering method as a photocatalyst will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Furthermore, He gas may be introduced. In order to form TiO _x with high photocatalytic activity, the atmosphere should contain a lot of oxygen and the forming pressure should be high. Furthermore, it is preferable to form TiO _x while heating the deposition chamber or the substrate provided with the object to be processed.

TiOX thus formed has a photocatalytic function even if it is a very thin film (about 1 nm to 1 μm).

In addition, as other base pretreatments, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), M
It is preferable to form a base film 801 made of a metal material such as o (molybdenum) or its oxide.

The base film 801 may be formed with a thickness of 0.01 to 10 nm, but it may be formed very thin, so it does not necessarily have a layer structure. When a refractory metal material is used as the base film, after forming the conductive layers 802 and 803 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. should be treated.

As a first method, the base film 801 that does not overlap with the conductive layers 802 and 803 is insulated.
This is the step of forming an insulating layer. That is, the base film 801 that does not overlap with the conductive layers 802 and 803
is oxidized and insulated. In this way, when the base film 801 is oxidized to be insulated, it is preferable to form the base film 801 with a thickness of 0.01 to 10 nm, so that the oxidation can be easily performed. . As a method of oxidation, a method of exposure to an oxygen atmosphere may be used, or a method of performing heat treatment may be used.

A second method is a step of etching and removing the base film 801 using the conductive layers 802 and 803 as a mask. When using this process, there is no restriction on the thickness of the base film 801 .

Further, as another method of base pretreatment, there is a method of subjecting a formation region (formation surface) to plasma treatment. Plasma treatment conditions are as follows: air, oxygen or nitrogen is used as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (1330 Pa).
0 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (9
3100 Pa) to 800 Torr (106400 Pa), that is, in a state of atmospheric pressure or a pressure close to atmospheric pressure, a pulse voltage is applied. At this time, the plasma density is 1×10 ¹⁰ to
1×10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using a plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without depending on the material. As a result, any material can be surface-modified.

As another method, an organic material-based substance that functions as an adhesive may be formed in order to increase the adhesion between the pattern forming region and the pattern formed by the droplet discharge method. An organic material (organic resin material) (polyimide, acrylic) or siloxane may be used. Note that siloxane has a skeleton structure composed of a bond between silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (eg, alkyl group, aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as substituents.

Next, a composition containing a conductive material is discharged to form a conductive layer 80 that later functions as a gate electrode.
2, 803 is formed.

The droplet ejection means is a generic term for means having means for ejecting droplets, such as a nozzle having a composition ejection port or a head equipped with one or more nozzles. The diameter of the nozzle provided in the droplet ejection means is set to 0.02 to 100 μm (preferably 30 μm or less), and the ejection amount of the composition ejected from the nozzle is 0.001 pl to 100 pl (preferably 10 pl). below). The discharge amount increases in proportion to the diameter of the nozzle. Also, the distance between the object to be processed and the ejection port of the nozzle is preferably kept as close as possible so that the droplets can be dropped onto the desired location, preferably about 0.1 to 3 mm (preferably 1 mm or less). set.

A composition in which a conductive material is dissolved or dispersed in a solvent is used as the composition to be discharged from the discharge port.
The conductive material includes metals such as Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, and Al, metal sulfides of Cd and Zn, oxides such as Fe, Ti, Zr, and Ba, and halogens. Corresponds to silver halide fine particles or dispersible nanoparticles. It may contain oxides of Si and Ge. It also corresponds to indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, and the like, which are used as transparent conductive films. However, considering the specific resistance value, it is preferable to use a composition in which any one of gold, silver, and copper is dissolved or dispersed in a solvent, and more preferably, the composition to be ejected from the ejection port is , low resistance silver,
Copper should be used. However, when silver or copper is used, it is preferable to provide a barrier film as a countermeasure against impurities. A silicon nitride film or nickel boron (NiB) can be used as the barrier film.

Particles in which a conductive material is coated with another conductive material to form a plurality of layers may also be used. For example, particles having a three-layer structure in which nickel boron (NiB) is coated around copper and silver is coated around the nickel boron (NiB) may be used. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, and organic solvents such as methyl ethyl ketone and acetone are used. The viscosity of the composition is 50
A viscosity of mPa·S (cps) or less is preferable, and this is for preventing the occurrence of drying and enabling the composition to be smoothly discharged from the discharge port. Moreover, the surface tension of the composition is preferably 40 mN/m or less. However, the viscosity and the like of the composition may be appropriately adjusted according to the solvent to be used and the application. For example, a composition in which ITO, organic indium, or organic tin is dissolved or dispersed in a solvent has a viscosity of 5 to 50 mPa·S, and a composition in which silver is dissolved or dispersed in a solvent has a viscosity of 5 to 20 mPa·S. The viscosity of the composition in which gold is dissolved or dispersed in a solvent is 10
It is preferable to set to 20 mPa·S.

Also, the conductive layer may be formed by laminating a plurality of conductive materials. Alternatively, a conductive layer may be formed by a droplet discharge method using silver as a conductive material first, and then plated with copper or the like. Plating may be performed by electroplating or chemical (electroless) plating. For plating, the substrate surface may be immersed in a container filled with a solution containing the plating material, but the substrate should be placed diagonally (or vertically) so that the solution containing the plating material flows over the substrate surface. You can apply it. If plating is performed by standing the substrate and applying the solution, there is an advantage that the process equipment can be downsized.

Although it depends on the diameter of each nozzle and the desired pattern shape, the diameter of the conductive particles is preferably as small as possible in order to prevent clogging of the nozzles and to produce a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolysis method, an atomization method or a wet reduction method, and its particle size is generally about 0.01 to 10 μm. However, when formed by evaporation in gas, the nanomolecules protected by the dispersant are as fine as about 7 nm, and when the surface of each particle is covered with a coating agent, the nanoparticles aggregate in the solvent. It disperses stably at room temperature and exhibits almost the same behavior as a liquid. Therefore, it is preferred to use a coating agent.

When the step of discharging the composition is performed under reduced pressure, the solvent of the composition evaporates during the period from the time the composition is discharged until it lands on the object to be treated, and the subsequent steps of drying and baking are omitted. be able to. Moreover, it is preferable to carry out under reduced pressure because an oxide film or the like is not formed on the surface of the conductor. After discharging the composition, one or both of drying and baking are performed. Both the drying and baking steps are heat treatment steps. For example, drying is performed at 100 degrees for 3 minutes, and baking is performed at 200 to 350 degrees for 15 to 30 minutes. Time is different. The drying process and the baking process are performed under normal pressure or reduced pressure by laser light irradiation, instantaneous thermal annealing, a heating furnace, or the like. Note that the timing of performing this heat treatment is not particularly limited. In order to perform the drying and baking steps well, the substrate may be heated, and the temperature at that time depends on the material of the substrate, etc. ~ 350 degrees).
This step evaporates the solvent in the composition or chemically removes the dispersant, and causes the surrounding resin to cure and shrink, thereby bringing the nanoparticles into contact and accelerating fusion and fusion.

For laser light irradiation, a continuous oscillation or pulse oscillation gas laser or solid-state laser may be used. The former gas laser includes an excimer laser, and the latter solid laser includes a laser using a crystal such as YAG or _YVO4 doped with Cr, Nd, or the like. Note that a continuous wave laser is preferably used in view of the absorptance of laser light. Also, a so-called hybrid laser irradiation method that combines pulse oscillation and continuous oscillation may be used. However, depending on the heat resistance of the substrate 800, the heat treatment by laser light irradiation may
In order not to destroy the substrate 800, it is preferable to perform the step instantaneously for several microseconds to several tens of seconds.
Rapid thermal annealing (RTA) uses an infrared lamp or halogen lamp that irradiates ultraviolet light or infrared light in an inert gas atmosphere to rapidly raise the temperature for several minutes to several microseconds. Apply heat momentarily. Since this process is performed instantaneously, substantially only the outermost thin film can be heated, and the underlying films are not affected. In other words, it does not affect substrates with low heat resistance such as plastic substrates.

In addition, as a base pretreatment for a conductive layer formed using a droplet discharge method, the base film 801 described above is used.
Although the step of forming the is performed, this processing step may also be performed after forming the conductive layer.

Next, a gate insulating layer is formed over the conductive layers 802 and 803 (see FIG. 13A). The gate insulating layer may be formed of a known material such as a silicon oxide material or a silicon nitride material, and may be a stacked layer or a single layer. For example, a lamination of three layers of a silicon nitride film, a silicon oxide film, and a silicon nitride film, or a lamination of a single layer or two layers of these or a silicon oxynitride film may be used. In this embodiment mode, a silicon nitride film is used for the insulating layer 804 and a silicon nitride oxide film is used for the gate insulating layer 805 . Preferably, a silicon nitride film having a dense film quality is used. Further, when silver, copper, or the like is used for a conductive layer formed by a droplet discharging method, if a silicon nitride film or a NiB film is formed thereon as a barrier film, the diffusion of impurities can be prevented and the surface can be planarized. be. In order to form a dense insulating film with less gate leak current at a low film formation temperature, it is preferable to include a rare gas element such as argon in the reaction gas and mix it into the formed insulating film.

Subsequently, a composition containing a conductive material is selectively discharged over the gate insulating film to form a conductive layer (also referred to as a first electrode) 806 (see FIG. 13B). The conductive layer 806 is connected to the substrate 8
When light is emitted from the 00 side or when a transmissive EL display panel is manufactured, indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), oxide A predetermined pattern may be formed from a composition containing tin (SnO2) or the like, and the pattern may be formed by firing.

Further, it is preferably formed using indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), or the like by a sputtering method. More preferably, indium tin oxide containing silicon oxide is formed by a sputtering method using a target containing 2 to 10% by weight of silicon oxide in ITO. Alternatively, an oxide conductive material formed using a target in which 2 to 20% by weight of zinc oxide (ZnO) is mixed with indium oxide containing silicon oxide may be used. A conductive layer (first electrode) 8 is formed by a sputtering method.
After forming 06, a mask layer is formed using a droplet discharging method, and etching is performed to form a desired pattern. In this embodiment mode, the conductive layer 806 is formed using a light-transmitting conductive material by a droplet discharge method. formed using Although not shown, a photocatalytic substance may be formed in the region where the conductive layer 806 is to be formed, in the same manner as when the conductive layers 802 and 803 are formed. Adhesion is improved by the photocatalyst substance, and the conductive layer 806 can be formed by thinning into a desired pattern. This conductive layer 806 becomes a first electrode functioning as a pixel electrode.

In the present embodiment, the example of the three-layered gate insulating layer of a silicon nitride film made of silicon nitride, a silicon oxynitride film (silicon oxide film), and a silicon nitride film has been described above. As a preferred structure, a conductive layer (first electrode) 806 made of indium tin oxide containing silicon oxide is formed in close contact with an insulating layer made of silicon nitride included in the gate insulating layer 805, so that electroluminescence can be achieved. It is possible to increase the proportion of light emitted from the layer that is emitted to the outside.

In the case of a structure in which emitted light is emitted to the side opposite to the substrate 800 side, Ag (silver), Au (gold), and Cu (copper) are used in the case of manufacturing a reflective EL display panel. ), W (tungsten), and Al (aluminum). As another method, a transparent conductive film or a light-reflective conductive film is formed by a sputtering method, a mask pattern is formed by a droplet discharge method, and an etching process is combined to form the first electrode layer. good.

The conductive layer (first electrode) 806 may be cleaned by CMP, wiped with a polyvinyl alcohol-based porous body, and polished so that the surface thereof is flattened. Also, after polishing using the CMP method,
The surface of the conductive layer (first electrode) 806 may be subjected to ultraviolet irradiation, oxygen plasma treatment, or the like.

The semiconductor layer may be formed by known means (sputtering method, LP (Low Pressure) CVD method, plasma CVD method, or the like). Although the material of the semiconductor layer is not limited, it is preferable to use silicon, a silicon germanium (SiGe) alloy, or the like.

The semiconductor layer uses an amorphous semiconductor (typically hydrogenated amorphous silicon) or a crystalline semiconductor (typically polysilicon) as a material. For polysilicon, 800
so-called high-temperature polysilicon using polycrystalline silicon as a main material formed through a process temperature of 600° C. or higher, so-called low-temperature polysilicon using polysilicon as a main material formed at a process temperature of 600° C. or lower, and It contains crystalline silicon that is crystallized by adding an element that promotes crystallization.

Alternatively, a semi-amorphous semiconductor or a semiconductor containing a crystal phase in part of the semiconductor layer can be used as another substance. Semi-amorphous semiconductors are defined as amorphous and crystalline structures (single crystal,
It is a semiconductor with an intermediate structure between polycrystals), a semiconductor with a free energy stable third state, and a crystalline one with short-range order and lattice distortion. It typically contains silicon as the main component and, with lattice strain, has a Raman spectrum of 520 cm ^−
1 is a semiconductor layer shifted to the lower wave number side. At least 1 atomic % or more of hydrogen or halogen is included to terminate dangling bonds. Here, such a semiconductor is called a semi-amorphous semiconductor (hereinafter referred to as "SAS"). This SAS is also called a so-called microcrystalline semiconductor (typically microcrystalline silicon).

This SAS can be obtained by glow discharge decomposition (plasma CVD) of a silicide gas. A representative silicide gas is SiH ₄ , and also Si ₂ H ₆ , Si
H ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF ₄ and the like can be used. Also, G
eF ₄ and F ₂ may be mixed. By diluting this silicide gas with hydrogen, or hydrogen and one or more rare gas elements selected from helium, argon, krypton, and neon, the formation of SAS can be facilitated. The dilution rate of hydrogen with respect to the silicide gas is preferably, for example, 2 to 1000 times the flow ratio. Of course, formation of SAS by glow discharge decomposition is preferably carried out under reduced pressure, but it can also be formed using discharge at atmospheric pressure. Typically, the pressure may be in the range of 0.1 Pa to 133 Pa. The power supply frequency for forming glow discharge is 1 MHz to 120 MHz, preferably 13 MHz to
It is 60MHz. The high frequency power may be set as appropriate. The substrate heating temperature is preferably 300.degree. Here, as impurity elements mainly taken in during film formation, impurities derived from atmospheric components such as oxygen, nitrogen, and carbon are 1×
The oxygen concentration is desirably 10 ²⁰ cm ⁻³ or less, and in particular, the oxygen concentration is preferably 5×10 ¹⁹ cm ⁻³ or less, preferably 1×10 ¹⁹ cm ⁻³ or less. In addition, by including a rare gas element such as helium, argon, krypton, and neon to further promote lattice distortion, the stability increases and a good SAS can be obtained. Further, as a semiconductor layer, an SAS layer formed from a hydrogen-based gas may be laminated on an SAS layer formed from a fluorine-based gas.

When a crystalline semiconductor layer is used as the semiconductor layer, the crystalline semiconductor layer can be manufactured by a known method (laser crystallization method, thermal crystallization method, or heat treatment using an element such as nickel that promotes crystallization). crystallization method, etc.) may be used. In the case where an element that promotes crystallization is not introduced, the concentration of hydrogen contained in the amorphous silicon film is reduced to 1× by heating at 500° C. for 1 hour in a nitrogen atmosphere before irradiating the amorphous silicon film with laser light. Release to 10 ²⁰ atoms/cm ³ or less.
This is because if the amorphous silicon film containing a large amount of hydrogen is irradiated with laser light, the film will be destroyed.

The method of introducing the metal element into the amorphous semiconductor layer is not particularly limited as long as it is a method that allows the metal element to exist on the surface or inside the amorphous semiconductor layer.
D method, plasma treatment method (including plasma CVD method), adsorption method, and method of applying a metal salt solution can be used. Of these methods, the method using a solution is simple and useful in that it facilitates adjustment of the concentration of the metal element. At this time, in order to improve the wettability of the surface of the amorphous semiconductor layer and spread the aqueous solution over the entire surface of the amorphous semiconductor layer, UV irradiation in an oxygen atmosphere is performed.
It is desirable to form an oxide film by light irradiation, thermal oxidation, treatment with ozone water containing hydroxyl radicals or hydrogen peroxide, or the like.

Crystallization of the amorphous semiconductor layer may be performed by combining heat treatment and crystallization by laser light irradiation, or heat treatment or laser light irradiation may be performed a plurality of times.

An organic semiconductor using an organic material may be used as the semiconductor. As the organic semiconductor, low-molecular-weight materials, high-molecular materials, and the like are used, and materials such as organic dyes and conductive high-molecular materials can also be used.

In this embodiment mode, an amorphous semiconductor is used as the semiconductor. In order to form a semiconductor layer 807 which is an amorphous semiconductor layer and to form channel protective films 809 and 810, an insulating film is formed by, for example, a plasma CVD method, and selected to have a desired shape in a desired region. etching. At this time, the channel protective films 809 and 810 can be formed by exposing the substrate from the rear surface using the gate electrode as a mask. For the channel protective film, polyimide, polyvinyl alcohol, or the like may be dropped by a droplet discharge method. As a result, the exposure process can be omitted. After that, an N-type semiconductor layer 808 is formed using a semiconductor layer having one conductivity type such as an N-type amorphous semiconductor layer by plasma CVD or the like (see FIG. 13C). A semiconductor layer having one conductivity type may be formed as needed.

Inorganic materials (silicon oxide, silicon nitride, silicon oxynitride, silicon oxynitride, etc.), photosensitive or non-photosensitive organic materials (organic resin materials) (polyimide, acrylic,
Polyamide, polyimide amide, resist, benzocyclobutene, etc.), a low dielectric constant Low-k material, a film made of one or more kinds, or a lamination of these films can be used. Alternatively, an organic group (for example, an alkyl group or an aromatic hydrocarbon) whose skeleton structure is composed of a bond of silicon (Si) and oxygen (O) and which contains at least hydrogen as a substituent may be used. As a substituent, a fluoro group may be used, or an organic group containing at least hydrogen and a fluoro group may be used. As a manufacturing method when using an inorganic material for the channel protective film, a vapor phase growth method such as a plasma CVD method or a thermal CVD method, or a sputtering method can be used. Further, when an organic material is used, a droplet discharge method or a printing method (a method of forming a pattern such as screen printing or offset printing) can be used. An insulating film obtained by a coating method, an SOG film, or the like can also be used as the channel protection film.

Subsequently, mask layers 811 and 812 made of an insulator such as resist or polyimide are formed,
Using the mask layers 811 and 812, the semiconductor layer 807 and the N-type semiconductor layer 808 are simultaneously patterned.

Next, mask layers 813 and 814 made of an insulator such as resist or polyimide are formed by a droplet discharging method (see FIG. 13D). A through hole 818 is formed in part of the gate insulating layers 805 and 804 by etching using the mask layers 813 and 814, and a part of the conductive layer 803 functioning as a gate electrode layer is formed thereunder. expose part. Either plasma etching (dry etching) or wet etching may be employed for the etching process, but plasma etching is suitable for processing large-area substrates. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , NF ₃ , Cl ₂ or BCl ₃ may be used, and an inert gas such as He or Ar may be added as appropriate. Also, if atmospheric discharge etching is applied, local discharge machining is possible, and there is no need to form a mask layer over the entire surface of the substrate.

After removing the mask layers 813 and 814, a composition containing a conductive material is discharged to form the conductive layer 8.
15, 816, and 817 are formed, and using the conductive layers 815, 816, and 817 as masks, the N-type semiconductor layer is patterned to form an N-type semiconductor layer (see FIG. 14A). conductive layer 8
15, 816 and 817 function as wiring layers. Although not shown, the conductive layers 815 and 8
16 and 817, the above-described base pretreatment step of selectively forming a photocatalyst material or the like on portions where the conductive layers 815, 816, and 817 are in contact with the gate insulating layer 805 may be performed. Then, the conductive layer can be formed with good adhesion.

Further, as pre-underlying treatment of the conductive layer formed by the droplet discharge method, the step of forming the above-described underlying film may be performed, and this processing step may be performed after forming the conductive layer. This step improves the adhesion between the layers, so that the reliability of the display device can also be improved.

A conductive layer 817 is formed to function as a source and drain wiring layer and electrically connect to the previously formed first electrode. Further, a through hole 818 formed in the gate insulating layer 805
, the conductive layer 816 that is the source or drain wiring layer and the conductive layer 8 that is the gate electrode layer.
03 are electrically connected. Ag (silver),
A composition containing metal particles such as Au (gold), Cu (copper), W (tungsten), and Al (aluminum) as a main component can be used. Indium tin oxide (
ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, and the like may be combined.

The step of forming the through hole 818 in part of the gate insulating layers 805 and 804 is performed by
After forming 816 and 817, through holes 818 may be formed using the conductive layers 815, 816 and 817 as masks. Then, a conductive layer is formed in the through hole 818 to electrically connect the conductive layer 816 and the conductive layer 803 which is the gate electrode layer. In this case, there is an advantage that the process is simplified.

Subsequently, an insulating layer 820 serving as a partition is formed. Although not shown, a protective layer of silicon nitride or silicon nitride oxide may be formed over the entire surface under the insulating layer 820 so as to cover the thin film transistors. The insulating layer 820 is formed by forming an insulating layer on the entire surface by spin coating or dipping, and then etching to form openings as shown in FIG. 14B. Etching is not necessarily required if the insulating layer 820 is formed by a droplet discharge method. In the case of forming the insulating layer 820 or the like over a wide area by a droplet discharge method, a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device, and a plurality of lines are drawn so as to overlap each other. improves.

The insulating layer 820 is formed with through-hole openings corresponding to the positions where pixels are formed corresponding to the conductive layer 806 that is the first electrode. This insulating layer 820 is made of silicon oxide, silicon nitride,
Silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride and other inorganic insulating materials, or acrylic acid, methacrylic acid and their derivatives, or polyimide (po
lyimide), aromatic polyamides, polybenzimidazoles (polybenzim
idazole), or inorganic siloxane containing Si—O—Si bonds among compounds composed of silicon, oxygen, and hydrogen formed from siloxane-based materials as starting materials, and hydrogen on silicon is methyl or phenyl. It can be formed of an organic siloxane-based insulating material substituted with an organic group such as. When formed using a photosensitive or non-photosensitive material such as acrylic or polyimide, the side surface has a shape in which the radius of curvature changes continuously, and the upper thin film is formed without discontinuity, which is preferable.

Through the above steps, a TFT substrate for an EL display panel is completed in which a bottom gate type (also called an inverted staggered type) channel protection type TFT and a first electrode (first electrode layer) are connected on the substrate 800 . .

Before the electroluminescent layer 821 is formed, heat treatment is performed at 200° C. under atmospheric pressure to remove moisture adsorbed in or on the surface of the insulating layer 820 . In addition, heat treatment is performed at 200 to 400° C., preferably 250 to 350° C., under reduced pressure, and the electroluminescent layer 821 is preferably formed by a vacuum deposition method or a droplet discharge method under reduced pressure without being exposed to the atmosphere. .

For the electroluminescent layer 821, materials that emit red (R), green (G), and blue (B) light are used.
They are selectively formed by a vapor deposition method or the like using a vapor deposition mask. red (R), green (G
), a material that emits blue (B) light can be formed by a droplet discharge method (low-molecular-weight or high-molecular-weight material, etc.) in the same way as a color filter. In this case, RGB can be separately painted without using a mask. It is preferable because it can A conductive layer 8 which is a second electrode is formed on the electroluminescent layer 821 .
22 are laminated to complete a display device having a display function using a light-emitting element (FIG. 14 (
B)).

Although not shown, it is effective to provide a passivation film so as to cover the second electrode. Silicon nitride (SiN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y : x>y>0), silicon oxynitride (SiN _x O _y : x>y>0),
aluminum nitride (AlN), aluminum oxynitride (AlO _x N _y : x > y > 0), aluminum oxynitride with nitrogen content greater than oxygen content (AlN _x O _y : x > y > 0) or aluminum oxide , diamond-like carbon (DLC), nitrogen-containing carbon film (CN
_x ), and a single layer or a lamination of a combination of the insulating films can be used. For example, a laminate such as a nitrogen-containing carbon film (CN _x ) and silicon nitride (SiN), an organic material, or a polymer laminate such as styrene polymer may be used. A siloxane resin can also be used. Siloxane has a skeletal structure composed of bonds of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group,
aromatic hydrocarbons) are used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as substituents.

At this time, it is preferable to use a film with good coverage as the passivation film, and it is effective to use a carbon film, especially a DLC film. Since the DLC film can be formed in a temperature range from room temperature to 100° C. or less, it can be easily formed over the electroluminescent layer having low heat resistance. The DLC film is formed by plasma CVD (typically, RF plasma CVD, microwave C
VD method, electron cyclotron resonance (ECR) CVD method, hot filament CVD method, etc.),
It can be formed by a combustion flame method, a sputtering method, an ion beam vapor deposition method, a laser vapor deposition method, or the like. Reactive gases used for film formation include hydrogen gas and hydrocarbon-based gases (eg, CH ₄ , C ₂ H ₂ ,
C ₆ H ₆ or the like) is ionized by glow discharge, and the ions are accelerated and collided with a negative self-biased cathode to form a film. Also, the CN film may be formed by using C ₂ H ₄ gas and N ₂ gas as reaction gases. The DLC film has a high blocking effect against oxygen and can suppress oxidation of the electroluminescent layer. Therefore, it is possible to prevent the problem that the electroluminescent layer is oxidized during the ensuing sealing process.

A top view of a pixel portion of a display device of this embodiment mode is shown in FIG. 16A, and a circuit diagram thereof is shown in FIG. 1
001 and 1002 are TFTs, 1003 is a light emitting element, 1004 is a capacitive element, 1005 is a source signal line, 1006 is a gate signal line, and 1007 is a power supply line. The TFT 1001 is a transistor (hereinafter referred to as a "switching transistor" or "
It is also called switching TFT. ), and the TFT 1002 is a transistor (hereinafter also referred to as “driving transistor” or “driving TFT”) for controlling current flowing to the light emitting element.
, and the driving TFT is connected in series with the light emitting element. A capacitive element 1004 is a drive T
It holds the voltage between the source and the gate of the TFT 1002 which is an FT.

FIG. 17 shows details of the display device of this embodiment. A substrate 800 having a switching TFT 1001 and a driving TFT 1002 connected to a light emitting element 1003 is fixed to a sealing substrate 850 with a sealing material 851 . Various signals to be supplied to each circuit formed on the substrate 800 are supplied from a terminal portion.

A gate wiring layer 860 is formed in the terminal portion in the same step as the conductive layers 802 and 803 . Of course, the formation region of the gate wiring layer 860 is also formed with a photocatalyst material similarly to the conductive layers 802 and 803, and when the gate wiring layer 860 is formed by the droplet discharge method, the adhesion with the base formation region of the gate wiring layer 860 is maintained. can be improved. The etching for exposing the gate wiring layer 860 is
The formation of the through hole 818 in the gate insulating layer 805 can be performed at the same time. A flexible printed circuit board (FPC) 862 can be connected to the gate wiring layer 860 by an anisotropic conductive layer 861 .

Note that although the above display device shows the case where the light emitting element 1003 is sealed with a glass substrate, the sealing process is a process for protecting the light emitting element from moisture, and the light emitting element is mechanically sealed with a cover material. method, encapsulation with a thermosetting resin or ultraviolet light-curing resin, or encapsulation with a thin film having a high barrier capability such as a metal oxide or nitride. Glass, ceramics, plastic, or metal can be used as the cover material, but it must be translucent when light is emitted to the cover material side. Further, the cover material and the substrate on which the light-emitting element is formed are bonded together using a sealing material such as a thermosetting resin or an ultraviolet light-curable resin,
A closed space is formed by curing the resin by heat treatment or ultraviolet light irradiation treatment. It is also effective to provide a hygroscopic material represented by barium oxide in this sealed space. This hygroscopic material may be provided in contact with the sealing material, or may be provided on the partition wall or in the peripheral portion so as not to block the light from the light emitting element. Furthermore, it is also possible to fill the space between the cover material and the substrate on which the light-emitting elements are formed with a thermosetting resin or an ultraviolet light-curing resin. In this case, it is effective to add a hygroscopic material represented by barium oxide to the thermosetting resin or ultraviolet light-curable resin.

As described above, in this embodiment mode, steps can be omitted by not using a photoexposure step using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, an EL display panel can be easily manufactured even if a glass substrate of the fifth generation or later with a side exceeding 1000 mm is used. be able to.

Further, a highly reliable display device with improved adhesion and peeling resistance can be manufactured.

Circuit diagrams of the entire pixel portion in this embodiment mode are shown in FIGS. 8 and 16. FIG. This embodiment is characterized in that a plurality of source signal lines are provided for one column of vertical pixels. In FIG. 8, the case where one column of vertical pixels has three source signal lines will be described as an example.

Note that the number of source signal lines is not limited to three, and may be any number.

In FIG. 8, the circuit 854 of each pixel is described as the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to that shown in FIG.

A pixel in the first row and first column of the pixel portion includes a gate signal line G1, one of three source signal lines S1a, a power supply line V1, a switching TFT 1001, and a driving TFT1.
002 , an EL element 1003 , and a capacitor element 1004 .

The connection of the pixel with the circuit will be explained. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, one of the three source signal lines S1a is connected to the source or drain electrode of the switching TFT 1001, and the power supply line V1 is connected to the driving TFT.
connected to the source or drain electrode of 1002 and one electrode of the capacitive element 1004,
The other electrode of the capacitive element 1004 is connected to the other source or drain electrode of the switching TFT 1001 and the gate electrode of the driving TFT 1002.
The other source or drain electrode of 1002 is connected to EL element 1003 .

The pixel on the second row and first column of the pixel portion includes a gate signal line G2, one of three source signal lines S1b, a power supply line V1, a switching TFT 1001, and a driving TFT.
It has an FT 1002 , an EL element 1003 , and a capacitor element 1004 .

The pixel on the 2nd row and the 1st column of the pixel portion has G1 replaced by G2 and S
The configuration is characterized by replacing 1a with S1b.

The pixel in the 3rd row, 1st column of the pixel portion includes a gate signal line G3, one of the three source signal lines S1c, a power supply line V1, a switching TFT 1001, and a driving TFT1.
002 , an EL element 1003 , and a capacitor element 1004 .

The pixel on the 3rd row and the 1st column of the pixel portion has G1 replaced by G3 and S
The configuration is characterized by replacing 1a with S1c.

In the three pixel columns, G1, G2, and G3 are electrically connected.

Further, the first pixel column is characterized by repeating the above configuration.

In the second pixel row, V1 is replaced with V2, S1a is replaced with S2a, and S1b
is replaced with S2b, and S1c with S2c.

In addition, in the above configuration, the pixel column of the n-th column has V1 replaced with Vn, S1a replaced with Sna, and S1b
is replaced with Snb, and S1c is replaced with Snc.

Further, V1 to Vn are all electrically connected to each other.

We now describe how the circuit of FIG. 8 operates. First, the gate signal lines G1, G
2. Turn on G3 at the same time. While the gate signal lines G1, G2, and G3 are on, signals are written to the pixels by the source signal lines S1a, S1b, S1c, . . . , Sna, Snb, and Snc. Next, the gate signal lines G4, G5 and G6 are turned on simultaneously. Gate signal line G
4, while G5 and G6 are on, the source signal lines S1a, S1b, S1c, to , S
A signal is written to the pixel by na, Snb, and Snc. This operation is performed by the gate signal line Gm-2.
, Gm-1, and Gm. By the operation so far, the signal writing of one image is completed.

When operated in this manner, the gate signal lines operate in a set of three, so that the time during which the gate signal lines are on is tripled compared to a circuit with one signal line. That is, it is possible to overcome one of the problems to be overcome in the present invention, that the write time should be made as long as possible.

However, if they are connected as shown in FIG. 8, the parasitic capacitance between wirings may increase.

For this reason, in this embodiment, in addition to the configuration of FIG. 8, the process may be devised to take advantage of the manufacturing method capable of selectively forming patterns. In order to explain this, FIG. 6 is used as a diagram showing a cross section of the portion indicated by line segment 855 .

FIG. 6 shows a state in which the gate insulating layer 805 is formed in the above-described TFT manufacturing process (FIG. 13 (
A)) shows the process. Since there is no semiconductor layer in the above cross section, a conductive layer is usually formed after forming the gate insulating layer 605 (FIG. 6A). However, in this embodiment mode, after the formation of the gate insulating layer 605, pattern formation is selectively performed on the insulating layer in part of the locations where the three source signal lines are arranged by the droplet discharge method. (FIG. 6(B)). Thereafter, a conductive layer is deposited (FIG. 6(C)) and patterned in the same manner as described above.

By performing such a process, the source signal line 6 under which the insulating layer 606 exists is formed.
16 and source signal lines 615 and 617 with no insulating layer 606 underneath are formed. In this structure, the distance between the wirings is longer than when the insulating layer 606 is not provided, and the parasitic capacitance between the wirings can be reduced. That is, it is possible to overcome the problem that the parasitic capacitance should be as small as possible. Further, the longer the wiring, the greater the effect of the configuration of the present embodiment.

In this embodiment, the location, number, shape, etc., of forming the insulating layers can take various forms, but the purpose is to selectively form the insulating layers in order to increase the distance between the wirings in the same layer. can be anything as long as it does not deviate from
Moreover, the wiring on the insulating layer selectively formed is not limited to the source signal line. An insulating layer can be formed in a similar manner for gate signal lines and power supply lines, and parasitic capacitance can be reduced.

(Embodiment 2)
An embodiment of the present invention will be described with reference to FIGS. 9 and 16. FIG.

In FIG. 9, each pixel circuit 954 is described as being the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to that shown in FIG.

A pixel on the first row and first column of the pixel portion includes a gate signal line G1, a source signal line S1, a power supply line Vx1, a power supply line Vy1, a switching TFT 1001, and a driving TFT 100.
2, an EL element 1003, and a capacitor 1004. FIG.

The connection of the pixel with the circuit will be explained. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, the source signal line S1 is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the source or drain electrode of the driving TFT 1002 and the capacitive element 1004. The power supply line Vy1 is connected to the power supply line Vx1, and the other electrode of the capacitive element 1004 is connected to the switching TFT 10.
01 and the gate electrode of the driving TFT 1002 , and the other source or drain electrode of the driving TFT 1002 is connected to the EL element 10 .
03.

A pixel on the second row and first column of the pixel portion includes a gate signal line G2, a source signal line S1, a power supply line Vx1, a power supply line Vy2, a switching TFT 1001, and a driving TFT.
1002 , an EL element 1003 , and a capacitor element 1004 .

The pixel on the 2nd row and the 1st column of the pixel portion has G1 replaced by G2 and V
The configuration is characterized by replacing y1 with Vy2.

Further, the pixel on the m-th row and the first column of the pixel portion includes a gate signal line Gm, a source signal line S1, a power supply line Vx1, a power supply line Vym, a switching TFT 1001, and a driving TFT.
1002 , an EL element 1003 , and a capacitor element 1004 .

Further, the pixel in the first row and n column of the pixel portion has a configuration in which S1 is replaced with Sn and Vx1 is replaced with Vxn in the configuration of the pixel in the first row and first column.

Further, the pixel in the m-th row and n-th column of the pixel portion has a configuration in which S1 is replaced with Sn, Vx1 is replaced with Vxn, G1 is replaced with Gm, and Vy1 is replaced with Vym in the configuration of the pixel of the first row and first column. It is characterized by

Further, Vx1 to Vxn and Vy1 to Vyn are all electrically connected to each other.

In this embodiment, in FIG. 9, the power supply lines of the pixel portion are the source signal lines (S1 to Sn).
Not only the wirings (Vx1 to Vxn) arranged in parallel with the , but also the wirings (Vy1 to Vym) arranged in the vertical or almost vertical direction, and the pixel driving TFTs 100 are arranged from the respective directions.
2 is supplied with a voltage. Further, the power supply lines (Vy1 to Vym) arranged in the vertical direction or in the almost vertical direction are connected to the power supply lines (
Vx1 to Vxn) for each pixel, and the power supply lines are arranged in a matrix. As a result, the current flowing through the EL element 1003 is supplied not only in a direction parallel to the source signal lines (S1 to Sn) but also in a direction perpendicular to the source signal lines (S1 to Sn). The problem of having to make the resistance as small as possible can be overcome.

Since the wiring resistance can be reduced, crosstalk is reduced when the EL display device is analog-driven. In addition, when the EL display device is operated by combining digital driving and constant voltage driving, gradation display defects are reduced.

However, in this embodiment, as in the first embodiment, one of the problems to be overcome is to manufacture an EL display device at a low cost. It may be manufactured by an EL display device manufacturing process using a droplet discharge method, which is one of the manufacturing methods of .

Here, as a method for manufacturing an EL display device, problems in using a droplet discharge method for cost reduction will be described.

7A and 7B are top views ((A) and (B
)) and sectional views ((C) and (D)). When a composition containing a conductive material is ejected to form a conductive layer, it may not be formed in the intended location or shape due to the properties of the ejected conductive material, the water repellency of the base, errors in the ejection position, and the like. There is (Fig. 7 (B), (D)).

Here, the resistance of the wiring depends on the length and cross-sectional area of the wiring if the conductive material is the same.
If the intended shape is not obtained as shown in FIGS. 7B and 7D, the resistance value of the wiring becomes larger than the design value. In other words, the wiring formed by the droplet discharge method has a greater variation in wiring resistance than the wiring formed by photolithography.

As already mentioned, a large wiring resistance value causes crosstalk in the case of analog driving, and causes defective gradation display when using constant voltage driving in digital driving. , the degree of these display defects varies depending on the power supply line of the pixel. This can be easily observed as an uneven display.

That is, one of the problems in using the droplet discharge method for cost reduction is the variation in wiring resistance. In order to achieve the object of the present invention, the variation in wiring resistance must be minimized.

Here, it will be explained that by adopting this embodiment mode, variations in wiring resistance due to the droplet discharge method can also be reduced.

This can be explained by assuming that all the resistances of the wiring are connected in parallel when the power supply lines are arranged in a matrix. That is, if they are connected in parallel, the resistance of the power supply line up to a certain pixel depends on the resistance value of all the power supply lines, and the position dependence of the resistance that exists in the non-matrix pattern becomes smaller. be.

That is, according to the present embodiment, not only the wiring resistance of the power supply line must be reduced, but also the problem of minimizing the variation in the wiring resistance when the droplet discharge method is used is overcome. can do

In this embodiment, the wirings do not need to be parallel to each other, and may be in any direction. Also, the number of power supply lines does not need to be one for each pixel, and any number of lines may be used. In addition, the power supply lines do not have to form a matrix in the entire pixel portion, and may be in a portion of the pixel portion.

Further, this embodiment mode can be freely combined with the first embodiment mode.

(Embodiment 3)
An embodiment of the present invention will be described with reference to FIGS. 10 and 16. FIG.

In FIG. 10, the circuit 1054 of each pixel is described as the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to that shown in FIG.

A pixel in the first row and first column of the pixel portion includes a gate signal line G1, a source signal line S1, a power supply line Vx1, a power supply line Vy1R, a switching TFT 1001, and a driving TFT 10.
02, an EL element 1003, and a capacitor element 1004.

The connection of the pixel with the circuit will be explained. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, the source signal line S1 is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the source or drain electrode of the driving TFT 1002 and the capacitive element 1004. The power supply line Vy1R is connected to the power supply line Vx1, and the other electrode of the capacitive element 1004 is connected to the switching TFT1.
001 and the gate electrode of the driving TFT 1002 , and the other source or drain electrode of the driving TFT 1002 is connected to the EL element 1 .
003.

A pixel on the second row and first column of the pixel portion includes a gate signal line G2, a source signal line S1, a power supply line Vx1, a power supply line Vy2R, a switching TFT 1001, and a driving TF.
It has a T 1002 , an EL element 1003 and a capacitor element 1004 .

The pixel on the 2nd row and the 1st column has G1 replaced with G2 and Vy1R with V
It is characterized by being replaced with y2R.

Further, the pixel on the 3rd row and the 1st column of the pixel portion is replaced by G1 in the configuration of the pixel on the 1st row and the 1st column.
Second, Vy1R is replaced with Vy3R.

Further, pixels in the first column of the pixel portion are characterized by having a structure in which the structure of the above three rows is repeated.

Further, the pixel on the first row and the second column of the pixel portion is characterized by having a configuration in which S1 is replaced with S2, Vx1 is replaced with Vx2, and Vy1R is replaced with Vy1G in the configuration of the pixel of the first row and first column. .

Further, the pixel on the second row and the second column of the pixel portion is characterized by replacing G1 with G2 and Vy1G with Vy2G in the configuration of the pixel on the first row and the second column.

Further, the pixel on the 3rd row and the 2nd column of the pixel portion has a configuration in which G1 is replaced with G3 and Vy1G is replaced with Vy3G in the configuration of the pixel on the 1st row and the 2nd column.

Further, pixels in the second column of the pixel portion are characterized by having a structure in which the structure of the above three rows is repeated.

Further, the pixel on the first row and the third column of the pixel portion is characterized by having a configuration in which S1 is replaced with S3, Vx1 is replaced with Vx3, and Vy1R is replaced with Vy1B in the configuration of the pixel of the first row and first column. .

Further, the pixel on the second row and the third column of the pixel portion has a configuration in which G1 is replaced by G2 and Vy1B is replaced by Vy2B in the configuration of the pixel on the first row and the third column.

Further, the pixel on the third row and the third column of the pixel portion has a configuration in which G1 is replaced with G3 and Vy1B is replaced with Vy3B in the configuration of the pixel on the first row and the third column.

Further, the pixels in the third column of the pixel portion are characterized by having a structure in which the structure of the above three rows is repeated.

Further, Vy1R to VymR are all electrically connected to each other.

Further, Vy1G to VymG are all electrically connected to each other.

Further, Vy1B to VymB are all electrically connected to each other.

In this embodiment, the power supply lines of the pixel portion are not only the wirings (Vx1 to Vxn) arranged in parallel with the source signal lines (S1 to Sn), but also arranged in a vertical direction or a substantially vertical direction (
Vy1R to VymB), and drive TFs for R, G, and B pixels from respective directions.
A voltage is applied to the source or drain region of T1002. In addition, the power supply lines (Vy1 to Vym) arranged in a vertical direction or a substantially vertical direction are connected to the power supply lines (Vx1 to Vxn) for each of the R, G, and B pixels, and the power supply lines are arranged in a matrix. are placed in As a result, the current flowing through the EL element 1003 is changed to the source signal line (
S1 to Sn) are supplied not only in a direction parallel to them but also in a direction perpendicular to them. can do In addition, since they are connected for each of R, G, and B, the voltage to be supplied may be changed for each of R, G, and B.

Since the wiring resistance can be reduced, crosstalk is reduced when the EL display device is analog-driven. In addition, when the EL display device is operated by combining digital driving and constant voltage driving, gradation display defects are reduced.

However, in this embodiment, as in the first and second embodiments, EL can be obtained at a low cost.
Since manufacturing a display device is one of the problems to be overcome, it is manufactured by an EL display device manufacturing process using a droplet discharge method, which is one of the methods for manufacturing an EL display device in which patterns can be selectively formed. You may

As already described, when wiring is formed by the droplet discharge method, there is a problem that the wiring resistance varies. By adopting this embodiment mode, variations in wiring resistance due to the droplet discharge method can also be reduced.

This can be explained by assuming that all the resistances of the wiring are connected in parallel when the power supply lines are arranged in a matrix. That is, if they are connected in parallel, the resistance of the power supply line up to a certain pixel depends on the resistance value of all the power supply lines, and the position dependence of the resistance that exists in the non-matrix pattern becomes smaller. be.

That is, according to the present embodiment, not only the wiring resistance of the power supply line must be reduced, but also the problem of minimizing the variation in the wiring resistance when the droplet discharge method is used is overcome. can do

In this embodiment, the wirings do not need to be parallel to each other, and may be in any direction. Also, the number of power supply lines does not need to be one for each pixel, and any number of lines may be used. In addition, the power supply lines do not have to form a matrix in the entire pixel portion, and may be in a portion of the pixel portion.

Further, this embodiment mode can be freely combined with Embodiment Modes 1 and 2.

(Embodiment 4)
An embodiment of the present invention will be described with reference to FIGS. 11 and 16. FIG.

In FIG. 11, the circuit 1154 of each pixel is described as the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to that shown in FIG.

A pixel on the first row and first column of the pixel portion includes a gate signal line G1, a source signal line S1, a power supply line Vx1, a power supply line Vy1, a switching TFT 1001, and a driving TFT 100.
2, an EL element 1003, and a capacitor 1004. FIG.

The connection of the pixel with the circuit will be explained. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, the source signal line S1 is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the source or drain electrode of the driving TFT 1002 and the capacitive element 1004. The power supply line Vy1 is connected to the power supply line Vx1, and the other electrode of the capacitive element 1004 is connected to the switching TFT 10.
01 and the gate electrode of the driving TFT 1002 , and the other source or drain electrode of the driving TFT 1002 is connected to the EL element 10 .
03.

The pixel in the second row, first column of the pixel portion has a configuration in which G1 is replaced with G2 in the configuration of the pixel in the first row, first column. , Vx1 may not be connected to another power supply line.

The pixel on the third row and first column of the pixel portion has a configuration in which G1 is replaced with G3 in the configuration of the pixel on the first row and first column. , Vx1 may not be connected to another power supply line.

Further, the pixel on the 4th row and the 1st column of the pixel portion has a configuration in which G1 is replaced with G4 and Vy1 is replaced with Vy4 in the configuration of the pixel on the 1st row and the 1st column.

The pixel in the fifth row, first column of the pixel portion has a configuration obtained by replacing G4 with G5 in the configuration of the pixel in the fourth row, first column. , Vx1 may not be connected to another power supply line.

Further, the pixel in the 6th row, 1st column of the pixel portion has a configuration in which G4 in the configuration of the 4th row, 1st column pixel is replaced with G6. , Vx1 may not be connected to another power supply line.

Further, pixels in the first column of the pixel portion are characterized by having a structure in which the above structure for three rows is repeated.

The pixel in the first row and second column of the pixel portion has a configuration in which S1 is replaced with S2 and Vx1 is replaced with Vx2 in the configuration of the pixel in the first row and first column. Therefore, Vx2 may not be connected to another power supply line.

The pixel on the second row and second column of the pixel portion has a configuration in which G1 is replaced with G2 in the configuration of the pixel on the first row and second column, and Vx2 is connected to another power supply line Vy2. characterized by being

The pixel on the third row and second column of the pixel portion has a configuration in which G1 in the configuration of the pixel on the first row and second column is replaced with G3. , Vx2 may not be connected to another power supply line.

In addition, pixels in the second column of the pixel portion are characterized by having a structure in which the above structure for the three rows is repeated.

The pixel in the first row and the third column of the pixel portion has a configuration in which S1 is replaced with S3 and Vx1 is replaced with Vx3 in the configuration of the pixel in the first row and the first column. Therefore, Vx3 may not be connected to another power supply line.

The pixel in the second row and third column of the pixel portion has a configuration in which G1 is replaced with G2 in the configuration of the pixel in the first row and third column, and Vx3 is not connected to another power supply line. It is characterized by

The pixel on the third row and the third column of the pixel portion has a configuration obtained by replacing G1 with G3 in the configuration of the pixel on the first row and the third column. , Vx3 may be connected to another power supply line Vy3.

Further, the pixels in the third column of the pixel portion are characterized by having a structure in which the above structure for the three rows is repeated.

The remaining columns of the pixel portion are characterized in that the configurations of the first to third columns are repeated.

Vx1, Vx4, . . . , Vx(3i−2), Vy1, Vy4, .
3j-2) are all electrically connected to each other (i and j are natural numbers).

Vx2, Vx5, . . . , Vx(3i−1), Vy2, Vy5, .
3j-1) are all electrically connected to each other (i and j are natural numbers).

Vx3, Vx6, . . . , Vx(3i), Vy3, Vy6, .
) are all electrically connected to each other (i, j are natural numbers).

In this embodiment, the power supply lines of the pixel portion are not only the wirings (Vx1 to Vxn) arranged in parallel with the source signal lines (S1 to Sn), but also arranged in a vertical direction or a substantially vertical direction (
Vy1 to Vym), and drive TFTs 1 for R, G, and B pixels from respective directions.
002 is supplied with a voltage. In addition, the power supply lines (Vy1 to Vym) arranged in a vertical direction or a substantially vertical direction are connected to the power supply lines (Vx1 to Vxn) for each of the R, G, and B pixels, and the power supply lines are arranged in a matrix. are placed in As a result, the current flowing through the EL element 1003 is reduced to the source signal line (S1
∼Sn) is supplied not only in a parallel direction but also in a vertical direction. can be done. In addition, since they are connected for each of R, G, and B, the voltage to be supplied may be changed for each of R, G, and B.

In addition, since there is only one power supply line parallel to the gate signal line in each pixel, the wiring resistance can be reduced without significantly lowering the aperture ratio or increasing the parasitic capacitance between wirings.

Since the wiring resistance can be reduced, crosstalk is reduced when the EL display device is analog-driven. In addition, when the EL display device is operated by combining digital driving and constant voltage driving, gradation display defects are reduced.

However, in this embodiment, as in the first, second, and third embodiments,
Since manufacturing an EL display device at low cost is one of the problems to be overcome, an EL display device using a droplet discharge method, which is one of the methods for manufacturing an EL display device capable of selectively forming a pattern. It shall be produced by the production process.

As already described, when wiring is formed by the droplet discharge method, there is a problem that the wiring resistance varies. By adopting this embodiment mode, variations in wiring resistance due to the droplet discharge method can also be reduced.

This can be explained by assuming that all the resistances of the wiring are connected in parallel when the power supply lines are arranged in a matrix. That is, if they are connected in parallel, the resistance of the power supply line up to a certain pixel depends on the resistance value of all the power supply lines, and the position dependence of the resistance that exists in the non-matrix pattern becomes smaller. be.

That is, according to the present embodiment, not only the wiring resistance of the power supply line must be reduced, but also the problem of minimizing the variation in the wiring resistance when the droplet discharge method is used is overcome. can do

In this embodiment, the wirings do not have to be parallel to each other, and may be in any direction. Also, the number of power supply lines does not need to be one for each pixel, and any number of lines may be used. again,
The power supply lines do not need to form a matrix in the entire pixel section, and may be arranged in a portion of the pixel section.

Further, this embodiment mode can be freely combined with Embodiment Modes 1, 2, and 3.

(Embodiment 5)
The present embodiment is a combination of the first embodiment and the second, third, or fourth embodiment. The configuration at this time will be described with reference to FIGS. 12 and 16. FIG.

Circuit diagrams of the entire pixel portion in this embodiment mode are shown in FIGS. 12 and 16. FIG. This embodiment is characterized in that a plurality of source signal lines are provided for one column of vertical pixels. In Figure 8,
An example of a case where one vertical pixel column has three source signal lines will be described.

Note that the number of source signal lines is not limited to three, and may be any number.

In FIG. 12, the circuit 1254 of each pixel is described as the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to that shown in FIG.

A pixel in the first row and first column of the pixel portion includes a gate signal line G1, one of three source signal lines S1a, a power supply line Vx1, a power supply line Vy1R, and a switching TFT1.
001 , a driving TFT 1002 , an EL element 1003 , and a capacitor element 1004 .

The connection of the pixel with the circuit will be explained. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, one of the three source signal lines S1a is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the driving TF.
A power supply line Vy1R is connected to a power supply line Vx1, and the other electrode of the capacitor 1004 is connected to the other source or drain of the switching TFT 1001. The other source or drain electrode of the driving TFT 1002 is connected to the EL element 1003 .

A pixel on the second row and first column of the pixel portion includes a gate signal line G2, one of three source signal lines S1b, a power supply line Vx1, a power supply line Vy2R, and a switching line. T.
FT 1001, driving TFT 1002, EL element 1003, capacitive element 1004,
have.

The pixel on the 2nd row and the 1st column of the pixel portion has G1 replaced by G2 and S
1a is replaced with S1b, and Vy1R is replaced with Vy2R.

The pixel in the 3rd row, 1st column of the pixel portion includes a gate signal line G3, one of the three source signal lines S1c, a power supply line Vx1, a power supply line Vy3R, and a switching TFT1.
001 , a driving TFT 1002 , an EL element 1003 , and a capacitor element 1004 .

The pixel on the 3rd row and the 1st column of the pixel portion has G1 replaced by G3 and S
1a is replaced with S1c, and Vy1R is replaced with Vy3R.

In the three pixel columns, G1, G2, and G3 are electrically connected.

Further, the first pixel column is characterized by repeating the above configuration.

In addition, in the above configuration, Vx1 is changed to Vx2, S1a is changed to S2a, and S
1b to S2b, S1c to S2c, Vy1R to Vy1G, Vy2R to Vy2G, V
The connection is characterized by replacing y3R with Vy3G.

Further, in the above configuration, Vx1 is changed to Vx3, S1a is changed to S3a, and S
1b to S3b, S1c to S3c, Vy1R to VynB, Vy2R to Vy2B, V
The connection is characterized by replacing y3R with Vy3B.

Further, the third and subsequent pixel columns are characterized by repeating the configuration of the above three columns.

Further, Vy1R to VymR are all electrically connected to each other.

Further, Vy1G to VymG are all electrically connected to each other.

Further, Vy1B to VymB are all electrically connected to each other.

According to this embodiment, it is possible to overcome the problem that the write time described in the first embodiment must be made as long as possible. Also, it is possible to overcome the problem that the parasitic capacitance must be as small as possible.

Moreover, according to the present embodiment, the problem that the wiring resistance described in the second, third, or fourth embodiment must be minimized can be overcome. In addition, it is possible to overcome the problem that the variation in wiring resistance must be made as small as possible.

Further, according to this embodiment mode, since a droplet discharge method capable of selectively forming a pattern is used, an EL display device can be manufactured at a low cost.

(Embodiment 6)
An embodiment of the present invention will be described with reference to FIGS. 18 and 19. FIG. In this embodiment mode, a channel-etched thin film transistor is used as the thin film transistor in the first embodiment mode. Therefore, repeated description of the same parts or parts having similar functions will be omitted.

A base film 1201 having a function of improving adhesion is formed over a substrate 1200 (see FIG. 18A). Note that an insulating layer may be formed over the substrate 1200 . This insulating layer is used as a base film and may not be formed, but has the effect of blocking contaminants and the like from the substrate 1200 . In the case of forming a base layer for preventing contamination from the glass substrate, a base film 120 is formed as a pretreatment in the formation regions of the conductive layers 1202 and 1203 formed thereon by a droplet discharge method.
1 is formed.

In this embodiment mode, a substance having a photocatalytic function is used as the base film having a function of improving adhesion.

In this embodiment mode, a case of forming a _TiOx crystal having a predetermined crystal structure by a sputtering method as a photocatalyst material will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Furthermore, He gas may be introduced. In order to form TiO _X with high photocatalytic activity, the atmosphere should contain a large amount of oxygen and the formation pressure should be high. Furthermore, it is preferable to form TiO _X while heating the film formation chamber or the substrate provided with the object to be processed.

The _TiOx thus formed has a photocatalytic function even in a very thin film.

In addition, as other base pretreatments, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), M
It is preferable to form a base film 1201 made of a metal material such as o (molybdenum) or its oxide. The base film may be formed with a thickness of 0.01 to 10 nm, but it may be formed very thin, so it does not necessarily have a layered structure. When a refractory metal material is used as the base film, after forming the conductive layers 1202 and 1203 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. should be treated.

A first method is a step of insulating the base film 1201 that does not overlap with the conductive layers 1202 and 1203 to form an insulating layer. That is, the base film 1201 which does not overlap with the conductive layers 1202 and 1203 is oxidized to be insulated. In this way, when the base film 1201 is oxidized to be insulated, it is preferable to form the base film 1201 with a thickness of 0.01 to 10 nm, so that the oxidation can be easily performed. . As a method of oxidation, a method of exposure to an oxygen atmosphere may be used, or a method of performing heat treatment may be used.

A second method is a step of etching and removing the base film 1201 using the conductive layers 1202 and 1203 as masks. When using this process, there is no restriction on the thickness of the base film 1201 .

Further, as another method of base pretreatment, there is a method of subjecting a formation region (formation surface) to plasma treatment. Plasma treatment conditions are as follows: air, oxygen or nitrogen is used as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (1330 Pa).
0 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (9
3100 Pa) to 800 Torr (106400 Pa), that is, in a state of atmospheric pressure or a pressure close to atmospheric pressure, a pulse voltage is applied. At this time, the plasma density is 1×10 ¹⁰ to
1×10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using a plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without depending on the material. As a result, any material can be surface-modified.

As another method, an organic material-based substance that functions as an adhesive may be formed in order to increase the adhesion between the pattern formed by the droplet discharge method and the region where the pattern is formed. Organic materials (organic resin materials) (polyimide, acrylic), materials whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O), and which contain at least hydrogen as substituents, or fluorine, alkyl groups, Alternatively, a material containing at least one aromatic hydrocarbon may be used.

Next, a composition containing a conductive material is discharged to form a conductive layer 12 that will later function as a gate electrode.
02, forming 1203. The formation of the conductive layers 1202 and 1203 is performed using a droplet discharging means. Although silver is used as the conductive material in this embodiment mode, a laminate of silver and copper or the like may be used. A copper single layer may also be used.

In addition, as pre-treatment for a conductive layer formed using a droplet discharge method, the above-described base film 120 is formed.
1 was performed, this process step may also be performed after the conductive layer is formed.

Next, a gate insulating film is formed over the conductive layers 1202 and 1203 (see FIG. 18A).
. The gate insulating film may be formed of a known material such as a silicon oxide material or a silicon nitride material, and may be a laminated layer or a single layer.

Subsequently, a composition containing a conductive material is selectively discharged over the gate insulating film to form a conductive layer (also referred to as a first electrode) 1206 (see FIG. 18B). When light is emitted from the substrate 1200 side or when a transmissive EL display panel is manufactured, the conductive layer 1206 is
A predetermined pattern is formed from a composition containing indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO ₂ ), or the like, and is formed by firing. Also good. Although not shown, a photocatalytic substance may be formed in the region where the conductive layer 1206 is to be formed in the same manner as when the conductive layers 1202 and 1203 are formed. The photocatalyst material improves the adhesion, and the conductive layer 1206 can be formed by thinning into a desired pattern. This conductive layer 1206 becomes a first electrode functioning as a pixel electrode.

The semiconductor layer may be formed by known means (sputtering method, LPCVD method, plasma CVD method, or the like). Although the material of the semiconductor layer is not limited, it is preferable to use silicon, a silicon germanium (SiGe) alloy, or the like.

The semiconductor layer uses an amorphous semiconductor (typically hydrogenated amorphous silicon), a semi-amorphous semiconductor, a semiconductor containing a crystal phase in part of the semiconductor layer, a crystalline semiconductor (typically polysilicon), or an organic semiconductor. can be done.

In this embodiment mode, an amorphous semiconductor is used as the semiconductor. A semiconductor layer 1207 is formed, and a semiconductor layer having one conductivity type, for example, an N-type semiconductor layer 1208 is formed by plasma CVD or the like. (See FIG. 12(C)). A semiconductor layer having one conductivity type may be formed as needed.

Subsequently, mask layers 1211 and 1212 made of an insulator such as resist or polyimide are formed.
are patterned at the same time.

Next, mask layers 1213 and 1214 made of an insulator such as resist or polyimide are formed by a droplet discharge method (see FIG. 18D). Through holes 1218 are formed in part of the gate insulating layers 1205 and 1204 by etching using the mask layers 1213 and 1214, and part of the conductive layer 1203 functioning as a gate electrode layer is formed thereunder. expose part.

After removing the mask layers 1213 and 1214, a composition containing a conductive material is discharged to form conductive layers 1215, 1216 and 1217. Using the conductive layers 1215, 1216 and 1217 as masks, an N-type semiconductor layer is formed. Pattern processing is performed to form an N-type semiconductor layer (FIG. 19(A)
reference). Although not shown, a photocatalyst substance may be selectively formed in portions where the conductive layers 1215 , 1216 and 1217 are in contact with the gate insulating layer 1205 before forming the conductive layers 1215 , 1216 and 1217 . Then, the conductive layer can be formed with good adhesion.

The conductive layer 1217 functions as a source and drain wiring layer and is formed to be electrically connected to the previously formed first electrode, the conductive layer 1206 . Also, the gate insulating layer 120
5, a conductive layer 1216 which is a source or drain wiring layer
and the conductive layer 1203 which is a gate electrode layer are electrically connected.

The step of forming through-holes 1218 in part of the gate insulating layers 1205 and 1204 is performed on the conductive layer 1
After forming 215, 1216 and 1217, conductive layers 1215, 1216 and 12 which become the wiring layers are formed.
17 may be used as a mask to form through-holes 1218 . Then, a conductive layer is formed in the through hole 1218 to electrically connect the conductive layer 1216 which is the wiring layer and the conductive layer 1203 which is the gate electrode layer. In this case, there is an advantage that the process is simplified.

Subsequently, an insulating layer 1220 serving as a partition is formed. The insulating layer 1220 is formed by forming an insulating layer on the entire surface by a spin coating method or a dipping method, and then etching to form openings as shown in FIG. 19B. Etching is not necessarily required if the insulating layer 1220 is formed by a droplet discharging method.

The insulating layer 1220 is formed with through-hole openings corresponding to the positions where pixels are formed corresponding to the conductive layer 1206 which is the first electrode.

Through the above steps, a TFT substrate in which a bottom-gate (also called an inverted staggered) channel-etch TFT and a conductive layer 1206 as a first electrode are connected to each other on the substrate 1200 is completed.

An electroluminescent layer 1221 and a conductive layer 1222 are stacked over a conductive layer 1206 which is a first electrode, whereby a display device using a light-emitting element and having a display function is completed (see FIG. 19B).
.

As described above, in this embodiment mode, steps can be omitted by not using a photoexposure step using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, an EL display panel can be easily manufactured even if a glass substrate of the fifth generation or later with a side exceeding 1000 mm is used. be able to.

Further, a highly reliable display device with improved adhesion and peeling resistance can be manufactured.

(Embodiment 7)
An embodiment of the present invention will be described with reference to FIGS. 20 and 21. FIG. In this embodiment mode, a top-gate (also referred to as staggered) thin film transistor is used as the thin film transistor in Embodiment Mode 1. FIG. Therefore, repeated description of the same parts or parts having similar functions will be omitted.

A base film 1301 having a function of improving adhesion is formed over a substrate 1300 (see FIG. 20A). Note that an insulating layer may be formed over the substrate 1300 . Although this insulating layer may not be formed, it has the effect of blocking contaminants and the like from the substrate 1300 . In particular, in the case of a staggered thin film transistor as in this embodiment mode, the semiconductor layer is in direct contact with the substrate, so the base layer is necessary. In the case of forming a base layer for preventing contamination from a glass substrate, conductive layers 1315, 1316, and 1317 are formed thereon by a droplet discharge method.
A base film 1301 is formed as a pretreatment in the formation region of .

In this embodiment mode, a substance having a photocatalytic function is used as the base film 1301 having a function of improving adhesion.

In this embodiment mode, a case of forming a _TiOx crystal having a predetermined crystal structure by a sputtering method as a photocatalyst material will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Furthermore, He gas may be introduced. In order to form TiO _X with high photocatalytic activity, the atmosphere should contain a large amount of oxygen and the formation pressure should be high. Furthermore, it is preferable to form TiO _X while heating the film formation chamber or the substrate provided with the object to be processed.

The _TiOx thus formed has a photocatalytic function even in a very thin film.

In addition, as other base pretreatments, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), M
It is preferable to form a base film 1301 formed of a metal material such as o (molybdenum) or its oxide. The base film 1301 may be formed with a thickness of 0.01 to 10 nm.
It does not necessarily have a layered structure, as long as it is formed very thinly. Conductive layers 1315 and 13 functioning as source/drain wiring layers when a refractory metal material is used as the base film.
After forming 16 and 1317, it is desirable to treat the underlying film exposed on the surface by one of the following two processes.

As a first method, conductive layers 1315 and 1316 functioning as source/drain wiring layers
, 1317 to form an insulating layer. That is, the base film 1301 that does not overlap with the conductive layers 1315, 1316, and 1317 functioning as source/drain wiring layers is oxidized to be insulated. In this way, when the base film 1301 is oxidized to be insulated, it is preferable to form the base film 1301 with a thickness of 0.01 to 10 nm, so that the base film 1301 can be easily oxidized. . As a method of oxidation, a method of exposure to an oxygen atmosphere may be used, or a method of performing heat treatment may be used.

As a second method, conductive layers 1315 and 1316 functioning as source/drain wiring layers are formed.
, 1317 as a mask, the base film 1301 is removed by etching. When using this process, there is no restriction on the thickness of the base film 1301 .

Further, as another method of base pretreatment, there is a method of subjecting a formation region (formation surface) to plasma treatment. Plasma treatment conditions are as follows: air, oxygen or nitrogen is used as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (1330 Pa).
0 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (9
3100 Pa) to 800 Torr (106400 Pa), that is, in a state of atmospheric pressure or a pressure close to atmospheric pressure, a pulse voltage is applied. At this time, the plasma density is 1×10 ¹⁰ to
1×10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using a plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without depending on the material. As a result, any material can be surface-modified.

As another method, an organic material-based substance that functions as an adhesive may be formed in order to increase the adhesion between the pattern formed by the droplet discharge method and the region where the pattern is formed. A skeletal structure is composed of an organic material (organic resin material) (polyimide, acrylic) or a bond between silicon (Si) and oxygen (O). hydrogen) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as substituents.

Next, a composition containing a conductive material is discharged to form conductive layers 1315, 1316, and 1317 functioning as source/drain wiring layers. These conductive layers 1315, 1316, 1317
is formed using a droplet discharge means.

Ag (silver),
A composition containing metal particles such as Au (gold), Cu (copper), W (tungsten), and Al (aluminum) as a main component can be used. In particular, the source or drain wiring layer is preferably made to have a low resistance, so in consideration of the specific resistance value, any material of gold, silver, or copper dissolved or dispersed in a solvent should be used. is preferable, and silver and copper with low resistance are more preferable. The solvent corresponds to esters such as butyl acetate, alcohols such as isopropyl alcohol, organic solvents such as acetone, and the like. The surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

Subsequently, a composition containing a conductive material is selectively discharged to form a conductive layer (also referred to as a first electrode).
1306 is formed (see FIG. 20(A)). The conductive layer 1306 is made of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxide A predetermined pattern may be formed from a composition containing zinc (ZnO), tin oxide (SnO ₂ ), or the like, and the pattern may be formed by firing. Although not shown, conductive layers 1315 and 1316 are formed in the region where the conductive layer 1306 is to be formed.
, 1317, the photocatalytic material may be formed. By photocatalyst material,
Adhesion is improved, and the conductive layer 1306 can be formed by thinning into a desired pattern. This conductive layer 1306 becomes a first electrode functioning as a pixel electrode.

In addition, as pre-treatment for the conductive layer formed by the droplet discharge method, the above-described base film 130 is formed.
1 was performed, this process step may also be performed after the conductive layers 1315, 1316, 1317 are formed. For example, although not shown, if a titanium oxide film is formed and an N-type semiconductor layer is formed thereon, the adhesion between the conductive layer and the N-type semiconductor layer is improved.

After an N-type semiconductor layer is formed over the entire surface of the conductive layers 1315, 1316, and 1317, the N-type semiconductor layers between the conductive layers 1315 and 1316 and between the conductive layers 1316 and 1317 are covered with a resist. mask layers 1311, 1312, and 131 made of an insulator such as polyimide or the like
9 to etch away. A semiconductor layer having one conductivity type may be formed as needed. Then, a semiconductor layer 1307 made of an amorphous semiconductor (hereinafter referred to as AS) or SAS is formed by vapor phase epitaxy or sputtering. When the plasma CVD method is used, AS is formed using SiH ₄ or a mixed gas of SiH ₄ and H ₂ which is a semiconductor material gas. SAS is formed from a mixed gas diluted 3 to 1000 times with SiH ₄ and H ₂ . When the SAS is formed with this gas type, the crystallinity is better on the surface side of the semiconductor layer, and is suitable for combination with a top-gate type TFT in which the gate electrode is formed in the upper layer of the semiconductor layer.

Next, the gate insulating layer 1305 is formed to have a single layer structure or a laminated structure by plasma CVD or sputtering. As a particularly preferable mode, a three-layer laminate of an insulating layer made of silicon nitride, an insulating layer made of silicon oxide, and an insulating layer made of silicon nitride is formed as the gate insulating film.

Next, gate electrode layers 1302 and 1303 are formed by a droplet discharge method. Conductive materials for forming this layer include Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (
A composition containing metal particles such as aluminum) as a main component can be used.

A semiconductor layer 1307 and a gate insulating layer 1305 are mask layers 1 formed by a droplet discharge method.
313, 1314 are used to form source or drain wiring layers (conductive layers 1315, 1316, 1
317). That is, a semiconductor layer is formed so as to straddle the conductive layers 1315 and 1316 .

Next, conductive layers 1330 and 1331 are formed by a droplet discharging method, and the conductive layer 1316 and the gate electrode layer 1303 are electrically connected, and the conductive layer 1317 and the conductive layer 1306 which is the first electrode are electrically connected.

The drain or source wiring layer and the gate electrode layer may be directly connected by the gate electrode layer without using the conductive layer 1330 . In that case, before the gate electrode layers 1302 and 1303 are formed, through holes are formed in the gate insulating layer 1305 to expose part of the conductive layers 1316 and 1317 which are source or drain wirings. , 1303, and a conductive layer 1331 are formed by a droplet discharge method. At this time, the gate electrode layer 1303 becomes a wiring which also serves as the conductive layer 1330 and is connected to the conductive layer 1316 . Etching may be either dry etching or wet etching, but plasma etching, which is dry etching, is preferred.

Subsequently, an insulating layer 1320 serving as a partition is formed. Also, although not shown, the insulating layer 1320
A protective layer of silicon nitride or silicon oxynitride may be formed on the entire surface so as to cover the thin film transistors under the layer. The insulating layer 1320 is formed by forming an insulating layer on the entire surface by spin coating or dipping, and then etching to form openings as shown in FIG. Etching is not necessarily required if the insulating layer 1320 is formed by a droplet discharging method. In the case of forming the insulating layer 1320 or the like over a wide area by a droplet discharge method, a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device, and a plurality of lines are drawn so as to overlap each other. improves.

The insulating layer 1320 is formed with through-hole openings corresponding to the positions where the pixels are formed corresponding to the conductive layer 1306 which is the first electrode.

Through the above steps, a TFT substrate is completed in which a top gate type (also called an inverted staggered type) TFT and a conductive layer 1306 which is a first electrode layer are connected to each other on the substrate 1300 .

Before the electroluminescent layer 1321 is formed, heat treatment is performed at 200° C. under atmospheric pressure to form the insulating layer 132 .
Removes moisture adsorbed in the 0 or on its surface. 200 to 400°C under reduced pressure
, preferably at 250 to 350° C., and the electroluminescent layer 13 is formed without being exposed to the atmosphere.
21 is preferably formed by a vacuum vapor deposition method or a droplet discharge method under reduced pressure.

An electroluminescent layer 1321 and a conductive layer 1322 are stacked over a conductive layer 1306 which is a first electrode, whereby a display device having a display function using a light-emitting element is completed (see FIG. 21).

As described above, in this embodiment mode, steps can be omitted by not using a photoexposure step using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, an EL display panel can be easily manufactured even if a glass substrate of the fifth generation or later with a side exceeding 1000 mm is used. be able to.

Further, a highly reliable display device with improved adhesion and peeling resistance can be manufactured.

(Embodiment 8)
An embodiment of the present invention will be described with reference to FIGS. 22 and 23. FIG. This embodiment differs from Embodiment 1 in the connection structure between the thin film transistor and the first electrode.
Therefore, repeated description of the same parts or parts having similar functions will be omitted.

On the substrate 1400, a base film 1401 for improving adhesion is formed as base pretreatment. In this embodiment mode, a case of forming a _TiOx crystal having a predetermined crystal structure by a sputtering method as a photocatalyst material will be described. A metal titanium tube is used as the target,
Sputtering is performed using argon gas and oxygen. Furthermore, He gas may be introduced. In order to form TiO _X with high photocatalytic activity, the atmosphere should contain a large amount of oxygen and the formation pressure should be high. Furthermore, it is preferable to form TiO _X while heating the film formation chamber or the substrate provided with the object to be processed.

The _TiOx thus formed has a photocatalytic function even in a very thin film.

In addition, as other base pretreatments, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), M
It is preferable to form a base film 1401 made of a metal material such as o (molybdenum) or its oxide. The base film 1401 may be formed with a thickness of 0.01 to 10 nm.
It does not necessarily have a layered structure, as long as it is formed very thinly. When a refractory metal material is used as the base film, after forming the conductive layers 1402 and 1403 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. should be treated.

A first method is a step of insulating the base film 1401 which does not overlap with the conductive layers 1402 and 1403 to form an insulating layer. That is, the base film 1401 which does not overlap with the conductive layers 1402 and 1403 is oxidized to be insulated. In this way, when the base film 1401 is oxidized to be insulated, it is preferable to form the base film 1401 with a thickness of 0.01 to 10 nm, so that the oxidation can be easily performed. . As a method of oxidation, a method of exposure to an oxygen atmosphere may be used, or a method of performing heat treatment may be used.

A second method is a step of etching and removing the base film 1401 using the conductive layers 1402 and 1403 as masks. When using this process, there is no restriction on the thickness of the base film 1401 .

Further, as another method of base pretreatment, there is a method of subjecting a formation region (formation surface) to plasma treatment. Plasma treatment conditions are as follows: air, oxygen or nitrogen is used as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (1330 Pa).
0 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (9
3100 Pa) to 800 Torr (106400 Pa), that is, in a state of atmospheric pressure or a pressure close to atmospheric pressure, a pulse voltage is applied. At this time, the plasma density is 1×10 ¹⁰ to
1×10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using a plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without depending on the material. As a result, any material can be surface-modified.

As another method, an organic material-based substance that functions as an adhesive may be formed in order to increase the adhesion between the pattern formed by the droplet discharge method and the region where the pattern is formed. Organic materials (organic resin materials) (polyimide, acrylic), materials whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O), and which contain at least hydrogen as substituents, or fluorine, alkyl groups, Alternatively, a material containing at least one aromatic hydrocarbon may be used.

Next, a composition containing a conductive material is discharged to form a conductive layer 14 that later functions as a gate electrode.
02, forming 1403. The formation of the conductive layers 1402 and 1403 is performed using a droplet discharging means. Although silver is used as the conductive material in this embodiment mode, a laminate of silver and copper or the like may be used. A copper single layer may also be used.

In addition, as pre-treatment for a conductive layer formed using a droplet discharge method, the above-described base film 140 is formed.
1 was performed, this process step may also be performed after the conductive layer is formed.

Next, a gate insulating film is formed over the conductive layers 1402 and 1403 (see FIG. 22A).
. The gate insulating film may be formed of a known material such as a silicon oxide material or a silicon nitride material, and may be a laminated layer or a single layer.

The semiconductor layer may be formed by known means (sputtering method, LPCVD method, plasma CVD method, or the like). Although the material of the semiconductor layer is not limited, it is preferable to use silicon, a silicon germanium (SiGe) alloy, or the like.

The semiconductor layer uses an amorphous semiconductor (typically hydrogenated amorphous silicon), a semi-amorphous semiconductor, a semiconductor containing a crystal phase in part of the semiconductor layer, a crystalline semiconductor (typically polysilicon), or an organic semiconductor. can be done.

In this embodiment mode, an amorphous semiconductor is used as the semiconductor. forming a semiconductor layer 1407;
In order to form the channel protective films 1409 and 1410, an insulating film is formed by plasma CVD, for example, and selectively etched in a desired region to have a desired shape. Also, the channel protective film may be formed of polyimide, polyvinyl alcohol, or the like using a droplet discharge method or a printing method (a method of forming a pattern such as screen printing or offset printing).
After that, a semiconductor layer having one conductivity type, for example, the N-type semiconductor layer 14 is formed by plasma CVD or the like.
08 is formed. A semiconductor layer having one conductivity type may be formed as needed.

Subsequently, mask layers 1411 and 1412 made of an insulator such as resist or polyimide are formed.
are patterned at the same time.

Next, mask layers 1413 and 1414 made of an insulator such as resist or polyimide are formed by a droplet discharge method (see FIG. 22C). Through holes 1418 are formed in part of the gate insulating layers 1405 and 1404 by etching using the mask layers 1413 and 1414, and a part of the conductive layer 1403 functioning as a gate electrode layer is formed thereunder. expose part. Either plasma etching (dry etching) or wet etching may be employed for the etching process, but plasma etching is suitable for processing large-area substrates. Also, if atmospheric discharge etching is applied, local discharge machining is possible, and there is no need to form a mask layer over the entire surface of the substrate.

After removing the mask layers 1413 and 1414, a composition containing a conductive material is discharged to form conductive layers 1415, 1416 and 1417. Using the conductive layers 1415, 1416 and 1417 as masks, an N-type semiconductor layer is formed. Pattern processing is performed (see FIG. 22(D)). Although not shown, the conductive layers 1415 , 1416 , 1416 , 1416 , 1416
The above-described base pretreatment step of selectively forming a photocatalyst material or the like in a portion where 1417 is in contact with the gate insulating layer 1405 may be performed. Also, after formation, the surface may be subjected to surface pretreatment. By this step, the conductive layer can be formed with good adhesion to the upper and lower layers to be laminated.

Conductive layers 1415, 1416, and 1417, which are wiring layers, are formed as shown in FIG.
The N-type semiconductor layer is formed so as to cover the semiconductor layer. Since the semiconductor layer is etched, there is a risk that the wiring layer will not be able to cover the area where there is a sharp step, resulting in disconnection. Therefore, in order to reduce the steps, insulating layers 1441, 1442, and 1443 may be formed to smooth the steps. The insulating layers 1441, 1442, and 1443 can be selectively formed without a mask or the like by using a droplet discharging method. The insulating layers 1441, 1442, and 1443 reduce the steps, and the wiring layers covering them can be formed with good coverage without defects such as disconnection. The insulating layers 1441, 1442, and 1443 are made of silicon oxide, silicon nitride, silicon oxynitride,
Aluminum oxide, aluminum nitride, aluminum oxynitride and other inorganic insulating materials, or acrylic acid, methacrylic acid and their derivatives, or polyimide
), aromatic polyamide, polybenzimidazole
), or silicon, oxygen, formed from a siloxane-based material as a starting material,
Inorganic siloxane containing a Si—O—Si bond among compounds composed of hydrogen, and organic siloxane insulating material in which hydrogen on silicon is substituted with an organic group such as methyl or phenyl can be used.

Subsequently, a conductive layer 1 functioning as a source/drain wiring layer is selectively formed on the gate insulating film.
A composition containing a conductive material is discharged so as to be in contact with 417 to form a conductive layer (also referred to as a first electrode) 1406 (see FIG. 23A). When light is emitted from the substrate 1400 side or when a transmissive EL display panel is manufactured, the conductive layer 1406 includes indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxide Zinc (ZnO),
A predetermined pattern may be formed from a composition containing tin oxide (SnO2) or the like, and the pattern may be formed by firing. Although not shown, the conductive layers 1402 and 140 are formed in the region where the conductive layer 1406 is to be formed.
As in the case of forming 3, pretreatment of the base such as formation of a photocatalyst material may be performed. The base pretreatment improves the adhesiveness, and the conductive layer 1406 can be formed by thinning into a desired pattern. This conductive layer 1406 becomes a first electrode functioning as a pixel electrode.

In addition, the conductive layer 1416 which is a source or drain wiring layer and the conductive layer 1403 which is a gate electrode layer are electrically connected through a through hole 1418 formed in the gate insulating layer 1405 . Examples of conductive materials for forming this wiring layer include Ag (silver), Au (gold), Cu (copper),
A composition containing metal particles such as W (tungsten) and Al (aluminum) as a main component can be used. Alternatively, light-transmitting indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

Further, after forming the conductive layers 1415, 1416, 1417, and 1406, the conductive layers 1415, 1415
Through holes 1418 may be formed using 416, 1417 and 1406 as a mask. Then, a conductive layer is formed in the through hole 1418, and a conductive layer 1416 and a conductive layer 140 which is a gate electrode layer are formed.
3 are electrically connected.

Subsequently, an insulating layer 1420 serving as a partition is formed. Also, although not shown, the insulating layer 1420
A protective layer of silicon nitride or silicon oxynitride may be formed on the entire surface so as to cover the thin film transistors under the layer. The insulating layer 1420 is formed by forming an insulating layer on the entire surface by a spin coating method or a dipping method, and then etching to form openings as shown in FIG. 23(B). Etching is not necessarily required if the insulating layer 1420 is formed by a droplet discharging method. In the case of forming the insulating layer 1420 or the like over a wide area by a droplet discharge method, a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device, and a plurality of lines are drawn so as to overlap each other. improves.

The insulating layer 1420 is formed with through-hole openings corresponding to the positions where the pixels are formed corresponding to the conductive layer 1406 which is the first electrode.

Through the above steps, a TFT for EL display panel in which a bottom-gate type (also called an inverted staggered type) channel protective TFT and a conductive layer (first electrode layer) 1406 are connected on the substrate 1400 is formed.
The FT board is completed.

An electroluminescent layer 1421 and a conductive layer 1422 are stacked over the conductive layer 1406, which is the first electrode, to complete a display device using a light-emitting element and having a display function (see FIG. 23B).

As described above, in this embodiment mode, steps can be omitted by not using a photoexposure step using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, an EL display panel can be easily manufactured even if a glass substrate of the fifth generation or later with a side exceeding 1000 mm is used. be able to.

Further, a highly reliable display device with improved adhesion and peeling resistance can be manufactured.

(Embodiment 9)
An embodiment of the present invention will be described with reference to FIGS. 24 and 25. FIG. This embodiment mode differs from Embodiment Mode 6 in the connection structure between the thin film transistor and the first electrode.
Therefore, repeated description of the same parts or parts having similar functions will be omitted.

On the substrate 1500, a base film 1501 for improving adhesion is formed as base pretreatment. In this embodiment mode, a case of forming a _TiOx crystal having a predetermined crystal structure by a sputtering method as a photocatalyst material will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Furthermore, He gas may be introduced. In order to form TiO _X with high photocatalytic activity, the atmosphere should contain a large amount of oxygen and the formation pressure should be high. Furthermore, it is preferable to form TiO _X while heating the film formation chamber or the substrate provided with the object to be processed.

The _TiOx thus formed has a photocatalytic function even in a very thin film.

In addition, as other base pretreatments, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), M
It is preferable to form a base film 1501 formed of a metal material such as o (molybdenum) or its oxide. The base film 1501 may be formed with a thickness of 0.01 to 10 nm.
It does not necessarily have a layered structure, as long as it is formed very thinly. When a refractory metal material is used as the base film, after forming the conductive layers 1502 and 1503 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. should be treated.

A first method is a step of insulating the base film 1501 which does not overlap with the conductive layers 1502 and 1503 to form an insulating layer. That is, the base film 1501 that does not overlap with the conductive layers 1502 and 1503 is oxidized to be insulated. When the base film 1501 is to be oxidized and insulated in this way, it is preferable to form the base layer 01 with a thickness of 0.01 to 10 nm, so that the base film 1501 can be easily oxidized. . As a method of oxidation, a method of exposure to an oxygen atmosphere may be used, or a method of performing heat treatment may be used.

A second method is a step of etching and removing the base film 1501 using the conductive layers 1502 and 1503 as masks. When using this process, there is no restriction on the thickness of the base film 1501 .

Further, as another method of base pretreatment, there is a method of subjecting a formation region (formation surface) to plasma treatment. Plasma treatment conditions are as follows: air, oxygen or nitrogen is used as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (1330 Pa).
0 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (9
3100 Pa) to 800 Torr (106400 Pa), that is, in a state of atmospheric pressure or a pressure close to atmospheric pressure, a pulse voltage is applied. At this time, the plasma density is 1×10 ¹⁰ to
1×10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using a plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without depending on the material. As a result, any material can be surface-modified.

As another method, an organic material-based substance that functions as an adhesive may be formed in order to increase the adhesion between the pattern formed by the droplet discharge method and the region where the pattern is formed. Organic materials (organic resin materials) (polyimide, acrylic), materials whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O), and which contain at least hydrogen as substituents, or fluorine, alkyl groups, Alternatively, a material containing at least one aromatic hydrocarbon may be used.

Next, a composition containing a conductive material is discharged to form a conductive layer 15 that later functions as a gate electrode.
02, forming 1503. The formation of the conductive layers 1502 and 1503 is performed using a droplet discharging means. Although silver is used as the conductive material in this embodiment mode, a laminate of silver and copper or the like may be used. A copper single layer may also be used.

In addition, as pre-treatment for a conductive layer formed using a droplet discharge method, the above-described base film 150 is formed.
1 was performed, this process step may also be performed after the conductive layer is formed.

Next, a gate insulating film is formed over the conductive layers 1502 and 1503 (see FIG. 24A).
. The gate insulating film may be formed of a known material such as a silicon oxide material or a silicon nitride material, and may be a laminated layer or a single layer.

The semiconductor layer may be formed by known means (sputtering method, LPCVD method, plasma CVD method, or the like). Although the material of the semiconductor layer is not limited, it is preferable to use silicon, a silicon germanium (SiGe) alloy, or the like.

The semiconductor layer uses an amorphous semiconductor (typically hydrogenated amorphous silicon), a semi-amorphous semiconductor, a semiconductor containing a crystal phase in part of the semiconductor layer, a crystalline semiconductor (typically polysilicon), or an organic semiconductor. can be done.

In this embodiment mode, an amorphous semiconductor is used as the semiconductor. forming a semiconductor layer 1507;
A semiconductor layer having one conductivity type, for example, an N-type semiconductor layer 1508 is formed by plasma CVD or the like. A semiconductor layer having one conductivity type may be formed as needed.

Subsequently, mask layers 1511 and 1512 made of an insulator such as resist or polyimide are formed.
are patterned at the same time (see FIG. 24(B)).

Next, mask layers 1513 and 1514 made of an insulator such as resist or polyimide are formed by a droplet discharging method (see FIG. 24C). Through holes 1518 are formed in part of the gate insulating layers 1505 and 1504 by etching using the mask layers 1513 and 1514, and part of the conductive layer 1503 functioning as a gate electrode layer is formed thereunder. expose part. Either plasma etching (dry etching) or wet etching may be employed for the etching process, but plasma etching is suitable for processing large-area substrates. Also, if atmospheric discharge etching is applied, local discharge machining is possible, and there is no need to form a mask layer over the entire surface of the substrate.

After removing the mask layers 1513 and 1514, a composition containing a conductive material is discharged to form conductive layers 1515, 1516 and 1517. Using the conductive layers 1515, 1516 and 1517 as masks, the N-type semiconductor layer is patterned. It is processed (see FIG. 24(D)). Although not shown, the conductive layers 1515 1516
The above-described base pretreatment step of selectively forming a photocatalyst material or the like in a portion where 517 is in contact with the gate insulating layer 1505 may be performed. Also, after formation, the surface may be subjected to surface pretreatment. By this step, the conductive layer can be formed with good adhesion to the upper and lower layers to be laminated.

Subsequently, a conductive layer 1 functioning as a source/drain wiring layer is selectively formed on the gate insulating film.
A composition containing a conductive material is discharged so as to be in contact with 517 to form a conductive layer (also referred to as a first electrode) 1506 (see FIG. 25A). The conductive layer 1506 is made of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxide Zinc (ZnO),
A predetermined pattern may be formed from a composition containing tin oxide (SnO ₂ ) or the like, and the pattern may be formed by firing. Although not shown, the conductive layers 1502 and 150 are formed in the region where the conductive layer 1506 is to be formed.
As in the case of forming 3, pretreatment of the base such as formation of a photocatalyst material may be performed. The base pretreatment improves the adhesiveness, and the conductive layer 1506 can be formed by thinning into a desired pattern. This conductive layer 1506 becomes a first electrode functioning as a pixel electrode.

In addition, the conductive layer 1516 which is the source or drain wiring layer and the conductive layer 1503 which is the gate electrode layer are electrically connected through the through hole 1518 formed in the gate insulating layer 1505 . Examples of conductive materials for forming this conductive layer include Ag (silver), Au (gold), Cu (copper),
A composition containing metal particles such as W (tungsten) and Al (aluminum) as a main component can be used. Alternatively, light-transmitting indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

Further, after forming the conductive layers 1515, 1516, 1517, and 1506, the conductive layers 1515, 1515
Through holes 1518 may be formed using 516, 1517 and 1506 as a mask. Then, a conductive layer is formed in the through hole 1518 and a conductive layer 1516 and a conductive layer 150 which is a gate electrode layer are formed.
3 are electrically connected.

Subsequently, an insulating layer 1520 serving as a partition is formed. Also, although not shown, the insulating layer 1520
A protective layer of silicon nitride or silicon oxynitride may be formed on the entire surface so as to cover the thin film transistors under the layer. The insulating layer 1520 is formed by forming an insulating layer on the entire surface by a spin coating method or a dipping method, and then etching to form openings as shown in FIG. 25(B). Etching is not necessarily required if the insulating layer 1520 is formed by a droplet discharging method. In the case of forming the insulating layer 1520 or the like over a wide area by a droplet discharge method, a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device, and a plurality of lines are drawn so as to overlap each other. improves.

The insulating layer 1520 is formed with through-hole openings corresponding to the positions where the pixels are formed corresponding to the conductive layer 1506 which is the first electrode.

Through the above steps, a TFT substrate for an EL display panel in which a bottom gate type (also called an inverted staggered type) channel-etch type TFT and a first electrode (first electrode layer) 1506 are connected to each other on the substrate 1500 is completed. do.

An electroluminescent layer 1521 and a conductive layer 1522 are stacked over a conductive layer 1506 which is a first electrode, whereby a display device using a light-emitting element and having a display function is completed (see FIG. 25B).
.

As described above, in this embodiment mode, steps can be omitted by not using a photoexposure step using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, an EL display panel can be easily manufactured even if a glass substrate of the fifth generation or later with a side exceeding 1000 mm is used. be able to.

In addition, a highly reliable display device with improved adhesion and peeling resistance can be manufactured.

(Embodiment 10)
An embodiment of the present invention will be described with reference to FIGS. 26 and 27. FIG. This embodiment differs from Embodiment 7 in the connection structure between the thin film transistor and the first electrode.
Therefore, repeated description of the same parts or parts having similar functions will be omitted.

A base film 1601 having a function of improving adhesion is formed over a substrate 1600 (see FIG. 26A). Note that an insulating layer may be formed over the substrate 1600 . Although this insulating layer may not be formed, it has the effect of blocking contaminants and the like from the substrate 1600 . Particularly in the case of a staggered thin film transistor as in this embodiment mode, the base layer is effective because the semiconductor layer is in direct contact with the substrate. In the case of forming a base layer for preventing contamination from the glass substrate, a base film 1601 is formed as pretreatment in formation regions of the conductive layers 1615, 1616, and 1617 formed by a droplet discharging method.

In this embodiment mode, a material having a photocatalytic function is used as the base film 1601 having a function of improving adhesion.

In this embodiment mode, a case of forming a _TiOx crystal having a predetermined crystal structure by a sputtering method as a photocatalyst material will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Furthermore, He gas may be introduced. In order to form TiO _X with high photocatalytic activity, the atmosphere should contain a large amount of oxygen and the formation pressure should be high. Furthermore, it is preferable to form TiO _X while heating the film formation chamber or the substrate provided with the object to be processed.

The _TiOx thus formed has a photocatalytic function even in a very thin film.

In addition, as other base pretreatments, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), M
It is preferable to form a base film 1601 made of a metal material such as o (molybdenum) or its oxide. The base film 1601 may be formed with a thickness of 0.01 to 10 nm.
It does not necessarily have a layered structure, as long as it is formed very thinly. Conductive layers 1615 and 16 functioning as source/drain wiring layers when a refractory metal material is used as the base film.
After forming 16, 1617, it is desirable to treat the underlying film exposed on the surface by one of the following two processes.

As a first method, conductive layers 1615 and 1616 functioning as source/drain wiring layers
, 1617 to form an insulating layer. That is, the base film 1601 that does not overlap with the conductive layers 1615, 1616, and 1617 functioning as source/drain wiring layers is oxidized to be insulated. In this way, when the base film 1601 is oxidized to be insulated, it is preferable to form the base film 1601 with a thickness of 0.01 to 10 nm, so that the base film 1601 can be easily oxidized. . As a method of oxidation, a method of exposure to an oxygen atmosphere may be used, or a method of performing heat treatment may be used.

As a second method, conductive layers 1615 and 1616 functioning as source/drain wiring layers are formed.
, 1617 as a mask, the base film 1601 is removed by etching. When using this process, there is no restriction on the thickness of the base film 1601 .

Further, as another method of base pretreatment, there is a method of subjecting a formation region (formation surface) to plasma treatment. Plasma treatment conditions are as follows: air, oxygen or nitrogen is used as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (1330 Pa).
0 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (9
3100 Pa) to 800 Torr (106400 Pa), that is, in a state of atmospheric pressure or a pressure close to atmospheric pressure, a pulse voltage is applied. At this time, the plasma density is 1×10 ¹⁰ to
1×10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using a plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without depending on the material. As a result, any material can be surface-modified.

As another method, an organic material-based substance that functions as an adhesive may be formed in order to increase the adhesion between the pattern forming region and the pattern formed by the droplet discharge method. Organic materials (organic resin materials) (polyimide, acrylic), materials whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O), and which contain at least hydrogen as substituents, or fluorine, alkyl groups, Alternatively, a material containing at least one aromatic hydrocarbon may be used.

Next, a composition containing a conductive material is discharged to form conductive layers 1615, 1616, and 1617 functioning as source/drain wiring layers. These conductive layers 1615, 1616, 1617
is formed using a droplet discharge means.

Ag (silver),
A composition containing metal particles such as Au (gold), Cu (copper), W (tungsten), and Al (aluminum) as a main component can be used. In particular, the source or drain wiring layer is preferably made to have a low resistance, so in consideration of the specific resistance value, any material of gold, silver, or copper dissolved or dispersed in a solvent should be used. is preferable, and silver and copper with low resistance are more preferable. Particles in which a conductive material is coated with another conductive material to form a plurality of layers may also be used. For example, particles having a three-layer structure in which nickel boron (NiB) is coated around copper and silver is coated around the nickel boron (NiB) may be used. The solvent corresponds to esters such as butyl acetate, alcohols such as isopropyl alcohol, organic solvents such as acetone, and the like. The surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

In addition, as pre-underlying treatment of the conductive layer formed using the droplet discharge method, the above-described underlying film 160 is formed.
1 was performed, this process step may also be performed after the conductive layers 1615, 1616, 1617 are formed. For example, although not shown, if a titanium oxide film is formed and an N-type semiconductor layer is formed thereon, the adhesion between the conductive layer and the N-type semiconductor layer is improved.

After an N-type semiconductor layer is formed on the entire surface of the conductive layers 1615, 1616, and 1617, the N-type semiconductor layers between the conductive layers 1615 and 1616 and between the conductive layers 1616 and 1617 are covered with resist, polyimide, or the like. The insulating mask layers 1611, 1612, and 1619 are used to etch and remove. A semiconductor layer having one conductivity type may be formed as needed. Then, a semiconductor layer 1607 made of AS or SAS is formed by vapor deposition or sputtering. When the plasma CVD method is used, AS is formed using SiH ₄ or a mixed gas of SiH ₄ and H ₂ which is a semiconductor material gas. SAS triples _SiH4 with _H2 ~
Dilute 1000 times and form with mixed gas. When the SAS is formed with this gas type, the crystallinity is better on the surface side of the semiconductor layer, and is suitable for combination with a top-gate type TFT in which the gate electrode is formed in the upper layer of the semiconductor layer.

Next, the gate insulating layer 1605 is formed to have a single-layer structure or a stacked-layer structure by plasma CVD or sputtering (see FIG. 26B). As a particularly preferable mode, a three-layer laminate of an insulating layer made of silicon nitride, an insulating layer made of silicon oxide, and an insulating layer made of silicon nitride is formed as the gate insulating film.

Next, conductive layers 1602 and 1603, which are gate electrode layers, are formed by a droplet discharge method (FIG. 26).
(C)). Examples of conductive materials for forming this layer include Ag (silver), Au (gold), Cu (
A composition containing metal particles such as copper), W (tungsten), Al (aluminum) as a main component can be used.

A semiconductor layer 1607 and a gate insulating layer 1605 are mask layers 1 formed by a droplet discharge method.
613, 1614 are used to form source or drain wiring layers (conductive layers 1615, 1616, 1
617). That is, a semiconductor layer is formed so as to straddle the conductive layers 1615 and 1616 which are source or drain wiring layers.

Next, conductive layers 1630 and 1631 are formed by a droplet discharge method, and conductive layers 1616 and 16 are formed.
03 is electrically connected.

Subsequently, a conductive layer (also referred to as a first electrode) 1606 is formed by selectively discharging a composition containing a conductive material so as to be in contact with the conductive layer 1631 . Alternatively, the conductive layer 1606 may be in direct contact with the conductive layer 1617 . The conductive layer 1606 is made of indium tin oxide (I
TO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO ₂ ), or the like may be used to form a predetermined pattern, followed by firing. Although not shown, conductive layers 1615, 1616, and 1615, 1616, and 1 are formed in a region where conductive layer 1606 is to be formed.
A photocatalytic material may be formed in the same manner as when forming 617 . Adhesion is improved by the photocatalyst substance, and the conductive layer 1606 can be formed by thinning into a desired pattern. This conductive layer 1606 becomes a first electrode functioning as a pixel electrode.

The drain or source wiring layer and the gate electrode layer may be directly connected by the gate electrode layer without using the conductive layer 1630 . In that case, the conductive layers 1602, 1 which are gate electrode layers
603, a through hole is formed in the gate insulating layer 1605 to expose part of the conductive layers 1616 and 1617, which are source or drain wirings, and then the conductive layer 1, which is a gate electrode layer, is exposed.
602, 1603, and a conductive layer 1631 are formed by a droplet discharge method. At this time, the conductive layer 1603 becomes a wiring that also serves as the conductive layer 1630 and is connected to the conductive layer 1616 . Etching may be either dry etching or wet etching, but plasma etching, which is dry etching, is preferred.

Subsequently, an insulating layer 1620 serving as a partition is formed. Also, although not shown, the insulating layer 1620
A protective layer of silicon nitride or silicon oxynitride may be formed on the entire surface so as to cover the thin film transistors under the layer. The insulating layer 1620 is formed by forming an insulating layer on the entire surface by spin coating or dipping, and then etching to form openings as shown in FIG. Etching is not necessarily required if the insulating layer 1620 is formed by a droplet discharging method. In the case of forming the insulating layer 1620 or the like over a wide area by a droplet discharge method, a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device, and a plurality of lines are drawn so as to overlap each other. improves.

The insulating layer 1620 is formed with through-hole openings corresponding to the positions where the pixels are formed corresponding to the conductive layer 1606 which is the first electrode.

Through the above steps, a top gate type (also called staggered type) TFT is formed on the substrate 1600 .
, and a TFT substrate to which the conductive layer (first electrode layer) 1606 is connected is completed.

Before the electroluminescent layer 1621 is formed, heat treatment is performed at 200° C. under atmospheric pressure to form the insulating layer 162 .
Removes moisture adsorbed in the 0 or on its surface. 200 to 400°C under reduced pressure
, preferably at 250 to 350° C., and the electroluminescent layer 16 is formed without being exposed to the atmosphere.
21 is preferably formed by a vacuum vapor deposition method or a droplet discharge method under reduced pressure.

An electroluminescent layer 1621 and a conductive layer 1622 are stacked over a conductive layer 1606 which is a first electrode, whereby a display device using a light-emitting element and having a display function is completed (see FIG. 27).

As described above, in this embodiment mode, steps can be omitted by not using a photoexposure step using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, an EL display panel can be easily manufactured even if a glass substrate of the fifth generation or later with a side exceeding 1000 mm is used. be able to.

Further, a highly reliable display device with improved adhesion and peeling resistance can be manufactured.

(Embodiment 11)
An embodiment of the present invention will be described with reference to FIGS. 28 and 29. FIG. This embodiment mode differs from Embodiment Mode 1 in the method of penetrating the gate insulating layer 805 and connecting the conductive layer 816 which is a wiring layer and the conductive layer 803 which is a gate electrode layer. Therefore, repeated description of the same parts or parts having similar functions will be omitted.

A base film 1701 for improving adhesion is formed over a substrate 1700 (see FIG. 28A). Note that an insulating layer may be formed over the substrate 1700 .

In this embodiment mode, a material having a photocatalytic function is used as the base film 1701 having a function of improving adhesion.

In this embodiment mode, a case of forming a _TiOx crystal having a predetermined crystal structure by a sputtering method as a photocatalyst material will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Furthermore, He gas may be introduced. In order to form TiO _X with high photocatalytic activity, the atmosphere should contain a large amount of oxygen and the formation pressure should be high. Furthermore, it is preferable to form TiO _X while heating the film formation chamber or the substrate provided with the object to be processed.

The _TiOx thus formed has a photocatalytic function even in a very thin film.

In addition, as other base pretreatments, Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), M
It is preferable to form a base film 1701 made of a metal material such as o (molybdenum) or its oxide. The base film 1701 may be formed with a thickness of 0.01 to 10 nm.
It does not necessarily have a layered structure, as long as it is formed very thinly. When a refractory metal material is used as the base film, after forming the conductive layers 1702 and 1703 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. should be treated.

The first step is to insulate the underlying film 1701 that does not overlap with the conductive layers 1702 and 1703.
This is the step of forming an insulating layer. That is, the base film 1 that does not overlap with the conductive layers 1702 and 1703
701 is oxidized and insulated. In this way, when the base film 1701 is oxidized to be insulated, it is preferable to form the base film 1701 with a thickness of 0.01 to 10 nm.
Then, it can be easily oxidized. As a method of oxidation, a method of exposure to an oxygen atmosphere may be used, or a method of performing heat treatment may be used.

The second step is to etch and remove the base film 1701 using the conductive layers 1702 and 1703 as masks. When using this process, there is no restriction on the thickness of the base film 1701 .

Further, as another method of base pretreatment, there is a method of subjecting a formation region (formation surface) to plasma treatment. Plasma treatment conditions are as follows: air, oxygen or nitrogen is used as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (1330 Pa).
0 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (9
3100 Pa) to 800 Torr (106400 Pa), that is, in a state of atmospheric pressure or a pressure close to atmospheric pressure, a pulse voltage is applied. At this time, the plasma density is 1×10 ¹⁰ to
1×10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using a plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without depending on the material. As a result, any material can be surface-modified.

As another method, an organic material-based substance that functions as an adhesive may be formed in order to increase the adhesion between the pattern forming region and the pattern formed by the droplet discharge method. Organic materials (organic resin materials) (polyimide, acrylic), materials whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O), and which contain at least hydrogen as substituents, or fluorine, alkyl groups, Alternatively, a material containing at least one aromatic hydrocarbon may be used.

Next, a composition containing a conductive material is discharged to form a conductive layer 17 that later functions as a gate electrode.
02, forming 1703. The formation of the conductive layers 1702 and 1703 is performed using a droplet discharging means.

After forming the conductive layer 1703, a composition containing a conductive material is locally discharged to form a conductor 1704 functioning as a pillar. The conductor 1704 is formed by depositing the discharged composition, and is preferably formed in a columnar shape in order to facilitate contact between the lower layer pattern and the upper layer pattern. The conductor 1704 may be formed using the same material as the conductive layer 1703 or a different material, or may be formed by stacking and discharging a composition.

After the conductive layer 1703 is formed, the above-described base pretreatment may be performed on the conductive layer 1703 in order to increase adhesion again. In addition, it is preferable to perform base film treatment similarly after forming the conductor 1704 to be a pillar. If a pre-treatment such as the formation of a photocatalyst substance such as _TiOx is performed, the adhesion between the film layers can be improved.

Next, a gate insulating film is formed over the conductive layers 1702 and 1703 (see FIG. 28A).
.

Subsequently, a composition containing a conductive material is selectively discharged over the gate insulating film to form a conductive layer (also referred to as a first electrode) 1706 (see FIG. 28B). Although not shown, the conductive layer 1
A photocatalyst material may be formed in the same manner as the conductive layers 1702 and 1703 are formed in the region where 706 is to be formed. Adhesion is improved by the photocatalyst substance, and the conductive layer 1706 can be formed by thinning into a desired pattern. This conductive layer 1706 is the first layer that functions as a pixel electrode.
electrode.

In this embodiment mode, an amorphous semiconductor is used as the semiconductor. In order to form a semiconductor layer 1707 which is an amorphous semiconductor layer and to form channel protective films 1709 and 1710, an insulating film is formed by, for example, a plasma CVD method, and selected to have a desired shape in a desired region. etching. At this time, the channel protective films 1709 and 1710 can be formed by exposing the back surface of the substrate using the gate electrode as a mask. For the channel protective film, polyimide, polyvinyl alcohol, or the like may be dropped by a droplet discharge method. As a result, the exposure process can be omitted. Thereafter, an N-type semiconductor layer 1708 is formed using a semiconductor layer having one conductivity type, for example, an N-type amorphous semiconductor layer, by plasma CVD or the like. (
See FIG. 28(C)). A semiconductor layer having one conductivity type may be formed as needed.

Subsequently, mask layers 1711 and 1712 made of an insulator such as resist or polyimide are formed.
are patterned at the same time.

In this embodiment mode, a conductor which is already connected to the conductive layer 1703 which is the gate electrode layer through the conductor 1704 functioning as a pillar penetrates the gate insulating layer 1705 and exists on the gate insulating layer 1705 . Therefore, it is possible to omit the step of forming a through hole in the gate insulating layer.

discharging a composition containing a conductive material to form conductive layers 1715, 1716, and 1717;
Using the conductive layers 1715, 1716, and 1717 as masks, the N-type semiconductor layers are patterned. Although not shown, a photocatalyst substance may be selectively formed in portions where the conductive layers 1715 , 1716 and 1717 are in contact with the gate insulating layer 1705 before forming the conductive layers 1715 , 1716 and 1717 . Then, the conductive layer can be formed with good adhesion.

Conductive layer 1717 is formed to function as a source and drain wiring layer and electrically connect to the previously formed first electrode. A conductive layer 1716 that is a source or drain wiring layer
can be electrically connected to a conductive layer 1703 which is a gate electrode layer through a conductor 1704 (see FIG. 29A). If an insulating layer or the like remains over the conductor 1704 functioning as a pillar, it can be removed by etching or the like.

Subsequently, an insulating layer 1720 serving as a partition is formed.

The insulating layer 1720 is formed with through-hole openings corresponding to the positions where the pixels are formed corresponding to the conductive layer 1706 which is the first electrode.

Through the above steps, a TFT substrate for an EL display panel in which a bottom gate type (also called an inverted staggered type) channel protective TFT and a first electrode (first electrode layer) are connected to each other on the substrate 1700 is completed. .

An electroluminescent layer 1721 and a conductive layer 1722 are stacked over a conductive layer 1706 which is a first electrode, whereby a display device using a light-emitting element and having a display function is completed (see FIG. 29B).
.

As described above, in this embodiment mode, steps can be omitted by not using a photoexposure step using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, an EL display panel can be easily manufactured even if a glass substrate of the fifth generation or later with a side exceeding 1000 mm is used. be able to.

Further, a highly reliable display device with improved adhesion and peeling resistance can be manufactured. The connection method using pillars in the through-holes of this embodiment can be freely combined with the above embodiments.

(Embodiment 12)
A thin film transistor can be formed by applying the present invention, and a display device can be formed using the thin film transistor. In this case, the light emitted from the light emitting element is emitted from the bottom surface, from the top surface, or from both sides. Here, the laminated structure of the light-emitting element corresponding to each case will be described with reference to FIGS.

In this embodiment mode, the present invention is applied and the transistor 1851 which is a channel protective thin film transistor formed in Embodiment Mode 1 is used.

First, when light is emitted to the substrate 1850 side, that is, when light is emitted from the bottom, FIG.
Description will be made using 0(A). In this case, source or drain wirings 1852 and 1853, a first electrode 1854, and an electroluminescent layer 185 are electrically connected to the transistor 1851.
5, the second electrode 1856 is stacked in sequence. Next, the case where light is emitted to the side opposite to the substrate 1850, that is, the case of top emission is described with reference to FIG. Source or drain wirings 1861 and 1862 electrically connected to the transistor 1851, a first electrode 1863, an electroluminescent layer 1864, and a second electrode 1865 are stacked in this order. With the above structure, even if light is transmitted through the first electrode 1863, the light is reflected at the wiring, and the substrate 18
Fires in the opposite direction to 50. Note that in this structure, it is not necessary to use a light-transmitting material for the first electrode 1863 . Finally, the case where light is emitted to both the substrate 1850 side and the opposite side, that is, the case of performing double-sided emission will be described with reference to FIG. transistor 1
Source or drain wiring 1870, 1871 electrically connected to 851, first electrode 18
72, an electroluminescent layer 1873, and a second electrode 1874 are laminated in this order. At this time, if both the first electrode 1872 and the second electrode 1874 are formed from a light-transmitting material or with a thickness that allows light to pass through, double-sided emission is realized.

The light-emitting element has a structure in which an electroluminescent layer is sandwiched between a first electrode and a second electrode. Materials for the first electrode and the second electrode must be selected in consideration of the work function, and both the first electrode and the second electrode can be anodes or cathodes depending on the pixel configuration. In this embodiment mode, since the polarity of the driving TFT is an N-channel type, it is preferable to use the first electrode as a cathode and the second electrode as an anode. Further, when the polarity of the driving TFT is p-channel type, it is preferable that the first electrode is an anode and the second electrode is a cathode.

When the first electrode is an anode, the electroluminescent layer consists of HIL (hole injection layer), HTL (hole transport layer), EML (light emitting layer), ETL (electron transport layer), EIL (from the anode side). (electron injection layer) is preferably laminated in this order. In addition, when the first electrode is a cathode, the opposite is true.
It is preferable to stack the TL (hole transport layer), the HIL (hole injection layer), and the anode, which is the second electrode, in this order. The electroluminescent layer may have a single layer structure or a mixed structure other than the laminated structure.

In addition, as the electroluminescent layer, materials that emit red (R), green (G), and blue (B) light are
They are selectively formed by a vapor deposition method or the like using a vapor deposition mask. red (R), green (G
), a material that emits blue (B) light can be formed by a droplet discharge method (low-molecular-weight or high-molecular-weight material, etc.) in the same way as a color filter. In this case, RGB can be separately painted without using a mask. It is preferable because it can

Specifically, CuPc and PEDOT are used as HIL, α-NPD as HTL, BCP and Alq ₃ as ETL, and BCP:Li and CaF ₂ as EIL, respectively. For example, EML may use _Alq3 doped with a dopant corresponding to each emission color of R, G, and B (for R, DCM, etc.; for G, DMQD, etc.).

Note that the electroluminescent layer is not limited to the above materials. For example, instead of CuPc or PEDOT, an oxide such as molybdenum oxide (MoO _x : x=2 to 3) and α-NPD or rubrene may be co-evaporated to improve hole injection properties. In addition, the material of the electroluminescent layer can be used as an organic material (including low-molecular-weight or high-molecular-weight materials) or a composite material of an organic material and an inorganic material.

In addition, although not shown in FIG. 30, a color filter may be formed on the counter substrate of the substrate 1850 . The color filter can be formed by a droplet discharge method, and in that case, optical plasma treatment or the like can be applied as the base pretreatment described above. A color filter can be formed in a desired pattern with good adhesion by using the base film of the present invention. Using a color filter also enables high-definition display. Each RG by a color filter
This is because the broad peak in the B emission spectrum can be corrected to be sharp.

In the above, the case of forming a material that emits light of each RGB has been described, but full-color display can be performed by forming a material that emits light of a single color and combining a color filter and a color conversion layer. For example, when an electroluminescent layer that emits white or orange light is formed, full-color display can be achieved by separately providing a color filter or a combination of a color filter and a color conversion layer. A color filter and a color conversion layer may be formed, for example, on a second substrate (sealing substrate) and attached to the substrate. Further, as described above, the material that emits monochromatic light, the color filter, and the color conversion layer can all be formed by a droplet discharge method.

Of course, monochromatic light emission display may be performed. For example, an area color type display device may be formed using monochromatic light emission. A passive matrix type display unit is suitable for the area color type, and can mainly display characters and symbols.

In the above structure, a material having a small work function can be used for the cathode, and Ca, Al, CaF, MgAg, AlLi, etc., are desirable. The electroluminescent layer may be a single layer type, a laminated type, or a mixed type with no interface between layers. Any of organic materials containing materials, inorganic materials such as molybdenum oxide having excellent electron injection properties, and composite materials of organic and inorganic materials may be used. The first electrodes 1854, 1863, and 1872 are formed using a transparent conductive film that transmits light. A transparent conductive film or the like formed by using the film is used. Note that plasma treatment in an oxygen atmosphere or heat treatment in a vacuum atmosphere is preferably performed before the first electrodes 1854, 1863, and 1872 are formed. The partition is formed using a material containing silicon, an organic material, or a compound material. Also, a porous film may be used. However, if it is formed using a photosensitive or non-photosensitive material such as acrylic or polyimide, the side surface has a shape in which the radius of curvature changes continuously, and the upper layer thin film is formed without discontinuity, which is preferable. This embodiment can be freely combined with the above embodiments.

(Embodiment 13)
The appearance of a panel, which is one mode of a display device to which the present invention is applied, will be described with reference to FIG.

In the panel shown in FIG. 31, a driver IC having a driver circuit formed around a pixel portion 1951 is mounted by a COG (Chip On Glass) method. Of course, the driver IC
It may be implemented by an AB (Tape Automated Bonding) method.

A substrate 1950 is fixed to a counter substrate 1953 with a sealing material 1952 . The pixel portion 1951 may use an EL element as a display medium. Driver IC 19
55a, 1955b and driver ICs 1957a, 1957b, 1957c may be formed of TFTs using polycrystalline semiconductor instead of integrated circuits formed using single crystal semiconductor. Driver ICs 1955a, 1955b and Driver ICs 1957a, 1
957b, 1957c, FPC1954a, 1954b, 1954c or FPC1
Signals and power are supplied via 956a and 1956b.

(Embodiment 14)
A display formed in accordance with the present invention can complete an EL television receiver. FIG. 32 shows a block diagram showing the main configuration of an EL television receiver. In the EL display panel, as shown in FIG. 31, a pixel portion 1951 and a scanning line side driver circuit and a signal line side driver circuit are mounted around it by the COG method, or only the pixel portion is formed. In the case where the scanning line side driving circuit and the signal line side driving circuit are mounted by the TAB method, the TFT is formed by SAS, the pixel portion and the scanning line side driving circuit are integrally formed on the substrate, and the signal line side driving circuit is mounted. Although there is a case where it is separately mounted as a driver IC, it may be of any form.

As other external circuit configurations, on the video signal input side, a video signal amplifier circuit 2005 amplifies the video signal among the signals received by the tuner 2004, and the signals output therefrom are converted into red, green, and blue signals. and a control circuit 2007 for converting the video signal into the input specification of the driver IC. The control circuit 2007 outputs signals to the scanning line side and the signal line side, respectively.
In the case of digital driving, a signal dividing circuit 2008 may be provided on the signal line side to divide the input digital signal into m signals and supply them.

Of the signals received by the tuner 2004 , the audio signal is sent to the audio signal amplifier circuit 2009 and its output is supplied to the speaker 2013 via the audio signal processing circuit 2010 . A control circuit 2011 receives control information on a reception station (reception frequency) and sound volume from an input section 2012 and sends signals to a tuner 2004 and an audio signal processing circuit 2010 .

As shown in FIG. 33, the EL module is assembled with such an external circuit as shown in the housing 21.
01 to complete a television receiver. A display screen 2021 is formed by an EL display module, and a speaker 2022, an operation switch 2024, and the like are provided as accessory equipment. Thus, the television receiver can be completed according to the present invention.

Further, a wavelength plate or a polarizing plate may be used to block reflected light of light incident from the outside. A wavelength plate of λ/4 or λ/2 may be used and designed to control light. The configuration includes a TFT element substrate, a light emitting element, a sealing substrate (sealing material), a wave plate (λ/4, λ/2
) and polarizing plates, and the light emitted from the light emitting element passes through these and is radiated to the outside from the polarizing plate side. The wavelength plate and the polarizing plate may be placed on the side from which light is emitted, and may be placed on both sides in the case of a double-sided emission type display device in which light is emitted from both sides. Also, an antireflection film may be provided outside the polarizing plate. As a result, a more delicate and precise image can be displayed.

A display panel 2102 using an EL element is incorporated in a housing 2101, and a receiver 210
5 to receive general television broadcasts, and by connecting to a wired or wireless communication network via a modem 2104, one-way (from the sender to the receiver) or two-way (between the sender and the receiver, or between the receiver It is also possible to communicate information between The television receiver can be operated by a switch built into the housing or a separate remote control device 2106. Even if this remote control device is also provided with a display unit 2107 for displaying information to be output, good.

Also, the television receiver may be provided with a sub-screen 2108 formed by a second display panel in addition to the main screen 2103 to display the channel, sound volume, and the like. Main screen 210
3 and the sub-screen 2108 may be formed of an EL display panel, or in this structure, the main screen 2103 is formed of an EL display panel with an excellent viewing angle, and the sub-screen is a liquid crystal display capable of displaying with low power consumption. A display panel may be used. In order to give priority to low power consumption,
The main screen 2103 may be formed of a liquid crystal display panel, the sub-screen may be formed of an EL display panel, and the sub-screen may be blinkable. By using the present invention, a highly reliable display device can be obtained even when using such a large substrate and using many TFTs and electronic components.

Of course, the present invention is not limited to television receivers, and can be applied to a variety of applications, particularly as large-area display media such as personal computer monitors, information display panels at railway stations and airports, and advertising display panels on the street. can do.

(Embodiment 15)
Various display devices can be manufactured by applying the present invention. That is, the present invention can be applied to various electronic devices incorporating such display devices in their display portions.

Such electronic devices include cameras such as video cameras and digital cameras, projectors, head-mounted displays (goggle-type displays), car navigation systems, car stereos, personal computers, game devices, personal digital assistants (mobile computers, mobile phones or e-books, etc.), image playback devices equipped with recording media (specifically, Digi
and a device equipped with a display capable of reproducing a recording medium such as a versatile disc (DVD) and displaying an image thereof. Examples thereof are shown in FIG.

FIG. 34A shows a notebook personal computer including a main body 2201 and a housing 220.
2, including a display unit 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The present invention is applied to manufacturing the display portion 2203 . By using the present invention, a notebook personal computer having a display portion with high display quality can be manufactured at low cost.

FIG. 34B shows a storage medium playback device (specifically, a DVD playback device) having an image display section, and includes a main body 2301, a housing 2302, a display section A 2303, a display section B 2304, and a storage medium (
DVD, etc.) reading unit 2305, operation keys 2306, speaker unit 2307, and the like. The display portion A2303 mainly displays image information, and the display portion B2304 mainly displays character information.
By using the present invention, a storage medium reproducing device having an image display section with high display quality can be manufactured at low cost.

FIG. 34C shows a mobile phone, which includes a main body 2401, an audio output section 2402, and an audio input section 24.
03, a display unit 2404, an operation switch 2405, an antenna 2406, and the like. By applying the display device manufactured according to the present invention to the display portion 2404, a mobile phone having a display portion with high display quality can be manufactured at low cost.

FIG. 35A shows a video camera including a main body 2501, a display portion 2502, a housing 2503,
External connection port 2504, remote controller receiver 2505, image receiver 2506, battery 250
7, voice input unit 2508, operation keys 2509, eyepiece unit 2510, and the like. The present invention can be applied to the display portion 2502, which is a double-sided emission display device. Figure 35 (B), (C)
shows an image displayed by the display unit 2502 . FIG. 35B is the photographed image, and FIG. 35C is the image seen from the photographed vehicle. Since the display device of the present invention is of a transmissive type and can display images on both sides, the photographed image can also be viewed from the subject side. Therefore, it is also convenient for photographing oneself. In addition to the video camera, the present invention can be applied to a digital video camera or the like, and the same effects can be obtained. By applying the display device manufactured according to the present invention to the display portion 2502, a video camera, a digital video camera, or the like having a display portion with high display quality can be manufactured at low cost. This embodiment is
It can be freely combined with the above embodiment modes.

605 gate insulating layer 606 insulating layer 615 source signal line 616 source signal line 617 source signal line 800 substrate 801 base film 802 conductive layer 803 conductive layer 804 insulating layer 805 gate insulating layer 806 conductive layer 807 semiconductor layer 808 n-type semiconductor layer 809 channel Protective film 811 Mask layer 813 Mask layer 815 Conductive layer 816 Conductive layer 817 Conductive layer 818 Through hole 820 Insulating layer 821 Electroluminescent layer 822 Conductive layer 850 Sealing substrate 851 Sealing material 854 Circuit 855 of each pixel Line segment

Claims (3)

having a plurality of pixels arranged in a matrix,
one of the pixels is electrically connected to a gate signal line, a source signal line, and a power supply line;
The power supply line has a first wiring arranged in parallel with the source signal line and a second wiring arranged in a direction perpendicular or substantially perpendicular to the first wiring, and a second wiring is connected to the first wiring for each pixel;
One of the pixels includes a first transistor having one of its source and drain electrically connected to the source signal line and one of its source and drain electrically connected to the other of the source and drain of the first transistor. having a connected second transistor and a capacitive element;
the conductive layer functioning as the power supply line has a region functioning as one electrode of the capacitive element,
the conductive layer functioning as the gate electrode of the second transistor has a region functioning as the other electrode of the capacitive element;
The display device, wherein the area of the channel formation region of the second transistor is larger than the area of the channel formation region of the first transistor. having a plurality of pixels arranged in a matrix,
one of the pixels is electrically connected to a gate signal line, a source signal line, and a power supply line;
The power supply line has a first wiring arranged in parallel with the source signal line and a second wiring arranged in a direction perpendicular or substantially perpendicular to the first wiring, and a second wiring is connected to the first wiring for each pixel;
One of the pixels includes a first transistor having one of its source and drain electrically connected to the source signal line and one of its source and drain electrically connected to the other of the source and drain of the first transistor. having a connected second transistor and a capacitive element;
the conductive layer functioning as the power supply line has a region functioning as one electrode of the capacitive element,
the conductive layer functioning as the gate electrode of the second transistor has a region functioning as the other electrode of the capacitive element;
In plan view, the region of the conductive layer that functions as the gate electrode of the second transistor, which functions as the other electrode of the capacitor, is closer to the gate of the first transistor than the channel formation region of the second transistor. A display device having a region located on a conductive layer side that functions as an electrode. having a plurality of pixels arranged in a matrix,
one of the pixels is electrically connected to a gate signal line, a source signal line, and a power supply line;
The power supply line has a first wiring arranged in parallel with the source signal line and a second wiring arranged in a direction perpendicular or substantially perpendicular to the first wiring, and a second wiring is connected to the first wiring for each pixel;
One of the pixels includes a first transistor having one of its source and drain electrically connected to the source signal line and one of its source and drain electrically connected to the other of the source and drain of the first transistor. having a connected second transistor and a capacitive element;
the conductive layer functioning as the power supply line has a region functioning as one electrode of the capacitive element,
the conductive layer functioning as the gate electrode of the second transistor has a region functioning as the other electrode of the capacitive element;
the area of the channel formation region of the second transistor is larger than the area of the channel formation region of the first transistor;
In plan view, the region of the conductive layer that functions as the gate electrode of the second transistor, which functions as the other electrode of the capacitor, is closer to the gate of the first transistor than the channel formation region of the second transistor. A display device having a region located on a conductive layer side that functions as an electrode.

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