JP5201791B2 - Display device and electronic device - Google Patents

Description

The present invention relates to an electronic display (electro-optical device) formed by forming an EL (electroluminescence) element on a substrate. In particular, the present invention relates to a display device using a semiconductor element (an element using a semiconductor thin film). The present invention also relates to an electronic device using an EL display device for a display portion.

  In recent years, a technology for forming a thin film transistor (hereinafter referred to as TFT in this specification) on a substrate has greatly advanced, and application development to an active matrix display device has been advanced. In particular, a TFT using a polycrystalline semiconductor film such as polysilicon has higher field-effect mobility (also called mobility) than a conventional TFT using an amorphous semiconductor film such as amorphous silicon, so that high-speed operation is possible. It is. For this reason, it is possible to control a pixel, which has been conventionally performed by a drive circuit outside the substrate, with a drive circuit formed on the same substrate as the pixel.

  In such an active matrix display device using a polycrystalline semiconductor film, various circuits and elements can be formed on the same substrate, thereby reducing the manufacturing cost, downsizing the display device, and increasing the yield. Various advantages such as improved throughput can be obtained.

  In addition, active matrix EL display devices having EL elements as self-luminous elements have been actively researched. The EL display device is also called an organic EL display (OELD) or an organic light emitting diode (OLED).

  An EL element has a structure in which an EL layer is sandwiched between a pair of electrodes (anode and cathode), and the EL layer usually has a laminated structure. A typical example is a stacked structure of “hole transport layer, light emitting layer, electron transport layer” proposed by Tang et al. Of Kodak Eastman Company. This structure has very high luminous efficiency, and most EL display devices currently under research and development employ this structure.

  In addition, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, or a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are sequentially stacked on the anode. Structure may be sufficient. You may dope a fluorescent pigment | dye etc. with respect to a light emitting layer.

  In this specification, all layers provided between a cathode and an anode are collectively referred to as an EL layer. Therefore, the above-described hole injection layer, hole transport layer, light emitting layer, electron transport layer, electron injection layer, and the like are all included in the EL layer.

  When a predetermined voltage is applied from the pair of electrodes to the EL layer having the above structure, carrier recombination occurs in the light emitting layer to emit light. Note that light emission of an EL element in this specification is referred to as driving of the EL element. In this specification, a light-emitting element formed using an anode, an EL layer, and a cathode is referred to as an EL element.

  Note that in this specification, an EL element includes both an element that uses light emission (fluorescence) from a singlet excited state and an element that uses light emission (phosphorescence) from a triplet excited state.

  As a driving method of the EL display device, an analog driving method (analog driving) and a digital driving method (digital driving) can be given. First, analog driving of the EL display device will be described with reference to FIGS.

  FIG. 1 shows a structure of a pixel portion 100 of an analog drive EL display device. Gate signal lines (G1 to Gy) for inputting selection signals from the gate signal line driver circuit are connected to the gate electrode of the switching TFT 101 included in each pixel. One of the source region and the drain region of the switching TFT 101 included in each pixel is a source signal line (also referred to as a data signal line) (S1 to Sx) for inputting an analog video signal, and the other is a driving included in each pixel. The TFT 104 is connected to the gate electrode and the storage capacitor 108 of each pixel.

  One of the source region and the drain region of the driving TFT 104 included in each pixel is connected to the power supply line (V1 to Vx), and the other is connected to the EL element 106. The potential of the power supply lines (V1 to Vx) is called a power supply potential. The power supply lines (V1 to Vx) are connected to a storage capacitor 108 included in each pixel.

  The EL element 106 includes an anode, a cathode, and an EL layer provided between the anode and the cathode. In the case where the anode of the EL element 106 is connected to the source region or the drain region of the driving TFT 104, the anode of the EL element 106 is a pixel electrode and the cathode is a counter electrode. Conversely, when the cathode of the EL element 106 is connected to the source region or the drain region of the driving TFT 104, the anode of the EL element 106 is the counter electrode and the cathode is the pixel electrode.

  Note that in this specification, the potential of the counter electrode is referred to as a counter potential. A power source that applies a counter potential to the counter electrode is referred to as a counter power source. A potential difference between the potential of the pixel electrode and the potential of the counter electrode is an EL drive voltage, and this EL drive voltage is applied to the EL layer.

  FIG. 2 shows a timing chart when the EL display device shown in FIG. 1 is driven in an analog manner. A period from when one gate signal line is selected to when another gate signal line is selected next is referred to as one line period (L). A period from when one image is displayed until the next image is displayed corresponds to one frame period (F). In the case of the EL display device of FIG. 1, since there are y gate signal lines, y line periods (L1 to Ly) are provided in one frame period.

  First, the power supply lines (V1 to Vx) are kept at a constant power supply potential. The counter potential, which is the potential of the counter electrode, is also kept constant. The counter potential has a potential difference from the power supply potential to such an extent that the EL element emits light.

  In the first line period (L1), a selection signal from the gate signal line driver circuit is input to the gate signal line G1. Then, analog video signals are sequentially input to the source signal lines (S1 to Sx). Since all the switching TFTs connected to the gate signal line G1 are turned on, the analog video signal input to the source signal line is input to the gate electrode of the driving TFT via the switching TFT. .

  The amount of current flowing through the channel formation region of the driving TFT is controlled by the gate voltage.

  Here, a case where the source region of the driving TFT is connected to the power supply line and the drain region is connected to the EL element will be described as an example.

  Since the source region of the driving TFT is connected to the power supply line, the same potential is input to each pixel in the pixel portion. At this time, when an analog signal is input to the source signal line, a difference between the potential of the signal voltage and the potential of the source region of the driving TFT becomes a gate voltage. The current flowing through the EL element is determined by the gate voltage of the driving TFT. Here, the light emission luminance of the EL element is proportional to the current flowing between both electrodes of the EL element. Thus, the EL element emits light by being controlled by the voltage of the analog video signal.

  When the operation described above is repeated and the input of the analog video signal to the source signal lines (S1 to Sx) is finished, the first line period (L1) is finished. The period until the input of the analog video signal to the source signal lines (S1 to Sx) and the horizontal blanking period may be combined into one line period. Next, in the second line period (L2), a selection signal is input to the gate signal line G2. Similar to the first line period (L1), analog video signals are sequentially input to the source signal lines (S1 to Sx).

  When selection signals are input to all the gate signal lines (G1 to Gy), all the line periods (L1 to Ly) are completed. When all the line periods (L1 to Ly) end, one frame period ends. All pixels display during one frame period, and one image is formed. All the line periods (L1 to Ly) and the vertical blanking period may be combined into one frame period.

  As described above, the light emission amount of the EL element is controlled by the analog video signal, and gradation display is performed by controlling the light emission amount. This method is a so-called analog driving method, and gradation display is performed by changing the voltage of an analog video signal input to the source signal line.

  Next, digital driving of the EL display device will be described. In the digital gray scale method, the gate-source voltage Vg of the EL driving TFT 104 is within a range where no current flows through the EL element 106 (lighting start voltage or lower) or within a range where the maximum current flows (brightness saturation voltage or higher). Operates in two stages only. That is, the EL element takes only a lighting state and a light-off state.

  In an EL display, a digital gray scale method in which variation in characteristics such as a threshold value of TFT hardly affects display is mainly used. However, in the case of the digital gradation method, only two gradations can be displayed as it is, and therefore, a plurality of techniques for increasing the number of gradations in combination with another method have been proposed.

  One of them is a method combining the area gradation method and the digital gradation method. The area gradation method is a method for producing gradation by controlling the area of a lighted portion. That is, one pixel is divided into a plurality of sub-pixels, and the number and area of sub-pixels that are lit are controlled to express gradation. The disadvantage of this method is that it is difficult to increase the resolution and increase the number of gradations because the number of subpixels cannot be increased. The area gradation method is reported in Non-Patent Document 1, Non-Patent Document 2, and the like.

  As another method for increasing the number of gradations, there is a method combining a time gradation method and a digital gradation method. The time gradation method is a method for producing a gradation using a difference in lighting time. That is, one frame period is divided into a plurality of subframe periods, and the number of subframe periods that are lit and the length thereof are controlled to express gradation. (See Patent Document 1)

  Non-patent document 3 reports a case where a digital gradation method, an area gradation method, and a time gradation method are combined.

  Next, constant current driving and constant voltage driving in the case of gradation display using digital gradation will be described.

  The constant current driving is a driving method in which the driving TFT 104 is operated in a saturation region when the EL element 106 is lit and a constant current is supplied to all pixels. This driving method has an advantage that the life of the EL display device can be extended because a constant current can be supplied to the EL element 106 even if the EL element 106 deteriorates and the voltage-current characteristic changes.

On the other hand, the constant voltage driving is a driving method in which the driving TFT 104 is operated in a linear region when the EL element 106 is lit and a constant voltage is supplied to all pixels. This driving method has an advantage that even if the characteristics of the driving TFT 104 vary, a constant voltage can be supplied to the EL element 106 in all the pixels, so that there is no unevenness in luminance between pixels and high display quality can be obtained. .
Euro Display 99 Late News: P71: “TFT-LEPDwith Image Uniformity by Area Ratio Gray Scale” IEDM 99: P107: “Technology for Active Matrix Light Emitting Polymer Displays” IDW'99: P171: “Low-Temperature Poly-Si TFT Drive Light-Emitting-Polymer Display and Digital Gray Scale For Uniform” Japanese Patent Laid-Open No. 2001-324958

  An object of the present invention is to provide a large-sized and high-resolution EL display device that can be manufactured with high yield and low cost. For this purpose, the following problems exist.

  First, as a driving method of the EL display device, problems in the case of combining digital gradation and time gradation will be described. When digital gradation and time gradation are combined, in order to express multiple gradations, one frame period is divided into a plurality of subframe periods, and the number and length of the lit subframe periods are controlled. To express gradation. In other words, compared to the time that can be taken to display one image with analog gradation, when a digital gradation and time gradation are combined, it can be taken to display one picture. The time is a fraction of the number of subframes, and the driving circuit must be operated at a very high speed as compared with analog gradation.

  In addition, there is a limit to the operating frequency of the drive circuit, and if the number of subframes is too large or the resolution is increased, the writing time is insufficient. In other words, as a driving method of the display device, one of the problems when combining digital gradation and time gradation is insufficient writing time. In order to achieve the object of the present invention, it is necessary to make the writing time as long as possible.

  Next, the problem of increase in parasitic capacitance will be described. As the display device is larger and has higher resolution, the wiring in the pixel portion becomes longer and the number of wirings intersecting the wiring increases, so that the parasitic capacitance attached to the wiring in the pixel portion increases.

  When the parasitic capacitance is increased, the rounding of the waveform of the electric signal transmitted to the wiring is increased. The rounding of the waveform hinders the correct transmission of the signal and causes the display quality to deteriorate. That is, one of the problems for obtaining a large EL display device with high resolution is an increase in parasitic capacitance. In order to achieve the object of the present invention, the parasitic capacitance must be made as small as possible.

  Next, problems for manufacturing at low cost will be described. Currently, TFTs and electronic circuits using the TFTs are generally manufactured by laminating various thin films such as semiconductors, insulators, and conductors on a substrate and appropriately forming a predetermined pattern by a photolithography technique. is there. Photolithographic technology is a technology that uses a light to transfer a circuit pattern or other pattern formed on a transparent flat plate called a photomask onto a target substrate. It is widely used in the manufacturing process.

    The manufacturing process using the photolithography technique requires a multi-step process such as exposure, development, baking, and peeling only by handling a mask pattern formed using a photosensitive organic resin material called a photoresist. Therefore, the manufacturing cost inevitably increases as the number of photolithography processes increases.

  Next, the problem of wiring resistance will be described. First, a case where analog driving is used as a driving method of the EL display device will be described.

  FIG. 3 is a graph showing the characteristics of the driving TFT in the saturation region (Vds> Vg−Vth). Here, Vds is a source-drain voltage, Vg is a gate-source voltage, and Vth is a threshold voltage. 301 is called an Id-Vg characteristic (or Id-Vg curve). Here, Id is a drain current. From this graph, the amount of current flowing for an arbitrary gate voltage can be known.

  In the analog driving method, a saturation region is used in a driving TFT, and the drain current is changed by changing the gate voltage.

  The switching TFT is turned on, and an analog video signal input from the source signal line into the pixel is applied to the gate electrode of the driving TFT. Thus, the gate voltage of the driving TFT changes. At this time, in accordance with the Id-Vg characteristic shown in FIG. Thus, a predetermined drain current flows through the EL element corresponding to the voltage of the analog video signal input to the gate electrode of the driving TFT, and the EL element emits light with a light emission amount corresponding to the current amount.

  As described above, the light emission amount of the EL element is controlled by the analog video signal, and gradation display is performed by controlling the light emission amount.

  Here, even if the same signal is input from the source signal line, the gate voltage of the driving TFT of each pixel changes when the potential of the source region of the driving TFT changes. Here, the potential of the source region of the driving TFT is supplied from a power supply line. However, the potential of the power supply line changes depending on the position inside the pixel portion due to the potential drop due to the wiring resistance.

  Further, when the wiring resistance of the power supply line is small, the display device is relatively small, or the current flowing through the power supply line is relatively small, it does not matter so much. Is relatively large, the change in the potential of the power supply line due to the wiring resistance becomes large.

  In particular, the larger the display device, the greater the variation in the distance from the external input terminal to each power supply line in the pixel portion, and the greater the variation in the wiring length of the power supply line routing portion. For this reason, the change in the potential of the power supply line due to the potential drop in the power supply line routing portion becomes large.

  Variation in the potential of the power supply line due to these factors affects the light emission luminance of the EL element of each pixel and causes display unevenness because the display luminance is changed.

  Hereinafter, specific examples of variations in the potential of the power supply line are shown.

  As shown in FIG. 4, when a white or black box is displayed on the display screen, a phenomenon called crosstalk has occurred. This is a phenomenon in which a difference in luminance between the lateral direction of the box and the luminance occurs above or below the box.

  Crosstalk occurs because a difference occurs in the current flowing through the driving TFT 104 in each of the pixels in the upper, lower, and lateral directions of the box. The cause of this difference occurs because the power supply lines V1 and V2 are arranged in parallel to the source signal lines S1 and S2.

For example, as shown in FIG. 4, when a white box is displayed on a part of the display screen, the power supply line corresponding to the pixel displaying the box is interposed between the source and drain of the driving TFT of the box display pixel. Since the current flows through the EL element, the potential drop due to the wiring resistance of the power supply line is larger than that of the power supply line that supplies power only to the pixels that do not display the box. For this reason, darker portions occur at the top and bottom of the box than other pixels that do not display the box.
Here, when the size of the display screen of the display device is small, no problem has occurred. However, when the size of the display screen of the display device increases, the display device flows in proportion to the area of the display screen. The total current increases.

  For example, when the total sum of currents flowing through EL elements in a display device having a 4-inch diagonal display screen and a display device having a 20-inch diagonal display screen is compared, the area of the latter display screen is 25 times that of the former. Therefore, the sum total of the currents flowing through the EL elements is about 25 times.

  Therefore, in the display device having a large display screen size, the above-described problem of potential drop becomes a big problem.

  For example, in a 20-inch display device, even if the wiring length is 700 mm, the wiring width is 10 mm, and the sheet resistance is 0.1 ohm, if the current flows about 1 A, the potential drop becomes 10 V, and normal display becomes impossible. .

  Next, the problem of the wiring resistance when the constant voltage drive is used in the digital drive as the drive method of the EL display device will be described.

  When constant voltage driving is used, the voltage supplied to the EL element 106 is constant in each pixel, so that the luminance of each pixel is not affected by the characteristic variation of the driving TFT 104 and has a very high image quality display capability. An EL display device can be obtained. However, if the wiring resistance is large, it becomes impossible to satisfy the necessary condition for performing constant voltage driving in which the voltage supplied to the EL element 106 is constant in each pixel. This will be described with reference to FIGS. 5 (A) and 5 (B).

  FIG. 5A shows the case where one third of the pixels are lit simultaneously with respect to the total number of pixels. FIG. 5B shows the case where two-thirds of the pixels are lit simultaneously.

  5A and FIG. 5B are different in the number of pixels that are lit at the same time, the value of the current flowing through the power supply lines (V1 to Vx) of the pixel portion during lighting is shown in FIG. It differs between A) and FIG. 5B. Here, when wiring resistance exists in the power supply lines (V1 to Vx) of the pixel portion, the voltage drops according to the magnitude of the current value. That is, the voltage supplied per pixel differs between FIG. 5A and FIG. 5B with different current values. The fact that the supplied voltage is different means that the luminance of the EL element is different between when the display is as shown in FIG. 5A and when the display is as shown in FIG. It is.

  Thus, the change in luminance per pixel depending on the lighting rate of the display image has an adverse effect when the gradation is displayed by the time gradation. For example, consider the case where three gradations are displayed by continuously displaying (A) in FIG. 5 and (B) in FIG. 5 for the same time. At this time, gradation 0 should be displayed in the display area 503, gradation 2 in the display area 504, and gradation 1 in the display area 505. However, if wiring resistance exists, the luminance per pixel is higher in FIG. 5A than in FIG. 5A and FIG. Becomes smaller. In this way, when the wiring resistance exists, the intended gradation cannot be obtained when the constant voltage drive is used in the digital drive.

  The difference in luminance increases as the wiring resistance of the power supply lines (V1 to Vx) increases. And since a power supply line becomes long, so that a display apparatus becomes large, wiring resistance becomes large. That is, one of the problems for obtaining a large and high resolution EL display device is an increase in wiring resistance. In order to achieve the object of the present invention, the wiring resistance must be made as small as possible.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an active matrix EL display device capable of clear multi-tone color display. It is another object of the present invention to provide a high-performance electronic device (electronic device) using such an active matrix EL display device.

  An object of the present invention is to provide a large-sized and high-resolution EL display device that can be manufactured with high yield and low cost. As means for that purpose, the configuration of the present invention will be described below.

  The configuration of the present invention includes a plurality of source signal lines, a plurality of gate signal lines, a plurality of power supply lines in the row direction, a plurality of power supply lines in the column direction, and a plurality of pixels in a matrix. Each of the pixels includes a switching thin film transistor, a driving thin film transistor, and a light emitting element, and each of the plurality of pixels includes one of a plurality of power supply lines in the row direction and a plurality of power supplies in the column direction. An insulating thin film connected to one of the lines includes at least one of a plurality of source signal lines, a plurality of gate signal lines, a plurality of power supply lines in the row direction, and a plurality of power supply lines in the column direction. It is characterized in that it is formed in one lower part.

  In the above invention, the electrode of the switching thin film transistor or the electrode of the driving thin film transistor may be formed by a droplet discharge method or a printing method. Any one of the plurality of source signal lines, the plurality of gate signal lines, the plurality of power supply lines in the row direction, and the plurality of power supply lines in the column direction may be formed by a droplet discharge method or a printing method. Alternatively, it may be formed by sputtering or CVD. Here, the CVD method includes a plasma CVD method (RF plasma CVD method, microwave CVD method, electron cyclotron resonance CVD method, hot filament CVD method, etc.), LPCVD method, and thermal CVD method.

  In addition, the insulating thin film may be formed by a droplet discharge method or a printing method.

  In another configuration of the present invention, a plurality of source signal lines are formed, a plurality of gate signal lines are formed, a plurality of pixels in a matrix are formed, and each of the plurality of pixels includes a switching thin film transistor, A plurality of power supply lines in the row direction are formed and a plurality of power supply lines in the column direction are formed, and each of the plurality of pixels is formed by a droplet discharge method or a printing method. And connecting to one of the plurality of power supply lines in the row direction and one of the plurality of power supply lines in the column direction.

  In the above invention, the insulating thin film may be formed from a source signal line, a gate signal line, a plurality of power supply lines in the row direction, and a plurality of power supply lines in the column direction by a droplet discharge method or a printing method. You may form in at least one lower part. Further, any one of the plurality of source signal lines, the plurality of gate signal lines, the plurality of power supply lines in the row direction, and the plurality of power supply lines in the column direction may be formed by a droplet discharge method or a printing method. Alternatively, it may be formed by sputtering or CVD.

  In another structure of the present invention, a source signal line is formed, a gate signal line is formed, a power supply line is formed, a pixel including a switching thin film transistor, a driving thin film transistor, and a light emitting element is formed. The thin film having the structure is formed in a part below at least one of the source signal line, the gate signal line, and the power supply line.

  In the above invention, the insulating thin film may be formed by a droplet discharge method or a printing method. Further, any one of the source signal line, the gate signal line, and the power supply line may be formed by a droplet discharge method or a printing method, or may be formed by a sputtering method or a CVD method.

  The present invention also relates to a personal computer, a television receiver, a camera, an image display device, a head mounted display, and a portable information terminal using the display device described in the above invention.

  According to the present invention, a large-sized and high-resolution EL display device that can be manufactured with high yield and low cost can be provided. In addition, since a long signal writing time can be taken, an accurate signal can be input to the pixel, and a clear image can be displayed. In addition, since the influence of the wiring resistance can be reduced, image quality defects due to the wiring resistance can be reduced.

  Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in structures of the present invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated.

  Note that in the present invention, the type of applicable transistor is not limited, and a thin film transistor (TFT) using a non-single crystal semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor substrate, or an SOI (Silicon On Insulator). It is possible to apply a MOS transistor, a junction transistor, a bipolar transistor, a transistor using an organic semiconductor or a carbon nanotube, and other transistors formed using a substrate. There is no limitation on the kind of the substrate over which the transistor is provided, and the transistor can be provided over a single crystal substrate, an SOI substrate, a glass substrate, or the like.

(Embodiment 1)
Embodiments of the present invention will be described with reference to FIGS. 13, 14, 15, 16, 8, and 6. FIG. First, in the present invention, manufacturing an EL display device at low cost is one of the problems to be overcome. In order to realize cost reduction, attempts have been made to manufacture TFTs by reducing the photolithography process.

  As a method for reducing the photolithography process, at least one or more of patterns necessary for manufacturing a display panel such as a conductive layer for forming a wiring layer or an electrode or a mask layer for forming a predetermined pattern is used. Has been devised by a method capable of selectively forming a pattern to devise a method for manufacturing a display device. As a method capable of selectively forming a pattern, a droplet discharge method (depending on the method) can form a predetermined pattern by selectively discharging droplets of a composition prepared for a specific purpose. , Also called the inkjet method). In addition, the cost can be reduced by using a method capable of transferring or drawing a pattern, for example, a printing method (a method for forming a pattern such as screen printing or offset printing). That is, one of the problems for obtaining an EL display device at low cost is the large number of photolithography processes. In order to achieve the object of the present invention, the number of photolithography processes must be reduced as much as possible. As the method, a method capable of selectively forming a pattern is effective.

  Therefore, in this embodiment mode, an EL display device is manufactured by a droplet discharge method, which is one of the manufacturing methods of an EL display device which can be selectively formed as described below. However, this is only an example, and the present embodiment is not limited to this method.

  First, a method for manufacturing a display device having a channel protective thin film transistor, in which a means for improving adhesion is applied to manufacturing a gate electrode and a source or drain wiring, is described with reference to FIGS.

  Over the substrate 800, a base film 801 for improving adhesion is formed as a base pretreatment. As the substrate 800, a glass substrate made of barium borosilicate glass, alumino borosilicate glass, or the like, a quartz substrate, a silicon substrate, a metal substrate, a stainless steel substrate, or a plastic substrate having heat resistance that can withstand the processing temperature in this manufacturing process is used. Further, polishing may be performed by a CMP (Chemical Mechanical Polishing) method or the like so that the surface of the substrate 800 is planarized. Note that an insulating layer may be formed over the substrate 800. The insulating layer is formed as a single layer or a stacked layer using an oxide material or a nitride material containing silicon by a known method such as a CVD method, a plasma CVD method, a sputtering method, or a spin coating method. This insulating layer is not necessarily formed, but has an effect of blocking contaminants from the substrate 800. In the case of forming a base layer for preventing contamination from the glass substrate, a base film 801 is formed thereon as pretreatment of the conductive layers 802 and 803 formed by a droplet discharge method.

  One mode of a droplet discharge device used for forming a pattern is shown in FIG. The individual heads 905 of the droplet discharge means 903 are connected to the control means 907, which can draw a pre-programmed pattern under the control of the computer 910. The drawing timing may be performed with reference to a marker 911 formed on the substrate 900, for example. Alternatively, the reference point may be determined based on the edge of the substrate 900. This is detected by an image pickup means 904 such as a CCD, and converted into a digital signal by the image processing means 909 is recognized by the computer 910 and a control signal is generated and sent to the control means 907. Of course, the information on the pattern to be formed on the substrate 900 is stored in the storage medium 908. Based on this information, a control signal is sent to the control means 907, and each head 905 of the droplet discharge means 903 is sent. Can be controlled individually. With one head, conductive material, organic material, inorganic material, etc. can be discharged and drawn respectively. When drawing in a wide area like an interlayer film, the same material is simultaneously used from multiple nozzles to improve throughput. It can be discharged and drawn. In the case of using a large substrate, the head 905 can freely scan the substrate, freely set a drawing area, and can draw a plurality of the same pattern on one substrate.

  In this embodiment mode, a substance having a photocatalytic function is used as the base film having a function of improving adhesion. The photocatalytic substance is a sol-gel dip coating method, spin coating method, droplet discharge method, ion plating method, ion beam method, CVD method, sputtering method, RF magnetron sputtering method, plasma spraying method, plasma spraying method, or anode. It can be formed by an oxidation method. The substance may not have continuity as a film depending on the formation method. In the case of a photocatalytic substance made of an oxide semiconductor containing a plurality of metals, it can be formed by mixing and melting constituent element salts. When the photocatalytic substance is formed by a coating method such as a dip coating method or a spin coating method, it may be fired or dried when it is necessary to remove the solvent. Specifically, heating may be performed at a predetermined temperature (for example, 300 ° C. or higher), and preferably performed in an atmosphere containing oxygen. For example, when Ag is used as the conductive paste and baking is performed in an atmosphere containing oxygen and nitrogen, an organic substance such as a thermosetting resin is decomposed, so that Ag containing no organic substance can be obtained. As a result, the flatness of the Ag surface can be improved.

  By this heat treatment, the photocatalytic substance can have a predetermined crystal structure. For example, it has an anatase type and a rutile-anatase mixed type. In the low temperature phase, the anatase type is preferentially formed. Therefore, heating may be performed even when the photocatalytic substance does not have a predetermined crystal structure. Moreover, when forming by the apply | coating method, in order to obtain a predetermined film thickness, a photocatalyst substance can also be formed in multiple times.

In this embodiment, a case where a TiO _x (typically TiO ₂ ) crystal having a predetermined crystal structure is formed as a photocatalytic substance by a sputtering method will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. In order to form TiO _x having high photocatalytic activity, the atmosphere is rich in oxygen and the formation pressure is increased. Further, it is preferable to form TiO _x while heating the substrate provided with the film forming chamber or the processed material.

  TiOX formed in this way has a photocatalytic function even if it is a very thin film (about 1 nm to 1 μm).

  In addition, as other base pretreatments, metals such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), and Mo (molybdenum) are obtained by sputtering or vapor deposition. It is preferable to form a base film 801 made of a material or an oxide thereof.

  The base film 801 may be formed with a thickness of 0.01 to 10 nm. However, the base film 801 does not necessarily have a layer structure because it may be formed extremely thin. In the case of using a refractory metal material as the base film, after forming the conductive layers 802 and 803 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. It is desirable to process.

  The first method is a step of insulating the base film 801 that does not overlap with the conductive layers 802 and 803 to form an insulating layer. That is, the base film 801 that does not overlap with the conductive layers 802 and 803 is oxidized and insulated. As described above, in the case where the base film 801 is oxidized to be insulated, it is preferable to form the base film 801 with a thickness of 0.01 to 10 nm, so that the base film 801 can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  The second method is a step of removing the base film 801 by etching using the conductive layers 802 and 803 as a mask. When this step is used, there is no restriction on the thickness of the base film 801.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion of the pattern formed by the droplet discharge method to the formation region. An organic material (organic resin material) (polyimide, acrylic) or siloxane may be used. Note that siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

  Next, a composition containing a conductive material is discharged to form conductive layers 802 and 803 that function as gate electrodes later.

  The droplet discharge means is a general term for a device having means for discharging droplets such as a nozzle having a composition discharge port and a head having one or a plurality of nozzles. The diameter of the nozzle provided in the droplet discharge means is set to 0.02 to 100 μm (preferably 30 μm or less), and the discharge amount of the composition discharged from the nozzle is 0.001 pl to 100 pl (preferably 10 pl). Set to: The discharge amount increases in proportion to the size of the nozzle diameter. In addition, the distance between the object to be processed and the nozzle outlet is preferably as close as possible in order to drop it at a desired location, preferably about 0.1 to 3 mm (preferably about 1 mm or less). Set.

  A composition in which a conductive material is dissolved or dispersed in a solvent is used as the composition discharged from the discharge port. Conductive materials include metals such as Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, and Al, metal sulfides of Cd and Zn, oxides such as Fe, Ti, Zr, and Ba, halogen Corresponds to silver halide fine particles or dispersible nanoparticles. An oxide of Si or Ge may be included. Further, it corresponds to indium tin oxide (ITO) used as a transparent conductive film, indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like. However, it is preferable to use a composition in which any of gold, silver and copper is dissolved or dispersed in a solvent in consideration of the specific resistance value, more preferably the composition discharged from the discharge port. It is preferable to use low resistance silver or copper. However, when silver or copper is used, a barrier film may be provided as a countermeasure against impurities. As the barrier film, a silicon nitride film or nickel boron (NiB) can be used.

  Alternatively, particles in which a conductive material is coated with another conductive material to form a plurality of layers may be used. For example, particles having a three-layer structure in which nickel boron (NiB) is coated around copper and silver is coated around it may be used. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone are used. The viscosity of the composition is preferably 50 mPa · S (cps) or less, in order to prevent drying from occurring or to allow the composition to be smoothly discharged from the discharge port. The surface tension of the composition is preferably 40 mN / m or less. However, the viscosity and the like of the composition may be appropriately adjusted according to the solvent to be used and the application. As an example, the viscosity of a composition in which ITO, organic indium, or organic tin is dissolved or dispersed in a solvent is 5 to 50 mPa · S, the viscosity of a composition in which silver is dissolved or dispersed in a solvent is 5 to 20 mPa · S, The viscosity of the composition in which gold is dissolved or dispersed in a solvent is preferably set to 10 to 20 mPa · S.

  The conductive layer may be a stack of a plurality of conductive materials. Alternatively, first, silver may be used as a conductive material, and a conductive layer may be formed by a droplet discharge method, followed by plating with copper or the like. Plating may be performed by electroplating or chemical (electroless) plating. For plating, the substrate surface may be immersed in a container filled with a solution having a plating material, but the substrate is placed at an angle (or vertically) so that the solution having the material to be plated flows on the substrate surface. It may be applied. When plating is performed so that the solution is applied while standing the substrate, there is an advantage that the process apparatus is reduced in size.

  Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductor particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.01 to 10 μm. However, when formed in a gas evaporation method, the nanomolecules protected with the dispersant are as fine as about 7 nm. When the surface of each particle is covered with a coating agent, the nanoparticles are aggregated in the solvent. And stably disperse at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

  When the step of discharging the composition is performed under reduced pressure, the solvent of the composition is volatilized between the time of discharging the composition and landing on the object to be processed, and the subsequent drying and baking steps are omitted. be able to. Further, it is preferable to perform under reduced pressure because an oxide film or the like is not formed on the surface of the conductor. In addition, after discharging the composition, one or both steps of drying and baking are performed. The drying and baking steps are both heat treatment steps. For example, drying is performed at 100 degrees for 3 minutes, and baking is performed at 200 to 350 degrees for 15 minutes to 30 minutes. Time is different. The drying process and the firing process are performed under normal pressure or reduced pressure by laser light irradiation, rapid thermal annealing, a heating furnace, or the like. In addition, the timing which performs this heat processing is not specifically limited. In order to satisfactorily perform the drying and firing steps, the substrate may be heated, and the temperature at that time depends on the material of the substrate or the like, but is generally 100 to 800 degrees (preferably 200). ~ 350 degrees). By this step, the solvent in the composition is volatilized or the dispersant is chemically removed, and the surrounding resin is cured and contracted to bring the nanoparticles into contact with each other, thereby accelerating fusion and fusion.

For the laser light irradiation, a continuous wave or pulsed gas laser or solid-state laser may be used. Examples of the former gas laser include an excimer laser, and examples of the latter solid-state laser include a laser using a crystal such as YAG or YVO ₄ doped with Cr, Nd, or the like. Note that it is preferable to use a continuous wave laser because of the absorption rate of the laser light. In addition, a so-called hybrid laser irradiation method combining pulse oscillation and continuous oscillation may be used. However, depending on the heat resistance of the substrate 800, heat treatment by laser light irradiation may be performed instantaneously within a few microseconds to several tens of seconds so that the substrate 800 is not destroyed. Instantaneous thermal annealing (RTA) uses an infrared lamp or a halogen lamp that irradiates ultraviolet light or infrared light in an inert gas atmosphere, and rapidly raises the temperature for several minutes to several microseconds. This is done by applying heat instantaneously. Since this treatment is performed instantaneously, only the outermost thin film can be heated substantially without affecting the lower layer film. That is, it does not affect a substrate having low heat resistance such as a plastic substrate.

  Further, as the base pretreatment of the conductive layer formed using the droplet discharge method, the above-described step of forming the base film 801 is performed. However, this treatment step may be performed after the conductive layer is formed.

  Next, a gate insulating layer is formed over the conductive layers 802 and 803 (see FIG. 13A). The gate insulating layer may be formed of a known material such as a silicon oxide material or a nitride material, and may be a stacked layer or a single layer. For example, a stack of three layers of a silicon nitride film, a silicon oxide film, and a silicon nitride film may be used, or a stack of a single layer or two layers of a silicon oxynitride film may be used. In this embodiment, a silicon nitride film is used for the insulating layer 804 and a silicon nitride oxide film is used for the gate insulating layer 805. A silicon nitride film having a dense film quality is preferably used. In addition, when silver or copper is used for a conductive layer formed by a droplet discharge method, if a silicon nitride film or a NiB film is formed thereon as a barrier film, diffusion of impurities can be prevented and the surface can be planarized. is there. Note that in order to form a dense insulating film with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably contained in a reaction gas and mixed into the formed insulating film.

  Next, a conductive layer (also referred to as a first electrode) 806 is formed selectively over the gate insulating film by discharging a composition containing a conductive material (see FIG. 13B). The conductive layer 806 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxidized when light is emitted from the substrate 800 side or when a transmissive EL display panel is manufactured. A predetermined pattern may be formed with a composition containing zinc (ZnO), tin oxide (SnO2), and the like, and may be formed by baking.

  Further, it is preferably formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), or the like by a sputtering method. More preferably, indium tin oxide containing silicon oxide formed by sputtering using a target containing 2 to 10% by weight of silicon oxide in ITO is used. In addition, an oxide conductive material formed using a target in which 2 to 20% by weight of zinc oxide (ZnO) is mixed with indium oxide containing silicon oxide may be used. After the conductive layer (first electrode) 806 is formed by a sputtering method, a mask layer may be formed by a droplet discharge method and formed into a desired pattern by etching. In this embodiment, the conductive layer 806 is formed using a light-transmitting conductive material by a droplet discharge method. Specifically, ITSO including indium tin oxide, ITO, and silicon oxide is formed. Use to form. Although not shown, a photocatalytic substance may be formed in the same manner as when the conductive layers 802 and 803 are formed in a region where the conductive layer 806 is formed. The photocatalytic substance improves adhesion, and the conductive layer 806 can be formed by thinning into a desired pattern. The conductive layer 806 becomes a first electrode that functions as a pixel electrode.

  In this embodiment mode, the example in which the gate insulating layer is a three-layer structure including a silicon nitride film made of silicon nitride, a silicon oxynitride film (silicon oxide film), and a silicon nitride film has been described above. As a preferable structure, a conductive layer (first electrode) 806 formed of indium tin oxide containing silicon oxide is formed in close contact with an insulating layer made of silicon nitride included in the gate insulating layer 805, whereby electroluminescence is produced. The rate at which the light emitted from the layer is emitted to the outside can be increased.

  Further, in the case where the emitted light is emitted to the side opposite to the substrate 800 side, Ag (silver), Au (gold), Cu (copper) is used when a reflective EL display panel is manufactured. ), W (tungsten), Al (aluminum), or other metal particles as the main component. As another method, a transparent conductive film or a light reflective conductive film is formed by a sputtering method, a mask pattern is formed by a droplet discharge method, and the first electrode layer is formed by combining etching processes. good.

  The conductive layer (first electrode) 806 may be wiped with a CMP method or a polyvinyl alcohol-based porous material and polished so that the surface thereof is planarized. Further, after polishing using the CMP method, the surface of the conductive layer (first electrode) 806 may be irradiated with ultraviolet rays, oxygen plasma treatment, or the like.

  The semiconductor layer may be formed by a known means (such as sputtering, LP (Low Pressure) CVD, or plasma CVD). There is no limitation on the material of the semiconductor layer, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy.

  The semiconductor layer uses an amorphous semiconductor (typically hydrogenated amorphous silicon) or a crystalline semiconductor (typically polysilicon) as a material. For polysilicon, so-called high-temperature polysilicon using polycrystalline silicon formed at a process temperature of 800 ° C. or higher as a main material, or polycrystalline silicon formed at a process temperature of 600 ° C. or lower as a main material is used. It includes so-called low-temperature polysilicon and crystalline silicon that is crystallized by adding an element that promotes crystallization.

As another substance, a semi-amorphous semiconductor or a semiconductor including a crystal phase in part of a semiconductor layer can be used. A semi-amorphous semiconductor is a semiconductor having an intermediate structure between amorphous and crystalline (including single crystal and polycrystal), and has a third state that is stable in terms of free energy, and has a short distance. It is crystalline with order and lattice distortion. Typically, it is a semiconductor layer containing silicon as a main component and having a Raman spectrum shifted to a lower wave number side than 520 cm ⁻¹ with lattice distortion. Further, in order to terminate dangling bonds (dangling bonds), hydrogen or halogen is contained at least 1 atomic% or more. Here, such a semiconductor is referred to as a semi-amorphous semiconductor (hereinafter referred to as “SAS”). This SAS is also called a so-called microcrystalline semiconductor (typically microcrystalline silicon).

This SAS can be obtained by glow discharge decomposition (plasma CVD) of a silicide gas. A typical silicide gas is SiH ₄ , and Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can be used. Further, GeF ₄ and F ₂ may be mixed. The formation of the SAS can be facilitated by diluting the silicide gas with one or plural kinds of rare gas elements selected from hydrogen or hydrogen and helium, argon, krypton, or neon. It is preferable that the dilution ratio of hydrogen with respect to the silicide gas is, for example, 2 to 1000 times in flow rate ratio. Of course, formation of the SAS by glow discharge decomposition is preferably performed under reduced pressure, but it can also be formed by utilizing discharge at atmospheric pressure. Typically, it may be performed in a pressure range of 0.1 Pa to 133 Pa. The power supply frequency for forming the glow discharge is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. What is necessary is just to set high frequency electric power suitably. The substrate heating temperature is preferably 300 ° C. or lower, and can be formed even at a substrate heating temperature of 100 to 200 ° C. Here, as an impurity element mainly taken in at the time of film formation, impurities derived from atmospheric components such as oxygen, nitrogen, and carbon are preferably 1 × 10 ²⁰ cm ⁻³ or less, and in particular, the oxygen concentration is 5 × 10 5. It is preferable to be ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less. Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a favorable SAS can be obtained. In addition, a SAS layer formed of a hydrogen-based gas may be stacked on a SAS layer formed of a fluorine-based gas as a semiconductor layer.

In the case where a crystalline semiconductor layer is used for the semiconductor layer, a method for manufacturing the crystalline semiconductor layer is a known method (laser crystallization method, thermal crystallization method, or heat using an element that promotes crystallization such as nickel. A crystallization method or the like may be used. In the case where an element for promoting crystallization is not introduced, the amorphous silicon film is heated at 500 ° C. for 1 hour in a nitrogen atmosphere before irradiating the amorphous silicon film with laser light, whereby the concentration of hydrogen contained in the amorphous silicon film is set to 1 ×. Release to 10 ²⁰ atoms / cm ³ or less. This is because the film is destroyed when the amorphous silicon film containing a large amount of hydrogen is irradiated with laser light.

  The method of introducing the metal element into the amorphous semiconductor layer is not particularly limited as long as the metal element can be present on the surface of the amorphous semiconductor layer or inside the amorphous semiconductor layer. For example, sputtering, CVD, A plasma treatment method (including a plasma CVD method), an adsorption method, or a method of applying a metal salt solution can be used. Among these, the method using a solution is simple and useful in that the concentration of the metal element can be easily adjusted. At this time, in order to improve the wettability of the surface of the amorphous semiconductor layer and to spread the aqueous solution over the entire surface of the amorphous semiconductor layer, irradiation with UV light in an oxygen atmosphere, thermal oxidation method, hydroxy radical It is desirable to form an oxide film by treatment with ozone water or hydrogen peroxide.

  The crystallization of the amorphous semiconductor layer may be a combination of heat treatment and crystallization by laser light irradiation, or the heat treatment and laser light irradiation may be performed a plurality of times.

  An organic semiconductor using an organic material may be used as the semiconductor. As the organic semiconductor, a low molecular material, a polymer material, or the like is used, and materials such as an organic dye or a conductive polymer material can also be used.

  In this embodiment mode, an amorphous semiconductor is used as the semiconductor. In order to form the semiconductor layer 807 which is an amorphous semiconductor layer and to form the channel protective films 809 and 810, for example, an insulating film is formed by a plasma CVD method, and a desired shape is selected in a desired region. Etch. At this time, the channel protective films 809 and 810 can be formed by exposing from the back surface of the substrate using the gate electrode as a mask. For the channel protective film, polyimide or polyvinyl alcohol may be dropped using a droplet discharge method. As a result, the exposure process can be omitted. After that, an N-type semiconductor layer 808 is formed by a plasma CVD method or the like using a semiconductor layer having one conductivity type, for example, an N-type amorphous semiconductor layer (see FIG. 13C). A semiconductor layer having one conductivity type may be formed as necessary.

  Channel protective films include inorganic materials (silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, etc.), photosensitive or non-photosensitive organic materials (organic resin materials) (polyimide, acrylic, polyamide, polyimide amide, resist , Benzocyclobutene, etc.), a low dielectric constant Low-k material, or a film made of a plurality of kinds, or a stack of these films can be used. Alternatively, a skeleton structure is formed by a bond of silicon (Si) and oxygen (O), and an organic group containing at least hydrogen as a substituent (for example, an alkyl group or aromatic hydrocarbon) may be used. As the substituent, a fluoro group may be used, or an organic group containing at least hydrogen and a fluoro group may be used. As a manufacturing method in the case where an inorganic material is used for the channel protective film, a vapor phase growth method such as a plasma CVD method or a thermal CVD method, or a sputtering method can be used. When an organic material is used, a droplet discharge method or a printing method (a method for forming a pattern such as screen printing or offset printing) can be used. An insulating film, an SOG film, or the like obtained by a coating method can also be used as the channel protective film.

  Subsequently, mask layers 811 and 812 made of an insulator such as resist or polyimide are formed, and the semiconductor layer 807 and the N-type semiconductor layer 808 are simultaneously patterned using the mask layers 811 and 812.

Next, mask layers 813 and 814 made of an insulator such as resist or polyimide are formed by a droplet discharge method (see FIG. 13D). Through holes 818 are formed in part of the gate insulating layers 805 and 804 by etching using the mask layers 813 and 814, and one of the conductive layers 803 functioning as a gate electrode layer disposed thereunder is formed. Expose the part. The etching process may be either plasma etching (dry etching) or wet etching, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , NF ₃ , Cl ₂ , or BCl ₃ may be used, and an inert gas such as He or Ar may be appropriately added. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  After removing the mask layers 813 and 814, a composition containing a conductive material is discharged to form conductive layers 815, 816, and 817, and the N-type semiconductor layer is formed using the conductive layers 815, 816, and 817 as a mask. Pattern processing is performed to form an N-type semiconductor layer (see FIG. 14A). The conductive layers 815, 816, and 817 function as wiring layers. Note that although not illustrated, before the formation of the conductive layers 815, 816, and 817, a photocatalytic substance or the like is selectively formed on a portion where the conductive layers 815, 816, and 817 are in contact with the gate insulating layer 805. Processing steps may be performed. Then, the conductive layer can be formed with good adhesion.

  In addition, as the base pretreatment of the conductive layer formed using a droplet discharge method, the above-described step of forming the base film may be performed, and this treatment step may be performed after the conductive layer is formed. This step improves the adhesion between the layers, so that the reliability of the display device can also be improved.

  The conductive layer 817 functions as a source / drain wiring layer and is formed so as to be electrically connected to the previously formed first electrode. In addition, in the through-hole 818 formed in the gate insulating layer 805, the conductive layer 816 that is a source or drain wiring layer and the conductive layer 803 that is a gate electrode layer are electrically connected. As a conductive material for forming the wiring layer, a composition containing metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) as a main component is used. be able to. Alternatively, light-transmitting indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  In the step of forming the through-hole 818 in part of the gate insulating layers 805 and 804, the through-hole 818 may be formed using the conductive layers 815, 816, and 817 as a mask after the formation of the conductive layers 815, 816, and 817. Good. Then, a conductive layer is formed in the through hole 818, and the conductive layer 816 and the conductive layer 803 which is a gate electrode layer are electrically connected. In this case, there is an advantage that the process is simplified.

  Subsequently, an insulating layer 820 to be a partition wall is formed. Although not illustrated, a protective layer of silicon nitride or silicon nitride oxide may be formed over the entire surface so as to cover the thin film transistor under the insulating layer 820. The insulating layer 820 is formed with an opening as shown in FIG. 14B by etching after forming an insulating layer over the entire surface by spin coating or dipping. Further, if the insulating layer 820 is formed by a droplet discharge method, etching is not necessarily required. In the case of forming a wide area such as the insulating layer 820 by using a droplet discharge method, if a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device and drawn so that a plurality of lines overlap, the throughput is increased. improves.

  The insulating layer 820 is formed with an opening of a through hole in accordance with a position where a pixel is formed corresponding to the conductive layer 806 which is the first electrode. The insulating layer 820 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, and other inorganic insulating materials, acrylic acid, methacrylic acid, and derivatives thereof, polyimide, aromatic, Inorganic siloxanes containing Si—O—Si bonds among silicon, oxygen, and hydrogen compounds formed from heat-resistant polymers such as aromatic polyamides, polybenzimidazoles, or siloxane-based materials as starting materials The hydrogen can be formed of an organic siloxane insulating material substituted with an organic group such as methyl or phenyl. When a photosensitive or non-photosensitive material such as acrylic or polyimide is used, the side surface has a shape in which the curvature radius changes continuously, and the upper thin film is formed without being cut off.

  Through the above steps, a TFT substrate for an EL display panel in which a bottom-gate (also referred to as an inverted staggered) channel protection TFT and a first electrode (first electrode layer) are connected to the substrate 800 is completed. .

  Before forming the electroluminescent layer 821, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in the insulating layer 820 or on the surface thereof. In addition, it is preferable to perform heat treatment at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and to form the electroluminescent layer 821 by vacuum evaporation or a droplet discharge method under reduced pressure without being exposed to the air as it is. .

  As the electroluminescent layer 821, materials that emit red (R), green (G), and blue (B) light are selectively formed by an evaporation method using an evaporation mask, or the like. A material that emits red (R), green (G), and blue (B) light can also be formed by a droplet discharge method (such as a low-molecular or high-molecular material) in the same manner as a color filter. In this case, no mask is used. Both are preferable because RGB can be separately applied. A conductive layer 822 which is a second electrode is stacked over the electroluminescent layer 821 to complete a display device having a display function using a light-emitting element (see FIG. 14B).

Although not shown, it is effective to provide a passivation film so as to cover the second electrode. As the passivation film, silicon nitride (SiN), silicon oxide (SiO ₂ ), silicon oxynitride (SiO _x N _y : x>y> 0), silicon nitride oxide (SiN _x O _y : x>y> 0), Aluminum nitride (AlN), aluminum oxynitride (AlO _x N _y : x>y> 0), aluminum nitride oxide (AlN _x O _y : x>y> 0) or aluminum oxide in which the nitrogen content is higher than the oxygen content In addition, an insulating film including diamond like carbon (DLC) and a nitrogen-containing carbon film (CN _x ) can be used, and a single layer or a combination of the insulating films can be used. For example, a laminate such as a nitrogen-containing carbon film (CN _x ) and silicon nitride (SiN), an organic material can be used, and a polymer laminate such as a styrene polymer may be used. A siloxane resin can also be used. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

At this time, it is preferable to use a film with good coverage as the passivation film, and it is effective to use a carbon film, particularly a DLC film. Since the DLC film can be formed in a temperature range from room temperature to 100 ° C., it can be easily formed over the electroluminescent layer having low heat resistance. The DLC film is formed by a plasma CVD method (typically, an RF plasma CVD method, a microwave CVD method, an electron cyclotron resonance (ECR) CVD method, a hot filament CVD method, etc.), a combustion flame method, a sputtering method, or an ion beam evaporation method. It can be formed by laser vapor deposition. The reaction gas used for film formation was hydrogen gas and a hydrocarbon-based gas (for example, CH ₄ , C ₂ H ₂ , C ₆ H _6, etc.), ionized by glow discharge, and negative self-bias was applied. Films are formed by accelerated collision of ions with the cathode. The CN film may be formed using C ₂ H ₄ gas and N ₂ gas as reaction gases. The DLC film has a high blocking effect against oxygen and can suppress oxidation of the electroluminescent layer. Therefore, the problem that the electroluminescent layer is oxidized during the subsequent sealing process can be prevented.

  FIG. 16A is a top view of a pixel portion of the display device of this embodiment mode, and FIG. Reference numerals 1001 and 1002 denote TFTs, 1003 denotes a light emitting element, 1004 denotes a capacitor element, 1005 denotes a source signal line, 1006 denotes a gate signal line, and 1007 denotes a power supply line. The TFT 1001 is a transistor that controls the connection state with the signal line (hereinafter also referred to as “switching transistor” or “switching TFT”), and the TFT 1002 is a transistor that controls the current flowing to the light emitting element (hereinafter “driving transistor”). Or “driving TFT”), and the driving TFT is connected in series with the light emitting element. The capacitor element 1004 holds a voltage between the source and the gate of the TFT 1002 which is a driving TFT.

  A detailed display device of the present embodiment is shown in FIG. A substrate 800 including a switching TFT 1001 and a TFT 1002 which is a driving TFT connected to the light emitting element 1003 is fixed to a sealing substrate 850 with a sealant 851. Various signals supplied to each circuit formed on the substrate 800 are supplied at a terminal portion.

  A gate wiring layer 860 is formed in the terminal portion in the same process as the conductive layers 802 and 803. Needless to say, a photocatalytic substance is also formed in the formation region of the gate wiring layer 860 as in the case of the conductive layers 802 and 803, and adhesion with the underlying formation region of the gate wiring layer 860 is achieved when forming by the droplet discharge method. Can be improved. The etching for exposing the gate wiring layer 860 can be performed simultaneously with the formation of the through hole 818 in the gate insulating layer 805. A flexible wiring substrate (FPC) 862 can be connected to the gate wiring layer 860 by an anisotropic conductive layer 861.

  Note that in the above display device, the case where the light-emitting element 1003 is sealed with a glass substrate is shown; the sealing process is a process for protecting the light-emitting element from moisture and is mechanically sealed with a cover material. Any of a method, a method of encapsulating with a thermosetting resin or an ultraviolet light curable resin, or a method of encapsulating with a thin film having a high barrier ability such as a metal oxide or a nitride is used. As the cover material, glass, ceramics, plastic, or metal can be used. However, when light is emitted to the cover material side, it must be translucent. In addition, the cover material and the substrate on which the light emitting element is formed are bonded together using a sealing material such as a thermosetting resin or an ultraviolet light curable resin, and the resin is cured by heat treatment or ultraviolet light irradiation treatment to form a sealed space. Form. It is also effective to provide a hygroscopic material typified by barium oxide in this sealed space. This hygroscopic material may be provided in contact with the sealing material, or may be provided on the partition wall or in the peripheral portion so as not to block light from the light emitting element. Further, the space between the cover material and the substrate on which the light emitting element is formed can be filled with a thermosetting resin or an ultraviolet light curable resin. In this case, it is effective to add a moisture absorbing material typified by barium oxide in the thermosetting resin or the ultraviolet light curable resin.

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using a droplet discharge method, an EL display panel can be easily manufactured even when a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. be able to.

  In addition, a highly reliable display device with improved adhesion and peel resistance can be manufactured.

  Circuit diagrams of the entire pixel portion in this embodiment are shown in FIGS. The present embodiment is characterized in that a plurality of source signal lines are provided for one vertical pixel column. In FIG. 8, a case where three source signal lines are provided for one column of vertical pixels will be described as an example.

  Note that the number of source signal lines is not limited to three, and may be any number.

  In FIG. 8, a description will be given assuming that 854 which is a circuit of each pixel is the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to FIG.

  The pixel in the first row and the first column of the pixel portion includes a gate signal line G1, S1a which is one of three source signal lines, a power supply line V1, a switching TFT 1001, a driving TFT 1002, An EL element 1003 and a capacitor 1004 are included.

  Connection with a pixel circuit will be described. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, S1a which is one of the three source signal lines is connected to the source or drain electrode of the switching TFT 1001, and the power supply line V1 is connected to the driving TFT 1002. And the other electrode of the capacitive element 1004 is connected to the other source or drain electrode of the switching TFT 1001 and the gate electrode of the driving TFT 1002 for driving. The other source or drain electrode of the TFT 1002 is connected to the EL element 1003.

  The pixel in the second row and first column of the pixel portion includes a gate signal line G2, S1b, which is one of the three source signal lines, a power supply line V1, a switching TFT 1001, and a driving TFT 1002. An EL element 1003 and a capacitor 1004.

  The pixel in the second row and first column of the pixel portion has a configuration in which G1 is replaced with G2 and S1a is replaced with S1b in the configuration of the pixel in the first row and first column.

  The pixel in the third row and the first column of the pixel portion includes a gate signal line G3, S1c which is one of the three source signal lines, a power supply line V1, a switching TFT 1001, a driving TFT 1002, An EL element 1003 and a capacitor 1004 are included.

  The pixel in the third row and first column of the pixel portion has a configuration in which G1 is replaced with G3 and S1a is replaced with S1c in the configuration of the pixel in the first row and first column.

  In the three rows of pixel columns, G1, G2, and G3 are electrically connected.

  The first pixel column is a repetition of the above configuration.

  The second pixel column has a connection in which V1 is replaced with V2, S1a is replaced with S2a, S1b is replaced with S2b, and S1c is replaced with S2c.

  The n-th pixel column has a connection in which V1 is replaced with Vn, S1a is replaced with Sna, S1b is replaced with Snb, and S1c is replaced with Snc.

  Further, V1 to Vn are all electrically connected to each other.

  Next, how the circuit of FIG. 8 is operated will be described. First, the gate signal lines G1, G2, and G3 are turned on simultaneously. While the gate signal lines G1, G2, and G3 are on, signals are written to the pixels by the source signal lines S1a, S1b, S1c,..., Sna, Snb, and Snc. Next, the gate signal lines G4, G5, G6 are simultaneously turned on. While the gate signal lines G4, G5, G6 are on, signals are written to the pixels by the source signal lines S1a, S1b, S1c,..., Sna, Snb, Snc. This operation is repeated up to the gate signal lines Gm-2, Gm-1, and Gm. With the operation so far, signal writing of one image is completed.

  When operated in this manner, the gate signal line operates as a set of three, and therefore the time during which the gate signal line is on is tripled compared to a circuit having one signal line. That is, it is possible to overcome the problem that one of the problems to be overcome of the present invention is that the writing time must be made as long as possible.

  However, when connected as shown in FIG. 8, the parasitic capacitance between the wirings may increase.

  Therefore, in this embodiment, in addition to the configuration of FIG. 8, a device on the process may be performed that takes advantage of the creation method capable of selectively forming a pattern. In order to explain this, FIG. 6 is used as a diagram showing a cross section of a portion indicated by a line segment 855.

  FIG. 6 shows a process from the state where the gate insulating layer 805 is formed in the TFT forming step described above (FIG. 13A). Since no semiconductor layer is present in the cross section, a conductive layer is usually formed after the gate insulating layer 605 is formed (FIG. 6A). However, in this embodiment mode, after forming the gate insulating layer 605, a part of the insulating layer where the three source signal lines are arranged is selectively formed by a droplet discharge method. (FIG. 6B). After that, a conductive layer is formed according to the method described above (FIG. 6C) to form a pattern.

  By performing such a process, three source signal lines are formed: a source signal line 616 in which the insulating layer 606 is present underneath, and source signal lines 615 and 617 in which the insulating layer 606 is not present underneath. In this structure, the distance between the wirings is longer than that without the insulating layer 606, and the parasitic capacitance between the wirings can be reduced. That is, the problem that the parasitic capacitance must be made as small as possible can be overcome. The effect of the configuration of the present embodiment increases as the wiring length increases.

Note that in this embodiment mode, the location, number, shape, and the like of the insulating layer can be various, but the insulating layer is selectively formed in order to increase the distance between wirings in the same layer. Anything is acceptable as long as it does not deviate from.
Further, the wiring over the selectively formed insulating layer is not limited to the source signal line. With respect to the gate signal line and the power supply line, an insulating layer can be formed by a similar method, and parasitic capacitance can be reduced.

(Embodiment 2)
An embodiment of the present invention will be described with reference to FIGS.

  In FIG. 9, description will be made assuming that the circuit 954 of each pixel is the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to FIG.

  The pixel in the first row and the first column of the pixel portion includes a gate signal line G1, a source signal line S1, a power supply line Vx1, a power supply line Vy1, a switching TFT 1001, a driving TFT 1002, and an EL element 1003. , And the capacitor element 1004.

  Connection with a pixel circuit will be described. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, the source signal line S1 is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the source or drain electrode of the driving TFT 1002 and the capacitor element 1004. Connected to one electrode, the power supply line Vy1 is connected to the power supply line Vx1, and the other electrode of the capacitor 1004 is connected to the other source or drain electrode of the switching TFT 1001 and the gate electrode of the driving TFT 1002. The other source or drain electrode of the driving TFT 1002 is connected to the EL element 1003.

  The pixel in the second row and first column of the pixel portion includes a gate signal line G2, a source signal line S1, a power supply line Vx1, a power supply line Vy2, a switching TFT 1001, a driving TFT 1002, and an EL element. 1003 and a capacitor 1004.

  The pixel in the second row and first column of the pixel portion has a configuration in which G1 is replaced with G2 and Vy1 is replaced with Vy2 in the configuration of the pixel in the first row and first column.

  The pixel in the m-th row and the first column of the pixel portion includes a gate signal line Gm, a source signal line S1, a power supply line Vx1, a power supply line Vym, a switching TFT 1001, a driving TFT 1002, and an EL element. 1003 and a capacitor 1004.

  The pixel in the first row and the nth column of the pixel portion has a configuration in which S1 is replaced with Sn and Vx1 is replaced with Vxn in the configuration of the pixel in the first row and the first column.

  Further, the pixel in the m-th row and the n-th column of the pixel portion has a configuration in which S1 is replaced with Sn, Vx1 is replaced with Vxn, G1 is replaced with Gm, and Vy1 is replaced with Vym in the configuration of the pixel of the first row and first column. It is characterized by that.

  Vx1 to Vxn and Vy1 to Vyn are all electrically connected to each other.

  In this embodiment mode, in FIG. 9, the power supply lines of the pixel portion are not only wirings (Vx1 to Vxn) arranged in parallel with the source signal lines (S1 to Sn) but also vertically or substantially vertically. Arranged (Vy1 to Vym), a voltage is supplied from each direction to the source region or drain region of the driving TFT 1002 of the pixel. Further, the power supply lines arranged in the vertical direction or substantially vertical direction (Vy1 to Vym) are connected to the power supply lines (Vx1 to Vxn) for each pixel, respectively, and the power supply lines are arranged in a matrix. Yes. As a result, the current flowing through the EL element 1003 is supplied not only from the direction parallel to the source signal lines (S1 to Sn) but also from the vertical direction. The problem that the resistance must be as small as possible can be overcome.

  Since the wiring resistance can be reduced, crosstalk is reduced when the EL display device is driven in an analog manner. Further, gradation display defects are reduced when the EL display device is operated by combining digital driving and constant voltage driving.

  However, in the present embodiment as well as the first embodiment, since it is one of the problems to be overcome to manufacture an EL display device at low cost, an EL display device capable of selectively forming a pattern. It may be manufactured by an EL display device manufacturing process by a droplet discharge method, which is one of the manufacturing methods.

  Here, as a method for manufacturing an EL display device, problems in the case of using a droplet discharge method for cost reduction will be described.

  7A and 7B are a top view ((A) and (B)) and a cross-sectional view ((C) and (D)) when a conductive layer is formed as a wiring using a droplet discharge method. When a conductive layer is formed by discharging a composition containing a conductive material, the conductive layer may not be formed in the intended location or shape due to the characteristics of the discharged conductive material, the water repellency of the base, the error in the discharge position, etc. (FIGS. 7B and 7D).

  Here, the resistance of the wiring depends on the length and cross-sectional area of the wiring if the conductive material is the same. As shown in FIGS. 7B and 7D, when the intended shape is not obtained, the resistance value of the wiring becomes larger than the design value. In other words, the wiring formed by the droplet discharge method has a larger variation in wiring resistance than the wiring formed by photolithography.

  As described above, if the wiring resistance value is large, crosstalk is caused in the case of analog driving, and gradation display failure is caused in the case of using constant voltage driving in digital driving. That is, the degree of these display defects varies depending on the power supply line of the pixel. This can be easily observed as display unevenness.

  That is, one of the problems when using the droplet discharge method for cost reduction is variation in wiring resistance. In order to achieve the object of the present invention, it is necessary to reduce the variation in wiring resistance as much as possible.

  Here, it will be described that by taking this embodiment, variations in wiring resistance due to the droplet discharge method can be reduced.

  This can be explained by assuming that all the wiring resistances are connected in parallel when the power supply lines are arranged in a matrix. That is, if connected in parallel, the resistance of the power supply line up to a certain pixel depends on the resistance values of all the power supply lines, and the position dependency of the resistance that existed when it is not in a matrix is reduced. is there.

  That is, according to the present embodiment, not only the wiring resistance of the power supply line is reduced, but also the problem that the wiring resistance variation when the droplet discharge method is used must be minimized. I can do it.

  In the present embodiment, the wirings do not need to be parallel to each other, and may be in any direction. Further, the number of power supply lines is not necessarily one for each pixel, and any number may be used. Further, the power supply lines do not need to be in a matrix form throughout the pixel portion, and may be a part.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1.

(Embodiment 3)
An embodiment of the present invention will be described with reference to FIGS.

  In FIG. 10, description will be made assuming that a circuit 1054 of each pixel is the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to FIG.

  The pixel in the first row and the first column of the pixel portion includes a gate signal line G1, a source signal line S1, a power supply line Vx1, a power supply line Vy1R, a switching TFT 1001, a driving TFT 1002, and an EL element 1003. , And the capacitor element 1004.

  Connection with a pixel circuit will be described. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, the source signal line S1 is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the source or drain electrode of the driving TFT 1002 and the capacitor element 1004. Connected to one electrode, the power supply line Vy1R is connected to the power supply line Vx1, and the other electrode of the capacitor 1004 is connected to the other source or drain electrode of the switching TFT 1001 and the gate electrode of the driving TFT 1002. The other source or drain electrode of the driving TFT 1002 is connected to the EL element 1003.

  The pixel in the second row and the first column of the pixel portion includes a gate signal line G2, a source signal line S1, a power supply line Vx1, a power supply line Vy2R, a switching TFT 1001, a driving TFT 1002, and an EL element. 1003 and a capacitor 1004.

  The pixel in the second row and first column has a configuration in which G1 is replaced with G2 and Vy1R is replaced with Vy2R in the configuration of the pixel in the first row and first column.

    The pixel in the third row and the first column of the pixel portion has a configuration in which G1 is replaced with G3 and Vy1R is replaced with Vy3R in the configuration of the pixel in the first row and the first column.

  Further, the pixel in the first column of the pixel portion has a configuration in which the configuration of the three rows is repeated.

  The pixel in the first row and the second column of the pixel portion has a configuration in which S1 is replaced with S2, Vx1 is replaced with Vx2, and Vy1R is replaced with Vy1G in the configuration of the pixel in the first row and first column. .

  The pixel in the second row and the second column of the pixel portion has a configuration in which G1 is replaced with G2 and Vy1G is replaced with Vy2G in the configuration of the pixel in the first row and the second column.

  The pixel in the third row and the second column of the pixel portion has a configuration in which G1 is replaced with G3 and Vy1G is replaced with Vy3G in the configuration of the pixel in the first row and the second column.

  Further, the pixel in the second column of the pixel portion has a configuration in which the configuration of the above three rows is repeated.

  The pixel in the first row and the third column of the pixel portion has a configuration in which S1 is replaced with S3, Vx1 is replaced with Vx3, and Vy1R is replaced with Vy1B in the configuration of the pixel in the first row and first column. .

  The pixel in the second row and the third column of the pixel portion has a configuration in which G1 is replaced with G2 and Vy1B is replaced with Vy2B in the configuration of the pixel in the first row and third column.

  The pixel in the third row and the third column of the pixel portion has a configuration in which G1 is replaced with G3 and Vy1B is replaced with Vy3B in the configuration of the pixel in the first row and the third column.

  Further, the pixel in the third column of the pixel portion has a configuration in which the configuration of the three rows is repeated.

  Further, Vy1R to VymR are all electrically connected to each other.

  Further, Vy1G to VymG are all electrically connected to each other.

  Further, Vy1B to VymB are all electrically connected to each other.

  In the present embodiment, the power supply lines of the pixel portion are arranged not only in the wirings (Vx1 to Vxn) arranged in parallel with the source signal lines (S1 to Sn) but also in the vertical direction or the substantially vertical direction (Vy1R to VymB), and a voltage is supplied from each direction to the source region or the drain region of the driving TFT 1002 of each of the R, G, and B pixels. The power supply lines arranged in the vertical direction or substantially vertical direction (Vy1 to Vym) are respectively connected to the power supply lines (Vx1 to Vxn) for each of the R, G, and B pixels, and the power supply lines are in a matrix form. Is arranged. As a result, the current flowing through the EL element 1003 is supplied not only from the direction parallel to the source signal lines (S1 to Sn) but also from the vertical direction. The problem that the resistance must be as small as possible can be overcome. Moreover, since it connects for every R, G, and B, you may change the voltage supplied for every R, G, and B.

  Since the wiring resistance can be reduced, crosstalk is reduced when the EL display device is driven in an analog manner. Further, gradation display defects are reduced when the EL display device is operated by combining digital driving and constant voltage driving.

  However, in this embodiment as well, as in Embodiments 1 and 2, it is one of the problems to be overcome to manufacture an EL display device at low cost. It may be manufactured by an EL display device manufacturing process by a droplet discharge method, which is one of the possible EL display device manufacturing methods.

  As described above, when the wiring is formed by the droplet discharge method, there is a problem that the wiring resistance varies. By adopting this embodiment mode, variations in wiring resistance due to a droplet discharge method can be reduced.

  This can be explained by assuming that all the wiring resistances are connected in parallel when the power supply lines are arranged in a matrix. That is, if connected in parallel, the resistance of the power supply line up to a certain pixel depends on the resistance values of all the power supply lines, and the position dependency of the resistance that existed when it is not in a matrix is reduced. is there.

  That is, according to the present embodiment, not only the wiring resistance of the power supply line is reduced, but also the problem that the wiring resistance variation when the droplet discharge method is used must be minimized. I can do it.

  In the present embodiment, the wirings do not need to be parallel to each other, and may be in any direction. Further, the number of power supply lines is not necessarily one for each pixel, and any number may be used. Further, the power supply lines do not need to be in a matrix form throughout the pixel portion, and may be a part.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1 and Embodiment Mode 2.

(Embodiment 4)
An embodiment of the present invention will be described with reference to FIGS.

  In FIG. 11, 1154 which is a circuit of each pixel will be described as the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to FIG.

  The pixel in the first row and the first column of the pixel portion includes a gate signal line G1, a source signal line S1, a power supply line Vx1, a power supply line Vy1, a switching TFT 1001, a driving TFT 1002, and an EL element 1003. , And the capacitor element 1004.

  Connection with a pixel circuit will be described. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, the source signal line S1 is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the source or drain electrode of the driving TFT 1002 and the capacitor element 1004. Connected to one electrode, the power supply line Vy1 is connected to the power supply line Vx1, and the other electrode of the capacitor 1004 is connected to the other source or drain electrode of the switching TFT 1001 and the gate electrode of the driving TFT 1002. The other source or drain electrode of the driving TFT 1002 is connected to the EL element 1003.

  Further, the pixel in the second row and first column of the pixel portion has a configuration in which G1 is replaced with G2 in the configuration of the pixel in the first row and first column, and in order to electrically separate the power supply lines for each RGB , Vx1 may not be connected to another power supply line.

  Further, the pixel in the third row and the first column of the pixel portion has a configuration in which G1 is replaced with G3 in the configuration of the pixel in the first row and the first column, and in order to electrically separate the power supply lines for each RGB , Vx1 may not be connected to another power supply line.

  The pixel in the fourth row and the first column of the pixel portion has a configuration in which G1 is replaced with G4 and Vy1 is replaced with Vy4 in the configuration of the pixel in the first row and the first column.

  Further, the pixel in the fifth row and first column of the pixel portion has a configuration in which G4 is replaced with G5 in the configuration of the pixel in the fourth row and first column, and in order to electrically separate the power supply lines for each RGB , Vx1 may not be connected to another power supply line.

  Further, the pixel in the sixth row and first column of the pixel portion has a configuration in which G4 is replaced with G6 in the configuration of the pixel in the fourth row and first column, and in order to electrically isolate the power supply line for each RGB , Vx1 may not be connected to another power supply line.

  Further, the pixel in the first column of the pixel portion has a configuration in which the configuration for the three rows is repeated.

  The pixel in the first row and the second column of the pixel portion has a configuration in which S1 is replaced with S2 and Vx1 is replaced with Vx2 in the configuration of the pixel in the first row and first column, and the power supply line is electrically connected for each RGB. In order to separate them, the configuration may be such that Vx2 is not connected to another power supply line.

  The pixel in the second row and second column of the pixel portion has a configuration in which G1 is replaced with G2 in the configuration of the pixel in the first row and second column, and Vx2 is connected to another power supply line Vy2. It is characterized by being.

  Further, the pixel in the third row and the second column of the pixel portion has a configuration in which G1 is replaced with G3 in the configuration of the pixel in the first row and the second column, and in order to electrically isolate the power supply line for each RGB , Vx2 may not be connected to another power supply line.

  Further, the pixel in the second column of the pixel portion has a configuration in which the configuration for the three rows is repeated.

  The pixel in the first row and third column of the pixel portion has a configuration in which S1 is replaced with S3 and Vx1 is replaced with Vx3 in the configuration of the pixel in the first row and first column, and the power supply line is electrically connected for each RGB. In order to separate them, the configuration may be such that Vx3 is not connected to another power supply line.

  The pixel in the second row and the third column of the pixel portion has a configuration in which G1 is replaced with G2 in the configuration of the pixel in the first row and the third column, and Vx3 is not connected to another power supply line. It is characterized by that.

  Further, the pixel in the third row and the third column of the pixel portion has a configuration in which G1 is replaced with G3 in the configuration of the pixel in the first row and the third column, and in order to electrically separate the power supply lines for each RGB , Vx3 may be connected to another power supply line Vy3.

  Further, the pixel in the third column of the pixel portion has a configuration in which the configuration for the three rows is repeated.

  Further, the remaining columns of the pixel portion have a configuration in which the configurations of the first to third columns are repeated.

  Vx1, Vx4,..., Vx (3i-2), Vy1, Vy4,..., Vy (3j-2) are all electrically connected to each other (i, j is a natural number).

  Vx2, Vx5,..., Vx (3i-1), Vy2, Vy5,..., Vy (3j-1) are all electrically connected to each other (i, j is a natural number).

  Vx3, Vx6,..., Vx (3i), Vy3, Vy6,..., Vy (3j) are all electrically connected to each other (i and j are natural numbers). .

  In the present embodiment, the power supply lines of the pixel portion are arranged not only in the wirings (Vx1 to Vxn) arranged in parallel with the source signal lines (S1 to Sn) but also in the vertical direction or the substantially vertical direction (Vy1 to Vy1). Vym) and a voltage is supplied from each direction to the source region or the drain region of the driving TFT 1002 of each of the R, G, and B pixels. The power supply lines arranged in the vertical direction or substantially vertical direction (Vy1 to Vym) are respectively connected to the power supply lines (Vx1 to Vxn) for each of the R, G, and B pixels, and the power supply lines are in a matrix form. Is arranged. As a result, the current flowing through the EL element 1003 is supplied not only from the direction parallel to the source signal lines (S1 to Sn) but also from the vertical direction. The problem that the resistance must be as small as possible can be overcome. Moreover, since it connects for every R, G, and B, you may change the voltage supplied for every R, G, and B.

  In addition, since there is one power supply line in the direction parallel to the gate signal line in each pixel, the wiring resistance can be reduced without significantly reducing the aperture ratio and increasing the parasitic capacitance between the wirings.

  Since the wiring resistance can be reduced, crosstalk is reduced when the EL display device is driven in an analog manner. Further, gradation display defects are reduced when the EL display device is operated by combining digital driving and constant voltage driving.

  However, this embodiment is also one of the problems to be overcome in order to manufacture an EL display device at a low cost, like the first embodiment, the second embodiment, and the third embodiment. In particular, it is manufactured by an EL display device manufacturing process by a droplet discharge method, which is one of methods for manufacturing an EL display device capable of forming a pattern.

  As described above, when the wiring is formed by the droplet discharge method, there is a problem that the wiring resistance varies. By adopting this embodiment mode, variations in wiring resistance due to a droplet discharge method can be reduced.

  This can be explained by assuming that all the wiring resistances are connected in parallel when the power supply lines are arranged in a matrix. That is, if connected in parallel, the resistance of the power supply line up to a certain pixel depends on the resistance values of all the power supply lines, and the position dependency of the resistance that existed when it is not in a matrix is reduced. is there.

  That is, according to the present embodiment, not only the wiring resistance of the power supply line is reduced, but also the problem that the wiring resistance variation when the droplet discharge method is used must be minimized. I can do it.

  In this embodiment mode, the wirings do not have to be parallel to each other, and may be in any direction. Further, the number of power supply lines is not necessarily one for each pixel, and any number may be used. Further, the power supply lines do not need to be in a matrix form throughout the pixel portion, and may be a part.

  Further, this embodiment mode can be freely combined with Embodiment Mode 1, Embodiment Mode 2, and Embodiment Mode 3.

(Embodiment 5)
This embodiment is a combination of the first embodiment and the second embodiment, the third embodiment, or the fourth embodiment. The configuration at this time will be described with reference to FIGS.

  Circuit diagrams of the entire pixel portion in this embodiment are shown in FIGS. The present embodiment is characterized in that a plurality of source signal lines are provided for one vertical pixel column. In FIG. 8, a case where three source signal lines are provided for one column of vertical pixels will be described as an example.

  Note that the number of source signal lines is not limited to three, and may be any number.

  In FIG. 12, a description will be given assuming that 1254 which is a circuit of each pixel is the circuit shown in FIG. However, this is an example, and the circuit of each pixel is not limited to FIG.

  The pixel in the first row and the first column of the pixel portion includes a gate signal line G1, S1a which is one of the three source signal lines, a power supply line Vx1, a power supply line Vy1R, and a switching TFT 1001. , A driving TFT 1002, an EL element 1003, and a capacitor 1004.

  Connection with a pixel circuit will be described. The gate signal line G1 is connected to the gate electrode of the switching TFT 1001, S1a which is one of the three source signal lines is connected to the source or drain electrode of the switching TFT 1001, and the power supply line Vx1 is connected to the driving TFT 1002. And the power supply line Vy1R is connected to the power supply line Vx1, and the other electrode of the capacitive element 1004 is the other source or drain electrode of the switching TFT 1001. The other source or drain electrode of the driving TFT 1002 is connected to the EL element 1003.

  The pixel in the second row and first column of the pixel portion includes a gate signal line G2, S1b, which is one of the three source signal lines, a power supply line Vx1, a power supply line Vy2R, and a switching element. The pixel includes a TFT 1001, a driving TFT 1002, an EL element 1003, and a capacitor element 1004.

  The pixel in the second row and first column of the pixel portion has a configuration in which G1 is replaced with G2, S1a is replaced with S1b, and Vy1R is replaced with Vy2R in the configuration of the pixel in the first row and first column.

  The pixel in the third row and first column of the pixel portion includes a gate signal line G3, S1c, which is one of the three source signal lines, a power supply line Vx1, a power supply line Vy3R, and a switching TFT 1001. , A driving TFT 1002, an EL element 1003, and a capacitor 1004.

  The pixel in the third row and the first column of the pixel portion has a configuration in which G1 is replaced with G3, S1a is replaced with S1c, and Vy1R is replaced with Vy3R in the configuration of the pixel in the first row and first column.

In the three rows of pixel columns, G1, G2, and G3 are electrically connected.

  The first pixel column is a repetition of the above configuration.

  In the second pixel column, Vx1 is Vx2, S1a is S2a, S1b is S2b, S1c is S2c, Vy1R is Vy1G, Vy2R is Vy2G, Vy3R is Vy3G in the above configuration. The connection is replaced.

  The third pixel column includes Vx1 as Vx3, S1a as S3a, S1b as S3b, S1c as S3c, Vy1R as VynB, Vy2R as Vy2B, and Vy3R as Vy3B. The connection is replaced.

  The third and subsequent pixel columns are a repetition of the configuration of the above three columns.

  Further, Vy1R to VymR are all electrically connected to each other.

  Further, Vy1G to VymG are all electrically connected to each other.

  Further, Vy1B to VymB are all electrically connected to each other.

  According to the present embodiment, the problem that the writing time described in the first embodiment must be made as long as possible can be overcome. Moreover, the problem that the parasitic capacitance must be made as small as possible can be overcome.

  Further, according to the present embodiment, the problem that the wiring resistance described in the second embodiment, the third embodiment, or the fourth embodiment must be made as small as possible can be overcome. It is also possible to overcome the problem that the wiring resistance variation must be made as small as possible.

  In addition, according to this embodiment mode, an EL display device can be manufactured at low cost because a droplet discharge method capable of selectively forming a pattern is used.

(Embodiment 6)
An embodiment of the present invention will be described with reference to FIGS. In this embodiment mode, a channel etch type thin film transistor is used as the thin film transistor in Embodiment Mode 1. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

  A base film 1201 having a function of improving adhesion is formed over the substrate 1200 (see FIG. 18A). Note that an insulating layer may be formed over the substrate 1200. This insulating layer is used as a base film and may not be formed, but has an effect of blocking contaminants from the substrate 1200. In the case of forming a base layer for preventing contamination from the glass substrate, a base film 1201 is formed as a pretreatment in a formation region of the conductive layers 1202 and 1203 formed thereon by a droplet discharge method.

  In this embodiment mode, a substance having a photocatalytic function is used as the base film having a function of improving adhesion.

In this embodiment, a case where a TiO _X crystal having a predetermined crystal structure is formed as a photocatalytic substance by a sputtering method will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. In order to form TiO _X having high photocatalytic activity, the atmosphere is rich in oxygen and the formation pressure is increased. Further, it is preferable to form TiO _X while heating the substrate provided with the film forming chamber or the processed material.

The thus formed TiO _X has a photocatalytic function even if it is a very thin film.

  In addition, as other base pretreatments, metals such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), and Mo (molybdenum) are obtained by sputtering or vapor deposition. It is preferable to form a base film 1201 formed of a material or an oxide thereof. The base film may be formed with a thickness of 0.01 to 10 nm. However, since the base film may be formed extremely thin, it does not necessarily have a layer structure. When a refractory metal material is used as the base film, after forming the conductive layers 1202 and 1203 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. It is desirable to process.

  The first method is a step of forming an insulating layer by insulating the base film 1201 that does not overlap with the conductive layers 1202 and 1203. That is, the base film 1201 that does not overlap with the conductive layers 1202 and 1203 is oxidized and insulated. As described above, in the case where the base film 1201 is oxidized and insulated, it is preferable to form the base film 1201 with a thickness of 0.01 to 10 nm, so that the base film 1201 can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  The second method is a step of removing the base film 1201 by etching using the conductive layers 1202 and 1203 as a mask. When this step is used, there is no restriction on the thickness of the base film 1201.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion between a pattern formed by a droplet discharge method and a formation region thereof. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used.

  Next, a composition containing a conductive material is discharged to form conductive layers 1202 and 1203 that function as gate electrodes later. The conductive layers 1202 and 1203 are formed using a droplet discharge unit. In this embodiment mode, silver is used as the conductive material, but a laminate of silver and copper may be used. Moreover, a copper single layer may be sufficient.

  Further, as the base pretreatment of the conductive layer formed using the droplet discharge method, the above-described step of forming the base film 1201 is performed. However, this treatment step may be performed after the conductive layer is formed.

  Next, a gate insulating film is formed over the conductive layers 1202 and 1203 (see FIG. 18A). The gate insulating film may be formed of a known material such as a silicon oxide material or a nitride material, and may be a stacked layer or a single layer.

Next, a composition containing a conductive material is selectively discharged over the gate insulating film, so that a conductive layer (also referred to as a first electrode) 1206 is formed (see FIG. 18B). The conductive layer 1206 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxidized when light is emitted from the substrate 1200 side or when a transmissive EL display panel is manufactured. A predetermined pattern may be formed by a composition containing zinc (ZnO), tin oxide (SnO ₂ ), and the like, and may be formed by firing. Although not shown, a photocatalytic substance may be formed in the same manner as when the conductive layers 1202 and 1203 are formed in a region where the conductive layer 1206 is formed. The photocatalytic substance improves adhesion, and the conductive layer 1206 can be formed by thinning into a desired pattern. This conductive layer 1206 serves as a first electrode functioning as a pixel electrode.

  The semiconductor layer may be formed by a known means (such as sputtering, LPCVD, or plasma CVD). There is no limitation on the material of the semiconductor layer, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy.

  As the semiconductor layer, an amorphous semiconductor (typically hydrogenated amorphous silicon), a semi-amorphous semiconductor, a semiconductor containing a crystal phase in part of the semiconductor layer, a crystalline semiconductor (typically polysilicon), or an organic semiconductor is used. Can do.

  In this embodiment mode, an amorphous semiconductor is used as the semiconductor. A semiconductor layer 1207 is formed, and a semiconductor layer having one conductivity type, for example, an N-type semiconductor layer 1208 is formed by a plasma CVD method or the like. (See FIG. 12C). A semiconductor layer having one conductivity type may be formed as necessary.

  Subsequently, mask layers 1211 and 1212 made of an insulator such as resist or polyimide are formed, and the semiconductor layer 1207 and the N-type semiconductor layer 1208 are patterned simultaneously using the mask layers 1211 and 1212.

  Next, mask layers 1213 and 1214 made of an insulator such as resist or polyimide are formed by a droplet discharge method (see FIG. 18D). Using the mask layers 1213 and 1214, through holes 1218 are formed in part of the gate insulating layers 1205 and 1204 by etching, and one of the conductive layers 1203 functioning as the gate electrode layer disposed on the lower layer side is formed. Expose the part.

  After removing the mask layers 1213 and 1214, a composition containing a conductive material is discharged to form conductive layers 1215, 1216, and 1217, and the N-type semiconductor layer is formed using the conductive layers 1215, 1216, and 1217 as a mask. Pattern processing is performed to form an N-type semiconductor layer (see FIG. 19A). Although not illustrated, a photocatalytic substance may be selectively formed in a portion where the conductive layers 1215, 1216, and 1217 are in contact with the gate insulating layer 1205 before the conductive layers 1215, 1216, and 1217 are formed. Then, the conductive layer can be formed with good adhesion.

  The conductive layer 1217 functions as a source / drain wiring layer and is formed so as to be electrically connected to the conductive layer 1206 which is the first electrode formed previously. In addition, in the through hole 1218 formed in the gate insulating layer 1205, the conductive layer 1216 which is a source or drain wiring layer and the conductive layer 1203 which is a gate electrode layer are electrically connected.

  In the step of forming the through-hole 1218 in part of the gate insulating layers 1205 and 1204, after forming the conductive layers 1215, 1216, and 1217, the through-holes 1218 are formed using the conductive layers 1215, 1216, and 1217 serving as wiring layers as a mask It may be formed. Then, a conductive layer is formed in the through hole 1218, and the conductive layer 1216 which is a wiring layer and the conductive layer 1203 which is a gate electrode layer are electrically connected. In this case, there is an advantage that the process is simplified.

  Subsequently, an insulating layer 1220 to be a partition wall is formed. For the insulating layer 1220, an insulating layer is formed on the entire surface by spin coating or dipping, and then openings are formed as illustrated in FIG. 19B by etching. Further, if the insulating layer 1220 is formed by a droplet discharge method, etching is not necessarily required.

  The insulating layer 1220 is formed with an opening of a through hole in accordance with a position where a pixel is formed corresponding to the conductive layer 1206 which is the first electrode.

  Through the above steps, a TFT substrate in which a bottom-gate (also referred to as an inverted staggered) channel etch TFT and a conductive layer 1206 which is a first electrode are connected to the substrate 1200 is completed.

  A conductive layer 1222 is stacked over the electroluminescent layer 1221 over the conductive layer 1206 which is the first electrode, whereby a display device having a display function using a light-emitting element is completed (see FIG. 19B).

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using a droplet discharge method, an EL display panel can be easily manufactured even when a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. be able to.

  In addition, a highly reliable display device with improved adhesion and peel resistance can be manufactured.

(Embodiment 7)
An embodiment of the present invention will be described with reference to FIGS. In this embodiment mode, a top gate (also referred to as a forward stagger) thin film transistor is used as the thin film transistor in Embodiment Mode 1. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

  A base film 1301 having a function of improving adhesion is formed over the substrate 1300 (see FIG. 20A). Note that an insulating layer may be formed over the substrate 1300. This insulating layer is not necessarily formed, but has an effect of blocking contaminants from the substrate 1300. In particular, in the case of a forward staggered thin film transistor as in this embodiment mode, the semiconductor layer is in direct contact with the substrate, and thus a base layer is necessary. In the case of forming a base layer for preventing contamination from the glass substrate, a base film 1301 is formed as a pretreatment in a formation region of conductive layers 1315, 1316, and 1317 formed thereon by a droplet discharge method.

  In this embodiment, a substance having a photocatalytic function is used as the base film 1301 having a function of improving adhesion.

In this embodiment, a case where a TiO _X crystal having a predetermined crystal structure is formed as a photocatalytic substance by a sputtering method will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. In order to form TiO _X having high photocatalytic activity, the atmosphere is rich in oxygen and the formation pressure is increased. Further, it is preferable to form TiO _X while heating the substrate provided with the film forming chamber or the processed material.

The thus formed TiO _X has a photocatalytic function even if it is a very thin film.

  In addition, as other base pretreatments, metals such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), and Mo (molybdenum) are obtained by sputtering or vapor deposition. It is preferable to form a base film 1301 formed of a material or an oxide thereof. The base film 1301 may be formed with a thickness of 0.01 to 10 nm. However, since the base film 1301 may be formed with a very small thickness, the base film 1301 does not necessarily have a layer structure. In the case of using a refractory metal material as the base film, after forming the conductive layers 1315, 1316, and 1317 functioning as the source / drain wiring layers, the base film exposed on the surface is changed to one of the following two steps. It is desirable to perform the process.

  The first method is a step of forming an insulating layer by insulating the base film 1301 that does not overlap with the conductive layers 1315, 1316, and 1317 functioning as the source / drain wiring layers. That is, the base film 1301 that does not overlap with the conductive layers 1315, 1316, and 1317 functioning as the source / drain wiring layers is oxidized and insulated. As described above, in the case where the base film 1301 is oxidized to be insulated, the base film 1301 is preferably formed with a thickness of 0.01 to 10 nm, and can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  The second method is a step of etching and removing the base film 1301 using the conductive layers 1315, 1316, and 1317 functioning as source / drain wiring layers as a mask. When this step is used, there is no restriction on the thickness of the base film 1301.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion between a pattern formed by a droplet discharge method and a formation region thereof. An organic material (organic resin material) (polyimide, acrylic) or a bond of silicon (Si) and oxygen (O) forms a skeletal structure, and an organic group containing at least hydrogen as a substituent (for example, an alkyl group, aromatic carbonization) Hydrogen) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

  Next, a composition containing a conductive material is discharged to form conductive layers 1315, 1316, and 1317 functioning as a source / drain wiring layer. The conductive layers 1315, 1316, and 1317 are formed using a droplet discharge unit.

  As a conductive material for forming the conductive layers 1315, 1316, and 1317 layers, metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), and Al (aluminum) are mainly used. The composition can be used. In particular, it is not preferable to reduce the resistance of the source or drain wiring layer, and in consideration of the specific resistance value, a material in which one of gold, silver, and copper is dissolved or dispersed in a solvent is used. It is preferable to use low resistance silver or copper. The solvent corresponds to esters such as butyl acetate, alcohols such as isopropyl alcohol, organic solvents such as acetone, and the like. The surface tension and the viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

Subsequently, a conductive layer (also referred to as a first electrode) 1306 is formed by selectively discharging a composition containing a conductive material (see FIG. 20A). The conductive layer 1306 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxidized when light is emitted from the substrate 1300 side or when a transmissive EL display panel is manufactured. A predetermined pattern may be formed by a composition containing zinc (ZnO), tin oxide (SnO ₂ ), and the like, and may be formed by firing. Although not shown, a photocatalytic substance may be formed in the same manner as when the conductive layers 1315, 1316, and 1317 are formed in a region where the conductive layer 1306 is formed. The photocatalytic substance improves adhesion, and the conductive layer 1306 can be formed by thinning into a desired pattern. The conductive layer 1306 becomes a first electrode that functions as a pixel electrode.

  In addition, as the base pretreatment of the conductive layer formed using the droplet discharge method, the above-described step of forming the base film 1301 was performed. However, this treatment step is performed even after the conductive layers 1315, 1316, and 1317 are formed. You can go. For example, although not shown, when a titanium oxide film is formed and an N-type semiconductor layer is formed thereon, adhesion between the conductive layer and the N-type semiconductor layer is improved.

After an N-type semiconductor layer is formed over the entire surface of the conductive layers 1315, 1316, and 1317, an N-type semiconductor layer between the conductive layer 1315 and the conductive layer 1316 and between the conductive layer 1316 and the conductive layer 1317 is registered as a resist. Etching is performed using mask layers 1311, 1312, and 1319 made of an insulator such as silicon or polyimide. A semiconductor layer having one conductivity type may be formed as necessary. Then, an amorphous semiconductor (hereinafter referred to as AS) or a semiconductor layer 1307 made of SAS is formed by a vapor deposition method or a sputtering method. When the plasma CVD method is used, AS is formed using SiH ₄ which is a semiconductor material gas or a mixed gas of SiH ₄ and H ₂ . SAS is diluted with SiH ₄ and H ₂ to 3 to 1000 times to form a mixed gas. In the case of forming a SAS with this gas species, the crystallinity is better on the surface side of the semiconductor layer, and a combination with a top gate type TFT in which the gate electrode is formed on the upper layer of the semiconductor layer is suitable.

  Next, the gate insulating layer 1305 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method. As a particularly preferable mode, a three-layered structure including an insulating layer made of silicon nitride, an insulating layer made of silicon oxide, and an insulating layer made of silicon nitride is formed as a gate insulating film.

  Next, gate electrode layers 1302 and 1303 are formed by a droplet discharge method. As a conductive material for forming this layer, a composition mainly composed of metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) is used. Can do.

  The semiconductor layer 1307 and the gate insulating layer 1305 are formed at positions corresponding to the source or drain wiring layers (conductive layers 1315, 1316, and 1317) using mask layers 1313 and 1314 formed by a droplet discharge method. That is, a semiconductor layer is formed so as to straddle the conductive layer 1315 and the conductive layer 1316.

  Next, conductive layers 1330 and 1331 are formed by a droplet discharge method, and the conductive layer 1316 and the gate electrode layer 1303 and the conductive layer 1317 and the conductive layer 1306 which is the first electrode are electrically connected.

  The drain or source wiring layer and the gate electrode layer may be directly connected by the gate electrode layer without using the conductive layer 1330. In that case, before forming the gate electrode layers 1302 and 1303, a through hole is formed in the gate insulating layer 1305 to expose part of the conductive layers 1316 and 1317 which are source or drain wirings, and then the gate electrode layer 1302. 1303 and a conductive layer 1331 are formed by a droplet discharge method. At this time, the gate electrode layer 1303 serves as a conductive layer 1330 and is connected to the conductive layer 1316. The etching may be dry etching or wet etching, but plasma etching which is dry etching is preferable.

  Subsequently, an insulating layer 1320 to be a partition wall is formed. Although not illustrated, a protective layer of silicon nitride or silicon nitride oxide may be formed over the entire surface so as to cover the thin film transistor under the insulating layer 1320. As for the insulating layer 1320, an insulating layer is formed on the entire surface by a spin coating method or a dip method, and then an opening is formed by etching as shown in FIG. Further, if the insulating layer 1320 is formed by a droplet discharge method, etching is not necessarily required. In the case of forming a wide area such as the insulating layer 1320 by using a droplet discharge method, if a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device and a plurality of lines are drawn and formed, throughput is increased. improves.

  The insulating layer 1320 is formed with an opening of a through hole in accordance with a position where a pixel is formed corresponding to the conductive layer 1306 which is the first electrode.

  Through the above steps, a TFT substrate in which a top-gate (also referred to as an inverted staggered) TFT and a conductive layer 1306 which is a first electrode layer are connected to the substrate 1300 is completed.

  Before forming the electroluminescent layer 1321, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in the insulating layer 1320 or on the surface thereof. In addition, it is preferable to perform heat treatment at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and to form the electroluminescent layer 1321 by vacuum deposition or a droplet discharge method under reduced pressure without being exposed to the air as it is. .

  An electroluminescent layer 1321 and a conductive layer 1322 are stacked over the conductive layer 1306 that is the first electrode, whereby a display device having a display function using a light-emitting element is completed (see FIG. 21).

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using a droplet discharge method, an EL display panel can be easily manufactured even when a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. be able to.

  In addition, a highly reliable display device with improved adhesion and peel resistance can be manufactured.

(Embodiment 8)
An embodiment of the present invention will be described with reference to FIGS. This embodiment is different from the first embodiment in the connection structure between the thin film transistor and the first electrode. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

Over the substrate 1400, a base film 1401 for improving adhesion is formed as a base pretreatment. In this embodiment, a case where a TiO _X crystal having a predetermined crystal structure is formed as a photocatalytic substance by a sputtering method will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. In order to form TiO _X having high photocatalytic activity, the atmosphere is rich in oxygen and the formation pressure is increased. Further, it is preferable to form TiO _X while heating the substrate provided with the film forming chamber or the processed material.

The thus formed TiO _X has a photocatalytic function even if it is a very thin film.

  In addition, as other base pretreatments, metals such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), and Mo (molybdenum) are obtained by sputtering or vapor deposition. It is preferable to form a base film 1401 formed of a material or an oxide thereof. The base film 1401 may be formed with a thickness of 0.01 to 10 nm. However, since the base film 1401 may be formed extremely thin, it does not necessarily have a layer structure. When a refractory metal material is used as the base film, after forming the conductive layers 1402 and 1403 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. It is desirable to process.

  The first method is a step of insulating the base film 1401 that does not overlap with the conductive layers 1402 and 1403 to form an insulating layer. That is, the base film 1401 that does not overlap with the conductive layers 1402 and 1403 is oxidized and insulated. As described above, in the case where the base film 1401 is oxidized to be insulated, the base film 1401 is preferably formed with a thickness of 0.01 to 10 nm, and can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  The second method is a step of removing the base film 1401 by etching using the conductive layers 1402 and 1403 as a mask. When this step is used, there is no restriction on the thickness of the base film 1401.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion between a pattern formed by a droplet discharge method and a formation region thereof. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used.

  Next, a composition containing a conductive material is discharged, so that conductive layers 1402 and 1403 that function as gate electrodes later are formed. The conductive layers 1402 and 1403 are formed using a droplet discharge unit. In this embodiment mode, silver is used as the conductive material, but a laminate of silver and copper may be used. Moreover, a copper single layer may be sufficient.

  Further, as the base pretreatment of the conductive layer formed using the droplet discharge method, the above-described step of forming the base film 1401 is performed. However, this treatment step may be performed after the conductive layer is formed.

  Next, a gate insulating film is formed over the conductive layers 1402 and 1403 (see FIG. 22A). The gate insulating film may be formed of a known material such as a silicon oxide material or a nitride material, and may be a stacked layer or a single layer.

  The semiconductor layer may be formed by a known means (such as sputtering, LPCVD, or plasma CVD). There is no limitation on the material of the semiconductor layer, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy.

  As the semiconductor layer, an amorphous semiconductor (typically hydrogenated amorphous silicon), a semi-amorphous semiconductor, a semiconductor containing a crystal phase in part of the semiconductor layer, a crystalline semiconductor (typically polysilicon), or an organic semiconductor is used. Can do.

In this embodiment mode, an amorphous semiconductor is used as the semiconductor. In order to form the semiconductor layer 1407 and the channel protective films 1409 and 1410, for example, an insulating film is formed by a plasma CVD method and is selectively etched into a desired region so as to have a desired shape. The channel protective film may be formed of polyimide or polyvinyl alcohol by a droplet discharge method or a printing method (a method for forming a pattern such as screen printing or offset printing). Thereafter, a semiconductor layer having one conductivity type, for example, an N-type semiconductor layer 1408 is formed by a plasma CVD method or the like. A semiconductor layer having one conductivity type may be formed as necessary.

  Subsequently, mask layers 1411 and 1412 made of an insulator such as resist or polyimide are formed, and the semiconductor layers 1407 and the N-type semiconductor layer 1408 are simultaneously patterned using the mask layers 1411 and 1412.

  Next, mask layers 1413 and 1414 made of an insulator such as resist or polyimide are formed by a droplet discharge method (see FIG. 22C). Through holes 1418 are formed in part of the gate insulating layers 1405 and 1404 by etching using the mask layers 1413 and 1414, and one of the conductive layers 1403 functioning as the gate electrode layer disposed on the lower layer side is formed. Expose the part. The etching process may be either plasma etching (dry etching) or wet etching, but plasma etching is suitable for processing a large area substrate. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  After the mask layers 1413 and 1414 are removed, a composition containing a conductive material is discharged to form conductive layers 1415, 1416, and 1417. The N-type semiconductor layer is formed using the conductive layers 1415, 1416, and 1417 as a mask. Pattern processing is performed (see FIG. 22D). Note that although not illustrated, the above-described base pretreatment in which a photocatalytic substance or the like is selectively formed in a portion where the conductive layers 1415, 1416, and 1417 are in contact with the gate insulating layer 1405 before the conductive layers 1415, 1416, and 1417 are formed. A process may be performed. In addition, after the formation, the surface may be pretreated. By this step, the conductive layer can be formed with good adhesion to the upper and lower layers to be stacked.

  Conductive layers 1415, 1416, and 1417 which are wiring layers are formed so as to cover the N-type semiconductor layer and the semiconductor layer as shown in FIG. Since the semiconductor layer is etched, there is a possibility that the wiring layer cannot be covered at a steep step and may be disconnected. Therefore, in order to reduce the step, the insulating layers 1441, 1442, and 1443 may be formed to make the step gentle. The insulating layers 1441, 1442, and 1443 can be selectively formed without a mask or the like when a droplet discharge method is used. The insulating layers 1441, 1442, and 1443 reduce the level difference, and the wiring layer that covers the insulating layers 1441, 1442, and 1443 can be formed with good coverage without defects such as disconnection. The insulating layers 1441, 1442, and 1443 are formed using silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, or other inorganic insulating materials, acrylic acid, methacrylic acid, and derivatives thereof, or polyimide ( Inorganic containing Si—O—Si bonds among compounds composed of silicon, oxygen, and hydrogen formed from heat-resistant polymers such as polyimide, aromatic polyamide, polybenzimidazole, or siloxane-based materials. Siloxane and hydrogen on silicon can be formed of an organic siloxane insulating material in which an organic group such as methyl or phenyl is substituted.

  Subsequently, a composition containing a conductive material is selectively discharged over the gate insulating film so as to be in contact with the conductive layer 1417 functioning as a source and drain wiring layer, so that a conductive layer (also referred to as a first electrode) 1406 is discharged. (See FIG. 23A). The conductive layer 1406 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxidized when light is emitted from the substrate 1400 side or when a transmissive EL display panel is manufactured. A predetermined pattern may be formed with a composition containing zinc (ZnO), tin oxide (SnO2), and the like, and may be formed by baking. Although not illustrated, base pretreatment such as formation of a photocatalytic substance may be performed in the same manner as when the conductive layers 1402 and 1403 are formed in a region where the conductive layer 1406 is formed. By the base pretreatment, the adhesiveness is improved, and the conductive layer 1406 can be formed by thinning into a desired pattern. The conductive layer 1406 becomes a first electrode that functions as a pixel electrode.

  In addition, in the through hole 1418 formed in the gate insulating layer 1405, the conductive layer 1416 which is a source or drain wiring layer and the conductive layer 1403 which is a gate electrode layer are electrically connected. As a conductive material for forming the wiring layer, a composition containing metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) as a main component is used. be able to. Alternatively, light-transmitting indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  In addition, after the formation of the conductive layers 1415, 1416, 1417, and 1406, the through holes 1418 may be formed using the conductive layers 1415, 1416, 1417, and 1406 as a mask. Then, a conductive layer is formed in the through hole 1418, and the conductive layer 1416 and the conductive layer 1403 which is a gate electrode layer are electrically connected.

  Subsequently, an insulating layer 1420 to be a partition wall is formed. Although not illustrated, a protective layer of silicon nitride or silicon nitride oxide may be formed over the entire surface so as to cover the thin film transistor under the insulating layer 1420. For the insulating layer 1420, an insulating layer is formed on the entire surface by spin coating or dipping, and then openings are formed as illustrated in FIG. 23B by etching. Further, if the insulating layer 1420 is formed by a droplet discharge method, etching is not necessarily required. In the case of forming a wide area such as the insulating layer 1420 by using a droplet discharge method, if a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device and a plurality of lines are drawn and formed, throughput is increased. improves.

  The insulating layer 1420 is formed with an opening of a through hole in accordance with a position where a pixel is formed corresponding to the conductive layer 1406 which is the first electrode.

  Through the above steps, a TFT substrate for an EL display panel in which a bottom gate type (also referred to as an inverted stagger type) channel protective TFT and a conductive layer (first electrode layer) 1406 are connected to the substrate 1400 is completed. .

  An electroluminescent layer 1421 and a conductive layer 1422 are stacked over the conductive layer 1406 which is the first electrode, whereby a display device having a display function using a light-emitting element is completed (see FIG. 23B).

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using a droplet discharge method, an EL display panel can be easily manufactured even when a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. be able to.

  In addition, a highly reliable display device with improved adhesion and peel resistance can be manufactured.

(Embodiment 9)
Embodiments of the present invention will be described with reference to FIGS. The present embodiment is different from the sixth embodiment in the connection structure between the thin film transistor and the first electrode. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

On the substrate 1500, a base film 1501 for improving adhesion is formed as a base pretreatment. In this embodiment, a case where a TiO _X crystal having a predetermined crystal structure is formed as a photocatalytic substance by a sputtering method will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. In order to form TiO _X having high photocatalytic activity, the atmosphere is rich in oxygen and the formation pressure is increased. Further, it is preferable to form TiO _X while heating the substrate provided with the film forming chamber or the processed material.

The thus formed TiO _X has a photocatalytic function even if it is a very thin film.

  In addition, as other base pretreatments, metals such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), and Mo (molybdenum) are obtained by sputtering or vapor deposition. It is preferable to form a base film 1501 formed of a material or an oxide thereof. The base film 1501 may be formed with a thickness of 0.01 to 10 nm. However, since the base film 1501 may be formed extremely thin, it does not necessarily have a layer structure. When a refractory metal material is used as the base film, after forming the conductive layers 1502 and 1503 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. It is desirable to process.

  The first method is a step of insulating the base film 1501 that does not overlap with the conductive layers 1502 and 1503 to form an insulating layer. That is, the base film 1501 that does not overlap with the conductive layers 1502 and 1503 is oxidized and insulated. As described above, when the base film 1501 is oxidized to be insulated, the base layer 01 is preferably formed with a thickness of 0.01 to 10 nm, and can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  The second method is a step of removing the base film 1501 by etching using the conductive layers 1502 and 1503 as a mask. When this step is used, there is no restriction on the thickness of the base film 1501.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion between a pattern formed by a droplet discharge method and a formation region thereof. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used.

  Next, a composition containing a conductive material is discharged to form conductive layers 1502 and 1503 that function as gate electrodes later. The conductive layers 1502 and 1503 are formed using a droplet discharge unit. In this embodiment mode, silver is used as the conductive material, but a laminate of silver and copper may be used. Moreover, a copper single layer may be sufficient.

  Further, as the base pretreatment of the conductive layer formed using the droplet discharge method, the above-described step of forming the base film 1501 is performed. However, this treatment step may be performed after the conductive layer is formed.

  Next, a gate insulating film is formed over the conductive layers 1502 and 1503 (see FIG. 24A). The gate insulating film may be formed of a known material such as a silicon oxide material or a nitride material, and may be a stacked layer or a single layer.

  The semiconductor layer may be formed by a known means (such as sputtering, LPCVD, or plasma CVD). There is no limitation on the material of the semiconductor layer, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy.

  As the semiconductor layer, an amorphous semiconductor (typically hydrogenated amorphous silicon), a semi-amorphous semiconductor, a semiconductor containing a crystal phase in part of the semiconductor layer, a crystalline semiconductor (typically polysilicon), or an organic semiconductor is used. Can do.

In this embodiment mode, an amorphous semiconductor is used as the semiconductor. A semiconductor layer 1507 is formed, and a semiconductor layer having one conductivity type, for example, an N-type semiconductor layer 1508 is formed by a plasma CVD method or the like. A semiconductor layer having one conductivity type may be formed as necessary.

  Subsequently, mask layers 1511 and 1512 made of an insulator such as resist or polyimide are formed, and the semiconductor layers 1507 and the N-type semiconductor layer 1508 are simultaneously patterned using the mask layers 1511 and 1512 (FIG. 24B )reference).

  Next, mask layers 1513 and 1514 made of an insulator such as resist or polyimide are formed by a droplet discharge method (see FIG. 24C). Through holes 1518 are formed in part of the gate insulating layers 1505 and 1504 by etching using the mask layers 1513 and 1514, and one of the conductive layers 1503 functioning as a gate electrode layer disposed on the lower layer side thereof is formed. Expose the part. The etching process may be either plasma etching (dry etching) or wet etching, but plasma etching is suitable for processing a large area substrate. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  After removing the mask layers 1513 and 1514, a composition containing a conductive material is discharged to form the conductive layers 1515, 1516, and 1517, and the N-type semiconductor layer is patterned using the conductive layers 1515, 1516, and 1517 as a mask. Processing is performed (see FIG. 24D). Note that although not illustrated, the above-described base pretreatment in which a photocatalytic substance or the like is selectively formed in a portion where the conductive layers 1515, 1516, and 1517 are in contact with the gate insulating layer 1505 before the conductive layers 1515, 1516, and 1517 are formed. A process may be performed. In addition, after the formation, the surface may be pretreated. By this step, the conductive layer can be formed with good adhesion to the upper and lower layers to be stacked.

Subsequently, a composition containing a conductive material is selectively discharged over the gate insulating film so as to be in contact with the conductive layer 1517 functioning as a source / drain wiring layer, so that a conductive layer (also referred to as a first electrode) 1506 is formed. (See FIG. 25A). The conductive layer 1506 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxidized when light is emitted from the substrate 1500 side or when a transmissive EL display panel is manufactured. A predetermined pattern may be formed by a composition containing zinc (ZnO), tin oxide (SnO ₂ ), and the like, and may be formed by firing. Although not shown, base pretreatment such as formation of a photocatalytic substance may be performed in the same manner as when the conductive layers 1502 and 1503 are formed in a region where the conductive layer 1506 is formed. By the base pretreatment, the adhesiveness is improved and the conductive layer 1506 can be formed by thinning into a desired pattern. The conductive layer 1506 becomes a first electrode that functions as a pixel electrode.

  In addition, in the through hole 1518 formed in the gate insulating layer 1505, the conductive layer 1516 which is a source or drain wiring layer and the conductive layer 1503 which is a gate electrode layer are electrically connected. As a conductive material for forming this conductive layer, a composition containing metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) as a main component is used. be able to. Alternatively, light-transmitting indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  Further, after forming the conductive layers 1515, 1516, 1517, and 1506, the through holes 1518 may be formed using the conductive layers 1515, 1516, 1517, and 1506 as a mask. Then, a conductive layer is formed in the through hole 1518, and the conductive layer 1516 and the conductive layer 1503 which is a gate electrode layer are electrically connected.

  Subsequently, an insulating layer 1520 to be a partition wall is formed. Although not illustrated, a protective layer of silicon nitride or silicon nitride oxide may be formed over the entire surface so as to cover the thin film transistor under the insulating layer 1520. As for the insulating layer 1520, an insulating layer is formed on the entire surface by a spin coating method or a dip method, and then an opening is formed by etching as illustrated in FIG. Further, if the insulating layer 1520 is formed by a droplet discharge method, etching is not necessarily required. In the case of forming a wide area such as the insulating layer 1520 by using a droplet discharge method, if a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device and drawn so that a plurality of lines overlap, the throughput is increased. improves.

  The insulating layer 1520 is formed with an opening of a through hole in accordance with a position where a pixel is formed corresponding to the conductive layer 1506 which is the first electrode.

  Through the above steps, a TFT substrate for an EL display panel in which a bottom-gate (also referred to as an inverted staggered) channel etch TFT and a first electrode (first electrode layer) 1506 are connected to the substrate 1500 is completed. To do.

  A conductive layer 1522 is stacked over the electroluminescent layer 1521 over the conductive layer 1506 which is the first electrode, whereby a display device having a display function using a light emitting element is completed (see FIG. 25B).

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using a droplet discharge method, an EL display panel can be easily manufactured even when a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. be able to.

  In addition, a highly reliable display device with improved adhesion and peel resistance can be manufactured.

(Embodiment 10)
Embodiments of the present invention will be described with reference to FIGS. The present embodiment is different from the seventh embodiment in the connection structure between the thin film transistor and the first electrode. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

  A base film 1601 having a function of improving adhesion is formed over the substrate 1600 (see FIG. 26A). Note that an insulating layer may be formed over the substrate 1600. This insulating layer is not necessarily formed, but has an effect of blocking contaminants from the substrate 1600. In particular, in the case of a forward staggered thin film transistor as in this embodiment mode, since the semiconductor layer is in direct contact with the substrate, the base layer is effective. In the case of forming a base layer for preventing contamination from the glass substrate, a base film 1601 is formed as a pretreatment in a formation region of the conductive layers 1615, 1616, and 1617 formed by a droplet discharge method.

  In this embodiment, a substance having a photocatalytic function is used as the base film 1601 having a function of improving adhesion.

In this embodiment, a case where a TiO _X crystal having a predetermined crystal structure is formed as a photocatalytic substance by a sputtering method will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. In order to form TiO _X having high photocatalytic activity, the atmosphere is rich in oxygen and the formation pressure is increased. Further, it is preferable to form TiO _X while heating the substrate provided with the film forming chamber or the processed material.

The thus formed TiO _X has a photocatalytic function even if it is a very thin film.

  In addition, as other base pretreatments, metals such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), and Mo (molybdenum) are obtained by sputtering or vapor deposition. It is preferable to form a base film 1601 formed of a material or an oxide thereof. The base film 1601 may be formed with a thickness of 0.01 to 10 nm. However, since the base film 1601 may be formed extremely thin, it does not necessarily have a layer structure. When a refractory metal material is used as the base film, the conductive film 1615, 1616, 1617 functioning as the source / drain wiring layer is formed, and then the base film exposed on the surface is selected from either of the following two processes. It is desirable to perform the process.

  The first method is a step of insulating the base film 1601 that does not overlap with the conductive layers 1615, 1616, and 1617 functioning as the source / drain wiring layers to form an insulating layer. That is, the base film 1601 that does not overlap with the conductive layers 1615, 1616, and 1617 functioning as the source / drain wiring layers is oxidized and insulated. As described above, in the case where the base film 1601 is oxidized to be insulated, it is preferable that the base film 1601 is formed with a thickness of 0.01 to 10 nm, so that the base film 1601 can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  The second method is a step of etching and removing the base film 1601 using the conductive layers 1615, 1616, and 1617 functioning as the source / drain wiring layers as masks. When this step is used, there is no restriction on the thickness of the base film 1601.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion of the pattern formed by the droplet discharge method to the formation region. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used.

  Next, a composition containing a conductive material is discharged, so that conductive layers 1615, 1616, and 1617 functioning as a source / drain wiring layer are formed. The conductive layers 1615, 1616, and 1617 are formed using a droplet discharge unit.

  As a conductive material for forming the conductive layers 1615, 1616, and 1617, metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), and Al (aluminum) are mainly used. The composition can be used. In particular, it is not preferable to reduce the resistance of the source or drain wiring layer, and in consideration of the specific resistance value, a material in which one of gold, silver, and copper is dissolved or dispersed in a solvent is used. It is preferable to use low resistance silver or copper. Alternatively, particles in which a conductive material is coated with another conductive material to form a plurality of layers may be used. For example, particles having a three-layer structure in which nickel boron (NiB) is coated around copper and silver is coated around it may be used. The solvent corresponds to esters such as butyl acetate, alcohols such as isopropyl alcohol, organic solvents such as acetone, and the like. The surface tension and the viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

  In addition, as the base pretreatment of the conductive layer formed using the droplet discharge method, the above-described step of forming the base film 1601 was performed. This treatment step is performed even after the conductive layers 1615, 1616, and 1617 are formed. You can go. For example, although not shown, when a titanium oxide film is formed and an N-type semiconductor layer is formed thereon, adhesion between the conductive layer and the N-type semiconductor layer is improved.

After an N-type semiconductor layer is formed over the entire surface of the conductive layers 1615, 1616, and 1617, an N-type semiconductor layer between the conductive layers 1615 and 1616 and between the conductive layers 1616 and 1617 is formed using a resist, polyimide, or the like. Etching is performed using mask layers 1611, 1612, and 1619 made of an insulator. A semiconductor layer having one conductivity type may be formed as necessary. Then, a semiconductor layer 1607 made of AS or SAS is formed by a vapor deposition method or a sputtering method. When the plasma CVD method is used, AS is formed using SiH ₄ which is a semiconductor material gas or a mixed gas of SiH ₄ and H ₂ . The SAS is formed of a mixed gas by diluting SiH ₄ with H ₂ 3 to 1000 times. In the case of forming a SAS with this gas species, the crystallinity is better on the surface side of the semiconductor layer, and a combination with a top gate type TFT in which the gate electrode is formed on the upper layer of the semiconductor layer is suitable.

  Next, the gate insulating layer 1605 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method (see FIG. 26B). As a particularly preferable mode, a three-layered structure including an insulating layer made of silicon nitride, an insulating layer made of silicon oxide, and an insulating layer made of silicon nitride is formed as a gate insulating film.

  Next, conductive layers 1602 and 1603 which are gate electrode layers are formed by a droplet discharge method (see FIG. 26C). As a conductive material for forming this layer, a composition mainly composed of metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) is used. Can do.

  The semiconductor layer 1607 and the gate insulating layer 1605 are formed at positions corresponding to the source or drain wiring layers (conductive layers 1615, 1616, and 1617) using mask layers 1613 and 1614 formed by a droplet discharge method. That is, a semiconductor layer is formed so as to straddle the conductive layers 1615 and 1616 which are source or drain wiring layers.

  Next, conductive layers 1630 and 1631 are formed by a droplet discharge method and electrically connected to the conductive layers 1616 and 1603.

Subsequently, a conductive layer (also referred to as a first electrode) 1606 is formed by selectively discharging a composition containing a conductive material so as to be in contact with the conductive layer 1631. The conductive layer 1606 may have a structure in direct contact with the conductive layer 1617. The conductive layer 1606 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), oxidized when light is emitted from the substrate 1600 side or when a transmissive EL display panel is manufactured. A predetermined pattern may be formed by a composition containing zinc (ZnO), tin oxide (SnO ₂ ), and the like, and may be formed by firing. Although not shown, a photocatalytic substance may be formed in the same manner as when the conductive layers 1615, 1616, and 1617 are formed in a region where the conductive layer 1606 is formed. By the photocatalytic substance, the adhesion is improved and the conductive layer 1606 can be formed by thinning into a desired pattern. This conductive layer 1606 serves as a first electrode functioning as a pixel electrode.

  The drain or source wiring layer and the gate electrode layer may be directly connected by the gate electrode layer without using the conductive layer 1630. In that case, before forming the conductive layers 1602 and 1603 which are the gate electrode layers, through holes are formed in the gate insulating layer 1605 and part of the conductive layers 1616 and 1617 which are the source or drain wirings are exposed. Conductive layers 1602 and 1603 and a conductive layer 1631 which are gate electrode layers are formed by a droplet discharge method. At this time, the conductive layer 1603 is a wiring that also serves as the conductive layer 1630 and is connected to the conductive layer 1616. The etching may be dry etching or wet etching, but plasma etching which is dry etching is preferable.

  Subsequently, an insulating layer 1620 to be a partition wall is formed. Although not illustrated, a protective layer of silicon nitride or silicon nitride oxide may be formed over the entire surface so as to cover the thin film transistor under the insulating layer 1620. As for the insulating layer 1620, an insulating layer is formed on the entire surface by a spin coating method or a dip method, and then an opening is formed as shown in FIG. 27 by etching. Further, if the insulating layer 1620 is formed by a droplet discharge method, etching is not necessarily required. In the case of forming a wide area such as the insulating layer 1620 by using a droplet discharge method, if a composition is discharged from a plurality of nozzle discharge ports of a droplet discharge device and drawn so that a plurality of lines overlap, the throughput is increased. improves.

  The insulating layer 1620 is formed with an opening of a through hole in accordance with a position where a pixel is formed corresponding to the conductive layer 1606 which is the first electrode.

  Through the above steps, a TFT substrate in which a top gate type (also referred to as a forward stagger type) TFT and a conductive layer (first electrode layer) 1606 are connected to the substrate 1600 is completed.

  Before the electroluminescent layer 1621 is formed, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in the insulating layer 1620 or on the surface thereof. Further, it is preferable to perform heat treatment at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and to form the electroluminescent layer 1621 by vacuum deposition or a droplet discharge method under reduced pressure without being exposed to the air as it is. .

  An electroluminescent layer 1621 and a conductive layer 1622 are stacked over the conductive layer 1606 which is the first electrode, so that a display device having a display function using a light-emitting element is completed (see FIG. 27).

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using a droplet discharge method, an EL display panel can be easily manufactured even when a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. be able to.

  In addition, a highly reliable display device with improved adhesion and peel resistance can be manufactured.

(Embodiment 11)
An embodiment of the present invention will be described with reference to FIGS. This embodiment is different from Embodiment 1 in that a method of connecting the conductive layer 816 that is a wiring layer and the conductive layer 803 that is a gate electrode layer is different from the gate insulating layer 805. Therefore, repetitive description of the same portion or a portion having a similar function is omitted.

  A base film 1701 for improving adhesion is formed over the substrate 1700 (see FIG. 28A). Note that an insulating layer may be formed over the substrate 1700.

  In this embodiment, a substance having a photocatalytic function is used as the base film 1701 having a function of improving adhesion.

In this embodiment, a case where a TiO _X crystal having a predetermined crystal structure is formed as a photocatalytic substance by a sputtering method will be described. A metal titanium tube is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. In order to form TiO _X having high photocatalytic activity, the atmosphere is rich in oxygen and the formation pressure is increased. Further, it is preferable to form TiO _X while heating the substrate provided with the film forming chamber or the processed material.

The thus formed TiO _X has a photocatalytic function even if it is a very thin film.

  In addition, as other base pretreatments, metals such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), and Mo (molybdenum) are obtained by sputtering or vapor deposition. It is preferable to form a base film 1701 formed of a material or an oxide thereof. The base film 1701 may be formed with a thickness of 0.01 to 10 nm. However, since the base film 1701 may be formed extremely thin, it does not necessarily have a layer structure. When a refractory metal material is used as the base film, after forming the conductive layers 1702 and 1703 to be the gate electrode layers, the base film exposed on the surface is subjected to one of the following two processes. It is desirable to process.

  The first step is a step of insulating the base film 1701 that does not overlap with the conductive layers 1702 and 1703 to form an insulating layer. That is, the base film 1701 that does not overlap with the conductive layers 1702 and 1703 is oxidized and insulated. As described above, in the case where the base film 1701 is oxidized to be insulated, the base film 1701 is preferably formed with a thickness of 0.01 to 10 nm, and can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  The second step is a step of removing the base film 1701 by etching using the conductive layers 1702 and 1703 as a mask. When this step is used, there is no restriction on the thickness of the base film 1701.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and the pressure is several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion of the pattern formed by the droplet discharge method to the formation region. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used.

  Next, a composition containing a conductive material is discharged to form conductive layers 1702 and 1703 that function as gate electrodes later. The conductive layers 1702 and 1703 are formed using a droplet discharge unit.

  After the conductive layer 1703 is formed, a composition containing a conductive material is locally discharged to form a conductor 1704 functioning as a pillar. The conductor 1704 is formed by depositing the discharged composition, but is preferably formed in a column shape so that the lower layer pattern and the upper layer pattern can be easily contacted. The conductor 1704 may be formed using the same material as the conductive layer 1703 or a different material, and may be formed by discharging a composition in a stacked manner.

In addition, after the conductive layer 1703 is formed, the above-described base pretreatment may be performed on the conductive layer 1703 in order to increase adhesion again. In addition, it is preferable to perform the base film treatment similarly after the formation of the conductor 1704 serving as a pillar. When base pretreatment such as formation of a photocatalytic substance such as TiO _X is performed, the film layers can be formed with good adhesion.

  Next, a gate insulating film is formed over the conductive layers 1702 and 1703 (see FIG. 28A).

  Next, a composition containing a conductive material is selectively discharged over the gate insulating film, so that a conductive layer (also referred to as a first electrode) 1706 is formed (see FIG. 28B). Although not shown, a photocatalytic substance may be formed in the same manner as when the conductive layers 1702 and 1703 are formed in a region where the conductive layer 1706 is formed. The photocatalytic substance improves adhesion, and the conductive layer 1706 can be formed by thinning into a desired pattern. The conductive layer 1706 becomes a first electrode that functions as a pixel electrode.

  In this embodiment mode, an amorphous semiconductor is used as the semiconductor. In order to form the semiconductor layer 1707 which is an amorphous semiconductor layer and to form the channel protective films 1709 and 1710, for example, an insulating film is formed by a plasma CVD method, and a desired shape is selected in a desired region. Etch. At this time, channel protective films 1709 and 1710 can be formed by exposing from the back surface of the substrate using the gate electrode as a mask. For the channel protective film, polyimide or polyvinyl alcohol may be dropped using a droplet discharge method. As a result, the exposure process can be omitted. After that, an N-type semiconductor layer 1708 is formed using a semiconductor layer having one conductivity type, for example, an N-type amorphous semiconductor layer, by a plasma CVD method or the like. (See FIG. 28C). A semiconductor layer having one conductivity type may be formed as necessary.

  Subsequently, mask layers 1711 and 1712 made of an insulator such as resist or polyimide are formed, and the semiconductor layers 1707 and the N-type semiconductor layer 1708 are simultaneously patterned using the mask layers 1711 and 1712.

  In this embodiment mode, a conductor that is already connected to the conductive layer 1703 that is a gate electrode layer by the conductor 1704 functioning as a pillar penetrates the gate insulating layer 1705 and exists on the gate insulating layer 1705. Therefore, it is possible to omit the step of forming a through hole in the gate insulating layer.

  A conductive layer 1715, 1716, 1717 is formed by discharging a composition containing a conductive material, and the N-type semiconductor layer is patterned using the conductive layers 1715, 1716, 1717 as a mask. Although not illustrated, a photocatalytic substance may be selectively formed in a portion where the conductive layers 1715, 1716, and 1717 are in contact with the gate insulating layer 1705 before the conductive layers 1715, 1716, and 1717 are formed. Then, the conductive layer can be formed with good adhesion.

  The conductive layer 1717 functions as a source / drain wiring layer and is formed so as to be electrically connected to the previously formed first electrode. A conductive layer 1716 which is a source or drain wiring layer can be electrically connected to a conductive layer 1703 which is a gate electrode layer through a conductor 1704 (see FIG. 29A). Further, in the case where an insulating layer or the like remains over the conductor 1704 functioning as a pillar, it may be removed by etching or the like.

  Subsequently, an insulating layer 1720 to be a partition wall is formed.

  The insulating layer 1720 is formed so as to have an opening portion of a through hole in accordance with a position where a pixel is formed corresponding to the conductive layer 1706 which is the first electrode.

  Through the above steps, a TFT substrate for an EL display panel in which a bottom gate type (also referred to as an inverted stagger type) channel protective TFT and a first electrode (first electrode layer) are connected to the substrate 1700 is completed. .

  A conductive layer 1722 is stacked on the electroluminescent layer 1721 over the conductive layer 1706 which is the first electrode, whereby a display device having a display function using a light-emitting element is completed (see FIG. 29B).

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using a droplet discharge method, an EL display panel can be easily manufactured even when a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. be able to.

  In addition, a highly reliable display device with improved adhesion and peel resistance can be manufactured. The connection method using a pillar in the through hole of this embodiment can be freely combined with the above embodiment.

(Embodiment 12)
A thin film transistor is formed by applying the present invention, and a display device can be formed using the thin film transistor. A light emitting element is used as a display element, and an N-type transistor is used as a transistor for driving the light emitting element. In such a case, the light emitted from the light emitting element performs any one of bottom emission, top emission, and double emission. Here, a stacked structure of light-emitting elements corresponding to each case will be described with reference to FIGS.

  In this embodiment, the present invention is applied, and the transistor 1851 which is a channel protective thin film transistor formed in Embodiment 1 is used.

  First, the case where light is emitted to the substrate 1850 side, that is, the case where bottom emission is performed will be described with reference to FIG. In this case, source or drain wirings 1852 and 1853, a first electrode 1854, an electroluminescent layer 1855, and a second electrode 1856 are stacked in this order so as to be electrically connected to the transistor 1851. Next, a case where light is emitted to the side opposite to the substrate 1850, that is, a case where top emission is performed will be described with reference to FIG. Source or drain wirings 1861 and 1862 that are electrically connected to the transistor 1851, a first electrode 1863, an electroluminescent layer 1864, and a second electrode 1865 are stacked in this order. With the above structure, even when light is transmitted through the first electrode 1863, the light is reflected by the wiring and is emitted to the side opposite to the substrate 1850. Note that in this structure, it is not necessary to use a light-transmitting material for the first electrode 1863. Lastly, a case where light is emitted to the substrate 1850 side and both sides opposite thereto, that is, a case where double-sided emission is performed will be described with reference to FIG. Source or drain wirings 1870 and 1871 that are electrically connected to the transistor 1851, a first electrode 1872, an electroluminescent layer 1873, and a second electrode 1874 are stacked in this order. At this time, when both the first electrode 1872 and the second electrode 1874 are formed using a light-transmitting material or a thickness capable of transmitting light, double-sided emission is realized.

  The light emitting element has a structure in which an electroluminescent layer is sandwiched between a first electrode and a second electrode. It is necessary to select materials for the first electrode and the second electrode in consideration of a work function, and both the first electrode and the second electrode can be an anode or a cathode depending on a pixel configuration. In this embodiment mode, since the polarity of the driving TFT is an N-channel type, it is preferable that the first electrode be a cathode and the second electrode be an anode. In the case where the polarity of the driving TFT is a p-channel type, the first electrode may be an anode and the second electrode may be a cathode.

  When the first electrode is an anode, the electroluminescent layer is formed from the anode side from the HIL (hole injection layer), HTL (hole transport layer), EML (light-emitting layer), ETL (electron transport layer), EIL ( It is preferable to laminate in the order of the electron injection layer). When the first electrode is a cathode, the reverse is true, and from the cathode side, EIL (electron injection layer), ETL (electron transport layer), EML (light emitting layer), HTL (hole transport layer), HIL (hole injection) Layer) and the anode as the second electrode are preferably laminated in this order. The electroluminescent layer can have a single layer structure or a mixed structure in addition to the laminated structure.

  In addition, as the electroluminescent layer, materials that emit red (R), green (G), and blue (B) light are selectively formed by an evaporation method using an evaporation mask, respectively. A material that emits red (R), green (G), and blue (B) light can also be formed by a droplet discharge method (such as a low-molecular or high-molecular material) in the same manner as a color filter. In this case, no mask is used. Both are preferable because RGB can be separately applied.

Specifically, CuPc or PEDOT is used as HIL, α-NPD is used as HTL, BCP or Alq _{3 is used} as ETL, and BCP: Li or CaF ₂ is used as EIL. Further, for example, EML may be Alq ₃ doped with a dopant (such as DCM in the case of R, DMQD in the case of G) corresponding to the emission colors of R, G, and B.

Note that the electroluminescent layer is not limited to the above materials. For example, instead of CuPc or PEDOT, an oxide such as molybdenum oxide (MoO _x : x = 2 to 3) and α-NPD or rubrene can be co-evaporated to improve the hole injection property. The material of the electroluminescent layer can be used as an organic material (including a low molecule or a polymer), or a composite material of an organic material and an inorganic material.

  Although not shown in FIG. 30, a color filter may be formed on the counter substrate of the substrate 1850. The color filter can be formed by a droplet discharge method, and in that case, an optical plasma treatment or the like can be applied as the above-described base pretreatment. With the base film of the present invention, a color filter can be formed in a desired pattern with good adhesion. When a color filter is used, high-definition display can be performed. This is because the color filter can correct a broad peak to be sharp in the emission spectrum of each RGB.

  As described above, the case where a material that emits light of each RGB is formed has been described. However, full color display can be performed by forming a material that emits light of a single color and combining a color filter and a color conversion layer. For example, when an electroluminescent layer that emits white or orange light is formed, full color display can be performed by separately providing a color filter or a combination of a color filter and a color conversion layer. The color filter and the color conversion layer may be formed on, for example, a second substrate (sealing substrate) and attached to the substrate. In addition, as described above, any of the material that emits monochromatic light, the color filter, and the color conversion layer can be formed by a droplet discharge method.

  Of course, monochromatic light emission may be displayed. For example, an area color type display device may be formed using monochromatic light emission. As the area color type, a passive matrix type display unit is suitable, and characters and symbols can be mainly displayed.

  In the above configuration, a material having a small work function can be used as the cathode, and for example, Ca, Al, CaF, MgAg, AlLi, or the like is desirable. The electroluminescent layer may be any of a single layer type, a laminated type, and a mixed type having no layer interface, and a singlet material, a triplet material, or a combination thereof, a low molecular material, a polymer material, and a medium molecule. Any of organic materials including materials, inorganic materials typified by molybdenum oxide having excellent electron injection properties, and composite materials of organic materials and inorganic materials may be used. The first electrodes 1854, 1863, and 1872 are formed using a transparent conductive film that transmits light. For example, in addition to ITO and ITSO, a target in which 2 to 20% by weight of zinc oxide (ZnO) is mixed with indium oxide is used. A transparent conductive film formed using the same is used. Note that plasma treatment in an oxygen atmosphere or heat treatment in a vacuum atmosphere is preferably performed before the first electrodes 1854, 1863, and 1872 are formed. The partition wall is formed using a material containing silicon, an organic material, and a compound material. A porous film may be used. However, it is preferable to use a photosensitive or non-photosensitive material such as acrylic or polyimide because the side surface has a shape in which the radius of curvature continuously changes and the upper thin film is formed without being cut off. This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 13)
The appearance of a panel which is one mode of a display device to which the present invention is applied will be described with reference to FIG.

  In the panel shown in FIG. 31, a driver IC in which a driver circuit is formed around a pixel portion 1951 is mounted by a COG (Chip On Glass) method. Of course, the driver IC may be mounted by a TAB (Tape Automated Bonding) method.

  The substrate 1950 is fixed by a counter substrate 1953 and a sealant 1952. The pixel portion 1951 may use an EL element as a display medium. As the driver ICs 1955a and 1955b and the driver ICs 1957a, 1957b, and 1957c, in addition to an integrated circuit formed using a single crystal semiconductor, a similar TFT formed using a polycrystalline semiconductor may be formed. Signals and power are supplied to the driver ICs 1955a and 1955b and the driver ICs 1957a, 1957b and 1957c via the FPCs 1954a, 1954b and 1954c or the FPCs 1956a and 1956b.

(Embodiment 14)
An EL television receiver can be completed with the display device formed according to the present invention. FIG. 32 is a block diagram showing the main configuration of an EL television receiver. In the EL display panel, as shown in FIG. 31, when the pixel portion 1951 and the scanning line side driving circuit and the signal line side driving circuit are mounted around the pixel portion 1951 by the COG method, only the pixel portion is formed. When the scanning line side driving circuit and the signal line side driving circuit are mounted by the TAB method, a TFT is formed by SAS, the pixel portion and the scanning line side driving circuit are integrally formed on the substrate, and the signal line side driving circuit is formed. Although it may be separately mounted as a driver IC, it may be in any form.

  As other external circuit configurations, on the input side of the video signal, among the signals received by the tuner 2004, the video signal amplification circuit 2005 that amplifies the video signal, and the signal output therefrom is each of red, green, and blue colors. And a control circuit 2007 for converting the video signal into the input specification of the driver IC. The control circuit 2007 outputs a signal to each of the scanning line side and the signal line side. In the case of digital driving, a signal dividing circuit 2008 may be provided on the signal line side so that an input digital signal is divided into m pieces and supplied.

  Of the signals received by the tuner 2004, the audio signal is sent to the audio signal amplifier circuit 2009, and the output is supplied to the speaker 2013 via the audio signal processing circuit 2010. The control circuit 2011 receives control information on the receiving station (reception frequency) and volume from the input unit 2012 and sends a signal to the tuner 2004 and the audio signal processing circuit 2010.

  A television receiver can be completed by incorporating such an external circuit and incorporating the EL module into a housing 2101 as shown in FIG. A display screen 2021 is formed by an EL display module, and a speaker 2022, an operation switch 2024, and the like are provided as other accessory equipment. As described above, a television receiver can be completed according to the present invention.

  Moreover, you may make it cut off the reflected light of the light which injects from the outside using a wavelength plate or a polarizing plate. As the wave plate, λ / 4 or λ / 2 may be used and designed so that light can be controlled. As a structure, it becomes a TFT element substrate, a light emitting element, a sealing substrate (sealing material), a wave plate (λ / 4, λ / 2), a polarizing plate, and light emitted from the light emitting element passes through these and is polarized Radiated to the outside from the plate side. The wave plate and the polarizing plate may be installed on the side from which light is emitted, and may be installed on both sides as long as the display is a double-sided emission type that emits light on both sides. Further, an antireflection film may be provided outside the polarizing plate. This makes it possible to display a higher-definition and precise image.

  A display panel 2102 using an EL element is incorporated in the housing 2101, and a general television broadcast is received by a receiver 2105 and connected to a wired or wireless communication network via a modem 2104 in one direction ( Information communication can also be performed in a bidirectional manner (between the sender and the receiver, or between the sender and the receiver). The television receiver can be operated by a switch incorporated in the housing or a separate remote controller 2106. Even if this remote controller is provided with a display portion 2107 for displaying information to be output. good.

  In addition to the main screen 2103, the television receiver may have a configuration in which a sub screen 2108 is formed with a second display panel to display channels, volume, and the like. The main screen 2103 and the sub screen 2108 may be formed by an EL display panel. In this configuration, the main screen 2103 is formed by an EL display panel having an excellent viewing angle, and the sub screen can be displayed with low power consumption. A liquid crystal display panel may be used. In order to prioritize low power consumption, the main screen 2103 may be formed with a liquid crystal display panel, the sub screen may be formed with an EL display panel, and the sub screen may be blinkable. When the present invention is used, a highly reliable display device can be obtained even when such a large substrate is used and a large number of TFTs and electronic components are used.

  Of course, the present invention is not limited to a television receiver, and is applied to various uses as a display medium of a particularly large area such as a monitor of a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

(Embodiment 15)
Various display devices can be manufactured by applying the present invention. That is, the present invention can be applied to various electronic devices in which these display devices are incorporated in a display portion.

  Such electronic devices include cameras such as video cameras and digital cameras, projectors, head mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, game machines, personal digital assistants (mobile computers, mobile phones or And an image reproducing apparatus (specifically, an apparatus having a display capable of reproducing a recording medium such as Digital Versatile Disc (DVD) and displaying the image). Examples thereof are shown in FIG.

  FIG. 34A illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The present invention is applied to manufacturing the display portion 2203. By using the present invention, a notebook personal computer having a display portion with high display quality can be manufactured at low cost.

  FIG. 34B shows a storage medium playback device (specifically a DVD playback device) provided with an image display unit, which reads a main body 2301, a housing 2302, a display unit A2303, a display unit B2304, and a storage medium (DVD, etc.). A section 2305, operation keys 2306, a speaker section 2307, and the like. Although the display portion A2303 mainly displays image information and the display portion B2304 mainly displays character information, the present invention is applied to the production of the display portion A2303 and the display portion B2304. By using the present invention, a storage medium reproducing device including an image display unit with high display quality can be manufactured at low cost.

  FIG. 34C illustrates a mobile phone, which includes a main body 2401, an audio output portion 2402, an audio input portion 2403, a display portion 2404, operation switches 2405, an antenna 2406, and the like. By applying the display device manufactured according to the present invention to the display portion 2404, a cellular phone having a display portion with high display quality can be manufactured at low cost.

  FIG. 35A illustrates a video camera, which includes a main body 2501, a display portion 2502, a housing 2503, an external connection port 2504, a remote control receiving portion 2505, an image receiving portion 2506, a battery 2507, an audio input portion 2508, operation keys 2509, and an eyepiece. Part 2510 and the like. The present invention can be applied to the display portion 2502 and is a dual emission type display device. FIGS. 35B and 35C show images displayed on the display portion 2502. FIG. 35 (B) is a captured image, and FIG. 35 (C) is an image seen from the captured vehicle. Since the display device of the present invention is a transmissive type and can display images on both sides, an image taken from the subject side can also be viewed. Therefore, it is convenient to photograph yourself. In addition to the video camera, the present invention can be applied to a digital video camera or the like, and the same effect can be obtained. By applying the display device manufactured according to the present invention to the display portion 2502, a video camera, a digital video camera, or the like having a display portion with high display quality can be manufactured at low cost. This embodiment mode can be freely combined with the above embodiment modes.

FIG. 14 illustrates a pixel circuit of an EL display device. The figure explaining the drive timing of analog drive. The figure explaining the drive TFT characteristic. The figure explaining the crosstalk by a box display. The figure explaining the influence of the potential effect by the wiring resistance of a power supply line. The figure explaining the structure which reduces the parasitic capacitance between wiring. The figure explaining the shape where wiring resistance variation occurs. FIG. 3 illustrates Embodiment 1 of the present invention. FIG. 6 illustrates Embodiment 2 of the present invention. FIG. 9 illustrates Embodiment 3 of the present invention. FIG. 9 illustrates Embodiment 4 of the present invention. FIG. 6 is a diagram for explaining a fifth embodiment of the present invention. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 2A and 2B illustrate a structure of a droplet discharge device that can be applied to the present invention. FIG. 6 is a top view of a pixel circuit of a display device that can be applied to the present invention. 6A and 6B illustrate a display device that can be applied to the present invention. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B illustrate a method for manufacturing a display device to which the present invention can be applied. 4A and 4B each illustrate a display device to which the present invention can be applied. 1 is a top view of a panel which is an embodiment of a semiconductor device to which the present invention is applied. 1 is a block diagram illustrating a main configuration of an electronic device of the present invention. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied.

Explanation of symbols

605 Gate insulating layer 606 Insulating layer 615 Source signal line 616 Source signal line 617 Source signal line 800 Substrate 801 Base film 802 Conductive layer 803 Conductive layer 804 Insulating layer 805 Gate insulating layer 806 Conductive layer 807 Semiconductor layer 808 N-type semiconductor layer 809 Channel Protective film 811 Mask layer 813 Mask layer 815 Conductive layer 816 Conductive layer 817 Conductive layer 818 Through hole 820 Insulating layer 821 Electroluminescent layer 822 Conductive layer 850 Sealing substrate 851 Sealing material 854 Circuit 855 of each pixel Line segment

Claims (7)

A plurality of matrix pixels having light emitting elements;
A plurality of source signal lines arranged close to the first pixel column;
A first power supply line disposed for the first pixel column;
A second power supply line arranged for the first pixel row,
The first power supply line is electrically connected to the second power supply line;
Each pixel of the first pixel column is electrically connected to any one of the plurality of source signal lines, and each of the plurality of source signal lines is each pixel of the first pixel column. Electrically connected to at least one of
Each pixel of the first pixel column is electrically connected to the first power supply line,
The plurality of source signal lines, the first power supply line, and the second power supply line are selectively provided in the same process by a droplet discharge method or a printing method,
The plurality of source signal lines include a source signal line having a region in which a first insulating film is provided at a lower part, and any source signal line including the first insulating film in the same layer as the first insulating film at a lower part. A display device, wherein source signal lines having regions where an insulating film is not provided are alternately arranged . A plurality of matrix pixels having light emitting elements;
A plurality of source signal lines arranged close to the first pixel column;
A first power supply line disposed for the first pixel column;
A plurality of second power supply lines arranged close to the first pixel row,
Each pixel of the first pixel column is electrically connected to any one of the plurality of source signal lines, and each of the plurality of source signal lines is each pixel of the first pixel column. Electrically connected to at least one of
The first power supply line is electrically connected to any one of the plurality of second power supply lines;
Each pixel of the first pixel column is electrically connected to the first power supply line,
The plurality of source signal lines, the first power supply line, and the plurality of second power supply lines are selectively provided in the same process by a droplet discharge method or a printing method, respectively.
The plurality of source signal lines include a source signal line having a region in which a first insulating film is provided at a lower part, and any source signal line including the first insulating film in the same layer as the first insulating film at a lower part. Arranged so that source signal lines having regions where no insulating film is provided are alternately adjacent,
The plurality of second power supply lines include a second power supply line having a region where the first insulating film is provided in a lower portion, and a first layer in the same layer as the first insulating film in a lower portion. And a second power supply line having a region where no insulating film including any of the insulating films is provided is alternately arranged . A plurality of matrix pixels having light emitting elements;
A first power supply line disposed for the first pixel column;
A second power supply line arranged for the second pixel column;
A third power supply line arranged for the third pixel column;
A plurality of source signal lines arranged close to the first to third pixel columns;
A fourth power supply line arranged for the first pixel row;
A fifth power supply line arranged for the second pixel row;
A sixth power supply line arranged for the third pixel row,
The first power supply line is electrically connected to the fourth power supply line;
The second power supply line is electrically connected to the fifth power supply line;
The third power supply line is electrically connected to the sixth power supply line;
Each pixel of the first pixel column is electrically connected to any one of a plurality of source signal lines arranged with respect to the first pixel column, and is connected to the first pixel column. Each of the plurality of source signal lines arranged with respect to each other is electrically connected to at least one of the pixels of the first pixel column,
Each pixel of the second pixel column is electrically connected to any one of a plurality of source signal lines arranged with respect to the second pixel column, and is connected to the second pixel column. Each of the plurality of source signal lines arranged with respect to each other is electrically connected to at least one of the pixels of the second pixel column,
Each pixel of the third pixel column is electrically connected to any one of a plurality of source signal lines arranged with respect to the third pixel column, and is connected to the third pixel column. Each of the plurality of source signal lines arranged with respect to each other is electrically connected to at least one of the pixels of the third pixel column,
Each pixel of the first pixel column is electrically connected to the first power supply line,
Each pixel of the second pixel column is electrically connected to the second power supply line,
Each pixel of the third pixel column is electrically connected to the third power supply line,
The plurality of source signal lines and the first to sixth power supply lines are selectively provided in the same process by a droplet discharge method or a printing method, respectively.
The plurality of source signal lines include a source signal line having a region in which a first insulating film is provided at a lower part, and any source signal line including the first insulating film in the same layer as the first insulating film at a lower part. A display device, wherein source signal lines having regions where an insulating film is not provided are alternately arranged . In claim 3,
Each pixel of the first pixel column has a light emitting element that emits red light,
Each pixel of the second pixel column has a light emitting element that emits green light,
Each pixel of the third pixel row has a light emitting element that emits blue light,
The display device according to claim 1, wherein different voltages are supplied to the first to third power supply lines. In any one of Claims 1 thru | or 4,
The display device, wherein the source line or the power supply line is formed by a droplet discharge method under reduced pressure.   An electronic apparatus using the display device according to any one of claims 1 to 5. 7. The electronic apparatus according to claim 6, wherein the electronic apparatus is a personal computer, a television receiver, a camera, an image display device, a head mounted display, or a portable information terminal.

Images