JP2023015641A - game machine - Google Patents

Abstract

To recognize a start address of a program of timer interruption processing without increasing a program capacity.SOLUTION: A region of a built-in ROM 54 includes a used area and an area other than the used area. The used area includes a program area and a data area. The program area of the used area includes a vector address (0004H) for storing a start address of a program of timer interruption processing to be executed when a factor of timer interruption processing occurs. A value of an upper byte of the vector address is a value of an I register and its initial value is "00H". Processing for setting a value of an I register by a program is not executed.SELECTED DRAWING: Figure 96

Description

The present invention relates to gaming machines.

2. Description of the Related Art Conventionally, a slot machine has been known as one of gaming machines (see Patent Document 1, for example).

JP 2015-016110 A

The problem to be solved by the present invention is to improve the performance as a gaming machine.

The present invention solves the above-described problems by the following solutions (the structure of the corresponding embodiment is shown in parentheses). The present invention corresponds to the initial invention 1 among the initial inventions 1 to 13 described later.
The present invention (eighth embodiment) is
A ROM (built-in ROM 54) area has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
It is characterized in that it is configured not to execute the process of setting the value of a predetermined register by a program.

According to the present invention, performance as a gaming machine can be improved.

1 is a block diagram showing an outline of control of a slot machine as an example of a game machine in the first embodiment; FIG. It is a figure which shows the pattern arrangement|sequence of the reel in 1st Embodiment. In the first embodiment, (A) is a diagram showing the positional relationship between the display window and each reel and the effective lines, and (B) is a diagram showing the designation of symbol positions. FIG. 11 is a diagram (1) showing types of winnings, symbol combinations, payout numbers, etc. in the first embodiment; It is a diagram (2) showing the types of wins, etc., the symbol combination, the number of payouts, etc. in the first embodiment. It is a diagram (1) showing a condition device, a winning combination, etc. in the first embodiment. It is a diagram (2) showing a condition device, a winning combination, etc. in the first embodiment. It is a diagram (3) showing a condition device, a winning combination, etc. in the first embodiment. It is a diagram (4) showing a condition device, a winning combination, etc. in the first embodiment. It is a figure which shows the numerical table|table in 1st Embodiment. It is a transition diagram of the game state in the first embodiment. It is a figure which shows the variation conditions of the game state in 1st Embodiment. In the first embodiment, (1) is left first stop when the small win A1 condition device is activated, left first stop when the small win B1 condition device is activated, and left first when the small win C1 condition device is activated FIG. 10 is a diagram showing a left reel pattern that can be stopped and displayed in the display window at the time of stop, (2) is a stop display in the display window at the left second stop after the middle first stop when the small win C1 condition device is activated. It is a figure which shows the symbol of the left reel which becomes possible. In the first embodiment, it is a diagram showing symbol combinations that can be stopped and displayed when the small winning combination A1 condition device to the small winning combination C2 condition device are activated. In the first embodiment, it is a diagram showing symbol combinations that can be stopped and displayed when a small combination D1 condition device to a small combination F2 condition device are activated. In the first embodiment, of the symbol combinations that can be stopped and displayed when the small win A1 condition device to the minor win F2 condition device are activated, only the symbols of the middle reels are diagrams showing the symbol combination of "PB=1" arrangement. . In the first embodiment, it is a diagram showing a symbol combination in which only the symbols on the right reel are arranged "PB=1" among the symbol combinations that can be stopped and displayed when the small win A1 condition device to the minor win F2 condition device are activated. . In the first embodiment, of the symbol combinations that can be stopped and displayed when the small win A1 condition device to the minor win F2 condition device are activated, only the symbols on the left reel are in the "PB=1" arrangement. . In the first embodiment, (1) is a diagram showing the stop roll when the small win 01 is won, (2) is a diagram showing the stop roll when the small win 02 is won, and (3) is a view showing the stop roll when the small win is won. It is a diagram showing a stop roll at the time of 03 winning. In the first embodiment, (1) is a diagram showing the stop roll when the small win 04 is won, (2) is a diagram showing the stop roll when the small win 05 is won, and (3) is a view showing the stop roll when the small win is won. It is a figure which shows the stop number at the time of 06 winning a prize. It is a figure which shows the pattern arrangement|sequence of the reel in 2nd Embodiment. FIG. 11 is a diagram (1) showing types of wins, etc., symbol combinations, number of payouts, etc. in the second embodiment; It is a diagram (2) showing the types of wins, etc., symbol combinations, the number of payouts, etc. in the second embodiment. It is a figure which shows the numerical table|table in 2nd Embodiment. It is a transition diagram of the game state in the second embodiment. It is a figure which shows the variation conditions of the game state in 2nd Embodiment. In the second embodiment, (1) is left first stop when the small win A1 condition device is activated, left first stop when the small win B1 condition device is activated, and left first when the small win C1 condition device is activated FIG. 10 is a diagram showing a left reel pattern that can be stopped and displayed in the display window at the time of stop, (2) is a stop display in the display window at the left second stop after the middle first stop when the small win C1 condition device is activated. It is a figure which shows the symbol of the left reel which becomes possible. It is a figure which shows the pattern arrangement|sequence of the reel in the modification of 1st Embodiment and 2nd Embodiment. In the modifications of the first embodiment and the second embodiment, (1) is the left first stop when the small win A1 condition device is activated, the left first stop when the small win B1 condition device is activated, and the small win C1 It is a diagram showing the pattern of the left reel that can be stopped and displayed in the display window at the time of the left first stop when the condition device is activated, and (2) is the left second after the middle first stop when the small combination C1 condition device is activated FIG. 10 is a diagram showing symbols on the left reel that can be stopped and displayed in the display window when the game is stopped; In the modification of the first embodiment and the second embodiment, (1) is a diagram showing the stop rolls when winning a small win 01, and (2) is a diagram showing the stop rolls when winning a small win 02. (3) is a diagram showing a stop roll when winning a small winning combination 03. FIG. In the modification of the first embodiment and the second embodiment, (1) is a diagram showing the stop roll when winning a small win 04, and (2) is a diagram showing the stop roll when winning a small win 05. (3) is a diagram showing a stop roll when winning a small winning combination of 06. FIG. It is a figure explaining the structure of main CPU, ROM, and RWM in 3rd Embodiment. FIG. 10 is a diagram showing addresses, label names, number of bytes, and names of data stored in RWM usage areas in the third embodiment; FIG. 10 is a diagram showing addresses, label names, number of bytes, and names of data stored outside the RWM usage area in the third embodiment; FIG. 35 is a diagram following FIG. 34 showing addresses, label names, number of bytes, and names of data stored outside the RWM usage area in the third embodiment; (A) is a diagram showing various LEDs on a display substrate in the third embodiment, and (B) is a diagram showing management information display LEDs in the third embodiment. FIG. 10 is a diagram showing the relationship between digits 1 to 9 and segments A to G and P in the third embodiment; FIG. 10 is a diagram showing signals output from output ports 2 to 7 in the third embodiment; It is a figure which shows the relationship between a digit and a segment in 3rd Embodiment. (A) is a diagram showing the relationship between the LED display counter 1 (_CT_LED_DSP1) and the signal output from the output port 3 in the third embodiment, and (B) is a diagram showing the LED display counter 2 ( _SC_LED_DSP2) and a signal output from the output port 6, and (C) is a diagram illustrating an LED display request flag (_FL_LED_DSP) in the third embodiment. 10 is a flow chart showing program start processing (M_PRG_START) in the third embodiment. FIG. 12 is a flowchart showing power return processing (M_POWER_ON) in the third embodiment; FIG. FIG. 13 is a flowchart showing unrecoverable error processing (C_ERROR_STOP) in the third embodiment; FIG. 10 is a flow chart showing initialization processing (M_INI_SET) in the third embodiment. FIG. 12 is a flowchart showing setting change confirmation processing (M_RANK_CTL) in the third embodiment; FIG. FIG. 12 is a flowchart showing main processing (M_MAIN) in the third embodiment; FIG. 14 is a flowchart showing interrupt processing (I_INTR) in the third embodiment; FIG. 13 is a flowchart showing power-off processing (I_POWER_DOWN) in the third embodiment; FIG. FIG. 12 is a flowchart showing RWM checksum set processing (S_SUM_SET) in the third embodiment; FIG. 10 is a flowchart showing LED display control (I_LED_OUT) in the third embodiment; FIG. 13 is a flowchart showing unrecoverable error processing 2 (S_ERROR_STOP) in the third embodiment; FIG. 14 is a flow chart showing ratio display preparation processing (S_DSP_READY) in the third embodiment. FIG. 11 is a flow chart showing blinking request flag generation processing (S_LED_FLASH) in the third embodiment. FIG. FIG. 12 is a diagram showing a flashing/non-corresponding item determination value table (TBL_SEG_FLASH) in the third embodiment; FIG. 13 is a flow chart showing a ratio display timer update process (S_RATE_TIME) in the third embodiment; FIG. 10 is a flow chart showing ratio display processing (S_LED_OUT) in the third embodiment. FIG. 13 is a flow chart showing a blink bit check count table (TBL_FLASH_CHK) in the third embodiment; FIG. FIG. 12 is a flowchart showing unrecoverable error processing 2 (S_ERROR_STOP) in a modification of the third embodiment; FIG. FIG. 10 is a diagram showing signals output from output ports 2 to 5 in a modified example of the third embodiment; FIG. 13 is a diagram showing the relationship between an LED display counter 1 (_CT_LED_DSP1) and signals output from output ports 3 and 6 in a modification of the third embodiment; It is a block diagram showing a timer circuit and the like for executing interrupt processing in the fourth embodiment. 4 shows an example of a program for explaining interrupt prohibition and interrupt permission in the fourth embodiment, (A) and (B) showing a main processing program, and (C) showing an interrupt processing program. 14 is a flow chart showing program start (M_PRG_START) in the fourth embodiment. FIG. 14 is a flowchart showing power return processing (M_POWER_ON) in the fourth embodiment; FIG. 14 is a flow chart showing initialization processing (M_INI_SET) in the fourth embodiment. FIG. 12 is a flowchart showing interrupt processing (I_INTR) in the fourth embodiment; FIG. It is a time chart which shows the relationship between an 8-bit counter and interrupt processing in 4th Embodiment, and shows the example which does not have an interrupt prohibition period by main processing. It is a time chart which shows the relationship between an 8-bit counter and interrupt processing in 4th Embodiment, and shows the example which has an interrupt prohibition period by main processing. 14 is a time chart showing an example (example 1) in which the 8-bit counter times out multiple times in the relationship between the 8-bit counter and interrupt processing in the fourth embodiment; FIG. 14 is a time chart showing an example (example 2) in which the 8-bit counter times out multiple times in the relationship between the 8-bit counter and interrupt processing in the fourth embodiment; FIG. In the fourth embodiment, it is a time chart showing an interrupt cycle when there is no interrupt disabled period in the main process. FIG. 14 is a diagram showing an example in which an interrupt disabled period in main processing is set between interrupt processing 1 and interrupt processing 2 in the fourth embodiment; In the fourth embodiment, it is a time chart showing an example (example 1) in which the timing at which interrupt processing is scheduled to be executed is an interrupt disabled period. In the fourth embodiment, it is a time chart showing an example (example 2) in which the timing at which interrupt processing is scheduled to be executed is an interrupt disabled period. 13 is a time chart showing an example (example 3) in which the timing at which the load processing is scheduled to be executed is an interrupt disabled period in the fourth embodiment; 10 is a time chart showing the relationship (example 1) between reel rotation and error detection and notification in the fifth embodiment. FIG. 77 is a diagram showing an error history screen including the progress of FIG. 76 (example 1); FIG. 15 is a time chart (example 2) showing a case where settings are changed after an error is detected during reel rotation in the fifth embodiment; FIG. FIG. 79 is a diagram showing an error history screen including the progress of FIG. 78 (example 2); FIG. 15 is a time chart showing a case (example 3) in which a plurality of errors are detected during setting confirmation in the fifth embodiment; FIG. FIG. 81 is a diagram showing an error history screen including the progress of FIG. 80 (example 3); In the fifth embodiment, a time chart showing a case (example 4) in which the first error and the second error are detected during game standby (after all reels 31 are stopped and before the start switch is operated (game start)) be. FIG. 83 is a diagram showing an error history screen including the progress of FIG. 82 (example 4); FIG. 21 is an external perspective view showing a main control board, a socket, and a main chip not attached to the socket in the sixth embodiment; FIG. 4 is a plan view (viewed vertically downward from above) showing in more detail the main chip mounted in the socket; FIG. 85 is an arrow view (front view) seen from the Z1 direction in FIG. FIG. 85 is an arrow view (side view) seen from the Z2 direction. (A) is an enlarged view showing product names and company names, and (B) is a cross-sectional view taken along line Z3-Z3 in (A). FIG. 4 is a cross-sectional view showing the relationship between three types of stepped portions; It is a figure which shows the positional relationship (example 1) of the board|substrate and a predetermined electronic component in 7th Embodiment, (A) shows a top view, (B) shows a front view. (A) is a view viewed from the Z4 direction in FIG. 90(A), and (B) is a view viewed from the Z5 direction (bottom side of the connector) in FIG. 90(B). be. It is a figure which shows the positional relationship (example 2) of the board|substrate and a predetermined electronic component in 7th Embodiment, (A) shows a top view, (B) shows a side view (enlarged view). FIG. 12 is a diagram showing the positional relationship (example 3) between the substrate and the predetermined electronic component in the seventh embodiment, (A) is a front view (mounting surface of the predetermined electronic component), and (B) is a side view. , and (C) shows a back view. FIG. 94 is a diagram showing a modification of Example 3 of FIG. 93, where (A) shows a front view (mounting surface of predetermined electronic components), (B) shows a side view, and (C) shows a back view. FIG. 13 is a diagram showing a one-chip microprocessor in an eighth embodiment; FIG. 96 is a diagram showing in more detail the memory map in the built-in ROM in FIG. 95 in the eighth embodiment; FIG. 96 is a diagram showing in more detail the memory map in the built-in RWM in FIG. 95 in the eighth embodiment; In the eighth embodiment, it is a diagram for explaining the interrupt initialization address, (A) is a diagram showing the data details of the interrupt initialization address, (B) is the relationship between the interrupt priority and the interrupt priority setting value It is a figure which shows. FIG. 20 is a diagram for explaining vector address values and data values stored in the vector addresses in the eighth embodiment, where (A) shows vector address values and (B) shows interrupt factors and automatically assigned values; (C) shows an example of a data value of a vector address. FIG. 20 is a diagram showing a process from power-on to transition to user mode in the eighth embodiment; FIG. 20 is a diagram showing a program example starting from “0000H” in the program area of the use area of the built-in ROM in the eighth embodiment; FIG. 20 is a diagram showing an example when a vector address is set to "00F4H" in the eighth embodiment; 13 is a flowchart showing an example of processing called by an RST instruction in the eighth embodiment, (A), (B), and (C) showing examples 1, 2, and 3, respectively; FIG. 20 is a diagram showing program code area setting addresses and their data values in the eighth embodiment;

In this specification, the meanings of terms are as follows.
A “bet” is a bet of medals (game media) to play a game. To bet medals, the actual medals are inserted from the medal slot 47, or the bet switch 40 is operated to bet the credited (stored) medals.
On the other hand, "credit (also referred to as "reservation")" is different from the above-mentioned "bet" and refers to the accumulation of medals inside the slot machine 10 . As used herein, the term "credit" does not include "bet."
Furthermore, "throwing in" refers to betting or crediting medals.
Also, the “specified number” refers to the number of bets that can be started (executed) in the game. For example, in a game with a prescribed number of "2" or "3", the game can be started with either the bet number of "2" or "3", and the game cannot be played with the bet number of "1".
For convenience of explanation, the “specified number” may also be referred to as the “bet number”.
On the other hand, the term "number of bets" may refer to anything other than the "specified number". For example, in a game with a prescribed number of "2" or "3", when one medal is inserted (before the game starts), the bet number is "1" (the bet number at that time).

“Maintenance” means that the player inserts medals from the medal insertion slot 47 (described later).
“Take care bet” means that the player bets on medals by taking care of the medals from the medal slot 47 .
“Cleaning credit” means that the player credits medals (adding credits) by cleaning the medals from the medal slot 47 .

“Bet medals” means the medals that are bet on.
“Reserved Medals” means Medals that are credited (reserved).
A "reserved bet" is a bet that a player operates a bet switch 40 (described later) to bet part or all of the credited medals within the range that can be betted in the game in order to play the game. It means to
“Automatic bet” means that the number of medals that were betted in the previous game is automatically betted by the control processing of the slot machine 10 when the replay wins.
Here, when the symbol combination corresponding to the small combination has been stopped and displayed (meaning that the symbol combination has stopped on the active line; the same shall apply hereinafter), this is referred to as "winning a small combination".
On the other hand, in the "Regulations Concerning Approval and Type Examination of Gaming Machines (hereinafter simply referred to as "rules")", when the symbol combination corresponding to replaying is stopped and displayed, the conditional device for replaying is activated. are interpreted as not “winning”.
However, in the present application (this specification, etc.), replay is also treated as one of the combinations (replay combination), and stop display of a symbol combination corresponding to replay may be referred to as "replay winning".
“Settlement” means paying out bet medals and/or accumulated medals to a player. In this embodiment, the settlement process is executed when the settlement switch 43 (described later) is operated.

“Payout” refers to paying out medals to a player based on winning a winning combination or paying out medals through the above settlement. When paying out medals to the player based on winning a role, the medals are stored as credits (adding the stored medals, in other words, updating the electronic data stored in the RWM 53 (described later)) and paying out the medals. This includes both dispensing actual medals from a mouth (not shown). The payout of medals is controlled such that, for example, "50" is credited as the limit number of medals, and medals exceeding the credit number of "50" are actually paid out to the player.
Note that "payout" may also be referred to as "grant". Therefore, the "number of payouts" may also be referred to as the "number of awards."

The "game medium" is medals in this embodiment, but electronic information (electronic medals, electronic data) is used as the game medium in the case of, for example, an enclosed (ECO) gaming machine. It should be noted that "electronic information" means that, for example, when money (banknotes) is inserted into a lending machine, it is converted into electronic information corresponding to the money, and part or all of the electronic information is used to play a game on a gaming machine. It is possible to credit the game machine as a game medium for performing.
Note that the "game medium" may also be referred to as "game value".

Further, when the game medium is electronic information, "payout of medals" means crediting (adding) to a game medium credit device provided in the gaming machine. Therefore, "payout of medals" does not mean only that the medals are actually paid out from the hopper 35 (described later). addition) is also included.

``N-1'' game, ``N'' game, ``N+1'' game, . When it is a number, the game of the "N"th game is called "this time game". Also, the game of the "N-1"th game is referred to as the "previous game". Furthermore, the game of the "N+1"th game is referred to as the "next game".

In this specification, numbers with "(B)" at the end of numbers (especially 8 bits) mean binary numbers. Similarly, numbers with "(H)", "H" or "h" at the end of the numbers mean hexadecimal numbers. Specifically, for example, a numeric value indicating "16" in decimal is expressed as "00010000(B)" in binary and as "10(H)", "10H" or "10h" in hexadecimal. . Numerical values representing decimal numbers are written as "16(D)" as necessary.
However, when it is clear whether it is a binary number, a decimal number, or a hexadecimal number, "(B)", "(D)", "(H)", "H" or "h" The trailing sign may be omitted.

Also, the probability that a desired pattern to be stopped and displayed on the effective line can be stopped on the effective line during the period from the moment the stop switch 42 is operated until the reel 31 stops (the maximum number of moving frames) is called "pull-in." rate (PB)”.
If the stop switch 42 is not operated at an appropriate position of the reel 31 (at an operation timing that allows the target symbol to be stopped on the effective line within the range of the maximum number of moving frames), the target symbol is stopped on the effective line (effective line). line) is called "PB≠1".
On the other hand, regardless of the position of the reel 31 at the moment the stop switch 42 is operated (regardless of the operation timing of the stop switch 42), the target symbol can always be stopped (drawn) on the effective line. It is called "PB=1".

Further, the "operation mode" of the stop switch 42 means the pressing order of the stop switch 42 and/or the operation timing (timing of pressing the stop switch for stopping the target symbol on the activated line).
Furthermore, the "advantageous operation mode" of the stop switch 42 means that the operation mode of the stop switch 42 has an advantage/disadvantage in the game result (symbol combination that stops on the active line), and the game has a payout or has a payout number. An operation mode in which many symbol combinations stop, an operation mode in which a symbol combination that shifts (promotes) to an advantageous RT stops, or an operation mode in which a symbol combination that does not shift (falls) to a disadvantageous RT stops. The "advantageous operation mode" is also called a correct operation mode or a correct pressing order.

``A game in which the game result is advantageous/disadvantageous depending on the operation mode of the stop switch 42'' is, for example, a game in which a plurality of types of small wins (bells) with different payout numbers are won repeatedly (a game in which a so-called "push order bell" is won) ), the types of small wins (bells) to be won differ depending on the operation mode of the stop switch 42 (the number of payouts differs). Also, for example, in a game in which a plurality of types of replays are won (when duplicate replays are won; a game in which a so-called "push order replay" is won), the RT may change depending on the type of replay won.

The “instruction function” means a function of instructing the player how to operate the stop switch 42 . The instruction function is, in principle, a function of instructing the player on an advantageous operation mode of the stop switch 42 .
In other words, "instruction function" refers to a device that facilitates winning.
It should be noted that "display" is to show the content of the "instruction" in a visible manner, and "notification" is to inform the player of the content of the instruction. Therefore, the "instruction function" is both a "display function" and a "notification function".

Further, there is a possibility that notification of the operation mode of the stop switch 42 is not limited to notification of the most advantageous operation mode. The notification of the operation mode of the stop switch 42 that is most advantageous may be the "activation of the instruction function", but the notification of any operation mode including the operation mode of the stop switch 42 that is most advantageous is the "operation of the instruction function". It may also be referred to as "activation".
For example, when the pushing order bell has a six-choice pushing order, the payout when the pushing order bell is won is one of 1, 3, 4, 10, or a dropout (non-winning), depending on the order of pushing. assume that
Here, informing of the pressing order for winning the 10-card combination is informing of an advantageous operation mode of the stop switch 42, and of course corresponds to "operation of the instruction function".
On the other hand, announcing the pushing order for winning a one-hand, three-hand, or four-hand hand may be regarded as "notification of an advantageous operation mode (operation of an instruction function)", and "an advantageous operation mode It does not have to be "notification of

The pushing order for winning the 4-card hand is the pushing order for not winning the 10-card hand, so it is not the most advantageous operation mode. However, the number of payouts is "4" for the number of bets of "3", and the number of difference in the game is "+1".
Similarly, the pushing order for winning the 3-card hand is not the most advantageous operation mode because it is the pushing order for not winning the 10-card hand. However, since the number of payouts is "3" for the number of bets of "3" and the difference number is maintained at the current state (the difference number is not decreased), it is not necessarily a disadvantageous operation mode.

Furthermore, similarly, the pushing order for winning a winning combination of 1 is not the most advantageous operation mode because it is a pushing order that does not win a winning combination of 10 cards. Further, in this operation mode, the number of payouts is "1" for the number of bets of "3", and the difference number is reduced. However, since it can be said that it is an operation mode that does not miss a role, it may not be said to be a disadvantageous operation mode.

In the present embodiment, when the pressing order bell is won, the operating mode (correct pressing order) in which the winning combination with the largest number of payouts wins is reported.
However, for example, when the difference counter value (described later) in the advantageous section approaches the upper limit value ("2400 (D)"), but the number of remaining games in the advantageous section (advantageous section clear counter value described later) has a margin. , when winning the push order bell, it is conceivable to notify the pushing order for winning, for example, a 3-card hand or a 4-card hand as described above, and to control the difference counter value to maintain the current state.

Also, in this embodiment, the activation of the pointing function is limited to one defined number. For example, assume that the specified number for activating the pointing function is set to "3". In this case, in a game with a prescribed number of "2" or "3" in AT, when the game is started with the bet number of "3" and the pushing order bell is won, the instruction function can be activated. On the other hand, when the game is started with the number of bets "2", the instruction function cannot be operated even if the winning order bell is won.

The "game section" includes a "normal section (non-advantageous section)" and an "advantageous section". In addition, the 5.9 machine had a "waiting section" (a game section that was won in the advantageous section lottery but has not yet moved to the advantageous section), but the current regulations for the 6 machine do not include "waiting section" etc. is not provided. However, it is not limited to this, and game sections other than the normal section and the advantageous section may be provided.
"Normal section" means that a signal related to the instruction function, specifically, a pushing order instruction number and a winning and replay condition device number (information that can determine the correct pushing order), which will be described later, is sent to a peripheral board (for example, the sub-control board 80). ) and has no effect on performance related to the instruction function (no processing related to the instruction function is executed). In other words, the normal section is a game section in which the operation mode cannot be notified. However, in addition to the lottery for the role, it is possible to determine whether or not to move to the advantageous section (lottery etc.).

Since the instruction function must not be activated in the normal section, the pressing order instruction information cannot be displayed on a predetermined display device (such as an LED) electrically connected to the main control board 60, and the instruction function cannot be displayed. Therefore, the image display device 23 electrically connected to the sub-control board 80 cannot display (notify) an advantageous operation mode.

On the other hand, the "advantageous section" is a game section having performance related to the instruction function (in which the instruction function may be operated). It refers to a game section in which a signal relating to the instruction function can be sent to the sub-control board 80 only when the push order instruction information is displayed so that the content (operation mode of the stop switch 42) can be identified. In other words, the advantageous section is a game section in which the instruction function can be operated (the instruction function may be operated), that is, a game section in which the operation mode of the stop switch 42 can be displayed (may be displayed).
However, the sub-control board 80 cannot output an effect that contradicts the content of the instruction given by the main control board 60 or the received signal related to the instruction function.

In addition, even if the advantageous section is a game in which the game result is advantageous/disadvantageous depending on the operation mode of the stop switch 42, the instruction function does not need to be activated.
On the other hand, during the advantageous section, in a game where the game result is advantageous/disadvantageous depending on the operation mode of the stop switch 42, the instruction function may always be operated to display the operation mode of the stop switch 42.
AT (notification game state) is a game state in which the operation mode of the stop switch 42 is notified in a game in which the game result is advantageous/disadvantageous depending on the operation mode of the stop switch 42 . Therefore, AT is always in the advantageous interval and AT is never executed in the non-advantageous interval.

In addition, in a game where the game result is advantageous/disadvantageous depending on the operation mode of the stop switch 42, the AT may always notify the operation mode of the stop switch 42 (at 100%), but the ball output rate in a predetermined period It is conceivable not to report the operation mode of the stop switch 42 even in a game in which the game result is advantageous/disadvantageous depending on the operation mode of the stop switch 42 in order to keep the game within the range defined by the rules.
For example, when the upper limit value of the difference number counter is approached during AT, but the number of AT games still remains, the operation mode of the stop switch 42 is temporarily not reported from the viewpoint of extending the life of the AT. (not activating the indicating function) is also conceivable.

In addition, various settings can be made for the relationship between the advantageous section and the AT. For example, the first method is to set “advantageous section=AT”. In this case, winning the advantageous section and winning the AT are equivalent. Then, AT is started from the first game in the advantageous section. Also, the AT ends when the advantageous section ends.

Secondly, it is possible to set "AT≠advantageous section".
In this case, the AT start (execution) condition is not satisfied just by moving to the advantageous section. When it is decided to execute, the AT is executed until a predetermined termination condition of the AT is satisfied. In addition, when it is non-AT when shifting to the advantageous section, for example, the main game state may be set to normal section, omen, CZ (chance zone (a period in which AT is likely to be won)) or the like.

When shifting to the sign after shifting to the advantageous section, the game may be shifted to the main sign without fail, and after the predetermined number of games of the main sign is completed, the game may be shifted to AT. Alternatively, at the time of transition to the advantageous section or after the transition to the advantageous section, it may be determined by lottery or the like whether it is a real omen or a false omen, and when it is determined to be a real omen, it may be shifted to AT after the end of the main omen. . Further, when the false sign is determined, after the false sign ends, the advantageous section may be maintained, or the section may be shifted to the normal section.
Furthermore, both the AT and the advantageous section may be terminated when the AT termination condition is satisfied. Alternatively, although the AT ends, if the conditions for ending the advantageous section are not satisfied, the advantageous section may be continued (non-AT and advantageous section). The same applies when AT is started at the same time as the advantageous section.

Further, the number of times of playing the advantageous section is determined when the advantageous section is started, and a lottery or the like regarding the advantageous section is not executed during the advantageous section.
Furthermore, when starting the advantageous interval, the initial number of games in the advantageous interval is determined, and during the advantageous interval, it is decided (lottery, etc.) whether or not to add (add) the (remaining) number of games in the advantageous interval. Things are mentioned.
Furthermore, a predetermined termination condition is set for the advantageous section, and when the predetermined termination condition for the advantageous section is satisfied, even if there is a remaining number of games in the advantageous section (or remaining number of AT games), at that point Ending the advantageous section with

Here, the “predetermined condition for ending the advantageous interval” means that the difference counter value (to be described later) exceeds “2400 (D)” or the advantageous interval clear counter (to be described later) (the number of games played during the advantageous interval) is “ 1500 (D)”. When any one of these conditions is satisfied, it is determined that the termination condition of the advantageous section is satisfied, and the next game is shifted to the normal section (non-advantageous section). In this case, even if the final game is AT, the AT ends at the same time as the advantageous section ends.

In an advantageous section, an advantageous section display LED (also referred to as a "section indicator") 77, which will be described later, is lit. The advantageous section display LED 77 may be always turned on during the advantageous section, or may be turned on when a predetermined lighting condition is satisfied after shifting to the advantageous section.
Here, the "predetermined lighting condition" is, for example, when the instruction function is activated in a game state in which the area Sim is in an advantageous area and the area Sim ball-out rate exceeds "1". It should be noted that once the advantageous section display LED 77 is turned on, the lighting is maintained during the advantageous section.

In addition, the "interval Sim (simulation) ball output rate" means that the symbol combination corresponding to the winning combination is always stopped and displayed (even if the combination of "PB ≠ 1" is won, the symbols corresponding to the combination is stopped), and when there are multiple types of symbol combinations corresponding to the winning combination, the symbol combination that is most advantageous to the player (when the bell is won in the order of pressing the bell, the highest payout is achieved). This is the payout rate when it is assumed that the display is stopped. The calculation of the section Sim ball-out rate does not include the number of balls (number of payouts) due to the operation of the accessory (1BB operation, etc.). In addition, in the game winning the replay, when the number of bets is "3", the number of payouts is counted as "0", and in the replay based on the winning of the replay (the next game of the game winning the replay), the number of bets It is calculated as "0" and the number of payouts "x"("x" is the number of payouts in the game). Alternatively, the number of payouts for the game winning the replay and the number of bets for the next game may not be counted.
Furthermore, the “game state in which the interval Sim ball-out rate exceeds “1”” includes RT and the main game state in which the interval Sim ball-out rate is set to exceed “1”.
Here, RTs with a section Sim payout rate exceeding “1” include, for example, RTs with a high replay winning probability.
Assuming that CZ (chance zone), AT, pullback section, etc. are usually provided as the main game state, AT can be mentioned as the main game state in which the section Sim ball output rate exceeds "1".

When the advantageous interval ends, more specifically, in the final game of the advantageous interval, the advantageous interval display LED 77 is extinguished during, for example, a game end check process to be described later, or a game start setting process in the next game of the final game in the advantageous interval. do. When the conditions for ending the advantageous section are satisfied, the advantageous section display LED 77 is extinguished in subsequent interrupt processing by executing the processing for initializing the advantageous section display LED flag, which will be described later.

The “process related to the advantageous section” includes, for example, the following processes.
1) Advantageous section (transfer) lottery 2) Advantageous section clear counter update (subtraction, clear)
3) Updating the difference counter (calculation, clearing)
4) Update of advantageous section type flag 5) Control of advantageous section display LED 77 (update of advantageous section display LED flag)

Also, the “processing related to the instruction function” includes, for example, the following processing.
1) Display of push order instruction information (activation of instruction function)
2) AT lottery 3) In the case of a game number management type AT (specification that ends AT when the number of remaining games becomes "0"), updating the AT game number counter (subtraction, addition, clearing)
4) In the case of the difference number management type AT (specification that ends AT when the remaining difference number becomes "0"), updating the AT difference number counter (subtraction, addition, clearing)

According to the current rules, both the processing related to the advantageous section and the processing related to the instruction function can be executed in one prescribed number of times in one gaming state (RT), except for the following. Therefore, in the present embodiment, the specified number "3" enables execution of the processing related to the advantageous section and the processing related to the instruction function, and the specified number "2" makes it impossible to execute the processing related to the advantageous section and the processing related to the instruction function. and
However, during the advantageous interval, it is necessary to update the advantageous interval clear counter and update the difference number counter regardless of the specified number.

In addition, in this embodiment, when the result of the winning lottery is non-winning (for example, when the winning number is "0" in FIG. 26, which will be described later), in other words, in the game when the conditional device is not activated, It is determined that such processing (advantageous section transition lottery) is not executed. However, this is not the only option, and the processing relating to the advantageous section may be executed even if the combination lottery result is non-winning.
On the other hand, in the present embodiment, even if the result of the winning lottery is non-winning, if the probability of non-winning is a predetermined value or more (when the probability is not extremely low, for example, "1/17500" or more), the instruction function Processing (AT lottery processing) can be executed.

Furthermore, as a result of executing the advantageous zone transition lottery (processing related to the advantageous zone), when the advantageous zone transition lottery is won, the next game will be the advantageous zone. Therefore, it is not possible to execute the advantageous zone transition lottery (process related to the advantageous zone) and execute the correct pressing order (process related to the instruction function) in the game in which the advantageous zone is won.
However, it is permissible to perform the advantageous zone transition lottery (process related to the advantageous zone) and the AT lottery (process related to the instruction function) in one game. Furthermore, for example, when a specific combination lottery result is obtained, the advantageous section and AT may be determined (without executing the lottery).

The management information display LED (also called "role ratio monitor" or "ratio indicator") 74 consists of, for example, four LEDs, and a two-digit identification segment (which one of the following five items is indicated). is displayed by a predetermined symbol or the like) and a two-digit ratio segment (LED for displaying the calculated ratio).

The management information display LED 74 repeatedly displays the ratio of the following five items 1) to 5) at predetermined time intervals.
1) Either the advantageous section ratio (cumulative) (7U.) or the instructed accessory ratio (cumulative) (7P.) 2) Continuous accessory ratio (6000 games) (6y.)
3) Accessory ratio (6000 games) (7y.)
4) Continuous accessory ratio (cumulative) (6A.)
5) Role ratio (cumulative) (7A.)

For example, when displaying the role ratio (total), when the ratio is "50"%, the symbol "7A." indicating the role ratio (total) is displayed in the identification segment, and "50" is displayed. Show on ratio segment.
Here, "total" refers to the total sum of the numbers that have been counted up to that point, and in the present embodiment, the number of games is counted until it reaches at least "175000" games. When the total number of games is less than "175000", the ratio is displayed by, for example, blinking display, and when the total number of games is "175000" or more, the ratio is displayed by lighting display, for example. Even after the cumulative number of games reaches "175000" or more, the cumulative total continues to be added until it reaches a value (upper limit) that can be stored in a predetermined address of the RWM 53 .
Also, "6000 games" is the total number of games played for 15 sets of "400" games for one set.

The “advantageous section ratio” refers to the ratio (percentage) of stays in the advantageous section to all game sections (non-advantageous section + advantageous section). Specifically, for example, when the number of games played in all game sections is "1000" and the number of games played in the advantageous section therebetween is "700", the advantageous section ratio is "70%".
Further, the "instruction-inclusive role ratio" is a value obtained by dividing the sum of the number of payouts when the role is activated and the number of payouts in the game in which the instruction function is activated, by the total number of payouts. In the case of a slot machine in which no role is installed, the "indicated role ratio" is a value obtained by dividing the number of payouts in the game in which the instruction function is activated by the total number of payouts.
The sum total of the number of payouts at the time of operating the role and the number of payouts in the game in which the instruction function is operated is counted by the instruction-inclusive role-thing counter.

Furthermore, the "number of payouts in the game in which the instruction function is activated" is based on the operation of the stop switch 42 according to the pressing order displayed by the operation of the instruction function. "10" is added to the instructed accessory counter.
On the other hand, in a game in which the instruction function is activated, when the stop switch 42 is operated in a different order from the displayed order and, for example, one bell wins, "1" is displayed in the instruction-containing accessory counter. is added.
Similarly, in a game in which the instruction function is activated, if the stop switch 42 is operated in an order different from the displayed order of pushes, and the winning combination is not obtained (when the combination is not won), the indicated role counter is displayed. is not added to In other words, the count value in the previous game remains unchanged.

When the common bell is won during AT, the instruction function is activated in the same way as when the push order bell is won, and the push order instruction information (dummy) is displayed on the acquired number display LED 78, and the instruction function is activated. and a case where it is not operated. When the instruction function is activated when the common bell is won, the number of payouts in the game is added to the instruction-included accessory counter.

On the other hand, when the common bell is won and the instruction function is not activated, the number of payouts in the game is not added to the instruction-included accessory counter. However, the total number of payouts is added to the counter. In this case, the sub-control board 80 may notify the correct key pressing order by image or sound.

In addition, as special roles (accessories), BB (first-class role continuous operation device; first-class big bonus), RB (first-class special role; regular bonus), and MB (second-class role continuous Actuator; second type big bonus) can be mentioned.
Here, BB is a device capable of continuously operating RB. That is, the RB game is continuously executed during the BB game. Also, during the RB game, the probability of winning a small winning combination increases. Furthermore, when the number of paid out medals during the RB game exceeds a predetermined number, the RB game ends. Furthermore, when the number of paid out medals during the BB game exceeds a predetermined number, the BB game ends.

Also, MB is a device that can continuously operate CB (second class special role). That is, the CB game is continuously executed during the MB game. Furthermore, during the CB game, regardless of the result of the lottery by the lottery lottery means 61, all minor winnings are repeatedly won, and the stop switch 42 is operated for a specific reel 31 (for example, the left reel 31). The time from the instant when the reel 31 is stopped until the reel 31 stops is within 75 ms (maximum moving frame number is 1 frame). Furthermore, the CB game ends after one game, and when the number of medals paid out during the MB game exceeds a predetermined number, the MB game ends.

Also, when a special role is won, winning information of the special role is carried over to the next game until the symbol combination corresponding to the won special role stops on the effective line.
A game in which the special role is not won is called "non-internal", and the special role is won, but when the symbol combination corresponding to the special role won is not stopped on the effective line, that is, the special role is won. A game in which information is carried over is called "internal".

Also, when BB is won and the symbol combination corresponding to BB stops on the effective line (BB wins), the BB game is started from the next game although no medals are paid out in the current game. During the BB game, the probability of winning a small winning combination is increased by continuously executing the RB game. Then, when the number of paid out medals during the BB game exceeds a predetermined number, the BB game is terminated, and the next game returns to the game state before shifting to the BB game.

Furthermore, if BB is won but the pattern combination corresponding to BB does not stop on the effective line, the winning information of BB is carried over to the next game until the pattern combination corresponding to BB stops on the effective line. A game state in which winning information of BB is carried over is called "inside BB".
It should be noted that the transition timing into the inside of the BB can be appropriately set. For example, in the game in which the BB is won, after all the reels 31 are stopped, it may be moved to the inside of the BB. You can move inside.

Also, when RB is won and the symbol combination corresponding to RB stops on the effective line (RB wins), the RB game is started from the next game although no medals are paid out in the game this time. During the RB game, the probability of winning a small winning combination increases. Then, when the number of paid out medals during the RB game exceeds a predetermined number, the RB game is terminated, and the next game returns to the game state before shifting to the RB game.

Furthermore, if RB is won but the pattern combination corresponding to RB does not stop on the effective line, the winning information of RB is carried over to the next game until the pattern combination corresponding to RB stops on the effective line. The game state in which the winning information of RB is carried over is called "inside RB".
It should be noted that the transition timing into the inside of the RB can be appropriately set in the same manner as the timing of transition into the inside of the BB. For example, in the game in which the RB is won, after all the reels 31 are stopped, the reels 31 may be moved to the inside of the RB. You can move inside.

Also, when the MB is won and the symbol combination corresponding to the MB stops on the effective line (MB wins), no medals are paid out in the game this time, but the MB game is started from the next game. During the MB game, the CB game is continuously executed. When the number of medals paid out during the MB game exceeds a predetermined number, the MB game is terminated, and the next game returns to the game state before shifting to the MB game.
Furthermore, when the MB is won but the pattern combination corresponding to the MB does not stop on the effective line, the winning information of the MB is carried over to the next game until the pattern combination corresponding to the MB stops on the effective line. The game state in which the winning information of the MB is carried over is called "inside the MB".

"RT" means that the type (number) of the role to be selected by lottery and its winning probability are in a unique lottery state, and "RT transition" means transition from one RT to another RT By doing so, it means that the winning probability of at least one replay subject to lottery changes.
Therefore, the type of replay and its winning probability in one RT are values specific to that RT, and it is impossible for one RT and another RT to have the same replay type and its winning probability. do not have. However, there is no problem if one RT and another RT have the same total replay winning probability.
Note that "non-RT" does not mean that it is not included in the concept of RT, but is equivalent to "RT0". Therefore, when we refer to "RT" in this specification, we include non-RT.

"Continuous bonus ratio" refers to the ratio of the number of payouts at the time of activation of the first class special bonus (RB) to the total number of payouts. Therefore, in this embodiment, it refers to "the number of payouts during 1BB operation with respect to the total number of payouts".
For example, when the total number of payouts in the number of games played is "6000" is "2000", and the number of payouts when the "first class special bonus (RB)" is activated is "500". Ratio (6000 games)” becomes “25 (%)”.

Further, the "accessory ratio" refers to the ratio of the number of payouts at the time of activation of the accessory to the total number of payouts. Here, the "accessories" include, in addition to the above-mentioned first class special accessories, second-class special accessories (CB) and MB (also called 2BB). is continuous operation.), SB (single bonus) is included.
In addition, in the above five items, if the game machine does not have the function corresponding to the item, the ratio segment is lit and displayed as "--".
For example, if "RB (first class special role)" is not provided, there is no continuous role ratio, so when ratio display numbers "2" and "4" are displayed, the ratio segment is set to "-- ” lights up.
As described above, five types of ratios are displayed on the management information display LED 74, and a test pattern is displayed at a predetermined timing when a predetermined condition is satisfied.

In addition, it is stipulated by regulation that the advantageous section ratio and the instructed accessory ratio should be 70% or less. Further, it is stated that the role product ratio should be 70% or less, and it is stipulated that the continuous role product ratio should be 60% or less.
Therefore, by looking at the information displayed on the management information display LED 74, it is possible to confirm whether or not the information is within the legal range.

Note that a game machine with a specification of 70% or less advantageous section ratio is called a "7U" type, and a game machine with a specification of 70% or less instructed accessory ratio is called a "7P" type. A gaming machine with an advantageous section is either a "7U" type or a "7P" type. In the case of the "7U" type, the advantageous section ratio (total) is displayed on the management information display LED 74, and in the case of the "7P" type, the instructed accessory ratio (total) is displayed.
In the '7U' type, the ratio of the advantageous section to the total game section must be '70'% or less, but in the '7P' type, the total number of payouts paid out by the operation of the instruction function and the operation of the accessory The number of payouts may be 70% or less, and for example, the entire period or most of the game sections may be advantageous sections.

For example, when moving to a non-advantageous section, set so that you will win the advantageous section lottery with a probability of 100%, and set it so that you will win the advantageous section lottery with a probability of almost 100% (for example, about 98%). Alternatively, it may be set so that the advantageous section lottery is won with a high probability (for example, 70%).
The "7U" type cannot refer to the setting value itself to perform processing related to the instruction function (for example, AT lottery), but the "7P" type refers to the setting value itself and performs processing related to the instruction function. Is possible.

Also, the management information display LED 74 can be applied to a pachinko game machine as a performance display monitor.
In this case, the management information display LED 74 (performance display monitor) is composed of a two-digit identification segment and a two-digit ratio segment, as in the case of the slot machine (rotary game machine). Then, the real-time (measured) base value for every 60,000 out balls (the 'base value' indicates how many safe balls are out of 100 out balls), and 60,000 ”, the base values of 1, 2, and 3 times before are displayed in sequence. For example, the identification seg of the real-time base value is displayed as "bL.", the identification seg of the previous base value is displayed as "b1." is displayed, and the identification segment of the base value three times before is displayed as "b3.".
In this way, the management information display LED 74 is applied not only to slot machines but also to pachinko game machines among game machines.

<First embodiment>
In the first embodiment, in a game in which a plurality of types of small winnings (bells) with different payout numbers are repeatedly won (a game in which a so-called "push order bell" is won), a prize is won depending on the operation mode (push order) of the stop switch 42. This is a slot machine in which the game result (the number of payouts) is advantageous/disadvantageous due to the difference in the types of small wins (combination of symbols stopped and displayed on the activated line).
A first embodiment will be described below with reference to the drawings and the like.
FIG. 1 is a block diagram showing an outline of control of a slot machine 10, which is an example of a game machine according to the first embodiment.
A main control board 50 and a sub-control board 80 are provided as representative control boards provided in the slot machine 10 .
The main control board 50 has an input port 51 and an output port 52, and is equipped with an RWM 53, a ROM 54, a main CPU 55, etc. (not meant to include only those shown in FIG. 1).

In FIG. 1 , a main control board 50 and peripheral devices for game progress including operation switches such as the bet switch 40 are electrically connected via an input port 51 or an output port 52 . The input port 51 is a connection portion to which signals such as operation switches are input, and the output port 52 is a connection portion to transmit signals to peripheral devices such as the motor 32 .
In FIG. 1, input peripherals are indicated by arrows from which signals from the peripherals are directed to the main control board 50, and output peripherals are indicated by arrows from the main control board 50 to the peripherals. (The same applies to the sub-control board 80).

The RWM 53 is a storage medium capable of storing (updating) various data (variables) based on the progress of the game.
The ROM 54 is a storage medium for storing programs and various data (for example, data table) necessary for progressing the game.
The main CPU 55 refers to a CPU (an IC having a calculation function) provided on the main control board 50, and executes programs and calculations necessary for the progress of the game. , and payout at the time of winning.

Also, on the main control board 50, an RWM 53, a ROM 54, a main CPU 55 and an MPU including registers are mounted. It should be noted that the RWM 53 and ROM 54 may be provided externally in addition to being mounted inside the MPU.
An MPU including the RWM 83, the ROM 84, and the sub CPU 85 is also mounted on the sub control board 80, which will be described later. It should be noted that the RWM 83 and ROM 84 may be provided externally instead of being mounted inside the MPU.

In FIG. 1, the medal inserted from the medal slot 47 is sent inside the medal selector.
As shown in FIG. 1, a passage sensor 46, a blocker 45, and an insertion sensor 44 (a pair of insertion sensors 44a and 44b) are provided in the medal selector (but not limited to these). These are electrically connected to the main control board 50 .
A medal inserted from the medal slot 47 is first detected by the path sensor 46 .

Furthermore, a blocker 45 is provided downstream of the passage sensor 46 . The blocker 45 permits/disallows insertion of medals, and when the insertion of medals is not permitted, forms a medal passage for returning the medals inserted from the medal insertion port 47 from the payout port. do. On the other hand, when the insertion of medals is allowed, a medal passage is formed to guide the medals inserted from the medal insertion port 47 to the hopper 35 . The blocker 45 is, for example, a switching member that forms a medal passage for guiding medals to the hopper 35 side by blocking an opening (opening leading to a medal return opening) formed in a part of the medal passage in the medal selector. and an actuator or the like for driving the switching member.

Here, the blocker 45 prohibits the insertion of medals during the game (from the start of rotation of the reels 31 until all the reels 31 stop and when the payout corresponding to the winning combination ends). do. That is, the blocker 45 permits insertion of medals at least when no game is played.

Further downstream of the blocker 45 in the medal selector, an insertion sensor (optical sensor) 44 is provided. The insertion sensor 44 is composed of a pair of insertion sensors 44a and 44b arranged at a predetermined distance in this embodiment. is configured to be detected by Then, based on the timing at which the pair of insertion sensors 44 are turned on/off, it is determined whether or not the correct medals have been inserted.

Further, as shown in FIG. 1, the main control board 50 includes, as operation switches operated by the player, a bet switch 40 (40a or 40b), a start switch 41, a (left, middle, right) stop switch 42, and a A settlement switch 43 is electrically connected.
Here, the "operation switch (or simply "switch")" is based on the operation of the operation body by the player (operator) (receiving external force) to switch on / off of the electric signal. It refers to a device (including electric circuits and/or electric parts), and does not limit the shape of an operating body operated by a player.

When the operation switch is in the off state, for example, light from the light emitting element continues to enter the light receiving element (while the light receiving element continues to detect light, the operation switch is in the off state). When the player or the like operates the operation switch (the operation body of the operation switch), the light from the light emitting element does not enter the light receiving element. When this state is detected, an electrical signal is sent to the main control board 50 indicating that the operation switch is turned on. Contrary to the above, when the operation switch is in the off state, the light from the light emitting element does not enter the light receiving element, and when the light from the light emitting element enters the light receiving element, the light is turned on. You may

In the present embodiment, the operating body of the start switch 41 is a lever (bar) shape (therefore also referred to as "start lever (switch) 41"), and includes a bed switch 40, a stop switch 42, and an adjustment switch. The operation body 43 is in the shape of a push button (thus, it is also called "bet button (switch) 40", "stop button (switch) 42", and "settlement button (switch) 43").

Although not shown in FIG. 1, an LED (light emitting means) is provided on the operation body of the operation switch and/or around or near it. When the operation of the operation switch is permitted, for example, an LED or the like corresponding to the operation switch emits blue light. By emitting red light from an LED or the like, the permission/non-permission state of the operation switch is indicated to the player.

Specifically, for example, when all the reels 31 are rotating and the operation of the stop switch 42 can be accepted, the LEDs of all the stop switches 42 emit blue light to notify the player that the operation is possible. shown in When one stop switch 42 is operated, the reel 31 corresponding to the operated stop switch 42 is controlled to be stopped. After that, the rest of the stop switches 42 become operable when the excitation state of the motor 32 corresponding to the reel 31 controlled to stop is terminated and the detection sensor 42e of the operated stop switch 42 is turned off. later. Therefore, during that time, the LEDs of all the stop switches 42 emit red light. When the excitation state of the motor 32 corresponding to the operated stop switch 42 ends and the detection sensor 42e corresponding to that stop switch 42 is turned off, the LED of the already operated stop switch 42 is turned off. The LEDs of the stop switches 42 that have not yet been operated, while still emitting red light, are caused to emit blue light.

The bet switch 40 is an operation switch operated by the player when betting the accumulated medals for the current game. In this embodiment, a 1-bet switch 40a for inserting one medal and a 3-bet switch 40b for inserting three (maximum number, specified number) medals are provided.
Note that a bet switch for betting two cards may be provided without being limited to this.

In addition, the specified number is determined in advance depending on, for example, when the accessory is not activated/when the accessory is activated. Concretely, it is set such that when the accessory is not activated, when the SB is activated, when the 1BB is activated, there are 3 sheets, and when the 2BB is activated, there are 2 sheets. Two medals can be inserted by operating the 1-bet switch 40a twice, and three medals can be inserted by operating it three times. Also, when the prescribed number is 3, operating the 3-bet switch 40b allows 3 medals to be inserted at once, and when the prescribed number is 2, operating the 3-bet switch 40b. Two medals can be inserted at a time. If the 3-bet switch 40b is operated when less than the prescribed number has already been betted, the bet processing is performed so that the number of bets is 3.

Also, the start switch 41 is an operation switch that is operated by the player when starting the reels 31 (all of the left, middle and right reels).
Furthermore, three stop switches 42 are provided corresponding to the three (left, middle, and right) reels 31, and are operation switches operated by the player when the corresponding reels 31 are to be stopped.
Further, the settlement switch 43 is an operation switch operated by the player when paying out (paying out) the medals betted and/or stored (credited) inside the slot machine 10 .

Further, as shown in FIG. 1, a display substrate 75 is electrically connected to the main control substrate 50 . In practice, a relay board is provided between the main control board 50 and the display board 75, and the main control board 50 and the relay board, and the relay board and the display board 75 are connected. 1, illustration of the relay board is omitted. As described above, the main control board 50 and the display board 75 may be directly connected by a harness or the like, but another board may be interposed between them.
Furthermore, the control boards are not limited to being directly connected to each other by a harness or the like, but may be connected via another board (relay board or the like). For example, one or more other boards (relay boards, etc.) may be interposed between the main control board 50 and the sub-control board 80 .

The display substrate 75 is mounted with a credit number display LED 76 and an acquired number display LED 78 .
The credit number display LED 76 is an LED that displays the number of medals accumulated (credited) inside the slot machine 10, and is composed of two digits, upper digits and lower digits.

The winning number display LED 78 is an LED that displays the payout number (the player's winning number) when a winning combination is won, and is composed of upper and lower digits, similar to the credit number display LED 76. .
Note that the acquired number display LED 78 may be controlled to be extinguished when there are no medals to be paid out. Alternatively, the upper digits may be turned off and only the lower digits may be displayed as "0".

Also, the acquisition number display LED 78 normally displays the acquisition number, but functions as an LED that displays the content (type) of the error when an error occurs.
Furthermore, the acquired number display LED 78 functions as an LED for displaying pressing order instruction information (notifying an advantageous pressing order) in a game that notifies the pressing order during AT. Therefore, the acquired number display LED 78 in this embodiment is an LED that also displays the acquired number, the error content, and the pressing order instruction information. However, the present invention is not limited to this, and it is of course possible to provide a dedicated LED or the like for displaying the pressing order instruction information.
It should be noted that, during AT, notification of an advantageous pressing order is also performed by the image display device 23 connected to the sub-control board 80 .

In FIG. 1, a main control board 50 is electrically connected to a motor (a stepping motor in this embodiment) 32 and the like of the pattern display device.
The symbol display device includes (three in this embodiment) reels 31 that display symbols, motors 32 that drive the respective reels 31 , and reel sensors 33 that detect the positions of the reels 31 .

The motor 32 serves as driving means for rotating the reels 31, is connected to the center of rotation of each reel 31, and is controlled by reel control means 65, which will be described later.
Here, the reel 31 is composed of a left reel 31, a middle reel 31, and a right reel 31. A stop switch 42 operated when the left reel 31 is stopped is the left stop switch 42, and when the middle reel 31 is stopped, a stop switch 42 is operated. The stop switch 42 to be operated is the middle stop switch 42 , and the stop switch 42 to be operated when stopping the right reel 31 is the right stop switch 42 .
The left reel 31 may be called the first reel 31 , the middle reel 31 may be called the second reel 31 , and the right reel 31 may be called the third reel 31 .

The reel 31 is ring-shaped, and a reel tape on which a plurality of kinds of patterns (symbols forming a combination of patterns corresponding to a role) are printed is attached to the outer peripheral surface of the reel 31 .
Also, each reel 31 is provided with one (or two or more) index. The index is provided in a convex shape, for example, on the peripheral side surface of the reel 31, and is used when detecting whether or not the reel 31 has passed a predetermined position, whether or not it has made one revolution, and the like. Each index is detected by the reel sensor 33 . A signal from the reel sensor 33 is electrically connected to the main control board 50 . When the index detects (turns off) the reel sensor 33, the input signal is input to the main control board 50, and it is detected that the reel 31 has passed a predetermined position.

In addition, the symbols on the reference position at the instant when the reel sensor 33 detects the index of the reel 31 are stored in the ROM 54 in advance. As a result, it is possible to detect the pattern on the reference position at the moment the index is detected. Furthermore, from the moment the reel sensor 33 detects the index of the reel 31, by driving the (stepping) motor 32 by how many pulses, the symbol counted from the symbol on the reference position can be stopped on the effective line. can be identified.

A medal payout device is electrically connected to the main control board 50 . The medal payout device includes a hopper 35 for storing medals, a hopper motor 36 driven when the medals of the hopper 35 are paid out from the payout port, and a payout for detecting the paid out medals from the hopper motor 36. A sensor 37 is provided.

The medals that have been cleaned and accepted (determined to be normal) from the medal slot 47 are formed to be accommodated in the hopper 35 .
The payout sensor (optical sensor) 37 consists of a pair of payout sensors 37a and 37b arranged at a predetermined distance in this embodiment. Then, when the medals are paid out, the predetermined moving member is moved by the medals. The payout sensors 37a and 37b are turned on/off by movement of a predetermined moving member. Based on whether the payout sensors 37a and 37b are turned on/off within the range of the predetermined time, it is determined whether or not the medals have been correctly paid out.

For example, when it is not detected that the pair of payout sensors 37 are ON even though the hopper motor 36 is being driven, it is determined that no medals have been paid out, and a hopper error (no medals) is detected.
On the other hand, when at least one of the payout sensors 37 continues to output the ON signal, it is detected that a medal jam has occurred.

When starting a game, the player inserts medals that have been credited in advance by operating the bet switch 40 (stored bet), or inserts medals from the medal insertion slot 47 (repair bet). When the start switch 41 is operated with the prescribed number of medals for the game being bet, a signal generated at that time is input to the main control board 50 . When receiving this signal, the main control board 50 (specifically, the reel control means 65 to be described later) performs a lottery by the combination lottery means 61, drives and controls all the motors 32, and rotates all the reels 31. Control to rotate. As the reels 31 are rotated by the motor 32 in this way, the symbols on the reels 31 are moved up and down within the display window at a predetermined speed.

By pressing the stop switch 42, the player stops the rotation of the reel 31 corresponding to the stop switch 42 (for example, the left reel 31 corresponding to the left stop switch 42). When the stop switch 42 is operated, a signal generated at that time is input to the main control board 50 . Upon receiving this signal, the main control board 50 (specifically, the reel control means 65, which will be described later) drives and controls the motor 32 corresponding to the stop switch 42 so that the lottery result of the combination lottery means 61 (internal lottery The stop control of the reel 31 related to the motor 32 is performed so as to correspond to the result determined by means).

Then, the game result of the current game is displayed by the combination of symbols when all the reels 31 are stopped. Furthermore, when the combination of symbols corresponding to one of the winning combinations stops on the activated line (when the winning combination is won), the payout of medals corresponding to the winning combination is performed.

Next, a specific configuration of the main control board 50 will be described.
As shown in FIG. 1, the main CPU 55 of the main control board 50 is provided with the following winning lottery means 61 and the like. Each means below in this embodiment is an example, and is not limited to the means shown in this embodiment.

The role lottery means 61 lotteries (determines and selects) winning numbers. Here, the "lottery of the winning numbers by the role lottery means 61" is the same as the "internal lottery" in the regulations of the Entertainment Business Act (regulations regarding certification of gaming machines, model testing, etc.; hereinafter simply referred to as "rules"), The lottery result by the role lottery means 61 is the same as the "result determined by the internal lottery" in the rules. Therefore, the combination lottery means 61 is also called "internal lottery means 61" in accordance with the rules.
When the winning number is determined by the combination lottery means 61, the winning and replay condition device number and the accessory condition device number are determined based on the winning number, and the winning and replay condition device that becomes operable in the game, In addition, the accessory condition device is determined. Therefore, the combination lottery means 61 is also called condition device number determination (lottery or selection) means, winning combination determination (lottery or selection) means, or the like.

The combination lottery means 61 includes, for example, a lottery random number generation means (hardware random number, etc.), a random number extraction means for extracting the random number generated by the random number generation means, and a random value extracted by the random number extraction means. winning number determination means for determining a winning number.

The random number generating means generates random numbers in a predetermined range (for example, "0" to "65535" in decimal). The random number is, for example, a random number in which a counter that counts once every 200 n (nano) seconds continues to count the range of "0" to "65535" as one cycle. continue to count.

The random number extraction means extracts the random number generated by the random number generation means at a predetermined time, in this embodiment, when the start switch 41 is operated (turned on) by the player. The determination means determines the winning number corresponding to the area to which the random number belongs by collating the random number extracted by the random number extraction means with a lottery table to be described later.

The winning flag control means 62 controls ON/OFF of the winning flag corresponding to each winning combination based on the result of the lottery by the winning combination lottery means 61 . In this embodiment, a win flag is provided for each role for all the roles. Then, when any winning combination is won in the lottery by the combination lottery means 61, the winning flag of that combination is turned on (a winning flag is set). Note that the winning of a combination includes the case where there is one winning combination (single winning) and the case where there are multiple winning combinations (double winning).

The pressing order instruction number selection means 63 selects a pressing order instruction number (a number corresponding to the correct pressing order) based on the lottery result of the winning number by the combination lottery means 61 (when the pressing order bell or the pressing order replay is won). decision).
The "pressing order" of the pressing order instruction number selected here means a pressing order (correct pressing order) that is advantageous for the player. For example, when the bell is won, it means the order of pushing the high bell (correct order of pushing). In addition, at the time of replay duplicate winning, it refers to a pushing order that promotes to an advantageous RT or a pushing order that does not fall to a disadvantageous RT.

In this embodiment, each winning number is provided with a unique pushing order instruction number.
Then, when winning the push order bell or push order replay during the AT, the main control board 50 displays the above-described acquisition number display LED 78 with the push order instruction information corresponding to the push order instruction number, specifically " =*” (“*”=1, 2, . . . ). Thus, the function of displaying push order indication information when a conditional device with an advantageous push order is activated is also referred to as an indication function.
Also, when winning the push order bell or push order replay during AT, the main control board 50, at the start of the game (after the start switch 41 is operated and the winning number is determined), the sub control board 80, a command corresponding to the push order instruction number is transmitted.
When the sub-control board 80 receives the command, the sub-control board 80 displays an image of the correct key pressing order on the image display device 23 .

It should be noted that the push order instruction number selected by the main control board 50 can be transmitted to the sub control board 80 only during the advantageous section (AT). Therefore, even if a pressing order instruction number is selected by the pressing order instruction number selection means 63 in the normal section, the pressing order instruction number is not transmitted to the sub-control board 80 . Note that it is not necessary to select the push order instruction number in the normal section.

The effect group number selection means 64 selects a number to be transmitted to the sub-control board 80, which is the effect group number corresponding to the winning number.
Here, an effect group number corresponding to the winning number is determined in advance. When the winning number is determined by operating the start switch 41, the effect group number selecting means 64 selects the effect group number corresponding to the winning number of the game, and the main control board 50 selects the selected effect group. The number is transmitted to the sub-control board 80. The sub-control board 80 outputs an effect related to the winning combination based on the received effect group number. The effect group number is selected for each game and transmitted from the main control board 50 to the sub-control board 80, unlike the pressing order instruction number.

Also, the main control board 50 does not transmit the winning number of the game to the sub control board 80 . Therefore, the sub-control board 80 cannot know the winning number of the game. However, since the sub-control board 80 receives the effect group number every game, it is possible to output the effect based on the received effect group number. However, even when the pressing order bell or pressing order replay is won, the correct pressing order cannot be determined from the effect group number, so the sub-control board 80 does not notify the correct pressing order based on the effect group number. . On the other hand, during AT, when winning the push order bell or push order replay, the main control board 50 transmits the push order instruction number to the sub control board 80 . As a result, the sub-control board 80 can notify the correct pressing order based on the received pressing order instruction number.

The reel control means 65 controls all (three) reels 31 to start rotating when receiving a command to start rotating the reels 31, particularly when detecting the operation of the start switch 41 in this embodiment. .
Furthermore, after the win number is determined by the combination lottery means 61, the reel control means 65 refers to the on/off of the win flag in the current game, and refers to the stop position determination table corresponding to the on/off of the win flag. is selected, and when the stop switch 42 is operated, the stop position of the reel 31 corresponding to the stop switch 42 is determined based on the timing when the operation of the stop switch 42 is detected, and the motor 32 is operated Drive control is performed to stop the reel 31 at the determined position.

For example, in a game in which at least one winning flag is ON, the reel control means 65 validates a symbol combination corresponding to a winning combination (a combination in which the winning flag is ON) within the range of stop control of the reels 31. The reels 31 are controlled to stop so that they can be stopped on the line, and the reels 31 are controlled to stop so that the symbol combination corresponding to the combination other than the winning combination (the winning flag is turned off) is not stopped on the effective line.

Here, "within the range of stop control of the reel 31" means the time from the moment when the stop switch 42 is operated until the reel 31 actually stops, or the amount of rotation of the reel 31 (the number of moving symbols (frames)). means within range.
In this embodiment, the reel 31 is rotated at a constant speed of about 80 revolutions per minute.
Then, when the stop switch 42 is operated, the time from the moment the stop switch 42 is operated until the reel 31 is stopped is within 190 ms, except for a predetermined reel 31 (for example, the middle reel 31) during MB operation. is set to Thus, in this embodiment, the maximum number of moving symbols from the moment the stop switch 42 is operated until the reel 31 stops is set to 4 symbols, except for the predetermined reel 31 during MB operation.

On the other hand, for a predetermined reel 31 during MB operation, the time from the moment the stop switch 42 is operated until the reel 31 is stopped is set within 75 ms. Thus, for a predetermined reel 31 during MB operation, the maximum moving symbol number from the symbol at the moment when the stop switch 42 is operated until the reel 31 stops is set to 1 symbol.

At the moment when the operation of the stop switch 42 is detected, if any of the symbols within the range of the stop control of the reel 31 is a symbol to be stopped on a predetermined effective line, the stop switch 42 is operated. Then, the symbol is controlled to stop on a predetermined effective line.
That is, if the reels 31 are stopped immediately at the moment the stop switch 42 is operated, if the pattern of the winning combination corresponding to the winning number does not stop on the predetermined effective line, the reels 31 are not stopped until the reels 31 are stopped. By controlling the rotational movement of the reel 31 within the range of stop control, the symbol of the winning combination corresponding to the winning number is controlled to stop on a predetermined effective line as much as possible (pull-in stop control).

Conversely, if the reels 31 are stopped immediately at the moment the stop switch 42 is operated, and the symbol combination of the winning combination that does not correspond to the winning number is stopped on the effective line, the reels 31 are stopped when the reels 31 are stopped. By controlling the rotational movement of the reels 31 within the range of stop control, control is performed so as not to stop the symbol combination of the winning combination that does not correspond to the winning number on the effective line (kicking stop control).
Furthermore, in a game in which a plurality of winning combinations are won (for example, when the bell is won in the order of pressing), the order of priority of winning combinations is determined in advance according to the order of pressing the stop switch 42 and the operation timing of the stop switch 42. In accordance with a predetermined order of priority, the drawing-in stop control of the symbols associated with the highest priority combination is performed.

The winning judgment means 66 judges whether or not the symbol combination of the reels 31 stopped on the active line corresponds to any winning combination when the reels 31 are stopped.
Here, the winning determination means 66 does not actually detect whether or not the symbol combination corresponding to the winning combination has stopped on the activated line. Specifically, from the conditional device operated in the game, the pressing order of the stop switch 42 and / or the operation timing of the stop switch 42, the symbol combination that stops on the effective line before the reel 31 actually stops is set in advance. Alternatively, the symbol combination stopped on the activated line after the reels 31 are stopped is determined in advance.

The control command transmitting means 71 transmits information (control commands) necessary for the effects output by the sub-control board 80 to the sub-control board 80 .
The control commands include, for example, information when the bet switch 40 is operated, information when the start switch 41 is operated, and a pressing order instruction number (only when winning a winning number having a correct pressing order during AT). , effect group number, RT (game state) information, information when the stop switch 42 is operated, information on winning combination, and the like.

In FIG. 1, the sub-control board 80 controls the selection, output, etc. of effects (information) during the game and during the game standby.
Here, the main control board 50 and the sub-control board 80 are electrically connected, and the main control board 50 (control command transmission means 71) is unidirectionally transmitted to the sub-control board 80 by parallel communication. Sends information (control commands) required for output.
The main control board 50 and the sub-control board 80 are not limited to being electrically connected, and may be connected using optical communication means. Furthermore, both the electrical connection and the optical communication connection are not limited to parallel communication, and may be serial communication, or both serial communication and parallel communication may be used.

Similar to the main control board 50, the sub control board 80 includes an input port 81, an output port 82, an RWM 83, a ROM 84, a sub CPU 85, and the like.
The sub-control board 80 is electrically connected to performance peripheral devices such as the following performance lamps 21 as shown in FIG. However, the peripheral devices for presentation are not limited to these.
The RWM 83 is a storage medium that can temporarily store data and the like taken in when the sub CPU 85 controls the effect.
In addition, the ROM 84 is a storage medium for storing a program, various data, etc. for performing a lottery related to an effect as data for effect.

The effect lamps 21 are made up of LEDs, for example, and light up in a predetermined pattern when predetermined conditions are met. The effect lamps 21 are arranged on the inner peripheral side of each reel 31 and are used to illuminate the patterns displayed on the reels 31 (three patterns that are vertically continuous and visible from the display window) from behind. Fluorescent lamps that illuminate symbols on the reels 31 from above, and frame lamps that are arranged in front of the front door of the slot machine 10 and blink when winning a winning combination are included.

Also, the speaker 22 outputs a predetermined sound when a predetermined condition is satisfied in order to perform various effects during the game.
Furthermore, the image display device 23 is composed of a liquid crystal display, an organic EL display, a dot display, etc., and displays various effects images during the game (correct pressing order, effects corresponding to the conditional devices that operate in the game, etc.). , and game information (such as the number of games played during the operation of the accessory, the number of games won during the advantageous section (AT), the number of winnings, etc.).

In this embodiment, the "special role (accessory)" includes "1BB (first class continuous action device; first class big bonus)" and "RB (first first class special role; regular bonus)". Prepare. Therefore, the "special game" includes "1BB game" and "RB game".
Also, in this embodiment, "1BB" has two types, "1BB-A" and "1BB-B." Hereinafter, "1BB-A" and "1BB-B" are collectively referred to as "1BB".

During the 1BB game, the RB game is continuously executed.
In this embodiment, the symbol combination corresponding to RB is not set. Therefore, during the 1BB game, the RB game is continuously executed without stop-displaying the symbol combination corresponding to the RB.

Also, during the RB game, every game, a lottery by the role lottery means 61 wins "one-card role ALL" or "minor role ALL". As a result, during the RB game, that is, during the 1BB game, the probability of winning a small winning combination is higher than during the non-internal and internal 1BB.
Furthermore, during the RB game, the specified number (the number of bets of medals that can start the game) becomes "3", and "1-card role ALL" is won with a probability of "60535/65536", and "1 ” medals are paid out. Therefore, during the RB game, that is, during the 1BB game, the player's medals decrease.
Furthermore, the RB game ends when the game is executed “2” times, when there is a win “2” times, or when the ending condition of the 1BB game is satisfied. In other words, the end condition of the RB game is set to that the game has been executed "2" times, that the game has been won "2" times, or that the end condition of the 1BB game has been satisfied.

In addition, the 1BB game continues until the total number of acquired medals (number of payouts, number of awards) exceeds "210", and ends when the total number of acquired medals exceeds "210". That is, the end condition of the 1BB game is set that the total number of acquired medals exceeds "210".
Then, when the RB game ends and the conditions for ending the 1BB game are not satisfied, the RB game is executed again. Thus, the RB game is continuously executed during the 1BB game.
Also, when the RB game ends, when the end condition of the 1BB game is satisfied, the 1BB game ends and shifts to non-internal mode.
Furthermore, when the end condition of the 1BB game is satisfied during the RB game, the RB game is ended, the 1BB game is ended, and the game shifts to the non-internal state.

Also, the combination lottery means 61 determines the "winning number" by lottery. Therefore, the combination lottery means 61 is also called "winning number lottery (determination, selection) means". Furthermore, when a winning number is determined, a "condition device number" corresponding to the winning number is generated. Then, when a conditional device number is generated, the conditional device corresponding to the conditional device number is activated, and the symbol combination of the combination corresponding to the activated conditional device can be stopped and displayed on the active line (the winning combination is awarded).

In addition, the "condition device number" includes a "accessory condition device number" and a "small combination and replay condition device number".
Furthermore, the "accessory condition device number" is a condition device number corresponding to a special role (accessory), and in this embodiment, as shown in FIG. 9 described later, it has "1" to "2". .
Furthermore, "small win and replay condition device number" is a condition device number corresponding to a small win or replay, and in this embodiment, as shown in FIGS. Prepare.

Also, when a special role is won, an accessory condition device corresponding to the winning of the special role becomes operable. For example, winning 1BB enables the 1BB conditional device.
Furthermore, when a minor winning combination is won, the minor winning combination condition device corresponding to the winning of the minor winning combination becomes operable, and when winning the replay, the replay condition device corresponding to the winning of the replay becomes operable. For example, when a small winning combination A1 is won, the small winning combination A1 condition device becomes operable.

In addition, when winning a special role that can carry over the winning information to the next game or later, the special role is won until the symbol combination corresponding to the special role is stopped and displayed on the active line (the special role is won). Carry over the information to the next game.
Furthermore, when a special combination is won, but the symbol combination corresponding to the special combination is not stopped and displayed on the active line, it is called "internal". That is, the game that carries over the winning information of the special role is called "internal".

On the other hand, a game in which the winning information has not been won in a special combination that can be carried over to the next game or later is called "non-internal". That is, a game that does not carry over winning information for a special role is called "non-internal".
In the present embodiment, the game in which the special role is won is included in "non-internal", but the game in which the special role is won may be included in "internal".
"1BB" is a special role in which winning information can be carried over to the next game or later. called "medium".

In addition, "special game" is also referred to as "accessory actuation". For example, "1BB game" is also referred to as "1BB operation", and "RB game" is also referred to as "RB operation".
Furthermore, "when the role product is not activated" includes a state in which the symbol combination corresponding to the activated role condition device is not stopped and displayed on the active line even though the role product condition device has been activated.
For example, when the "1BB condition device" is not working, or when the "1BB condition device" is working, but the symbol combination corresponding to "1BB" is not displayed stopped on the effective line, "1BB not working ”. That is, when "1BB" is not won, or when "1BB" is won but the symbol combination corresponding to "1BB" is not displayed stopped on the active line (inside 1BB), "1BB not activated It is time.

Also, as described above, in the present embodiment, "1BB" includes two types of "1BB-A" and "1BB-B", and "accessory condition device" includes "1BB-A condition device" and It has two types of "1BB-B condition device".
Furthermore, the winning combination of "1BB-A condition device" is set to "1BB-A", and the winning combination of "1BB-B condition device" is set to "1BB-B".

In addition, the "1BB-A condition device" draws only when two medals are inserted (when the number of medals bet is "2") in the non-internal medium, and when three medals are inserted (medal bet) When the number is "3"), the lottery is not performed. That is, in non-internal games, the "1BB-A condition device" is subject to the lottery when two medals are inserted, but is not subject to the lottery when three medals are inserted.
On the other hand, in the "1BB-B condition device", the lottery is performed only when 3 medals are inserted (when the number of medals bet is "3") in the non-internal medium, and when 2 medals are inserted (medal (when the number of bets is "2"), no lottery will be held. That is, in the non-internal game, the "1BB-B condition device" is subject to the lottery when three medals are inserted, but is not subject to the lottery when two medals are inserted.

Further, when the "1BB-A conditional device" is activated, the symbol combination corresponding to the winning combination "1BB-A" can be stopped and displayed on the active line (a prize can be won).
Furthermore, when the "1BB-A conditional device" is activated, if the symbol combination corresponding to "1BB-A" is stopped and displayed on the active line, "1BB-A winning" is displayed, and no medals are paid out in the game this time, but in the next game. From the game, it shifts to "1BB-A game" (when 1BB-A is activated).
On the other hand, if the symbol combination corresponding to "1BB-A" is not stop-displayed on the active line when the "1BB-A conditional device" is activated, the next game is shifted to "inside 1BB-A".
Then, in "1BB-A inside", when two medals are inserted, the symbol combination corresponding to "1BB-A" can be stopped and displayed on the active line (a prize can be won), but "1BB-A inside" When three medals are inserted, the symbol combination corresponding to "1BB-A" is not stopped and displayed on the active line.

Further, when the "1BB-B condition device" is activated, the symbol combination corresponding to the winning combination "1BB-B" can be stopped and displayed on the active line (a prize can be won).
Furthermore, when the "1BB-B condition device" is activated, if the symbol combination corresponding to "1BB-B" is stopped and displayed on the active line, "1BB-B wins", and no medals are paid out in this game, but next time. From the game, it shifts to "1BB-B game" (when 1BB-B is activated).
On the other hand, when the "1BB-B condition device" is activated, if the symbol combination corresponding to "1BB-B" is not stop-displayed on the active line, the game moves to "inside 1BB-B" from the next game.
In "1BB-B inside", when three medals are inserted, the symbol combination corresponding to "1BB-B" can be stopped and displayed on the active line (a prize can be won), but "1BB-B inside". When two medals are inserted, the symbol combination corresponding to "1BB-B" is not stopped and displayed on the active line.

Also, the "setting value" relates to the degree of advantage of the player, and in this embodiment, six levels of setting 1 to setting 6 are provided (not shown). The higher the set value, the higher the player's advantage.
Furthermore, when the setting key switch 152 is turned on while the power is off, and the power is turned on in this state, the setting change state (setting change mode) in which the set values can be changed is entered. At this time, initialization processing (RWM clear processing) for initializing a predetermined storage area of the RWM 53 is executed.
Further, when the setting key switch 152 is turned on while the power is on, the setting value cannot be changed, but the setting value can be confirmed (setting confirmation mode).

In addition, in the present embodiment, the start condition of the "advantageous section" is the lottery by the combination lottery means 61 in the non-advantageous section, and the winning number "1" (small combination A1 condition device) to the winning number "18" (replay condition device) is set to be elected (determined).
That is, in the non-advantageous section, if any of the winning number "1" (minor combination A1 condition device) to the winning number "18" (replay condition device) is won in the lottery by the combination lottery means 61, the transition to the advantageous section is made. .

In addition, in the present embodiment, the conditions for ending the "advantageous section" are that the difference counter value exceeds "2400 (D)" and that the advantageous section clear counter (the number of games played during the advantageous section) is "1500 (D)". ” or the end of the information game (AT).
That is, when the difference number in the advantageous section exceeds "2400", the number of games in the advantageous section reaches "1500", or the information game (AT) ends, the advantageous section ends and the non-advantageous section transition to

In addition, in this embodiment, the probability of winning any of the winning number "1" (small winning combination A1 condition device) to winning number "18" (replay condition device) in the lottery by the winning lottery means 61 in the non-internal is "50536/65536".
Therefore, even if the advantageous section ends and moves to the non-advantageous section, after that, in the "1" game to "2" game, the winning number "1" (minor combination A1 condition device) to the winning number "18" (replay If you win one of the condition devices), you will move to the advantageous section.

In addition, in the present embodiment, when winning (determined) any of the winning number "13" (small winning combination G condition device) to winning number "15" (small winning combination I condition device) in the lottery by the winning combination lottery means 61 , an AT lottery is executed. "Minor G condition device" to "Minor win I condition device" are set with a relatively low probability of being activated (winning), and are called "rare win" or "rare small win". . The AT lottery winning probability is set to "10"% when the "small combination G condition device" to "small combination I condition device" are activated.
Furthermore, when the AT lottery is won, the execution right of the information game is granted. Then, when the information game execution right is held and the conditions for starting the information game are satisfied, the information game is started.

In addition, in this embodiment, the initial value of the game number of the information game is set to "50" games. When the execution right of the information game is granted and the conditions for starting the information game are satisfied, the information game is executed over "50" games.
Furthermore, when the AT lottery is won in the case where the player already has the right to execute the information game, the number of rights to execute the information game is added (added). For example, when there are "2" information game execution rights, the information game can be executed over "(50 games + 50 games =) 100 games".

Furthermore, when the AT lottery is won during execution of the information game, the number of remaining games of the information game is added (added). For example, when winning the AT lottery when the number of remaining games of the information game is "20" games, the number of remaining games of the information game becomes "(20 games + 50 games =) 70 games".
In addition, the operation of the instruction function and the effect of suggesting the pressing order can be executed only in the advantageous section, and the operation of the instruction function and the effect of suggesting the pressing order cannot be executed in the non-advantageous section. Therefore, in the present embodiment, it is assumed that the operation of the instruction function and the performance suggesting the pressing order are performed in the advantageous section.

FIG. 2 is a diagram showing the pattern arrangement of the reels 31 in this embodiment.
As shown in FIG. 2, in this embodiment, each reel 31 consists of "20" frames. That is, each reel 31 has 20 symbols.
Moreover, in FIG. 2, the pattern number is also illustrated. For example, on the left reel 31, the symbol with symbol number "0" is "Blue 7".

Further, in this embodiment, the time from the moment when the operation of the stop switch 42 is detected until the reel 31 stops is set within "190" ms. As a result, the maximum number of moving symbols from the moment when the operation of the stop switch 42 is detected until the reels 31 are stopped becomes "4" symbols.
For example, when the left stop switch 42 is operated just before the "replay" numbered "1" on the left reel 31 passes through the activated line, the symbol is moved up to "4" symbols from the relevant symbol to "5". It is possible to stop on the effective line until the turn "Red 7".
Therefore, if "4" specific patterns are arranged at intervals of "5" patterns on one reel 31, the specific patterns can always be stopped on the effective line no matter when the stop switch 42 is operated.

Specifically, on the left reel 31, “Replay” is arranged at numbers “1”, “6”, “11” and “16”. That is, the "replay" on the left reel 31 is arranged with "5" symbol intervals of "4". Therefore, regardless of the timing at which the left stop switch 42 is operated for the left reel 31, "replay" can always be stopped on the active line.
In this way, the symbol arrangement that can always stop the target symbol on the active line regardless of the timing at which the stop switch 42 is operated is called the "PB=1" arrangement.
On the other hand, if the stop switch 42 is not operated at an appropriate timing (within the range of the maximum number of moving symbols from the effective line), the symbol arrangement in which the target symbol cannot be stopped on the effective line is "PB≠1". called.

On the left reel 31, in addition to "Replay", "Bell" and "Watermelon" are also arranged at "PB=1".
In addition, on the left reel 31, "Replay", "Bell" and "Watermelon" are arranged continuously (in order) at "4" locations. Specifically, on the left reel 31, "Replay", "Bell" and "Watermelon" are arranged consecutively on numbers "1" to "3", and also on numbers "6" to "8". They are arranged consecutively, arranged consecutively in numbers "11" to "13", and arranged consecutively in numbers "16" to "18".

Further, on the left reel 31, "0" number "blue 7", "5" number "red 7", "10" number "black BAR", and "15" number "white BAR" "4" symbol combination is "PB=1" arrangement. Therefore, at any timing when the left stop switch 42 is operated, any one of "blue 7", "red 7", "black BAR" or "white BAR" of the left reel 31 can be stopped on the effective line. .

Similarly, on the left reel 31, "4", "9" and "14" "Cherry" and "19" "Blank" are "PB=1" in total of these "4" symbols. Placement. Therefore, "Cherry" or "Blank" on the left reel 31 can be stopped on the effective line at any timing when the left stop switch 42 is operated.

Further, on the left reel 31, "cherry/blank" is arranged on "watermelon", "blue 7/red 7/black BAR/white BAR" is arranged on "cherry/blank", and "blue 7" is arranged on "cherry/blank". /Red 7/Black BAR/White BAR' is placed above 'Replay'. That is, on the left reel 31, "Cherry/Blank" and "Blue 7/Red 7/Black BAR/White BAR" are arranged between "Watermelon" and "Replay".
As a result, on the left reel 31, "blue 7/red 7/black BAR/white BAR", "replay", "bell", "watermelon" and "cherry/blank" are continuously arranged at "4" locations ( sequentially). Specifically, on the left reel 31, “blue 7/red 7/black BAR/white BAR”, “replay”, “bell”, “watermelon” and “cherry/blank” are assigned numbers “0” to “4”. ”, arranged consecutively in numbers “5” to “9”, arranged consecutively in numbers “10” to “14”, and in numbers “15” to "19" are also arranged continuously.

In addition, on the middle reel 31, "Cherry", "Bell", "Replay" and "Watermelon" are arranged at "PB=1".
Furthermore, on the middle reel 31, "Cherry", "Bell", "Replay" and "Watermelon" are continuously arranged at "4" locations. Specifically, on the middle reel 31, "Cherry", "Bell", "Replay" and "Watermelon" are arranged in succession from "0" to "3", and "5" to "8". ”, ”10” to ”13”, and ”15” to ”18”.

Further, on the middle reel 31, the “blue 7” of number “4”, the “red 7” of number “9”, the “black BAR” of number “14”, and the “white BAR” of number “19” are "4" symbol combination is "PB=1" arrangement. Therefore, no matter what timing the middle stop switch 42 is operated, any one of "blue 7", "red 7", "black BAR" or "white BAR" of the middle reel 31 can be stopped on the effective line. .

In the middle reel 31, "blue 7/red 7/black BAR/white BAR" is arranged between "watermelon" and "cherry" (above "watermelon" and below "cherry"). .
As a result, "Cherry", "Bell", "Replay", "Watermelon" and "Blue 7/Red 7/Black BAR/White BAR" are continuously (in order) at "4" locations on the middle reel 31. are placed. Specifically, on the middle reel 31, "Cherry", "Bell", "Replay", "Watermelon" and "Blue 7/Red 7/Black BAR/White BAR" are numbered "0" to "4". are placed continuously (in order) in numbers 5 to 9, 10 to 14 are also placed in succession, and 15 to . 19" are also arranged continuously.

Also, on the right reel 31, "Replay", "Bell", "Watermelon" and "Cherry" are arranged in "PB=1".
Furthermore, on the right reel 31, "Replay", "Bell", "Watermelon" and "Cherry" are arranged continuously (in order) at "4" locations. Specifically, on the right reel 31, "Replay", "Bell", "Watermelon" and "Cherry" are arranged consecutively (in order) in the numbers "19", "0" to "2". , Numbers 4 to 7 are arranged consecutively, Numbers 9 to 12 are arranged consecutively, and Numbers 14 to 17 are arranged consecutively. It is

Further, on the right reel 31, "3" "blue 7", "8" "red 7", "13" "black BAR", and "18" "white BAR" "4" symbol combination is "PB=1" arrangement. Therefore, no matter what timing the middle stop switch 42 is operated, any one of "blue 7", "red 7", "black BAR" or "white BAR" of the right reel 31 can be stopped on the effective line. .

Also, on the right reel 31, "blue 7/red 7/black BAR/white BAR" is arranged between "Cherry" and "Replay" (above "Cherry" and below "Replay"). .
As a result, on the right reel 31, "replay", "bell", "watermelon", "cherry" and "blue 7/red 7/black BAR/white BAR" are continuously (in order) at "4" locations. are placed. Specifically, on the right reel 31, "replay", "bell", "watermelon", "cherry" and "blue 7/red 7/black BAR/white BAR" are assigned numbers "19" and "0". ~ "3" consecutively (in order), "4" to "8" consecutively arranged, "9" to "13" consecutively arranged, " 14” to “18” are also arranged continuously.

FIG. 3A is a diagram showing the display window 18, the positional relationship of each reel 31, and effective lines (display lines for displaying symbol combinations).
A reel 31 arranged inside can be seen through the display window 18 .
In this embodiment, "3" reels 31 (left reel 31, middle reel 31, and right reel 31) are provided in parallel in the horizontal direction. Further, each reel 31 is arranged so that "3" consecutive symbols can be seen from the display window 18. - 特許庁
As a result, when each reel 31 is stopped, the consecutive "3" symbols of each reel 31 appear to be stopped and displayed in the upper, middle and lower stages of the display window 18, respectively. Therefore, when all the reels 31 are stopped, a total of "9" symbols (frames) can be seen from the display window 18. - 特許庁
In addition, in FIG. 3(A), the number at the bottom right of each pattern indicates the pattern number.

FIG. 3(B) shows designations of symbol positions in this embodiment.
The positions of the "3" symbols stopped and displayed in the display window 18 when each reel 31 is stopped are called "upper stage", "middle stage", and "lower stage" in order from the top. Furthermore, the positions of the "3" symbols that are stopped and displayed in the display window 18 when the left reel 31 is stopped are referred to as "upper left", "middle left", and "lower left" in order from the top. Similarly, the positions of the “3” symbols that are stopped and displayed in the display window 18 when the middle reel 31 is stopped are called “middle upper row”, “middle middle row”, and “middle lower row” in order from the top. The positions of the "3" symbols to be stopped and displayed in the display window 18 when stopped are called "upper right row", "right middle row", and "lower right row" in order from the top.

Also, as shown in FIG. 3(A), effective lines are set for "9" symbols visible from the display window 18 .
Here, the "effective line" is a line of symbols arranged when the reels 31 are stopped and is a symbol combination line (display line) for forming a symbol combination, and a symbol combination corresponding to any combination is This is the line where the player wins the prize when the player stops on that line.
Furthermore, "invalid line" refers to a symbol combination line that is not set as an active line and is not subject to establishment of a symbol combination.
The valid line in this embodiment is a straight line passing through "left middle" - "middle middle" - "right middle", as shown in FIG. "Middle Line" only, and other lines are invalid lines.

For example, a straight "upper line" passing through "upper left" - "middle upper" - "upper right", a straight "lower line" passing through "lower left" - "middle lower" - "lower right", A straight "downward right line" passing through "upper left" - "middle middle" - "lower right", a straight "upward right line" passing through "lower left" - "middle middle" - "upper right", A small chevron-shaped "small mountain line" passing through "lower left" - "middle middle" - "lower right", a small V-shaped "small V line" passing through "upper left" - "middle middle" - "upper right", In this embodiment, all of the “curved lines” passing through the “upper left”-“middle middle”-“right middle” are invalid lines.

A valid line and an invalid line are collectively called a "symbol combination line".
The position and number of activated lines may be changed for each gaming state or the number of bets. For example, in a specific gaming state, the downward-sloping line may be the active line. Also, for a specific number of bets, a plurality of active lines ("5" lines, ie, an upper line, a middle line, a lower line, an upward-sloping line, and a downward-sloping line) may be used.

FIG. 4 and FIG. 5 are diagrams showing the types of combinations (such as combinations corresponding to winning numbers drawn by the combination lottery means 61), symbol combinations, the number of payouts, and the like in this embodiment.
The roles are roughly divided into special roles, replays (replay roles), and minor roles.
Then, the combination of symbols corresponding to each winning combination, the number of payouts at the time of winning, etc. are determined. When all the reels 31 are stopped and the combination of symbols corresponding to one of the combinations stops on the active line (the winning combination is won), the number of medals corresponding to the combination is paid out (dividend (profit) is awarded). ).
However, the payout number at the time of winning the special combination is set to "0". Also, in the replay, medals are automatically inserted, and a replay can be executed.

As shown in FIGS. 4 and 5, the game states of the present embodiment are non-internal, 1BB internal (1BB-A internal, 1BB-B internal), and 1BB in-game (1BB-A in-game). , 1BB-B in game). Also, during non-inside, lottery is available when 2 medals are inserted (when the number of medals bet is "2") and when 3 medals are inserted (when the number of medals bet is "3"). is different.
In FIGS. 4 and 5, "two" indicates "when two medals are inserted", and "three" indicates "when three medals are inserted". In addition, "inside" means "inside 1BB (inside 1BB-A and inside 1BB-B)", and "inside 1BB" means "during 1BB play (during 1BB-A play and 1BB- B during game)” is shown.

The winning combination numbers “1” to “82” shown in FIGS. 4 and 5 correspond to minor winning combinations. In the present embodiment, there are "82" types of small wins from "small win 01" to "small win 82".
As shown in FIGS. 4 and 5, "small win 01" to "small win 82" are played when two non-internal medals are inserted, when three non-internal medals are inserted, during 1BB internal and 1BB games. Any one of them is subject to a lottery, and the corresponding symbol combination can be stopped and displayed (winning) on the active line.

Also, as shown in FIG. 4, "small win 01" to "small win 06" are when two medals are inserted in non-internal mode, when three medals are in non-internal mode, during 1BB internal mode, and during 1BB game. , the number of medals to be paid out (the number of medals to be awarded) at the time of winning is set to "10".
Furthermore, as shown in FIGS. 4 and 5, "small win 07" to "small win 78" are when two non-internal medals are inserted, when three non-internal medals are inserted, during 1BB internal, In both the 1BB game and the 1BB game, the number of medals to be paid out (the number of medals to be awarded) at the time of winning is set to "1".
Furthermore, as shown in FIG. 5, "minor win 79" to "minor win 82" are when two medals are inserted in non-internal mode, when three medals are in non-internal mode, during 1BB internal mode, and during 1BB game. 3, the number of medals to be paid out (the number of medals to be given) at the time of winning is set to "3".

The symbol combination corresponding to the "small winning combination 01" is only one combination number "1", and the symbols on the respective reels 31 are arranged "PB=1". That is, in the symbol combination corresponding to the "small winning combination 01", the symbols on all the "3" reels 31 are arranged in the "PB=1" arrangement (regardless of the operation timing of the stop switch 42, the symbols are always stopped on the effective line). displayable) symbol combination.
Further, as shown in FIG. 19(1), which will be described later, when the symbol combination corresponding to the "small winning combination 01" is stopped and displayed on the "middle line" (effective line) (when the "small winning combination 01" is won), , ``Bell'' - ``Bell'' - ``Bell'' is stopped and displayed on the ``lower right line'' (invalid line) passing through ``upper left row'', ``middle middle row'', and ``lower right row''.

The symbol combination corresponding to the "small winning combination 02" is only one combination number "2", and the symbol combination corresponding to the "small winning combination 03" is only one combination number "3". Also, the symbol combination corresponding to the "small winning combination 04" is only one combination number "4", and the symbol combination corresponding to the "small winning combination 05" is only one combination number "5". Furthermore, the symbol combination corresponding to the "small winning combination 06" is only one kind of winning combination number "6".
Further, in the symbol combinations corresponding to the "small winning combination 02" to "small winning combination 06", the symbols on each reel 31 are arranged in the same manner as the "small winning combination 01", respectively, of "PB=1". That is, all of the symbol combinations corresponding to "small winning combination 02" to "small winning combination 06" are arranged such that all "three" symbols on reels 31 are arranged at "PB=1", similar to "small winning combination 01". It is a symbol combination consisting of the symbols that are formed.

Further, as shown in FIG. 19(2), which will be described later, when the symbol combination corresponding to the "small combination 02" is stopped and displayed on the "middle line" (effective line) (when the "small combination 02" is won), , ``Bell'' - ``Bell'' - ``Bell'' are stopped and displayed on the ``upper line'' (invalid line) passing through ``upper left row'' - ``middle upper row'' - ``upper right row''.
Furthermore, as shown in FIG. 19(3), which will be described later, the symbol combination corresponding to the "small winning combination 03" is "bell"-"bell"-"bell", and when the "small winning combination 03" wins, "Bell" - "Bell" - "Bell" is stopped and displayed on the "middle line" (effective line).
Furthermore, as shown in FIG. 20(1), which will be described later, when the symbol combination corresponding to the "small combination 04" is stopped and displayed on the "middle line" (effective line) (when the "small combination 04" is won), , ``Bell'' - ``Bell'' - ``Bell'' is stopped and displayed on the ``Right rising line'' (invalid line) passing through ``Lower left row'', ``Middle middle row'', and ``Upper right row''.

Further, as shown in FIG. 20(2), which will be described later, when the symbol combination corresponding to the "small winning combination 05" is stopped and displayed on the "middle line" (effective line) (when the "small winning combination 05" is won), , ``Bell'' - ``Bell'' - ``Bell'' is stopped and displayed on the ``Mountain line'' (invalid line) passing through ``Lower left row'', ``Middle middle row'', and ``Lower right row''.
Furthermore, as shown in FIG. 20(3), which will be described later, when the symbol combination corresponding to the "small winning combination 06" is stopped and displayed on the "middle line" (effective line) (when the "small winning combination 06" is won), 'Bell' - 'Bell' - 'Bell' is stopped and displayed on the 'lower line' (invalid line) passing through 'lower left line' - 'middle lower line' - 'lower right line'.

The symbol combination corresponding to the "small winning combination 07" is only one kind of winning combination number "7", and the symbols on the left reel 31 and the right reel 31 are respectively arranged "PB=1", but the middle reel 31 The pattern of is arranged "PB≠1".
That is, the symbol combination corresponding to the "small win 07" has the symbols of "2" reels 31 (the left reel 31 and the right reel 31) arranged in a "PB=1" arrangement (operation timing of the stop switch 42 is The symbols on the other "1" reels 31 (middle reels 31) are "PB ≠ 1" (the operation of the stop switch 42 is It is a symbol combination consisting of symbols that are stopped and displayed on the active line according to the timing and when not stopped.

The symbol combination corresponding to the "small win 08" is only one combination of the win number "8", and the symbol combination corresponding to the "small win 09" is only one combination of the win number "9". The symbol combination corresponding to the winning combination "10" is only one kind of winning combination number "10".
Further, the symbol combinations corresponding to the "small winning combination 08" to "small winning combination 10" are all arranged such that the symbols on the left reel 31 and the right reel 31 are arranged at "PB=1", similarly to the "small winning combination 07". However, the symbols on the middle reel 31 are arranged "PB≠1".
That is, all of the symbol combinations corresponding to "small winning combination 08" to "small winning combination 10" are symbols of "2" reels 31 (left reel 31 and right reel 31), similar to "small winning combination 07". is a symbol combination in which "PB=1" is arranged and the symbols on the other "1" reels 31 (middle reels 31) are arranged in "PB≠1". .

The symbol combination corresponding to the "small winning combination 11" is only one kind of winning combination number "11", and the symbols on the left reel 31 and the middle reel 31 are respectively arranged "PB=1", but the right reel 31 The pattern of is arranged "PB≠1".
That is, the symbol combination corresponding to the "small winning combination 11" consists of symbols in which the symbols of the "2" reels 31 (the left reel 31 and the middle reel 31) are arranged in a "PB=1" arrangement, and other symbols. It is a symbol combination consisting of symbols arranged in a “PB≠1” arrangement for “1” reels 31 (right reels 31).

The symbol combination corresponding to the "small win 12" is only one combination of the win number "12", and the symbol combination corresponding to the "small win 13" is only one combination of the win number "13". The symbol combination corresponding to the winning combination "14" is only one kind of winning combination number "14".
Further, the symbol combinations corresponding to the "small winning combination 12" to "small winning combination 14" are all arranged such that the symbols on the left reel 31 and the middle reel 31 are arranged at "PB=1", similarly to the "small winning combination 11". However, the symbols on the right reel 31 are arranged "PB≠1".
That is, all of the symbol combinations corresponding to the "small winning combination 12" to "small winning combination 14" are the symbols of the "2" reels 31 (the left reel 31 and the middle reel 31), similarly to the "small winning combination 11". is a symbol combination in which "PB=1" is arranged and the symbols on the other "1" reel 31 (right reel 31) are in "PB≠1" arrangement. .

The symbol combination corresponding to the "small winning combination 15" is only one kind of combination number "15", and the symbols on the middle reel 31 and the right reel 31 are respectively arranged "PB=1", but the left reel 31 The pattern of is arranged "PB≠1".
That is, the symbol combination corresponding to the "small win 15" consists of symbols in which the symbols of the "2" reels 31 (the middle reel 31 and the right reel 31) are arranged in a "PB=1" arrangement, and other symbols. It is a symbol combination consisting of symbols arranged in a “PB≠1” arrangement for “1” reels 31 (left reel 31).

The symbol combination corresponding to the "small win 16" is only one combination of the win number "16", and the symbol combination corresponding to the "small win 17" is only one combination of the win number "17". The symbol combination corresponding to the winning combination "18" is only one kind of combination number "18".
Further, the symbol combinations corresponding to the "small winning combination 16" to "small winning combination 18" are all arranged such that the symbols of the middle reel 31 and the right reel 31 are arranged at "PB=1", similarly to the "small winning combination 15". However, the symbols on the left reel 31 are arranged "PB≠1".
That is, all of the symbol combinations corresponding to the "small winning combination 16" to "small winning combination 18" are the symbols of "2" reels 31 (the middle reel 31 and the right reel 31), similar to the "small winning combination 15". is a symbol combination in which "PB=1" is arranged, and the symbols on the other "1" reel 31 (left reel 31) are in "PB≠1" arrangement. .

The symbol combination corresponding to the "small winning combination 19" is only one combination number "11", and the symbol combination corresponding to the "small winning combination 20" is only one combination number "20". Further, the symbol combination corresponding to the "small winning combination 21" is only one combination number "21", and the symbol combination corresponding to the "small winning combination 22" is only one combination number "22".
The symbol combinations corresponding to “small win 19” to “small win 22” are all similar to “small win 11” to “small win 14”, and the symbols on the left reel 31 and middle reel 31 are respectively “PB= 1” arrangement, but the symbols on the right reel 31 are arranged in a “PB≠1” arrangement.
That is, the symbol combinations corresponding to "small win 19" to "small win 22" are all "2" reels 31 (left reel 31 and The symbols on the middle reel 31) consist of symbols arranged in a "PB=1" arrangement, and the symbols on the other "1" reel 31 (right reel 31) are arranged in a "PB≠1" arrangement. It is a symbol combination consisting of.

The symbol combination corresponding to the "small winning combination 23" is only one combination number "23", and the symbol combination corresponding to the "small winning combination 24" is only one combination number "24". Further, the symbol combination corresponding to the "small winning combination 25" is only one combination number "25", and the symbol combination corresponding to the "small winning combination 26" is only one combination number "26".
The symbol combinations corresponding to "small win 23" to "small win 26" are all similar to "small win 15" to "small win 18", and the symbols on the middle reel 31 and right reel 31 are respectively "PB= 1” arrangement, but the symbols on the left reel 31 are arranged in a “PB≠1” arrangement.
That is, the symbol combinations corresponding to "small winning combination 23" to "small winning combination 26" are all similar to "small winning combination 15" to "small winning combination 18", and "2" reels 31 (middle reel 31 The symbols on the right reel 31) consist of symbols arranged in a "PB=1" arrangement, and the symbols on the other "1" reel 31 (left reel 31) are arranged in a "PB≠1" arrangement. It is a symbol combination consisting of.

The symbol combination corresponding to the "small winning combination 27" is only one combination number "27", and the symbol combination corresponding to the "small winning combination 28" is only one combination number "28". Further, the symbol combination corresponding to the "small winning combination 29" is only one combination number "29", and the symbol combination corresponding to the "small winning combination 30" is only one combination number "30".
The symbol combinations corresponding to "small winning combination 27" to "small winning combination 30" are all similar to "small winning combination 07" to "small winning combination 10", and the symbols on the left reel 31 and right reel 31 are respectively "PB= 1” arrangement, but the symbols on the middle reel 31 are arranged in a “PB≠1” arrangement.
That is, the symbol combinations corresponding to "small winning combination 27" to "small winning combination 30" are all similar to "small winning combination 07" to "small winning combination 10", "2" reels 31 (left reel 31 and The symbols on the right reel 31) consist of symbols arranged in a "PB=1" arrangement, and the symbols on the other "1" reels 31 (middle reel 31) are arranged in a "PB≠1" arrangement. It is a symbol combination consisting of.

The symbol combination corresponding to the "small winning combination 31" is only one kind of winning combination number "31". The patterns are arranged "PB≠1".
That is, the symbol combination corresponding to the "small win 31" consists of "1" reels 31 (middle reels 31) of which the symbols are arranged in a "PB=1" arrangement, and the other "2" symbols. The symbols on the reels 31 (the left reel 31 and the right reel 31) are arranged in a pattern of "PB≠1".

The symbol combinations corresponding to the "small winning combination 32" to "small winning combination 46" are only one kind each of the winning combination numbers "32" to "46".
In addition, in the symbol combinations corresponding to the "small winning combination 32" to "small winning combination 46", the symbols on the middle reel 31 are "PB=1" as in the case of the "small winning combination 31". The symbols of the left reel 31 and the right reel 31 are respectively arranged "PB≠1".
That is, all of the symbol combinations corresponding to the "small winning combination 32" to "small winning combination 46" are similar to the "small winning combination 31", and the symbols on the "1" reels 31 (middle reels 31) are "PB= 1” arrangement and the symbols on the other “2” reels 31 (the left reel 31 and the right reel 31) are arranged in the “PB≠1” arrangement. .

The symbol combination corresponding to the "small winning combination 47" is only one kind of winning combination number "47", and the symbols on the right reel 31 are arranged at "PB=1". The symbols are arranged in a "PB≠1" arrangement.
That is, the symbol combination corresponding to the "small winning combination 47" consists of "1" reel 31 (right reel 31) symbols arranged in a "PB=1" arrangement, and the other "2" symbols. The symbols on the reels 31 (the left reel 31 and the middle reel 31) are arranged such that "PB≠1".

The symbol combinations corresponding to the "small winning combination 48" to "small winning combination 62" are only one kind each of the winning combination numbers "48" to "62".
In addition, the symbol combinations corresponding to the "small winning combination 48" to "small winning combination 62" all have the symbol "PB=1" on the right reel 31 as in the case of the "small winning combination 47". The symbols of the left reel 31 and the middle reel 31 are respectively arranged in a "PB≠1" arrangement.
That is, all of the symbol combinations corresponding to the "small winning combination 48" to "small winning combination 62" are similar to the "small winning combination 47", and the symbols on the "1" reel 31 (right reel 31) are "PB= 1” arrangement and the symbols on the other “2” reels 31 (the left reel 31 and the middle reel 31) are arranged in the “PB≠1” arrangement. .

The symbol combination corresponding to the "minor winning combination 63" is only one kind of winning combination number "63", and the symbols on the left reel 31 are arranged at "PB=1", but the symbols on the middle reel 31 and the right reel 31 are arranged at "PB=1". The patterns are arranged "PB≠1".
That is, the symbol combination corresponding to the "minor win 63" consists of symbols in which the symbols on the "1" reel 31 (left reel 31) are arranged in a "PB=1" arrangement, and the other "2" symbols. The symbols on the reels 31 (the middle reel 31 and the right reel 31) are arranged in a pattern of "PB≠1".

The symbol combinations corresponding to the “minor win 64” to “minor win 78” are only one type each of the win numbers “64” to “78”.
In addition, all of the symbol combinations corresponding to the "small winning combination 64" to "small winning combination 78" have the symbols on the left reel 31 arranged at "PB=1", like the "small winning combination 63". The symbols of the middle reel 31 and the right reel 31 are respectively arranged "PB≠1".
That is, all of the symbol combinations corresponding to the “small winning combination 64” to “small winning combination 78” are similar to the “small winning combination 63”, and the symbols on the “1” reel 31 (left reel 31) are “PB= 1” arrangement, and the symbols on the other “2” reels 31 (middle reel 31 and right reel 31) are arranged in a “PB≠1” arrangement. .

The symbol combination corresponding to the "small winning combination 79" is only one kind of combination number "79", and the symbols on the middle reel 31 and the right reel 31 are respectively arranged "PB=1", but the left reel 31 The pattern of is arranged "PB≠1".
That is, the symbol combination corresponding to the "minor win 79" consists of symbols in which the symbols of the "2" reels 31 (the middle reel 31 and the right reel 31) are arranged in a "PB=1" arrangement, and other symbols. It is a symbol combination consisting of symbols arranged in a “PB≠1” arrangement for “1” reels 31 (left reel 31).
In addition, when the symbol combination corresponding to "small combination 79" is stopped on the effective line (middle line) (when "small combination 79" is won), "lower left" - "middle middle" - "upper right""CHERRY" - "CHERRY" - "CHERRY" is stopped and displayed on the "right rising line" (invalid line) passing through ".

The symbol combination corresponding to the "small winning combination 80" is only one kind of combination number "80", and the symbols of the middle reel 31 and the right reel 31 are respectively arranged "PB=1", similar to the "small winning combination 79". However, the symbols on the left reel 31 are arranged "PB≠1".
That is, the symbol combination corresponding to the "small winning combination 80" has the symbols of "2" reels 31 (the middle reel 31 and the right reel 31) arranged at "PB=1" in the same way as the "small winning combination 79". The symbol combination is composed of symbols on the other “1” reel 31 (left reel 31) arranged in a “PB≠1” arrangement.
Further, when the symbol combination corresponding to the "small combination 80" is stopped and displayed on the active line (middle line) (when the "small combination 80" is won), the "lower left row" is displayed in the same way as the "small combination 79". - "Cherry" - "Cherry" - "Cherry" are stopped and displayed on the "right rising line" (invalid line) passing through the "middle middle row" - "upper right row".

The symbol combination corresponding to the "small winning combination 81" is only one combination number "81". The pattern of is arranged "PB≠1".
That is, the symbol combination corresponding to the "small winning combination 81" consists of symbols in which the symbols of the "2" reels 31 (the middle reel 31 and the right reel 31) are arranged in a "PB=1" arrangement, and other symbols. It is a symbol combination consisting of symbols arranged in a “PB≠1” arrangement for “1” reels 31 (left reel 31).
In addition, the symbol combination corresponding to the "small winning combination 81" is "cherry" - "cherry" - "cherry", and when the "small winning combination 81" is won, "cherry" - "Cherry" - "Cherry" stops displaying.

The symbol combination corresponding to the "small winning combination 82" is only one combination number "82", and the symbols on the respective reels 31 are arranged "PB=1".
That is, the symbol combination corresponding to the "small win 82" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement.
Also, the symbol combination corresponding to the "small winning combination 82" is "watermelon"-"watermelon"-"watermelon", and when the "small winning combination 82" is won, "watermelon"-- "Watermelon" - "Watermelon" stops displaying.

The symbol combination corresponding to the "replay" is only one kind of combination number "83", and the symbols on each reel 31 are arranged "PB=1".
That is, the symbol combination corresponding to "Replay" is a symbol combination in which the symbols of all the "3" reels 31 are in the "PB=1" arrangement.
Also, the symbol combination corresponding to "Replay" is "Replay" - "Replay" - "Replay", and when "Replay" wins, "Replay" - "Replay" - "Replay" stops displaying.

As shown in FIG. 5, "Replay" is a lottery target when two medals are inserted in non-internal medium, when three medals are inserted in non-internal medium, and in 1BB internal, and the corresponding symbol combination is on the effective line. Although it is possible to stop display (win a prize), it is not subject to a lottery during the 1BB game, and therefore the corresponding symbol combination is not stopped displayed (win a prize) on the active line.
Also, when the symbol combination corresponding to "replay" is stopped and displayed (winning), medals are automatically inserted, and a replay can be executed.

The combination numbers "84" and "85" shown in FIG. 5 correspond to special awards (accessories). In this embodiment, there are two types of special roles, "1BB-A" and "1BB-B".
As shown in FIG. 5, "1BB-A" is subject to the lottery only when two medals are inserted, and is not subject to the lottery when three medals are inserted. On the other hand, "1BB-B" is a lottery target only when three medals are inserted, and is not subject to a lottery when two medals are inserted.

Also, the symbol combination corresponding to "1BB-A" is only one combination number "84", and the symbol on the right reel 31 is "PB=1", but the left reel 31 and the middle reel are arranged. Each of the 31 symbols is arranged "PB≠1".
As described above, in this embodiment, the winning combination of the "1BB-A conditional device" is set to "1BB-A", and when the "1BB-A conditional device" is operated, the winning combination of "1BB The symbol combination corresponding to "-A" can be stopped and displayed on the active line (a prize can be won).

Then, when the "1BB-A conditional device" is activated, if the symbol combination corresponding to "1BB-A" is stopped and displayed on the active line, "1BB-A wins" and no medals are paid out in the game this time, but in the next game. Shift from game to "1BB-A game".
On the other hand, when the "1BB-A condition device" is activated, if the symbol combination corresponding to "1BB-A" is not stop-displayed on the active line, the game moves to "inside 1BB-A" from the next game.

In addition, in this embodiment, when two medals are inserted in the non-inside, the "1BB-A condition device" can be operated independently (single winning), and in the game in which the "1BB-A condition device" operates alone, " The symbol combination corresponding to "1BB-A" can be stopped and displayed on the active line, but in the game in which the "1BB-A conditional device" operates alone, the symbol combination corresponding to "1BB-A" is stopped on the active line. If it is not displayed, the game shifts to "inside 1BB-A" from the next game.
In addition, when two medals of "inside 1BB-A" are inserted and the combination lottery means 61 does not win, the symbol combination corresponding to "1BB-A" can be stopped and displayed on the active line, but in this embodiment. Since there is no possibility of non-winning in the role lottery means 61 during ``inside 1BB-A'', once the game shifts to ``inside 1BB-A'', thereafter the symbol combination corresponding to ``1BB-A'' is an effective line. never appear to stop.

In addition, the symbol combination corresponding to "1BB-B" is only one combination number "85", and the symbols on the right reel 31 are arranged "PB=1" as in "1BB-A". However, the symbols on the left reel 31 and the middle reel 31 are arranged in a "PB≠1" arrangement.
As described above, in this embodiment, the winning combination of the "1BB-B condition device" is set to "1BB-B", and when the "1BB-B condition device" is activated, the winning combination of "1BB The symbol combination corresponding to "-B" can be stopped and displayed on the active line (a prize can be won).

When the symbol combination corresponding to ``1BB-B'' is stopped and displayed on the active line when the ``1BB-B condition device'' is activated, ``1BB-B wins'' and no medals are paid out in the game this time, but in the next game. Shift from game to "1BB-B game".
On the other hand, if the symbol combination corresponding to "1BB-B" is not stop-displayed on the active line when the "1BB-B conditional device" is activated, the next game is shifted to "inside 1BB-B".

In addition, in this embodiment, when three medals are inserted in the non-inside, the "1BB-B condition device" can be operated independently (single winning), and in the game in which the "1BB-B condition device" is operated alone, " The symbol combination corresponding to "1BB-B" can be stopped and displayed on the active line, but the symbol combination corresponding to "1BB-B" is stopped on the active line in the game in which the "1BB-B conditional device" operates alone. If it is not displayed, the game shifts to "inside 1BB-B" from the next game.
In addition, when three medals of "1BB-B inside" are inserted, if the combination lottery means 61 does not win, the symbol combination corresponding to "1BB-B" can be stopped and displayed on the active line, but in this embodiment. Since there is no non-winning in the combination lottery means 61 during ``inside 1BB-B'', once it shifts to ``inside 1BB-B'', after that the symbol combination corresponding to ``1BB-B'' is the valid line. never appear to stop.

In each of the above-mentioned roles, when the combination of symbols corresponding to the winning role is not stop-displayed on the active line in the game in which the role is won, the role to be carried over from the next game onwards and the role not to be carried over are determined. .
The hand carried over is 1BB (“1BB-A” and “1BB-B”) in this embodiment. In this embodiment, the symbol combination corresponding to 1BB is all set to "PB≠1", so even if 1BB is won, the symbol combination corresponding to 1BB will not stop displayed on the activated line (1BB is may not win). When 1BB is won, the winning information of 1BB is carried over to the next game and thereafter until 1BB is won.

On the other hand, when a small winning combination or replay is won, the winning combination is valid only in the current game, and the winning information is not carried over to the next game or later. That is, in the game in which the winning combination is won, the reels 31 are stopped and controlled so that the symbol combination corresponding to the winning combination can be stopped and displayed on the activated line. Regardless of whether the winning combination is stopped or not, the right to the winning combination will be extinguished at the end of the game.

6 to 9 are diagrams showing the condition device in this embodiment.
6 to 8 show a small win and replay condition device in this embodiment.
6 and 7, "push order 123" indicates the push order of "left center right", and "push order 132" indicates the push order of "left right center". Further, the "push order 213" indicates the push order of "middle left and right", and the "push order 231" indicates the push order of "middle right left". Furthermore, the "push order 312" indicates the push order of "right, left, middle", and the "push order 321" indicates the push order of "right, middle, left".

As shown in FIGS. 6 to 8, the small winning combination condition device corresponds to the small winning combination and replay condition device number "17" from the "small winning combination A1 condition device" corresponding to the small winning combination and replay condition device number "1". It has 17 types up to "small win ALL condition device".
In addition, "small win A1 condition device" to "small win I condition device" are subject to lottery when 2 medals are inserted in non-internal, when 3 medals are inserted in non-internal, and during 1BB internal ( A lottery is performed), but it is not subject to lottery during 1BB game (lottery is not performed).

Furthermore, the "single hand ALL condition device" is subject to a lottery when two medals are inserted during non-internal, when three medals are inserted during non-internal, during 1BB internal, and during 1BB game ( lottery will be held).
In addition, the "small win ALL condition device" is not subject to lottery (lottery is not performed) when 2 medals are inserted during non-internal, when 3 medals are inserted during non-internal, and during 1BB internal. A lottery is applied only during 1BB game (a lottery is performed).

Here, the following method can be used as the stop control of the reels 31 when multiple types of small wins with different payout numbers of medals are won.
As a first priority, when all the symbols (of the relevant reel 31) constituting the winning symbol combination can be stopped and displayed on the active line, the reel 31 is stopped at that position.
Next, when it is not possible to stop and display all the symbols that make up the winning symbol combination on the active line (when the first priority cannot be adopted), as the second priority, "number of sheets priority" or The reel 31 is controlled to be stopped by one of the "number priority".

In addition, "preferred number of medals" means that the symbol of the reel 31 constituting the symbol combination with the largest number of medals to be paid out among the symbol combinations of multiple winning combinations is preferentially stopped and displayed on the active line (pulled in). ).
On the other hand, "quantity priority" means that the symbol of the relevant reel 31 is preferentially stopped and displayed on the activated line so that the number of combinations of symbols that can be stopped and displayed on the activated line is maximized.

In this embodiment, when the "minor win A1 condition device" to "minor win F2 condition device" are activated, multiple types of minor wins (bells) with different payout numbers of medals are repeatedly won (so-called "push order bell") state).
When the pressing order bell is won, the reels 31 are controlled to be stopped with priority given to the number of balls when the pressing order is correct, and the reels 31 are controlled to be stopped with priority given to the number when the pressing order is incorrect.
As a result, when the bell is won by pressing the bell, the type of winning small combination (combination of symbols stopped and displayed on the effective line) differs depending on the pressing order of the stop switch 42, thereby affecting the game result (the number of medals to be paid out). There will be advantages/disadvantages.

The "minor combination A1 condition device" includes 7 types of winning combinations described in the winning combination column in FIG.
When the winning number "1" is won in the lottery by the winning combination lottery means 61, a small winning combination and replay condition device number "1" are generated from this winning number "1". Then, the "small win A1 condition device" corresponding to the small win and replay condition device number "1" is activated.
Also, when the "minor combination A1 condition device" is activated, a state is entered in which 7 types of minor combinations described in the winning combination column of FIG. 6 are repeatedly won.

Furthermore, when the "small combination A1 condition device" is activated, the pressing order of "left, middle, right (123)" is the correct pressing order, and the other pressing order is the incorrect pressing order.
Then, when the stop switch 42 is operated in the pressing order of "left, center, right (123)" when the "small win A1 condition device" is activated, the number priority is given to "1/1" (always) with a probability of " The reels 31 are stopped and controlled so that the symbol combination (PB=1) corresponding to the "small winning combination 01" (10 coins paid out) is stopped and displayed on the active line.

Specifically, as shown in FIG. 14, which will be described later, when the "small win A1 condition device" is activated, when the left first stop, the "replay" (PB=1) of the left reel 31 is given priority to the left middle row. When the middle second stop, "Bell" (PB=1) of the middle reel 31 is stopped and displayed in the middle middle row, and when the right third stop, "Watermelon" (PB=1) of the right reel 31 is stopped and displayed. A stop display is displayed in the right middle row. As a result, the symbol combination corresponding to "small win 01" with "PB=1" can be stopped and displayed on the active line.

In this way, when the left reel 31 is stopped first and the middle reel 31 is stopped second when the "small win A1 condition device" is activated, the "small win A1 condition device" is achieved by giving priority to the number of reels. A symbol combination corresponding to a 'small win 01' to pay out '10', which is the maximum number of medals to be paid out, is stopped and displayed on the effective line.
As shown in FIG. 19(1), which will be described later, when the symbol combination corresponding to "small win 01" is stopped and displayed on the active line, "Bell"-"Bell"- "Bell" pauses.

Further, when the left reel 31 is stopped first when the "small win A1 condition device" is activated, "replay" (PB=1) of the left reel 31 is stop-displayed in the middle left row (effective line).
As a result, when the "small win A1 condition device" is activated and the left first stop is performed, "blue 7", "red 7", "black BAR" or "white BAR" of the left reel 31 are stopped and displayed in the lower left row, "Replay" on the left reel 31 is stop-displayed in the middle left row, and "Bell" on the left reel 31 is stop-displayed in the upper left row.
That is, at the first stop on the left when the "small win A1 condition device" is activated, "blue 7/red 7/black BAR/white BAR", "replay" and "bell" of the left reel 31 are stopped within the display window 18. display.

In addition, the pattern of the left reel 31 constituting the "small winning combination 01" is one type of "replay", and the pattern of the middle reel 31 constituting the "small winning combination 01" is one type of "bell". The pattern of the right reel 31 constituting the winning combination 01" is one kind of "watermelon".
In this way, by setting the types of symbols of each reel 31 to constitute the combination of symbols to be stopped and displayed when the "small win A1 condition device" is activated, to be stop-displayed, the "small win A1 condition device" is activated. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line at times.

When the "small win A1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left and right (132)", the number priority is given to "small win 07" or " The reels 31 are stopped and controlled so that the symbol combination corresponding to the "small winning combination 08" (one coin is paid out) is stop-displayed on the activated line.

Specifically, as shown in FIG. 14 to be described later, when the "small win A1 condition device" is activated, the "replay" (PB=1) of the left reel 31 is stopped and displayed in the middle left row at the first left stop. After that, at the second stop on the right, the "Bell" (PB=1) on the right reel 31 is placed in the middle right row in order to win either the "small winning combination 07" or the "small winning combination 08" based on the number priority. stop display. After that, at the middle and third stop, "red 7" or "blue 7" (both "PB≠1") of the middle reel 31 are stopped and displayed in the middle stage.

As shown in FIG. 2, since "Blue 7" on the middle reel 31 is arranged only on the number "4", any symbol of the numbers "0" to "4" on the middle reel 31 is on the effective line. If the middle stop switch 42 is not operated at the position of , "blue 7" of the middle reel 31 cannot be stop-displayed on the effective line (middle middle row). Therefore, the probability that "Blue 7" on the middle reel 31 can be stopped and displayed in the middle middle row is "1/4".

Similarly, since "red 7" on the middle reel 31 is arranged only on the number "9", any symbol of the numbers "5" to "9" on the middle reel 31 is positioned on the activated line. If the middle stop switch 42 is not operated when the player is on, the "red 7" of the middle reel 31 cannot be stopped and displayed on the effective line (middle middle row). Therefore, the probability that the "red 7" of the middle reel 31 can be stop-displayed in the middle middle stage is "1/4".
From the above, the probability that "blue 7" or "red 7" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/2", so it corresponds to "small win 07" or "small win 08" The probability of being able to stop and display the combination of symbols on the active line is "1/2".

In this way, when the left reel 31 is stopped first and the right reel 31 is stopped second when the "small winning combination A1 condition device" is activated, "small winning combination 01" (10 payouts) is given priority to the number of reels. Pays out fewer medals than when the symbol combination corresponding to is stopped and displayed on the activated line. Displayable.

Further, when the pressing order is correct at the left first stop, but the pressing order is incorrect at the right second stop, the symbol is different from the symbol (watermelon) of the right reel 31 constituting the "small win 01". , and the "bell" symbol of "PB=1" on the right reel 31 is stopped and displayed on the activated line.
As a result, the "Bell" on the right reel 31 can be prevented from being missed, and the "Watermelon" on the right reel 31 can be prevented from being stop-displayed on the activated line, so that the "Small Win 01" wins. you can avoid it.

Furthermore, as shown in FIG. 4, the symbol on the left reel 31 constituting the "small win 07" and "small win 08" is one type of "replay", and the "small win 07" and "small win 08" are shown. The pattern of the right reel 31 constituting the is one type of "bell".
In this way, the left reel 31 and the right reel 31, which constitute a combination of symbols that can be stopped and displayed when the pressing order is incorrect when the "small win A1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win A1 condition device" is activated.

When the "small win A1 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", due to the number priority, with a probability of "1/8""small win 31" or " The reels 31 are stopped and controlled so that the symbol combination corresponding to the "small win 32" (one coin is paid out) is stopped and displayed on the activated line.
Specifically, as shown in FIG. 14, which will be described later, when the "small win A1 condition device" is activated, the "watermelon" (PB=1) of the middle reel 31 is placed in the middle and middle stages due to the number priority at the time of the middle first stop. , and at the second stop on the left, "Red 7" (PB ≠ 1) on the left reel 31 is stopped and displayed in the middle left row, and at the third stop on the right, "Red 7" on the right reel 31 or ""Blue7" (both "PB≠1") is stopped and displayed in the middle right row.

As shown in FIG. 2, since "Red 7" on the left reel 31 is arranged only on the number "5", any symbol of the numbers "1" to "5" on the left reel 31 is on the effective line. If the left stop switch 42 is not operated at the position of , "red 7" on the left reel 31 cannot be stopped and displayed on the effective line (middle left row). Therefore, the probability that "Red 7" on the left reel 31 can be stopped and displayed in the middle left row is "1/4".

In addition, since "Red 7" on the right reel 31 is arranged only on the number "8", one of the symbols of numbers "4" to "8" on the right reel 31 is positioned on the activated line. Unless the right stop switch 42 is operated, the "red 7" on the right reel 31 cannot be stopped and displayed on the effective line (middle right line). Therefore, the probability that "Red 7" on the right reel 31 can be stop-displayed in the middle right row is "1/4".

Furthermore, since "Blue 7" on the right reel 31 is arranged only on the number "3", any symbol of the number "19" or "0" to "3" on the right reel 31 is an effective line. If the right stop switch 42 is not operated while positioned above, "Blue 7" on the right reel 31 cannot be stopped and displayed on the active line (middle right row). Therefore, the probability that "Blue 7" on the right reel 31 can be stop-displayed in the middle right row is "1/4".

From the above, the probability that "Red 7" on the left reel 31 can be stop-displayed in the middle left row is "1/4", and "Red 7" or "Blue 7" on the right reel 31 is stop-displayed in the middle right row. Since the probability that it can be displayed is ``1/2'', the probability that the symbol combination corresponding to ``small winning 31'' or ``small winning 32'' can be stopped and displayed on the active line is ``1/8''. .

Thus, when the middle reel 31 is stopped first when the "small win A1 condition device" is activated, the symbol combination corresponding to the "small win 01" (10 payouts) is stopped on the effective line due to the number priority. A symbol combination corresponding to a 'small winning combination 31' or a 'small winning combination 32' (1 coin is paid out in each case) that pays out fewer medals than when displayed can be stopped and displayed on the effective line.

Further, when the pressing order is incorrect at the middle first stop, the symbol is different from the symbol (bell) of the middle reel 31 constituting the "small win 01" and the symbol of "PB=1" of the middle reel 31. "Watermelon" is stopped and displayed on the active line.
As a result, the ``watermelon'' on the middle reel 31 can be prevented from being missed, and the ``bell'' on the middle reel 31 can be prevented from being stop-displayed on the activated line, so that the ``small win 01'' wins. you can avoid it.

Furthermore, as shown in FIG. 4, the pattern of the left reel 31 constituting the "small win 31" and the "small win 32" is one kind of "red 7", and the "small win 31" and the "small win 32". ' is one kind of pattern of 'watermelon'.
In this way, the left reel 31 and the middle reel 31, which constitute a combination of symbols that can be stopped and displayed when the pushing order is incorrect when the "small win A1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win A1 condition device" is activated.

When the stop switch 42 is operated in the pressing order of "middle right and left (231)" when the "small win A1 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left and right (213)" Similarly, due to the number priority, the reels are stopped so that the symbol combination corresponding to the "small winning combination 31" or "small winning combination 32" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

When the "small win A1 condition device" is activated, when the stop switch 42 is operated in the order of "right, left, middle (312)", the number priority is given to "small win 53" or " The reels 31 are stopped and controlled so that the symbol combination corresponding to the small win 54" (one coin is paid out in each case) is stopped and displayed on the activated line.

Specifically, as shown in FIG. 14, which will be described later, when the "small win A1 condition device" is activated, the "cherry" (PB=1) of the right reel 31 is placed in the right middle stage due to the number priority at the time of the right first stop. , and at the second stop on the left, the "white BAR" (PB ≠ 1) on the left reel 31 is stopped at the middle left, and at the third stop on the middle reel 31, the "black BAR" or " "White BAR" (all "PB≠1") is stopped and displayed in the middle row.

As shown in FIG. 2, since the "white BAR" on the left reel 31 is arranged only on the number "15", any symbol of the numbers "11" to "15" on the left reel 31 is on the effective line. If the left stop switch 42 is not operated at the position of , the "white BAR" of the left reel 31 cannot be stop-displayed on the effective line (middle left row). Therefore, the probability that the "white BAR" on the left reel 31 can be stop-displayed in the middle left row is "1/4".
In addition, since the "black bar" of the middle reel 31 is arranged only at the number "14", any one of the symbols of the numbers "10" to "14" of the middle reel 31 is positioned on the activated line. Unless the middle stop switch 42 is operated, the "black BAR" of the middle reel 31 cannot be stop-displayed on the effective line (middle middle row). Therefore, the probability that the "black BAR" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4".

Similarly, since the "white BAR" of the middle reel 31 is arranged only at the number "19", any of the symbols of numbers "15" to "19" of the middle reel 31 is positioned on the effective line. If the middle stop switch 42 is not operated when the reel 31 is on, the "white BAR" of the middle reel 31 cannot be stop-displayed on the effective line (middle middle row). Therefore, the probability that the "white BAR" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4".

From the above, the probability that the "white BAR" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "black BAR" or "white BAR" on the middle reel 31 can be stopped and displayed in the middle middle row. Since the probability that it can be displayed is "1/2", the probability that the symbol combination corresponding to "small win 53" or "small win 54" can be stopped and displayed on the activated line is "1/8". .

Thus, when the right reel 31 is stopped first when the "small win A1 condition device" is activated, the symbol combination corresponding to the "small win 01" (10 payout) is stopped on the effective line due to the number priority. A combination of symbols corresponding to a 'small winning combination 53' or a 'small winning combination 54' (one coin is paid out in each case) that pays out fewer medals than when displayed can be stop-displayed on the effective line.

Further, when the pressing order is incorrect at the right first stop, the symbol is different from the symbol (watermelon) on the right reel 31 constituting the "small win 01" and the symbol "PB=1" on the right reel 31. is stopped on the active line.
As a result, the "Cherry" on the right reel 31 can be prevented from being missed, and the "Watermelon" on the right reel 31 can be prevented from being stopped and displayed on the active line, so that the "Small Win 01" wins. you can avoid it.

Furthermore, as shown in FIG. 5, the pattern of the left reel 31 constituting the "small win 53" and "small win 54" is one type of "white BAR", and the "small win 53" and "small win 54" are shown. ' is one kind of pattern of 'Cherry'.
In this way, the left reel 31 and the right reel 31, which constitute a combination of symbols that can be stopped and displayed when the pressing order is incorrect when the "small win A1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win A1 condition device" is activated.

Even when the stop switch 42 is operated in the pressing order of "right, middle, left (321)" when the "small win A1 condition device" is activated, the stop switch 42 is operated in the pressing order of "right, left, middle (312)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 53" or "small winning combination 54" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

As shown in FIG. 14, which will be described later, the symbol combinations that can be stopped and displayed on the active line when the "small win A1 condition device" is activated are "small win 01", "small win 07", "small win 08", and "small win 08". These are symbol combinations corresponding to "31st win", "32nd win", "53rd win", or "54th win".
Also, the symbol combination corresponding to the "small win 01" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement.

Furthermore, the symbol combinations corresponding to the "small winning combination 07" and "small winning combination 08" are composed of symbols in which the symbols on the "2" reels 31 are arranged in a "PB=1" arrangement, and another "1 winning combination". " symbols on the reels 31 are arranged in a pattern of "PB≠1".
Further, the symbol combinations corresponding to the "small winning combination 31", "small winning combination 32", "small winning combination 53" and "small winning combination 54" are arranged such that the symbols of "1" reels 31 are "PB=1". , and the symbols on the other "2" reels 31 are arranged in a "PB≠1" arrangement.

In this way, among the symbol combinations that can be stopped and displayed on the active line when the "small win A1 condition device" is activated, "1" of the symbols on the reels 31 are composed of symbols arranged in a "PB=1" arrangement, In addition, the number of symbol combinations consisting of symbols in which the symbols on the other “2” reels 31 are arranged in the “PB≠1” arrangement is “4”. Therefore, the number of symbol combinations (1 piece) consisting of symbols in which the symbols of all the “3” reels 31 are arranged in a “PB=1” arrangement, and the symbols of the “2” reels 31 are “PB=1”. , and the symbols on the other "1" reels 31 are larger than the number of symbol combinations (two) consisting of symbols in the "PB≠1" arrangement.

Further, when the "small win A1 condition device" is actuated and the pushing order is correct, when all the "3" reels 31 are stopped, the symbols arranged "PB=1" are stopped and displayed on the effective line. .
Furthermore, when the "small win A1 condition device" is activated, the first stop is correct, but if the second stop is incorrect, "PB = 1" is arranged at the first stop and the second stop. In the third stop, the symbols arranged in "PB≠1" are stopped and displayed on the effective line.
Furthermore, when the "small win A1 condition device" is activated, if the first stop results in an incorrect answer, the symbol with "PB = 1" arrangement is stopped and displayed on the effective line at the first stop, and at the second stop And at the time of the third stop, the symbols arranged "PB.noteq.1" are stopped and displayed on the effective line.

In addition, when the "small win A1 condition device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped and displayed on the effective line (left middle row), and when the "small win A1 condition device" is activated "Watermelon" (PB = 1) on the middle reel 31 is stopped and displayed on the effective line (middle middle row) at the first stop of the middle reel 31, and ""Cherry" (PB=1) is stopped and displayed on the effective line (right middle row).
For this reason, when the "small win A1 condition device" of "inside 1BB-A" is activated, the symbol combination corresponding to "1BB-A" is not stopped on the active line, and "inside 1BB-B"" The symbol combination corresponding to "1BB-B" is not stopped and displayed on the active line when the "small win A1 condition device" is activated.

Also, as shown in FIG. 5, the symbol combination corresponding to ``1BB-A'' is ``blank''-``red 7''-``replay'', and ``inside 1BB-A'' of ``small win A1 condition device''. It is a symbol combination that does not affect the stop control of the reels 31 with priority given to the number at the time of operation.
For example, since the symbol on the middle reel 31 of ``1BB-A'' is ``red 7,'' among the symbol combinations that can be stopped and displayed when the ``small win A1 conditional device'' of ``1BB-A internal middle'' is activated, the middle The number of symbol combinations in which the symbol of the reel 31 is "Red 7" is "2". Therefore, since the number of symbols on the middle reel 31 is the same as the number of symbol combinations of "watermelon", the first stop (push When the order is wrong), the "watermelon" of the middle reel 31 can be stopped and displayed on the activated line by giving priority to the number.

Also, the symbol on the left reel 31 of "1BB-A" is "blank", which is a symbol that is not used in the symbol combination that can be stopped and displayed when the "small win A1 conditional device" is activated. Therefore, the symbol on the left reel 31 of ``1BB-A'' does not affect the stop control of the reel 31 with priority given to the number when the ``small win A1 condition device'' of ``inside 1BB-A'' is activated.
Similarly, the symbol on the right reel 31 of "1BB-A" is "replay", which is a symbol that is not used in the symbol combination that can be stopped and displayed when the "small win A1 conditional device" is activated. Therefore, the symbol on the right reel 31 of ``1BB-A'' does not affect the stop control of the reel 31 with priority given to the number when the ``small win A1 condition device'' of ``inside 1BB-A'' is activated.

As for the symbol combination corresponding to "1BB-B", like the symbol combination corresponding to "1BB-A", reels with number priority when "small win A1 condition device" in "1BB-B inside" is activated It is a symbol combination that does not affect the stop control of 31.
In addition, the symbol combination corresponding to "1BB-A" is the stop control of the reel 31 with number priority when "small combination A2 condition device" to "small combination F2 condition device" of "inside 1BB-A" is activated. It is a symbol combination that does not affect.
Similarly, the symbol combination corresponding to "1BB-B" is the stop control of the reel 31 with the number priority when the "small combination A2 condition device" to "small combination F2 condition device" of "inside 1BB-B" is activated. It is a symbol combination that does not affect the

In this embodiment, two types of "1BB-A" and "1BB-B" are provided as "1BB". Then, when two medals are inserted, a lottery for "1BB-A" is carried out, and the symbol combination corresponding to "1BB-A" can be stopped and displayed. Also, when three medals are inserted, a lottery for "1BB-B" is carried out, and the symbol combination corresponding to "1BB-B" can be stopped and displayed.
However, it is not limited to this, and "1BB" may be one type, and the number of inserted medals may always be "3". In this case, the symbol combination corresponding to "1BB" is a symbol that does not affect the stop control of the reels 31 with the number priority when the "minor win A1 condition device" to "minor win F2 condition device" of "inside 1BB" is activated. A combination is preferred.

The "minor combination A2 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. 6, and is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win A2 condition device" is activated, just like when the "small win A1 condition device" is activated, the pressing order of "left center right (123)" is the correct pressing order, and the other pressing order is the incorrect pressing order. becomes.

When the "small win A2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "1/1" probability (always) "small win The reels 31 are stopped and controlled so that the symbol combination (PB=1) corresponding to "01" (10 coins paid out) is stopped and displayed on the active line.
When the "small win A2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left and right (132)", the number priority is given to "small win 09" or "small win 09" or " The reels 31 are stopped and controlled so that the symbol combination corresponding to the small win 10" (one coin is paid out) is stopped and displayed on the active line.

When the "small combination A2 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", due to the number priority, with a probability of "1/8", "small combination 33" or " The reels 31 are stopped and controlled so that the symbol combination corresponding to the "small combination 34" (one coin is paid out) is stopped and displayed on the activated line.
When the stop switch 42 is operated in the pressing order of "middle right and left (231)" when the "small win A2 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left and right (213)" Similarly, due to the number priority, the reels are stopped so that the symbol combination corresponding to the "small winning combination 33" or "small winning combination 34" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

When the "small win A2 condition device" is activated, when the stop switch 42 is operated in the order of "right, left, middle (312)", the number priority is given to "small win 49" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 50" (one coin is paid out) is stop-displayed on the activated line.
Even when the stop switch 42 was operated in the pressing order of "right, middle, left (321)" when the "small win A2 condition device" was activated, the stop switch 42 was operated in the pressing order of "right, left, middle (312)." In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 49" or "small winning combination 50" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

"Small win A2 condition device" replaces "small win 07" and "small win 08" of "small win A1 condition device" with "small win 09" and "small win 10", "small win A1 condition device"',"Small combination 31" and "Small combination 32" are replaced with "Small combination 33" and "Small combination 34", and "Small combination 53" and "Small combination 54" of "Small combination A1 condition device" are replaced with It is replaced with "small win 49" and "small win 50".
The stop control of the reels 31 when the "small win A2 condition device" is activated is the same as the stop control of the reels 31 when the "small win A1 condition device" is activated.

The "minor combination B1 condition device" includes 7 types of winning combinations described in the winning combination column of FIG. 6, and is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win B1 condition device" is activated, the pressing order of "right and left center (132)" is the correct pressing order, and the other pressing order is the incorrect pressing order.

When the stop switch 42 is operated in the pressing order of "left and right middle (132)" when the "small win B1 condition device" is activated, the number priority is given to "small win 02" with a probability of "1/1" (always). (payout of 10), the reels 31 are stopped and displayed on the active line.

Specifically, as shown in FIG. 14 to be described later, when the "small win B1 condition device" is activated, at the time of left first stop, the "replay" (PB=1) of the left reel 31 is given priority to the left middle row. , and at the second stop on the right, "Replay" (PB=1) on the right reel 31 is stopped at the middle right, and at the third stop on the middle, "Cherry" (PB=1) on the middle reel 31 is displayed. A stop display is displayed in the middle middle row. As a result, the symbol combination corresponding to "small win 02" with "PB=1" can be stopped and displayed on the active line.

Thus, when the "small win B1 condition device" is activated, when the left reel 31 is stopped first and the right reel 31 is stopped second, the "small win B1 condition device" corresponds to the "small win B1 condition device" with the number priority. A symbol combination corresponding to a 'small win 02' to pay out '10', which is the maximum number of medals to be paid out, is stop-displayed on the effective line.
As shown in FIG. 19(2), which will be described later, when the symbol combination corresponding to the "small win 02" is stopped and displayed on the active line, the upper line (invalid line) of "Bell"-"Bell"-" bell” stops.

Further, when the left reel 31 is stopped first when the "small win B1 condition device" is activated, "replay" (PB=1) of the left reel 31 is stop-displayed in the middle left row (effective line).
As a result, when the "small win B1 condition device" is activated and the left first stop is performed, "blue 7", "red 7", "black BAR" or "white BAR" of the left reel 31 are stopped and displayed in the lower left row, "Replay" on the left reel 31 is stop-displayed in the middle left row, and "Bell" on the left reel 31 is stop-displayed in the upper left row.
That is, when the "small win B1 condition device" is activated and the left first stop is performed, "blue 7/red 7/black BAR/white BAR", "replay" and "bell" of the left reel 31 are stopped within the display window 18. display.

Further, as shown in FIG. 14, which will be described later, the pattern on the left reel 31 forming the "small win 02" is one type of "Replay", and the pattern on the middle reel 31 forming the "small win 02" is "Cherry". , and the symbol on the right reel 31 forming the "small winning combination 02" is one type of "replay".
In this way, by setting the types of symbols of each reel 31 to constitute the combination of symbols to be stopped and displayed when the "small win B1 condition device" is activated to be stopped when the "small win B1 condition device" is activated, the "small win B1 condition device" is activated. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line at times.

When the "small win B1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small win 11" or "small win 11" or The reels 31 are stopped and controlled so that the symbol combination corresponding to the "small win 12" (one coin is paid out) is stopped and displayed on the activated line.

Specifically, as shown in FIG. 14, which will be described later, when the "small win B1 condition device" is activated, "Replay" (PB=1) of the left reel 31 is stopped and displayed in the middle left row at the first left stop. After that, at the middle second stop, the "Bell" (PB=1) of the middle reel 31 is placed in the middle middle stage in order to make it possible to win either the "small winning combination 11" or the "small winning combination 12" according to the number priority. stop display. After that, at the right third stop, the "black BAR" or "white BAR" (both "PB≠1") of the right reel 31 are stopped and displayed in the middle right row.

As shown in FIG. 2, since the "black BAR" on the right reel 31 is arranged only on the number "13", any symbol of the numbers "9" to "13" on the right reel 31 is on the effective line. If the right stop switch 42 is not operated at the position of , the "black BAR" of the right reel 31 cannot be stop-displayed on the effective line (middle right line). Therefore, the probability that the "black bar" on the right reel 31 can be stop-displayed in the middle right row is "1/4".

Similarly, since the "white BAR" on the right reel 31 is arranged only on the number "18", any symbol of the numbers "14" to "18" on the right reel 31 is positioned on the activated line. If the right stop switch 42 is not operated when the player is on the reel, the "white bar" on the right reel 31 cannot be stopped and displayed on the effective line (middle right row). Therefore, the probability that the "white BAR" on the right reel 31 can be stop-displayed in the middle right row is "1/4".
From the above, the probability that the "black BAR" or "white BAR" on the right reel 31 can be stopped and displayed in the middle right row is "1/2", so it corresponds to "small win 11" or "small win 12". The probability of being able to stop and display the combination of symbols on the active line is "1/2".

Thus, when the "small win B1 condition device" is activated, when the left reel 31 is stopped first and the middle reel 31 is stopped second, "small win 02" (10 payouts) is given priority to the number. Pays out fewer medals than when the symbol combination corresponding to is stopped and displayed on the active line. Displayable.

Further, when the pressing order is correct at the left first stop, but the pressing order is incorrect at the middle second stop, the symbol (cherry) of the middle reel 31 constituting the "small winning combination 02" is different from the symbol (cherry). In addition, the "bell" symbol of "PB=1" on the middle reel 31 is stopped and displayed on the activated line.
As a result, the "Bell" of the middle reel 31 can be prevented from being missed, and the "Cherry" of the middle reel 31 can be prevented from being stop-displayed on the active line, so that the "Small Win 02" can be won. you can avoid it.

Furthermore, as shown in FIG. 4, the pattern of the left reel 31 constituting the "small win 11" and "small win 12" is one type of "replay", and "small win 11" and "small win 12" are shown. The pattern of the middle reel 31 constituting the is one type of "bell".
In this way, the left reel 31 and the middle reel 31, which constitute a combination of symbols that can be stopped and displayed when the pushing order is incorrect when the "small win B1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the activated line when the "small win B1 condition device" is activated.

When the "small win B1 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", the number priority is given to "small win 35" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 36" (one coin is paid out) is stop-displayed on the activated line.

Specifically, as shown in FIG. 14, which will be described later, when the "small win B1 condition device" is activated, the "watermelon" (PB=1) of the middle reel 31 is placed in the middle and middle stages due to the number priority at the time of the middle first stop. , and at the second stop on the left, "black BAR" (PB ≠ 1) on the left reel 31 is stopped at the middle left, and at the third stop on the right, "black BAR" on the right reel 31 or " "White BAR" (both "PB≠1") is stopped and displayed in the right middle row.

As shown in FIG. 2, since the "black BAR" on the left reel 31 is arranged only on the number "10", any symbol of the number "6" to "10" on the left reel 31 is on the effective line. If the left stop switch 42 is not operated at the position of , the "black BAR" of the left reel 31 cannot be stop-displayed on the effective line (middle left row). Therefore, the probability that the "black bar" on the left reel 31 can be stop-displayed in the middle left row is "1/4".

In addition, since the "black bar" on the right reel 31 is arranged only on the number "13", any one of the symbols of the numbers "9" to "13" on the right reel 31 is positioned on the activated line. If the right stop switch 42 is not operated, the "black bar" on the right reel 31 cannot be stopped and displayed on the effective line (middle right line). Therefore, the probability that the "black bar" on the right reel 31 can be stop-displayed in the middle right row is "1/4".

Furthermore, since the "white BAR" on the right reel 31 is arranged only on the number "18", any of the symbols of the numbers "14" to "18" on the right reel 31 are positioned on the effective line. If the right stop switch 42 is not operated when the player is on the reel, the "white bar" on the right reel 31 cannot be stopped and displayed on the effective line (middle right line). Therefore, the probability that the "white BAR" on the right reel 31 can be stop-displayed in the middle right row is "1/4".

From the above, the probability that the "black BAR" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "black BAR" or "white BAR" on the right reel 31 can be stopped and displayed in the middle right row. Since the probability that the symbol combination corresponding to the "minor win 35" or "minor win 36" can be stopped and displayed on the active line is "1/8". .

In this way, when the middle reel 31 is stopped first when the "small win B1 condition device" is activated, the symbol combination corresponding to the "small win 02" (10 payout) is stopped on the effective line due to the number priority. A symbol combination corresponding to a 'small winning combination 35' or a 'small winning combination 36' (1 coin is paid out in each case) that pays out fewer medals than when displayed can be stopped and displayed on the effective line.

Further, when the pressing order is incorrect at the middle first stop, the symbol is different from the symbol (cherry) of the middle reel 31 constituting the "small win 02" and the symbol of "PB=1" of the middle reel 31. "Watermelon" is stopped and displayed on the active line.
As a result, the "watermelon" on the middle reel 31 can be prevented from being missed, and the "cherry" on the middle reel 31 can be prevented from being stopped and displayed on the active line, so that the "small winning combination 02" is won. you can avoid it.

Furthermore, as shown in FIG. 4, the pattern of the left reel 31 constituting the "small winning combination 35" and the "small winning combination 36" is one type of "black BAR", and the "small winning combination 35" and the "small winning combination 36". ' is one kind of pattern of 'watermelon'.
In this way, the left reel 31 and the middle reel 31, which constitute a combination of symbols that can be stopped and displayed when the pushing order is incorrect when the "small win B1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the activated line when the "small win B1 condition device" is activated.

When the stop switch 42 is operated in the pressing order of "middle right and left (231)" when the "small win B1 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left and right (213)" Similarly, due to the number priority, the symbol combination corresponding to "small winning combination 35" or "small winning combination 36" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

When the "small win B1 condition device" is activated, when the stop switch 42 is operated in the order of "right, left, middle (312)", the number priority is given to "small win 47" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 48" (one coin is paid out in each case) is stop-displayed on the activated line.

Specifically, as shown in FIG. 14, which will be described later, when the "small win B1 condition device" is activated, the "Cherry" (PB=1) on the right reel 31 is placed in the right middle stage due to the number priority at the time of the right first stop. , and at the second stop on the left, "Red 7" (PB ≠ 1) on the left reel 31 is stopped and displayed at the middle left row, and at the third stop on the middle reel 31, "Red 7" on the middle reel 31 or " "Blue 7" (both "PB≠1") is stopped and displayed in the middle row.

As described above, the probability that "Red 7" on the left reel 31 can be stop-displayed in the middle left row is "1/4".
Further, the probability that "Red 7" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4", and the probability that "Blue 7" of the middle reel 31 can be stopped and displayed in the middle middle row is also possible. Since it is "1/4", the probability that "Red 7" or "Blue 7" on the middle reel 31 can be stopped and displayed in the middle row is "1/2".
Therefore, the probability that the symbol combination corresponding to the "small winning combination 47" or "small winning combination 48" can be stop-displayed on the active line is "1/8".

Thus, when the right reel 31 is stopped first when the "small win B1 condition device" is activated, the symbol combination corresponding to the "small win 02" (10 payout) is stopped on the effective line due to the number priority. A symbol combination corresponding to a 'small winning combination 47' or a 'small winning combination 48' (one coin is paid out in each case) that pays out fewer medals than when displayed can be stopped and displayed on the effective line.

Further, when the pressing order is incorrect at the right first stop, the symbol is different from the symbol (replay) of the right reel 31 constituting the "small win 02" and the symbol of "PB=1" of the right reel 31. is stopped on the active line.
As a result, "Cherry" on the right reel 31 can be prevented from being missed, and "Replay" on the right reel 31 can be prevented from being stopped and displayed on the activated line, so that "Small win 02" can be won. you can avoid it.

Furthermore, as shown in FIG. 5, the symbol of the left reel 31 constituting the "small win 47" and "small win 48" is one type of "red 7", and the "small win 47" and "small win 48" are shown. ' is one kind of pattern of 'Cherry'.
In this way, the left reel 31 and the right reel 31, which constitute a combination of symbols that can be stopped and displayed when the pressing order is incorrect when the "small win B1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the activated line when the "small win B1 condition device" is activated.

Even when the stop switch 42 was operated in the pressing order of "right, middle, left (321)" when the "small win B1 condition device" was activated, the stop switch 42 was operated in the pressing order of "right, left, middle (312)". In the same way as when, by number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 47" or "small winning combination 48" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

As shown in FIG. 14, which will be described later, the symbol combinations that can be stopped and displayed on the active line when the "small win B1 condition device" is activated are "small win 02", "small win 11", "small win 12", "small win 12", and "small win 12". These are symbol combinations corresponding to "35th win", "36th win", "47th win", or "48th win".
The symbol combination corresponding to the "small win 02" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement.

Furthermore, the symbol combinations corresponding to the "small winning combination 11" and "small winning combination 12" are composed of symbols in which the symbols on the "2" reels 31 are arranged in a "PB=1" arrangement, and another "1 winning combination". " symbols on the reels 31 are arranged in a pattern of "PB≠1".
Furthermore, in the symbol combinations corresponding to the "small win 35", "small win 36", "small win 47" and "small win 48", the symbols of "1" reels 31 are arranged "PB=1". , and the symbols on the other "2" reels 31 are arranged in a "PB≠1" arrangement.

In this way, among the symbol combinations that can be stopped and displayed on the activated line when the "small win B1 condition device" is activated, "1" reel 31 symbol is composed of symbols arranged in a "PB=1" arrangement, In addition, the number of symbol combinations consisting of symbols in which the symbols on the other “2” reels 31 are arranged in the “PB≠1” arrangement is “4”. Therefore, the number of symbol combinations (1 piece) consisting of symbols in which the symbols of all the “3” reels 31 are arranged in a “PB=1” arrangement, and the symbols of the “2” reels 31 are “PB=1”. , and the symbols on the other "1" reels 31 are larger than the number of symbol combinations (two) consisting of symbols in the "PB≠1" arrangement.

Further, when the "small win B1 condition device" is actuated and the pressing order is correct, when all the "3" reels 31 are stopped, the symbols arranged "PB=1" are stopped and displayed on the activated line. .
Furthermore, when the "small win B1 condition device" is activated, the first stop is correct, but when the second stop is incorrect, "PB = 1" is arranged at the first stop and the second stop. In the third stop, the symbols arranged in "PB≠1" are stopped and displayed on the effective line.
Furthermore, when the "small win B1 condition device" is activated, when the first stop is incorrect, the symbols with "PB = 1" arranged are stopped and displayed on the effective line at the first stop, and at the second stop And at the time of the third stop, the symbols arranged "PB.noteq.1" are stopped and displayed on the effective line.

In addition, when the "small win B1 condition device" is activated and the left first stop is performed, "replay" (PB=1) of the left reel 31 is stopped and displayed on the effective line (left middle row), and when the "small win B1 condition device" is activated "Watermelon" (PB = 1) on the middle reel 31 is stopped and displayed on the effective line (middle middle row) at the first stop of the middle reel 31, and ""Cherry" (PB=1) is stopped and displayed on the effective line (right middle row).
For this reason, when the "small win B1 condition device" of "inside 1BB-A" is activated, the symbol combination corresponding to "1BB-A" is not stopped on the active line, and "inside 1BB-B"" The symbol combination corresponding to "1BB-B" is not stopped and displayed on the active line when the "small win B1 condition device" is activated.

"Minor combination B2 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win B2 condition device" is activated, the pressing order of "left and right middle (132)" is the correct pressing order, and the other pressing order is the incorrect pressing order, just like when the "small winning combination B1 condition device" is activated. Become.

When the "small win B2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left and right (132)", the number priority is given to "1/1" probability (always) "small win 02 (payout of 10), the reels 31 are stopped and displayed on the active line.
When the "small win B2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small win 13" or "small win 13" or The reels 31 are stopped and controlled so that the symbol combination corresponding to the "small win 14" (one coin is paid out) is stopped and displayed on the activated line.

When the "small win B2 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", the number priority is given to "small win 37" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 38" (one coin is paid out in each case) is stop-displayed on the activated line.
When the stop switch 42 is operated in the pressing order of "middle right and left (231)" when the "small win B2 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left and right (213)" Similarly, due to the number priority, the symbol combination corresponding to "small winning combination 37" or "small winning combination 38" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

When the "small win B2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "right, left, middle (312)", the number priority is given to "small win 57" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 58" (one coin is paid out) is stop-displayed on the activated line.
Even when the stop switch 42 was operated in the pressing order of "right, middle, left (321)" when the "small win B2 condition device" was activated, the stop switch 42 was operated in the pressing order of "right, left, middle (312)". In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 57" or "small winning combination 58" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

"Small win B2 condition device" replaces "small win 11" and "small win 12" of "small win B1 condition device" with "small win 13" and "small win 14", "small win B1 condition device""Small combination 35" and "small combination 36" are replaced with "small combination 37" and "small combination 38", and "small combination 47" and "small combination 48" of the "small combination B1 condition device" are replaced with It is replaced with "small win 57" and "small win 58".
The stop control of the reels 31 when the "small win B2 condition device" is activated is the same as the stop control of the reels 31 when the "small win B1 condition device" is activated.

"Minor combination C1 condition device" includes 7 types of winning combinations described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win C1 condition device" is activated, the pressing order of "middle left/right (213)" is the correct pressing order, and the other pressing order is the incorrect pressing order.

When the stop switch 42 is operated in the pressing order of "middle left and right (213)" when the "small win C1 condition device" is activated, the number priority is given to "1/1" probability (always) "small win 03 (payout of 10), the reels 31 are stopped and displayed on the active line.

Specifically, as shown in FIG. 14 to be described later, when the "small win C1 condition device" is activated, the "bell" (PB=1) of the middle reel 31 is placed in the middle and middle stages due to the number priority at the time of the middle first stop. , and at the second stop on the left, the "bell" (PB=1) of the left reel 31 is stopped and displayed at the middle left, and at the third stop on the right, the "bell" (PB=1) of the right reel 31 is stopped and displayed. A stop display is displayed in the right middle row. As a result, the symbol combination corresponding to "small win 03" with "PB=1" can be stopped and displayed on the active line.

In this way, when the middle reel 31 is stopped first and the left reel 31 is stopped second when the "small winning combination C1 conditional device" is activated, the "small winning combination C1 conditional device" is achieved by giving priority to the number of reels. A symbol combination corresponding to a 'small win 03' to pay out '10', which is the maximum number of medals to be paid out, is stop-displayed on the effective line.
As shown in FIG. 19(3), which will be described later, when the "small winning combination 03" is won, "Bell"-"Bell"-"Bell" are stop-displayed on the middle line (valid line).

Further, when the middle reel 31 is stopped first when the "small win C1 condition device" is activated, the "bell" (PB=1) of the middle reel 31 is stopped and displayed in the middle middle row (effective line), and then, When the left reel 31 is stopped second, the "bell" (PB=1) of the left reel 31 is stopped and displayed in the middle left row (effective line).
As a result, when the middle reel 31 is stopped first and the left reel 31 is stopped second when the "small win C1 condition device" is activated, "replay" of the left reel 31 is stopped and displayed in the lower left row, "Bell" on the left reel 31 is stopped and displayed in the middle left row, and "Watermelon" on the left reel 31 is stopped and displayed in the upper left row.
That is, when the "small win C1 condition device" is activated, when the middle reel 31 is stopped first and the left reel 31 is stopped second, "Replay", "Bell" and "Watermelon" of the left reel 31 are played. Stop display in the display window 18 .

Further, as shown in FIG. 4, the pattern on the left reel 31 forming the "small win 03" is one type of "bell", and the pattern on the middle reel 31 forming the "small win 03" is also "bell". There is one type, and the pattern of the right reel 31 constituting the "small winning combination 03" is also one type of "bell".
In this way, by setting the types of symbols of each reel 31 to constitute the combination of symbols to be stopped and displayed when the "small win C1 condition device" is activated to be stopped when the "small win C1 condition device" is activated, the "small win C1 condition device" is activated. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line at times.

When the "small win C1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "middle right left (231)", the number priority is given to "small win 15" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 16" (one coin is paid out) is stop-displayed on the activated line.

Specifically, as shown in FIG. 14 to be described later, when the "small win C1 condition device" is activated, the "bell" (PB=1) of the middle reel 31 is stopped and displayed in the middle middle stage at the time of the middle first stop. After that, at the right second stop, "Watermelon" (PB=1) on the right reel 31 is placed in the right middle row in order to make it possible to win either "small win 15" or "small win 16" based on the number priority. stop display. After that, at the third stop on the left, "red 7" or "blue 7" (both "PB≠1") of the left reel 31 are stopped and displayed in the middle left row.

As shown in FIG. 2, since "Red 7" on the left reel 31 is arranged only on the number "5", any symbol of the numbers "1" to "5" on the left reel 31 is on the effective line. If the left stop switch 42 is not operated at the position of , "red 7" on the left reel 31 cannot be stopped and displayed on the effective line (middle left row). Therefore, the probability that "Red 7" on the left reel 31 can be stopped and displayed in the middle left row is "1/4".

Similarly, since "Blue 7" on the left reel 31 is arranged only on the number "0", any symbol of the numbers "16" to "19" or "0" on the left reel 31 is an effective line. If the left stop switch 42 is not operated while positioned above, "Blue 7" on the left reel 31 cannot be stopped and displayed on the active line (middle left row). Therefore, the probability that "Blue 7" on the left reel 31 can be stop-displayed in the middle left row is "1/4".
From the above, the probability that "Red 7" or "Blue 7" on the left reel 31 can be stopped and displayed in the middle left row is "1/2", so it corresponds to "Small win 15" or "Small win 16" The probability of being able to stop and display the combination of symbols on the active line is "1/2".

Thus, when the "small win C1 condition device" is activated, when the middle reel 31 is stopped first and the right reel 31 is stopped second, "small win 03" (10 payouts) is given priority to the number. Pays out fewer medals than when the symbol combination corresponding to is stopped and displayed on the activated line. Displayable.

Further, when the pressing order is correct at the middle first stop, but the pressing order is incorrect at the right second stop, the symbol (bell) on the right reel 31 constituting the "small win 03" is different. Also, the "watermelon" symbol of "PB=1" on the right reel 31 is stopped and displayed on the activated line.
As a result, the "watermelon" on the right reel 31 can be prevented from being missed, and the "bell" on the right reel 31 can be prevented from being stopped and displayed on the activated line, so that the "small win 03" wins. you can avoid it.

Furthermore, as shown in FIG. 4, the pattern of the middle reel 31 constituting the "small win 15" and "small win 16" is one kind of "bell", and the "small win 15" and "small win 16" are shown. The pattern of the right reel 31 constituting the is one kind of "watermelon".
In this way, when the "small win C1 condition device" is activated, the symbol combination that is correct in the pressing order at the middle first stop, but can be stopped and displayed when the pressing order is incorrect at the right second stop is set. By using one kind of symbols for each of the middle reel 31 and the right reel 31, the number of symbol combinations that can be stop-displayed on the effective line when the "small win C1 condition device" is activated can be reduced.

When the "small win C1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small win 63" or "small win 63" with a probability of "1/8". The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 64" (one coin is paid out) is stopped and displayed on the activated line.

Specifically, as shown in FIG. 14 to be described later, when the "small win C1 condition device" is activated, the "replay" (PB=1) of the left reel 31 is placed in the middle left row due to the number priority at the time of the left first stop. , and when the middle and second stops, "red 7" or "blue 7" (both are "PB ≠ 1") of the middle reel 31 are stopped and displayed in the middle and middle rows, and when the right and third stops, the right "Red 7" (PB≠1) on the reel 31 is stopped and displayed in the middle right row.

As shown in FIG. 2, since "Red 7" on the middle reel 31 is arranged only on the number "9", any symbol of the numbers "5" to "9" on the middle reel 31 is on the effective line. If the middle stop switch 42 is not operated at the position of , "red 7" of the middle reel 31 cannot be stop-displayed on the effective line (middle middle row). Therefore, the probability that the "red 7" of the middle reel 31 can be stop-displayed in the middle middle stage is "1/4".

In addition, since "Blue 7" on the middle reel 31 is arranged only on the number "4", any one of the symbols of numbers "0" to "4" on the middle reel 31 is positioned on the effective line. Unless the middle stop switch 42 is operated, the "blue 7" of the middle reel 31 cannot be stop-displayed on the effective line (middle middle row). Therefore, the probability that "Blue 7" on the middle reel 31 can be stopped and displayed in the middle middle row is "1/4".

Furthermore, since "Red 7" on the right reel 31 is arranged only on the number "8", any one of the symbols of numbers "4" to "8" on the right reel 31 is positioned on the activated line. Unless the right stop switch 42 is operated, the "red 7" on the right reel 31 cannot be stopped and displayed on the effective line (middle right line). Therefore, the probability that "Red 7" on the right reel 31 can be stop-displayed in the middle right row is "1/4".

From the above, the probability that "Red 7" or "Blue 7" on the middle reel 31 can be stopped and displayed in the middle middle row is "1/2", and "Red 7" on the right reel 31 can be stopped and displayed in the right middle row. Since the probability that it can be displayed is ``1/4'', the probability that the symbol combination corresponding to ``minor win 63'' or ``minor win 64'' can be stopped and displayed on the active line is ``1/8''. .

In this way, when the left reel 31 is stopped first when the "small win C1 condition device" is activated, the symbol combination corresponding to the "small win 03" (10 payout) is stopped on the effective line due to the number priority. A symbol combination corresponding to a ``small winning combination 63'' or a ``small winning combination 64'' (one coin is paid out in each case) that pays out fewer medals than when displayed can be stopped and displayed on the effective line.

Further, when the pressing order is incorrect at the left first stop, the symbol (bell) on the left reel 31 constituting the "small winning combination 03" is different from the symbol (bell) on the left reel 31, and the symbol "PB=1" on the left reel 31. "Replay" is stopped and displayed on the active line.
As a result, the "replay" on the left reel 31 can be prevented from being missed, and the "bell" on the left reel 31 can be prevented from being stop-displayed on the active line, so that the "small win 03" wins. you can avoid it.

Furthermore, as shown in FIG. 5, the symbol on the left reel 31 constituting the "minor win 63" and "minor win 64" is one type of "replay", and the "minor win 63" and "minor win 64" are shown. The pattern of the right reel 31 constituting the is one type of "red 7".
In this way, when the "small win C1 condition device" is activated, the types of symbols of the left reel 31 and the right reel 31 that constitute the symbol combination that can be stopped and displayed when the pressing order is incorrect at the left first stop are selected. By using one type for each, it is possible to reduce the number of symbol combinations that can be stopped and displayed on the active line when the "small win C1 condition device" is activated.

When the "small win C1 condition device" is activated, the stop switch 42 is operated in the pressing order of "left, middle, right (123)" even when the stop switch 42 is operated in the pressing order of "left, middle, (132)". In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 63" or "small winning combination 64" (both 1 payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small win C1 condition device" is activated, when the stop switch 42 is operated in the order of "right left middle (312)", the number priority is given to "small win 51" or "small win 51" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 52" (one coin is paid out) is stop-displayed on the activated line.

Specifically, as shown in FIG. 14, which will be described later, when the "small win C1 condition device" is activated, the "cherry" (PB=1) of the right reel 31 is placed in the right middle stage due to the number priority at the time of the right first stop. , and at the second stop on the left, the "black BAR" (PB ≠ 1) on the left reel 31 is stopped at the middle left, and at the third stop on the middle reel 31, the "black BAR" on the middle reel 31 or " "White BAR" (all "PB≠1") is stopped and displayed in the middle row.

As shown in FIG. 2, since the "black BAR" on the left reel 31 is arranged only on the number "10", any symbol of the number "6" to "10" on the left reel 31 is on the effective line. If the left stop switch 42 is not operated at the position of , the "black BAR" of the left reel 31 cannot be stop-displayed on the effective line (middle left row). Therefore, the probability that the "black bar" on the left reel 31 can be stop-displayed in the middle left row is "1/4".

Further, as described above, the probability that the "black bar" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4", and the "white bar" of the middle reel 31 is stopped and displayed in the middle middle row. The probability of being able to do so is also "1/4".
From the above, the probability that the "black BAR" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "black BAR" or "white BAR" on the middle reel 31 can be stopped and displayed in the middle middle row. Since the probability that it can be displayed is "1/2", the probability that the symbol combination corresponding to "small win 51" or "small win 52" can be stopped and displayed on the activated line is "1/8". .

Thus, when the right reel 31 is stopped first when the "small win C1 condition device" is activated, the symbol combination corresponding to the "small win 03" (10 payouts) is stopped on the effective line due to the number priority. A combination of symbols corresponding to a 'small winning combination 51' or a 'small winning combination 52' (one coin is paid out in each case) that pays out fewer medals than when displayed can be stop-displayed on the effective line.

Further, when the pushing order is incorrect at the right first stop, the symbol (bell) on the right reel 31 constituting the "small win 03" is different and the symbol "PB=1" on the right reel 31 is used. is stopped on the active line.
As a result, the "Cherry" on the right reel 31 can be prevented from being missed, and the "Bell" on the right reel 31 can be prevented from being stop-displayed on the activated line, so that "Small Win 03" can be won. you can avoid it.

Furthermore, as shown in FIG. 5, the pattern of the left reel 31 constituting the "small win 51" and the "small win 52" is one type of "black BAR", and the "small win 51" and the "small win 52". ' is one kind of pattern of 'Cherry'.
In this way, the left reel 31 and the right reel 31, which constitute a combination of symbols that can be stopped and displayed when the pushing order is incorrect when the "small win C1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small combination C1 condition device" is activated.

Even when the stop switch 42 was operated in the pressing order of "right, middle, left (321)" when the "small win C1 condition device" was activated, the stop switch 42 was operated in the pressing order of "right, left, middle (312)". In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 51" or "small winning combination 52" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

As shown in FIG. 14, which will be described later, the symbol combinations that can be stopped and displayed on the active line when the "small win C1 condition device" is activated are "small win 03", "small win 15", "small win 16", "small win These are symbol combinations corresponding to "51st win", "52nd win", "63rd win", or "64th win".
Also, the symbol combination corresponding to the "small win 03" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement.

Furthermore, the symbol combinations corresponding to the "small winning combination 15" and "small winning combination 16" are composed of symbols in which the symbols on the "2" reels 31 are arranged in a "PB=1" arrangement, and another "1 " symbols on the reels 31 are arranged in a pattern of "PB≠1".
Furthermore, in the symbol combinations corresponding to "small win 51", "small win 52", "small win 63" and "small win 64", the symbols of "1" reels 31 are arranged "PB=1". , and the symbols on the other "2" reels 31 are arranged in a "PB≠1" arrangement.

In this way, among the symbol combinations that can be stopped and displayed on the activated line when the "small win C1 condition device" is activated, "1" of the symbols on the reels 31 are composed of symbols arranged in a "PB=1" arrangement, In addition, the number of symbol combinations consisting of symbols in which the symbols on the other “2” reels 31 are arranged in the “PB≠1” arrangement is “4”. Therefore, the number of symbol combinations (1 piece) consisting of symbols in which the symbols of all the “3” reels 31 are arranged in a “PB=1” arrangement, and the symbols of the “2” reels 31 are “PB=1”. , and the symbols on the other "1" reels 31 are larger than the number of symbol combinations (two) consisting of symbols in the "PB≠1" arrangement.

Further, when the "small win C1 condition device" is actuated and the pressing order is correct, when all the "3" reels 31 are stopped, the symbols arranged "PB=1" are stopped and displayed on the activated line. .
Furthermore, when the "small win C1 condition device" is activated, the first stop is correct, but if the second stop is incorrect, "PB = 1" is arranged at the first stop and the second stop. In the third stop, the symbols arranged in "PB≠1" are stopped and displayed on the effective line.
Furthermore, when the "small win C1 condition device" is activated, if the first stop results in an incorrect answer, the symbols with "PB = 1" arranged are stopped and displayed on the effective line at the first stop, and at the second stop And at the time of the third stop, the symbols arranged "PB.noteq.1" are stopped and displayed on the effective line.

In addition, when the "small win C1 condition device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped and displayed on the effective line (left middle row), and when the "small win C1 condition device" is activated "Bell" (PB = 1) of the middle reel 31 is stopped and displayed on the effective line (middle middle row) at the first stop of the middle reel 31, and ""Cherry" (PB=1) is stopped and displayed on the effective line (right middle row).
For this reason, when the "small win C1 condition device" of "inside 1BB-A" is activated, the symbol combination corresponding to "1BB-A" is not stopped on the active line, and "inside 1BB-B"" The symbol combination corresponding to "1BB-B" is not stopped and displayed on the active line when the "Small win C1 condition device" is activated.

"Minor combination C2 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. 6, and is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win C2 condition device" is activated, similarly to when the "small win C1 condition device" is activated, the pressing order of "middle left and right (213)" is the correct pressing order, and the other pressing order is the incorrect pressing order. Become.

When the stop switch 42 is operated in the pressing order of "middle left and right (213)" when the "small win C2 condition device" is activated, the number priority is given to "1/1" probability (always) "small win 03 (payout of 10), the reels 31 are stopped and displayed on the active line.
When the "small win C2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "middle right left (231)", due to the number priority, with a probability of "1/2""small win 17" or " The reels 31 are stopped and controlled so that the symbol combination corresponding to the "small win 18" (one coin is paid out) is stopped and displayed on the activated line.

When the "small win C2 condition device" is activated, when the stop switch 42 is operated in the order of "left center right (123)", the number priority is given to "small win 65" or "small win 65" with a probability of "1/8". The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 66" (one coin is paid out) is stopped and displayed on the activated line.
When the "small win C2 condition device" is activated, even when the stop switch 42 is operated in the pressing order of "right, left, middle (132)", the stop switch 42 is operated in the pressing order of "left, middle, right (123)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 65" or "small winning combination 66" (both 1 payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small win C2 condition device" is activated, when the stop switch 42 is operated in the order of pressing "right, left, middle (312)", the number priority is given to "small win 55" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 56" (one coin is paid out) is stop-displayed on the activated line.
Even when the stop switch 42 was operated in the pressing order of "right, middle, left (321)" when the "small win C2 condition device" was activated, the stop switch 42 was operated in the pressing order of "right, left, middle (312)". In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 55" or "small winning combination 56" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

"Small win C2 condition device" replaces "small win 15" and "small win 16" of "small win C1 condition device" with "small win 17" and "small win 18", "small win C1 condition device""Small combination 51" and "Small combination 52" are replaced with "Small combination 55" and "Small combination 56", and "Small combination 63" and "Small combination 64" of "Small combination C1 condition device" are replaced, It is replaced with "minor win 65" and "minor win 66".
The stop control of the reels 31 when the "small win C2 condition device" is activated is the same as the stop control of the reels 31 when the "small win C1 condition device" is activated.

The "small combination D1 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. 7, and is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small combination D1 condition device" is activated, the pressing order of "middle, right, left (231)" is the correct pressing order, and the other pressing order is the incorrect pressing order.

When the stop switch 42 is operated in the pressing order of "middle right left (231)" when the "small win D1 condition device" is activated, the number priority is given to "1/1" probability (always) "small win 04 (payout of 10), the reels 31 are stopped and displayed on the active line.

Specifically, as shown in FIG. 15 to be described later, when the "small win D1 condition device" is activated, at the time of the middle first stop, the "bell" (PB=1) of the middle reel 31 is set to the middle middle stage due to the number priority. , and at the second stop on the right, "Replay" (PB=1) on the right reel 31 is stopped on the middle right, and at the third stop on the left, "Watermelon" (PB=1) on the left reel 31 is stopped and displayed. A stop display is displayed in the left middle row. As a result, the symbol combination corresponding to "small win 04" with "PB=1" can be stopped and displayed on the active line.

In this way, when the middle reel 31 is stopped first and the right reel 31 is stopped second when the "small win D1 conditional device" is activated, the "small win D1 conditional device" corresponds to the "small win D1 conditional device" with priority given to the number of reels. A symbol combination corresponding to a 'small win 04' to pay out '10', which is the maximum number of medals to be paid out, is stop-displayed on the activated line.
As shown in FIG. 20(1), which will be described later, when the symbol combination corresponding to the "small win 04" is stopped and displayed on the active line, "Bell"-"Bell"- "Bell" pauses.

Further, when the middle reel 31 is stopped first when the "small win D1 condition device" is activated, the "bell" (PB=1) of the middle reel 31 is stopped and displayed in the middle middle row (effective line), and then, When the right reel 31 is stopped second, "Replay" (PB=1) of the right reel 31 is stop-displayed in the right middle row (effective line), and then when the left reel 31 is stopped third. , stop-displays "Watermelon" (PB=1) on the left reel 31 in the middle left row (effective line).

As a result, when the "small win D1 condition device" is activated, the middle reel 31 is stopped first, the right reel 31 is stopped second, and the left reel 31 is stopped third, the left reel 31 ""Bell" is stop-displayed in the lower left row, "Watermelon" on the left reel 31 is stop-displayed in the middle left row, and "Cherry" or "Blank" on the left reel 31 is stop-displayed in the upper left row.
That is, when the "small win D1 condition device" is activated, the middle reel 31 is stopped first, the right reel 31 is stopped second, and the left reel 31 is stopped third, the left reel 31 "bell ”, “Watermelon” and “Cherry/Blank” are stopped in the display window 18 .

The pattern on the left reel 31 forming the "small win 04" is one type of "watermelon", and the pattern on the middle reel 31 forming the "small win 04" is one type of "bell". The pattern of the right reel 31 that constitutes the winning combination 04" is one type of "Replay".
In this way, the pressing order when the "small win D1 condition device" is activated, the type of symbols of each reel 31 constituting the symbol combination to be stop-displayed when the correct answer is correct is set to one type, respectively, so that the "small win D1 condition device" is activated. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line at times.

When the "small hand D1 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", due to the number priority, with a probability of "1/2""small hand 19" or " The reels 31 are stopped and controlled so that the symbol combination corresponding to the small win 20" (one coin is paid out) is stopped and displayed on the activated line.
Specifically, as shown in FIG. 15 to be described later, when the "small win D1 condition device" is activated, the "bell" (PB=1) of the middle reel 31 is stopped and displayed in the middle middle stage at the time of the middle first stop. After that, at the second stop on the left, the "Bell" (PB=1) of the left reel 31 is placed in the middle left row in order to win either a "small win 19" or a "small win 20" based on the number priority. stop display. After that, at the right third stop, the "black BAR" or "white BAR" (both "PB≠1") of the right reel 31 are stopped and displayed in the middle right row.

As shown in FIG. 2, since the "black BAR" on the right reel 31 is arranged only on the number "13", any symbol of the numbers "9" to "13" on the right reel 31 is on the effective line. If the right stop switch 42 is not operated at the position of , the "black BAR" of the right reel 31 cannot be stop-displayed on the effective line (middle right line). Therefore, the probability that the "black bar" on the right reel 31 can be stop-displayed in the middle right row is "1/4".

Similarly, since the "white BAR" on the right reel 31 is arranged only on the number "18", any symbol of the numbers "14" to "18" on the right reel 31 is positioned on the activated line. If the right stop switch 42 is not operated when the player is on the reel, the "white bar" on the right reel 31 cannot be stopped and displayed on the effective line (middle right row). Therefore, the probability that the "white BAR" on the right reel 31 can be stop-displayed in the middle right row is "1/4".
From the above, the probability that the “black BAR” or “white BAR” of the right reel 31 can be stopped and displayed in the middle right row is “1/2”, so it corresponds to “small win 19” or “small win 20”. The probability of being able to stop and display the combination of symbols on the active line is "1/2".

In this way, when the "small win D1 conditional device" is activated, when the middle reel 31 is stopped first and the left reel 31 is stopped second, "small win 04" (10 payouts) is given priority. Pays out fewer medals than when the symbol combination corresponding to is stopped and displayed on the activated line. Displayable.

Further, when the pressing order is correct at the middle first stop, but the pressing order is incorrect at the left second stop, the symbol (watermelon) on the left reel 31 constituting the "small win 04" is different. , and the symbol "bell" of "PB=1" on the left reel 31 is stopped and displayed on the activated line.
As a result, the "Bell" on the left reel 31 can be prevented from being missed, and the "Watermelon" on the left reel 31 can be prevented from being stop-displayed on the activated line, so that the "Small Win 04" wins. you can avoid it.

Furthermore, the pattern of the middle reel 31 constituting the "small winning combination 19" and "small winning combination 20" is one type of "bell", and the left reel 31 constituting the "small winning combination 19" and "small winning combination 20". The pattern is also one type of "bell".
In this way, when the "small win D1 condition device" is activated, the symbol combination that is correct in the pressing order at the middle first stop, but can be stopped and displayed when the pressing order is incorrect at the left second stop is set. By using only one type of pattern for each of the left reel 31 and the middle reel 31, it is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win D1 condition device" is activated.

When the stop switch 42 is operated in the pressing order of "left, middle, right (123)" when the "small win D1 condition device" is activated, the number priority is given to "small win 67" or "small win 67" with a probability of "1/8". The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 68" (one coin is paid out) is stopped and displayed on the activated line.
Specifically, as shown in FIG. 15, which will be described later, when the "small win D1 conditional device" is activated, the "replay" (PB=1) of the left reel 31 is placed in the left middle row due to the number priority at the time of the left first stop. , and at the second stop, the "black BAR" or "white BAR" (both "PB ≠ 1") of the middle reel 31 are stopped at the middle middle row, and at the third stop on the right, the right The "black BAR" (PB≠1) on the reel 31 is stopped and displayed in the middle right row.

As described above, the probability that the "black bar" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4", and the "white bar" of the middle reel 31 can be stopped and displayed in the middle middle row. The probability of being able to do so is also "1/4", and the probability of being able to stop and display the "black BAR" on the right reel 31 in the middle right row is also "1/4".
From the above, the probability that the "black BAR" or "white BAR" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/2", and the "black BAR" of the right reel 31 can be stopped and displayed in the right middle row. Since the probability that it can be displayed is ``1/4'', the probability that the symbol combination corresponding to ``minor win 67'' or ``minor win 68'' can be stopped and displayed on the active line is ``1/8''. .

Thus, when the left reel 31 is stopped first when the "small win D1 condition device" is activated, the symbol combination corresponding to the "small win 04" (10 payouts) is stopped on the effective line due to the number priority. A combination of symbols corresponding to a ``small winning combination 67'' or a ``small winning combination 68'' (one coin is paid out in each case) that pays out fewer medals than when displayed can be stop-displayed on the effective line.
Further, when the pushing order is incorrect at the time of left first stop, the symbol (watermelon) on the left reel 31 constituting the "small winning combination 04" is different from the symbol (watermelon) on the left reel 31, and the symbol "PB=1" on the left reel 31. "Replay" is stopped and displayed on the active line.
As a result, "replay" on the left reel 31 can be prevented from being missed, and "watermelon" on the left reel 31 can be prevented from being stopped and displayed on the active line, so that "small win 04" can be won. you can avoid it.

Furthermore, the pattern of the left reel 31 constituting the "small winning combination 67" and "small winning combination 68" is one type of "replay", and the pattern of the right reel 31 constituting the "small winning combination 67" and "small winning combination 68" is one type. The pattern is one type of "black BAR".
In this way, when the "small win D1 condition device" is activated, the types of symbols of the left reel 31 and the right reel 31 that constitute a symbol combination that can be stopped and displayed when the pressing order is incorrect at the left first stop are selected. By using one type for each, it is possible to reduce the number of symbol combinations that can be stopped and displayed on the active line when the "small win D1 condition device" is activated.

When the "small win D1 condition device" is activated, even when the stop switch 42 is operated in the pressing order of "right, left, middle (132)", the stop switch 42 is operated in the pressing order of "left, middle, right (123)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 67" or "small winning combination 68" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small win D1 condition device" is activated, when the stop switch 42 is operated in the order of pressing "right, left, middle (312)", the number priority is given to "small win 59" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 60" (one coin is paid out) is stopped and displayed on the activated line.

Specifically, as shown in FIG. 15, which will be described later, when the "small win D1 condition device" is activated, the "Cherry" (PB=1) on the right reel 31 is placed in the right middle stage due to the number priority at the time of the right first stop. , and at the second stop on the left, the "black BAR" (PB ≠ 1) on the left reel 31 is displayed at the middle left, and at the third stop on the middle reel 31, "red 7" or " "Blue 7" (both "PB≠1") is stopped and displayed in the middle row.

As described above, the probability that the "black bar" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "red 7" on the middle reel 31 can be stopped and displayed in the middle middle row. The probability of being able to do so is also ``1/4'', and the probability of being able to stop and display ``Blue 7'' on the middle reel 31 in the middle row is also ``1/4''.
From the above, the probability that the "black bar" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "red 7" or "blue 7" on the middle reel 31 can be stopped and displayed in the middle middle row. Since the probability that it can be displayed is "1/2", the probability that the symbol combination corresponding to "small win 59" or "small win 60" can be stopped and displayed on the activated line is "1/8". .

Thus, when the right reel 31 is stopped first when the "small win D1 conditional device" is activated, the symbol combination corresponding to the "small win 04" (10 payouts) is stopped on the effective line due to the number priority. A symbol combination corresponding to a ``small winning combination 59'' or a ``small winning winning combination 60'' (1 coin is paid out in each case) that pays out fewer medals than when displayed can be stop-displayed on the effective line.
Further, when the pressing order is incorrect at the right first stop, the symbol is different from the symbol (replay) of the right reel 31 constituting the "small win 04" and the symbol of "PB=1" of the right reel 31. is stopped on the active line.
As a result, "Cherry" on the right reel 31 can be prevented from being missed, and "Replay" on the right reel 31 can be prevented from being stopped and displayed on the active line, so that "Small win 04" can be won. you can avoid it.

Furthermore, the pattern of the left reel 31 constituting the "small winning combination 59" and "small winning combination 60" is one type of "black BAR", and the right reel 31 constituting the "small winning combination 59" and "small winning combination 60". is one type of "cherry".
In this way, the left reel 31 and the right reel 31, which constitute a combination of symbols that can be stopped and displayed when the pressing order is incorrect when the "small win D1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win D1 condition device" is activated.

Even when the stop switch 42 is operated in the pressing order of "right, middle, left (321)" when the "small win D1 condition device" is activated, the stop switch 42 is operated in the pressing order of "right, left, middle (312)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 59" or "small winning combination 60" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

As shown in FIG. 15, which will be described later, the symbol combinations that can be stopped and displayed on the active line when the "small win D1 condition device" is activated are "small win 04", "small win 19", "small win 20", "small win 59", "minor win 60", "minor win 67" or "minor win 68".
Also, the symbol combination corresponding to the "small win 04" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement.

Furthermore, the symbol combinations corresponding to the "small winning combination 19" and "small winning combination 20" are composed of symbols in which the symbols on the "2" reels 31 are arranged in a "PB=1" arrangement, and the other "1 " symbols on the reels 31 are arranged in a pattern of "PB≠1".
Furthermore, in the symbol combinations corresponding to "small win 59", "small win 60", "small win 67" and "small win 68", the symbols of "1" reels 31 are arranged "PB=1". , and the symbols on the other "2" reels 31 are arranged in a "PB≠1" arrangement.

In this way, among the symbol combinations that can be stopped and displayed on the active line when the "small win D1 condition device" is activated, "1" of the symbols on the reel 31 consist of symbols arranged in a "PB=1" arrangement, In addition, the number of symbol combinations consisting of symbols in which the symbols on the other “2” reels 31 are arranged in the “PB≠1” arrangement is “4”. Therefore, the number of symbol combinations (1 piece) consisting of symbols in which the symbols of all the “3” reels 31 are arranged in a “PB=1” arrangement, and the symbols of the “2” reels 31 are “PB=1”. , and the symbol on the other reel 31 is greater than the number of symbol combinations (two) composed of symbols in the "PB.noteq.1" arrangement.

Further, when the "small win D1 condition device" is activated and the pressing order is correct, when all the "3" reels 31 are stopped, the symbols arranged "PB=1" are stopped and displayed on the activated line. .
Furthermore, when the "small win D1 condition device" is activated, the first stop is correct, but when the second stop is incorrect, "PB = 1" is arranged at the first stop and the second stop. In the third stop, the symbols arranged in "PB≠1" are stopped and displayed on the effective line.
Furthermore, when the "small win D1 condition device" is activated, when the first stop is an incorrect answer, the symbol with "PB = 1" arrangement is stopped and displayed on the effective line at the first stop, and at the second stop And at the time of the third stop, the symbols arranged "PB.noteq.1" are stopped and displayed on the effective line.

In addition, when the "small win D1 condition device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped and displayed on the effective line (left middle row), and when the "small win D1 condition device" is activated "Bell" (PB = 1) of the middle reel 31 is stopped and displayed on the effective line (middle middle row) at the first stop of the middle reel 31, and ""Cherry" (PB=1) is stopped and displayed on the effective line (right middle row).
For this reason, when the "small win D1 condition device" of "inside 1BB-A" is activated, the symbol combination corresponding to "1BB-A" is not stopped on the active line, and "inside 1BB-B"" The symbol combination corresponding to "1BB-B" is not stopped and displayed on the effective line when the "small win D1 condition device" is activated.

"Minor combination D2 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win D2 condition device" is activated, the order of pressing "middle right left (231)" will be the correct press order, and the other press order will be the incorrect press order, just like when the "small win D1 condition device" is activated. Become.

When the stop switch 42 is operated in the pressing order of "middle right left (231)" when the "small win D2 condition device" is activated, the number priority is given to "1/1" probability (always) "small win 04 (payout of 10), the reels 31 are stopped and displayed on the active line.
When the "small hand D2 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left middle (213)", the number priority is given, with a probability of "1/2""small hand 21" or The reels 31 are stopped and controlled so that the symbol combination corresponding to the "small win 22" (one coin is paid out) is stopped and displayed on the activated line.

When the "small hand D2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small hand 69" or "small hand 69" with a probability of "1/8" The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 70" (one coin is paid out) is stopped and displayed on the activated line.
When the "small win D2 condition device" is activated, even when the stop switch 42 is operated in the pressing order of "left, middle (132)", the stop switch 42 is operated in the pressing order of "left, middle, right (123)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 69" or "small winning combination 70" (both payout 1 sheet) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small win D2 condition device" is activated, when the stop switch 42 is operated in the order of pressing "right, left, middle (312)", the number priority is given to "small win 59" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 60" (one coin is paid out) is stopped and displayed on the activated line.
When the "small win D2 condition device" is activated, even when the stop switch 42 is operated in the pressing order of "right, middle, left (321)", the stop switch 42 is operated in the pressing order of "right, left, middle (312)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 59" or "small winning combination 60" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

"Small combination D2 condition device" replaces "small combination 19" and "small combination 20" of "small combination D1 condition device" with "small combination 21" and "small combination 22", "small combination D1 condition device""Small combination 59" and "Small combination 60" are replaced with "Small combination 61" and "Small combination 62", and "Small combination 67" and "Small combination 68" of "Small combination D1 condition device" are replaced with It is replaced with "small win 69" and "small win 70".
The stop control of the reels 31 when the "small win D2 condition device" is activated is the same as the stop control of the reels 31 when the "small win D1 condition device" is activated.

The "minor combination E1 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. 7, and is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win E1 condition device" is activated, the pressing order of "right, left, middle (312)" is the correct pressing order, and the other pressing order is the incorrect pressing order.

When the stop switch 42 is operated in the pressing order of "right, left, middle (312)" when the "small win E1 condition device" is activated, the number priority is given to "small win 05" with a probability of "1/1" (always). (payout of 10), the reels 31 are stopped and displayed on the active line.
Specifically, as shown in FIG. 15, which will be described later, when the "small win E1 condition device" is activated, the "watermelon" (PB=1) on the right reel 31 is placed on the right middle stage due to the number priority at the time of the right first stop. , and at the second stop on the left, "Watermelon" (PB=1) on the left reel 31 is stopped at the middle left, and at the third stop on the middle reel, "Bell" (PB=1) on the middle reel 31 is displayed. A stop display is displayed in the middle middle row. As a result, the symbol combination corresponding to "small win 05" with "PB=1" can be stopped and displayed on the active line.

In this way, when the right reel 31 is stopped first and the left reel 31 is stopped second when the "small winning combination E1 conditional device" is activated, the "small winning combination E1 conditional device" is achieved by giving priority to the number of reels. A symbol combination corresponding to a 'small win 05' to pay out '10', which is the maximum number of medals to be paid out, is stop-displayed on the effective line.
Incidentally, as shown in FIG. 20(2), which will be described later, when the symbol combination corresponding to the "small win 05" is stopped and displayed on the active line, "Bell"-"Bell"-" bell” stops.

Further, when the right reel 31 is stopped first when the "small win E1 condition device" is activated, the "watermelon" (PB=1) on the right reel 31 is stopped and displayed in the middle right row (effective line), and then, When the left reel 31 is stopped second, "watermelon" (PB=1) on the left reel 31 is stopped and displayed in the middle left row (effective line).
Thus, when the "small win E1 condition device" is activated, when the right reel 31 is stopped first and the left reel 31 is stopped second, the "bell" of the left reel 31 is stopped and displayed in the lower left row, "Watermelon" on the left reel 31 is stopped and displayed in the middle left row, and "Cherry" or "Blank" on the left reel 31 is stopped and displayed in the upper left row.
That is, when the "small win E1 condition device" is activated, when the right reel 31 is stopped first and the left reel 31 is stopped second, "bell", "watermelon" and "cherry/blank" of the left reel 31 are displayed. is stopped and displayed in the display window 18 .

The pattern on the left reel 31 forming the "small win 05" is one type of "watermelon", and the pattern on the middle reel 31 forming the "small win 05" is one type of "bell". The pattern of the right reel 31 constituting the winning combination 05" is one kind of "watermelon".
In this way, by setting the type of symbol of each reel 31 to constitute the combination of symbols to be stopped and displayed when the "small win E1 condition device" is activated to be stopped when the "small win E1 condition device" is activated, the "minor win E1 condition device" is activated. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line at times.

When the "small win E1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "right middle left (321)", the number priority is given to "small win 23" or "small win 23" with a probability of "1/2". The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small win 24" (one coin is paid out) is stopped and displayed on the activated line.
Specifically, as shown in FIG. 15, which will be described later, when the "small win E1 condition device" is activated, the "watermelon" (PB=1) of the right reel 31 is stop-displayed in the middle right row when the right first stop is made. After that, at the middle second stop, the "replay" (PB = 1) of the middle reel 31 is played in the middle and middle stages in order to make it possible to win either the "small winning combination 23" or the "small winning combination 24" according to the number priority. stop display. After that, at the third stop on the left, "red 7" or "blue 7" (both "PB≠1") of the left reel 31 are stopped and displayed in the middle left row.

As described above, the probability that the “red 7” on the left reel 31 can be stopped and displayed in the middle left row is “1/4”, and the “blue 7” on the left reel 31 can be stopped and displayed in the middle left row. The probability that it can be done is also "1/4".
From the above, the probability that "Red 7" or "Blue 7" on the left reel 31 can be stopped and displayed in the middle left row is "1/2", so it corresponds to "Minor win 23" or "Minor win 24" The probability of being able to stop and display the combination of symbols on the active line is "1/2".

Thus, when the "small win E1 condition device" is activated, when the right reel 31 is stopped first and the middle reel 31 is stopped second, "small win 05" (10 payouts) is given priority to the number. Pays out fewer medals than when the symbol combination corresponding to is stopped and displayed on the active line. Displayable.
Further, when the pressing order is correct at the right first stop, but the pressing order is incorrect at the middle second stop, the symbol (bell) of the middle reel 31 constituting the "small winning combination 05" is different from the symbol (bell). In addition, "Replay", which is a symbol of "PB=1" on the middle reel 31, is stopped and displayed on the active line.
As a result, "replay" of the middle reel 31 can be prevented from being missed, and "bell" of the middle reel 31 can be prevented from being stopped and displayed on the active line, so that "small win 05" can be won. you can avoid it.

Furthermore, the pattern of the right reel 31 constituting the "small winning combination 23" and "small winning combination 24" is one type of "watermelon", and the pattern of the middle reel 31 constituting the "small winning combination 23" and "small winning combination 24" is one type. The pattern is one type of "replay".
In this way, when the "small win E1 condition device" is activated, the symbol combination that is correct in the pressing order at the right first stop, but can be stopped and displayed when the pressing order is incorrect at the middle second stop is set. By setting the right reel 31 and the middle reel 31 to have one kind of symbol respectively, it is possible to reduce the number of symbol combinations that can be stop-displayed on the activated line when the "small win E1 condition device" is activated.

When the "small win E1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small win 71" or "small win 71" or The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 72" (one coin is paid out) is stopped and displayed on the activated line.
Specifically, as shown in FIG. 15 to be described later, when the "small win E1 condition device" is activated, the "replay" (PB=1) of the left reel 31 is placed in the middle left row due to the number priority at the time of the left first stop. , and when the middle and second stops, "red 7" or "blue 7" (both are "PB ≠ 1") of the middle reel 31 are stopped and displayed in the middle and middle rows, and when the right and third stops, the right The "black BAR" (PB≠1) on the reel 31 is stopped and displayed in the middle right row.

As described above, the probability that the "red 7" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4", and the "blue 7" of the middle reel 31 can be stopped and displayed in the middle middle row. The probability of being able to do so is also "1/4", and the probability of being able to stop and display the "black BAR" on the right reel 31 in the middle right row is also "1/4".
From the above, the probability that "Red 7" or "Blue 7" on the middle reel 31 can be stopped and displayed in the middle middle row is "1/2", and "Black BAR" on the right reel 31 is stopped and displayed in the middle right row. Since the probability that the symbol combination corresponding to the "minor win 71" or "minor win 72" can be stopped and displayed on the active line is "1/8". .

Thus, when the left reel 31 is stopped first when the "small winning combination E1 condition device" is activated, the symbol combination corresponding to the "small winning combination 05" (10 payouts) is stopped on the effective line due to the number priority. A combination of symbols corresponding to a 'small winning combination 71' or a 'small winning combination 72' (1 coin is paid out in each case) that pays out fewer medals than when displayed can be stop-displayed on the effective line.
Further, when the pressing order is incorrect at the first left stop, the symbol is different from the symbol (watermelon) on the left reel 31 constituting the "small win 05" and the symbol "PB=1" on the left reel 31. "Replay" is stopped and displayed on the active line.
As a result, "replay" on the left reel 31 can be prevented from being missed, and "watermelon" on the left reel 31 can be prevented from being stopped and displayed on the active line, so that "small win 05" can be won. you can avoid it.

Furthermore, the pattern of the left reel 31 constituting the "small winning combination 71" and "small winning combination 72" is one type of "replay", and the pattern of the right reel 31 constituting the "small winning combination 71" and "small winning combination 72" is one type. The pattern is one type of "black BAR".
In this way, when the "small winning combination E1 condition device" is activated, the types of symbols of the left reel 31 and the right reel 31 that constitute a symbol combination that can be stopped and displayed when an incorrect answer is given in the pressing order at the left first stop are selected. By using one type for each, it is possible to reduce the number of symbol combinations that can be stopped and displayed on the active line when the "small win E1 condition device" is activated.

When the "small win E1 condition device" is activated, even when the stop switch 42 is operated in the pressing order of "right, left, middle (132)", the stop switch 42 is operated in the pressing order of "left, middle, right (123)" In the same way as when, by number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 71" or "small winning combination 72" (both are paid out one sheet) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small win E1 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", the number priority is given to "small win 43" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 46" (one coin is paid out) is stop-displayed on the activated line.
Specifically, as shown in FIG. 15, which will be described later, when the "small win E1 condition device" is activated, the "watermelon" (PB=1) of the middle reel 31 is placed in the middle and middle stages due to the number priority at the time of the middle first stop. , and at the second stop on the left, the "black BAR" or "white BAR" (both "PB ≠ 1") of the left reel 31 are stopped at the middle left row, and at the third stop on the right, the right "Red 7" or "Blue 7" (both "PB ≠ 1") of the reel 31 are stopped and displayed in the middle right row.

As described above, the probability that the "black bar" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "white bar" on the left reel 31 can be stopped and displayed in the middle left row. The probability that it can be done is also "1/4". In addition, the probability that “Red 7” on the right reel 31 can be stopped and displayed in the middle right row is also “1/4”, and the probability that “Blue 7” on the right reel 31 can be stopped and displayed in the middle right row is also “1/4”. It is "1/4".
From the above, the probability that the "black BAR" or "white BAR" on the left reel 31 can be stop-displayed in the middle left row is "1/2". Then, the probability that "Red 7" on the right reel 31 can be stop-displayed in the middle right row is "1/4", and the probability that "Blue 7" on the right reel 31 can be stop-displayed in the middle right row is also possible. Since it is "1/4", the probability that the symbol combination corresponding to "small winning combination 43" or "small winning combination 46" can be stopped and displayed on the active line is "1/8".

Thus, when the middle reel 31 is stopped first when the "small winning combination E1 condition device" is activated, the symbol combination corresponding to the "small winning combination 05" (10 payouts) is stopped on the effective line due to the number priority. A combination of symbols corresponding to a ``small winning combination 43'' or a ``small winning combination 46'' (one coin is paid out in each case) that pays out fewer medals than when displayed can be stop-displayed on the effective line.
Further, when the pressing order is incorrect at the middle first stop, the symbol is different from the symbol (bell) of the middle reel 31 constituting the "small win 05" and the symbol of "PB=1" of the middle reel 31. "Watermelon" is stopped and displayed on the effective line.
As a result, the "watermelon" on the middle reel 31 can be prevented from being missed, and the "bell" on the middle reel 31 can be prevented from being stopped and displayed on the activated line, so that the "small win 05" wins. you can avoid it.

Furthermore, the patterns of the left reel 31 constituting the "small win 43" and "small win 46" are of two types, "black BAR" and "white BAR". The symbols on the right reel 31 are two kinds of "red 7" or "blue 7", but the symbols of the middle reel 31 constituting the "small winning combination 43" and "small winning combination 46" are one kind of "watermelon". is.
In this way, the type of the symbol of the middle reel 31 constituting the symbol combination that can be stopped and displayed when the pressing order is incorrect when the "small winning combination E1 condition device" is activated is set to one type, whereby the "small winning combination E1 condition device" is provided. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the active line during operation.

When the stop switch 42 is operated in the pressing order of "middle right, left (231)" when the "small win E1 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left, right (213)" Similarly, due to the number priority, the symbol combination corresponding to "small win 43" or "small win 46" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

As shown in FIG. 15, which will be described later, the symbol combinations that can be stopped and displayed on the active line when the "small win E1 condition device" is activated are "small win 05", "small win 23", "small win 24", "small win symbol combinations corresponding to "43rd win", "46th win", "71st win", or "72nd win".
Also, the symbol combination corresponding to the "small win 05" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement.

Furthermore, the symbol combinations corresponding to the "small winning combination 23" and "small winning combination 24" are composed of symbols in which the symbols on the "2" reels 31 are arranged in a "PB=1" arrangement, and another "1 winning combination". " symbols on the reels 31 are arranged in a pattern of "PB≠1".
Further, the symbol combinations corresponding to the "small winning combination 43", "small winning combination 46", "small winning combination 71" and "small winning combination 72" are arranged such that the symbols of "1" reels 31 are "PB=1". , and the symbols on the other "2" reels 31 are arranged in a "PB≠1" arrangement.

In this way, among the symbol combinations that can be stopped and displayed on the active line when the "small win E1 condition device" is activated, "1" reel 31 symbols are composed of symbols arranged in a "PB=1" arrangement, In addition, the number of symbol combinations consisting of symbols in which the symbols on the other “2” reels 31 are arranged in the “PB≠1” arrangement is “4”. Therefore, the number of symbol combinations (1 piece) consisting of symbols in which the symbols of all the “3” reels 31 are arranged in a “PB=1” arrangement, and the symbols of the “2” reels 31 are “PB=1”. , and the symbols on the other "1" reels 31 are larger than the number of symbol combinations (two) consisting of symbols in the "PB≠1" arrangement.

Further, when the "small win E1 condition device" is actuated and the pressing order is correct, when all the three reels 31 are stopped, the symbols arranged "PB=1" are stopped and displayed on the activated line.
Furthermore, when the "small win E1 condition device" is activated, the first stop is correct, but if the second stop is incorrect, "PB = 1" is arranged at the first and second stops In the third stop, the symbols arranged in "PB≠1" are stopped and displayed on the effective line.
Furthermore, when the "small win E1 condition device" is activated, if the first stop results in an incorrect answer, the symbols with "PB = 1" arranged are stopped and displayed on the effective line at the first stop, and at the second stop And at the time of the third stop, the symbols arranged "PB.noteq.1" are stopped and displayed on the effective line.

In addition, when the "small win E1 condition device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped and displayed on the effective line (left middle row), and when the "small win E1 condition device" is activated "Watermelon" (PB = 1) on the middle reel 31 is stopped and displayed on the effective line (middle middle row) at the first stop of the middle reel 31, and " Watermelon” (PB=1) is stop-displayed on the effective line (middle right row).
For this reason, the symbol combination corresponding to "1BB-A" is not stopped on the active line when the "small win E1 condition device" is activated during "1BB-A inside", and "1BB-B inside"" The symbol combination corresponding to "1BB-B" is not stopped and displayed on the active line when the "small win E1 condition device" is activated.

The "minor combination E2 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. 7, and is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win E2 condition device" is activated, similarly to when the "small win E1 condition device" is activated, the pressing order of "right, left, middle (312)" is the correct pressing order, and the other pressing order is the incorrect pressing order. Become.

When the "small win E2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "right, left, middle (312)", the priority is given to the number of sheets, with a probability of "1/1" (always) "small win 05 (payout of 10), the reels 31 are stopped and displayed on the active line.
When the "small win E2 condition device" is activated, when the stop switch 42 is operated in the order of "right middle left (321)", the number priority is given to "small win 25" or "small win 25" with a probability of "1/2". The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 26" (one coin is paid out) is stopped and displayed on the activated line.

When the "small win E2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small win 77" or "small win 77" with a probability of "1/8". The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 78" (one coin is paid out) is stopped and displayed on the active line.
When the "small win E2 condition device" is activated, even when the stop switch 42 is operated in the pressing order of "right, left, middle (132)", the stop switch 42 is operated in the pressing order of "left, middle, right (123)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 77" or "small winning combination 78" (both one payout) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small hand E2 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", the number priority is given to "small hand 44" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 45" (one coin is paid out) is stop-displayed on the activated line.
When the stop switch 42 is operated in the pressing order of "middle right, left (231)" when the "small win E2 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left, right (213)" Similarly, due to the number priority, the symbol combination corresponding to "small winning combination 44" or "small winning combination 45" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

"Small win E2 condition device" replaces "small win 23" and "small win 24" of "small win E1 condition device" with "small win 25" and "small win 26", "small win E1 condition device"","small winning combination 43" and "small winning combination 46" are replaced with "small winning combination 44" and "small winning combination 45", and "small winning combination 71" and "small winning combination 72" of "small winning combination E1 condition device" are replaced with It is replaced with "minor win 77" and "minor win 78".
The stop control of the reels 31 when the "small win E2 condition device" is activated is the same as the stop control of the reels 31 when the "small win E1 condition device" is activated.

The "small combination F1 condition device" includes 7 types of winning combinations described in the winning combination column of FIG. 7, and when the "small combination F1 condition device" is activated, it is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small combination F1 condition device" is activated, the pressing order of "right middle left (321)" is the correct pressing order, and the other pressing order is the incorrect pressing order.

When the "small win F1 condition device" is operated, when the stop switch 42 is operated in the pressing order of "right middle left (321)", the number priority is given to the "small win F1 condition device" (always) with a probability of "1/1". The reels 31 are stopped and controlled so that the symbol combination (PB=1) corresponding to "06" (10 coins paid out) is stopped and displayed on the active line.
Specifically, as shown in FIG. 15, which will be described later, when the "small win F1 condition device" is activated, at the right first stop, the "watermelon" (PB=1) of the right reel 31 is placed in the right middle stage due to the number priority. is stop-displayed, and at the middle second stop, "replay" (PB=1) on the middle reel 31 is stop-displayed at the middle middle row, and at the left third stop, "watermelon" (PB=1) on the left reel 31 is stop-displayed. A stop display is displayed in the left middle row. As a result, the symbol combination corresponding to "small win 06" with "PB=1" can be stopped and displayed on the active line.

Thus, when the "small win F1 condition device" is activated, when the right reel 31 is stopped first, the middle reel 31 is stopped second, and the left reel 31 is stopped third, priority is given to the number of reels, A symbol combination corresponding to a ``small winning combination 06'' that pays out ``10'', which is the maximum number of medals to be paid out corresponding to a ``small winning combination F1 condition device'', is stopped and displayed on the active line.
As shown in FIG. 20 (3), which will be described later, when the symbol combination corresponding to "small win 06" is stopped and displayed on the active line, "Bell"-"Bell"-" bell” stops.

Further, when the right reel 31 is stopped first when the "small win F1 conditional device" is activated, the "watermelon" (PB=1) of the right reel 31 is stop-displayed in the middle right row (effective line), and then, When the middle reel 31 is stopped second, "Replay" (PB=1) of the middle reel 31 is stop-displayed in the middle middle row (effective line), and then when the left reel 31 is stopped third. , stop-displays "Watermelon" (PB=1) on the left reel 31 in the middle left row (effective line).

As a result, when the "small win F1 condition device" is activated, the right reel 31 is stopped first, the middle reel 31 is stopped second, and the left reel 31 is stopped third, the left reel 31 ""Bell" is stop-displayed in the lower left row, "Watermelon" on the left reel 31 is stop-displayed in the middle left row, and "Cherry" or "Blank" on the left reel 31 is stop-displayed in the upper left row.
That is, when the "small win F1 condition device" is activated, the right reel 31 is stopped first, the middle reel 31 is stopped second, and the left reel 31 is stopped third. ”, “Watermelon” and “Cherry/Blank” are stopped in the display window 18 .

In addition, the pattern of the left reel 31 that constitutes the “small win 06” is one type of “watermelon”, and the pattern of the middle reel 31 that constitutes the “small win 06” is one type of “replay”. The pattern of the right reel 31 constituting the winning combination 06" is one kind of "watermelon".
In this way, the pressing order when the "small win F1 condition device" is activated, the type of symbols of each reel 31 constituting the symbol combination to be stopped and displayed when the correct answer is correct is set to one type, respectively, so that the "small win F1 condition device" is activated. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line at times.

When the "small win F1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "right, left, middle (312)", the number priority is given to "small win 27" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 28" (one coin is paid out in each case) is stop-displayed on the activated line.
Specifically, as shown in FIG. 15, which will be described later, when the "small win F1 condition device" is activated, the "watermelon" (PB=1) of the right reel 31 is stopped and displayed in the middle right row when the right first stop is made. After that, at the second stop on the left, the "Bell" (PB=1) of the left reel 31 is placed in the middle left row in order to win either the "small win 27" or the "small win 28" based on the number priority. stop display. After that, at the middle and third stop, "red 7" or "blue 7" (both "PB ≠ 1") of the middle reel 31 are stopped and displayed in the middle stage.

As described above, the probability that the "red 7" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4", and the "blue 7" of the middle reel 31 can be stopped and displayed in the middle middle row. The probability that it can be done is also "1/4".
From the above, the probability that "red 7" or "blue 7" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/2", so it corresponds to "small win 27" or "small win 28" The probability of being able to stop and display the combination of symbols on the active line is "1/2".

Thus, when the "small win F1 condition device" is activated, when the right reel 31 is stopped first and the left reel 31 is stopped second, "small win 06" (10 payouts) is given priority to the number. Pays out fewer medals than when the symbol combination corresponding to is stopped and displayed on the activated line. Displayable.
Further, when the pressing order is correct at the right first stop, but the pressing order is incorrect at the left second stop, the symbol (watermelon) on the left reel 31 constituting the "small win 06" is different. , and the symbol "bell" of "PB=1" on the left reel 31 is stopped and displayed on the activated line.
As a result, the "Bell" on the left reel 31 can be prevented from being missed, and the "Watermelon" on the left reel 31 can be prevented from being stop-displayed on the activated line, so that the "Small Win 06" wins. you can avoid it.

Furthermore, the pattern of the right reel 31 constituting the "small winning combination 27" and the "small winning combination 28" is one type of "watermelon", and the left reel 31 constituting the "small winning combination 27" and the "small winning combination 28". The pattern is one type of "bell".
In this way, when the "small win F1 condition device" is activated, the symbol combination that is correct in the pressing order at the first right stop, but can be stopped and displayed when the pressing order is incorrect at the second stop on the left. By setting the right reel 31 and the left reel 31 to have one kind of symbol respectively, it is possible to reduce the number of symbol combinations that can be stop-displayed on the activated line when the "minor win F1 condition device" is operated.

When the "small win F1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small win 75" or "small win 75" with a probability of "1/8". The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 76" (one coin is paid out) is stopped and displayed on the activated line.

Specifically, as shown in FIG. 15 to be described later, when the "small win F1 condition device" is activated, when the left first stop, the "replay" (PB=1) of the left reel 31 is placed in the left middle row due to the number priority. , and at the second stop, the "black BAR" or "white BAR" (both "PB ≠ 1") of the middle reel 31 are stopped at the middle and middle rows, and at the third stop on the right, the right "Red 7" (PB≠1) on the reel 31 is stopped and displayed in the middle right row.

As described above, the probability that the "black bar" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/4", and the "white bar" of the middle reel 31 can be stopped and displayed in the middle middle row. The probability that it will be possible is also "1/4", and the probability that "Red 7" on the right reel 31 will be stop-displayed in the middle right row is also "1/4".
From the above, the probability that the "black BAR" or "white BAR" of the middle reel 31 can be stopped and displayed in the middle middle row is "1/2", and the "red 7" of the right reel 31 can be stopped and displayed in the right middle row. Since the probability that the symbol combination corresponding to the "minor win 75" or "minor win 76" can be stopped and displayed on the activated line is "1/8". .

Thus, when the left reel 31 is stopped first when the "small win F1 condition device" is activated, the symbol combination corresponding to the "small win 06" (10 payout) is stopped on the effective line due to the number priority. A symbol combination corresponding to a 'small winning combination 75' or a 'small winning combination 76' (1 coin is paid out in each case) that pays out fewer medals than when displayed can be stopped and displayed on the effective line.
Further, when the pressing order is incorrect at the first left stop, the symbol is different from the symbol (watermelon) of the left reel 31 constituting the "small win 06" and the symbol of "PB=1" of the left reel 31. "Replay" is stopped and displayed on the active line.
As a result, "replay" on the left reel 31 can be prevented from being missed, and "watermelon" on the left reel 31 can be prevented from being stopped and displayed on the activated line, so that "small win 06" can be won. you can avoid it.

Furthermore, the pattern of the left reel 31 constituting the "small winning combination 75" and "small winning combination 76" is one type of "replay", and the pattern of the right reel 31 constituting the "small winning combination 75" and "small winning combination 76" is one type. The pattern is one type of "Red 7".
In this way, when the "small win F1 condition device" is activated, the types of symbols of the left reel 31 and the right reel 31 that constitute a symbol combination that can be stopped and displayed when the pressing order is incorrect at the left first stop are selected. By using one type for each, it is possible to reduce the number of symbol combinations that can be stopped and displayed on the active line when the "small win F1 condition device" is activated.

When the "small win F1 condition device" is activated, the stop switch 42 is operated in the pressing order of "left, middle, right (123)" even when the stop switch 42 is operated in the pressing order of "left, middle, (132)". In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 75" or "small winning combination 76" (both payout 1 sheet) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small win F1 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", the number priority is given to "small win 39" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 40" (one coin is paid out) is stop-displayed on the activated line.
Specifically, as shown in FIG. 15, which will be described later, when the "small win F1 condition device" is activated, the "watermelon" (PB=1) of the middle reel 31 is placed in the middle and middle stages due to the number priority at the time of the middle first stop. , and at the second stop on the left, "Red 7" (PB ≠ 1) on the left reel 31 is stopped and displayed at the middle left, and at the third stop on the right, "Black BAR" on the right reel 31 or ""WhiteBAR" (both "PB≠1") is stopped and displayed in the right middle row.

As described above, the probability that the “red 7” on the left reel 31 can be stopped and displayed in the middle left row is “1/4”, and the “black BAR” on the right reel 31 can be stopped and displayed in the middle right row. The probability of being able to do so is also "1/4", and the probability of being able to stop and display the "white BAR" on the right reel 31 in the middle right row is also "1/4".
From the above, the probability that the "red 7" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "black BAR" or "white BAR" on the right reel 31 can be stopped and displayed in the middle right row. Since the probability that it can be displayed is "1/2", the probability that the symbol combination corresponding to "small win 39" or "small win 40" can be stopped and displayed on the activated line is "1/8". .

In this way, when the middle reel 31 is stopped first when the "small win F1 condition device" is activated, the symbol combination corresponding to the "small win 06" (10 payout) is stopped on the effective line due to the number priority. A symbol combination corresponding to a 'small winning combination 39' or a 'small winning combination 40' (1 coin is paid out in each case) that pays out fewer medals than when displayed can be stop-displayed on the effective line.
Further, when the pressing order is incorrect at the middle first stop, the symbol is different from the symbol (replay) of the middle reel 31 constituting the "small win 06" and the symbol of "PB=1" of the middle reel 31. "Watermelon" is stopped and displayed on the active line.
As a result, the "watermelon" of the middle reel 31 can be prevented from being missed, and the "replay" of the middle reel 31 can be prevented from being stopped and displayed on the activated line, so that the "small win 06" can be won. you can avoid it.

Furthermore, the pattern of the left reel 31 constituting the "small winning combination 39" and "small winning combination 40" is one type of "red 7", and the middle reel 31 constituting the "small winning combination 39" and "small winning combination 40". is one type of "watermelon".
In this way, the left reel 31 and the middle reel 31, which constitute a combination of symbols that can be stopped and displayed when the pushing order is incorrect when the "small win F1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win F1 condition device" is activated.

When the stop switch 42 is operated in the pressing order of "middle right and left (231)" when the "small win F1 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left and right (213)" Similarly, due to the number priority, the reels are stopped so that the symbol combination corresponding to the "small winning combination 39" or "small winning combination 40" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

As shown in FIG. 15, which will be described later, the symbol combinations that can be stopped and displayed on the active line when the "small win F1 condition device" is activated are "small win 06", "small win 27", "small win 28", "small win symbol combinations corresponding to "39", "40", "75" or "76".
The symbol combination corresponding to the "small win 06" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement.

Furthermore, the symbol combinations corresponding to the "small winning combination 27" and "small winning combination 28" are composed of symbols in which the symbols on the "2" reels 31 are arranged in a "PB=1" arrangement, and another "1 winning combination". " symbols on the reels 31 are arranged in a pattern of "PB≠1".
Furthermore, in the symbol combinations corresponding to "small win 39", "small win 40", "small win 75" and "small win 76", the symbols of "1" reels 31 are arranged "PB=1". , and the symbols on the other "2" reels 31 are arranged in a "PB≠1" arrangement.

In this way, among the symbol combinations that can be stopped and displayed on the active line when the "small win F1 condition device" is activated, "1" reel 31 symbols are arranged in a "PB=1" pattern, In addition, the number of symbol combinations consisting of symbols in which the symbols on the other “2” reels 31 are arranged in the “PB≠1” arrangement is “4”. Therefore, the number of symbol combinations (1 piece) consisting of symbols in which the symbols of all the “3” reels 31 are arranged in a “PB=1” arrangement, and the symbols of the “2” reels 31 are “PB=1”. , and the symbols on the other "1" reels 31 are larger than the number of symbol combinations (two) consisting of symbols in the "PB≠1" arrangement.

Further, when the "small win F1 condition device" is activated and the pressing order is correct, when all the "3" reels 31 are stopped, the symbols arranged "PB=1" are stopped and displayed on the activated line. .
Furthermore, when the "small win F1 condition device" is activated, the first stop is correct, but when the second stop is incorrect, "PB = 1" is arranged at the first stop and the second stop. In the third stop, the symbols arranged in "PB≠1" are stopped and displayed on the effective line.
In addition, when the "small win F1 condition device" is activated, when the first stop is incorrect, the symbol with "PB = 1" arrangement is stopped and displayed on the effective line at the first stop, and at the second stop And at the time of the third stop, the symbols arranged "PB.noteq.1" are stopped and displayed on the effective line.

In addition, when the "small win F1 condition device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped and displayed on the effective line (left middle row), and when the "small win F1 condition device" is activated "Watermelon" (PB = 1) on the middle reel 31 is stopped and displayed on the effective line (middle middle row) at the first stop of the middle reel 31, and " Watermelon” (PB=1) is stop-displayed on the effective line (middle right row).
For this reason, when the "small win F1 condition device" of "inside 1BB-A" is activated, the symbol combination corresponding to "1BB-A" is not stopped on the active line, and "inside 1BB-B"" The symbol combination corresponding to "1BB-B" is not stopped displayed on the activated line when the "small win F1 condition device" is activated.

The "small combination F2 conditional device" includes 7 types of winning combinations described in the winning combination column of FIG. 7, and is described in the winning combination column of FIG. It will be in a state of being repeatedly elected to the 7 types of small wins.
When the "small win F2 condition device" is activated, just like when the "small win F1 condition device" is activated, the pressing order of "right middle left (321)" will be the correct pressing order, and the other pressing order will be the incorrect pressing order. becomes.

When the "small win F2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "right middle left (321)", the number priority is given to "1/1" probability (always) "small win The reels 31 are stopped and controlled so that the symbol combination (PB=1) corresponding to "06" (10 coins paid out) is stopped and displayed on the active line.
When the "small win F2 condition device" is activated, when the stop switch 42 is operated in the order of "right left middle (312)", the number priority is given to "small win 29" or "small win 29" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 30" (one coin is paid out) is stop-displayed on the activated line.

When the "small win F2 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left center right (123)", the number priority is given to "small win 73" or "small win 73" with a probability of "1/8". The reels 31 are stopped and controlled so that the symbol combination corresponding to the "minor win 74" (one coin is paid out) is stopped and displayed on the active line.
When the "small win F2 condition device" is activated, even when the stop switch 42 is operated in the pressing order of "left, middle (132)", the stop switch 42 is operated in the pressing order of "left, middle, right (123)" In the same way as when, due to the number priority, with a probability of "1/8", the symbol combination corresponding to "small winning combination 73" or "small winning combination 74" (both payout 1 sheet) is stopped and displayed on the active line, The reel 31 is controlled to stop.

When the "small win F2 condition device" is activated, when the stop switch 42 is operated in the order of pressing "middle left and right (213)", the number priority is given to "small win 41" or " The reels 31 are controlled to be stopped so that the symbol combination corresponding to the "small combination 42" (one coin is paid out) is stop-displayed on the activated line.
When the stop switch 42 is operated in the pressing order of "middle right, left (231)" when the "small win F2 condition device" is activated, and when the stop switch 42 is operated in the pressing order of "middle left, right (213)" Similarly, due to the number priority, the symbol combination corresponding to "small winning combination 41" or "small winning combination 42" (both are paid out one sheet) is stopped and displayed on the active line with a probability of "1/8". 31 is controlled to stop.

"Small combination F2 condition device" replaces "small combination 27" and "small combination 28" of "small combination F1 condition device" with "small combination 29" and "small combination 30", "small combination F1 condition device""Small combination 39" and "Small combination 40" are replaced with "Small combination 41" and "Small combination 42", and "Small combination 75" and "Small combination 76" of "Small combination F1 condition device" are replaced, It is replaced with "minor win 73" and "minor win 74".
The stop control of the reels 31 when the "small win F2 conditional device" is activated is the same as the stop control of the reels 31 when the "small win F1 conditional device" is activated.

As shown in FIG. 8, the "small winning combination G condition device" includes "small winning combination 79" and "small winning combination 80" as winning combinations. ” and “Small win 80” are won.
When the "minor win G condition device" is activated, regardless of the pressing order of the stop switch 42, the symbol combination corresponding to "minor win 79" or "minor win 80" (both "PB ≠ 1") is placed on the effective line. The reel 31 is controlled to be stopped so as to stop the display.

Specifically, when the left reel 31 is stopped, the "black BAR" or "white BAR" (both "PB≠1") of the left reel 31 is stopped and displayed in the middle left row (effective line). "Cherry" (PB=1) on the reel 31 is stop-displayed in the middle middle row (effective line), and when the right stop is performed, "Watermelon" (PB=1) on the right reel 31 is stop-displayed in the right middle row (effective line). .
As described above, the probability that the "black bar" on the left reel 31 can be stopped and displayed in the middle left row is "1/4", and the "white bar" on the left reel 31 can be stopped and displayed in the middle left row. The probability that it can be done is also "1/4".

Therefore, if the operation timing of the left stop switch 42 is random, the probability that the "black BAR" or "white BAR" of the left reel 31 can be stopped and displayed in the middle left row is "1/2". The probability that the symbol combination corresponding to the "minor win 79" or "minor win 80" can be stopped and displayed on the active line is "1/2".
However, if the left stop switch 42 is operated (aiming at the "black BAR") at the timing when the "black BAR" (number 10) of the left reel 31 is displayed in the display window 18, the "black BAR" of the left reel 31 will be displayed. (No. 10) or "White BAR" (No. 15) can be stopped and displayed in the middle left row (effective line). In this case, both "Cherry" on the middle reel 31 and "Watermelon" on the right reel 31 are arranged in the "PB=1" arrangement, so that the "small winning combination 79" or "small winning combination 80" can always be won.
In addition, when the symbol combination corresponding to the "small winning combination 79" or "small winning combination 80" is stopped on the active line, "cherry" - "cherry" - "cherry" is stopped on the upper right line (inactive line). do.

As shown in FIG. 8, the "small winning combination H condition device" includes "small winning combination 81" as a winning combination. Become.
When the "small winning combination H condition device" is activated, the reels 31 are stopped so that the symbol combination (PB≠1) corresponding to the "small winning combination 81" is stopped and displayed on the active line regardless of the pressing order of the stop switch 42. Control.

Specifically, during left stop, "cherry" (PB ≠ 1) on the left reel 31 is stopped and displayed in the middle left row (effective line), and during middle stop, "cherry" (PB = 1) on the middle reel 31 is stopped and displayed. ) is stop-displayed in the middle middle row (effective line), and when the right stop is made, "cherry" (PB=1) of the right reel 31 is stop-displayed in the right middle row (effective line).
As shown in FIG. 2, the "cherries" of the left reel 31 are arranged at three positions of "4", "9" and "14". Therefore, if the left stop switch 42 is operated while any of the symbols "0" to "14" on the left reel 31 is positioned on the activated line, the "cherry" on the left reel 31 will be displayed. The left stop switch 42 is operated when any one of the symbols "15" to "19" on the left reel 31 is positioned on the effective line. Then, the "Cherry" on the left reel 31 cannot be stopped and displayed on the active line (middle left row).

Therefore, if the operation timing of the left stop switch 42 is random, the probability that the "Cherry" on the left reel 31 can be stopped and displayed on the active line (middle left row) is "3/4". The probability that the symbol combination corresponding to "81" can be stopped and displayed on the activated line is "3/4".
However, if the left stop switch 42 is operated at the timing when the "black bar" (number 10) on the left reel 31 is displayed in the display window 18 (aiming at the "black bar"), the number "9" on the left reel 31 will be displayed. Alternatively, "14""cherry" can be stopped and displayed in the middle left row (effective line). In this case, since the "Cherry" on the middle reel 31 and the right reel 31 are both arranged at "PB=1", the "small combination 81" can always be won.
When the "small winning combination 81" is won, "Cherry"-"Cherry"-"Cherry" are stop-displayed on the middle line (effective line).

As shown in FIG. 8, the ``small winning combination I condition device'' includes a ``small winning combination 82'' as a winning combination. Become.
When the "small winning combination I condition device" is activated, regardless of the pressing order of the stop switch 42, the symbol combination (PB=1) corresponding to the "small winning combination 82" is (always) with a probability of "1/1" on the effective line. The reel 31 is controlled to stop so that the stop display is made at .

Specifically, during the left stop, "Watermelon" (PB=1) on the left reel 31 is stop-displayed in the middle left row (effective line), and during the middle stop, "Watermelon" (PB=1) on the middle reel 31 is stopped and displayed. It is stop-displayed in the middle middle stage (effective line), and when the right stop is performed, the "watermelon" (PB=1) of the right reel 31 is stop-displayed in the right middle stage (effective line).
When the "small win 82" is won, "watermelon" - "watermelon" - "watermelon" are stopped and displayed on the middle line (effective line).

"Single hand ALL condition device" includes all single hand ("small hand 07" to "small hand 78") as a winning hand, and when "single hand ALL condition device" is activated, all It will be in a state of being repeatedly elected to one role.
When the "single hand ALL condition device" is activated, the symbol combination corresponding to any one of the "small hand 07" to "small hand 78" is stopped on the effective line according to the pressing order and operation timing of the stop switch 42. The reel 31 is controlled to be stopped so as to be displayed.
It should be noted that when the "1-card combination ALL condition device" is activated, any one of "small combination 07" to "small combination 78" (all "1-card payout") wins, and there is no non-winning.

The "minor win ALL condition device" includes all the minor wins ("minor win 01" to "minor win 82") as winning wins. It will be in a state of duplicate election.
When the "small win ALL condition device" is activated, the combination of symbols corresponding to any one of "small win 01" to "small win 06" is stop-displayed on the effective line according to the pressing order and operation timing of the stop switch 42. The reel 31 is controlled so as to stop.
When the "small combination ALL condition device" is activated, any one of "small combination 01" to "small combination 06" (all "10 payouts") wins, and there is no non-winning.

As shown in FIG. 8, there is only one type of "replay condition device", which is a small win and replay condition device number "18".
As shown in FIG. 8, the "replay condition device" includes "replay" as a winning combination, and when the "replay condition device" is activated, "replay" is won.
When the "replay condition device" is activated, regardless of the pressing order of the stop switch 42, the pattern combination (PB=1) corresponding to "replay" is (always) stop-displayed on the active line with a probability of "1/1". , the reel 31 is controlled to stop.

Specifically, during left stop, "replay" (PB=1) on the left reel 31 is stopped and displayed in the middle left row (effective line), and during middle stop, "replay" (PB=1) on the middle reel 31 is stopped and displayed. It is stop-displayed in the middle middle stage (effective line), and when the right stop is performed, "Replay" (PB=1) of the right reel 31 is stop-displayed in the right middle stage (effective line).
Then, when the symbol combination corresponding to "replay" is stop-displayed on the activated line, medals are automatically inserted and a replay can be executed.
When the "replay" wins, "replay" - "replay" - "replay" are stop-displayed on the middle line (valid line).

FIG. 9 shows a role item condition device. As shown in FIG. 9, in this embodiment, the role product condition device is "1BB-A condition device" corresponding to the role product condition device number "1", and " Equipped with two types of 1BB-B condition device.
As shown in FIG. 10, the "1BB-A condition device" is subject to the lottery only when two medals are inserted in the non-internal state, and is not subject to the lottery when three medals are in the non-internal state.
On the other hand, the "1BB-B condition device" is subject to the lottery only when three medals are inserted in the non-internal medium, and is not subject to the lottery when two medals are inserted in the non-internal medium.

In addition, when two non-internal medals are inserted, when winning number ``19'' is won by lottery by role lottery means 61, accessory condition device number ``1'' is generated from this winning number ``19'', The "1BB-A conditional device" corresponding to the accessory conditional device number "1" is activated.
On the other hand, when the winning number "20" is won in the lottery by the role lottery means 61 when three non-internal medals are inserted, the accessory condition device number "2" is generated from the winning number "20". Then, the "1BB-B condition device" corresponding to the accessory condition device number "2" is activated.

Further, as shown in FIG. 9, the winning combination of the "1BB-A conditional device" is set to "1BB-A", and when the "1BB-A conditional device" is operated, the winning combination of "1BB- The symbol combination corresponding to "A" can be stopped and displayed on the active line.
When the symbol combination corresponding to "1BB-A" is stopped and displayed on the active line when the "1BB-A conditional device" is activated, "1BB-A winning" is displayed, and no medals are paid out in the game this time, but in the next game. Shift from game to "1BB-A game".
On the other hand, if the symbol combination corresponding to "1BB-A" is not stop-displayed on the active line when the "1BB-A conditional device" is activated, the next game is shifted to "inside 1BB-A".

In addition, when two medals of "Inside 1BB-A" are inserted and the combination lottery means 61 does not win, the symbol combination corresponding to "1BB-A" can be stopped and displayed on the active line, but in this embodiment. Since there is no possibility of non-winning in the role lottery means 61 during ``inside 1BB-A'', once the game shifts to ``inside 1BB-A'', thereafter the symbol combination corresponding to ``1BB-A'' is an effective line. never appear to stop.

Also, during the "1BB-A game", the "RB game" is continuously executed.
In this embodiment, the symbol combination corresponding to "RB" is not set. are executed consecutively.
In addition, during the "RB game", only two types of the "single hand ALL condition device" and the "small hand ALL condition device" are the lottery targets of the hand lottery means 61, and every game, the "single hand ALL condition device" is selected. Or one of the "small win ALL condition device" is activated. Therefore, the probability of winning a small combination is higher during "RB game", that is, during "1BB-A game", than during non-internal and "1BB-A internal".

Furthermore, during the ``RB game'', the specified number (the number of medals that can be bet to start the game) becomes ``3'', and the ``1-card ALL condition device'' is activated with a probability of ``60535/65536''. , and "1" medals are paid out. Therefore, during the "RB game", that is, during the "1BB-A game", the player's medals are decreasing.
Furthermore, the “RB game” ends when “2” games are executed, “2” wins are made, or when the end condition of “1BB-A game” is satisfied. That is, the end condition of the "RB game" is set to the execution of the game "2" times, the winning of "2" times, or the fulfillment of the end condition of the "1BB-A game". It is

In addition, the ``1BB-A game'' continues until the total number of medals acquired (the number of medals paid out and the number granted) exceeds '210', and ends when the total number of medals acquired exceeds '210'. . That is, the end condition of the "1BB-A game" is set to the total number of medals obtained exceeding "210".
Then, when the "RB game" ends and the conditions for ending the "1BB-A game" are not satisfied, the "RB game" is executed again. In this way, the "RB game" is continuously executed during the "1BB-A game".
Further, when the "RB game" is completed and the end condition of the "1BB-A game" is satisfied, the "1BB-A game" is completed and the process shifts to the non-internal state.
Furthermore, when the end condition of the "1BB-A game" is satisfied during the "RB game", the "RB game" is ended, the "1BB-A game" is ended, and the transition is made to the non-internal state. do.

Further, as shown in FIG. 9, the winning combination of the "1BB-B conditional device" is set to "1BB-B", and when the "1BB-B conditional device" is activated, the winning combination of "1BB- The symbol combination corresponding to "B" can be stopped and displayed on the active line.
When the symbol combination corresponding to ``1BB-B'' is stop-displayed on the active line when the ``1BB-B condition device'' is operated, ``1BB-B wins'' and no medals are paid out in the game this time, but in the next game. Shift from game to "1BB-B game".
On the other hand, if the symbol combination corresponding to "1BB-B" is not stop-displayed on the active line when the "1BB-B conditional device" is activated, the next game is shifted to "inside 1BB-B".

In addition, when three medals of "1BB-B inside" are inserted, if the combination lottery means 61 does not win, the symbol combination corresponding to "1BB-B" can be stopped and displayed on the active line, but in this embodiment. Since there is no non-winning in the combination lottery means 61 during ``inside 1BB-B'', once it shifts to ``inside 1BB-B'', after that the symbol combination corresponding to ``1BB-B'' is the valid line. never appear to stop.

Also, during the "1BB-B game", the "RB game" is continuously executed in the same manner as the "1BB-A game".
Furthermore, the “1BB-B game” continues in the same way as the “1BB-A game” until the total number of medals won (the number of medals paid out, the number of medals awarded) exceeds “210”. When the cumulative total exceeds "210" sheets, the process ends.
Then, when the "RB game" ends and the conditions for ending the "1BB-B game" are not met, the "RB game" is executed again.
Further, when the "RB game" is completed and the end condition of the "1BB-B game" is satisfied, the "1BB-B game" is terminated and the process shifts to the non-internal state.
Furthermore, when the end condition of the "1BB-B game" is satisfied during the "RB game", the "RB game" is ended, the "1BB-B game" is ended, and the transition is made to the non-internal state. do.

FIG. 10 is a diagram (number table) showing the numbers of winning numbers for each game state in this embodiment.
In FIG. 10, "two" indicates "when two medals are inserted", and "three" indicates "when three medals are inserted". Further, "inside" indicates "inside 1BB-A" and "inside 1BB-B", and "inside 1BB" indicates "during 1BB-A playing" and "during 1BB-B playing".

Dividing the number shown in FIG. 10 by "65536" gives the winning probability of each winning number.
For example, in FIG. 10, the winning number "1" when two non-internal medals are inserted is "2500", so the winning probability of winning number "1" when two non-internal medals are inserted. becomes "2500/65536".
Also, for example, when winning number "1" is won in the lottery by the combination lottery means 61, a small winning combination and replay condition device number "1" are generated from this winning number "1", and a small winning combination and replay condition device number "1" are generated. 1” is activated.

As shown in FIG. 10, "small combination A1 condition device" to "small combination I condition device" are subject to lottery during non-internal and internal (1BB-A internal and 1BB-B internal). During 1BB (during 1BB-A game, during 1BB-B game), the lottery is not applicable.
In addition, the "1-card combination ALL condition device" is a lottery target in all game states.
Furthermore, the "small combination ALL condition device" is a lottery only during 1BB (during 1BB-A game, during 1BB-B game), contrary to "small combination A1 condition device" to "small combination I condition device" Non-internal and internal (1BB-A internal and 1BB-B internal) are not eligible for the lottery.

In addition, the "replay condition device" is a lottery target for non-internal and internal (1BB-A internal, 1BB-B internal), as with "small hand A1 condition device" to "small hand I condition device" However, during 1BB (during 1BB-A game, 1BB-B game), it will not be a lottery target.
In addition, the "1BB-A conditional device" is subject to the lottery only when two medals are inserted in the non-internal state, and is not subject to the lottery in other game states.
On the other hand, the "1BB-B condition device" is subject to the lottery only when three medals are inserted in the non-internal state, and is not subject to the lottery in other game states.

That is, when two non-internal medals are inserted, the "1BB-A condition device" is subject to the lottery, but the "1BB-B condition device" is not subject to the lottery.
On the other hand, when three non-internal medals are inserted, the "1BB-B condition device" is subject to the lottery, but the "1BB-A condition device" is not subject to the lottery.
In addition, in this embodiment, in any game state, any one of the winning numbers "1" to "20" is won in the lottery by the role lottery means 61, and there is no chance of non-winning.

Next, transition of the game state in this embodiment will be described.
FIG. 11 is a diagram showing game state transitions in this embodiment, and FIG. 12 is a diagram showing game state fluctuation conditions in this embodiment.
In FIG. 12, "∞" (infinite) in the column of the number of times means that the upper limit number of games is not set for each game state, and until the transition condition described in the column of the variation opportunity is satisfied, that game state remains in that state. means to maintain (continue)

The main control means 50 determines whether or not the condition for transitioning the game state is satisfied when all the reels 31 are stopped in each game, and when it is determined that the condition for transition of the game state is satisfied, the main control means 50 shifts the game state. Control.
First, when the RWM 53 is initialized, it transitions to non-internal. When shipped from the factory, it shifts to non-internal. When the setting key switch 152 is turned on while the power is off and the power is turned on in this state, the setting change state is entered. At this time, initialization processing of the RWM 53 is executed, and the state shifts to the non-internal state.

During non-internal, it is maintained until the "1BB-A conditional device" or "1BB-B conditional device" is activated. As described above, when two non-internal medals are inserted, the "1BB-A condition device" is selected, and when three non-internal medals are inserted, the "1BB-B condition device" is selected.
When two non-internal medals are inserted, the "1BB-A condition device" is activated (1BB-A won), and the symbol combination corresponding to "1BB-A" is stopped and displayed on the active line (1BB-A won). Then, it shifts to "1BB-A game" (1BB-A operation).
On the other hand, the "1BB-A condition device" was activated when two medals were inserted in the non-internal medium, but if the symbol combination corresponding to "1BB-A" did not stop and display on the active line, "1BB-A internal medium ”.

In addition, if "inside 1BB-A" is not won by the combination lottery means 61 when two medals are inserted, the symbol combination corresponding to "1BB-A" can be stopped and displayed on the effective line, but three medals are inserted. Sometimes, even if the combination lottery means 61 does not win, the symbol combination corresponding to "1BB-A" is not stopped and displayed on the activated line.
However, as described above, in the present embodiment, there is no non-winning in the role lottery means 61 during "inside 1BB-A". Since the symbol combination corresponding to "1BB-A" will not stop displayed on the active line, "inside 1BB-A" will continue to be maintained.

In addition, when 3 medals are inserted, the "1BB-B condition device" is activated (1BB-B won), and the symbol combination corresponding to "1BB-B" is stopped and displayed on the active line (1BB-B won). Then, it shifts to "1BB-B game" (1BB-B operation).
On the other hand, the "1BB-B condition device" was activated when three medals were inserted while not inside, but if the symbol combination corresponding to "1BB-B" did not stop and display on the active line, "1BB-B inside" ”.

In addition, when "1BB-B inside" is not won by the lottery means 61 when three medals are inserted, the symbol combination corresponding to "1BB-B" can be stopped and displayed on the effective line, but two medals are inserted. Sometimes, even if the combination lottery means 61 does not win, the symbol combination corresponding to "1BB-B" is not stopped and displayed on the effective line.
However, as described above, in the present embodiment, there is no non-winning in the role lottery means 61 during "inside 1BB-B". Since the symbol combination corresponding to "-B" is not stopped on the active line, "inside 1BB-B" is maintained.

Also, during the "1BB-A game", the "RB game" is continuously executed.
Furthermore, the “RB game” ends when “2” games are executed, “2” wins are made, or when the end condition of “1BB-A game” is satisfied.
Furthermore, the ``1BB-A game'' continues until the total number of medals acquired (the number of medals paid out and the number granted) exceeds '210', and ends when the total number of medals acquired exceeds '210'. .

Then, when the "RB game" ends and the condition for ending the "1BB-A game" is not satisfied, the "RB game" is executed again.
In addition, when the "RB game" is completed and the end condition of the "1BB-A game" is satisfied, the "1BB-A game" is completed and the transition is made to the non-internal state.
Furthermore, when the end condition of the "1BB-A game" is satisfied during the "RB game", the "RB game" is ended, the "1BB-A game" is ended, and the transition is made to the non-internal state. do.

Also, during the "1BB-B game", the "RB game" is continuously executed in the same manner as the "1BB-A game".
Furthermore, the “1BB-B game” continues in the same way as the “1BB-A game” until the total number of medals won (the number of medals paid out, the number of medals awarded) exceeds “210”. When the cumulative total exceeds "210" sheets, the process ends.

Then, when the "RB game" ends and the conditions for ending the "1BB-B game" are not met, the "RB game" is executed again.
Further, when the "RB game" ends and the end condition of the "1BB-B game" is satisfied, the "1BB-B game" is ended and the process shifts to the non-internal state.
Furthermore, when the termination condition of the "1BB-B game" is satisfied during the "RB game", the "RB game" is terminated, the "1BB-B game" is terminated, and the game shifts to the non-internal state. do.

Next, with reference to FIGS. 13 to 20, the characteristic points of the symbol combination that can be stopped and displayed when the "minor win A1 condition device" to "minor win F2 condition device" in this embodiment are activated, and the "minor win A1 condition The characteristic points of the stop control of the reel 31 at the time of operation of the "device" to "small win F2 condition device" will be described.
Fig. 13 (1) shows the left first stop when the "small win A1 condition device" is activated, the left first stop when the "small win B1 condition device" is activated, and the "small win C1 condition device" when activated FIG. 10 is a diagram showing symbols of the left reel 31 that can be stopped and displayed in the display window 18 at the first left stop.
FIG. 13(2) is a diagram showing the symbols of the left reel 31 that can be stop-displayed in the display window 18 at the time of the left second stop after the middle first stop when the "small win C1 condition device" is activated.
FIG. 14 is a diagram showing symbol combinations that can be stopped and displayed when "small win A1 condition device" to "small win C2 condition device" are activated, and FIG. 15 shows "small win D1 condition device" to "small win F2 It is a diagram showing a combination of symbols that can be stopped and displayed when the "conditional device" is activated.

FIG. 16 shows a symbol combination in which only the symbols of the middle reel 31 are arranged at "PB=1" among the symbol combinations that can be stopped and displayed when the "small win A1 condition device" to "small win F2 condition device" are activated. It is a diagram.
FIG. 17 shows a symbol combination in which only the symbols on the right reel 31 are arranged in the "PB=1" arrangement among the symbol combinations that can be stopped and displayed when the "minor win A1 condition device" to "minor win F2 condition device" are activated. It is a diagram.
FIG. 18 shows a symbol combination in which only the symbol on the left reel 31 is arranged at "PB=1" among the symbol combinations that can be stopped and displayed when the "minor win A1 condition device" to "minor win F2 condition device" are activated. It is a diagram.

FIG. 19(1) is a diagram showing the stop rolls when "small win 01" is won, and FIG. 19(2) is a diagram showing the stop rolls when "small win 02" is won. (3) is a diagram showing a stop result when winning a "small win 03".
FIG. 20(1) is a diagram showing the stop roll when "small win 04" is won, and FIG. 20(2) is a diagram showing the stop roll when "small win 05" is won. (3) is a diagram showing a stop result when winning a "small win 06".

As shown in FIG. 14, when the stop switch 42 is operated in the pressing order of "left, middle, right (123)" when the "small win A1 condition device" is activated, the probability is "1/1" due to the number priority. , the symbol combination (PB=1) corresponding to "small win 01" (10 coins paid out) is stopped and displayed on the active line.

In addition, when the "small winning combination A1 conditional device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped in the middle left row (effective line) in order to win the "small winning combination 01". display.
As a result, when the "small win A1 condition device" is activated and the left first stop is performed, as shown in FIG. 13 (1), the "black BAR" (No. There is a case where "Replay" (No. 11) on the reel 31 is stop-displayed in the middle left, and "Bell" (No. 12) on the left reel 31 is stop-displayed in the upper left.
That is, the “black bar” (number 10), “replay” (number 11) and “bell” (number 12) on the left reel 31 can be stopped and displayed in the display window 18 .

As shown in FIG. 14, when the stop switch 42 is operated in the pressing order of "right and left middle (132)" when the "small win B1 condition device" is activated, the probability is "1/1" due to the number priority. The symbol combination (PB=1) corresponding to "small win 02" (10 coins paid out) is stop-displayed on the active line.
In addition, when the "small winning combination B1 conditional device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped in the middle left row (effective line) in order to win the "small winning combination 02". display.

As a result, when the "small win B1 condition device" is activated and the left first stop is performed, as shown in FIG. 13 (1), the "black BAR" (No. There is a case where "Replay" (No. 11) on the reel 31 is stop-displayed in the middle left, and "Bell" (No. 12) on the left reel 31 is stop-displayed in the upper left.
That is, the “black bar” (number 10), “replay” (number 11) and “bell” (number 12) on the left reel 31 can be stopped and displayed in the display window 18 .

As shown in FIG. 14, when the stop switch 42 is operated in the pressing order of "middle left and right (213)" when the "small win C1 condition device" is activated, the probability of "1/1" is given by the number priority. The symbol combination (PB=1) corresponding to "small win 03" (10 coins paid out) is stop-displayed on the active line.
In addition, when the "small winning combination C1 condition device" is activated, the "bell" (PB=1) of the intermediate reel 31 is stopped at the middle middle stage (effective line) in order to win the "small winning combination 03". After that, at the second stop on the left, the "bell" (PB=1) of the left reel 31 is stop-displayed in the middle left row (effective line) in order to win the "small win 03".

As a result, when the "small win C1 condition device" is activated, at the time of the left second stop after the middle first stop, as shown in FIG. , "Bell" (No. 12) on the left reel 31 is stop-displayed at the middle left stage, and "Watermelon" (No. 13) on the left reel 31 is stop-displayed at the upper left stage.
That is, "Replay" (No. 11), "Bell" (No. 12), and "Watermelon" (No. 13) on the left reel 31 can be stopped and displayed in the display window 18. FIG. Also, the "black bar" (number 10) on the left reel 31 is not stopped and displayed in the display window 18. - 特許庁

As shown in FIG. 14, when the stop switch 42 is operated in the pressing order of "left, middle, right (123)" when the "small win C1 condition device" is activated, the probability is "1/8" due to the number priority. to stop and display the symbol combination corresponding to "small winning combination 63" or "small winning combination 64" (one payout in each case) on the active line.
Further, at the left first stop when the "small win C1 condition device" is activated, "Replay" (PB=1) of the left reel 31 is performed in order to win "small win 63" or "small win 64". A stop display is displayed in the left middle row.

As a result, when the "small win C1 condition device" is activated and the left first stop is performed, as shown in FIG. 13 (1), the "black BAR" (No. There is a case where "Replay" (No. 11) on the reel 31 is stop-displayed in the middle left row, and "Bell" (12) on the left reel 31 is stop-displayed in the upper left row.
That is, the “black bar” (number 10), “replay” (number 11) and “bell” (number 12) on the left reel 31 can be stopped and displayed in the display window 18 .

In this way, when the "small combination A1 condition device" is activated, the left first stop, when the "small combination B1 condition device" is activated, and when the "small combination C1 condition device" is activated, the left first When stopped, as shown in FIG. 13(1), "black bar" (number 10), "replay" (number 11) and "bell" (number 12) on the left reel 31 can be stopped and displayed in the display window 18. and
As a result, it is possible to prevent the operating condition device (lottery result of the combination lottery means 61) from being guessed from the position of the pattern of the left reel 31 stopped and displayed in the display window 18 at the time of left first stop. .

Further, when the "small win C1 condition device" is activated, at the time of the left second stop after the middle first stop, as shown in FIG. (No. 12) and "Watermelon" (No. 13) can be stop-displayed in the display window 18, and "Black BAR" (No. 10) on the left reel 31 is not stop-displayed in the display window 18. - 特許庁
In this way, when the "small win C1 condition device" is activated, the left first stop (when the pushing order is incorrect) and the left second stop after the middle first stop (when the pushing order is correct) Different symbols on the reels 31 are stopped and displayed in the display window 18.例文帳に追加

Then, when the "small win C1 condition device" is activated and the left first stop (when the pushing order is incorrect), the pattern is different from the pattern (bell) of the left reel 31 constituting the "small win 03", and "Replay", which is a symbol of "PB=1" on the left reel 31, is stop-displayed on the activated line.
As a result, the "replay" on the left reel 31 can be prevented from being missed, and the "bell" on the left reel 31 can be prevented from being stop-displayed on the active line, so that the "small win 03" wins. you can avoid it.

Furthermore, the pattern of the left reel 31 constituting the "small winning combination 63" and "small winning combination 64" is one type of "replay", and the pattern of the right reel 31 constituting the "small winning combination 63" and "small winning combination 64" is one type. The pattern is one type of "Red 7".
In this way, the types of symbols of the left reel 31 and the right reel 31, which constitute a symbol combination that can be stopped and displayed when the left first stop (when the pushing order is incorrect) when the "small win C1 condition device" is activated, are set respectively. By using one type, it is possible to reduce the number of symbol combinations that can be stopped and displayed on the active line when the "small win C1 condition device" is activated.

Furthermore, the probability that the "red 7" of the middle reel 31 constituting the "minor win 63" and "minor win 64" can be stopped and displayed on the activated line is "1/4", and the "minor win 63" and "minor win 64" The probability that ``Blue 7'' of the middle reel 31 constituting the ``small winning combination 64'' can be stopped and displayed on the active line is also ``1/4'', and constitutes the ``small winning combination 63'' and the ``small winning combination 64''. The probability that "Red 7" on the right reel 31 can be stopped and displayed on the active line is also "1/4".
As a result, it is possible to reduce the winning probability (acquisition rate) of the one-piece role when the pressing order is incorrect when the "small win C1 condition device" is activated to "1/8". Since it can be lowered, the degree of freedom in design can be improved.

Also, as shown in FIG. 14, when the stop switch 42 is operated in the pressing order of "left, middle, right" when the "small win A1 condition device" is activated, that is, the left reel 31 is first stopped, and then the second. When the middle reel 31 is stopped first, and the right reel 31 is stopped thirdly, "10", which is the maximum number of medals to be paid out corresponding to the "small win A1 condition device", is paid out. The symbol combination corresponding to "small win 01" is stop-displayed on the active line.
Furthermore, the pattern on the left reel 31 forming the "small win 01" is one type of "replay", and the pattern on the middle reel 31 forming the "small win 01" is one type of "bell". The pattern of the right reel 31 constituting the "small win 01" is one kind of "watermelon".

Furthermore, the “Replay” on the left reel 31 forming the “small win 01” is arranged in the “PB=1” arrangement, and the “bell” on the middle reel 31 forming the “small win 01” is also arranged in the “PB=1”. The "watermelon" on the right reel 31, which constitutes the "small winning combination 01", also has the "PB=1" arrangement.
In this way, the symbols of the respective reels 31 constituting the symbol combination to be stopped and displayed when the "small win A1 condition device" is activated are arranged in the "PB=1" arrangement, and the "small win A1 condition device" is arranged. The combination of symbols that can be stopped and displayed on the effective line when the ``small win A1 condition device'' is activated is provided by setting one kind of symbols for each reel 31 constituting the symbol combination to be stopped and displayed when the pressing order is correct in operation. can be reduced.

The "small win A2 condition device" is the same as the "small win A1 condition device".
As shown in FIG. 14, when the stop switch 42 is operated in the order of "left, middle, right" when the "small win A2 condition device" is activated, that is, the left reel 31 is stopped first, and the middle win is second. When the reel 31 is stopped and the right reel 31 is stopped thirdly, the maximum number of medals to be paid out corresponding to the "small win A2 condition device" is "10". The symbol combination corresponding to "01" is stopped and displayed on the active line.
As described above, the symbols on the reels 31 forming the "small win 01" are arranged in the "PB=1" arrangement, and the types of symbols on the reels 31 forming the "small win 01" are one type. . This makes it possible to reduce the number of symbol combinations that can be stopped and displayed on the activated line when the "small win A2 condition device" is activated.

In addition, as described above, a straight line passing through "upper left" - "upper middle" - "upper right" is defined as "upper line", and passes through "middle left" - "middle middle" - "middle right". A straight line is referred to as a "middle line", and a straight line passing through "lower left" - "lower middle" - "lower right" is referred to as a "lower line". Furthermore, the straight line passing through "upper left" - "middle middle" - "lower right" is defined as "right downward line", and the straight line passing through "lower left" - "middle middle" - "upper right" Let the line be the "right rising line", and let the small chevron-shaped line passing through the "lower left" - "middle middle" - "lower right" be the "mountain line". In this embodiment, only the "middle line" is the "effective line", and the others are "ineffective lines".

Then, as shown in FIG. 19(1), when the symbol combination corresponding to "small winning combination 01"("replay"-"bell"-"watermelon") is stopped on the active line ("small winning combination 01" When a prize is won), ``Bell'' - ``Bell'' - ``Bell'' is stopped and displayed on the ``downward right line'' (invalid line) passing through ``upper left row'', ``middle middle row'', and ``lower right row''.
Also, as shown in FIG. 19 (2), when the symbol combination ("replay" - "cherry" - "replay") corresponding to "small winning combination 02" is stopped on the active line ("small winning combination 02" When a prize is won), ``Bell'' - ``Bell'' - ``Bell'' is stopped and displayed on the ``upper line'' (invalid line) passing through ``upper left row'', ``middle upper row'', and ``upper right row''.

Furthermore, the symbol combination corresponding to the "small winning combination 03" is "Bell"-"Bell"-"Bell". ``Bell'' - ``Bell'' - ``Bell'' is displayed in a stopped state on the line (valid line).
Furthermore, as shown in FIG. 20 (1), when the symbol combination (“watermelon”-“bell”-“replay”) corresponding to “small winning combination 04” is stopped on the active line (“small winning combination 04” When a prize is won), ``Bell'' - ``Bell'' - ``Bell'' is stopped and displayed on the ``right rising line'' (invalid line) passing through the ``lower left row'', ``middle middle row'', and ``upper right row''.

Further, as shown in FIG. 20(2), when the symbol combination (“watermelon”-“bell”-“watermelon”) corresponding to “small winning combination 05” is stopped on the active line (“small winning combination 05” When a prize is won), ``Bell'' - ``Bell'' - ``Bell'' is stopped and displayed on the ``Mountain line'' (invalid line) passing through ``Lower left row'', ``Middle middle row'', and ``Lower right row''.
Furthermore, as shown in FIG. 20(3), when the symbol combination ("watermelon"-"replay"-"watermelon") corresponding to "small winning combination 06" is stopped on the activated line ("small winning combination 06" , the ``bell'' - ``bell'' - ``bell'' is stopped and displayed on the ``lower line'' (invalid line) passing through the ``lower left row'', ``middle lower row'', and ``lower right row''.

Further, as shown in FIG. 20(1), when the symbol combination corresponding to the "small win 04" is stopped and displayed on the active line (when the "small win 04" is won), the left reel 31 "Cherry" is displayed. is stopped in the display window 18 (upper left).
Furthermore, as shown in FIG. 20(2), when the symbol combination corresponding to the "small winning combination 05" is stopped and displayed on the active line (when the "small winning combination 05" is won), the left reel 31 "cherry ” is stopped in the display window 18 (upper left).

Furthermore, as shown in FIG. 20(3), when the symbol combination corresponding to the "minor win 06" is stopped and displayed on the active line (when the "minor win 06" is won), the left reel 31 "cherry" is stopped in the display window 18 (upper left).
In this embodiment, the symbol combination that can be stop-displayed on the active line when the "Cherry" on the left reel 31 is stop-displayed in the display window 18 is stop-displayed on the active lines of the middle reel 31 and the right reel 31. It is not a winning pattern combination regardless of the pattern that is played.
Further, in the present embodiment, when "Cherry" on the left reel 31 is stop-displayed on the active line, there is no winning symbol combination regardless of the symbols stop-displayed on the active lines of the middle reel 31 and the right reel 31. . That is, it does not have a so-called single reel winning combination in which, when a predetermined symbol on the left reel 31 is stopped and displayed on the activated line, a prize is won regardless of the symbols stopped and displayed on the activated line on the middle reel 31 and the right reel 31. .

In addition, in the present embodiment, there is a case where "cherry" of the left reel 31 is stopped and displayed in the display window 18 at the first stop on the left when the "small win A1 condition device" to "small win F2 condition device" are activated. However, there is a case where "Cherry" on the left reel 31 is stopped and displayed in the display window 18 when the pressing order is correct when the "small win D1 condition device" to "small win F2 condition device" are activated.

Here, in this embodiment, the AT lottery is executed in the game in which the winning number "13" or "14" is won in the lottery by the role lottery means 61. FIG. In addition, in the game where the winning number "13" is won, the "small win G condition device" is activated, and "small win 79" or "small win 80" ("Cherry" is aligned on the upward right line (invalid line). ) can be won, and in the game in which the winning number “14” is won, the “small win H condition device” is activated and “small win 81” (“Cherry” is aligned on the middle line (effective line)) wins. It becomes possible. Therefore, when "cherries" are aligned on the upper right line (invalid line) or the middle line (valid line), the player expects to win the AT lottery.

In addition, in the conventional slot machine 10, a combination related to cherry and a special combination (bonus) are simultaneously won (double winning) in a combination lottery, or an AT lottery is performed when a combination related to cherry is won, and a combination related to cherry is won. When "Cherry" on the left reel 31 is stopped and displayed in the display window 18 (upper left, middle left, or lower left) in the game, the cherry is displayed regardless of the stop display symbols on the active lines of the middle reel 31 and the right reel 31. Known to win prizes for roles. In such a slot machine 10, when "Cherry" on the left reel 31 is stopped and displayed in the display window 18 and a combination related to Cherry is won, the player expects to win a special combination or an AT lottery.

However, in the present embodiment, there is a case where the "cherry" of the left reel 31 is stopped and displayed in the display window 18 even when the pressing order is correct when the "small win D1 condition device" to "small win F2 condition device" are activated. However, at this time, the left reel 31 is at the second stop or the third stop, and at that time two or three "bells" are aligned on the invalid line.
As a result, the player is made to recognize that he/she has won a winning combination related to the bell, and even if "Cherry" on the left reel 31 is stopped and displayed in the display window 18, excessive expectations of winning the AT lottery, etc. I try not to let

As described above, in the example shown in FIG. 20(1), "CHERRY" on the left reel 31 is stopped and displayed in the display window 18 (upper left). There is a symbol combination corresponding to "small win 04". The symbol combination corresponding to the "small winning combination 04" is "watermelon"-"bell"-"replay", which is a winning symbol regardless of the stop display symbols on the active lines of the middle reel 31 and the right reel 31. not a combination. That is, the stop roll shown in FIG. 20(1) is not a stop roll that results in a win for cherries, nor is it a stop roll that results in a so-called single reel win. The stop outcomes shown in FIGS. 20(2) and (3) are the same as the stop outcomes shown in FIG. 20(1).

Further, as shown in FIG. 14, the symbol combinations that can be stopped and displayed on the active line when the "small win A1 condition device" is activated are "small win 01", "small win 07", "small win 08", and "small win 08". These are symbol combinations corresponding to "31st win", "32nd win", "53rd win", or "54th win".
Also, the symbol combination corresponding to the "small win 01" is a symbol combination in which the symbols of all the "3" reels 31 are arranged in the "PB=1" arrangement. The symbol combination corresponding to "small win 01" can be stopped and displayed when the pressing order is correct.

Furthermore, the symbol combinations corresponding to the "small winning combination 07" and "small winning combination 08" are composed of symbols in which the symbols on the "2" reels 31 are arranged in a "PB=1" arrangement, and another "1 winning combination". " symbols on the reels 31 are arranged in a pattern of "PB≠1". The symbol combinations corresponding to the "small winning combination 07" and "small winning combination 08" are correct in the pressing order at the first stop, but can be stop-displayed when the pressing order is incorrect at the second stop.
Further, the symbol combinations corresponding to the "small winning combination 31", "small winning combination 32", "small winning combination 53" and "small winning combination 54" are arranged such that the symbols of "1" reels 31 are "PB=1". , and the symbols on the other "2" reels 31 are arranged in a "PB≠1" arrangement. The symbol combinations corresponding to "small winning combination 31", "small winning combination 32", "small winning combination 53" and "small winning combination 54" can be stop-displayed when the pressing order is incorrect in the first stop.

In this way, among the symbol combinations that can be stopped and displayed on the active line when the "small win A1 condition device" is activated, "1" of the symbols on the reels 31 are composed of symbols arranged in a "PB=1" arrangement, In addition, the number of symbol combinations consisting of symbols in which the symbols on the other “2” reels 31 are arranged in the “PB≠1” arrangement is “4”. Therefore, the number of symbol combinations (1 piece) consisting of symbols in which the symbols of all the “3” reels 31 are arranged in a “PB=1” arrangement, and the symbols of the “2” reels 31 are “PB=1”. , and the symbols on the other "1" reels 31 are larger than the number of symbol combinations (two) consisting of symbols in the "PB≠1" arrangement.

Further, when the "small win A1 condition device" is actuated and the pushing order is correct, when all the "3" reels 31 are stopped, the symbols arranged "PB=1" are stopped and displayed on the effective line. .
Furthermore, when the "small win A1 condition device" is activated, the first stop is correct, but if the second stop is incorrect, "PB = 1" is arranged at the first stop and the second stop. In the third stop, the symbols arranged in "PB≠1" are stopped and displayed on the effective line.
Furthermore, when the "small win A1 condition device" is activated, if the first stop results in an incorrect answer, the symbol with "PB = 1" arrangement is stopped and displayed on the effective line at the first stop, and at the second stop And at the time of the third stop, the symbols arranged "PB.noteq.1" are stopped and displayed on the effective line.

The symbol combination that can be stopped and displayed on the active line when each of the conditional devices of "small win A2 condition device" to "small win F2 condition device" is activated is the same as that of "small win A1 condition device".
The symbol combination that can be stopped and displayed on the active line when each conditional device of "small win A2 condition device" to "small win F2 condition device" is activated is that the symbols of "1" reel 31 are arranged at "PB=1". and the symbols on the other “2” reels 31 are arranged “PB≠1”, A symbol combination consisting of symbols arranged in "1" arrangement and symbols on other "1" reels 31 are arranged in "PB≠1" arrangement, and symbols on "3" reels 31. has a symbol combination consisting of symbols arranged in a "PB=1" arrangement.

In addition, among the symbol combinations that can be stopped and displayed on the effective line when each conditional device of "small win A2 condition device" to "small win F2 condition device" is activated, the symbol of "1" reel 31 is "PB = 1 , and the symbols on the other "2" reels 31 are arranged in the "PB≠1" arrangement.
Furthermore, among the symbol combinations that can be stopped and displayed on the effective line when each of the conditional devices of "small win A2 condition device" to "small win F2 condition device" is activated, the symbols of "2" reels 31 are "PB = The number of symbol combinations consisting of symbols arranged in the “1” arrangement and symbols in which the symbols on the other “1” reels 31 are arranged in the “PB≠1” arrangement is “2”.

Furthermore, among the symbol combinations that can be stopped and displayed on the effective line when each conditional device of "small win A2 condition device" to "small win F2 condition device" is activated, the symbols of "3" reels 31 are "PB = 1 The number of symbol combinations consisting of symbols arranged in the "" arrangement is "1".
"1" reel 31 is composed of symbols arranged in "PB=1" arrangement, and other "2" reels 31 are composed of symbols arranged in "PB≠1" arrangement. The number of symbol combinations consisting of "2" reels 31 is composed of symbols arranged in a "PB=1" arrangement, and the other "1" reel 31 symbols are arranged in a "PB≠1" pattern. The number of symbol combinations consisting of arranged symbols, and the number of symbol combinations consisting of symbols arranged in "3" reels 31 are greater than the number of symbol combinations consisting of symbols arranged in "PB=1".

Further, as shown in FIG. 14, when the left reel 31 is first stopped when the "small win A1 condition device" is activated, medals corresponding to the "small win A1 condition device" are displayed according to the subsequent stopping operation. The symbol combination corresponding to the 'small win 01' paying out '10' which is the maximum value among the number of payouts can be stop-displayed on the activated line.
Furthermore, as shown in FIG. 14, when the middle reel 31 is first stopped when the "small winning combination A1 condition device" is activated, the symbol combination corresponding to the "small winning combination 01" is displayed according to the subsequent stopping operation. is stop-displayed on the effective line.
Further, as shown in FIG. 14, when the right reel 31 is first stopped when the "small win A1 condition device" is activated, the symbol combination corresponding to the "small win 01" is displayed according to the subsequent stop operation. A symbol combination corresponding to a 'small winning combination 53' or a 'small winning combination 54' that pays out '1' medals less than when stopped and displayed on the valid line can be stopped and displayed on the valid line.

Further, as shown in FIG. 14, the symbol of the middle reel 31 constituting the symbol combination corresponding to the "small winning combination 31" and the "small winning combination 32" is "watermelon". The "watermelon" on the middle reel 31 has a different symbol from the symbol (bell) on the middle reel 31 constituting the symbol combination corresponding to the "small winning combination 01", and is arranged at "PB=1" on the middle reel 31. It is a pattern that is
As a result, it is possible to prevent the "watermelon" on the middle reel 31 from being missed when the pushing order is incorrect at the middle first stop when the "small win A1 condition device" is activated, and the "bell" on the middle reel 31 ” can be prevented from being statically displayed on the activated line, so that “small win 01” can be prevented from winning.

In addition, the symbol of the left reel 31 constituting the symbol combination corresponding to the "small win 31" and "small win 32" is one kind of "red 7", corresponding to the "small win 31" and "small win 32". The symbol of the middle reel 31 constituting the symbol combination to be played is one kind of "watermelon".
In this way, the left reel 31 and the middle reel 31, which constitute a combination of symbols that can be stopped and displayed when the pushing order is incorrect when the "small win A1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win A1 condition device" is activated.

Further, as shown in FIG. 14, the symbol on the right reel 31 constituting the symbol combination corresponding to the "small winning combination 53" and "small winning combination 54" is "cherry". The "cherry" on the right reel 31 has a different symbol from the symbol (watermelon) on the right reel 31 constituting the symbol combination corresponding to the "small win 01", and is arranged at "PB=1" on the right reel 31. It is a pattern that is
As a result, when the "small win A1 condition device" is activated and the pressing order is incorrect due to the right first stop, it is possible to prevent the "cherry" on the right reel 31 from being missed, and the "watermelon" on the right reel 31. ” can be prevented from being statically displayed on the activated line, so that “small win 01” can be prevented from winning.

In addition, the symbol of the left reel 31 constituting the symbol combination corresponding to the "small winning combination 53" and "small winning combination 54" is one kind of "white BAR", corresponding to the "small winning combination 53" and "small winning combination 54". The symbol of the right reel 31 constituting the symbol combination to be played is one kind of "Cherry".
In this way, the left reel 31 and the right reel 31, which constitute a combination of symbols that can be stopped and displayed when the pressing order is incorrect when the "small win A1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win A1 condition device" is activated.

Further, as shown in FIG. 14, when the middle reel 31 is first stopped when the "small win C1 condition device" is activated, medals corresponding to the "small win C1 condition device" are displayed according to the subsequent stop operation. The combination of symbols corresponding to the 'small win 03' which pays out '10', which is the maximum value among the number of payouts, can be stop-displayed on the effective line.
Furthermore, as shown in FIG. 14, when the left reel 31 is first stopped when the "small win C1 condition device" is activated, the symbol combination corresponding to the "small win 03" is displayed according to the subsequent stopping operation. A symbol combination corresponding to a 'minor winning combination 63' or 'small winning combination 64' that pays out '1' medals less than when is stopped and displayed on the activated line can be stopped and displayed on the activated line.

Further, as shown in FIG. 14, the symbol on the left reel 31 forming the symbol combination corresponding to the "minor win 63" and "minor win 64" is "replay". The "replay" on the left reel 31 has a different symbol from the symbol (bell) on the left reel 31 constituting the symbol combination corresponding to the "small win 03", and is arranged at "PB=1" on the left reel 31. It is a pattern that is
As a result, when the pressing order is incorrect at the left first stop when the "small win C1 condition device" is activated, it is possible to prevent the "replay" of the left reel 31 from being missed, and the "bell" of the left reel 31 ” can be prevented from being stopped and displayed on the activated line, so that “small win 03” can be prevented from winning.

Further, as shown in FIG. 14, the symbols of the middle reels 31 forming the symbol combinations corresponding to the "minor win 63" and "minor win 64" are "red 7" and "blue 7". Both "red 7" and "blue 7" on the middle reel 31 have different symbols from the symbols (bell) on the middle reel 31 constituting the symbol combination corresponding to the "small winning combination 03". 31, it is a pattern that has a "PB≠1" arrangement.
Furthermore, as shown in FIG. 14, the symbol of the right reel 31 constituting the symbol combination corresponding to the "minor win 63" and "minor win 64" is "red 7". "Red 7" on the right reel 31 has a different symbol from the symbol (bell) on the right reel 31 constituting the symbol combination corresponding to "small win 03", and "PB≠1" on the right reel 31. It is a pattern that is arranged.

The symbols on the left reel 31 forming the symbol combination corresponding to the "minor win 63" and "minor win 64" are one type of "replay" and correspond to the "minor win 63" and "minor win 64". The symbol of the right reel 31 constituting the symbol combination is one kind of "red 7".
In this way, the left reel 31 and the right reel 31, which constitute a combination of symbols that can be stopped and displayed when the pressing order is incorrect when the "small win C1 condition device" is activated, are each made to have one type of symbol type. It is possible to reduce the number of symbol combinations that can be stopped and displayed on the effective line when the "small win C1 condition device" is activated.

Further, as shown in FIG. 2, the left reel 31 has a portion where "black bar" (number 10), "replay" (number 11) and "bell" (number 12) are arranged in order. .
Furthermore, as shown in FIG. 13 (1), when the "small win C1 condition device" is activated and the left first stop is performed, the left reel 31 "black BAR" (No. 10), "replay" (No. 11) and "Bell" (No. 12) can be stopped and displayed in the display window 18. - 特許庁
Further, among the "black BAR" (No. 10), "replay" (No. 11) and "bell" (No. 12) on the left reel 31, the "replay" stop-displayed in the middle left row is the "small win 63". and the symbols of the left reel 31 forming the symbol combination corresponding to the "minor win 64".

Then, as shown in FIG. 13 (1), when the "small win A1 condition device" is activated and the left first stop is activated, and when the "small win B1 condition device" is activated, the "small win C1 Similarly to the left first stop when the condition device is activated, the left reel 31 "black BAR" (No. 10), "Replay" (No. 11) and "Bell" (No. 12) are stopped in the display window 18 Displayable.
As a result, it is possible to prevent the operating condition device (lottery result of the combination lottery means 61) from being guessed from the position of the pattern of the left reel 31 stopped and displayed in the display window 18 at the time of left first stop. .

Further, as shown in FIG. 14, "small win A1 condition device" to "small win B2 condition device" have "left middle right" or "left middle right" as the correct pressing order. That is, the "small win A1 conditional device" to "small win B2 conditional device" are correct in the pressing order at the time of the left first stop.
Here, the "minor win A1 condition device" to "minor win B2 condition device" are referred to as "right first stop correct group".

Symbol combinations corresponding to "small win 31", "small win 32", "small win 53" and "small win 54" among the symbol combinations that can be stopped and displayed on the effective line when the "small win A1 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.
Among the symbol combinations that can be stopped and displayed on the effective line when the "small winning combination A2 condition device" is activated, the symbol combination corresponding to "small winning combination 33", "small winning combination 34", "small winning combination 49" and "small winning combination 50". is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.

Symbol combinations corresponding to "small win 35", "small win 36", "small win 47" and "small win 48" among the symbol combinations that can be stopped and displayed on the effective line when the "small win B1 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.
Symbol combinations corresponding to "small win 37", "small win 38", "small win 57" and "small win 58" among the symbol combinations that can be stopped and displayed on the effective line when the "small win B2 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.

As described above, among the symbol combinations that can be stopped and displayed on the active line when the conditional device is activated, the symbol of "1" reel 31 is arranged in "PB=1". The number of symbol combinations is "16", which is composed of the symbols on the other "2" reels 31 arranged in the "PB≠1" arrangement.

Further, as shown in FIGS. 14 and 15, "small win C1 condition device" to "small win D2 condition device" have "middle left/right" or "middle right/left" as correct pressing order. That is, the "small win C1 condition device" to "small win D2 condition device" are correct in the pressing order at the time of the middle first stop.
Here, the "minor win C1 condition device" to "minor win D2 condition device" are referred to as "middle first stop correct group".

Symbol combinations corresponding to "small win 51", "small win 52", "small win 63" and "small win 64" among the symbol combinations that can be stopped and displayed on the effective line when the "small win C1 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.
Symbol combinations corresponding to "small win 55", "small win 56", "small win 65" and "small win 66" among the symbol combinations that can be stopped and displayed on the effective line when the "small win C2 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.

Symbol combinations corresponding to "small win 59", "small win 60", "small win 67" and "small win 68" among the symbol combinations that can be stopped and displayed on the effective line when the "small win D1 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.
Symbol combinations corresponding to "small win 61", "small win 62", "small win 69" and "small win 70" among the symbol combinations that can be stopped and displayed on the effective line when the "small win D2 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.

As described above, among the symbol combinations that can be stopped and displayed on the active line when the conditional device is activated, which is included in the "middle first stop correct group", the symbol of "1" reel 31 is arranged "PB=1". The number of symbol combinations is "16", which is composed of the symbols on the other "2" reels 31 arranged in the "PB≠1" arrangement.

Further, as shown in FIG. 15, "small win E1 condition device" to "small win F2 condition device" have "right left middle" or "right middle left" as the correct pressing order. That is, "small win E1 conditional device" to "small win F2 conditional device" are correct in the pressing order at the time of the right first stop.
Here, the "minor win E1 condition device" to "minor win F2 condition device" are referred to as "right first stop correct group".

Symbol combinations corresponding to "small win 43", "small win 46", "small win 71" and "small win 72" among the symbol combinations that can be stopped and displayed on the effective line when the "small win E1 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.
Symbol combinations corresponding to "small win 44", "small win 45", "small win 77" and "small win 78" among the symbol combinations that can be stopped and displayed on the effective line when the "small win E2 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.

Symbol combinations corresponding to "small win 39", "small win 40", "small win 75" and "small win 76" among the symbol combinations that can be stopped and displayed on the effective line when the "small win F1 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.
Symbol combinations corresponding to "small win 41", "small win 42", "small win 73" and "small win 74" among the symbol combinations that can be stopped and displayed on the effective line when the "small win F2 condition device" is activated. is composed of "1" reel 31 symbols arranged in "PB=1" arrangement, and other "2" reels 31 symbols arranged in "PB≠1" arrangement. It is a symbol combination consisting of.

As described above, among the symbol combinations that can be stopped and displayed on the active line when the conditional device is activated, the symbol of "1" reel 31 is arranged in the "PB=1" arrangement. The number of symbol combinations is "16", which is composed of the symbols on the other "2" reels 31 arranged in the "PB≠1" arrangement.

Further, as shown in FIGS. 14 and 15, "small combination C1 condition device" to "small combination F2 condition device" can be "middle left and right", "middle right left", "right left middle" or "right middle left" The correct answer should be pressed in order. That is, "small win C1 conditional device" to "small win F2 conditional device" are incorrect in the pressing order at the time of the left first stop.
Here, the "minor win C1 condition device" to "minor win F2 condition device" are referred to as "left first stop incorrect answer group".

Of the symbol combinations that can be stopped and displayed on the activated line when the "small win C1 condition device" is activated, the symbol combinations corresponding to "small win 63" and "small win 64" are those in which the left reel 31 symbol is "PB=1." , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win C2 condition device" is activated, the symbol combinations corresponding to "small win 65" and "small win 66" are those in which the left reel 31 symbol is "PB=1." , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the active line when the "small winning combination D1 condition device" is activated, the symbol combination corresponding to "small winning combination 67" and "small winning combination 68" has the symbol "PB=1" on the left reel 31. , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win D2 condition device" is activated, the symbol combinations corresponding to "small win 69" and "small win 70" are the symbols on the left reel 31 of "PB=1." , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the activated line when the "small winning combination E1 condition device" is activated, the symbol combinations corresponding to "small winning combination 71" and "small winning combination 72" are those in which the symbol on the left reel 31 is "PB=1." , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the activated line when the "small winning combination E2 condition device" is activated, the symbol combinations corresponding to "small winning combination 77" and "small winning combination 78" are those in which the symbol on the left reel 31 is "PB=1." , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the active line when the "small win F1 condition device" is activated, the symbol combinations corresponding to "small win 75" and "small win 76" are those in which the left reel 31 symbol is "PB=1." , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win F2 condition device" is activated, the symbol combinations corresponding to "small win 73" and "small win 74" are those in which the left reel 31 symbol is "PB=1." , and the symbols on the middle reel 31 and the right reel 31 are arranged in the "PB≠1" arrangement.

From the above, among the symbol combinations that can be stopped and displayed on the active line when the conditional device is activated, the symbol on the left reel 31 is arranged as "PB=1", which is included in the "left first stop incorrect answer group". , and the symbols on the middle reel 31 and the right reel 31 are "16".
That is, as shown in FIG. 18, the symbol combinations corresponding to "minor win 63" to "minor win 78" can be stopped and displayed on the effective line when the condition device included in the "left first stop incorrect answer group" is activated. The symbols (replay) on the left reel 31 are arranged in the “PB=1” arrangement, and the symbols on the middle and right reels 31 and 31 are arranged in the “PB≠1” arrangement. It is a symbol combination consisting of the symbols that are present. The number of these symbol combinations is "16".

Further, as shown in FIGS. 14 and 15, "small win A1 condition device" to "small win B2 condition device" and "small win E1 condition device" to "small win F2 condition device" are "left middle right" , "Left-right center", "Right-left center", or "Right-center left" is the correct pressing order. That is, "small win A1 conditional device" to "small win B2 conditional device" and "small win E1 conditional device" to "small win F2 conditional device" become incorrect in order of pressing at the time of the middle first stop.
Here, "minor win A1 condition device" to "minor win B2 condition device" and "minor win E1 condition device" to "minor win F2 condition device" are referred to as "middle first stop incorrect answer group".

Of the symbol combinations that can be stopped and displayed on the activated line when the "small winning combination A1 condition device" is activated, the symbol combinations corresponding to "small winning combination 31" and "small winning combination 32" are those in which the symbol on the middle reel 31 is "PB=1." , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the activated line when the "small win A2 condition device" is activated, the symbol combination corresponding to the "small win 33" and "small win 34" has the symbol "PB=1" on the middle reel 31. , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the activated line when the "small winning combination B1 condition device" is activated, the symbol combination corresponding to "small winning combination 35" and "small winning combination 36" has the symbol "PB=1" on the middle reel 31. , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the activated line when the "small winning combination B2 condition device" is activated, the symbol combination corresponding to "small winning combination 37" and "small winning combination 38" has the symbol "PB=1" on the middle reel 31. , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the activated line when the "small winning combination E1 condition device" is activated, the symbol combination corresponding to the "small winning combination 43" and "small winning combination 46" has the symbol "PB=1" on the middle reel 31. , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small winning combination E2 condition device" is activated, the symbol combinations corresponding to "small winning combination 44" and "small winning combination 45" are those in which the symbol on the middle reel 31 is "PB=1." , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the active line when the "small win F1 condition device" is activated, the symbol combination corresponding to "small win 39" and "small win 40" has the symbol "PB=1" on the middle reel 31. , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win F2 condition device" is activated, the symbol combination corresponding to "small win 41" and "small win 42" has the symbol "PB=1" on the middle reel 31. , and the symbols on the left and right reels 31 and 31 are arranged in a "PB≠1" arrangement.

From the above, among the symbol combinations that can be stopped and displayed on the active line when the conditional device is activated, the symbol on the middle reel 31 is arranged as "PB=1" , and the symbols on the left reel 31 and the right reel 31 are "16".
That is, as shown in FIG. 16, the symbol combination corresponding to "small win 31" to "small win 46" can be stopped and displayed on the effective line when the condition device included in the "middle first stop incorrect answer group" is activated. The symbol combination is such that the symbol (watermelon) on the middle reel 31 is "PB=1", and the symbols on the left reel 31 and the right reel 31 are "PB≠1". It is a symbol combination consisting of the symbols that are present. The number of these symbol combinations is "16".

Further, as shown in FIGS. 14 and 15, "small combination A1 condition device" to "small combination D2 condition device" can be "left middle right", "left middle middle", "middle left right" or "middle right left". The correct answer should be pressed in order. That is, "small win A1 condition device" to "small win D2 condition device" become incorrect in the pressing order at the time of the right first stop.
Here, the "minor win A1 condition device" to "minor win D2 condition device" are referred to as "right first stop incorrect answer group".

Of the symbol combinations that can be stopped and displayed on the active line when the "small win A1 condition device" is activated, the symbol combination corresponding to the "small win 53" and "small win 54" has the symbol "PB=1" on the right reel 31. , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win A2 condition device" is activated, the symbol combination corresponding to "small win 49" and "small win 50" has the symbol "PB=1" on the right reel 31. , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the activated line when the "small winning combination B1 condition device" is activated, the symbol combinations corresponding to "small winning combination 47" and "small winning combination 48" are those in which the symbol on the right reel 31 is "PB=1." , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win B2 condition device" is activated, the symbol combination corresponding to "small win 57" and "small win 58" has the symbol "PB=1" on the right reel 31. , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the active line when the "small win C1 condition device" is activated, the symbol combinations corresponding to "small win 51" and "small win 52" are those in which the symbol on the right reel 31 is "PB=1." , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win C2 condition device" is activated, the symbol combinations corresponding to "small win 55" and "small win 56" are those in which the symbol on the right reel 31 is "PB=1." , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.

Of the symbol combinations that can be stopped and displayed on the active line when the "small winning combination D1 condition device" is activated, the symbol combination corresponding to "small winning combination 59" and "small winning combination 60" has the symbol "PB=1" on the right reel 31. , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.
Of the symbol combinations that can be stopped and displayed on the active line when the "small win D2 condition device" is activated, the symbol combination corresponding to "small win 61" and "small win 62" has the symbol "PB=1" on the right reel 31. , and the symbols on the left reel 31 and the middle reel 31 are arranged in the "PB≠1" arrangement.

From the above, among the symbol combinations that can be stopped and displayed on the active line when the conditional device is activated, the symbol on the right reel 31 is arranged in the “PB=1” arrangement, which is included in the “right first stop incorrect answer group”. , and the symbols on the left reel 31 and the middle reel 31 are "16".
That is, as shown in FIG. 17, the symbol combinations corresponding to "small win 53" to "small win 62" can be stopped and displayed on the effective line when the condition device included in the "right first stop incorrect answer group" is activated. The symbols on the right reel 31 (cherry) are arranged in "PB=1", and the symbols on the left reel 31 and the middle reel 31 are arranged in "PB≠1". It is a symbol combination consisting of the symbols that are present. The number of these symbol combinations is "16".

Then, there is a group of correct answers at the first left stop, a correct group at the first middle stop, a correct group at the first right stop, an incorrect group at the first left stop, and an incorrect first stop at the middle. As explained in the section "Correct group" and "Incorrect group at right first stop", "1" reels 31 consist of symbols arranged in a "PB=1" arrangement, and the other "2" symbols. By setting the number of symbol combinations to be "16" consisting of symbols in which the symbols on the reels 31 are arranged "PB≠1", the "minor win A1 condition device" to "minor win F2 condition device" are operated. It is possible to reduce the number of symbol combinations that can be stopped and displayed at times.

That is, the condition devices included in the "middle first stop incorrect answer group" (minor win A1 condition device, minor win A2 condition device, minor win B1 condition device, minor win B2 condition device, minor win E1 condition device, minor win E2 conditional device, small combination F1 conditional device, small combination F2 conditional device) is activated, the pressing order becomes incorrect at the time of the middle first stop. Then, regarding the symbol combination that enables the stop display at the middle first stop in the game when the condition device included in the "middle first stop incorrect answer group" is activated, the symbols of the middle reel 31 are arranged at "PB = 1" and There is one type (watermelon), and the symbols on the left reel 31 and the right reel 31 are both arranged "PB≠1".

In addition, in order to win the symbol combination (one) that can be stopped when the pushing order is correct in the game when the condition device included in the "middle first stop incorrect answer group" is activated, the "middle first stop" The number of symbol combinations that can be stopped and displayed at the first stop (when the pushing order is incorrect) in the game when the conditional device included in the "incorrect answer group at pause" is activated is set to "2" for each conditional device ”.
This makes it possible to minimize the number of symbol combinations that can be stopped and displayed at the middle first stop in the game when the condition device included in the "incorrect answer group at middle first stop" is activated.
The “left first stop incorrect answer group” and the “right first stop incorrect answer group” are the same as the “middle first stop incorrect answer group”.

Here, in a conventional slot machine, a specification called an accelerator AT or the like is known. A slot machine equipped with this accelerator AT is provided with a plurality of kinds of push order bells, and is provided with a high bell and a low bell with different pattern combinations for each push order bell.
Note that the "high bell" means a bell with a large number of payouts, which is awarded when the pressing order is correct when the pressing order bell is won. In addition, the "low-priced bell" means a bell with a small number of payouts that can be won when the pushing order is incorrect when the pushing order bell is won.
In addition, during the non-internal and internal periods, a lottery is held for a role that includes all the bells in the order of pushing.In the game where each bell in the order of pushing is won, when the order of pushing is correct, the corresponding high bell wins and the order of pushing is determined. When an incorrect answer is given, any corresponding low-level bell can be awarded without winning a high-level bell.

On the other hand, during the special game, the lottery for the pushing order bell is not performed, and instead, a lottery for the minor combination ALL, in which all the high-level bells and all the low-level bells are simultaneously won (double winning), is carried out. In the game in which the small win ALL is won, one of the higher bells wins.
Then, the probability of winning the small win ALL during the special game is set to be equal to or higher than the winning probability of each pressing order bell in the non-internal and internal modes, and the lottery result other than the winning of the small win ALL is set as non-winning, Or, it is set as a one-piece combination ALL winning in which all one-piece combinations are repeatedly won.
As a result, while making the winning probability of each high-level bell and each low-level bell during the special game equal to or higher than the winning probability of each high-level bell and low-level bell in the non-internal and internal modes, the player can medals are declining.

In addition, in this embodiment, by setting the winning probability of each pressing order bell (small combination A1 condition device to small combination F2 condition device) in non-internal and internal, to "2500/65536", each high eye bell The winning probability of (small winning combination 01 to small winning combination 06) is "5000/65536".
In addition, by setting the winning probability of the small winning combination ALL (small winning combination ALL condition device) during the special game to "5001/65536", each high-level bell (small winning combination 01 to small winning combination 06) is won during the special game. The probability is "5001/65536".
However, the winning probability of each minor combination during the special game may be set to be equal to or higher than the winning probability of each minor combination during the non-internal and internal modes. /65536".

By the way, the above-described conventional slot machine equipped with an accelerator AT is provided with a plurality of types of push order bells, and is provided with a high bell and a low bell with different symbol combinations for each push order bell. There have been problems that the total number of symbol combinations that can be stop-displayed when winning a regular bell is increased, and that the symbol combination corresponding to the high-order bell is difficult for the player to understand.
Therefore, in the present embodiment, as described above, by appropriately setting the symbol combinations that can be stopped and displayed in the game when the "minor combination A1 condition device" to "minor combination F2 condition device" are activated, respectively, Minimize the total number of symbol combinations that can be stopped and displayed in the game when "small win A1 condition device" to "small win F2 condition device" are activated, and correspond to "small win 01" to "small win 06" The player can easily understand the stop result when the combination of symbols to be played is stop-displayed on the effective line.

<Second embodiment>
The second embodiment is advantageous/disadvantageous to the game result (the number of payouts) by differentiating the types of small wins to be won depending on the pressing order of the stop switch 42 in a game in which multiple types of small wins with different numbers of payouts are won. is generated, and the pattern arrangement is different from that of the first embodiment.

FIG. 21 is a diagram showing the pattern arrangement of the reels 31 in the second embodiment.
In the pattern arrangement of the reel 31 in the second embodiment, the "bell" of the numbers "12" and "17" of the left reel 31 in the first embodiment shown in FIG. Replace the "2" and "7""bells" of the left reel 31 with "bell B", and replace all the "bells" of the middle reel 31 and the right reel 31 in the first embodiment with "bell A" It is a thing. Other than that, it is the same as the pattern arrangement of the reel 31 of the first embodiment shown in FIG.
In the first embodiment, the "bell" on the left reel 31 is arranged in "PB=1", but in the second embodiment, the "bell A" on the left reel 31 is arranged in "PB≠1". , and "Bell B" on the left reel 31 are also arranged in "PB≠1". However, in the second embodiment, "Bell A" and "Bell B" on the left reel 31 are placed at "PB=1" by adding two symbols.

FIG. 22 and FIG. 23 are diagrams showing types of combinations (such as combinations corresponding to winning numbers drawn by the combination lottery means 61), symbol combinations, payout numbers, and the like in this embodiment.
As shown in FIGS. 22 and 23, the game states of this embodiment include non-inside, 1BB inside, and 1BB playing. Also, in this embodiment, there is only one type of special combination, ie, "1BB".
22 and 23, "during 1BB" indicates "during 1BB", and "during 1BB" indicates "during 1BB playing".

The symbol combinations corresponding to "small winning combination 01", "small winning combination 04" and "small winning combination 05" are obtained by replacing "bell" of the middle reel 31 in the first embodiment with "bell A".
The symbol combinations corresponding to "small winning combination 02" and "small winning combination 06" are the same as in the first embodiment.
The symbol combination corresponding to the "small win 03" is replaced with "bell" on the left reel 31 in the first embodiment by "bell A/bell B", and "bell" on the middle reel 31 and the right reel 31 in the first embodiment. " is replaced with "Bell A".

The symbol combinations corresponding to "small win 07" to "small win 10" are obtained by replacing "Bell" on the right reel 31 in the first embodiment with "Bell A".
The symbol combinations corresponding to "small winning combination 11" to "small winning combination 14" are obtained by replacing "bell" of the middle reel 31 in the first embodiment with "bell A".

The symbol combination corresponding to the "small win 15" is replaced with "Bell A" for "Red 7" on the left reel 31 in the first embodiment, and "Bell A" for "Bell" on the middle reel 31 in the first embodiment. is replaced with
The symbol combination corresponding to the "small win 16" is to replace "blue 7" on the left reel 31 in the first embodiment with "white BAR", and replace "bell" on the middle reel 31 in the first embodiment with "bell A". is replaced with
The symbol combination corresponding to the "small win 17" replaces the "black BAR" on the left reel 31 in the first embodiment with "bell B", and replaces the "bell" on the middle reel 31 in the first embodiment with "bell A". is replaced with
The symbol combination corresponding to the "small win 18" is replaced with "red 7" for "white BAR" on the left reel 31 in the first embodiment, and "bell A" for "bell" on the middle reel 31 in the first embodiment. is replaced with

The symbol combinations corresponding to "small win 19" to "small win 22" replace "Bell" on the left reel 31 in the first embodiment with "Bell A/Bell B" in the middle reel 31 in the first embodiment. "Bell" is replaced with "Bell A".
The symbol combination corresponding to the "small win 23" is obtained by replacing the "red 7" of the left reel 31 in the first embodiment with "Bell A".
The symbol combination corresponding to the "small win 24" is obtained by replacing the "blue 7" of the left reel 31 in the first embodiment with the "white BAR".
The symbol combination corresponding to the "small win 25" is obtained by replacing the "black BAR" of the left reel 31 in the first embodiment with the "bell B".
The symbol combination corresponding to the "small win 26" is obtained by replacing the "white BAR" of the left reel 31 in the first embodiment with "red 7".

The symbol combination corresponding to the "small win 27" is obtained by replacing the "bell" of the left reel 31 in the first embodiment with "red 7".
The symbol combination corresponding to the "small win 28" is obtained by replacing the "bell" on the left reel 31 in the first embodiment with "blue 7".
The symbol combination corresponding to the "small winning combination 29" is obtained by replacing the "bell" of the left reel 31 in the first embodiment with the "black BAR".
The symbol combination corresponding to the "small win 30" is obtained by replacing the "bell" of the left reel 31 in the first embodiment with a "white BAR".

The symbol combination corresponding to the "small win 31" is obtained by replacing the "red 7" of the left reel 31 in the first embodiment with "Bell A".
The symbol combination corresponding to the "small win 32" is obtained by replacing the "red 7" of the left reel 31 in the first embodiment with the "white BAR".
The symbol combination corresponding to the "small winning combination 33" is obtained by replacing the "blue 7" of the left reel 31 in the first embodiment with the "bell B".
The symbol combination corresponding to the "small win 34" is obtained by replacing "blue 7" on the left reel 31 in the first embodiment with "red 7".

The symbol combination corresponding to the "small winning combination 35" replaces the "black BAR" on the left reel 31 in the first embodiment with "bell A", and replaces the "black BAR" on the right reel 31 in the first embodiment with "blue 7". ” is replaced with
The symbol combination corresponding to the "small winning combination 36" replaces the "black BAR" on the left reel 31 in the first embodiment with "white BAR", and replaces the "white BAR" on the right reel 31 in the first embodiment with "blue 7". ” is replaced with

The symbol combination corresponding to the "small winning combination 37" replaces the "white BAR" on the left reel 31 in the first embodiment with "Bell B", and replaces the "black BAR" on the right reel 31 in the first embodiment with "red 7". ” is replaced with
The symbol combination corresponding to the "small winning combination 38" is that the "white BAR" on the left reel 31 in the first embodiment is replaced with "red 7", and the "white BAR" on the right reel 31 in the first embodiment is replaced with "red 7". ” is replaced with

The symbol combination corresponding to the "small winning combination 39" is obtained by replacing the "red 7" of the left reel 31 in the first embodiment with "bell A".
The symbol combination corresponding to the "small win 40" replaces "red 7" on the left reel 31 in the first embodiment with "white BAR", and replaces "white BAR" on the right reel 31 in the first embodiment with "black BAR". ” is replaced with

The symbol combination corresponding to the "small winning combination 41" replaces "blue 7" on the left reel 31 in the first embodiment with "bell B", and replaces "black BAR" on the right reel 31 in the first embodiment with "white BAR". ” is replaced with
The symbol combination corresponding to the "small win 42" is obtained by replacing "blue 7" on the left reel 31 in the first embodiment with "red 7".

The symbol combination corresponding to the "small win 43" replaces the "black BAR" on the left reel 31 in the first embodiment with "bell A", and replaces the "red 7" on the right reel 31 in the first embodiment with the "white BAR". ” is replaced with
The symbol combination corresponding to the "small winning combination 44" is that the "black BAR" on the left reel 31 in the first embodiment is replaced with the "white BAR", and the "blue 7" on the right reel 31 in the first embodiment is replaced with the "white BAR." ” is replaced with

The symbol combination corresponding to the "small winning combination 45" replaces the "white BAR" on the left reel 31 in the first embodiment with "bell B", and replaces the "red 7" on the right reel 31 in the first embodiment with a "black BAR." ” is replaced with
The symbol combination corresponding to the "small win 46" is to replace "white BAR" on the left reel 31 in the first embodiment with "red 7" and replace "blue 7" on the right reel 31 in the first embodiment with "black BAR." ” is replaced with

The symbol combinations corresponding to "small winning combination 47" to "small winning combination 82" and "replay" are the same as in the first embodiment.
The symbol combination corresponding to "1BB" is the same as the symbol combination corresponding to "1BB-A" in the first embodiment.

Also, the "small combination condition device" and "replay condition device" are the same as in the first embodiment, and the "1BB condition device" is the same as the "1BB-A condition device" in the first embodiment. .

FIG. 24 is a diagram (number table) showing the numbers of winning numbers for each game state in the second embodiment.
In FIG. 24, "during 1BB" indicates "during 1BB", and "during 1BB" indicates "during 1BB playing".
As in the first embodiment, the winning probability of each winning number is obtained by dividing the set number shown in FIG. 24 by "65536".

As shown in FIG. 24, "small combination A1 condition device" to "small combination I condition device" are subject to lottery during non-inside and inside (during 1BB inside), but during 1BB (during 1BB game) Not eligible for lottery.
In addition, the "1-card combination ALL condition device" is a lottery target in all game states.
Furthermore, the "small combination ALL condition device" is a lottery target only during 1BB (during 1BB game), contrary to "small combination A1 condition device" to "small combination I condition device". Medium (inside 1BB) is not eligible for the lottery.

Furthermore, the "replay condition device" is a lottery target for non-internal and internal (1BB internal), as with "small hand A1 condition device" to "small hand I condition device", but in 1BB (1BB During play) is not eligible for the lottery.
In addition, the "1BB condition device" is subject to lottery only in non-internal mode, and is not subject to lottery in other game states.
Also in the second embodiment, similarly to the first embodiment, in any game state, the lottery by the role lottery means 61 will win any one of the winning numbers "1" to "20" and will not be won. no.

FIG. 25 is a diagram showing game state transitions in the second embodiment, and FIG. 26 is a diagram showing game state variation conditions in the present embodiment.
In FIG. 26, "∞" (infinite) in the column of the number of times means that the upper limit number of games is not set for each game state, and until the transition condition described in the column of the variation opportunity is satisfied, that game state remains in that state. means to maintain (continue)

The main control means 50 determines whether or not the condition for transitioning the game state is satisfied when all the reels 31 are stopped in each game, and when it is determined that the condition for transition of the game state is satisfied, the main control means 50 shifts the game state. Control.
First, when the RWM 53 is initialized, it transitions to non-internal. When shipped from the factory, it shifts to non-internal. When the setting key switch 152 is turned on while the power is off and the power is turned on in this state, the setting change state is entered. At this time, the initialization processing of the RWM 53 is executed, and it shifts to the non-internal state.

During non-internal, it is maintained until the "1BB condition device" is activated.
Then, when the "1BB condition device" is activated (1BB win) while not inside, and the symbol combination corresponding to "1BB" is stopped and displayed on the active line (1BB winning), it shifts to "1BB game" (1BB activation). .
On the other hand, if the "1BB condition device" is activated during non-internal operation, but the symbol combination corresponding to "1BB" is not stop-displayed on the active line, the operation shifts to "1BB internal operation".

In addition, when "inside 1BB" is not won by the combination lottery means 61, the symbol combination corresponding to "1BB" can be stop-displayed on the active line.
However, in the present embodiment, the combination lottery means 61 never fails to win during "inside 1BB". Since there is no stop display during 1BB, it continues to maintain "inside 1BB".

Also, during the "during 1BB game", the "RB game" is continuously executed.
Furthermore, the “RB game” ends when “2” games are executed, “2” wins are made, or when the end condition of “1BB-A game” is met.
Furthermore, the "1BB game" continues until the total number of medals obtained (the number of medals to be paid out and the number to be given) exceeds "210", and ends when the total number of medals obtained exceeds "210".

Then, when the "RB game" ends and the condition for ending the "1BB game" is not satisfied, the "RB game" is executed again.
In addition, when the "RB game" ends, when the conditions for ending the "1BB game" are satisfied, the "1BB game" ends and shifts to the non-internal state.
Furthermore, when the end condition of the "1BB game" is satisfied during the "RB game", the "RB game" is ended, and the "1BB game" is ended to shift to the non-internal state.

Next, with reference to FIG. 27, the characteristic points of the symbol combination that can be stopped and displayed when the "small win A1 condition device" or the like in the second embodiment is activated, and the reels when the "small win A1 condition device" or the like is activated 31 will be described.
Fig. 27 (1) is displayed at the first left stop when the small win A1 condition device is activated, the left first stop when the small win B1 condition device is activated, and the left first stop when the small win C1 condition device is activated. FIG. 10 is a diagram showing symbols on the left reel that can be stopped and displayed in the window;
FIG. 27(2) is a view showing symbols of the left reel that can be stop-displayed in the display window at the time of the left second stop after the middle first stop when the small win C1 condition device is activated.
In FIG. 27, the two-dot chain line passing through the middle left, middle middle, and middle right shows the effective line. The same applies to FIG. 29 to be described later.
In the second embodiment, similarly to the first embodiment, when the stop switch 42 is operated in the order of pressing "left, middle, right (123)" when the "small win A1 condition device" is activated, the number of sheets is given priority. , with a probability of "1/1", the symbol combination corresponding to the "small win 01" (PB = 1) is stopped on the effective line.
In addition, when the "small winning combination A1 conditional device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped in the middle left row (effective line) in order to win the "small winning combination 01". display.

As a result, when the "small win A1 condition device" is activated and the left first stop is performed, as shown on the left side of FIG. , "Replay" (No. 11) on the left reel 31 is stop-displayed in the middle left row, and "Bell A" (No. 12) on the left reel 31 is stop-displayed in the upper left row. As shown on the right side, "Red 7" (No. 5) on the left reel 31 is stopped in the lower left row, "Replay" (No. 6) on the left reel 31 is stopped in the middle left row, and " There is a case where "Bell B" (No. 7) is stopped and displayed on the upper left.
That is, "Black BAR" (No. 10), "Replay" (No. 11) and "Bell A" (No. 12) on the left reel 31, or "Red 7" (No. 5) and "Replay" (No. No. 6) and "Bell B" (No. 7) can be stopped and displayed in the display window 18.

When the stop switch 42 is operated in the pressing order of ``right and left middle (132)'' when the ``small win B1 condition device'' is activated, the number priority is given to the ``small win B1 condition device'' with a probability of ``1/1''. symbol combination (PB=1) corresponding to ``small winning combination 02'', which pays out ``10'' medals, which is the maximum value among the number of medals to be paid out corresponding to '', is stopped and displayed on the activated line.
In addition, when the "small winning combination B1 conditional device" is activated and the left first stop is performed, the "replay" (PB=1) of the left reel 31 is stopped in the middle left row (effective line) in order to win the "small winning combination 02". display.

As a result, when the "small win B1 condition device" is activated and the left first stop is performed, as shown on the left side of FIG. , "Replay" (No. 11) on the left reel 31 is stop-displayed in the middle left row, and "Bell A" (No. 12) on the left reel 31 is stop-displayed in the upper left row. As shown on the right side, "Red 7" (No. 5) on the left reel 31 is stopped in the lower left row, "Replay" (No. 6) on the left reel 31 is stopped in the middle left row, and " There is a case where "Bell B" (No. 7) is stopped and displayed on the upper left.
That is, "Black BAR" (No. 10), "Replay" (No. 11) and "Bell A" (No. 12) on the left reel 31, or "Red 7" (No. 5) and "Replay" (No. No. 6) and "Bell B" (No. 7) can be stopped and displayed in the display window 18.

When the stop switch 42 is operated in the pressing order of "middle left and right (213)" when the "small win C1 condition device" is activated, the "small win C1 condition device" symbol combination (PB=1) corresponding to ``small win 03'', which pays out ``10'' medals, which is the maximum value among the number of medals to be paid out corresponding to '', is stopped and displayed on the activated line.
In addition, at the first stop during operation of the "small win C1 condition device", "Bell A" (PB = 1) of the middle reel 31 is set to the middle middle row (effective line) in order to win the "small win 03". After that, at the second stop on the left, "Bell A" or "Bell B" on the left reel 31 ("PB=1" arrangement in total of 2 symbols) is placed on the left in order to win "Small Win 03". Stop display in the middle (effective line).

As a result, when the "small win C1 condition device" is activated, at the time of the left second stop after the middle first stop, as shown on the left side of FIG. There is a case where "Bell A" (No. 12) on the left reel 31 is stop-displayed on the lower left row, "Bell A" (No. 12) on the left reel 31 is stop-displayed on the middle left row, and "Watermelon" (No. 13) on the left reel 31 is stop-displayed on the upper left row, As shown on the right side of FIG. 27(2), "Replay" (No. 6) on the left reel 31 is stopped and displayed in the lower left row, and "Bell B" (No. 7) on the left reel 31 is stopped and displayed in the middle left row. , "Watermelon" (No. 8) on the left reel 31 is stopped and displayed on the upper left.

That is, "Replay" (No. 11), "Bell A" (No. 12) and "Watermelon" (No. 13) on the left reel 31, or "Replay" (No. 6) and "Bell B" (No. 7) on the left reel 31 (No. 8) and "Watermelon" (No. 8) can be stopped and displayed in the display window 18. "Cherry" (No. 9) and "Black BAR" (No. 10) on the left reel 31 are not stopped and displayed in the display window 18, and "Cherry" (No. 4) and "Red 7" (No. 7) on the left reel 31 are not displayed. 5) is also not stopped and displayed in the display window 18.

When the "small win C1 condition device" is activated, when the stop switch 42 is operated in the pressing order of "left, center, right (123)", "small win 63" is given with a probability of "1/8" due to the number priority. Alternatively, the symbol combination corresponding to "small combination 64" (one coin is paid out) is stopped and displayed on the active line.
Further, at the left first stop when the "small win C1 condition device" is activated, "Replay" (PB=1) of the left reel 31 is performed in order to win "small win 63" or "small win 64". A stop display is displayed in the left middle row.

As a result, when the "small win C1 condition device" is activated and the left first stop is performed, as shown on the left side of FIG. , "Replay" (No. 11) on the left reel 31 is stop-displayed in the middle left row, and "Bell A" (No. 12) on the left reel 31 is stop-displayed in the upper left row. As shown on the right side, "Red 7" (No. 5) on the left reel 31 is stopped in the lower left row, "Replay" (No. 6) on the left reel 31 is stopped in the middle left row, and " There is a case where "Bell B" (No. 7) is stopped and displayed on the upper left.
That is, "Black BAR" (No. 10), "Replay" (No. 11) and "Bell A" (No. 12) on the left reel 31, or "Red 7" (No. 5) and "Replay" (No. No. 6) and "Bell B" (No. 7) can be stopped and displayed in the display window 18.

In this way, when the "small combination A1 condition device" is activated, the left first stop, when the "small combination B1 condition device" is activated, and when the "small combination C1 condition device" is activated, the left first At the time of stop, as shown in FIG. 27(1), "black bar" (10th), "replay" (11th) and "bell A" (12th) on the left reel 31, or "red bar" on the left reel 31 7” (No. 5), “Replay” (No. 6) and “Bell B” (No. 7) can be stopped and displayed in the display window 18.
As a result, it is possible to prevent the operating condition device (lottery result of the combination lottery means 61) from being guessed from the position of the pattern of the left reel 31 stopped and displayed in the display window 18 at the time of left first stop. .

Further, when the "small win C1 condition device" is activated, at the time of the left second stop after the middle first stop, as shown in FIG. " (No. 12) and "Watermelon" (No. 13), or "Replay" (No. 6), "Bell B" (No. 7) and "Watermelon" (No. 8) on the left reel 31 are stopped in the display window 18. Displayable. In this case, "Cherry" (No. 9) and "Black BAR" (No. 10) on the left reel 31 are not stopped and displayed in the display window 18, and "Cherry" (No. 4) and "Red 7" on the left reel 31 are not displayed. (No. 5) is also not stopped and displayed in the display window 18 .
In this way, when the "small win C1 condition device" is activated, the left first stop (when the pushing order is incorrect) and the left second stop after the middle first stop (when the pushing order is correct) Different symbols on the reels 31 are stopped and displayed in the display window 18.例文帳に追加

Then, when the "small win C1 condition device" is activated and the left first stop (when the pushing order is incorrect), the pattern is different from the pattern (bell) of the left reel 31 constituting the "small win 03", and "Replay", which is a symbol of "PB=1" on the left reel 31, is stop-displayed on the activated line.
As a result, it is possible not to miss the "Replay" on the left reel 31, and it is possible to prevent "Bell A" or "Bell B" on the left reel 31 from being stop-displayed on the activated line. It is possible to prevent the small winning combination 03 from winning.

Furthermore, the pattern of the left reel 31 constituting the "small winning combination 63" and "small winning combination 64" is one type of "replay", and the pattern of the right reel 31 constituting the "small winning combination 63" and "small winning combination 64" is one type. The pattern is one type of "Red 7".
In this way, the types of symbols of the left reel 31 and the right reel 31, which constitute a symbol combination that can be stopped and displayed when the left first stop (when the pushing order is incorrect) when the "small win C1 condition device" is activated, are set respectively. By using one type, it is possible to reduce the number of symbol combinations that can be stopped and displayed on the active line when the "small win C1 condition device" is activated.

Further, the probability that the "red 7" of the middle reel 31 constituting the "minor win 63" and "minor win 64" can be stopped and displayed on the active line is "1/4", and the "minor win 63" and The probability that ``Blue 7'' of the middle reel 31 constituting the ``small winning combination 64'' can be stopped and displayed on the active line is also ``1/4'', which constitutes the ``small winning combination 63'' and the ``small winning combination 64''. The probability that the "red 7" on the right reel 31 can be stop-displayed on the active line is also "1/4".
As a result, it is possible to reduce the winning probability (acquisition rate) of the one-piece role when the pressing order is incorrect when the "small win C1 condition device" is activated, and eventually the ball output rate per game can be reduced. Since it can be lowered, the degree of freedom in design can be improved.

In addition, at the first stop on the left when the "small win A1 condition device" is activated, at the first stop on the left when the "small win B1 condition device" is activated, at the first stop on the left when the "small win C1 condition device" is activated, ``Cherry'' on the left reel 31 is not stopped and displayed in the display window 18 at the second stop on the left after the first stop during the operation of the ``small win C1 condition device''. As a result, it is possible to prevent the player from expecting too much.

Although the first embodiment and the second embodiment of the present invention have been described above, the present invention is not limited to the contents described above, and various modifications such as those described below are possible.
(1) In the second embodiment, the "12" and "17""bells" of the left reel 31 in the first embodiment are replaced with "bell A", and the "2" of the left reel 31 in the first embodiment ” and “7” are replaced with “Bell B”, and all “Bells” of the middle reel 31 and right reel 31 in the first embodiment are replaced with “Bell A”. , but not limited to this.

For example, as shown in FIG. 28, "replay" of numbers "11" and "16" of the left reel 31 in the first embodiment is replaced with "replay A", and "1" of the left reel 31 in the first embodiment is replaced with "replay". ' and '6' may be replaced with 'replay B'.
Also, "cherry" of numbers "9" and "14" of the left reel 31 in the first embodiment are replaced with "cherry A", and "cherry" of number "4" of the left reel 31 in the first embodiment is replaced with "cherry". It may be replaced with "cherry B".

Furthermore, all "Replay" of the middle reel 31 and the right reel 31 in the first embodiment are replaced with "Replay A", and all "Cherry" of the middle reel 31 and the right reel 31 in the first embodiment are replaced with "Cherry A". can be replaced with
Other than that, the pattern arrangement of the reel 31 of the first embodiment shown in FIG. 2 is the same.
In the first embodiment, "Replay" on the left reel 31 has a "PB=1" arrangement, but in the modification shown in FIG. 28, "Replay A" on the left reel 31 has a "PB≠1" arrangement. , and “Replay B” on the left reel 31 is also arranged in “PB≠1”. However, in the modified example shown in FIG. 28, "Replay A" and "Replay B" on the left reel 31 are arranged at "PB=1" by adding two symbols.

In addition, since the symbol arrangement of each reel 31 is replaced as shown in FIG. 28, the symbols constituting the combination of symbols of the winning combination in the first embodiment shown in FIGS. 4 and 5 can be appropriately replaced.
For example, the symbol combination corresponding to "small win 01" is "replay A/replay B"-"bell"-"watermelon", and the symbol combination corresponding to "small win 02" is "replay A/replay B". - "Cherry" - "Replay A".
Further, even if the symbol arrangement of each reel 31 is replaced as shown in FIG. 28, the minor combination condition device, the replay condition device, and the 1BB condition device can be the same as in the first embodiment.

Then, when the stop switch 42 is operated in the pressing order of "left, middle, right (123)" when the "small win A1 condition device" is activated, the "small win The symbol combination (PB=1) corresponding to the "small winning combination 01" that pays out the maximum "10" medals out of the number of medals to be paid out corresponding to the "A1 condition device" is stop-displayed on the active line.
In addition, when the "small winning combination A1 condition device" is activated and the left first stop is performed, in order to win the "small winning combination 01", "replay A" or "replay B" on the left reel 31 ("PB = 1” arrangement) is stopped and displayed in the middle left row (effective line).

As a result, when the "small win A1 condition device" is activated and the left first stop is performed, as shown on the left side of FIG. , ``Replay A'' (No. 11) on the left reel 31 is stop-displayed in the middle left row, and the ``Bell'' (No. 12) on the left reel 31 is stop-displayed in the upper left row. As shown on the right side, "Red 7" (No. 5) on the left reel 31 is stopped in the lower left row, "Replay B" (No. 6) on the left reel 31 is stopped in the middle left row, and "Replay B" (No. There is a case where "Bell" (No. 7) is stopped and displayed on the upper left.
That is, "Black BAR" (No. 10), "Replay A" (No. 11) and "Bell" (No. 12) on the left reel 31, or "Red 7" (No. 5) and "Replay B" on the left reel 31 (No. 6) and "Bell" (No. 7) can be stopped and displayed in the display window 18.

Also, when the stop switch 42 is operated in the pressing order of "left and right middle (132)" when the "small win B1 condition device" is activated, the "small win B1 The symbol combination (PB=1) corresponding to the "small winning combination 02" that pays out the maximum "10" medals out of the number of medals to be paid out corresponding to the "conditional device" is stop-displayed on the activated line.
In addition, when the "small win B1 condition device" is activated and the left first stop is performed, "replay A" or "replay B" (2 symbols combined "PB = 1” arrangement) is stopped and displayed in the middle left row (effective line).

As a result, when the "small win B1 condition device" is activated and the left first stop is performed, as shown on the left side of FIG. , ``Replay A'' (No. 11) on the left reel 31 is stop-displayed in the middle left row, and the ``Bell'' (No. 12) on the left reel 31 is stop-displayed in the upper left row. As shown on the right side, "Red 7" (No. 5) on the left reel 31 is stopped in the lower left row, "Replay B" (No. 6) on the left reel 31 is stopped in the middle left row, and "Replay B" (No. There is a case where "Bell" (No. 7) is stopped and displayed on the upper left.
That is, "Black BAR" (No. 10), "Replay A" (No. 11) and "Bell" (No. 12) on the left reel 31, or "Red 7" (No. 5) and "Replay B" on the left reel 31 (No. 6) and "Bell" (No. 7) can be stopped and displayed in the display window 18.

Also, when the stop switch 42 is operated in the pressing order of "middle left and right (213)" when the "small win C1 condition device" is activated, the "small win C1 The symbol combination (PB=1) corresponding to the "small winning combination 03" that pays out the maximum "10" medals out of the number of medals to be paid out corresponding to the "conditional device" is stop-displayed on the activated line.
Further, when the "small win C1 condition device" is activated, the "bell" (PB=1) of the middle reel 31 is stopped at the middle middle stage (effective line) in order to win the "small win 03". After that, at the second stop on the left, the "bell" (PB=1) of the left reel 31 is stop-displayed in the middle left row (effective line) in order to win the "small win 03".

As a result, when the "small win C1 condition device" is activated, at the time of the left second stop after the middle first stop, as shown on the left side of FIG. is stopped in the lower left row, "Bell" (No. 12) on the left reel 31 is stopped in the middle left row, and "Watermelon" (No. 13) on the left reel 31 is stopped in the upper left row, As shown on the right side of FIG. 29(2), "Replay B" (No. 6) on the left reel 31 is stopped and displayed in the lower left row, and "Bell" (No. 7) on the left reel 31 is stopped and displayed in the middle left row. , "Watermelon" (No. 8) on the left reel 31 is stopped and displayed on the upper left.

That is, "Replay A" (No. 11), "Bell" (No. 12) and "Watermelon" (No. 13) on the left reel 31, or "Replay B" (No. 6) and "Bell" (No. 7) on the left reel 31 (No. 8) and "Watermelon" (No. 8) can be stopped and displayed in the display window 18. "Cherry A" (No. 9) and "Black BAR" (No. 10) on the left reel 31 are not stopped and displayed in the display window 18, and "Cherry B" (No. 4) and "Red 7" on the left reel 31 are not displayed. ” (No. 5) is also not stopped and displayed in the display window 18 .

Also, when the stop switch 42 is operated in the pressing order of "left, middle, right (123)" when the "small win C1 condition device" is activated, the "small win The symbol combination corresponding to "63" or "small win 64" (both are paid out one card) is stopped and displayed on the active line.
Further, when the "small winning combination C1 condition device" is activated and the left first stop is performed, "replay A" or "replay B" of the left reel 31 is performed so that "small winning combination 63" or "small winning combination 64" can be won. (“PB=1” arrangement by combining two symbols) is stopped and displayed in the middle left row.

As a result, when the "small win C1 condition device" is activated and the left first stop is performed, as shown on the left side of FIG. , ``Replay A'' (No. 11) on the left reel 31 is stop-displayed in the middle left row, and the ``Bell'' (No. 12) on the left reel 31 is stop-displayed in the upper left row. As shown on the right side, "Red 7" (No. 5) on the left reel 31 is stopped in the lower left row, "Replay B" (No. 6) on the left reel 31 is stopped in the middle left row, and "Replay B" (No. There is a case where "Bell" (No. 7) is stopped and displayed on the upper left.
That is, "Black BAR" (No. 10), "Replay A" (No. 11) and "Bell" (No. 12) on the left reel 31, or "Red 7" (No. 5) and "Replay B" on the left reel 31 (No. 6) and "Bell" (No. 7) can be stopped and displayed in the display window 18.

In this way, when the "small combination A1 condition device" is activated, the left first stop is activated, when the "small combination B1 condition device" is activated, the left first stop is activated, and when the "small combination C1 condition device" is activated, the left first At the time of stop, as shown in FIG. 29(1), "black BAR" (10th), "replay A" (11th) and "bell" (12th) on the left reel 31, or "red bar" on the left reel 31 7” (No. 5), “Replay B” (No. 6) and “Bell” (No. 7) can be stopped and displayed in the display window 18.
As a result, it is possible to prevent the operating condition device (lottery result of the combination lottery means 61) from being guessed from the position of the pattern of the left reel 31 stopped and displayed in the display window 18 at the time of left first stop. .

Further, when the "small win C1 condition device" is activated, at the time of the left second stop after the middle first stop, as shown in FIG. " (No. 12) and "Watermelon" (No. 13), or "Replay B" (No. 6), "Bell" (No. 7) and "Watermelon" (No. 8) on the left reel 31 are stopped in the display window 18 Displayable. In this case, "Cherry A" (9th) and "Black BAR" (10th) on the left reel 31 are not stopped and displayed in the display window 18, and "Cherry B" (4th) and "Red" on the left reel 31 are not displayed. 7” (No. 5) is also not stopped and displayed in the display window 18.
In this way, when the "small win C1 condition device" is activated, the left first stop (when the pushing order is incorrect) and the left second stop after the middle first stop (when the pushing order is correct) Different symbols on the reels 31 are stopped and displayed in the display window 18.例文帳に追加

Then, when the "small win C1 condition device" is activated and the left first stop (when the pushing order is incorrect), the pattern is different from the pattern (bell) of the left reel 31 constituting the "small win 03", and "Replay A" or "Replay B", which is a symbol arranged at "PB=1", is stopped and displayed on the active line on the left reel 31 by combining two symbols.
As a result, it is possible to prevent ``Replay A'' or ``Replay B'' on the left reel 31 from being missed, and it is possible to prevent ``Bell'' on the left reel 31 from being stop-displayed on the activated line. It is possible to prevent the small winning combination 03 from winning.

In addition, at the first stop on the left when the "small win A1 condition device" is activated, at the first stop on the left when the "small win B1 condition device" is activated, at the first stop on the left when the "small win C1 condition device" is activated, and at the second stop on the left after the first stop during the operation of the "small win C1 condition device", the "cherry A" of the left reel 31 is not stopped and displayed in the display window 18, "CHERRY B" is not stopped and displayed in the display window 18 either. Furthermore, when the "small win C1 condition device" is activated, "Cherry A" of the left reel 31 is not stopped and displayed in the display window 18 even at the second stop on the left after the first stop in the middle. "CHERRY B" is not stopped and displayed in the display window 18 either. As a result, it is possible to prevent the player from expecting too much.

(2) In the first and second embodiments, the middle line is the effective line, but the effective line is not limited to the middle line, and the number of effective lines is not limited to "1".
For example, as shown in FIGS. 30 and 31, it is possible to set upper lines as valid lines and other lines as invalid lines.
Further, for example, the symbol combination corresponding to "small win 01" can be "bell"-"replay"-"cherry". In this case, when the "small winning combination 01" is won, as shown in FIG. ), “Bell”-“Bell”-“Bell” is stopped and displayed, so that the stop number can be the same as when “small win 01” is won in the first embodiment.

Similarly, for example, the symbol combination corresponding to "small win 02" can be "bell"-"bell"-"bell". In this case, when the "small winning combination 02" is won, as shown in FIG. It is possible to make the stop number the same as when the "small combination 02" is won.
Also, for example, the symbol combination corresponding to "small win 03" can be "watermelon"-"replay"-"watermelon". In this case, when the "small win 03" is won, as shown in FIG. 30(3), "watermelon"-"replay"-"watermelon" are stopped on the upper line (valid line), and the middle line (invalid line) is displayed. Since "Bell" - "Bell" - "Bell" is displayed in a stopped state, the stop result can be the same as when "Small Win 03" is won in the first embodiment.

Furthermore, for example, the symbol combination corresponding to "small win 04" can be "cherry"-"replay"-"bell". In this case, when the "small winning combination 04" is won, as shown in FIG. ), “Bell”-“Bell”-“Bell” is displayed in a stopped state, so that the stop result can be the same as when “small win 04” is won in the first embodiment.
Further, for example, the symbol combination corresponding to "small win 05" can be "cherry"-"replay"-"cherry". In this case, when "small win 05" is won, as shown in FIG. 31(2), "Cherry"-"Replay"-"Cherry" are stopped and displayed on the upper line (valid line), and a mountain line (invalid line) is displayed. Since "Bell" - "Bell" - "Bell" is displayed in a stopped state, the stop result can be the same as when "small win 05" is won in the first embodiment.

Also, for example, the symbol combination corresponding to "small win 06" can be "cherry"-"watermelon"-"cherry". In this case, when the "small win 06" is won, as shown in FIG. 31(3), "cherry"-"watermelon"-"cherry" are stopped on the upper line (valid line) and the lower line (invalid line). Since "Bell" - "Bell" - "Bell" is displayed in a stopped state, the stop result can be the same as when "small win 06" is won in the first embodiment.

Also, for example, the lower line can be set as the effective line, and the lower right line can be set as the effective line.
Further, for example, "5" lines, ie, the upper line, the middle line, the lower line, the upward-sloping line, and the downward-sloping line can be set as valid lines.

(3) In the first embodiment and the second embodiment, the left reel 31, the middle reel 31, and the right reel 31, that is, "3" reels 31 are provided, but the number of reels 31 is not limited to "3". .
For example, "four" reels 31, ie, a first reel 31, a second reel 31, a third reel 31 and a fourth reel 31, may be provided side by side. In this case, "4" stop switches 42 from the first stop switch 42 to the fourth stop switch 42 can be provided corresponding to the "4" reels 31, respectively.

(4) In the first embodiment and the second embodiment, the number of payouts for the small winning combination that wins when the pressing order is correct when operating the "small combination A1 condition device" to "small combination F2 condition device" is set to "10". However, the number is not limited to this, and for example, the number may be "8" or "15".
(5) In the first embodiment and the second embodiment, the payout number of the small combination that can be won when the pressing order is incorrect when the "small combination A1 condition device" to "small combination F2 condition device" are activated is "1". The number of sheets is not limited to this, but may be, for example, "2" or "3".

(6) In the first and second embodiments, there are 12 conditional devices from "minor combination A1 conditional device" to "minor combination F2 conditional device" as conditional devices that give advantage/disadvantage to the game result depending on the order in which the stop switch 42 is pressed. Although the types are provided, they are not limited to this, and may be, for example, six types of "minor combination A condition device" to "minor combination F condition device".
(7) In the first embodiment and the second embodiment, the pressing order of the stop switch 42 during operation of the "small win A1 condition device" to "small win F2 condition device" is "left middle right", "left middle right", There are six options: "center left and right", "center right left", "right left center", and "right center left". ', 'first stop is inside, second and third stops are optional', and 'first stop is right, second and third stops are optional'.

(8) In the first and second embodiments, as shown in FIG. 10, the winning number "1" (small winning combination A1 condition device) and the winning number "2" By setting the winning probabilities of conditional device) to "2500/65536" respectively, the winning probability of "small win 01" in non-internal and internal is set to "5000/65536".
Similarly, by setting the winning probability of winning number "3" (minor combination B1 condition device) to winning number "12" (minor combination F2 condition device) in non-internal and internal to "2500/65536" respectively , the winning probabilities of "small win 02" to "small win 06" in non-internal and internal are set to "5000/65536", respectively.
In addition, by setting the winning probability of the winning number "17" (small combination ALL condition device) during the special game to "5001/65536", the winning of "small combination 01" to "small combination 06" during the special game. The probability was set to "5001/65536" respectively.

However, the winning probability of each minor combination during the special game may be set to be equal to or higher than the winning probability of each minor combination during the non-internal and internal modes. ), that is, the winning probability of “small winning combination 01” to “small winning combination 06” during the special game may be set to “5000/65536”, for example.

(9) In the first and second embodiments, the correct pressing order when the pressing order bell is won ("small combination A1 condition device" to "small combination F2 condition device" is activated) is "left middle right", " There are 6 options: left, right, center, left, right, center, right, left, right, left, and right, center, and left. In the above-described embodiment, "small win 01" to "small win 06") are awarded.
However, the present invention is not limited to this, and for example, three types of "small winning combination 01" to "small winning combination 03" may be used. Then, when "small combination A1 condition device", "small combination A2 condition device", "small combination B1 condition device" and "small combination B2 condition device" are activated ("right in left" or "right in left" or "right in left") ”), “small win 01” may be awarded. Similarly, when the pressing order is correct when operating "small combination C1 condition device", "small combination C2 condition device", "small combination D1 condition device" and "small combination D2 condition device"("middle left and right" or "middle right left ”), “small win 02” may be awarded. In addition, when the pressing order is correct when activating "small combination E1 condition device", "small combination E2 condition device", "small combination F1 condition device" and "small combination F2 condition device"("right left middle" or "right middle left ”), “small win 03” may be awarded.

In this case, the winning probability of each minor combination during the special game may be set to be equal to or higher than the winning probability of each minor combination during non-internal and internal. When the winning probability of winning number "12" (small combination F2 condition device) to winning number "12" (small combination F2 condition device) is set to "2500/65536" respectively, winning number "17" (small combination ALL condition device) during the special game winning probability can be set to, for example, "10000/65536".

(10) In the first and second embodiments, the correct pressing order when the pressing order bell is won ("small combination A1 condition device" to "small combination F2 condition device" is activated) is "left middle right", " There are six options: left-right middle, middle left-right, middle right-left, right-left middle, and right-center left. 3 stops are optional" (left --), "1st stop is middle, 2nd and 3rd stops are optional" (middle --), "1st stop is right, 2nd and 3rd stops are optional" ” (Right--).

In this case, as the pressing order bell, "left --" is the correct pressing order, "left correct bell condition device", "middle --" is the correct pressing order, "middle correct bell condition device", "right --" ” can be provided as a “right correct bell condition device” in which the correct answer is pressed.
Then, when the "left correct bell condition device" is activated, the "small role 01" is awarded when the pressing order is correct, and when the "middle correct bell condition device" is activated, the "small role 02" is awarded, and the "right" is awarded. When the correct answer bell condition device is activated, the "small win 03" may be awarded.
In this case, the winning probabilities of the winning numbers corresponding to the ``left correct bell condition device'', ``middle correct bell condition device'' and ``right correct bell condition device'' in non-internal and internal are set to ``5000/65536'' respectively. If so, the winning probability of the winning number corresponding to the "minor win ALL condition device" during the special game can be set to, for example, "5000/65536".

(11) In the first and second embodiments, a slot machine was taken as an example of gaming machines, but the present invention can also be applied to casino machines and enclosed gaming machines (medalless gaming machines), for example.
Here, the sealed game machine (medal-less game machine) can eliminate, for example, the medal payout device (a unit including the hopper 35, the hopper motor 36, and the payout sensor 37). Also, the medal slot 43 and the medal selector can be eliminated. Then, all the electronic medals (electronic game media) granted by winning a winning combination are stored in the stored number display LED 76 . In this case, it is conceivable that the stored number display LED 76 is composed of, for example, five digits (up to "99,999" electronic medals can be stored).

<Third Embodiment>
In the third embodiment, a power switch 11, a door switch 17, a setting key insertion slot 151, a setting key switch 152, and a setting change (reset) switch 153 are provided.
The door switch 17 , setting key switch 152 , and setting change (reset) switch 153 are electrically connected to the main control board 50 via the input port 51 .

The power switch 11 is a switch that is operated when turning on/off the power.
In the following description, turning on the power switch 11 may be referred to as "turning on the power", "turning on the power", or "resuming the supply of power".
Also, turning off the power switch 11 may be referred to as "turning off the power" or "cutting off the supply of power."

The door switch 17 is a switch that detects opening of the front door 12 and is attached to the cabinet 13 or the front door 12 .
Although the front door 12 is normally closed, the front door 12 is opened, for example, when the power is turned on, when settings are changed, when settings are checked, when an error occurs, when medals are supplied, and the like.

The door switch 17 is turned off when the front door 12 is closed, and is turned on when the front door 12 is opened. Thereby, the opening of the front door 12 can be detected.
The door switch 17 is turned on when the front door 12 is closed, and is turned off when the front door 12 is open. Opening may be detected.

The setting key switch 152 is in a setting change state in which setting values can be changed (also referred to as "setting change mode" or "setting changing") or in a setting confirmation state in which setting values cannot be changed but can be confirmed ("setting confirmation mode"). Alternatively, it is also referred to as "setting checking".).
By inserting the setting key from the setting key insertion slot 151 and rotating the setting key clockwise by 90 degrees, the setting key switch 152 is turned on (also referred to as "first mode"), and the setting key is turned on from this state. The setting key switch 152 is set to be turned off (also referred to as a “second mode”) by rotating it counterclockwise by 90 degrees.

A setting change (reset) switch 153 is a switch that also serves as the setting change switch 153 , the reset switch 153 , and the RWM clear switch 153 .
The setting change switch 153 is a switch that is operated when changing the setting value in the setting change state.
Also, the reset switch 153 is a switch that is operated to return to the state before the error occurrence (to cancel the error state) after removing the error that has occurred.
Furthermore, the RWM clear switch 153 is a switch operated when initializing (clearing) a predetermined storage area in the RWM 53 .

In the following description, the term "setting change (reset) switch 153", the "setting change switch 153", the "reset switch 153", and the "RWM clear switch 153" will be used. have
Various switches such as the setting key switch 152 and the setting change switch (reset switch/RWM clear switch) 153 are called "operated" when they are on, and "operated" when they are off. There are cases where it is referred to as "not
In this embodiment, the setting change switch 153, the reset switch 153, and the RWM clear switch 153 are integrated. may

In addition, in the third embodiment, the "game section" includes a "normal section" and an "advantageous section".
The “normal section” is a game section that prohibits the transmission of signals related to the instruction function to the peripheral board (for example, the sub-control board 80), and does not affect the performance of the instruction function at all (the instruction function is not activated) is a game section. That is, the normal section is a game section in which an advantageous operation mode of the stop switch 42 is not notified. In addition, there is a case where the normal section is referred to as a "non-advantageous section".
The “advantageous section” is a game section having performance related to the instruction function (in which the instruction function may be operated). That is, the advantageous section is a game section in which the operation mode of the stop switch 42 (for example, correct pressing order) can be notified.

Further, in the third embodiment, an advantageous section display LED 77 is provided which can indicate to the player that it is an advantageous section. In a normal section, the advantageous section display LED 77 is turned off, and in an advantageous section, the advantageous section display LED 77 is turned on. That is, when the advantageous section display LED 77 is turned off, it indicates that it is a normal section, and when the advantageous section display LED 77 is lit, it indicates that it is an advantageous section. Thus, in the third embodiment, the display mode (turned off or lit) of the advantageous section display LED 77 and the game section (normal section or advantageous section) correspond to each other in a one-to-one relationship.
For example, as shown in FIG. 31, the segment P of the digit 4a of the acquisition number display LED78 can be used as the advantageous section display LED77. Also, an advantageous section display LED 77 can be provided separately from the acquired number display LED 78 .

It should be noted that the advantageous section display LED 77 is not turned on immediately after the transition from the normal section to the advantageous section, and when a predetermined condition is satisfied after the transition to the advantageous section (for example, when the stop switch 42 is operated in an advantageous manner). When the notification is started), the advantageous section display LED 77 may be lit. In this case, when the advantageous section display LED 77 is on, it indicates an advantageous section, but when the advantageous section display LED 77 is off, it may be a normal section or an advantageous section.

FIG. 32 is a diagram illustrating configurations of the main CPU 55, ROM 54, and RWM 53 in the third embodiment.
A main CPU 55 , RWM 53 and ROM 54 are provided on the main control board 50 .
Further, as shown in FIG. 32, a one-chip microprocessor (hereinafter simply referred to as "chip") is mounted on the main control board 50, and a main CPU 55 is provided in this chip. Furthermore, the main CPU 55 has a built-in memory, and this built-in memory has a (built-in) ROM 54 and a (built-in) RWM 53 . Furthermore, the addresses of the ROM 54 and RWM 53 are consecutive.

The storage area of the ROM 54 has a used area and a non-used area, and the used area and the non-used area each have a control area and a data area.
Here, the "usage area" is a storage area in which information related to progress of the game is stored.
A "control area" is a storage area in which various programs executed by the main control means 50 are stored, and is also called a "program area".
Furthermore, the "data area" is a storage area in which information other than the program is stored, and is a storage area in which data used when the program is executed is stored.

Furthermore, the "outside use area" is a storage area in which information unrelated to the progress of the game is stored. This is a storage area in which programs, etc. for fraud prevention are stored.
In addition, the "outside use area" has a control area and a data area like the use area. The control area of the used area may be called "first control area" or "first program area", and the control area outside the used area may be called "second control area" or "second program area".
Furthermore, the program stored in the control area (first control area, first program area) of the use area is called "first program", and the control area outside the use area (second control area, second program area) The program stored in is sometimes referred to as a "second program".

During the execution of the program (first program) stored in the control area of the used area of the ROM 54, reference (access) to the data stored in the data area of the used area of the ROM 54 is permitted, but the used area of the ROM 54 is permitted. Reference to data stored in the external data area is prohibited.
Similarly, during the execution of the program (second program) stored in the control area outside the use area of the ROM 54, reference to the data stored in the data area outside the use area of the ROM 54 is allowed, but the ROM 54 Reference to data stored in the data area of the used area is prohibited.

Like the ROM 54, the storage area of the RWM 53 has a used area and a non-used area, and the used area and the non-used area each have a work area and a stack area.
As shown in FIG. 32, addresses "F000(H)" to "F1FF(H)" are used areas, addresses "F200(H)" to "F20F(H)" are unused areas, and addresses "F200(H)" to "F20F(H)" are used areas. F210(H)” to “F3FF(H)” are outside the use area.

During the execution of the program (first program) stored in the control area of the used area of the ROM 54, the data stored in the used area of the RWM 53 are permitted to be referenced (accessed) and rewritten (overwritten). However, data stored outside the use area of the RWM 53 is permitted to be referenced, but prohibited to be rewritten.
Similarly, while the program (second program) stored in the control area outside the use area of the ROM 54 is being executed, the data stored outside the use area of the RWM 53 are permitted to be referenced and rewritten. , and RWM 53, reference is allowed, but rewriting is prohibited. This is to prevent the processing from becoming complicated.

In addition, in order to prevent data in the used area of the RWM 53 from being rewritten (overwritten) due to program runaway or the like during execution of a program (second program) outside the used area, the used area of the RWM 53 is An unused area is provided between and outside the used area.
Furthermore, if interrupt processing enters during the execution of a program (second program) outside the usage area, there is a possibility that the data in the usage area of the RWM 53 will be rewritten (overwritten) by the interrupt processing. Interrupt processing is prohibited during execution of (second program).

Further, as shown in FIG. 32, the ROM 54 has a program management area and the like as other areas in addition to the use area and the non-use area.
Furthermore, as shown in FIG. 32, the RWM 53 has an unused area and the like as other areas in addition to the used area and the non-used area.

Furthermore, among the storage areas of the internal memory as a whole, areas other than the ROM 54 and the RWM 53 include an internal register area, an unused area, and the like.
Further, the built-in register area is provided with, for example, A registers to L registers, a transmission register, and the like.

FIG. 33 is a diagram showing addresses, label names, number of bytes, and names of data stored in the used area of the RWM 53 in the third embodiment.
As shown in FIG. 32, the addresses of the used area are set in the range from "F000(H)" to "F1FF(H)".
Note that the data shown in FIG. 33 is for use in the explanation of the third embodiment, and the data stored in the use area of the RWM 53 is not limited to these.

Address "F000(H)" is a storage area for set value data (_NB_RANK). When the setting value is "N", "N-1" is stored as the setting value data. In this embodiment, it has set values "1" to "6". Therefore, any value from "0 (H)" to "5 (H)" is stored as the set value data.
Then, the set value display LED 73 displays "N", which is obtained by adding "1" to the set value data, as the set value.

The address "F001(H)" is a 1-byte storage area in which set value display data (_NB_RANK_DSP) is stored. When the setting value is "N", "N-1" is stored as the setting value data (_NB_RANK) at the address "F000(H)". Then, "N" obtained by adding "1" to the set value data (_NB_RANK) is stored at the address "F001 (H)" as the set value display data (_NB_RANK_DSP).

In this embodiment, there are set values "1" to "6", and address "F000 (H)" has set value data (_NB_RANK) of "0 (D)" to "5 (D)". Any value is stored, and any value of "1 (D)" to "6 (D)" is stored as set value display data (_NB_RANK_DSP) at address "F001 (H)" , the value of the set value display data (_NB_RANK_DSP) is displayed on the set value display LED 73 as the set value.

Address "F010(H)" is a storage area for credit amount data (_NB_CREDIT). The credit amount data is data to be displayed on the credit amount display LED 76 . In this embodiment, any value from "0" to "50(D)" is stored as the credit amount data.
Here, in the present embodiment, a value obtained by converting the credit amount into a decimal number is stored as the credit amount data. For example, when the number of credits to be displayed is "29", the value "29(H)" is stored. In other words, "00101001(B)" is stored at address "F010(H)". As a result, the lower 4 bits of D0 to D3 of the address "F010(H)" are data for displaying the lower digit of the credit number ("9" in this example), and the upper 4 bits of D4 to D7 are , is data for displaying the upper digits (“2” in this example) of the number of credits. In this embodiment, the upper limit of the number of credits is "50 (D)", so the data value to be stored is in the range of "0" to "50".
In this embodiment, the address of the RWM 53 for storing the credit amount data itself is not provided, and the credit amount data is provided as the display data of the credit amount display LED 76 .

The address "F011(H)" is a storage area for acquisition number data (_NB_PAYOUT). Acquisition number data is data to be displayed on the acquisition number display LED 78 . In the acquisition amount data, similarly to the credit amount data described above, the lower 4 bits of D0 to D3 are data for displaying the lower digits, and the upper 4 bits of D4 to D7 are for displaying the upper digits. Data.
In this embodiment, when a small winning combination is won, the payout number data corresponding to the winning minor combination is stored as the winning number data in order to display the payout number corresponding to the winning minor combination on the winning number display LED 78.例文帳に追加Specifically, when a small win is won and medals are paid out, the win count data is added as the medals are paid out, and the display of the win count display LED 78 is updated. For example, when "1 (H)" is stored as the acquisition number data, the acquisition number display LED 78 displays "01".

Here, the payout number data (_NB_PAY_MEDAL) of the address "F040 (H)" to be described later stores "8 (H)" when, for example, an 8-card hand wins, and the payout number data is stored at the time of medal payout ( (including addition to credits) is decremented by "1" according to the number of payouts, such as "8"→"7"→...→"0".
On the other hand, the winning number data stored at the address "F011(H)" is "0"→"1"→"2"→ . . . , "1" is added each time one medal is paid out. Therefore, the display of the acquisition number display LED 78 also counts up like "0"→"1"→"2"→...→"8".

In addition, in this embodiment, "88" is displayed on the acquired number display LED 78 during the setting change. Therefore, during setting change display data for displaying "88" is stored as acquisition number data. By displaying "88" on the winning number display LED 78, it is possible to recognize from the front side of the game machine that the setting is being changed. Furthermore, by lighting "88" and all segments, it is possible to confirm that there is no segment defect (that there is no segment that cannot be lit).
Since the upper limit of the payout number of medals is 15, it can be understood that when "88" is displayed on the acquired number display LED 78, it is not the display of the payout number.

Furthermore, when the condition for instructing the specified number (the number of medals to bet in the game this time) is satisfied, the number of acquired medals is displayed before the game starts (before betting becomes possible or the start switch 41 is operated). A specified number is instructed (displayed, notified) on the display LED 78 .
In this embodiment, "0A" is displayed on the acquisition number display LED 78 to indicate the prescribed number "2". Therefore, when instructing the specified number, the specified specified number display data for displaying "0A" is stored as the acquired number data.

Furthermore, when winning a push order bell or the like during AT, push order instruction information is displayed on the acquired number display LED 78 . Therefore, when the pressing order instruction information is displayed on the acquired number display LED 78, the pressing order instruction number is stored as the acquired number data.
For example, when the pressing order instruction information is displayed in a game in which the winning number "3" is won, the pressing order instruction number "A1(H)" is stored as the winning number data. As a result, the push order instruction information "=1" corresponding to the push order instruction number "A1(H)" is displayed on the acquisition number display LED78.

Also, when a predetermined error occurs, the error number is displayed on the acquired number display LED 78 . Therefore, when a predetermined error occurs, error number display data for displaying the error number is stored as the acquired number data.
For example, when the error number to be displayed is "HP", the error number display data for displaying "HP" is stored as the acquired number data.

The address "F030(H)" is a storage area for the action status flag (_FL_ACTION). The operating state flag (_FL_ACTION) is a flag for determining whether or not replays and accessories are operating.
For example, when 1BB is activated, the D2 bit of the activation status flag is set to "1". Also, when it is determined that the symbol combination corresponding to the replay has been stopped and displayed, the D0 bit of the operating state flag is set to "1".

Address "F040(H)" is a storage area for payout number data (_NB_PAY_MEDAL). The payout number data is data indicating a value corresponding to the payout number when a small winning combination is won in the game and the payout number is determined. When a minor winning combination is won, payout number data corresponding to the winning minor winning combination is stored, and medal payout processing is executed. Here, the payout number data is subtracted by "1" each time one medal is paid out ("1" is added to the number of credits or one actual medal is paid out (from the hopper 35)). That is, it has a role as the number of times the payout process is executed. Thus, when the medal payout process is completed, the payout number data becomes "0".

The address "F041(H)" is the storage area of the payout number data buffer (_BF_PAY_MEDAL). Similar to the payout number data, the payout number data buffer becomes data indicating a value corresponding to the payout number when a small winning combination is won in the game and the payout number is determined. Here, unlike the payout number data, the payout number data buffer is not decremented for each medal payout process, and the initially stored value is maintained. Then, the value is maintained until the medal payout number update process of the next game. For example, when a small winning combination of 8 payouts is won in the relevant game, "8 (H)" is stored as the payout number data buffer, and in the next game when the winning combination is not won, the payout number data buffer is stored. "0" is overwritten.

The address "F042(H)" is a storage area for automatic bet number data (_NB_REP_MEDAL). The automatic bet number data indicates the number of medals to be automatically bet upon winning a replay, and stores "2" or "3" in this embodiment.
Address "F043(H)" is a storage area for bet number data (_NB_PLAY_MEDAL). The bet number data indicates the number of bets in the current game, and in this embodiment, any one of "0" to "3" is stored.

The address "F044(H)" is a 1-byte storage area in which the status display LED lighting data is stored.
As shown in FIG. 36A, which will be described later, in the third embodiment, a 1-bet display LED 79a, a 2-bet display LED 79b, a 3-bet display LED 79c, a game start display LED 79d, and a put-in state display LED 79 are provided on the display substrate 75. It has six LEDs, a display LED 79e and a replay display LED 79f.
The state display LED lighting data is data indicating whether or not three of the six LEDs, the game start display LED 79d, the insertion display LED 79e, and the replay display LED 79f, should be lit.

As shown in FIG. 33, the D0 bit of the state display LED lighting data is assigned to the game start display LED 79d, the D1 bit is assigned to the insertion display LED 79e, and the D2 bit is assigned to the replay display LED 79f. there is Each bit of the status display LED lighting data matches each bit of the LED display counter 1 in FIG. 40(A), which will be described later.
Then, "1" is set to the bit corresponding to the LED to be turned on, and "0" is set to the bit corresponding to the LED to be turned off.
For example, when the game start display LED 79d is turned on and the insertion display LED 79e and replay display LED 79f are turned off, "00000001 (B)" is stored as the state display LED lighting data.

The address "F051(H)" is a 1-byte storage area in which the LED display counter 1 (_CT_LED_DSP1) is stored.
The LED display counter 1 is a counter for determining which of digits 1 to 5 is to be lit, and is continuously updated for each interrupt.
Here, "digit" means a display unit (display), and in this embodiment, it is composed of one 7-segment display. Of the digits of this embodiment, digit 1 corresponds to the upper digits of the credit number (stored number) display LED 76 and digit 2 corresponds to the lower digits of the credit number display LED 76 . Digit 3 corresponds to the upper digit of the acquired number display LED 78 , digit 4 corresponds to the lower digit of the acquired number display LED 78 , and digit 5 corresponds to the set value display LED 73 .
As for each bit of the LED display counter 1, the D0 bit is assigned to the digit 1 signal, the D1 bit to the digit 2 signal, . . . , and the D4 bit to the digit 5 signal. Then, in one interrupt process, dynamic lighting of digits 1 to 5 is performed so that the digit corresponding to the bit "1" in the LED display counter 1 is lit.

In the third embodiment, the LED display counter 1 takes a value of "00010000 (B)" as an initial value. Then, the LED display counter 1 is updated by shifting the bit "1" of the LED display counter 1 to the right by one digit as it progresses from interrupt "1" to "2" to . . . (for each interrupt). . In addition, in the interrupt following the interrupt "5", the LED display counter 1 becomes "00000000 (B)" by shifting it to the right by one digit. Set counter 1 to "00010000 (B)". As a result, the LED display counter 1 repeats the values "5"→"4"→...→"1"→"5"→"4"→... for each interrupt process. That is, five interrupts constitute one cycle.

From the above, the value of the LED display counter 1 is
"N" interrupt: 00010000 (B)
"N+1" interrupt: 00001000 (B)
"N+2" interrupt: 00000100 (B)
"N+3" interrupt: 00000010 (B)
"N+4" interrupt: 00000001 (B)
"N+5" interrupt: 00000000 (B) → 00010000 (B) (initialization; same value as "N" interrupt)
"N+6" interrupt: 00001000 (B)
:
becomes.

In the third embodiment, five interrupts constitute one cycle, and digits 1 to 5 are dynamically lit. Specifically, when the value of the LED display counter 1 is "00010000 (B)", the digit 5 signal is output. By outputting the digit 5 signal, the digit 5 (setting value display LED 73) can be lit (digits 1 to 4 are extinguished). At the time of the next interrupt processing, the LED display counter becomes "00001000 (B)", a digit 4 signal is output, and digit 4 (lower digit of acquisition number display LED D78) can be lit (digits 1 to 3 and 5 are extinguished). Become.

The address "F052(H)" is a storage area for the LED display request flag (_FL_LED_DSP). The LED display request flag takes a value corresponding to normal operation, setting change operation, or setting confirmation operation.
In the third embodiment, the value "00001111 (B)" is taken because digits 1 to 4 are lit and digit 5 is not lit during normal operation. During setting change and setting confirmation, digit 5 is lit and digits 1 to 4 are not lit, so the value is "00010000 (B)".

Address "F061(H)" is a storage area for the advantageous section type flag (_NB_ADV_KND). The advantageous section type flag is a flag indicating whether the current game section is a normal section or an advantageous section.
The advantageous section type flag stores "00000000 (B)" in the normal section, and the D0 bit becomes "1" when the normal section shifts to the advantageous section.
The timing at which the advantageous section type flag is updated will be described later.

The address "F062(H)" is a storage area for the advantageous section display LED flag (_FL_ADV_LED). The advantageous section display LED flag is a flag indicating whether or not the advantageous section display LED 77 is lit. When the advantageous section display LED 77 is turned off, the advantageous section display LED flag is "0", and when the advantageous section display LED 77 is lit, the advantageous section display LED flag is "1".
The advantageous section display LED 77 may be turned on at any time after transition to the advantageous section (for example, the advantageous section display LED 77 may be turned on at the same time as the transition to the advantageous section).

On the other hand, even after shifting to the advantageous section, the advantageous section display LED 77 may not be turned on.
Specifically, first, there are cases where the advantageous section display LED 77 is not turned on when transitioning to the advantageous section, but is turned on afterwards (during the advantageous section).
Secondly, when the advantageous section display LED 77 is not lit when transitioning to the advantageous section, and when the advantageous section end condition is satisfied before the condition for lighting the advantageous section display LED 77, the advantageous section display LED 77 is not turned on once. The advantageous section may end without lighting.

Furthermore, in the present embodiment, in a game state in which the interval Sim is in an advantageous interval and the interval Sim ball-out rate exceeds "1", when the instruction function is activated (when the correct pressing order is notified), the advantageous interval is displayed. LED 77 is lit.
Furthermore, once the advantageous section display LED 77 is turned on, the lighting is maintained during the advantageous section.
Further, during the game end check processing in the final game of the advantageous interval, processing for turning off the advantageous interval display LED 77 is executed. Specifically, when the advantageous interval end condition is satisfied, the advantageous interval display LED flag storage area is initialized (the advantageous interval display LED flag is cleared). As a result, the advantageous section display LED 77 is extinguished in subsequent interrupt processing.

Furthermore, the lighting timing when the advantageous interval display LED 77 is lit in a game in which the instruction function is activated is, for example, when the start switch 41 is operated (more specifically, after the reel 31 starts rotating, the reel 31 until the rotation reaches a constant speed state).
However, it is not limited to this, and other lighting timings include, for example,
1) Before the start switch 41 is operated 2) After the start switch 41 is operated, when all the reels 31 are in a constant speed state and the operation of the stop switch 42 can be accepted,
3) when at least one reel 31 is stopped and at least one other reel 31 is rotating;
4) When all reels 31 are stopped,
5) After all the reels 31 have stopped (the relevant game is finished) and before the settlement switch 43 can be operated before the start of the next game.

However, when the advantageous zone display LED 77 is lit in a game in which the instruction function is activated, it is necessary to determine the winning combination in the game, so the time before the start switch 41 is operated (before the combination lottery) is excluded. .
When the advantageous interval display LED 77 is turned on in the game in which the instruction function is activated, the start switch 41 is operated and the lottery for the winning combination is executed. The timing at which the advantageous section display LED 77 is turned on before reaching the constant speed state is the shortest timing.

The address "F063(H)" is the storage area for the advantageous section clear counter (_CT_ADV_CLR). The advantageous interval clear counter is a decrement counter for counting the number of games played during the advantageous interval. The advantageous section clear counter is "0" during the normal section, and is set to "1500 (D)" as an initial value when shifting to the advantageous section. Also, the advantageous interval clear counter is set to be decremented by "1" per game not only during the advantageous interval but also during the normal interval. However, the minimum value is "0". Therefore, in the normal section, when the advantageous section clear counter (before subtraction) is "0", even if "1" is subtracted, the value after subtraction is "0". Therefore, during the normal section, "1" is subtracted for each game, but "0" is maintained. In other words, when "0" is stored in the advantageous section clear counter, it is a normal section (non-advantageous section).

Further, when the game is shifted to the advantageous section, the advantageous section clear counter is set to "1500 (D)" as an initial value, so that the advantageous section clear counter becomes "1499 (D)" in the next game.
Note that the advantageous section clear counter stores an initial value of "1500 (D)" at maximum, so it consists of 2 bytes. In other words, when a value other than "0" is stored in the advantageous interval clear counter, it is an advantageous interval.

The address "F065(H)" is the storage area for the difference number counter (_SC_24HGAME). The difference number counter is a counter that stores a value corresponding to the cumulative value of the number of difference coins during the advantageous interval, and is also called "MY counter".
The difference number counter does not simply store the cumulative value of the number of difference sheets itself, but stores a "value corresponding" to the cumulative value of the number of difference sheets. For example, when the difference number becomes a value corresponding to a minus value, the value is corrected to "0 (H)". Therefore, "accumulated value of difference number ≠ difference number counter value".
The difference number counter is an increment counter for determining whether or not the value corresponding to the cumulative value of the difference number of sheets during the advantageous section exceeds "2400 (D)". Therefore, the difference number counter consists of a 2-byte storage area.

It is sufficient for the difference number counter to count the cumulative value of the difference number of sheets at least during the advantageous interval, and it is not necessary to count during the non-advantageous interval (normal interval).
Here, when updating the difference counter value on the condition that the game is in the advantageous section, it is necessary to perform a process of determining whether or not the game is in the advantageous section for each game. For this reason, in the present embodiment, the update of the difference counter value is executed including during the non-advantageous section (normal section). In this way, the difference counter value can be updated without determining whether or not the game is in the advantageous section every game, so the processing can be simplified.

Furthermore, even when the difference number becomes negative in the game this time and the value corresponding to the cumulative value of the difference number becomes the carry-down data, the difference number counter value is updated. However, if the result of the calculation is that the difference counter is the data that is carried down, the difference counter value is corrected to "0".

To give a specific example (assuming that the difference number counter value at the start of the first game is "0 (H)"),
1st game: When the number of bets is "3" and the number of payouts is "0", the difference counter after calculation is "FFFD (H)" and the difference counter after correction is "0 (H)".
Second game: number of bets "3", number of payouts "9", difference counter after calculation "0006 (H)" (no correction)
3rd game: number of bets "3", number of payouts "0", difference number counter after calculation "0003 (H)" (no correction)
4th game: number of bets "3", number of payouts "1", difference counter after calculation "0001 (H)" (no correction)
Fifth game: number of bets "3", number of payouts "0", difference counter after calculation "FFFE (H)", difference counter after correction "0 (H)"
is updated as
Even if the difference counter of the previous game is "0 (H)" and the difference counter of the current game is "0 (H)", the difference counter value reflecting the difference of the game is changed again. Since it is a calculated result, such a case also corresponds to "update" of the difference number counter.

As described above, when the post-calculation difference counter value is a value that has undergone a carry-down, the difference counter value is corrected to "0" (the initial value "0" is set). A method of determining whether or not a digit has been digitized will be described later.
By updating the difference counter value in this manner, the difference counter value increases as the game progresses, for example, when the number of payouts is large relative to the number of bets, that is, when the difference number is increasing. On the other hand, when the number of payouts is less than the number of bets, for example, in a game during a normal period, the difference counter value is increased by the number of payouts when a payout based on a winning of a small combination is made, but after that, the number of payouts is increased. falls below the number of bets, it eventually becomes "0".

The address "F067(H)" is a storage area for the AT flag (_FL_AT_KND). The AT flag is a flag for determining whether or not AT is in progress, and is set to "0" during non-AT and to "1" during AT. The timing at which the AT flag is set to "1" is when the AT lottery is won, and this is executed in step S364 of FIG. 46, which will be described later. Also, the AT flag is turned off at the end of the final AT game, which is executed, for example, in a game end check process (step S415 in FIG. 50), which will be described later. Further, the data cleared (initialized) at the end of the advantageous section includes an AT flag.

The address "F068(H)" is the storage area of the AT game number counter (_CT_ART). The AT game number counter is a decrement counter that counts the number of games during AT (including ART). Unlike the advantageous section clear counter, the AT game number counter stops counting (decrementing) after it reaches "0".
The update (subtraction) of the AT game number counter during AT is after the start switch 41 is operated during the main process (M_MAIN) (FIG. 46) (step S281 in FIG. 46).

In addition, in this embodiment, since the initial value of the number of AT games may exceed "255 (D)", the AT game number counter is composed of a 2-byte counter. When the number of AT games is maximum "255 (D)" or less, the AT game number counter may be composed of a 1-byte counter.
When starting AT (or when shifting to AT preparation), the initial value is set to the AT game number counter. The initial value may be a fixed value, or may be determined by a lottery or the like when AT is won. Moreover, after determining the initial value, the number of AT games may be updated to "0" without being changed thereafter. Alternatively, when a predetermined condition is satisfied during AT, the number of AT games may be added, and when winning an additional lottery, the number of AT games may be increased. In this case, the increment is added to the AT game number counter.
This AT game number counter is also included in the data cleared at the end of the advantageous section.

In this embodiment, since the number-of-games management type AT is exemplified, an AT game number counter is provided. Therefore, in the case of the difference number management type AT, an AT difference number counter is provided instead of the AT game number counter. Then, at the start of AT, the initial value of the obtainable difference number is set. Also, when winning the addition, the number of additional winnings is added. Then, each time a payout is made, the difference number of the game is subtracted, and when the AT difference number counter becomes "0", the AT is terminated.

A 48-byte storage area at addresses "F1D0(H)" to "F1FF(H)" is a stack area for use.

Here, the management information display LED 74 is also called a "role ratio monitor" or a "ratio indicator", and is composed of four LEDs (digits 6 to 9 in order from the left).
Also, of the four LEDs constituting the management information display LED 74, the two LEDs (digits 6 and 7) on the left side are also called "identification segments" and display the type of information. The two LEDs (digits 8 and 9) on the right are also called "ratio segments" and display the calculated ratio.

Furthermore,
Digit 6: Identification segment upper digit Digit 7: Identification segment lower digit Digit 8: Ratio segment upper digit Digit 9: Ratio segment lower digit There are cases where these are also referred to.

In the third embodiment, the management information display LED 74 repeatedly displays the following six items of information 1) to 6) as management information at predetermined time intervals.
1) Directed role ratio (cumulative) (7P.)
2) Continuous accessory ratio (6000 games) (6y.)
3) Accessory ratio (6000 games) (7y.)
4) Continuous accessory ratio (cumulative) (6A.)
5) Role ratio (cumulative) (7A.)
6) Accessory condition ratio (cumulative) (5H.)

For example, when displaying the role ratio (total), when the ratio is "50"%, the symbol "7A." indicating the role ratio (total) is displayed in the identification segment, and "50" is displayed. Show on ratio segment.
Here, "total" refers to the total sum of the numbers that have been counted up to that point, and in the present embodiment, the number of games is counted until it reaches at least "175000" games.
When the total number of games is less than "175000", the ratio is displayed in the ratio segment by blinking display, and when the total number of games is "175000" or more, the ratio is displayed in the ratio segment by lighting display, for example.
Even after the cumulative number of games reaches "175000" or more, the cumulative total continues to be added until it reaches a value (upper limit) that can be stored in a predetermined address of the RWM 53 .
Also, "6000 games" is the total number of games played for 15 sets of "400" games for one set.

The "instruction-including role ratio" is a value obtained by dividing the sum of the number of payouts when the role is activated and the number of payouts in the game in which the instruction function is activated, by the total number of payouts.
In the case of a slot machine in which no role is installed, the "indicated role ratio" is a value obtained by dividing the number of payouts in the game in which the instruction function is activated by the total number of payouts.
In addition, the sum total of the number of payouts at the time of operating the role and the number of payouts in the game in which the instruction function is operated is counted by the instructed role product counter.

Regarding "the number of payouts in the game in which the instruction function is activated", for example, when a 15-piece combination is won based on the operation of the stop switch 42 in the displayed pressing order in the game in which the instruction function is activated. adds the number of payouts "15" to the instructed accessory counter and the total payout (cumulative) counter.
For example, during a 1BB game, the minor combination condition device A1 to minor combination A6 condition device is activated, and the instruction function is activated (the correct order of pressing (the order of pressing the winning combination of 15 cards) is displayed). When the stop switch 42 is operated in the pressing order (correct pressing order) and a 15-card combination (any of the small winning combination 01 to the small winning combination 06) is won, it is paid out to the instructed accessory counter and the total payout (cumulative) counter. Add the number "15".

On the other hand, in a game in which the instruction function is activated, when the stop switch 42 is operated in a different order from the displayed order, for example, when a 3-card combination is won, the instruction-inclusive accessory counter and the total payout ( Cumulative) Add the number of payouts "3" to the counter.
For example, in a game in which the minor combination condition device A1 to minor combination A6 condition device is activated during a 1BB game and the instruction function is activated (the correct pressing order is displayed), the pressing order different from the displayed pressing order (incorrect pressing order order) and the stop switch 42 is operated, when a 3-card combination (any of the 13th to 24th minor combination) is won, the number of payouts "3" ” is added.

In addition, in the game in which the instruction function is activated, when the stop switch 42 is operated in a different order from the displayed order of pushes, and thus the winning combination is missed (when the combination is not won), the indicated role counter and The total payout (cumulative) counter has the same value as the previous game.
For example, when the stop switch 42 is operated in the order of pressing the wrong answer, the combination is not won (no combination is won). Then, in a game in which the minor combination condition device A1 to minor combination A6 condition device is activated during the 1BB game and the instruction function is activated (correct pressing order is displayed), the pressing order different from the displayed pressing order (incorrect pressing order) When the stop switch 42 is operated in order), when the winning combination is lost (when the combination is not won), the values of the instructed role counter and total payout (cumulative) counter become the same values as in the previous game. .

In the present embodiment, when the stop switch 42 is operated in a different pressing order than the displayed pressing order in the game in which the instruction function is activated, and the winning combination is missed, the instructed accessory counter and the total payout are displayed. By executing the process of adding the payout number "0" to the (total) counter, the values of both counters are set to the same values as in the previous game.
When a winning combination is missed, the process of adding the number of payouts may be skipped. In other cases, it is necessary to configure the program so as to skip the process of adding the number of payouts.
Therefore, in this embodiment, when a winning combination is lost, a process of adding the payout number "0" to both counters is executed. As a result, the values of both counters can be set to the same values as in the previous game without inserting the processing for judging whether or not a winning combination has been missed, so that the amount of use of the ROM 54 can be reduced and the processing of the main CPU 55 can be performed. The burden can also be reduced.

"Continuous bonus ratio" refers to the ratio of the number of payouts at the time of activation of the first class special bonus (RB) to the total number of payouts.
For example, when the total number of payouts for the number of games played is "6000" and the total number of payouts is "2000", and the number of payouts when the "first class special bonus (RB)" is activated is "500", the "continuous bonus Ratio (6000 games)” becomes “25 (%)”.

"Accessory ratio" refers to the ratio of the number of payouts at the time of activation of the accessory to the total number of payouts.
Here, the "accessories" are, in addition to the above-mentioned first-class special-accessories (RB), second-class special-accessories (CB) and MB (also referred to as 2BB). Equipment. CB is continuous operation.), SB (single bonus) is included.

The "accessory state ratio" is a value obtained by dividing the sum of the number of games played when the accessory is activated and the number of games played when the accessory continuous actuating device is activated, by the total number of games played.
In addition, the total sum of the number of games played when the accessory is activated and the number of games played when the accessory continuous actuating device is activated is counted by the accessory state counter.
In addition, in the above six items, in a game machine that does not have the function corresponding to the item, the ratio segment is lit and displayed as "--".
For example, if "RB (first class special role)" is not provided, there is no continuous role ratio, so when ratio display numbers "2" and "4" are displayed, the ratio segment is set to "-- ” lights up.

According to the regulations, the ratio of instructed accessories should be set to less than 70%, the ratio of accessories should be set to less than 70%, the ratio of continuous accessories should be set to less than 60%, and the condition ratio of accessories, etc. should be set to less than 50%. there is
By looking at the information displayed on the management information display LED 74, it is possible to confirm whether or not the information is within the range defined by the regulations.

In addition, in order to enable devices external to the slot machine 10, such as the hall computer 200, to grasp the various ratio information, the various ratio information may be output as an external signal.
For example, the designated role ratio data, continuous role ratio (cumulative) data, role ratio (cumulative) data, and role ratio status ratio data displayed on the management information display LED 74 (role ratio monitor) are used as external signals. It may be configured to enable output. At this time, a predetermined number of games (for example, "17500 times" for continuous role ratio (cumulative) data and role ratio (cumulative) data, instructed role ratio data, and role condition ratio data (for example, "175,000 times") is not satisfied, predetermined information different from the current ratio information (for example, "FF (H)", etc.) is output as an external signal, and a predetermined number of games is output. When the conditions are satisfied, various ratio information may be output as an external signal.
Furthermore, the advantageous section ratio data, which is not displayed on the management information display LED 74 (role ratio monitor), may be configured to be output as an external signal. In this case, an advantageous interval game number counter for counting the number of games played in the advantageous interval and a storage area for advantageous interval ratio data indicating the ratio of the number of games played in the advantageous interval to the total number of games may be provided outside the use area of the RWM 53 .

34 and 35 are diagrams showing addresses, label names, number of bytes, and names of data stored outside the use area of the RWM 53 in the third embodiment.
The addresses outside the use area are set in the range of "F210(H)" to "F3FF(H)", as shown in FIG.
The data shown in FIGS. 34 and 35 are used in the explanation of the third embodiment, and the data stored outside the use area of the RWM 53 is not limited to these.

The 400 game counter at the address "F210(H)" adds the number of games played at 400 games. This 400 game counter is a counter that cycles from "0" to "399 (D)" and is incremented by "1" each time a game is played. When "1" is added when the value of the 400 game counter is "399 (D)", the value of the 400 game counter becomes "0".

Contrary to the above, "399 (D)" may be set as the initial value of the 400 game counter, and "1" may be subtracted each time the game is played. In this case, when the value of the 400 game counter becomes "0", it is determined that 400 games have been executed. When "1" is subtracted when the value of the 400 game counter is "0", the initial value "399 (D)" is set to the 400 game counter.

The ring buffer number of the address "F212(H)" is for designating to which ring buffer the number of payout medals is added when medals are paid out in the game.
Specifically, at the address "F212(H)", any one of "0" to "14(D)" is stored as the ring buffer number.

Addresses "F213(H)" to "F230(H)" are storage areas of total payout ring buffers 0 to 14. FIG. The total payout ring buffers 0-14 consist of 15 ring buffers. Each total payout ring buffer consists of 2 bytes. For example, total payout ring buffer 0 consists of addresses "F213(H)" and "F214(H)", where address "F213(H)" is the lower digit and address "F214(H)" is the upper digit. In FIGS. 34 and 35, the lowest address number is displayed for the storage areas with the number of bytes of "2" or more.

One ring buffer stores the total number of payouts for 400 games. For example, the payout numbers for the 1st game to the 400th game are stored in the addresses "F213(H)" and "F214(H)", and the next payout numbers for the 401st game to the 800th game are stored in the address "F215 ( H)” and “F216(H)”.
Here, whether or not the 400th game has been played is determined by referring to the 400th game counter at the address "F210(H)". Further, it is determined by referring to the ring buffer number of the address "F212(H)" to which ring buffer value the number of medals to be paid out in the game is added (the value is updated).

When the total number of payouts from the 1st game to the 400th game is stored in the total payout ring buffer 0 of the addresses "F213(H)" and "F214(H)", the total number of the 5601st game to the 6000th game is stored. The payout number is stored in the total payout ring buffer 14 at addresses "F22F(H)" and "F230(H)". Next, at the end of the 6000th game, the data stored in the total payout ring buffer 0 at addresses "F213(H)" and "F214(H)" is cleared, and the number of payouts from the 6001st game to the 6400th game is cleared. is stored in the total payout ring buffer 0 at addresses "F213(H)" and "F214(H)".

Each of the total payout ring buffers 0 to 14 consists of 2 bytes. Assuming that the maximum number of payouts in one game is "15", the maximum number of payouts in 400 games is 6000, so the storage capacity is 2 bytes.
This point also applies to the continuous bonus ring buffers 0 to 14 and the bonus bonus ring buffers 0 to 14, which will be described later.

Further, the addresses "F231(H)" to "F24E(H)" are storage areas of the continuous award payout ring buffers 0 to 14.
Furthermore, the addresses "F24F(H)" to "F26C(H)" are storage areas of the prize payout ring buffers 0 to 14, respectively.

The total number-of-games counter of addresses "F26D(H)" to "F26F(H)" is a counter for storing the number of games played (accumulated), and consists of 3 bytes. Since it is necessary to count "175000 (D)" games as the total number of games played, the total number of games counter is composed of 3 bytes.
The total number of games played counter continues to count even if the number of games played exceeds "175000 (D)" games, and stops counting when 3 bytes are full ("FFFFFF (H)").

The instructed role product counter of the addresses "F270(H)" to "F272(H)" is a counter that counts the number of payouts when the role product is activated and the number of payouts in the game in which the instruction function is activated. Consists of 3 bytes.
The total payout (6000 times) counter of addresses "F273(H)" to "F275(H)" is a counter that counts the total number of medals paid out during 6000 games. Even if 15 medals are paid out per game in 6,000 games, the total number is 90,000, so it can be counted with 3 bytes. The same applies to the payout (6000 times) counter).

The continuous accessory payout (6000 times) counter of the addresses “F276(H)” to “F278(H)” is a counter for counting the number of payouts when the continuous accessory is activated during 6000 games.
The accessory payout (6000 times) counter of addresses "F279(H)" to "F27B(H)" is a counter that counts the number of payouts when the accessory is activated during 6000 games.

Then, when there is a payout while the continuous accessory is not operating and the accessory is not operating, only the total payout (6000 times) counter is updated (added), and the continuous accessory payout (6000 times) counter and the accessory payout are updated (added). (6000 times) The counter is not updated.
Further, when there is a payout while the continuous accessory is not activated and the accessory is activated, the total payout (6000 times) counter and the accessory payout (6000 times) counter are updated, and the continuous accessory payout (6000 times) counter is updated. is not updated.
Furthermore, when there is a payout during continuous accessory operation, the total payout (6000 times) counter, the accessory payout (6000 times) counter, and the continuous accessory payout (6000 times) counter are all updated.

The values of the total payout (6000 times) counter, the continuous bonus payout (6000 times) counter, and the bonus bonus payout (6000 times) counter are updated every 400 games.
First, when there is a payout of medals from the first game to the 6000th game, the total payout (6000 times ) counter, continuous bonus payout (6000 times) counter, and bonus bonus payout (6000 times) counter.
At the end of the 6000th game, the continuous role ratio (6000 times) and the role ratio (6000 times) are calculated. After this calculation, each number of payouts in 400 games from before "400 × 15-1" games (5999 games) to before "400 × 15-400" games (5600 games) from the game is the total payout (6000 times) counter value, continuous bonus payout (6000 times) counter value, and bonus bonus payout (6000 times) counter value.

For example, when it is the 6000th game, the total payout ring buffer 0 (F213(H) to F214(H)) value is subtracted from the total payout (6000 times) counter value. Then, the value of total payout ring buffer 0 (F213(H) to F214(H)) is cleared. Furthermore, the number of payouts from the 6001st game to the 6400th game is added to the total payout ring buffer 0 and the total payout (6000 times) counter.

Similarly, when the game reaches the 6000th game, the value of the continuous accessory payout ring buffer 0 (F231(H) to F232(H)) is subtracted from the continuous accessory payout (6000 times) counter value. Then, the value of the continuous bonus payout ring buffer 0 is cleared. Further, the number of payouts at the time of continuous role payout operation from the 6001st game to the 6400th game is added to the continuous role payout ring buffer 0 and the continuous role payout (6000 times) counter.

Further, similarly, when the 6000th game is played, the value of the award payout ring buffer 0 (F24F(H) to F250(H)) is subtracted from the award payout (6000 times) counter value. Then, the value of the prize payout ring buffer 0 is cleared. Further, the number of payouts during the operation of the accessory from the 6001st game to the 6400th game is added to the accessory payout ring buffer 0 and the accessory payout (6000 times) counter.

More specifically, for example, the total payout ring buffer stores the number of payouts during the following number of games.
Total payout ring buffer 0: "1" game to "400" game Total payout ring buffer 1: "401" game to "800" game Total payout ring buffer 2: "801" game to "1200" game Total payout ring buffer 3: "1201" game to "1600" game Total payout ring buffer 4: "1601" game to "2000" game Total payout ring buffer 5: "2001" game to "2400" Game item Total payout ring buffer 6: "2401" game item to "2800" game item Total payout ring buffer 7: "2801" game item to "3200" game item Total payout ring buffer 8: "3201" game item to "3600" game item " Game total payout ring buffer 9: "3601" game to "4000" game Total payout ring buffer 10: "4001" game to "4400" game Total payout ring buffer 11: "4401" game to "4800" game total payout ring buffer 12: "4801" game to "5200" game Total payout ring buffer 13: "5201" game to "5600" game Total payout ring buffer 14: "5601" game to "6000" game total payout (6000 times) counter: "1" game to "6000" game

Then, assuming that the 6000th game has been completed, all of the total payout ring buffers 0 to 14 store the number of payouts for each number of games.
Also, the value of the total payout (6000 times) counter and the sum of the values stored in the total payout ring buffers 0-14 match.
Let Σ1 be the value stored in the total payout (6000 times) counter at this time, and Z1 be the value stored in the total payout ring buffer 0.
Total payout (6000 times) counter = Σ1-Z1
performs the operation of
again,
Total payout ring buffer 0 = 0 (clear)
performs the operation of
That is, the value "Z1" of the total payout ring buffer 0 storing the number of payouts for 400 games from 5999 (400×15−1) games to 5600 (400×15−400) games is changed to the total payout ( 6000 times) A process of subtracting from the value "Σ1" stored in the counter is executed.

Next, a process of clearing the value "Z1" of the total payout ring buffer 0 that stores the number of payouts for 400 games from 5999 (400×15−1) games to 5600 (400×15−400) games. to run.
After such calculation, the 6001st game is started. When there is a payout from the 6001st game to the 6400th game (here, it is assumed that the accessory did not operate from the 6001st game to the 6400th game), it is added to the total payout ring buffer 0, and Add to the total payout (6000 times) counter.

Next, assuming that the 6400th game has been completed, the total payout ring buffer stores the number of payouts for the following number of games.
Total payout ring buffer 0: “6001” game to “6400” game Total payout ring buffer 1: “401” game to “800” game :
Total payout ring buffer 14: "5601" game to "6000" game Total payout (6000 times) counter: "401" game to "6000" game, and "6001" game to "6400" game

Similarly to the above, if the value stored in the total payout (6000 times) counter at this time is Σ2, and the value stored in the total payout ring buffer 1 is Z2, then:
Total payout (6000 times) counter = Σ2-Z2
and
and,
total payout ring buffer 1=0
and
After such calculation, the 6401st game is started. When there is a payout from the 6401st game to the 6800th game (here, it is assumed that the accessory did not operate from the 6401st game to the 6800th game), it is added to the total payout ring buffer 1, and Add to the total payout (6000 times) counter. The above processing is repeated.

Also, although the total payout ring buffer and the total payout (6000 times) counter have been described, the same processing as described above is performed when the role product is activated or when the continuous role product is activated.
Specifically, when the role product is activated, the total payout ring buffers 0 to 14 are replaced with the role product payout ring buffers 0 to 14, and the total payout (6000 times) counter is replaced with the role product payout (6000 times) counter. Execute the process. Incidentally, when the accessory is activated, as described above, one of the total payout ring buffers 0 to 14 and the total payout (6000 times) counter are also updated.

Similarly, when the continuous accessory is activated, the total payout ring buffers 0 to 14 are replaced with the continuous accessory payout ring buffers 0 to 14, and the total payout (6000 times) counter is replaced with the continuous accessory payout (6000 times) counter. process. In addition, at the time of continuous role product operation, any of the total payout ring buffers 0 to 14, any of the role product payout ring buffers 0 to 14, the total payout (6000 times) counter, and the role product payout (6000 times) counter Also update.

The total payout (cumulative) counter of addresses "F27C(H)" to "F27E(H)" is a counter that counts the cumulative number of payouts, and counts the total number of payouts during at least "175000 (D)" games. .
Similarly, the continuous bonus payout (cumulative) counter for the addresses "F27F(H)" to "F281(H)" is a counter that counts the total number of payouts when the continuous bonus is activated. At least "175000 (D)" counts the number of payouts at the time of continuous accessory operation during the game.

Furthermore, in the same way, the bonus payout (total) counter for the addresses "F282(H)" to "F284(H)" is a counter that counts the total number of payouts when the bonus is activated. "175000 (D)" Counts the number of payouts at the time of activation of the accessory during the game.
It should be noted that the above-mentioned three types of payout (6000 times) counters subtract the number of payouts from before 5999 games to before 5600 games every 400 games, but these three types of payout (cumulative) counters subtract values. never do.

The three types of payout (cumulative) counters consist of 3 bytes. For example, in 175000 games, assuming that 15 coins were paid out per game, the value is "175000×15=2625000", which is smaller than the value that can be stored in 3 bytes. Therefore, it can be stored with a storage capacity of 3 bytes.

Accessory item state counters at addresses "F285(H)" to "F287(H)" are counters that count the total number of games played when the accessory is activated and the number of games played when the accessory continuous operation device is activated. Yes, and consists of 3 bytes.
The instructed role ratio data at the address "F288(H)" is the total ratio of the payout number at the time of operating the role and the number of payouts in the game in which the instruction function is operated to the total number of payouts. This is a storage area for storing material ratios.

The continuous role ratio (6000 times) data at the address "F289(H)" is a storage area for storing the ratio of the number of payouts at the time of continuous role operation to the total number of payouts during 6000 games.
Accessory ratio (6000 times) data at the address "F28A(H)" is a storage area for storing the ratio of the number of payouts at the time of operating the accessory to the total number of payouts during 6000 games.

The continuous role ratio (cumulative) data at the address "F28B(H)" is a storage area for storing the ratio of the number of payouts at the time of continuous role operation to the total number of payouts in the total number of games played.
The role ratio (total) data at the address "F28C(H)" is a storage area for storing the ratio of the number of payouts at the time of operating the role to the total number of payouts in the total number of games played.

Accessory item state ratio data at address "F28D(H)" is the total ratio of the number of games when the accessory is activated and the number of games when the accessory continuous operation device is activated to the total number of games played. This is a storage area for storing state ratios.
The calculation result buffer at the address "F28E(H)" is a storage area for temporarily storing the calculation result during the ratio calculation process.

The count upper limit flag of the address "F28F (H)" is the total number of games counter (addresses "F26D (H)" to "F26F (H)") or the total number of payouts (cumulative) counter (addresses "F27C (H)" to This flag is turned on when the storage capacity of "F27E(H)") is the upper limit value (3 bytes full, that is, "FFFFFF(H)").
Of the 1-byte (8-bit) data, the "D0" bit is assigned to the upper limit flag of the number of games played, and the "D1" bit is assigned to the upper limit flag of the number of payouts. The 'D2' to 'D7' bits are unused in the third embodiment.
For example, when the total game number counter reaches the count upper limit value, the value of the count upper limit flag becomes "00000001 (B)".

The payout number upper limit buffer at the address "F290 (H)" is 3 bytes full when the number of payouts in the game is added to the total payout (cumulative) counter, and the value after the addition exceeds 3 bytes full. is a storage area for storing the value of
For example, when the total payout (accumulated) counter value before payout in the game is "FFFFFE (H)" and the number of payouts in the game is "8 (H)", the counter value is set to "8 (H)". )” will cause overflow. Therefore, in order to prevent the total payout (total) counter value from overflowing, a value for becoming full by 3 bytes is calculated, and the calculation result is stored in the payout number upper limit buffer.
In the above example, "FFFFFE(H)"+"1(H)"="FFFFFF(H)", so "1(H)" is stored in the payout number upper limit buffer.

The blinking request flag at the address "F291(H)" is a flag for specifying an object that satisfies the blinking display condition when displaying the identification seg and the ratio seg.
Regarding the instructed accessory ratio, continuous accessory ratio (total), accessory ratio (total), and accessory state ratio, the total number of games (value stored in the total number of games counter) is less than "175000" When there is, control is performed so that the identification segment is displayed blinking.
With respect to the continuous role ratio (6000 times) and the role ratio (6000 times), when the total number of games played (the value stored in the total number of games counter) is less than "6000", the identification segment is displayed blinking. control to

It is desirable that the instructed character ratio, the continuous character ratio (cumulative), the character ratio (cumulative), and the character condition ratio are the ratios among 175,000 games (in order to reduce variations). is a ratio calculated from the number of games played in less than 175,000 games, a blinking identification segment is displayed to indicate this.
Similarly, the continuous role ratio (6000 times) and the role ratio (6000 times) are originally ratios between 6000 times, but when the ratio is calculated based on the number of games played less than 6000 times, To indicate this, the identification segment is displayed blinking.

In addition, when the displayed value of the instructed accessory ratio, the accessory ratio (cumulative), and the accessory ratio (6000 times) is '70' or more, the ratio segment is controlled to blink. .
Furthermore, when the displayed value of the continuous role product ratio (accumulated) and the continuous role product ratio (6000 times) is "60" or more, the ratio segment is controlled to blink.
Furthermore, when the displayed value of the role item status ratio is "50" or more, control is performed so that the ratio seg blinks.

The reason why the slot machine of the present embodiment is set as described above is that the instructed role ratio and the role ratio are designed to be less than "70"%, and the continuous role ratio is set to "60". %, and the state ratio of accessories, etc. is designed to be less than "50"%, and when the measured value does not fall within the range of the design value, the ratio seg blinks. to let them know by letting them know.

In addition, in the flashing request flags, the D0 bit corresponds to the instructed role product ratio flashing flag, the D1 bit corresponds to the continuous role product ratio (6000 times) flashing flag, and the D7 bit corresponds to the 175000 times flashing flag.
For example, when the calculated instructed accessory ratio is less than "70", the D0 bit of the flashing request flag is "0", and when it is "70" or more, the D0 bit of the flashing request flag is "1 ”.
Similarly, when the calculated continuous role product ratio (6000 times) is less than "70", the D1 bit of the flash request flag is "0", and when it is "70" or more, the D1 bit of the flash request flag bit becomes "1".

In addition, when the calculated state ratio of the accessory, etc. is less than "50", the D5 bit of the flashing request flag is "0", and when it is "50" or more, the D5 bit of the flashing request flag is "1". ”.
Furthermore, when the total game number counter value is less than "6000", the D6 bit of the flashing request flag is set to "1", and when it is "6000" or more, the D6 bit of the flashing request flag is set to "0". Become.
Furthermore, when the total number of games counter value is less than "175000", the D7 bit of the blinking request flag becomes "1", and when it is "175000" or more, the D7 bit of the blinking request flag becomes "0". .

The ratio display number at the address "F292(H)" is a storage area for storing the number corresponding to the ratio displayed in the interrupt process.
When the ratio to be displayed in the interrupt processing is the instructed accessory ratio, "1" is stored in the ratio display number of the address "F292(H)". Similarly, "2" is stored when the continuous role ratio is (6000 times), "3" is stored when the role ratio is (6000 times), and "3" is stored when the continuous role ratio is (total). stores "4", stores "5" when it is the role product ratio (total), and stores "6" when it is the role product etc. state ratio.

The blinking switching flag at the address "F293(H)" is a flag for determining whether it is lit or extinguished when blinking the identification seg or the ratio seg during the interrupt process.
In this embodiment, when the blinking display is performed, it is set to repeat turning on and off about every 0.3 seconds. For about 0.3 seconds during lighting, the blinking switching flag is "0" (value indicating lighting), and for about 0.3 seconds during lighting, the blinking switching flag is "1" (value indicating lighting). is set to be

The display switching time of address "F294(H)" is a counter that counts about 5 seconds, which is the time to display one ratio, and is updated by "1" each time an interrupt process is performed.
In the present embodiment, the instructed character ratio display (about 5 seconds) → character continuous ratio (6000 times) display (about 5 seconds) → … → character ratio (cumulative) display (about 5 seconds) → role Item condition ratio display (approximately 5 seconds)→Indicated accessory ratio (approximately 5 seconds)→ . . . are repeatedly displayed.
Therefore, the display switching time is stored in order to determine whether or not approximately five seconds have elapsed, that is, whether or not the display ratio switching time has been reached.

The blinking switching time of the address "F296 (H)" is a counter that counts about 0.3 seconds when blinking the identification segment or the ratio segment, as described above. is a counter that is updated to "1".

The address "F297(H)" is a 1-byte storage area in which the LED display counter 2 (_SC_LED_DSP2) is stored.
The LED display counter 2 is a counter for determining which of the digits 6 to 9 is to be lit, and is continuously updated for each interrupt. For each bit of the LED display counter 2, the D0 bit is assigned to the digit 6 signal, the D1 bit to the digit 7 signal, the D2 bit to the digit 8 signal, and the D3 bit to the digit 4 signal. Then, in one interrupt process, dynamic lighting of digits 6 to 9 is performed so that the digit corresponding to the bit "1" in the LED display counter 2 is lit.

In the third embodiment, the LED display counter 2 takes a value of "00001000 (B)" as an initial value. Then, the LED display counter 2 updates the bit "1" of the LED display counter 2 so as to shift the bit "1" of the LED display counter 2 to the right by one digit as the interrupt proceeds from "1" to "2" to . . . (for each interrupt). . In addition, in the interrupt following the interrupt "4", the LED display counter 2 becomes "00000000 (B)" by shifting it to the right by one digit. Set the counter 2 to "00001000 (B)". As a result, the LED display counter 2 repeats the values "4"→"3"→"2"→"1"→"4"→ . That is, four interrupts constitute one cycle.

From the above, the value of the LED display counter 2 is
"N" interrupt: 00001000 (B)
"N+1" interrupt: 00000100 (B)
"N+2" interrupt: 00000010 (B)
"N+3" interrupt: 00000001 (B)
"N+4" interrupt: 00000000 (B) → 00001000 (B) (initialization; same value as "N" interrupt)
"N+5" interrupt: 00000100 (B)
:
becomes.

In the third embodiment, four interrupts constitute one cycle, and digits 6 to 9 are dynamically lit. Specifically, when the value of the LED display counter 2 is "00001000 (B)", the digit 9 signal is output. By outputting the digit 9 signal, the digit 9 (lower digit of the ratio segment) can be lit. At the time of the next interrupt processing, the LED display counter becomes "00000100 (B)", a digit 8 signal is output, and digit 8 (ratio segment upper digit) can be lit. Also, when the LED display counter is "00000010 (B)", a digit 7 signal is output to enable lighting of the digit 7 (identification segment lower digit), and when the LED display counter is "00000001 (B)" , a digit 6 signal is output, and the digit 6 (higher order digit of the identification segment) can be lit.

The RWM checksum data (_SW_SUM_CHK) at the address "F2A0(H)" is a storage area for storing the RWM checksum data calculated by the RWM checksum set processing (S_SUM_SET) during the power-off processing (I_POWER_DOWN).
Here, the "RWM checksum data" is also called "complement data", "error detection data" or "error detection information", and is located at addresses "F000(H)" to When added to the data of "F1FF(H)" and the data of addresses "F210(H)" to "F3FF(H)" outside the use area (excluding "F2A0(H)"), it becomes "0". is a value.
That is, the data of the addresses "F000(H)" to "F1FF(H)" in the use area of the RWM 53 and the addresses "F210(H)" to "F3FF(H)" outside the use area ("F2A0(H)" are ) is added to the added value of the data of "F2A0(H)", the result is "0". In other words, the sum of the data at addresses "F000(H)" to "F1FF(H)" and the data at addresses "F210(H)" to "F3FF(H)" is "0".

The power-off processing completed flag (_SF_POWER_OFF) at the address "F2A1(H)" is a flag for determining whether or not the power-off processing has been executed normally, and is stored during the power-off processing.
When the power-off processing is executed normally, "55 (H)" is stored as the power-off processing completed flag (_SF_POWER_OFF), and when the power-off processing is not executed normally, the power-off processing completed flag is stored. A value other than "55 (H)" is stored as (_SF_POWER_OFF).

The power-off recovery data (_SW_POWER_ON) at the address "F2A2(H)" is a flag for determining whether the checksum calculation result of the RWM 53 and the power-off processing completion flag are normal. It is stored during processing.
The RWM 53 checksum calculation result is normal (RWM checksum data (complement data) of "F2A0(H)" is added to the sum of the data in the RWM 35 use area and outside the use area (excluding "F2A0(H)") is "0") and the power-off processing completion flag is a normal value ("55 (H)"), "55 (H)" is set as the power-off recovery data (_SW_POWER_ON). is stored.
On the other hand, when at least one of the checksum calculation result of the RWM 53 and the power-off processing completion flag is not normal (abnormal), "00 (H)" is set as the power-off recovery data (_SW_POWER_ON). remembered.

Stack pointer temporary storage buffer 2 (_SB_STACK2) at address "F2A3 (H)" is a storage area (save) where the stack pointer of the used area is stored (saved) when a program (second program) outside the used area is executed. buffer).
Here, the "stack area" refers to a storage area of the RWM 53 in which data such as various registers and program return addresses can be temporarily saved (stored).
A "stack pointer" is used to hold an address that indicates where data is saved (stored) in the stack area.

Then, when executing a program (second program) outside the used area, the stack pointer of the used area is stored in the stack pointer temporary storage buffer 2, the program (second program) outside the used area is terminated, and the used area is restored. (first program), the stack pointer of the used area is restored from the stack pointer temporary storage buffer 2.例文帳に追加

A 24-byte storage area at addresses "F3E8(H)" to "F3FF(H)" is a stack area outside the use area.

Next, initialization of data in the used area of the RWM 53 and data outside the used area will be described.
Data in the use area of the RWM 53 and data outside the use area are maintained without being initialized only by interruption/restart of power supply (power on/off, power switch 11 on/off).
Also, even when recovering from a recoverable error state, the data in the use area of the RWM 53 and the data outside the use area are maintained without being initialized.

Further, it is assumed that an operation for shifting to the setting change state (turning on the power while the setting key switch 152 is turned on) is performed, and it is determined that there is a power-off recovery abnormality. In this case, step S2707 of program start processing (M_PRG_START) in FIG. 41, which will be described later, becomes "Yes", and the flow advances to step S2711 to set the initialization range of the RWM 53 at the time of setting change start at power failure recovery failure. Also, since the power failure recovery is abnormal, "Yes" is determined in step S2712 of FIG. 41, and the process proceeds to initialization processing (M_INI_SET) in step S2731.
Therefore, in steps S2732 to S2736 of the initialization process (M_INI_SET) in FIG. ”) and the entire range outside the use area (addresses “F210(H)” to “F3FF(H)” are initialized.
Even when recovering from the unrecoverable error state, the initialization process of the RWM 53 is executed in the same range as when an operation for shifting to the setting change state is performed and power failure recovery abnormality is determined.

Also, assume that an operation for shifting to the setting change state is performed, and it is determined that the recovery from power failure is normal. In this case, step S2707 of the program start processing (M_PRG_START) in FIG. 41 is "Yes", step S2712 is "No", and the process proceeds to step S2713. the scope is set.
Therefore, in steps S2732 to S2736 of the initialization process (M_INI_SET) in FIG. ” to “F3FF (H)” are executed.

Therefore, when the operation for shifting to the setting change state is performed and it is determined that the power failure recovery is normal, the setting value data (_NB_RANK) of the address "F000 (H)" of the RWM 53 and the address "F210 ( H)” to “F291(H)” are maintained without being initialized.
In other words, the address "F292(H)" (ratio display number) of the RWM 53 is initialized. For this reason, for example, the power is turned off when the role product ratio (cumulative) data (ratio display number "5") is displayed on the management information display LED 74 (role ratio monitor), and then the setting change state is entered. When it is determined that the power supply is restored normally, the management information display LED 74 displays from the designated accessory ratio data (ratio display number “1”), which is the first display item of various ratio information. is started.

It is also assumed that the power is turned on with the setting key switch 152 turned off and the reset switch (RWM clear switch) 153 turned on, and it is determined that the power failure recovery is normal. In this case, step S2707 of the program start processing (M_PRG_START) in FIG. 41 is "No", step S2710 is "Yes", and the process proceeds to step S2713. the scope is set.
Therefore, in steps S2732 to S2736 of the initialization process (M_INI_SET) in FIG. ” to “F3FF (H)” are executed.

In other words, the address "F292(H)" (ratio display number) of the RWM 53 is initialized. Therefore, for example, when the role ratio (total) data (ratio display number “5”) is displayed on the management information display LED 74 (role ratio monitor), the power is turned off, and then the setting key switch 152 is turned off. and the power is turned on with the reset switch (RWM clear switch) 153 turned on. Display is started from a given instruction-containing accessory ratio data (ratio display number “1”).

Therefore, when the power is turned on while the setting key switch 152 is turned off and the reset switch (RWM clear switch) 153 is turned on, and it is determined that the recovery from the power failure is normal, an operation for shifting to the setting change state is performed. , and the initialization process of the RWM 53 is executed in the same range as when it is determined that the power-off recovery is normal.
For this reason, even if you do not have the setting key or do not switch to the setting change state, the same range as when the operation to switch to the setting change state is performed and it is determined that the recovery from power failure is normal. , the RWM 53 can be initialized.

Also, at the end of the advantageous interval, a predetermined range (for example, addresses "F061(H)" to "F068(H)" in FIG. 33) of the use area of the RWM 53 storing data relating to the advantageous interval is initialized. be.
Also, even if the advantageous section ends, the address "F292(H)" of the RWM 53 is not initialized. Therefore, for example, when the role ratio (cumulative) data (ratio display number "5") is displayed on the management information display LED 74 (role ratio monitor), the advantageous section ends and the data relating to the advantageous section is stored. Even if the predetermined range of the RWM 53 used area (for example, addresses "F061(H)" to "F068(H)" in FIG. 33) is initialized, the display items displayed on the management information display LED 74 are , Accessory ratio (total) data is followed by Accessory condition ratio data (ratio display number “6”).

Also, assume that the power is turned off, and then the power is turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are turned off, and it is determined that the power-off recovery is normal. That is, it is assumed that the normal power supply is turned on/off. In this case, since the RWM 53 is not initialized, the data in the RWM 53 used area and outside the used area at the time of power failure are maintained.
For this reason, for example, when the management information display LED 74 (role ratio monitor) displays the role ratio (cumulative) data (ratio display number “5”), the power is turned off, and then the setting key switch 152 and the reset switch are turned off. When both switches (RWM clear switch) 153 are turned off, the power is turned on, and if it is determined that the recovery from power failure is normal, the state at the time of power failure is restored. The object ratio (cumulative) data is displayed, and then the accessory state ratio data (ratio display number “6”), which is the display item next to the accessory ratio (cumulative) data, is displayed.

It is also assumed that the power is turned off and then turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are turned off, and it is determined that a power failure recovery error has occurred. In this case, the result is "Yes" in step S2708 of FIG. 41, and the process advances to step S2801 to execute unrecoverable error processing (C_ERROR_STOP) (unrecoverable error state), so initialization processing of the RWM 53 is not executed. . Furthermore, in this embodiment, when the unrecoverable error process (C_ERROR_STOP) in step S2801 is executed, the interrupt process is prohibited (step S1490 in FIG. 43), and the outputs of output ports 0 to 7 are turned off ( step S1495 in FIG. 43).
For this reason, for example, when the management information display LED 74 (role ratio monitor) displays the role ratio (cumulative) data (ratio display number “5”), the power is turned off, and then the setting key switch 152 and the reset switch are turned off. When both switches (RWM clear switch) 153 are turned off and the power is turned on and it is determined that there is a power failure recovery abnormality, interrupt processing is prohibited and the outputs of output ports 0 to 7 are turned off. The management information display LED 74 remains off.

Incidentally, for example, in the unrecoverable error process (C_ERROR_STOP) of step S2801, digits 6 to 9 of the management information display LED 74 may each display "8". In this case, the power is turned off, and then the power is turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are turned off. "8888" is displayed in the

Further, for example, even if the processing shifts to unrecoverable error processing (C_ERROR_STOP) in step S2801, the interrupt processing may not be prohibited, and the output of output ports 0 to 7 may be maintained without being turned off. In this case, for example, when the management information display LED 74 (role ratio monitor) displays the role ratio (cumulative) data (ratio display number “5”), the power is turned off, and then the setting key switch 152 and the reset switch are turned off. Even if the power is turned on with both switches (RWM clear switch) 153 turned off and it is determined that there is a power failure recovery abnormality, the management information display LED 74 first displays the role ratio (cumulative) data, Next, the accessory state ratio data (ratio display number “6”), which is the display item next to the accessory ratio (cumulative) data, is displayed.

FIG. 36(A) is a diagram showing various LEDs on the display substrate 75 in the third embodiment, and FIG. 36(B) is a diagram showing the management information display LED 74 in the third embodiment.
As shown in FIG. 36A, in the third embodiment, the display substrate 75 is provided with a credit number display LED 76, an acquired number display LED 78, and a status display LED 79. FIG.
The credit number display LED 76 consists of digit 1 (upper digit) and digit 2 (lower digit), and the acquired number display LED 78 consists of digit 3 (upper digit) and digit 4 (lower digit). Also, digits 1-4 use a seven-segment display with no dot segments.
Digits 1 to 4 may be constructed using a 7-segment display with dot segments, but the dot segments may not be illuminated.

As status display LEDs 79, a 1-bet display LED 79a, a 2-bet display LED 79b, a 3-bet display LED 79c, a game start display LED 79d, a throw-in display LED 79e, and a replay display LED 79f are provided. .
Furthermore, although not shown in FIG. 36, the advantageous section display LED 77 is constructed using a segment P of digit 4 as shown in FIG.
Furthermore, although not shown in FIG. 36, the set value display LED 73 is provided on the main control board 50 and is composed of digits 5, as shown in FIG. Digit 5 also uses a seven-segment display with no dot segments.
Digit 5 may be configured using a 7-segment display with dot segments, but the dot segments may not be illuminated.

As shown in FIG. 36B, the management information display LED 74 includes digit 6 (identification segment upper digit), digit 7 (identification segment lower digit), digit 8 (ratio segment upper digit), and digit 9 (ratio segment lower digit). digits).
Digits 6-9 also use a 7-segment display with dot segments (segment P).
In addition, segment P of digit 7 (identifying segment lower digit) functions as a digit separator LED. The digit separator display LED is used to clearly distinguish between the information type (identification segment) and the ratio (ratio segment).

FIG. 37 is a diagram illustrating details of digits and segments in the third embodiment.
In a third embodiment, the digits 1-5 seven-segment display itself consists of segments AG and has no dot segment (segment P).
However, the segment P of the digit 1 constitutes the game start display LED 79d, the segment P of the digit 2 constitutes the input display LED 79e, the segment P of the digit 3 constitutes the replay display LED 79f, and the segment P of the digit 4. constitutes an advantageous section display LED 77 .

FIG. 38 is a diagram showing output ports 2 to 7 in the third embodiment.
In the third embodiment, two output ports (output ports 3 and 6) for outputting digit signals are provided, and two output ports (output ports 4 and 7) for outputting segment signals are provided. characterized by
Digits 1 to 9 are provided in the third embodiment.
A segment of digits 1 to 5 is called segment 1 (segments 1A to 1P), and a segment of digits 6 to 9 is called segment 2 (segments 2A to 2P).

In the third embodiment, the output port 3 is an output port for outputting digit signals for digits 1 to 5 (digit 1 to 5 signals), and the output port 6 is for outputting digit signals for digits 6 to 9 (digit 6 to 9 signals).
Furthermore, in the third embodiment, the output port 4 is an output port for outputting segment signals for digits 1 to 5 (segment signals 1A to 1P), and the output port 7 is for outputting segment signals for digits 6 to 9 (segment signals). 2A to 2P signals).
When lighting digits 1 to 5, the digit signal is output from the output port 3 and the segment 1 signal is output from the output port 4. FIG.
When the digits 6 to 9 are to be lit, the digit signal is output from the output port 6 and the segment 2 signal is output from the output port 7 .

Next, the external signal will be explained. The “external signal” is a signal output to the outside of the slot machine 10 (hall computer 200, data counter installed in the hall, etc.) via the external centralized terminal board 100 .
As shown in FIG. 38, in the third embodiment, external signals 1 to 6 are output from output port 5 . Specifically, the D0 bit (external signal 1) of the output port 5 is assigned a "setting change signal", and the D1 bit (external signal 2) is assigned a "setting confirmation signal". Each signal shown in FIG. 38 is also assigned to the D2 to D5 bits.

The "setting changing signal" is an external signal indicating that the setting is being changed and that the setting has been changed. The signal during setting change is output continuously until the end of one game during the setting change and after the setting change (all reels 31 stop and the medal payout process (step S294 in FIG. 46). The setting change is performed. When the D0 bit of the output port 5 is "1", the setting changing signal is on (the setting is being changed or one game after the setting is changed). In addition, when the D0 bit is "0", the signal during setting change is off (not during setting change and not before the end of one game after setting change). indicates

The "setting confirmation signal" is an external signal indicating that the setting is being confirmed. The setting confirmation signal is output during setting confirmation. When the D1 bit of the output port 5 is "1", it indicates that the setting confirmation signal is on (setting is being confirmed), and when the D1 bit is "0", the setting confirmation signal is off. Indicates that there is (not checking the settings).

"Fraud detection signal 1" is an external signal indicating that there is a possibility of fraud. For example, when the door switch 17 is turned on (when the opening of the front door 12 is detected), the fraud detection signal 1 is output. When the D2 bit of the output port 5 is "1", it indicates that the fraud detection signal 1 is ON (the door switch 17 is ON and the front door 12 is open), and the D2 bit is "0". , it indicates that the fraud detection signal 1 is off (the door switch 17 is off and the front door 12 is closed).

“Fraud detection signal 2” is an external signal indicating that there is a possibility of fraud, like the fraud detection signal 1. FIG. For example, when a recoverable error state occurs, the fraud detection signal 2 is output. When the D3 bit of the output port 5 is "1", it indicates that the fraud detection signal 2 is on (recoverable error state), and when the D3 bit is "0", the fraud detection signal 2 is off. (not a recoverable error state).

Like the fraud detection signals 1 and 2, the "fraud detection signal 3" is an external signal indicating that there is a possibility of fraud. For example, when an unrecoverable error state occurs, the fraud detection signal 3 is output. When the D4 bit of the output port 5 is "1", it indicates that the fraud detection signal 3 is on (unrecoverable error state), and when the D4 bit is "0", the fraud detection signal 3 is Indicates off (no unrecoverable error condition).

The "security signal" is an external signal indicating that any one of the setting change signal, setting confirmation signal, and fraud detection signals 1 to 3 is on. When any one of the setting change signal, setting confirmation signal, and fraud detection signal 1 to 3 is output, the security signal is also output at the same time. When the D5 bit of the output port 5 is "1", it indicates that the security signal is ON (any one of the setting change signal, setting confirmation signal, and fraud detection signal 1 to 3 is being output), When the D5 bit is "0", it indicates that the security signal is off (none of the setting change signal, setting confirmation signal, and fraud detection signals 1 to 3 are output).

As described above, the setting changing signal is continuously output until one game ends after the setting is changed. Therefore, if the setting confirmation state is entered before the end of the first game after the setting change, both the setting changing signal and the setting confirming signal are output. Specifically, for example, it is assumed that the setting change state is ended and medals (game medium, game value) can be betted. At this time, when the setting key switch 152 is turned on while the number of bets is "0", both the setting changing signal and the setting confirming signal are output.
Furthermore, when any one of the setting change signal, setting confirmation signal, and fraud detection signal 1 to 3 is output, a security signal is also output. Therefore, if the setting confirmation state is entered before the end of the first game after setting change, the D0, D1 and D5 bits of the output port 5 are turned on ("1"). After that, if the setting confirmation state is terminated before the end of the first game after the setting change, the D0 and D5 bits of the output port 5 remain on (“1”) and the D1 bit is off (“0”). become. When the first game after the setting change is completed, the D0 bit and the D5 bit of the output port 5 are also turned off ("0").

Next, lighting control of digits 1 to 9 will be described.
Digits 1 to 5 (credit number display LED 76, acquired number display LED 78, set value display LED 73) are controlled to be lit by LED display control (I_LED_OUT) in FIG. 50, which will be described later. Also, the LED display control processing (I_LED_OUT) is processing by the program (first program) of the used area.

On the other hand, the lighting of digits 6 to 9 (management information display LED 74) is controlled by ratio display preparation processing (S_DSP_READY) in FIG. 52, which will be described later. Also, the ratio display preparation processing (S_DSP_READY) is processing by a program (second program) outside the use area.
In the third embodiment, the digits 1 to 5 that control lighting by the program in the usage area (first program) and the digits 6 to 9 that control lighting by the program outside the usage area (second program) Separate output ports for use.

FIG. 39 is a diagram showing the relationship between digits and segments in the third embodiment.
In the third embodiment, it has digits 1 to 9, the segment of digits 1 to 5 is segment 1 (segments 1A to 1P), and the segment of digits 6 to 9 is segment 2 (segments 2A to 2P). .
Segments 1A to 1G of digit 1 form the upper digits of the credit number display LED 76, and segment 1P of digit 1 forms a game start display LED 79d.
The segments 1A to 1G of the digit 2 constitute the lower digits of the credit amount display LED 76, and the segment 1P of the digit 2 constitutes the insertion display LED 79e.

Furthermore, segments 1A to 1G of digit 3 constitute the upper digits of the acquisition number display LED 78, and segment 1P of digit 3 constitutes a replay display LED 79f.
Furthermore, segments 1A to 1G of digit 4 constitute the lower digits of the winning number display LED 78, and segment 1P of digit 4 constitutes the advantageous section display LED 77. FIG.
Also, the segments 1A to 1G of the digit 5 constitute a set value display LED73.
Furthermore, segments 2A to 2G of digit 6 constitute identification segment upper digits of management information display LED 74. FIG.

Furthermore, segments 2A to 2G of digit 7 constitute the identification segment lower digits of management information display LED 74, and segment 2P of digit 7 constitutes a digit division display LED.
In addition, segments 2A to 2G of digit 8 constitute ratio segment upper digits of management information display LED 74. FIG.
Furthermore, segments 2A to 2G of digit 9 constitute identification segment lower digits of management information display LED 74. FIG.

FIG. 40A is a diagram showing the relationship between the LED display counter 1 (_CT_LED_DSP1) and the signal output from the output port 3 in the third embodiment. FIG. 2B is a diagram showing the relationship between the LED display counter 2 (_SC_LED_DSP2) and the signal output from the output port 6 in the third embodiment. Furthermore, FIG. 1(C) is a diagram showing the LED display request flag (_FL_LED_DSP) in the third embodiment.
In this example, an LED display counter 1 (_CT_LED_DSP1) (address "F051 (H)" in FIG. 33) is provided in the use area of the RWM 53, and an LED display counter 2 (_SC_LED_DSP2) (in FIG. 35) is provided outside the use area of the RWM 53. The address "F297(H)") is provided.

The LED display counter 1 (_CT_LED_DSP1) is a counter for outputting a digit 1 signal to a digit 5 signal for each interrupt, and is a counter with 5 interrupts per cycle.
The LED display counter 2 (_SC_LED_DSP2) is a counter for outputting a digit 6 signal to a digit 9 signal for each interrupt, and is a counter with 4 interrupts per cycle.
Thus, in the third embodiment, an LED display counter for lighting digits 1 to 5 and an LED display counter for lighting digits 6 to 9 are provided independently.
Also, since one cycle of the LED display counters of the two is different, the lighting timing of digits 1 to 5 and the lighting timing of digits 6 to 9 are different.

The LED display request flag (_FL_LED_DSP) is data indicating a digit whose lighting is permitted, and is stored at address "F052(H)" in the used area of the RWM 53 (see FIG. 33).
As shown in FIG. 40(C), the LED display request flag is 8-bit data corresponding to the digit 1 signal at the D0 bit, the digit 2 signal at the D1 bit, . . . , the digit 5 signal at the D4 bit. be. Each bit of the LED display request flag matches the bit of output port 3 shown in FIG.
Also, as shown in FIG. 40(C), digits 1 to 4 can be illuminated (digit 5 is off) during normal operation, and digit 5 can be illuminated (digits 1 to 4 are off during setting change and setting confirmation). lights off). note that. "Normal" refers to game standby and game play.

Then, in the interrupt process, the value of the LED display counter 1 in the used area and the value of the LED display request flag are ANDed, and the digit corresponding to the bit set to "1" is the digit to be lit in this interrupt process. Become.
For example, if the value of the LED display counter 1 of the used area is "00001000 (B)" and the value of the LED display request flag is "00001111 (B) (normal)", the AND operation of the two results in "00001000 (B)". (B)", and only the digit 4 signal becomes "1".
During setting change and setting confirmation, for example, at the interrupt timing when the digit 5 signal is turned on (the LED display counter 1 of the used area is "00010000 (B)"), the segment signal is output from the output port 4, The set value display LED 73 (digit 5) can be lit.

Next, recoverable errors and unrecoverable errors will be described.
A "recoverable error" is an error that can be recovered without turning on/off the power. For recoverable errors, for example,
“HP” error: Medal clogging (retention) error in hopper 35 “HE” error: Empty medal error in hopper 35 “H0” error: Discharge sensor 37 error in hopper 35 “CE” error: Medal retention error in medal selector "CP" error: Illegal passing of medals in the medal selector "CH" error: Error in the path sensor 46 located in the medal selector "C0" error: Error in the insertion sensor 44 located in the medal selector C1" error: medal insertion error "FE" error: sub-tank full "dE" error: front door 12 open
Note that recoverable errors are not limited to those described above.

In step S457 of the interrupt process (I_INTR) in FIG. 47, which will be described later, a read process of the input port 51 is executed to read input signals of various switches (start switch 41, etc.) and various sensors (insertion sensor 44, etc.). After that, based on the read input signal, various data (level data, rising data, falling data) are generated and stored in the RWM 53 at a predetermined address. After that, in step S463 of the interrupt processing (I_INTR), an input error check process is executed, and when any recoverable error is detected by referring to the above various data, an error detection flag indicating the detected recoverable error is detected. is stored in the RWM 53 at a predetermined address.

In addition, in the main process (M_MAIN) (FIG. 46), the error detection flag is checked before detecting the operation of the start switch 41 and after all the reels 31 are stopped. When it is "1", it is determined that a recoverable error has occurred, the progress of the game is stopped, and a recoverable error state is established.
If a recoverable error occurs during the period from when the start switch 41 is operated under the condition that the prescribed number of medals are betted until all the reels 31 are stopped, all the reels 31 are stopped. The progress of the game may be continued until all the reels 31 are stopped and before executing the medal payout process, and the progress of the game may be stopped and a recoverable error state may be established.
Furthermore, when it is determined that a recoverable error has occurred, error information of the recoverable error that has occurred is displayed on the acquired number display LED 78 . This error information display (error display) is performed in the LED display control (I_LED_OUT) during the interrupt processing (I_INTR) in FIG.

When a restorable error occurs, the cause of the restorable error is removed by the manager (hall clerk), and when the reset switch 153 is operated, the restorable error state is canceled and the progress of the game is resumed. .
Thus, when a recoverable error occurs, the cause of the recoverable error is removed and the reset switch 153 is operated without turning on/off the power or operating the setting key switch 152. The recoverable error state can be canceled and the game can be returned to a state in which progress can be made.

On the other hand, an "unrecoverable error" cannot be recovered unless the power is turned off and an operation for shifting to the setting change state (turning on the power while the setting key switch 152 is turned on) is performed. Fatal error. As an unrecoverable error, for example,
"E1" error: when recovery from power failure is not normal (when power failure recovery is abnormal) (when "Yes" in step S2712 in FIG. 41 described later)
"E5" error: When the stop symbol is not normal when the reel 31 is stopped (when a display error occurs)
"E6" error: when the set value is out of the normal range (when a set value error occurs) (when "No" in step S458 of FIG. 47)
"E7" error: when a random number error occurs (when "Yes" in step S460 of FIG. 47)
etc.
Unrecoverable errors are not limited to those described above.

If any unrecoverable error occurs, error information is displayed on the acquired number display LED 78 . For example, when an "E1" error occurs, display an "E" on digit three and a "1" on digit four. The same is displayed for other unrecoverable errors.
In addition, it is determined that the recovery from power failure is not normal (power failure recovery error) and that it is an "E1" error is the process of step S2715 in the program start process (M_PRG_START) in FIG. (processing by the first program)).
Furthermore, when the reel 31 is stopped, it is determined that the stop symbol is not normal (a display error has occurred), and it is determined as an "E5" error because of the processing in the main processing (M_MAIN) (Fig. 46). processing by the program (first program).

On the other hand, it is determined that the set value is out of the normal range (a set value error has occurred) and an "E6" error is determined by the processing of step S458 (out of use area) in the interrupt processing (I_INTR) in FIG. (second program)).
Similarly, it is determined that the random number value is not normal (a random number error has occurred) and an "E7" error is determined by the processing of step S460 in the interrupt processing (I_INTR) in FIG. second program)).
When the program in the used area (first program) determines that the error is unrecoverable, the unrecoverable error processing (C_ERROR_STOP) shown in FIG. 43, which will be described later, is executed.
On the other hand, when the non-recoverable error is determined by the program (second program) outside the usage area, unrecoverable error processing 2 (S_ERROR_STOP) in FIG. 51, which will be described later, is executed.

Then, when an unrecoverable error occurs, the power supply is cut off (the power is turned off and the power switch 11 is turned off), and then the power supply is restarted under the condition that the setting key switch 152 is turned on ( The power is turned on, and the power switch 11 is turned on. As a result, "Yes" is obtained in step S2707 of the program start processing (M_PRG_START) in FIG. 41, and the process proceeds to step S2711. When an unrecoverable error occurs, power-off processing (I_POWER_DOWN) in FIG. 48, which will be described later, is not executed, so step S2712 in FIG.

Furthermore, in steps S2732 to S2736 of the initialization process (M_INI_SET) in FIG. ), and the entire range outside the use area (addresses “F210(H)” to “F3FF(H)” are initialized. After that, the process advances to the setting change confirmation process (M_RANK_CTL) in step S2742 in FIG. 44. If the set value is set again here, the unrecoverable error state is cancelled, and the process proceeds to the main process (M_MAIN) of step S248 (FIG. 46).
In this way, when an unrecoverable error occurs, the power is turned off once, the setting key switch 152 is turned on, and then the power is turned on to cancel the unrecoverable error state and proceed with the game. can be restored to a state in which

Also, when a recoverable error occurs, the error is displayed by the LED display control (I_LED_OUT) in FIG. 50, but when an unrecoverable error occurs, the interrupt processing (I_INTR) in FIG. Display control (I_LED_OUT) is also not executed. When an unrecoverable error occurs, the error is displayed by unrecoverable error processing (C_ERROR_STOP) in FIG. 43 or unrecoverable error processing 2 (S_ERROR_STOP) in FIG.
Furthermore, when recovering from a recoverable error state, the data in the RWM 53 use area and data outside the use area are maintained without being initialized. Data in the entire range outside are initialized.
Data such as an error detection flag stored at a predetermined address in the RWM 53 may be initialized when recovering from a recoverable error state.

FIG. 41 is a flow chart showing program start processing (M_PRG_START) by the main control board 50 in the third embodiment.
When the power is turned on (the power switch 11 is turned on, or the power supply is restarted), the program starts from the program start processing in FIG.
In FIG. 41, when the program is started in step S2701, in the next step S2702, the main control board 50 saves the AF registers (A register and F register (flag register)) to the stack area of the used area of the RWM 53. .

Next, proceeding to step S2703, the main control board 50 executes checksum calculation processing of the RWM 53. FIG.
Specifically, in step S2703, data of addresses "F000(H)" to "F1FF(H)" in the use area of the RWM 53 and data of addresses "F210(H)" to "F3FF(H)" outside the use area are Add data.
That is, the data of addresses "F000(H)" to "F1FF(H)" in the use area of the RWM 53 and the addresses "F210(H)" to "F3FF(H)" outside the use area are added.
When the result is "0", it is determined that the checksum calculation result of the RWM 53 is normal, and when the result is not "0", the checksum calculation result of the RWM 53 is abnormal. is).

In step S2703, it is determined whether or not the power-off processing completion flag (_SF_POWER_OFF) of the address "F2A1 (H)" of the RWM 53 is "55 (H)". , the power-off flag is normal, and if it is not "55 (H)", the power-off flag is not normal (abnormal).
Here, in this embodiment, during power-off processing, a power-off processing completed flag (_SF_POWER_OFF) is set to the address "F2A1(H)" of the RWM 53 (step S2784 of RWM checksum set (S_SUM_SET) in FIG. 49). . Then, in step S2703, it is determined whether or not the power-off processing completed flag set at the time of power-off processing is a normal value ("55 (H)").

Also, in step S2703, the checksum calculation result of the RWM 53 is normal (the result of adding the data in the used area and the data outside the used area of the RWM 35 is "0"), and the power-off processing completed flag (_SF_POWER_OFF) is normal. When it is the value ("55 (H)"), "55 (H)" is stored at the address "F2A2 (H)" of the RWM 53 as the power failure recovery data (_SW_POWER_ON).
On the other hand, in step S2703, when at least one of the checksum calculation result of the RWM 53 and the power-off processing completion flag is not normal (abnormal), the power-off recovery data (_SW_POWER_ON) is set to "00 (H). )” in the RWM 53 at the address “F2A2(H)”. Then, the process proceeds to the next step S2704.

Proceeding to step S2704, the main control board 50 restores the AF registers (A register and F register (flag register)) saved in step S2702. Then, the process proceeds to the next step S2705.

Here, the program for program start processing is stored in the control area (first control area, first program area) of the ROM 54 . That is, the program for program start processing is the first program.
On the other hand, the program for the checksum calculation process of the RWM 53 in step S2703 is stored in a control area (second control area, second program area) outside the use area of the ROM 54 . That is, the program for the checksum calculation process in step S2703 is the second program.

Therefore, in FIG. 41, in the program start processing which is the processing by the program in the usage area (first program), if the process proceeds to step S2703, the checksum calculation of RWM53 which is the processing by the program outside the usage area (second program) is performed. When the process is executed and the checksum calculation process is completed, the process returns to the program start process, which is the process by the program (first program) of the used area.
Also, when the processing by the program in the usage area (first program) shifts to the processing by the program outside the usage area (second program), the AF register (A register and F register (flag register)) is used by the RWM 53. After saving to the stack area of the area, the AF register is restored when the processing by the program outside the usage area (second program) is terminated and the processing by the program in the usage area (first program) is returned to.

Proceeding to step S2705, the main control board 50 acquires the power failure recovery data (_SW_POWER_ON) from the address "F2A2(H)" of the RWM 53 and stores it in the A register. Then, the process proceeds to the next step S2706.

Proceeding to step S2706, the main control board 50 determines whether or not the door switch signal is on. As described above, when the front door 12 is open, the door switch 17 is turned on and the door switch signal is turned on. When it is determined that the door switch signal is ON (the front door 12 is open), the process proceeds to the next step S2707. On the other hand, when it is determined that the door switch signal is off (the front door 12 is closed), the process proceeds to step S2715.

At step S2707, the main control board 50 determines whether or not the setting key switch signal is on. As described above, when the setting key is inserted into the setting key insertion slot 151 and rotated clockwise by 90 degrees, the setting key switch 152 is turned on and the setting key switch signal is turned on. When it is determined that the setting key switch signal is on, the process proceeds to step S2711. On the other hand, if it is determined that the setting key switch signal is off, the process proceeds to step S2708.

Proceeding to step S2708, the main control board 50 determines whether or not there is a power failure recovery abnormality. Specifically, when the value of the A register (power-off recovery data (_SW_POWER_ON) acquired in step S2705) is "55 (H)", it is determined that there is no power-off recovery abnormality, and the process proceeds to the next step S2709. . On the other hand, when the value of the A register is "00 (H)", it is determined that there is a power failure recovery abnormality, and the process advances to unrecoverable error processing (C_ERROR_STOP) in step S2801. The specific contents of the unrecoverable error processing (C_ERROR_STOP) will be described later.

In step S2709, the main control board 50 sets reset determination data. Specifically, "7" is stored in the D register. Then, the process proceeds to the next step S2710.
Proceeding to step S2710, the main control board 50 determines whether the reset switch signal is on. As described above, in this embodiment, the setting change switch 153, reset switch 153, and RWM clear switch 153 are configured as an integrated switch. Then, when the reset switch (RWM clear switch) 153 is on, the reset switch signal is turned on, and the process proceeds to step S2713. On the other hand, when the reset switch (RWM clear switch) 153 is off, the reset switch signal is turned off, and the process proceeds to power restoration processing (M_POWER_ON) in step S2721. The specific contents of the power restoration process (M_POWER_ON) will be described later.

Proceeding to step S2711, the main control board 50 sets the initialization range of the RWM 53 for abnormal recovery from power failure. In this embodiment, when the power failure recovery is abnormal (the power failure recovery data (_SW_POWER_ON) is "00 (H)"), the setting value data (_NB_RANK) of the address "F000 (H)" of the RWM 53 is included. The use area and the entire range outside the use area (addresses "F000(H)" to "F1FF(H)" and "F210(H)" to "F3FF(H)") are set as the initialization range. Note that the initialization range is specified by the start address and the number of bytes of the initialization range. Then, the process proceeds to the next step S2712.

In step S2712, the main control board 50 determines whether or not there is a power failure recovery abnormality. Specifically, it is similar to step S2708. When it is determined that there is no power failure recovery abnormality, data "7" for determining the setting change state is stored in the D register, the process proceeds to the next step S2713, and it is determined that there is a power failure recovery failure. If not, the process proceeds to initialization processing (M_INI_SET) in step S2731. The specific contents of the initialization process (M_INI_SET) will be described later.

Proceeding to step S2713, the main control board 50 sets the initialization range of the RWM 53 for normal recovery from power failure. In this embodiment, when the power failure recovery is normal (the power failure recovery data (_SW_POWER_ON) is "55 (H)"), the set value data (_NB_RANK) of the address "F000 (H)" of the RWM 53 and the use The addresses "F210(H)" to "F291(H)" outside the area are maintained without being initialized (cleared). Therefore, in step S2713, the addresses "F001(H)" to "F1FF(H)" of the RWM 53 used area and the addresses "F292(H)" to "F3FF(H)" outside the used area are initialized. set as As described above, the initialization range is specified by the initial address and the number of bytes of the initialization range. Then, the process proceeds to the next step S2714.

At step S2714, the main control board 50 determines whether or not the setting can be changed. In the present embodiment, during the period from the start switch acceptance process (step S279 in FIG. 46) to the game end check process (step S301 in FIG. 46) including the rotation of the reel 31, the setting cannot be changed. , the setting change disabled flag is turned on. Then, in step S2714, it is determined whether or not the setting change is permitted by determining whether or not the setting change prohibition flag is ON. If it is determined that the setting cannot be changed (the setting cannot be changed), the process proceeds to the next step S2715, and if it is determined that the setting can be changed, the process proceeds to the initialization process (M_INI_SET) in step S2731. The specific contents of the initialization process (M_INI_SET) will be described later.
It should be noted that the setting change may be allowed at all times without setting the setting change prohibition period and therefore without setting the setting change prohibition flag.

Proceeding to step S2715, the main control board 50 determines whether or not there is a power failure recovery abnormality. Specifically, it is similar to step S2708. When it is determined that there is a power failure recovery error, the process proceeds to step S2801 for unrecoverable error processing (C_ERROR_STOP). . The specific contents of the power recovery process (M_POWER_ON) and the unrecoverable error process (C_ERROR_STOP) will be described later. Then, the processing according to this flowchart ends.

FIG. 42 is a flowchart showing power restoration processing (M_POWER_ON) in step S2721 in FIG.
First, in step S2722, the main control board 50 restores the stack pointer. In this embodiment, the stack pointer is saved during power-off processing (step S2774 of power-off processing (I_POWER_DOWN) in FIG. 48). Then, in step S2722, the stack pointer saved during the power-off process is restored.

Proceeding to the next step S 2723 , the main control board 50 executes read processing of the input port 51 . As a result, each data of the input port 51 is updated to the latest data.
In the next step S2724, the main control board 50 clears the power-off processing completion flag. Then, the process proceeds to the main process (M_MAIN) (FIG. 46) of step S248, and the process according to this flowchart ends.
In this embodiment, the interrupt process (I_INTR) of FIG. 47 is started at the timing before proceeding to the main process (M_MAIN) (FIG. 46) of step S248 after executing the process of step S2724.

FIG. 43 is a flowchart showing unrecoverable error processing (C_ERROR_STOP).
A program for unrecoverable error processing (C_ERROR_STOP) is stored in the ROM 54, and a program for unrecoverable error processing 2 (S_ERROR_STOP) is stored outside the ROM 54. That is, the program for unrecoverable error handling (C_ERROR_STOP) is the first program, and the program for unrecoverable error handling 2 (S_ERROR_STOP) is the second program.

Interrupt processing is prohibited in unrecoverable error processing.
An unrecoverable error is a serious error that cannot normally occur, and processing based on abnormal data (update of data of RWM 53 based on input signal from input port 51, transmission of control command to sub-control board 80) , control based on the signal output from the output port based on the data of the RWM 53, etc.), interrupt processing is prohibited in the unrecoverable error processing.

Here, the unrecoverable error processing (C_ERROR_STOP) is processing by the first program. When the unrecoverable error processing (C_ERROR_STOP) is started, first, the interrupt processing (I_INTR) is executed in step S1490 to disable interrupts. prohibited.
On the other hand, unrecoverable error processing 2 (S_ERROR_STOP) is processing by the second program. 2 (S_ERROR_STOP) is not provided with processing to disable interrupts.

In FIG. 43, when proceeding to step S1491, the main control board 50 sets the error display data for the lower digits of the unrecoverable error. This process is a process of storing data ("00001000(B)") for lighting digit 4 (data in which only the digit 4 signal is set to "1") in the H register.
Next, proceeding to step S1492, the main control board 50 sets the error display data for the upper digits of the unrecoverable error. This process is a process of storing data for lighting digit 3 (data in which only the digit 3 signal is set to "1") ("00000100(B)") in the D register.

Furthermore, in this step S1492, the main control board 50 stores the segment data (“01111001B”) for displaying “E” in the upper digit (digit 3) of the unrecoverable error in the E register.
Note that segment data for displaying the lower digits of the unrecoverable error is stored in the L register before proceeding to unrecoverable error processing. For example, when the unrecoverable error is an "E1" error, the lower digit (digit 4) is "1", so segment data ("00000110B") for displaying "1" is stored in the L register. is stored.
In the following example, it is assumed that the unrecoverable error 1 this time is an "E1" error.

From the above, the D, E, H, and L register values are, at this point,
D register value: Data for lighting the upper digit (digit 3) of an unrecoverable error (data with only the digit 3 signal set to "1") ("00000100(B)")
E register value: segment data (“01111001 (B)”) for displaying “E” in the upper digit (digit 3) of an unrecoverable error
H register value: Data for lighting the lower digit (digit 4) of an unrecoverable error (data with only the digit 4 signal set to "1") ("00001000(B)")
L register value: Segment data (“00000110 (B)”) for displaying “1” in the lower digit (digit 4) of an unrecoverable error
becomes.

In the next step S1493, the main control board 50 sets the address of the output port to be cleared and the number of output ports. In this embodiment, the output ports to be cleared by the unrecoverable error processing (C_ERROR_STOP) are output ports 0 to 7, and since an address is set for each output port, the address and the number of output ports (8 pieces).
In the next step S1494, the main control board 50 sequentially turns off the outputs of the output ports 0-7. Specifically, output ports 0 to 7 are turned off (“00000000 (B)”) one by one.

In the next step S1495, the main control board 50 sets the address of the next output port. That is, the address indicating the output port is incremented by "1". For example, when the address of output port 0 is "00F1(H)", the address of output port 1 "00F2(H)" is set as the next address.
Next, proceeding to step S1496, the main control board 50 determines whether or not all the output ports have been turned off, that is, whether or not the outputs up to the output port 7 have been turned off. When it is determined that the processing has not ended, the process returns to step S1494, and when it is determined that the processing has ended, the process proceeds to step S1497. In this way, the processing of steps S1494 to S1496 is repeated until the outputs of all output ports are turned off, and when it is determined that the outputs of all output ports have been turned off, the process advances to step S1497.

By turning off all the output ports in this way, all active signals output before execution of this process are turned off. As a result, all the LEDs including the digits 1 to 9 (the credit number display LED 76, the acquired number display LED 78, the set value display LED 73, and the management information display LED 74) are extinguished, thereby preventing burn-in of the LEDs.

If an unrecoverable error occurs while the excitation signal for the motor 32 is being output, unless the output port is turned off, the excitation signal for the motor 32 will continue to be output until the unrecoverable error is cancelled. However, by turning off all the output ports, the excitation signal of the motor 32 is turned off, so that the seizure of the motor 32 can be prevented.
Furthermore, if an unrecoverable error occurs while the blocker signal is being output, the output port must be turned off, even though the medal detection process will not be executed, the blocker 45 is turned on (medals are placed in the hopper 35) will continue, so the medals will be swallowed up. Swallowing can be prevented.

In the next step S1497, the main control board 50 outputs error display data from the output ports 3 and 4 in order to display errors in the upper digits. The output port 3 outputs the data stored in the D register, and the output port 4 outputs the data stored in the E register.

Next, proceeding to step S1498, the main control board 50 executes standby (wait) processing for preventing flickering of the LED. Here, how long to wait depends on the performance of the LED, but for example, it may be set to about "0.1 ms". Here, for example, a predetermined value (for example, "255") is stored in the B register, and this value is subtracted by, for example, the internal system clock. When the B register value becomes "0", it is determined that the waiting time has elapsed. and advances to the next step S1499.

In step S1499, the main control board 50 turns off (“0”) the outputs of the output ports 3 and 4. FIG. This process is for preventing afterimages.
Next, proceeding to step S1500, the main control board 50 executes standby (wait) processing for preventing flickering of the LED. This process is for ensuring that the LEDs are extinguished after the outputs of the output ports 3 and 4 are turned off (“0”).

Next, proceeding to step S1501, the main control board 50 switches between the upper digits and the lower digits.
Specifically, the DE register value and the HL register value are exchanged. This will
<Before replacement>
D register value: Data for lighting the upper digit (digit 3) of an unrecoverable error (data with only the digit 3 signal set to "1") ("00000100(B)")
E register value: segment data (“01111001 (B)”) for displaying “E” in the upper digit (digit 3) of an unrecoverable error
H register value: Data for lighting the lower digit (digit 4) of an unrecoverable error (data with only the digit 4 signal set to "1") ("00001000(B)")
L register value: segment data (“00000110 (B)”) for displaying “1” in the lower digit (digit 4) of an unrecoverable error
<After replacement>
D register value: Data for lighting the lower digit (digit 4) of an unrecoverable error (data with only the digit 4 signal set to "1") ("00001000(B)")
E register value: segment data (“00000110 (B)”) for displaying “1” in the lower digit (digit 4) of an unrecoverable error
H register value: Data for lighting the upper digit (digit 3) of an unrecoverable error (data with only the digit 3 signal set to "1") ("00000100(B)")
L register value: segment data (“01111001 (B)”) for displaying “E” in the upper digit (digit 3) of an unrecoverable error
becomes.

Then, proceeding to step S1502, the main control board 50 outputs error display data from the output ports 3 and 4 in order to display errors in the lower digits. As in step S1497, output port 3 outputs the D register value, and output port 4 outputs the E register value. As a result, "00001000 (B)" (data in which only the digit 4 signal is set to "1") is output from the output port 3 to light up the digit 4, and from the output port 4, a segment for displaying "1" is output. Data "00000110(B)" is output.

Next, proceeding to step S1503, the main control board 50 executes standby processing for flicker prevention. This process is the same as step S1498.
Next, proceeding to step S1504, the main control board 50 turns off (“0”) the outputs of the output ports 3 and 4 as in step S1499.
In the next step S1505, the main control board 50 executes standby processing for flicker prevention. This process is similar to step S1500. Then, the process returns to step S1497.

As a result of the above processing, for example, when an "E1" error occurs, the display of "E" by digit 3 and the display of "1" by digit 4 are alternately and repeatedly displayed at predetermined time intervals.
Note that the LED display control (I_LED_OUT) is executed in the interrupt process (I_INTR), but as described above, the interrupt process (I_INTR) is not executed (prohibited) in the event of an unrecoverable error. As shown, non-recoverable errors are indicated by arithmetic processing using registers and hardware configuration.

FIG. 44 is a flow chart showing the initialization process (M_INI_SET) in step S2731 in FIG.
The main control board 50 first initializes the designated address of the RWM 53 in step S2732, sets (designates) the next address in the initialization range of the RWM 53 in the next step S2733, and proceeds to the next step S2734. When proceeding, it is determined whether or not initialization has been completed for the entire initialization range of the RWM 53 . When it is determined that the initialization has not been completed, the process returns to step S2732, and when it is determined that the initialization has been completed, the process proceeds to step S2735. As a result, the processing of steps S2732 to S2734 is repeated until the initialization of all the initialization ranges of the RWM 53 is completed.

As described above, in step S2711 or S2713 of the program start processing (M_PRG_START) in FIG. 41, the initialization range (starting address and number of bytes of the initialization range) of the RWM 53 is set.
In steps S2732 to S2734 of the initialization process (M_INI_SET), the initialization range of the used area is initialized out of the initialization range of the RWM 53 set in step S2711 or S2713.
The processing of steps S2732 to S2734 of the initialization processing (M_INI_SET) is executed by the program of the used area (first program). Therefore, in steps S2732 to S2734 of the initialization process (M_INI_SET), initialization is executed only for the used area initialization range in the initialization range of the RWM 53 .

Then, when it is determined that the initialization is completed in step S2734, the process proceeds to the next step S2735, and the main control board 50 saves the AF register (A register and F register (flag register)) to the stack area of the RWM 53's use area. Let
Proceeding to the next step S2736, the main control board 50 initializes the initialization range outside the use area out of the initialization range of the RWM 53 set in step S2711 or S2713 of the program start processing (M_PRG_START) of FIG. to run.

As described above, in steps S2732 to S2734, initialization of the used area within the initialization range of RWM 53 is executed, but in step S2736, initialization of the area outside the used area within the initialization range of RWM 53 is executed. .
Note that the process of step S2736 of the initialization process (M_INI_SET) is executed by a program (second program) outside the use area. Therefore, in step S2736 of the initialization processing (M_INI_SET), initialization is executed only for the initialization range outside the use area of the initialization range of the RWM 53 .
When the initialization of the initialization range outside the use area is completed in step S2736, the process proceeds to the next step S2737, and the main control board 50 saves the AF register (A register and F register (flag register) in step S2735). ) is restored. Then, the process proceeds to the next step S2738.

In step S2738, the main control board 50 determines whether or not it is time to reset. Specifically, it is determined whether or not the result in step S2710 of the program start process (M_PRG_START) in FIG. 41 is "Yes". In this embodiment, in step S2709 of the program start processing (M_PRG_START) in FIG. 41, "7" is stored in the D register as reset determination data. Further, when "Yes" in step S2710 of FIG. 41, "7" in the D register is maintained, and when "No" in step S2710 of FIG. 41, the D register is cleared (stored "0"). . Then, in step S2738 of FIG. 44, it is determined whether or not the D register is "7", and when the D register is "7", it is reset ("Yes" in step S2710 of FIG. 41). and advances to step S2739. On the other hand, when the D register is "0", it is determined that it is not reset time ("No" in step S2710 in FIG. 41), skipping step S2739 and proceeding to step S2740.

Proceeding to step S2739, the main control board 50 sets the display at the time of reset. Specifically, "70 (H)" is stored in the acquisition number data (_NB_PAYOUT) of the address "F011 (H)" of the RWM 53. As a result, "70" can be displayed on the acquisition number display LED 78 (digits 3 and 4) by the interrupt processing executed after the processing of step S2739, and the administrator (hall clerk) is informed that it is time to reset. be able to.

Proceeding to the next step S2740, the main control board 50 sets the setting command in the control command buffer of the RWM53. The setting command set in step S2740 indicates whether to reset or change settings. As a result, the setting command set in the control command buffer is transmitted to the sub-control board 80 by the interrupt process executed after the process of step S2740. can be determined by

Note that in this embodiment, the interrupt process (I_INTR) of FIG. 47 is started at the timing after executing the process of step S2740 and before proceeding to the process of step S2741. In other words, the process of initializing the initialization range of the RWM 53 (the process of steps S2732 to S2734 and S2736 in FIG. 44) is finished before the interrupt process (I_INTR) starts. By configuring in this manner, interrupt processing (I_INTR) is prevented from being executed while the RWM 53 is being initialized. As a result, it is possible to prevent the contents of the RWM 53 from being changed (rewritten or overwritten) by interrupt processing (I_INTR) while the RWM 53 is being initialized.

Proceeding to the next step S2741, the main control board 50 determines whether or not it is reset time. Specifically, it is similar to step S2738. When it is determined that it is not reset time, the process proceeds to step S2742, and when it is determined that it is reset time, step S2742 is skipped and the process proceeds to step S2743.
When proceeding to step S2742, the main control board 50 executes setting change confirmation processing (M_RANK_CTL). The specific contents of this processing will be described later. When the setting change confirmation process (M_RANK_CTL) ends, the process proceeds to the next step S2743.

At step S2743, the main control board 50 determines whether or not the waiting time has elapsed. This waiting time is for waiting for transmission of the setting command. When it is determined that the waiting time has passed, the process proceeds to the next step S2744, where the main control board 50 sets the initialization waiting time, and in the next step S2745, waits for 2 bytes (wait process). . The processing of steps S2744 and S2745 is for waiting until the initialization of the RWM 83 of the sub-control board 80 is completed.

When the 2-byte time waiting process is completed, the main control board 50 advances to the next step S2746 to set the setting command in the control command buffer of the RWM53. The setting command set in step S2746 indicates that the setting change confirmation process (M_RANK_CTL) has ended and the setting value. As a result, the setting command set in the control command buffer is transmitted to the sub-control board 80 by the interrupt processing executed after the processing of step S2746. The value can be determined on the sub-control board 80 side.

Proceeding to the next step S2747, the main control board 50 clears (stores "0") the acquisition number data (_NB_PAYOUT) at the address "F011(H)" of the RWM 53. FIG. As a result, "00" is displayed on the acquisition number display LED 78 (digits 3 and 4) by the interrupt processing executed after the processing of step S2747.
When the acquisition number data is cleared in step S2747, the process advances to the main process (M_MAIN) (FIG. 46) in step S248 to end the process according to this flowchart.

FIG. 45 is a flow chart showing the setting change confirmation process (M_RANK_CTL) in step S2742 in FIG.
When the setting change confirmation process (M_RANK_CTL) of step S2742 is started, first, in step S2751, the main control board 50 acquires the setting value data (_NB_RANK) from the address "F000 (H)" of the RWM 53, Store in the A register. Then, the process proceeds to the next step S2752.

Proceeding to step S2752, the main control board 50 generates set value display data. Specifically, in step S2752, first, the A register value is stored in the C register, and then "1" is added to the A register value. Then, the process proceeds to the next step S2753.
As described above, in this embodiment, setting values "1" to "6" are provided, and setting value data is managed as "0" to "5". When the setting value is "N", "N-1" is stored as set value data. Therefore, "N" obtained by adding "1" to the set value data "N-1" is used as the set value display data.

Proceeding to step S2753, the main control board 50 saves the generated set value display data. Specifically, in step S2753, the A register value is stored in the set value display data (_NB_RANK_DSP) of the RWM 53 at the address "F001(H)". Then, the process proceeds to the next step S2754.
At step S2754, the main control board 50 executes an interrupt waiting process. This process is a process of waiting until one interrupt time (2.235 ms) elapses. This is because by waiting for the interrupt process (I_INTR) to be executed once, it waits for the rise data of the signal of the reset switch (setting change switch) 153 to turn off (“0”).

In other words, when the reset switch (setting change switch) 153 is operated (turned on), the rising data of the signal of the reset switch (setting change switch) 153 is turned on (“1”). After that, if the interrupt process (I_INTR) is executed even once, the rising data of the signal of the reset switch (setting change switch) 153 is turned off (“0”).
However, after the rising data of the signal of the reset switch (setting change switch) 153 is turned on (“1”), the processing of steps S2752 to S2758 is looped multiple times before the interrupt processing (I_INTR) is executed. Otherwise, the process of adding "1" to the set value data will be repeatedly executed.
Therefore, by waiting for the interrupt process (I_INTR) to be executed once in step S2754, the processes of steps S2752 to S2758 are looped multiple times, and the process of adding "1" to the set value data is repeatedly executed. It prevents the product from being lost.
Then, after waiting until one interruption time elapses in step S2754, the process proceeds to the next step S2755.

When the level data of the signal of the reset switch (setting change switch) 153 is "0" at the time of the previous interrupt processing, and the level data of the signal of the reset switch 153 is "1" at the time of the current interrupt processing, , the rising data of the signal of the reset switch 153 becomes "1".
When the level data of the signal of the reset switch 153 is "1" at the time of the previous interrupt processing and the level data of the signal of the reset switch 153 is "1" at the time of the current interrupt processing, the reset switch 153 The rising data of the signal becomes "0".

Similarly, when the level data of the signal of the reset switch 153 is "0" at the time of the previous interrupt processing, and the level data of the signal of the reset switch 153 is "0" at the time of the current interrupt processing, the reset switch 153 The rising data of the signal of becomes "0".
When the level data of the signal of the reset switch 153 is "1" at the time of the previous interrupt processing and the level data of the signal of the reset switch 153 is "0" at the time of the current interrupt processing, the reset switch 153 The falling edge data of the signal becomes "1".
Other switches such as the start switch 41 , the stop switch 42 and the setting key switch 152 are similar to the reset switch (setting change switch) 153 .

In step S2755, the main control board 50 determines whether or not it is time to start checking the settings. This process is a process for determining whether it is the time to confirm the settings or the time to change the settings. In this embodiment, when the setting key switch 152 is turned on while the number of bets before the start of the game is "0", "1" is stored in the D register. Then, in step S2755, first, the D register value is stored in the A register, and then it is determined whether or not the A register value is "1". When the A register value is "1", it is determined that it is time to confirm the setting, and the process proceeds to step S2760. ), it is determined that it is not the time to confirm the settings (it is the time to change the settings), and the process advances to step S2756. After determining whether the A register value is "1", the C register value is stored in the A register. As described above, since the A register value is stored in the C register in step S2752, the set value data is stored in the C register. Therefore, when the C register value is stored in the A register, the A register value becomes set value data.
When the power is restored (when the power is turned on and the program start processing (M_PRG_START) is started), the registers A to L are set to the initial values ("0").

Proceeding to step S2756, the main control board 50 refers to the rise data of the signal of the start switch 41 stored at the predetermined address of the RWM 53. FIG. When the rising data of the signal of the start switch 41 is "1", that is, when it is determined that the start switch 41 has been operated, the process proceeds to step S2759. On the other hand, when the rise data of the signal of the start switch 41 is "0", that is, when it is determined that the start switch 41 is not operated, the process proceeds to step S2757.

At step S2757, the main control board 50 refers to the rising data of the signal of the reset switch (setting change switch) 153 stored at the predetermined address of the RWM 53. FIG. When the rise data of the signal of the reset switch 153 is "1", that is, when it is determined that the reset switch 153 has been operated, the process proceeds to step S2758. On the other hand, when the rise data of the signal of the reset switch 153 is "0", that is, when it is determined that the reset switch 153 is not operated, the process returns to step S2752.

Proceeding to step S2758, the main control board 50 adds "1" to the set value data. Specifically, "1" is added to the A register value. As described above, at the end of step S2755, the A register value is set value data. If "Yes" in step S2757, that is, if it is determined that the setting change (reset) switch 153 has been operated, "1" is added to the set value data. Note that when the A register value becomes "6" due to the addition, the A register value is rewritten to "0". Then, the process returns to step S2752.

Also, when proceeding to step S2759, the main control board 50 saves the set value data. Specifically, the A register value is stored in the set value data (_NB_RANK) of the address “F000(H)” of the RWM 53 . As described above, at the end of step S2755, the A register value is set value data. Then, the A register value remains the set value data even when the determination in step S2756 becomes "Yes" and the process proceeds to step S2759. Then, in step S2759, the A register value is stored in the RWM 53 at the address "F000(H)". Thereby, the set value data can be saved in the RWM 53 .

Proceeding to the next step S2760, the main control board 50 refers to the falling edge data of the signal of the setting key switch 152 stored at the predetermined address of the RWM53. Then, the process of step S2760 is repeated until the falling data of the setting key switch 152 signal becomes "1", that is, until the setting key switch 152 is turned off. becomes "1", that is, when the setting key switch 152 is turned off, the process proceeds to step S2761.

In step S2761, the main control board 50 clears (sets to "0") the set value display data (_NB_RANK_DSP) of the address "F001 (H)" of the RWM 53. Then, the processing according to this flowchart ends.
Also, when the setting is changed, upon completion of the processing according to this flowchart, the processing proceeds to step S2743 in FIG.

Here, the transition to the setting confirmation state (setting confirmation mode, setting confirmation in progress) will be described.
In this embodiment, when the power is turned on (on), the door switch 17 is on (the front door 12 is open), and the number of bets is "0", the setting key switch 152 is turned on, "1" is stored in the D register and the state is shifted to the setting confirmation state. In the setting confirmation state, the setting value cannot be changed (even if the setting change switch 153 is operated, the setting value does not change), but the current setting value can be confirmed. Also, the current set value is displayed on the set value display LED 73 . Then, when the setting key switch 152 is turned off, the setting confirmation state is terminated, and the state returns to the state in which medals can be betted.

More specifically, in the main process (M_MAIN) (FIG. 46), the main control board 50 determines whether or not the setting key switch 152 is on before detecting the operation of the start switch 41 . When the door switch 17 is ON (the front door 12 is open) and the number of bets is "0", if it is determined that the setting key switch 152 is ON, the setting change confirmation of FIG. 45 is performed. Proceed to processing (M_RANK_CTL). Also, steps S2751 to S2754 of the setting change confirmation process (M_RANK_CTL) in FIG. 45 are as described above.

Furthermore, in the third embodiment, when the setting key switch 152 is turned on in a state where the bet number is "0" before the start of the game, "1" is set to be stored in the D register. ing. Then, when proceeding to step S2755 of the setting change confirmation process (M_RANK_CTL) in FIG. 45, the main control board 50 determines whether or not it is time to start confirming the setting. Specifically, first, the D register value is stored in the A register, and then it is determined whether or not the A register value is "1". When the A register value is "1", it is determined that it is time to start confirming the settings ("Yes"), and the process proceeds to step S2760.

After that, the process of step S2760 is repeated until the setting key switch 152 is turned off. During this time, the current set value continues to be displayed on the set value display LED 73 . When it is determined in step S2760 that the setting key switch 152 is off, the process proceeds to step S2761, and the main control board 50 clears (" 0”). Then, the processing according to this flowchart ends.
Further, when the processing according to this flowchart is completed at the time of setting confirmation, the main processing (M_MAIN) (FIG. 46) judges whether or not the setting key switch 152 is on (whether to shift to the setting confirmation state). Proceed to next processing.

Thus, in the third embodiment, the same module can execute the setting change process and the setting confirmation process. That is, the setting change state and the setting confirmation state are created in the same module. Based on the information stored in the D register, it is determined whether to enter the setting change state or the setting confirmation state.
It should be noted that it is also possible to determine whether to enter the setting change state or the setting confirmation state based on information stored in another register instead of the D register. may be used to determine whether the setting change state or the setting confirmation state should be set.

FIG. 46 is a flowchart showing main processing (M_MAIN) in the third embodiment. The main processing is processing for one game. While the game is in progress, the main process is repeated every game.
First, in step S271, a stack pointer is set. A stack pointer is an area of the RWM 53 that stores data at the time of power failure (for example, register values, instruction processing of main processing before interrupt processing, etc.). is the process of setting the register value to the initial value in the area of the RWM 53 .

In the next step S272, game start set processing is performed. This process is a process of generating, updating, saving, etc. of the operating state flag.
In the next step S273, bet medals are read. This process is a process of reading how many medals are currently bet, and reads bet number data or automatic bet number data.
In the next step S274, it is determined whether or not there are bet medals based on the number of bets read in step S273.

When it is determined that there are bet medals in step S274, the process proceeds to step S276, and when it is determined that there are no bet medals, the process proceeds to step S275 to perform medal insertion waiting processing, and then proceeds to step S276. In the medal insertion waiting process of step S275, it is determined whether or not the setting key switch is on.
In step S276, management processing of inserted medals is performed. This process is a process of determining whether or not the medals have been cleaned, whether or not the settlement switch 43 has been operated, and the like.

In the next step S277, update processing of soft random numbers is performed. This process is a process of updating (for example, adding "1" each time) a processing random number for processing (computation processing) the random number (hard random number or built-in random number) used in the combination lottery means 61 . A soft random number is a 16-bit random number with a range from '0' to '65535(D)'. As an update method, a process of adding an interrupt count value (a count value (variable) incremented at the time of an interrupt) to the value before updating may be executed.

At the next step S278, the main control board 50 determines whether or not the start switch 41 has been operated. When it is determined that the start switch 41 has been operated, the process proceeds to step S279, and when it is determined that the start switch 41 has not been operated, the process returns to step S273. Even when the start switch 41 is operated, if the number of bets has not reached the prescribed number for the game, it is determined "No" in step S278.

In step S279, a process for accepting a start switch is executed. This process is a process of setting a setting change prohibition flag, setting an output request at the start of rotation of the reel 31, and setting the number of times of output for outputting a medal insertion signal as an external signal to a hall computer or the like. .
In the next step S280, the acquisition number data is cleared. As a result, the acquisition number display LED 78 is caused to display "00" (or be extinguished).

Next, the process proceeds to step S281, and the main control board 50 executes a process of updating the number of AT games. This process is a process of subtracting the number of AT games when a predetermined condition is met during AT. Therefore, this process is not executed during non-AT.
Further, during AT, whether or not to add the number of AT games is performed based on the combination lottery result of the combination lottery process in step S282. For example, when a rare combination is won, the number of times AT is added to the game may be determined. Therefore, when the AT game number is added and the addition amount is added to the AT game number counter, it is executed after the process of step S282 (illustration is omitted in FIG. 46).
It should be noted that after the start switch reception (step S279), the AT game number counter is updated in step S281, but not limited to this, after the combination lottery process in step S282, after all reels 31 stop (step S290 and later) AT game number counter update may be performed.
In addition, in the specification of the difference number management type AT, when it has an AT difference number counter, after all the reels 31 stop and after the medal payout process due to winning (after step S300), the AT difference number counter update.

In step S282, the combination lottery means 61 executes the lottery for the combination at the timing when the start switch 41 is operated, that is, when the operation signal of the start switch 41 is received. The random number at the time of lottery is obtained in step S279. Then, in step S282, a process of determining whether or not the obtained random number value corresponds to any winning combination is performed using the combination lottery table.

In the next step S283, the main control board 50 executes an advantageous section shift lottery process. In the present embodiment, an AT lottery is executed together with the advantageous section transition lottery.
Next, the process proceeds to step S284 to set the push order instruction number. This process generates a push order instruction number and displays the push order instruction information when the instruction function is activated in the game (the push order instruction number is displayed on the acquisition number display LED 78) during AT. processing.

In the next step S285, reel rotation start preparation processing is executed. This process executes a process of determining whether or not the minimum game time (4.1 seconds) has passed, and proceeds to the next step S286 if the minimum game time has passed.
Here, the RWM 53 is provided with an area for storing the timer value of the minimum game time, and the initial value is "1834 (D) (2.235 ms×1834≈4099 ms)". If it is determined in step S279 that the minimum game time is "0", the initial value "1834 (D)" is set as the minimum game time (timer value). Then, the minimum game time is decremented by "1" for each interrupt process. When proceeding to step S285 of the next game, it is determined whether or not the minimum game time is "0", and when it is determined to be "0", the process proceeds to step S286.

At step S286, the reel control means 65 drives and controls the motor 32 to start the reel 31 to rotate. Then, when the reel 31 reaches the constant speed state, acceptance of operation of the stop switch 42 is permitted, and the process proceeds to step S287.
In step S287, it is checked whether the reel 31 has been stopped. Here, it is detected whether or not the operation signal of the stop switch 42 is received, and when the operation signal is received, the reel 31 corresponding to the stop switch 42 is determined based on the lottery result of the combination and the position of the reel 31. is determined, and the reel 31 is controlled to be stopped at the determined position.

In the next step S288, the reel control means 65 checks whether or not all the reels 31 have stopped, and proceeds to step S289. In step S289, it is determined whether or not all reels 31 have stopped. If it is determined that all reels 31 have stopped, the process proceeds to step S290, and if it is determined that all reels 31 have not stopped, the process returns to step S287. .

In step S290, the acquisition number data is cleared (set to "0"). For example, by activating the instruction function during AT, there is a case where the push order instruction information (for example, "=1") is displayed on the acquired number display LED 78 . In this case, the display of the acquisition number display LED 78 becomes "00" by the interrupt processing executed after the processing of step S290.
It should be noted that the acquisition number display LED 78 may be extinguished. Specifically, "00010011 (B)" may be stored in the LED display request flag, or data for extinguishing may be provided as segment data and the data may be output.

In step S291, the display determination of the pattern is performed. Here, the prize determination means 66 determines whether or not the combination of symbols corresponding to the combination has stopped on the activated line.
In the next step S292, it is determined whether or not a symbol display error has occurred. When it is determined that a display error has occurred, the process proceeds to step S304, and when it is determined that no display error has occurred, the process proceeds to step S293. move on.
Here, since the reel 31 is stopped based on the stop position determination table, the reel 31 normally does not stop at a position other than the position determined by the stop position determination table. However, as a result of the display judgment of the pattern, when the pattern (kicking pattern) which should not be displayed on the effective line is displayed, it is judged to be abnormal, and unrecoverable error processing is executed.

When it is determined in step S292 that no display error has occurred, and the process proceeds to step S293, the payout number is updated. This process is a process of storing the number of payouts in the game as the number of payout data and the number of payout data buffer.
In the next step S294, the payout means 67 pays out medals corresponding to the winning combination. Next, the process advances to step S295 to perform an interrupt waiting process. In the next step S296, interrupt processing is prohibited. The interrupt is prohibited immediately after the interrupt by the processing of these steps S295 and S296.

In the next step S297, the AF register is saved. Next, the flow advances to step S298 to execute ratio setting processing. This "ratio setting process" is a process of updating various counter values, calculating ratios, etc., in order to display five types of ratios on the management information display LED 74 (role ratio monitor). Then, when the process proceeds to step S299, the AF register saved in step S297 is restored, and the interrupt is permitted (restarted) in the next step S300. In this way, when the ratio setting process is executed, the AF register is saved and the interrupt process is prohibited.

The reason why interrupt processing is prohibited during the execution of ratio set processing is that the ratio set processing uses a program stored outside the usage area, and when the program outside the usage area is being executed in the main processing. This is because if an interrupt process is entered in , the program in the used area and the program outside the used area will coexist, and the processing will become complicated.

Next, the process proceeds to step S301 to perform a game end check process. This process is a process of clearing a condition device (winning combination) flag and the like. Then, in step S302, an output request is set at the end of the game, and a control command is set 1 in the next step S303. These processes are processes for setting control command data for transmitting to the sub-control board 80 that one game has ended.
When the process of step S303 is completed, the process returns to the beginning of the main process (step S248).

FIG. 47 is a flow chart showing interrupt processing (I_INTR) by the main control board 50 in the third embodiment.
In the interrupt process (I_INTR) shown in FIG. 47, step S452 is followed by step S2770, and the main control board 50 determines whether or not a power failure has occurred. Then, when it is determined that a power shutdown has occurred, the process proceeds to step S2771, and the main control board 50 executes power shutdown processing (I_POWER_DOWN). On the other hand, when it is determined that power failure has not occurred, step S2771 is skipped and the process proceeds to step S454.

Thus, the power-off process (I_POWER_DOWN) is executed in the interrupt process (I_INTR). For this reason, when interrupt processing (I_INTR) is not executed due to interrupts being disabled, or when interrupt processing (I_INTR) is not executed because a program (second program) is being executed outside the use area, the power-off processing (I_POWER_DOWN ) is also not executed. The specific contents of the power-off processing (I_POWER_DOWN) will be described later. When the power-off process (I_POWER_DOWN) is completed, the process proceeds to step S454.

Also, in the interrupt process (I_INTR) shown in FIG. 47, step S455 is followed by step S2821, and the main control board 50 executes LED display control (I_LED_OUT). Thus, LED display control (I_LED_OUT) is executed in interrupt processing (I_INTR). The specific contents of the LED display control (I_LED_OUT) will be described later.
When the LED display control (I_LED_OUT) is finished, the process proceeds to step S2765, and the main control board 50 saves the AF registers (A register and F register (flag register)) to the stack area of the RWM 53's use area. Then, the process proceeds to step S2221, and the main control board 50 executes ratio display preparation processing (S_DSP_READY).

Here, the LED display control (I_LED_OUT) is processing for controlling the lighting of the credit number display LED 76, the acquired number display LED 78, and the set value display LED 73 (digits 1 to 5). ).
On the other hand, the ratio display preparation process (S_DSP_READY) is a process for controlling lighting of the management information display LED 74 (digits 6 to 9), and is executed by a program (second program) outside the use area. The specific content of the ratio display preparation process (S_DSP_READY) will be described later. After completion of the ratio display preparation process (S_DSP_READY), the process proceeds to step S458.

At step S458, the main control board 50 determines whether the set value is within the normal range. Specifically, the set value data (_NB_RANK) stored at the address "F000(H)" of the RWM 53 is read and stored in the A register. Next, a comparison operation is performed between the A register value and "5" ("5" is subtracted from the A register value), and it is determined whether or not the carry flag="1". When the carry flag ≠ "1", it is determined that the set value data is within the normal range (the set value data is within the range of "0" to "5"), and when the carry flag = "1" determines that the set value data is not within the normal range. If it is determined that it is within the normal range, the process proceeds to step S459, and if it is determined that it is not within the normal range, the process proceeds to unrecoverable error processing 2 (S_ERROR_STOP) of step S2811.

Also, in the interrupt process (I_INTR) shown in FIG. 47, if "No" in step S458 or "Yes" in step S460, the process proceeds to step S2811, and the main control board 50 performs unrecoverable error process 2. Execute (S_ERROR_STOP). The specific contents of the unrecoverable error process 2 (S_ERROR_STOP) will be described later.
Furthermore, in the interrupt process (I_INTR) shown in FIG. 47, when "No" in step S460, the process proceeds to step S2766, and the main control board 50 saves the AF register (A register and F register ( flag register)). Then, the process proceeds to step S457.

Here, in the interrupt process (I_INTR) shown in FIG. 47, the processes of steps S2221, S458, S459, and S460 are executed by a program outside the usage area (second program).
Then, when the process by the program in the used area (first program) shifts to the process by the program outside the used area (second program), in step S2765 the AF register (A register and F register (flag register)) is When the data is saved in the stack area of the RWM 53, and the processing by the program outside the usage area (second program) is terminated and the processing by the program in the usage area (first program) is returned to, the AF register is cleared in step S2766. bring back.

FIG. 48 is a flowchart showing power-off processing (I_POWER_DOWN) in step S2771 in FIG.
When the power-off process (I_POWER_DOWN) in step S2771 is started, first, in step S2772, the main control board 50 saves the register. This process is a process of saving various registers to the stack area of the used area of the RWM 53 .

Proceeding to the next step S2773, the main control board 50 clears all the output ports 52. FIG. As a result, the output of all the output ports 52 is turned off. Stop driving it.
In the next step S2774, the main control board 50 saves the stack pointer at a predetermined address in the work area of the RWM 53's use area. Note that the stack pointer saved in step S2774 is restored in step S2722 of the power restoration process (M_POWER_ON) in FIG.

Proceeding to the next step S2775, the main control board 50 saves the AF registers (A register and F register (flag register)) to the stack area of the RWM 53's use area. Then, proceeding to step S2776, the main control board 50 executes RWM checksum set processing (S_SUM_SET). The specific contents of the RWM checksum set processing (S_SUM_SET) will be described later. When the RWM checksum set process (S_SUM_SET) is completed, the process proceeds to the next step S2777, and the main control board 50 restores the AF register saved in step S2775. Then, the process proceeds to the next step S2778.

The RWM checksum set processing (S_SUM_SET) is executed by a program (second program) outside the used area.
Then, when the process by the program in the used area (first program) shifts to the process by the program outside the used area (second program), the AF register (A register and F register (flag register)) is changed in step S2775. When saving to the stack area of the RWM 53 usage area, ending the processing by the program (second program) outside the usage area, and returning to the processing by the program (first program) in the usage area, the AF register is cleared in step S2777. bring back.

Proceeding to step S2778, the main control board 50 prohibits access to the RWM53. Then, proceeding to the next step S2779, the main control board 50 is brought into a reset wait state (loop processing state). Then, the processing according to this flowchart ends.

FIG. 49 is a flow chart showing the RWM checksum set processing (S_SUM_SET) in step S2776 in FIG.
When the RWM checksum set process (S_SUM_SET) in step S2776 is started, the main control board 50 first saves the stack pointer (SP register) to a specific address in the work area outside the use area of the RWM 53 in step S2781. , in the next step 2782, a stack pointer ("F400(H)") outside the use area is set, and when proceeding to the next step S2783, a plurality of registers are saved in the stack area outside the use area of the RWM 53. FIG. Then, the process proceeds to the next step S2784.

Here, in step S2781, the stack pointer (SP register) is stored in stack pointer temporary storage buffer 2 (address "F2A3(H)" in FIG. 35).
As described above, the RWM checksum set processing (S_SUM_SET) is processing by a program (second program) outside the usage area. The stack pointer used in (first program) is saved, and the stack pointer is restored when returning to the program (first program) in the used area.
Also, in step S2782, the stack pointer (address "F400(H)") outside the use area is stored in the stack pointer (SP register).
Furthermore, in step S2783, various registers are saved in the stack area outside the use area.

Proceeding to step S2784, the main control board 50 sets a power-off processing completion flag (_SF_POWER_OFF) to the address "F2A1(H)" of the RWM 53. FIG. Here, when power-off processing is executed, "55 (H)" is stored as a power-off processing completed flag (_SF_POWER_OFF).
When the power is restored, the power-off processing completed flag is cleared (set to "0") in step S2724 of the power restoration processing (M_POWER_ON) in FIG. Therefore, after executing the process of step S2724, the address "F2A1(H)" of the RWM 53 becomes "00(H)". If the power-off process is not executed, the power-off process completion flag (_SF_POWER_OFF) is not set, so the address "F2A1 (H)" of the RWM 53 remains "00 (H)".
Proceeding to the next step S2785, the main control board 50 clears (sets to "0") the RWM checksum data (_SW_SUM_CHK) of the address "F2A0(H)" of the RWM 53. Then, the process proceeds to the next step S2786.

Proceeding to step S2786, the main control board 50 sets the start address ("F000 (H)") of the used area of the RWM 53 in an addressing register (eg, B register), and proceeding to the next step S2787. , the number of bytes of the used area of the RWM 53 (the number of checksum calculations) is set in the register for the number of calculations (for example, the C register). , the initial data (“00000000 (B)”) is set.

Then, proceeding to the next step S2789, the main control board 50 executes checksum calculation processing of the used area of the RWM 53. FIG.
In this embodiment, the use area of the RWM 53 is set in the range of addresses "F000(H)" to "F1FF(H)". The processing of steps S2789 and S2790 is repeated until it is determined that the calculation processing has ended. As a result, the checksum of the used area of the RWM 53 (addresses “F000(H)” to “F1FF(H)”) is calculated.

More specifically, in this embodiment, in step S2789, the data indicated by the addressing register (B register) value is subtracted from the checksum calculation register (D register) value. In the next step S2790, the value of the register (C register) for the number of calculations is updated (subtracted by "1"), and it is determined whether or not the result is "0". When it is determined to be "0", it is determined that the checksum calculation processing of the used area of the RWM 53 has ended, and the process proceeds to step S2791. On the other hand, when it is determined that it is not "0", the value of the addressing register (B register) is updated ("1" is added), and the process returns to step S2789.

Then, when the checksum calculation processing of the used area of the RWM 53 is completed, the process advances to step S2791, and the main control board 50 stores the start address ("F210 (H )”) is set, and in the next step S2792, the number of bytes (the number of checksum calculations) outside the use area of the RWM 53 is set in the register for the number of calculations (C register).

Then, proceeding to the next step S2793, the main control board 50 executes checksum calculation processing outside the use area of the RWM 53. FIG.
In this embodiment, the area outside the use area of the RWM 53 is set to addresses "F210(H)" to "F3FF(H)", and in the next step S2794, the checksum is calculated up to the address "F3FF(H)" of the RWM 53. The processing of steps S2793 and S2794 is repeated until it is determined that the processing has ended. As a result, the checksum outside the use area of the RWM 53 (addresses “F210(H)” to “F3FF(H)”) is calculated.

More specifically, in this embodiment, the checksum calculation result of the used area of the RWM 53 is stored in the checksum calculation register (D register) at the time when the process proceeds to step S2793. Then, in step S2793, the data indicated by the value of the addressing register (B register) is subtracted from the value of the checksum calculation register (D register). In the next step S2794, the value of the register (C register) for the number of calculations is updated (subtracted by "1"), and it is determined whether or not the result is "0". When it is determined to be "0", it is determined that the checksum calculation processing outside the use area of the RWM 53 has ended, and the flow advances to step S2795. On the other hand, when it is determined that it is not "0", the value of the addressing register (B register) is updated ("1" is added), and the process returns to step S2793.

Thus, in this embodiment, the RWM checksum data (also called complement data, error detection data, or error detection information) is calculated by executing the processing of steps S2785 to S2794.
This RWM checksum data (complement data) is, as described above, the data of addresses "F000(H)" to "F1FF(H)" in the use area of the RWM 53 and the address "F210(H)" outside the use area. ∼ "F3FF(H)" (excluding "F2A0(H)") is a value that becomes "0" when added to the addition value of the data.

Then, when the checksum calculation processing outside the use area of the RWM 53 is completed, the process proceeds to step S2795, and the main control board 50 stores (saves) the RWM checksum data (complement data) in the address "F2A0(H)" of the RWM 53. )do.
Proceeding to the next step S2796, the main control board 50 restores the register saved in step S2783, and restores the stack pointer saved in step S2781 in the next step S2797. Then, the processing according to this flowchart ends.

FIG. 50 is a flow chart showing the LED display control (I_LED_OUT) in step S2821 in FIG.
First, in step S2822, output ports 3 and 4 (FIG. 38) are turned off. Output port 3 is an output port corresponding to digit 1 signal to digit 5 signal, and output port 4 is an output port corresponding to segment 1A to segment 1P signal. By outputting "00000000 (B)" to these output ports 3 and 4, the output of digits 1 to 5 is temporarily disabled. As a result, when switching the display of the LEDs, it is possible to prevent different LEDs from appearing to light up at the same time (overlaid display) even for a moment (prevention of afterimage).

In the next step S2823, the used area LED display counter 1 (_CT_LED_DSP1) (FIGS. 33 and 40A) is updated. Updating the LED display counter 1 is a process of shifting the bit "1" to the right by one digit. This updated value is stored in the RWM 53 at address "F051(H)" (FIG. 33). Then, the process proceeds to step S2824.

In step S2824, it is determined whether or not the value of the LED display counter 1 is "00000000 (B)". Then, when it is determined to be "00000000(B)", the process proceeds to step S2825. On the other hand, when it is determined that it is not "00000000(B)", step S2825 is skipped and the process proceeds to step S2826.

In step S2825, the LED display counter 1 is initialized. Here, the value of the LED display counter 1 is set to "00010000 (B)" and stored in the address "F051 (H)" of the RWM 53 (FIG. 33). Then, the process proceeds to step S2826.
In step S2826, the values of the LED display counter 1 (address "F051(H)" in FIG. 33) and the LED display request flag (address "F052(H)" in FIG. 33) stored in the RWM 53 are obtained. Here, the value of the LED display counter 1 is stored in the E register, and the value of the LED display request flag is stored in the A register.

The flow then advances to step S2827 to set the segment display confirmation of the digits to be displayed this time. In this process, an AND operation is performed on the A register value (the value of the LED display request flag) and the E register value (the value of the LED display counter 1) to create the data of the LED to be lit this time.

for example,
LED display counter value: 00001000B
LED display request flag value: 00001111B
After AND operation: 00001000B
becomes.
Or, for example,
LED display counter value: 10000000B
LED display request flag value: 00001111B
After AND operation: 00000000B
becomes.
Then, the calculation result is stored in the A register. Furthermore, the value stored in the A register is stored in the D register.

Next, proceeding to step S2828, it is determined whether or not the A register value (the value obtained by ANDing the value of the LED display counter 1 and the value of the LED display request flag) is "0". Here, when it is "0", it is determined that there is no display request ("No"), and the process proceeds to step S2844. On the other hand, if it is not "0", it is determined that there is a display request ("Yes"), and the process proceeds to step S2829.

In step S2829, error display data is acquired. When an error occurs, error display data is stored in the RWM 53 at a predetermined address. Then, in step S2829, the error display data is read from the RWM 53 and stored in the B register.
In the next step S2830, LED segment table 2 is set. In this embodiment, an LED segment table 1 storing data for displaying English characters on the 7-segment display and an LED segment table 2 storing data for displaying numbers on the 7-segment display are provided. These are stored in the used area of the ROM 54 . A description of the specific configurations of the LED segment tables 1 and 2 will be omitted. Then, in step S2830, the top address of LED segment table 2 is read and the value is stored in the HL register.

Next, proceeding to step S2831, the set value display data (address "F001 (H)" in FIG. 33) is read from the RWM 53 and stored in the A register.
Next, proceeding to step S2832, it is determined whether or not there is a set value display request. Specifically, it is determined whether or not the D4 bit (the bit corresponding to digit 5) of the AND-operated value stored in the D register is "1"("00010000(B)"). When the D4 bit is "1", it is determined that there is a set value display request ("Yes"), and the process proceeds to step S2843. On the other hand, when the D4 bit is "0", it is determined that there is no set value display request ("No"), and the process proceeds to step S2833.

In step S2833, credit number data (address "F010(H)" in FIG. 33) is read from the RWM 53 and stored in the A register.
In the next step S2834, the upper digit offset is obtained. In this process, the A register value (credit amount data obtained in step S2833) is divided by 10 (decimal number), the quotient value is stored in the A register, and the remainder value is stored in the C register. It is a process to

In the next step S2835, it is determined whether or not there is a request to display the upper digits of the credit amount. Specifically, it is determined whether or not the D0 bit (the bit corresponding to digit 1) of the AND-operated value stored in the D register is "1". When the D0 bit is "1", it is determined that there is a request to display the upper digits of the credit number ("Yes"), and the process proceeds to step S2843. On the other hand, when the D0 bit is "0", it is determined that there is no request to display the upper digits of the credit number ("No"), and the process proceeds to step S2836.

Proceeding to step S2836, it is determined whether or not there is a request to display the lower digits of the credit amount. Specifically, it is determined whether or not the D1 bit (the bit corresponding to digit 2) of the AND-operated value stored in the D register is "1". When the D1 bit is "1", it is determined that there is a request to display the lower digits of the credit number ("Yes"), and the process proceeds to step S2842. On the other hand, when the D1 bit is "0", it is determined that there is no request to display the lower digits of the credit number ("No"), and the process proceeds to step S2837.

In step S2837, acquisition number data (address "F011(H)" in FIG. 33) is read from the RWM 53 and stored in the A register.
In the next step S2838, it is determined whether or not an error is being displayed. Specifically, it is determined whether or not the B register value is "0", and if it is "0", it is determined that an error is not being displayed ("No"), and the process proceeds to step S2840. On the other hand, when the B register value is not "0", it is determined that an error is being displayed ("Yes"), and the process proceeds to step S2839.

In step S2839, LED segment table 1 is set. When proceeding to step S2839, the HL register stores the head address of the LED segment table 2 for displaying numbers on the 7-segment display. display the corresponding alphabetic character. Therefore, in step S2839, the head address of the LED segment table 1 for displaying English characters on the 7-segment display is read, and the value is stored in the HL register. As a result, the head address of LED segment table 1 is set in the HL register instead of the head address of LED segment table 2 set in step S2830.

In the next step S2840, the offset for the upper digits is obtained. At the time when the process proceeds to step S2840, the A register stores the acquisition number data acquired in step S2837, and the B register stores the error display data acquired in step S2829. If an error does not occur, the acquired number data stored in the A register is divided by "10 (decimal number)", the quotient is stored in the A register, and the remainder is stored in the C register. do. On the other hand, when an error occurs, the error display data stored in the B register is divided by "10 (decimal number)", the quotient is stored in the A register, and the remainder is stored in the C register.

In the next step S2841, it is determined whether or not there is a request to display the upper digits of the acquisition number display LED78. Specifically, it is determined whether or not the D2 bit (the bit corresponding to digit 3) of the ANDed value stored in the D register is "1". When the D2 bit is "1", it is determined that there is a request to display the upper digits of the obtained number ("Yes"), and the process proceeds to step S2843. On the other hand, when the D2 bit is "0", it is determined that there is no request to display the upper digits of the obtained number ("No"), and the process proceeds to step S2842.

In step S2842, the offset for lower digits is obtained. This process is a process of storing the data stored in the C register in the A register. At the time the process proceeds to step S2842, the A register stores the quotient calculated by the division in step S2834 or S2840, and the C register stores the remainder calculated by the division in step S2834 or S2840. Then, in step S2842, the C register value (remainder of division) is stored in the A register.

The flow then advances to step S2843 to acquire segment output data. Specifically, the data stored in the HL register (head address of the LED segment table 2 stored in step S2830 or the head address of the LED segment table 1 stored in step S2839) and the data stored in the A register ( The offset value corresponding to the display data) is added, and the data corresponding to the address after the addition is acquired from the LED segment table 1 or 2 of the ROM 54 and stored in the D register.

The flow then advances to step S2844 to determine whether or not there is a segment P display request.
Specifically, first, the D3 bit of the LED display counter 1 (E register value) is "1" (lighting timing of digit 4), and the advantageous section display LED flag (address "F062 (H) of RWM 53 in FIG. 33") )”) is “1”. When the D3 bit of the LED display counter 1 is "1" and the D0 bit of the advantageous section display LED flag is "1", it is determined that there is a display request for the segment P ("Yes"), and step Proceed to S2845.
On the other hand, when the D3 bit of the LED display counter 1 is "1" and the D0 bit of the advantageous section display LED flag is not "1", it is determined that there is no segment P display request ("No"), and step S2845. and proceed to step S2846.

Next, if the D3 bit of the LED display counter 1 is not "1", proceed to the following processing.
The LED display counter 1 (E register value) and the status display LED lighting data (obtained from the address "F044 (H)" of the RWM 53 in FIG. 33) are ANDed, and it is determined whether the result of the AND operation is "0". . Then, when the AND operation result is not "0", it is determined that there is a request to display segment P ("Yes"), and the process proceeds to step S2845. On the other hand, when the AND operation result is "0", it is determined that there is no display request for segment P ("No"), step S2845 is skipped, and the process proceeds to step S2846.

Proceeding to step S2845, segment P output data is set. Specifically, the segment output data (D register value) acquired in step S2843 and "10000000 (B)" are ORed, and the result of the OR operation is stored in the D register. As a result, the D7 bit (the bit corresponding to segment P) of the segment output data becomes "1".

Then, proceeding to the next step S2846, the digit signal is output from the output port 3 and the segment signal is output from the output port 4. Specifically, the data (LED display counter 1) stored in the E register is output from the output port 3 as a digit signal, and the data (segment output data) stored in the D register is output as a segment signal to the output port. Output from 4. Then, the processing according to this flowchart ends.

FIG. 51 is a flowchart showing unrecoverable error processing 2 (S_ERROR_STOP).
As described above, unrecoverable error processing 2 (S_ERROR_STOP) is processing by the second program. No interrupt prohibition processing is provided after the start of error processing 2 (S_ERROR_STOP). Except for this point, the unrecoverable error process 2 (S_ERROR_STOP) in FIG. 51 is the same as the unrecoverable error process (C_ERROR_STOP) in FIG.
In FIG. 51, the same step numbers are given to the same processes as in FIG.

FIG. 52 is a flow chart showing ratio display preparation (S_DSP_READY) in step S2221 of interrupt processing (I_INTR) in FIG.
Ratio display preparation (S_DSP_READY) is executed during interrupt processing (I_INTR). Also, during the setting change state, the setting confirmation state, the start switch acceptance process (step S279 in FIG. 46) to the game end check process (step S301 in FIG. 46) (during the game), and in the recoverable error state, Since interrupt processing (I_INTR) can be executed, ratio display preparation (S_DSP_READY) can also be executed, so various ratio information can be displayed on the management information display LED 74 (role ratio monitor).

When the ratio display preparation (S_DSP_READY) process is started, first, in step S2461, the main control board 50 sets the stack pointer (SP register) to the stack pointer temporary storage buffer 2 (address "F2A3 (H)" in FIG. 35). memorize to
As described above, ratio display preparation (S_DSP_READY) is a process performed by a program outside the usage area (second program). 1 program) is saved, and the stack pointer is restored when returning to the program in the used area (first program).

In the next step S2462, the main control board 50 sets a stack pointer outside the use area. This process is a process of storing "F400 (H)" in the stack pointer (SP register).
In the next step S2463, the main control board 50 saves the register. This process is a process of saving various registers to a stack area outside the used area.
Next, proceeding to step S2464, the main control board 50 executes flashing request flag generation (S_LED_FLASH). This process is a process shown in FIG. 53, which will be described later, and is a process of updating the flashing request flag (address "F291(H)").

In the next step S2465, the main control board 50 updates the ratio display timer (S_RATE_TIME). This process is the process shown in FIG. 55, which will be described later. This is the process of updating the
In the next step S2466, the main control board 50 performs ratio display processing (S_LED_OUT). This process is a process shown in FIG. 56, which will be described later, and is a process of actually displaying (lighting up or extinguishing) the ratio in the interrupt process.

Next, proceeding to step S2467, the main control board 50 restores the register. This process is a process of restoring various registers saved in step S2463.
In the next step S2468, the main control board 50 restores the stack pointer. This process stores the stack pointer saved in step S2461, ie, the data stored in the stack pointer temporary storage buffer 2, in the stack pointer (SP register). In other words, the processing causes the stap pointer to indicate the address of the used area. Then, the processing according to this flowchart ends.

As described above, in the present embodiment, the setting change state, the setting confirmation state, the start switch acceptance process (step S279 in FIG. 46) to the game end check process (step S301 in FIG. 46) (during the game), and return Since interrupt processing (I_INTR) can be executed even in the possible error state, ratio display preparation (S_DSP_READY) can also be executed.
For this reason, the ratio By display preparation processing (S_DSP_READY), it is possible to sequentially display information types and various ratios related to game results on digits 6 to 9 of the management information display LED 74 (role ratio monitor).

In addition, in this embodiment, ratio display preparation (S_DSP_READY) can be executed regardless of whether the door switch 17 is on/off (opening/closing of the front door 12). That is, the ratio display preparation (S_DSP_READY) is executed both when the door switch 17 is on (the front door 12 is open) and when the door switch 17 is off (the front door 12 is closed). It is possible.
Therefore, both when the door switch 17 is on (the front door 12 is open) and when the door switch 17 is off (the front door 12 is closed), the ratio display preparation process (S_DSP_READY) is executed. Thus, it is possible to sequentially display various ratios related to information types and game results on digits 6 to 9 of the management information display LED 74 (role ratio monitor).

On the other hand, an unrecoverable error occurs, an unrecoverable error state (unrecoverable error processing (C_ERROR_STOP) in FIG. 43 or unrecoverable error processing 2 (S_ERROR_STOP) in FIG. 51 is executed, and the game progresses) When it comes to a stopped state), the interrupt process (I_INTR) is prohibited, so the ratio display preparation process (S_DSP_READY) is not executed. Various ratios related to game results are no longer displayed.
Furthermore, in this embodiment, in an unrecoverable error state, in step S1494 of the unrecoverable error process (C_ERROR_STOP) in FIG. 43 described above or the unrecoverable error process 2 (S_ERROR_STOP) in FIG. Outputs 0 to 7 are turned off (“00000000 (B)”).

As a result, in an unrecoverable error state, the output from output port 6 (output port for digits 6 to 9 signals) and output port 7 (output port for segment signals for digits 6 to 9) is "00000000 (B)". Therefore, all digits 6 to 9 of the management information display LED 74 remain extinguished until the unrecoverable error state is canceled and the interrupt process (I_INTR) is restarted.
The fact that digits 6 to 9 of the management information display LED 74 all remain unlit is a feature specific to the unrecoverable error state. You can let us know what happened.

FIG. 53 is a flow chart showing flashing request flag generation (S_LED_FLASH) in step S2464 of FIG.
When the flashing request flag generation (S_LED_FLASH) process is started, the main control board 50 first sets the number of repetitions and the initial value in step S2481. This process stores "6(H)" in the B register and "0" in the C register.
Here, the number of repetitions "6" is a value for determining whether or not to blink the 6 ratio segments.

In the next step S2482, the main control board 50 sets the address of the blinking/non-corresponding item determination value table. This process is a process of storing the start address of the flashing/non-corresponding item determination value table (TBL_SEG_FLASH) in the DE register.
FIG. 54 is a diagram showing a flashing/non-corresponding item determination value table (TBL_SEG_FLASH). The flashing/non-applicable item determination value table defines predetermined values for the ratios of the six items. For example, the instructed accessory ratio "70" means that the display is blinked when the instructed accessory ratio is "70" or more.
As shown in FIG. 54, the leading address of the blinking/non-applicable item determination value table is "2500 (H)". Therefore, "2500 (H)" is stored in the DE register.

"Non-applicable item" means that the function (performance) corresponding to the item is not provided. For example, in a gaming machine that does not have "RB (first class special role)", the continuous role ratio is not displayed, so when the continuous role ratio is displayed, the ratio segment is lit and displayed with "--".
In the third embodiment, the ratios of all six items are displayed. However, when there is a non-applicable item, the address of the ROM 54 corresponding to the non-applicable item in the flashing/non-applicable item determination value table contains "DE ( H)” is stored.

For example, in a gaming machine that does not have "RB (first class special accessory)", the addresses "2502 (H)" and "2504 (H)" are replaced with "60 (H)" in FIG. , "DE(H)".
In this way, even if the game machine is not equipped with "RB (first class special accessory)", it can be managed simply by correcting a part of the data of the flashing/non-applicable item judgment value table. A control process is provided to enable lighting control of information. Therefore, the control program can be easily used for other products.
Note that the value corresponding to the non-applicable item is not limited to "DE(H)".

In the next step S2483, the main control board 50 sets the RWM address of the ratio data. This process is a process of storing the address ("F28D(H)" in FIG. 35) where the role product etc. state ratio data is stored in the HL register.
Next, proceeding to step S2484, the main control board 50 acquires a blinking or non-corresponding item determination value. Here, the following processing is executed.
(1) Store the data at the address indicated by the DE register value in the A register.
(2) Subtract "1" from the A register value.

In the next step S2485, the main control board 50 determines whether or not it is a non-applicable item value. In this process, "DD(H)" is subtracted from the A register value, and when the operation result is "0" (zero flag="1"), it is determined to be a non-corresponding item value.
That is, when the item is a non-applicable item, "DE(H)" is stored in the flashing/non-applicable item determination value table as described above, so "1" is subtracted from "DE(H)". After that, if "DD(H)" is further subtracted, it becomes "0" and the zero flag="1".

When a predetermined value other than "DE(H)" is stored as the value corresponding to the non-applicable item, for example, "predetermined value -1 - (predetermined value -1)" is calculated, and the result of the calculation is "0". When (zero flag=“1”), it is determined to be a non-corresponding item value.
In addition, the "predetermined value" may be a value exceeding "70 (H)" in the case of the instructed accessory ratio, the accessory ratio (total), and the accessory ratio (6000 times), and the continuous accessory ratio ( Cumulative total) and continuous role product ratio (6000 times) may be a value exceeding "60 (H)", and in the case of role product condition ratio, a value exceeding "50 (H)" may be used.
If it is determined that the item value is not a non-applicable item value, the process proceeds to the next step S2486.

In step S2486, the main control board 50 acquires ratio data. This process is a process of storing the data stored at the address indicated by the HL register value in the A register.
In the next step S2487, the main control board 50 saves the ratio data or non-applicable item values. This process is a process of storing the A register value at the address indicated by the HL register value. This process has the following meanings.

If there is a non-applicable item, no data is stored in the storage area of the RWM 53 in which the ratio data is stored before the save process.
For example, if "RB (first class special bonus)" is not provided, continuous bonus ratio (6000 times) data (address "F289 (H)") and continuous bonus ratio (cumulative) data (address "F28B(H)") stores "00(H)".

Although the details will be described later, when the ratio is displayed in the ratio segment of the management information display LED 74, the ratio is displayed based on the information stored in the address. At that time, if "00 (H)" is stored in the continuous role product ratio (6000 times) data, when displaying the continuous role product ratio (6000 times), the ratio segment of the management information display LED 74 is "00" is displayed. In order to prevent this, the value of the A register obtained in step S2485 ("DD(H)" in this embodiment) is stored as ratio data, so that "--" is displayed.
It should be noted that the program processing is incorporated so that this can also be used in common between gaming machines that have non-applicable items and gaming machines that do not have non-applicable items.

In the next step S2488, the main control board 50 performs blinking determination. This process is a process of subtracting the data at the address indicated by the DE register value from the A register value. As a result of the operation, when there is a carry-down, the carry flag is set to "1".
Although the details will be described later, when the carry flag is set to "1", it means that the item is lit without blinking when the item is displayed, and when the carry flag is set to "0", It means that when the item is displayed, it lights up in a blinking manner.

Next, proceeding to step S2489, the main control board 50 generates a flashing request flag. This process performs arithmetic processing to rotate-shift the carry flag and the C register value to the left.
Specifically, if the value of the carry flag is "CY" and the value of the C register is "D7, D6, D5, D4, D3, D2, D1, D0",
"CY", C register value "D7, D6, D5, D4, D3, D2, D1, D0"
of,
"D7", C register value "D6, D5, D4, D3, D2, D1, D0, CY"
Calculation is performed as follows.

For example, when the C register value is the initial value "00000000 (B)" as shown in step S2481 and the carry flag = "1" in step S2488,
"1", C register value "00000000 (B)"
of,
"0", C register value "00000001 (B)"
Calculation is performed as follows.
Therefore, the C register value is "00000001 (B)".
This C register value finally becomes the flashing request flag.
In other words, the processing of step S2488 registers information for determining whether or not to blink the ratio segment of the item by calculation based on the ratio data and the specific value stored in the blinking/non-corresponding item determination value table. (storage area).

In the next step S2490, the main control board 50 sets the RWM address of the next ratio data. This process is a process of subtracting "1" from the HL register value.
For example, the HL register value in the first flashing determination is "F28D(H)" (accessory item state ratio data) as described above. Here, when "1" is subtracted, the HL register value becomes "F28C(H)" (accessory ratio (accumulated) data), which is the second flashing determination target.

In the next step S2491, the main control board 50 sets the address of the next blinking/non-corresponding item determination value table. This process is a process of adding "1" to the DE register value. For example, when "2500 (H)" was initially stored as the DE register value, it becomes "2501 (H)" by this processing.
Here, as shown in FIG. 54, the state ratio of the role, etc., the ratio of the role (cumulative), the ratio of the continuous role (cumulative), the ratio of the role (6000 times), the ratio of the continuous role (6000 times), Blinking/non-corresponding item determination values are stored in addresses "2500(H)" to "2505(H)" in order of character ratio.
As a result, a loop process (step S2484 to S2492) allows the target address to be specified, thereby simplifying the processing.

Next, proceeding to step S2492, the main control board 50 determines whether or not the repetition has ended. Here, the following processing is executed.
(1) Subtract "1" from the B register value.
(2) If the B register value is not "0", it is determined that the iteration has not ended.
Here, since the B register value is set to "6" in the first step S2481, the number of repetitions is "6". When it is determined that the repetition has been completed, the process proceeds to step S2493, and when it is determined that the repetition has not been completed, the process returns to step S2484.
As described above, six items of flashing determination are performed.

When the blinking determination of the 6 items is completed and the process proceeds to step S2493, the main control board 50 acquires the total number of games counter value. Here, the following processing is executed.
(1) Store the value of the lower 2 bytes of the total number of games counter (address "F26D(H)") in the HL register.
(2) Store the value of the upper 1 byte of the total number of games counter (address "F26D(H)") in the A register.
As described above, the total number-of-games counter consists of 3 bytes, "F26D(H)" is a storage area for storing the first digit, and the value is stored in the L register.
"F26E(H)" is a storage area for storing the second digit, and the value is stored in the H register.
Furthermore, "F26F(H)" is a storage area for storing the third digit, and its value is stored in the A register.

In the next step S2494, the main control board 50 determines whether or not the upper 1 byte of the total number of games counter is "0". This process determines whether the A register value stored in step S2493 is "0". If it is determined to be "0", the process proceeds to step S2495, and if it is determined not to be "0", the process proceeds to step S2496.
In step S2495, the main control board 50 determines whether or not 6000 games have passed. In this process, "6000 (D)" is subtracted from the HL register value (lower 2-byte data of the total number-of-games counter). As a result of the operation, when there is a carry-down, the carry flag is set to "1". When the carry flag is "1", it is determined that 6000 games have not passed, and the process proceeds to step S2497.
On the other hand, when it is determined that 6000 games have passed, the process proceeds to step S2496.

At step S2496, the main control board 50 updates the blink request flag data. This process is to set the D6 bit of the C register to "1". Here, the C register value is set to a value corresponding to the flashing request flag at address "F291(H)" in FIG. Therefore, when 6000 games have passed, the process of setting the D6 bit to "1" is executed.

In the next step S2497, the main control board 50 determines whether or not the upper byte of the total number of games counter exceeds "2" ("3" or more). Here, a process of subtracting "3" from the A register value is performed. If there is no carry-down in this subtraction, the carry flag ≠ "1". Then, when the carry flag is not "1", it is determined that the upper 1 byte of the total number-of-games counter exceeds "2" ("3" or more).

The reason for doing this is that the upper 1 byte is first compared with "3" in order to determine whether or not the number of games has reached 175,000. Here, "175000 (D)" is "2AB98 (H)" in hexadecimal, so it is inevitable that the A register value exceeds "2" (the A register value is "3" or more). In general, it can be seen that the value of the total number-of-games counter exceeds "175000 (D)".
At step S2497, when the carry flag ≠ "1", it is determined that the upper 1 byte of the total number of games counter exceeds "2", and the process proceeds to step S2500. It is determined that the upper 1 byte of the number-of-games counter does not exceed "2", and the process proceeds to step S2498.

At step S2498, the main control board 50 determines whether or not the value of the upper 1 byte of the total number of games counter is "2". In this process, "2" is subtracted from the A register value, and when it is determined that it is not "0", it is determined that the value of the upper 1 byte of the total number of games counter is not "2". If it is determined that the value of the upper byte of the total number of games counter is not "2", the process proceeds to step S2501, and if it is determined that the value of the upper byte of the total number of games counter is "2", step S2499. proceed to

At step S2499, the main control board 50 determines whether or not 175000 games have been played. Specifically, "AB98(H)" is subtracted from the HL register value, and if the result of the calculation is a carry flag, the carry flag is set to "1". When the carry flag is "1", it is determined that 175000 games have not passed.
If it is determined in step S2499 that 175,000 games have passed, the process proceeds to step S2500, and if it is determined that 175,000 games have not passed, the process proceeds to step S2501.

At step S2500, the main control board 50 updates the blinking request flag data. This process sets the D7 bit of the C register to "1". The D7 bit of the C register corresponds to the D7 bit (175000 game blink flag) of the blink request flag at address "F291(H)" in FIG. Then, the process advances to step S2501.

At step S2501, the main control board 50 generates a flashing request flag. Here, the following processing is executed.
(1) Store "01111111 (B)" in the A register.
(2) An exclusive OR operation (XOR) is performed on the A register value and the C register value, and the operation result is stored in the A register.

Before execution of the process of step S2501, "0" is stored in the blinking items (bits) of the data stored in the C register, as described above. For example, when 175,000 games have been played, the D7 bit is "1" as described above. In other words, when 175,000 games have not been played, it is "0".
Therefore, by inverting the bit of the C register value, a flashing request flag is generated so that the flashing item (bit) becomes "1".

In the next step S2502, the main control board 50 saves the flashing request flag generated in step S2501. Here, the following processing is executed.
(1) Store the address of the flashing request flag ("F291(H)" in FIG. 35) in the HL register.
(2) Store the A register value at the address indicated by the HL register value ("F291(H)" in FIG. 35).
As a result, the blinking item becomes "1" and the non-blinking item becomes "0". In this way, the information corresponding to each bit is represented by "1" or "0", and the flashing request flags for eight items including whether or not to flash are stored at the address "F291(H)" in FIG. remembered.

FIG. 55 is a flow chart showing the rate display timer update (S_RATE_TIME) in step S2465 in FIG.
When the ratio display timer update (S_RATE_TIME) process is started, the main control board 50 first updates the display switching time in step S2511. Here, the following processing is executed.
(1) Store the address (“F294(H)” in FIG. 35) storing the display switching time in the HL register.
(2) Subtract "1" from the data stored at the address indicated by the HL register value, and store the result of the subtraction at that address.
This process executes a cyclic subtraction process that circulates between "0" and "2144 (D)" when the display switching time is expressed in decimal notation.

Therefore, if the processing is performed when the display switching time is "0", "2144 (D)" (860 (H)) is stored as the display switching time.
Also, when the flag is "0", the process is performed, and when "2144 (D)" (860 (H)) is stored as the display switching time, the carry flag becomes "1".
Since interrupt processing is executed every 2.235 ms, the value changes from "0" to "2144 (D)" every approximately 4792 ms, and the carry flag becomes "1".
As a result, the content of the ratio display is switched approximately every five seconds.

In the next step S2512, the main control board 50 determines whether or not the display switching time has elapsed. This determination is to determine whether or not the carry flag=“1” in the process of step S2511. When the carry flag=“1”, it is determined that the display switching time has elapsed.
When it is determined that the display switching time has elapsed, the process proceeds to step S2513, and when it is determined that the display switching time has not elapsed, the process proceeds to step S2518.

At step S2513, the main control board 50 saves the blink switching time. In this process, "134 (D) (86 (H))" is stored at the address (blink switching time) indicated by the data obtained by adding "2" to the HL register value (that is, "F296 (H)").
That is, when it is determined that the display switching time has passed, the flashing switching time is saved. A time of "2.235×134=299.49 (ms)" is stored as the flashing switching time.

Next, proceeding to step S2514, the main control board 50 turns off the flashing switching flag. Here, the following processing is executed.
(1) Store the address of the flashing switching flag ("F293(H)" in FIG. 35) in the HL register.
(2) Store "0" at the address indicated by the HL register value.
As described above, when the data stored in the flashing switching flag is "0", it indicates lighting, and when it is "1", it indicates lighting off.
That is, at the timing when the display switching time has elapsed, the flashing switching flag becomes "0" (lit).

Next, proceeding to step S2515, the main control board 50 updates the ratio display number. Here, the following processing is executed.
(1) Subtract "1" from the HL register value.
In other words, the address of the RWM 53 ("F292(H)" in FIG. 35) corresponding to the ratio display number is stored in the HL register.
(2) Add "1" to the data stored at the address indicated by the HL register value.
This process executes a cyclic addition process that circulates between "0" and "5" for the ratio display number. Therefore, if the processing is performed when the ratio display number is "5", "0" is stored as the ratio display number. Also, if the process is performed when the ratio display number is less than "5", the carry flag is set to "1".

In the next step S2516, the main control board 50 determines whether or not the updated ratio display number is "0". Here, when the carry flag=“1”, it is determined that the ratio display number is not “0”. In other words, if the process of step S2515 is executed when the ratio display number is "5", the carry flag ≠ "1" (= "0"), and at this time it is determined that the ratio display number is "0". do.

In step S2516, when it is determined that the updated ratio display number is "0", the process proceeds to step S2517, and when it is determined that it is not "0", the processing according to this flowchart is terminated.
At step S2517, the main control board 50 corrects the ratio display number. This process is a process of adding "1" to the data stored at the address indicated by the HL register value ("F292(H)" in FIG. 35). By this processing, when "0" is stored in the ratio display number, it is updated to "1". As a result, the ratio display number circulates from "1" to "6". Then, the processing according to this flowchart ends.

In step S2512, it is determined that the display switching time has not elapsed, and when proceeding to step S2518, the main control board 50 updates the flashing switching time. Here, the following processing is executed.
(1) Store the address of the blink switching time ("F296 (H)" in FIG. 35) in the HL register.
(2) Subtract "1" from the data stored at the address indicated by the HL register value, and store the result of the subtraction at that address.
This process executes a cyclic subtraction process that circulates between "0" and "134 (D)" when the flashing switching time is expressed in decimal notation.
Therefore, if the processing is performed when the flashing switching time is "0", "134 (D)" (86 (H)) is stored as the flashing switching time.
Also, when the flag is "0", the relevant processing is performed, and when "134 (D)" (86 (H)) is stored as the flashing switching time, the carry flag becomes "1".

Next, proceeding to step S2519, the main control board 50 determines whether or not the blink switching time has elapsed. This judgment is made by judging whether or not the carry flag is "1", and when the carry flag ≠ "1", it is judged that the flashing switching time has not elapsed. If it is determined that the flashing switching time has elapsed, the process advances to step S2520, and if it is determined that the flashing switching time has not elapsed, the processing according to this flowchart ends.

At step S2520, the main control board 50 updates the flashing switching flag. Here, the following processing is executed.
(1) Store the address of the flashing switching flag ("F293(H)" in FIG. 35) in the HL register.
(2) Add "1" to the data stored at the address indicated by the HL register value, and store the addition result at the address.
This process executes a cyclic addition process that circulates between "0" and "1" for the flashing switching flag. Therefore, if this process is performed when the flashing switching flag is "1", "0" is stored as the flashing switching flag.
Then, the processing according to this flowchart ends.

FIG. 56 is a flow chart showing the ratio display process (S_LED_OUT) in step S2466 in FIG.
When the ratio display process (S_LED_OUT) is started, the main control board 50 first acquires the value of the LED display counter 2 (_SC_LED_DSP2) (address "F297(H)" in FIG. 35) in step S1471. This process is a process of acquiring the value of the LED display counter 2 (_SC_LED_DSP2) and storing it in the D register.

In the next step S1472, the main control board 50 determines whether or not there is a ratio display request. Here, it is determined whether or not there is a display request for any of the digits 6-9. Specifically, the value of the LED display counter 2 stored in the D register and "00001111 (B)" are ANDed. Then, when the result of the AND operation is "0", it is determined that there is no ratio display request, and the processing according to this flowchart is terminated. On the other hand, when the AND operation result is not "0", it is determined that there is a ratio display request, and the process proceeds to step S1475.
In the third embodiment, the result of the AND operation between the value of the LED display counter 2 and "00001111(B)" never becomes "0", so the result of step S1472 never becomes "No".

In the next step S1475, the ratio display number (address "F292(H)" in FIG. 35) is obtained. This process acquires the ratio display number, stores it in the A register, and further stores the A register value in the E register.
Here, based on the ratio display number, the number of flashing bit inspections, which will be described later, is determined. For example:
Example 1)
Ratio display number is "1": Acquire the number of flashing bit inspections of the instructed accessory ratio.
Example 2)
The ratio display number is "2": The number of blinking bit inspections for the continuous role ratio (6000 times) is acquired.
Example 3)
The ratio display number is "5": Acquires the number of blinking bit inspections for the role product ratio (total cumulative total).
Example 4)
Ratio display number is "6": Acquire the number of blinking bit inspections of the state ratio of accessories, etc.
Also, by executing the process of storing the A register value in the E register, the A register value and the E register value become the same value.

In the next step S2531, the address of the blinking bit inspection frequency table is set. In this process, the HL register stores an address obtained by subtracting "1" from the top address of the blink bit check count table (TBL_FLASH_CHK).
FIG. 57 is a diagram showing a flashing bit check count table (TBL_FLASH_CHK).
As shown in FIG. 57, a predetermined value is stored for each ratio (for example, the value corresponding to the instructed accessory ratio is "8(H)").
And the head address thereof is "2510 (H)". Therefore, "250F(H)" is stored in the HL register.

The "blinking bit inspection count" is a value indicating how many bits ahead from the D0 bit in the blinking request flag of the address "F292(H)" to reach the bit to be inspected.
For example, in FIG. 57, "8 (H)" is stored in the instructed accessory ratio, continuous accessory ratio (total), accessory ratio (total), and accessory state ratio. , is a value for determining whether or not the value of the eighth D7 bit counted from the D0 bit in the flashing request flag is "1". The D7th bit is a flag that becomes "1" when the total number of games has not reached 175000 times, and when the D7th bit is "1", the instructed accessory ratio and the continuous accessory ratio are indicated. (Total), Accessory ratio (Total), and Accessory state ratio identification segs are blinking targets.

Further, in FIG. 57, "7 (H)" is stored in the continuous role ratio (6000 times) and the role ratio (6000 times). This is a value for judging whether or not the value of the seventh D6 bit after counting is "1". The D6th bit is a flag that becomes "1" when the total number of games has not reached 6000 times. The identification seg with the character ratio (6000 times) is to be blinked.

In the next step S2532, the main control board 50 sets the identification segment blinking bit check count. Here, the following processing is executed.
(1) Store the data obtained by adding the A register value to the HL register value in the HL register.
(2) Store the data stored at the address indicated by the HL register value in the B register.
For example, when the A register value (ratio display number stored in step S1475) is "3",
250F(H)+3(H)=2512(H) (=HL register value)
7 (H) (=B register value)
becomes.

In other words, "250F(H)" is the reference address, and the data stored in the ratio display number (address "F292(H)") is used as the offset value to calculate the address of the blinking bit check table and store it at that address. It is possible to acquire the data that is stored.
In the above example, "7 (H)", which is the information for determining whether or not to blink the identification seg at the character ratio (6000 times) stored at the address "2512 (H)", is obtained. be done.

Next, proceeding to step S1476, the main control board 50 sets the identification segment offset table. This process is to store the start address of the identification segment offset table (TBL_SEGID_DATA) in the HL register. The head address is "2520(H)", and "251F(H)" obtained by subtracting "1" from this address is stored in the HL register.

In the next step S1477, the main control board 50 acquires the identification segment offset value. This process is a process of reading from the identification segment offset table using the ratio display number stored in the A register in step S1475 as the offset value.
Specifically, the following processing is executed.
(1) Data obtained by adding the A register value to the HL register value is stored in the HL register.
(2) Store the data stored at the address indicated by the HL register value in the A register.
As a result, for example, when the ratio display number is "1", "2520 (H)" obtained by adding "1 (H)" to "251F (H)" is stored in the HL register and stored at the address. The received data "7A(H)" is stored in the A register. When the ratio display number is "2", "2521(H)" obtained by adding "2(H)" to "251F(H)" is stored in the HL register, and the data stored at that address is is stored in the A register.

In the next step S1478, the main control board 50 determines whether or not there is a request to display the ratio (1000 digits) (request to display digit 6). Here, it is determined whether or not the D0 bit of the value stored in the D register (the value of the LED display counter 2) is "1", and if it is "1", it is determined that there is a display request. If there is a request to display the ratio (1000 digits), the process proceeds to step S1482, and if there is no request to display it, the process proceeds to step S1479.

In step S1479, the main control board 50 determines whether or not there is a request to display the ratio (100 digits) (request to display digit 7). Here, it is determined whether or not the D1 bit of the value stored in the D register (the value of the LED display counter 2) is "1", and if it is "1", it is determined that there is a display request. If there is a request to display the ratio (100 digits), the process proceeds to step S1483, and if there is no request to display it, the process proceeds to step S2533.

In step S2533, the main control board 50 sets the ratio segment blinking bit inspection count. Here, the following processing is executed.
(1) Store the E register value in the A register.
(2) Store the A register value in the B register.
Here, the E register stores the ratio display number obtained in step S1475. Therefore, the same value is stored in the E register, A register, and B register.
The process then proceeds to step S1480. When the process proceeds to step S1480, there is no request to display the ratio (1000 digits) or the ratio (100 digits), that is, when there is no request to display the identification segment (when displaying the ratio segment). Therefore, in step S1480, ratio data is obtained.
At this step S1480, the main control board 50 acquires the numerical value corresponding to the ratio display number stored in the E register. For example, when the E register value is "00000001 (B)" corresponding to the ratio display number "1", the instructed accessory ratio data is acquired.

Acquisition of specific ratio data is as follows.
(1) Store the value ("F287 (H)") obtained by subtracting "1" from the address ("F288 (H)" in FIG. 35) of the RWM 53 where the instructed bonus ratio data is stored in the HL register. do.
(2) Store the data obtained by adding the A register value to the HL register value in the HL register.
(3) Store the data stored at the address indicated by the HL register value in the A register.
That is, with "F287(H)" as the reference address and the ratio display number as the offset value, the RWM address where the ratio data is stored is calculated (specified), and the data stored at the RWM address is transferred to the register (storage area). can be obtained (stored) in

By this process, the A register stores the instructed role ratio data, continuous role ratio data (6000 times), role ratio data (6000 times), continuous role ratio data (cumulative total), and role ratio data (cumulative total). ), and an offset value for displaying the ratio of any of the state ratios of accessories, etc. is stored. This offset value (A register value) is used when acquiring ratio display segment data in step S1484.

Next, proceeding to step S1481, the main control board 50 determines whether or not there is a request to display the ratio (1 digit) (request to display digit 9). This process is to determine whether or not the D3 bit of the value stored in the D register (the value of the LED display counter 2) is "1". If there is a request to display the ratio (1 digit), the process proceeds to step S1483, and if there is no request to display it, the process proceeds to step S1482.
When there is no ratio (1-digit) display request in step S1481, it means that there is a ratio (10-digit) display request.

Through the above processing, when there is a request to display the ratio (1000 digits) or (10 digits), the process proceeds to step S1482, and when there is a request to display the ratio (100 digits) or the ratio (1 digit), the process proceeds to step S1483. .
At step S1482, the main control board 50 sets the upper digit offset. This is because the upper digits of the identification seg or ratio seg are lit when the process proceeds to step S1482. At this point, the A register stores the identified segment offset value (step S1477) or ratio data (step S1480). Here, the following processing is executed.

(1) Replace the lower 4 bits and the upper 4 bits stored in the A register.
For example, if the data before the exchange is "0011/1001 (B)"("/" indicates the boundary between the upper 4 bits and the lower 4 bits), the lower 4 bits and the upper 4 bits are exchanged. and becomes "1001/0011(B)".
(2) An AND operation is performed on the A register value and "00001111(B)", and the operation result is stored in the A register. This process is a process of masking (setting to "0") the upper 4 bits since the lower 4 bits of the A register are used as an offset value.
Of the 1-byte data of the identification segment offset value and the 1-byte data of the offset value for displaying the ratio, the upper 4 bits correspond to the upper digit offset value, and the lower 4 bits correspond to the lower digit offset value. ing. Therefore, by performing the above process, an offset value for obtaining the segment data of the upper digits is generated.

In the next step S1483, the main control board 50 sets the ratio display segment data table. This process is a process of storing the start address of the ratio display segment data table in the HL register. The head address is "2530(H)", and "2530(H)" is stored in the HL register. A description of the specific configuration of the ratio display segment data table will be omitted.

Next, proceeding to step S1484, the main control board 50 acquires segment output data. In this process, the A register value (offset value) is added to the HL register value (head address of the ratio display segment data table), and the data corresponding to the address of the ratio display segment data table after the addition is stored in the E register. processing.
Specifically, for example,
HL register value = 2530 (H) (before addition; start address value of ratio display segment data table)
A register value = 5 (H)
when
HL register value = 2535 (H) (after addition)
E register value = 01101101 (B) ("5" display data)
becomes.

Next, proceeding to step S1485, the main control board 50 determines whether or not the segment P is displayed. In this embodiment, when digits 6 to 9 are displayed, segment P (dot) of digit 7 is always displayed. Therefore, when there is a request to display a ratio (100 digits), it is determined that segment P is to be displayed. . On the other hand, when there is a request to display the ratio (1 digit), the ratio (10 digits), and the ratio (1000 digits), it is determined that the display of the segment P is not requested.

Here, for example, it is determined whether or not the D1 bit of the value stored in the D register is "1". determines that there is no display request for segment P. Specifically, the following processing is executed.
(1) Store "00000010 (B)" in the A register.
(2) An AND operation is performed on the A register value and the D register value (the value of the LED display counter 2 stored in step S1471).
If it is determined that there is a display request for segment P, the process proceeds to step S1486, and if it is determined that there is no display request, the process proceeds to step S2534.

At step S1486, the main control board 50 sets the output data corresponding to the segment P. FIG. Since the segment P corresponds to the D7 bit of the 8-bit data, the segment data (E register value) acquired in step S1484 and "10000000 (B)" are ORed, and the operation result is stored in the E register. Remember.

In the next step S2534, the main control board 50 acquires a flashing request flag. This process is a process of storing the data of the flashing request flag (address "F291(H)" in FIG. 35) in the A register.
Next, proceeding to step S2535, the main control board 50 performs a blinking bit test. This process is a process of shifting the A register to the right by "1" and storing the overflowed result in the carry flag. That is, the value of the D0 bit before the "1" shift is stored in the carry flag. Therefore, if the value of the D0 bit before the "1" shift is "0", the carry flag is set to "0", and if the value of the D0 bit before the "1" shift is "1", the carry flag is set to "1". Become.

In the next step S2536, the main control board 50 determines whether or not the inspection has ended. Here, the following processing is executed.
(1) Subtract "1" from the B register value.
(2) When it is determined that the B register value is "0", it is determined that the inspection is finished.
If it is determined that the inspection has been completed, the process proceeds to step S2537, and if it is determined that the inspection has not been completed, the process returns to step S2535.
By the above processing, the value of the flashing request flag is shifted to the right by the number of times stored in the B register first, and the result of the shift and overflow is stored in the carry flag.

For example, when the value of the blink request flag is "10000000 (B)" (175000 times blink flag of D7th bit is ON) and the B register value is "8 (H)",
First time: "10000000 (B)"→"01000000 (B)", carry flag = "0"
B register value = 8 - 1 = 7 (H)
Second time: "01000000 (B)"→"00100000 (B)", carry flag = "0"
B register value = 7-1 = 6 (H)
Third time: "00100000 (B)"→"00010000 (B)", carry flag = "0"
B register value = 6-1 = 5 (H)
Fourth time: "00010000 (B)"→"00001000 (B)", carry flag = "0"
B register value = 5 - 1 = 4 (H)
Fifth time: "00001000 (B)"→"00000100 (B)", carry flag = "0"
B register value = 4 - 1 = 3 (H)
Sixth time: "00000100 (B)"→"00000010 (B)", carry flag = "0"
B register value = 3-1 = 2 (H)
Seventh time: "00000010 (B)"→"00000001 (B)", carry flag = "0"
B register value = 2-1 = 1 (H)
Eighth time: "00000001 (B)"→"00000000 (B)", carry flag = "1"
B register value = 1 - 1 = 0 (H)
becomes.

At step S2537, the main control board 50 determines whether or not the blinking request flag is on. In this process, it is determined whether or not the carry flag is "1" when it is determined in step S2536 that the inspection has been completed. When it is determined that the flashing request flag is on, the process proceeds to step S2538, and when it is determined that the flashing request flag is not on, the process proceeds to step S1487.

At step S2538, the main control board 50 determines whether or not the flashing switching flag is on. Here, the following processing is executed.
(1) The data of the flashing switching flag (address "F293(H)" in FIG. 35) is stored in the A register.
(2) When the A register value is "0" (second zero flag = "1"), it is determined that the flashing switching flag is not on.
If it is determined that the flashing switching flag is on, the process proceeds to step S2539, and if it is determined that it is not on, the process proceeds to step S1487.
From steps S2537 and S2538,
a) If the flashing request flag is off ("No" in step S2537), the process does not proceed to step S2538, so even if the flashing switching flag is on, the light is not turned off.
b) Even if the flashing request flag is on ("Yes" in step S2537), if the flashing switching flag is off ("No" in step S2538), the light is turned on.
c) If the flashing request flag is on (“Yes” at step S2537) and the flashing switching flag is on (“Yes” at step S2538), the process advances to step S2539 to turn off the light.

At step S2539, the main control board 50 clears the segment data. This process is a process of storing the B register value in the E register.
Here, the B register value is always "0" when it is determined that the inspection has ended in step S2536. Therefore, this process is a process of setting "0" to the E register. That is, when the blink request flag is on (“1”) and the blink switching flag is on (“1”, i.e., extinguished), the interrupt process extinguishes the display to be illuminated. In order to set the data (E register value) to "00000000 (B)", the process of step S2539 is executed. Then, the process proceeds to step S1487.

In step S1487, the main control board 50 outputs the segment signal from the output port 7 and the digit signal from the output port 6 in order to output the digit signal and the segment signal. Here, the following processing is executed.
(1) Swap the DE and HL register values.
Here, a digit signal is stored in the D register. A segment signal is stored in the E register. and,
exchange the data stored in the D register with the data stored in the H register,
The data stored in the E register and the data stored in the L register are exchanged.
This will
A digit signal is stored in the H register,
A segment signal is stored in the L register.
(2) output the L register value to output port 7 and the H register value to output port 6;
This completes the processing according to this flowchart.

Next, the operation when the reset switch (RWM clear switch) 153 in the third embodiment is operated will be described.
When the advantageous section display LED 77 is lit and medals can be betted, and a recoverable error state occurs (for example, medal selector error ("CE" error), etc.), the reset switch ( Assume that the RWM clear switch 153 is operated to cancel the recoverable error state.
In this case, as described above, even if the recoverable error state is canceled, the data in the use area of the RWM 53 and outside the use area are maintained without being initialized, so the data regarding the advantageous section is also maintained without being initialized. Therefore, the advantageous section display LED 77 is also kept lit.
It should be noted that, when recovering from a recoverable error state, data related to errors such as an error detection flag stored at a predetermined address in the RWM 53 may be initialized.

On the other hand, when the advantageous section display LED 77 is lit and medals can be bet, and a recoverable error state occurs, the power is turned off, and then the setting key switch 152 is turned off. , and the reset switch (RWM clear switch) 153 is on (operated), the power is turned on.
In this case, when the power is turned on under the condition that the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on, at step S2707 of the program start processing (M_PRG_START) in FIG. "No", "Yes" in step S2710, and the process advances to step S2713 to set the initialization range of the RWM 53 at the start of the setting change when the power is restored normally.

Also, since the setting change disabled flag is off because medals can be betted, the result is "Yes" in step S2714, and the process proceeds to the initialization process (M_INI_SET) in step S2731. Then, in steps S2732 to S2736 of the initialization process (M_INI_SET) in FIG. 44, addresses "F001(H)" to "F1FF(H)" of the use area of the RWM 53 and address "F292(H)" outside the use area ~ "F3FF (H)" initialization processing is executed. Therefore, since the data regarding the advantageous interval is initialized, the advantageous interval display LED 77 is extinguished. However, since the set value data (_NB_RANK) of the address "F000(H)" is maintained without being initialized, the set value is not changed. Further, since it is reset time, the result is "Yes" in step S2741 of FIG. 44, and the setting change confirmation process (M_RANK_CTL) in step S2742 is skipped. After that, the process proceeds to the main process (M_MAIN) (FIG. 46) of step S248, and returns to the state where medals can be betted.

In this way, when the advantageous section display LED 77 is lit and medals can be bet, and a recoverable error state occurs, if the reset switch 153 is operated to cancel the recoverable error state, It is possible to maintain the game in the advantageous section.
On the other hand, when the advantageous section display LED 77 is lit and medals can be betted, and a recoverable error state occurs, the power is turned off once, and then the reset switch 153 is turned on. When the power is turned on in , the recoverable error state can be canceled and the game can be restarted from the normal section instead of the advantageous section.
As a result, it is possible for the administrator (hall clerk) to select whether to maintain the game in the advantageous section or restart the game from the normal section.

Also, for example, assume that the player stops playing the game during the game in the advantageous section (halfway through the game in the advantageous section). In such a case, if the next player starts the game in the middle of the game in the advantageous section, the player becomes too advantageous.
On the other hand, it is not preferable to change the settings during the operation of the hall, as it may arouse the gambling spirit of the players.
In addition, if the operation of the game machine is stopped by turning off the power supply of the game machine during the operation of the hall, the operation rate of the game machine will decrease, which is not preferable in terms of the management of the hall.
Therefore, when the advantageous section display LED 77 is lit and medals can be betted, the power is turned off once, and then the power is turned on while the reset switch 153 is turned on. As a result, the game can be resumed from the normal section without changing the settings.

Also, in a situation where medals can be betted, the power is turned off, and then the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off (not operated). , is turned on.
In this case, it is possible to shift to a setting change state (setting change mode, during setting change), after which the start switch 41 is operated, the setting key switch 152 is turned off, and when the setting change state ends, medals can be betted. back to a normal situation.

Specifically, in a situation where medals can be bet, the power is turned off, then the setting key switch 152 is turned on, and the reset switch (RWM clear switch) 153 is turned off (not operated). Under these circumstances, when the power is turned on, "Yes" is determined in step S2707 of the program start processing (M_PRG_START) in FIG. 41, and the process proceeds to step S2711. Also, since the power failure recovery is not abnormal, the result is "No" in step S2712, and the flow advances to step S2713 to set the initialization range of the RWM 53 at the start of the setting change when the power failure recovery is normal. Furthermore, since it is possible to bet medals, the setting change disabled flag is off, so the result is "Yes" in step S2714, and the process proceeds to initialization processing (M_INI_SET) in step S2731.

Furthermore, since it is not reset time, the result is "No" in step S2741 of the initialization process (M_INI_SET) of FIG. Then, since it is not the time to start checking the setting, the processing of steps S2752 to S2758 is repeated until "No" is obtained in step S2755 of the setting change confirmation processing (M_RANK_CTL) of FIG. 45 and "Yes" is obtained in step S2756. In other words, the setting change state is entered. Thereafter, when the start switch 41 is operated, "Yes" is determined in step S2756, and when the setting key switch 152 is turned off, "Yes" is determined in step S2760, and the setting change state ends. Then, through the processing of steps S2743 to S2747 of FIG. 44, the process proceeds to the main processing (M_MAIN) of step S248 (FIG. 46), returning to the state where medals can be betted.

Further, as described above, in the main process (M_MAIN) (FIG. 46), the start switch acceptance process (step S279 in FIG. 46) to the game end check process (step S301 in FIG. 46), including during rotation of the reel 31, During this period, the setting change is disabled, and the setting change disabled flag is turned on.
The power is turned off when the setting change disable flag is on, and then the power is turned on under the condition that the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off. 41, the process does not go to the initialization process (M_INI_SET) of step S2731, and therefore does not go to the setting change state.

On the other hand, when medals can be betted, the setting change disabled flag is off, so the power is turned off, and then the setting key switch 152 is on and the reset switch is turned on. When the (RWM clear switch) 153 is turned off and the power is turned on, the result of step S2714 in FIG. can be moved to

Also, as described above, when an operation is performed to shift to the setting change state when the power is restored normally, the flow advances to step S2713 in FIG. ” to “F1FF(H)” and addresses “F292(H)” to “F3FF(H)” outside the use area are set. Further, the initialization range of the use area of the RWM 53 includes credit amount data (_NB_CREDIT) at address "F010(H)" and bet amount data (_NB_PLAY_MEDAL) at address "F043(H)".

Therefore, when medals can be bet, the number of bets is one of "1" to "3", and the number of credits is one of "1" to "50", the power is turned off. After that, when the power is turned on under the condition that the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off, the setting change state is entered. is finished and medals can be betted, the number of bets becomes "0" and the number of credits becomes "0".

Also, in a situation where medals can be bet, the number of bets is any one of "1" to "3", and the number of credits is "0", the power is turned off, and then the setting key switch 152 is turned off. is on and the reset switch (RWM clear switch) 153 is off, the power is turned on, and when the setting change state is entered, the setting change state ends and medals can be bet. In such a situation, the number of bets becomes "0" and the number of credits also becomes "0".

Furthermore, when medals can be betted, the bet number is "0", and the credit number is one of "1" to "50", the power is turned off, and then the setting key switch is turned off. 152 is on and the reset switch (RWM clear switch) 153 is off, when the power is turned on and the setting change state is entered, the setting change state ends and medals are bet. When the situation becomes possible, the number of bets becomes "0" and the number of credits also becomes "0".

Furthermore, when medals can be bet, the bet amount is "0", and the credit amount is "0", the power is turned off, and then the setting key switch 152 is turned on and reset. When the switch (RWM clear switch) 153 is turned off and the power is turned on and the setting change state is entered, when the setting change state ends and medals can be bet , the number of bets is "0" and the number of credits is also "0".

Also, in a situation where medals can be bet, the power is turned off, then the setting key switch 152 is turned off, and the reset switch (RWM clear switch) 153 is turned on (operated). , is turned on. In this case, it becomes possible to execute the initialization processing of the predetermined storage area of the RWM 53, and after executing the initialization processing, it becomes possible to bet medals without shifting to the setting change state.

Specifically, the power is turned off under the condition that medals can be bet, and then the power is turned off under the condition that the setting key switch 152 is turned off and the reset switch (RWM clear switch) 153 is turned on. When it is turned on, "No" is obtained in step S2707 of the program start processing (M_PRG_START) of FIG. The RWM 53 initialization range is set. Also, since the setting change disabled flag is off because medals can be betted, the result is "Yes" in step S2714, and the process proceeds to the initialization process (M_INI_SET) in step S2731.

Then, in steps S2732 to S2736 of the initialization process (M_INI_SET) in FIG. 44, addresses "F001(H)" to "F1FF(H)" of the use area of the RWM 53 and address "F292(H)" outside the use area ~ "F3FF (H)" initialization processing is executed.
Also, since it is reset time, "Yes" is given in step S2741 of the initialization processing (M_INI_SET) of FIG. Therefore, it does not move to the setting change state. After that, through the processing of steps S2744 to S2747, the process proceeds to the main processing (M_MAIN) (FIG. 46) of step S248, and returns to the state in which medals can be betted.

Also, the power is turned off when the setting change prohibition flag is on, and then the power is turned on under the condition that the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on. Then, since the result in step S2714 of FIG. 41 is "No", the initialization process (M_INI_SET) in step S2731 is not performed.

On the other hand, in a situation where medals can be betted, the setting change disabled flag is off. Under such a situation, the power is turned off, then the setting key switch 152 is off and the reset switch When the power is turned on under the condition that the RWM clear switch 153 is on, the result of step S2714 in FIG. Processing is performed.

Also, the power is turned off under the condition that medals can be bet, and then the power is turned on under the condition that the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on. Then, in step S2713 of FIG. 41, as the initialization range of the RWM 53, the used area addresses "F001(H)" to "F1FF(H)" and the addresses outside the used area "F292(H)" to "F3FF (H)" is set. This initialization range is the same as the initialization range that is set when an operation is performed to shift to the setting change state when power is restored normally.

That is, under the condition that the power failure recovery is normal (not the power failure recovery failure), the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off. When the power is turned on and when the power is turned on under the condition that the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on, the RWM 53 is in the same range. Initialization processing is executed.

As described above, in this embodiment, even if the setting key switch 152 is not operated, and therefore, even if the setting key is not in possession, the same range as when the operation for shifting to the setting change state is performed is performed. , RWM 53 can be initialized.
Further, in the present embodiment, the initialization process of the RWM 53 can be executed in the same range as when shifting to the setting change state without shifting to the setting change state.

Therefore, when medals can be bet, the number of bets is one of "1" to "3", and the number of credits is one of "1" to "50", the power is turned off. After that, when the power is turned on under the condition that the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on, the RWM 53 is initialized. , when it becomes possible to bet medals, the number of bets becomes "0" and the number of credits also becomes "0".

Also, in a situation where medals can be bet, the number of bets is any one of "1" to "3", and the number of credits is "0", the power is turned off, and then the setting key switch 152 is turned off. is off and the reset switch (RWM clear switch) 153 is on, even if the power is turned on, the initialization process of the RWM 53 is executed, and then medals can be betted. When it becomes, the bet amount becomes "0" and the credit amount also becomes "0".

Furthermore, when medals can be betted, the bet number is "0", and the credit number is one of "1" to "50", the power is turned off, and then the setting key switch is turned off. 152 is off and the reset switch (RWM clear switch) 153 is on, even if the power is turned on, the initialization process of the RWM 53 is executed, and then medals can be bet. When , the bet amount becomes "0" and the credit amount also becomes "0".

Furthermore, when medals can be betted, the number of bets is "0", and the number of credits is "0", the power is turned off, and then the setting key switch 152 is turned off and reset. Even when the power is turned on while the switch (RWM clear switch) 153 is on, the initialization process of the RWM 53 is executed. becomes "0", and the number of credits also becomes "0".

Also, the power is turned off under the condition that medals can be bet, and then the power is turned on under the condition that the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is on. Suppose That is, it is assumed that the power is turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are on. In this case, it becomes possible to shift to the setting change state, and after that, the start switch 41 is operated, the setting key switch 152 is turned off, and when the setting change state ends, the state returns to the state in which medals can be bet.

As shown in FIG. 41, in the program start process (M_PRG_START), it is determined in step S2707 whether or not the setting key switch signal is on, and then in step S2710 it is determined whether or not the reset switch signal is on. That is, first, it is determined whether or not the setting key switch signal is on, and then it is determined whether or not the reset switch signal is on.
Therefore, when the power is turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are on, the result is "Yes" in step S2707, and the process does not proceed to step S2710. That is, when the power is turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are on, the setting key switch 152 has priority. When the process proceeds to the initialization process (M_INI_SET) in FIG. 44, "No" is determined in step S2741, and the process proceeds to the setting change confirmation process (M_RANK_CTL) in step S2742, so that the setting change state can be entered.

It is also assumed that the set value display LED 73 first displays the set value "M" (for example, "2") when the setting change state is entered. At this time, the value of the set value data (_NB_RANK) at the address "F000 (H)" of the RWM 53 is "M-1", and the value of the set value display data (_NB_RANK_DSP) at "F001 (H)" is "M". is.
After that, it is assumed that the setting change switch 153 is operated and the set value "N" (for example, "3") is displayed on the set value display LED 73 . At this time, the value of the set value data (_NB_RANK) at the address "F000 (H)" of the RWM 53 remains "M-1", and the value of the set value display data (_NB_RANK_DSP) at "F001 (H)" is " N”.

Furthermore, it is assumed that the power is turned off without the start switch 41 being operated while the set value display LED 73 is displaying the set value "N". In this case, since the start switch 41 is not operated, the set value data after change is not saved (stored) in the address "F000 (H)" of the RWM 53, so the value of "F000 (H)" is "M -1" is maintained. Also, since the start switch 41 is not operated and the setting key switch 152 is not turned off, the power is turned off without ending the setting change state (while the setting change state remains).

After that, assume that the power is turned on while the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is off. In this case, the power is only turned on/off, and the data in the use area and outside the use area of the RWM 53 are maintained without being initialized. return to state. Also, "M-1" is stored in the set value data (_NB_RANK) of the address "F000 (H)" of the RWM 53, and "N" is stored in the set value display data (_NB_RANK_DSP) of "F001 (H)". Therefore, when the setting change state is restored, the set value display LED 73 displays the set value "N".

On the other hand, it is assumed that the set value display LED 73 first displays the set value "M" (for example, "2") when the setting change state is entered. After that, it is assumed that the setting change switch 153 is operated and the set value "N" (for example, "3") is displayed on the set value display LED 73 . Furthermore, it is assumed that the power is turned off without the start switch 41 being operated while the set value display LED 73 is displaying the set value "N". Up to this point, the process is the same as the above case. Next, assume that the power is turned on while the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on.

In this case, step S2707 of the program start processing (M_PRG_START) in FIG. 41 is "No", and step S2710 is "Yes". the scope is set. Then, in steps S2732 to S2736 of the initialization process (M_INI_SET) in FIG. ~ "F3FF (H)" initialization processing is executed. Therefore, the value of the set value data (_NB_RANK) of the address "F000(H)" of the RWM 53 remains "M-1".
Also, since it is reset time, "Yes" is given in step S2741 of the initialization processing (M_INI_SET) of FIG. Therefore, it does not move to the setting change state. After that, through the processing of steps S2744 to S2747, the process proceeds to the main processing (M_MAIN) (FIG. 46) of step S248, and a medal can be betted. At this time, the value of the set value data (_NB_RANK) of the address "F000(H)" of the RWM 53 is maintained as "M-1", so the set value becomes "M".

Also assume that the power is turned off in an unrecoverable error state, and then turned on while the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on.
In this case, in an unrecoverable error state, interrupt processing (I_INTR) is not executed, and therefore power-off processing (I_POWER_DOWN) is not executed. No data is saved.

Since the setting key switch 152 is turned off and the power is turned on, "No" is obtained in step S2707 of the program start processing (M_PRG_START) in FIG. 41, and the process proceeds to step S2708. Further, since the power-off processing completion flag is not set and the RWM checksum data is not saved, the result is "Yes" in step S2708, and the process advances to unrecoverable error processing (C_ERROR_STOP) in step S2801.
That is, when the power is turned off in an unrecoverable error state and then turned on under the condition that the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on, , it becomes an unrecoverable error state.

Although the power is turned on under the condition that the reset switch (RWM clear switch) 153 is turned on, the program start processing (M_PRG_START) in FIG. 41 does not proceed to step S2710. ) is never executed, nor is the initialization process (M_INI_SET) executed.
Also, during execution of processing by the second program, interrupt processing (I_INTR) is not executed and power-off processing (I_POWER_DOWN) is not executed. When the power is turned on, the power-off processing completion flag is not set, and the RWM checksum data is not saved. ). That is, an unrecoverable error state occurs.

Also, while the non-recoverable error process 2 (S_ERROR_STOP) is being executed by the program (second program) outside the usage area, the power is turned off, then the setting key switch 152 is off and the reset switch (RWM clear When the power is turned on under the condition that the switch 153 is on, the program start processing (M_PRG_START) in FIG. Therefore, the non-recoverable error process (C_ERROR_STOP) is executed by the program in the used area (first program).

Similarly, during execution of unrecoverable error processing (C_ERROR_STOP) by the program in the usage area (first program), the power is turned off, and then the setting key switch 152 is off and the reset switch (RWM clear switch ) 153 is on, even if the power is turned on, "No" is obtained in step S2707 of the program start processing (M_PRG_START) in FIG. Therefore, unrecoverable error processing (C_ERROR_STOP) is executed by the program (first program) of the used area.

Also, assume that the power is turned off in an unrecoverable error state and then turned on while the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off.
In this case, step S2707 of the program start processing (M_PRG_START) in FIG. 41 becomes "Yes", and the process advances to step S2711 to set the initialization range of the RWM 53 at the time of setting change start at power failure recovery failure. Also, since it is a power-off recovery abnormality, "Yes" is determined in step S2712, and the process proceeds to initialization processing (M_INI_SET) in step S2731. Then, in steps S2732-S2736 of the initialization process (M_INI_SET) in FIG. And the entire range outside the use area (addresses "F210 (H)" to "F3FF (H)" is initialized. Therefore, the set value data (_NB_RANK) of the address "F000 (H)" of the RWM 53 becomes "0", the set value becomes "1".

Also, since it is not reset time, "No" is obtained in step S2741 of the initialization processing (M_INI_SET) of FIG.
In this setting change state, it is assumed that the power is turned off without operating the setting change switch (reset switch/RWM clear switch) 153 . In this case, since interrupt processing (I_INTR) is executed in the setting change state, power-off processing (I_POWER_DOWN) is executed.
After that, assume that the power is turned on while the reset switch (RWM clear switch) 153 is on. In this case, since it is not a power-off/recovery abnormality, step S2708 of the program start processing (M_PRG_START) in FIG. 41 is "No". Also, since the reset switch (RWM clear switch) 153 is on, the result is "Yes" in step S2710. Then, the flow advances to step S2713 to set the initialization range of the RWM 53 at the start of the setting change when the power is restored normally.

Also, since the setting change disable flag is off, "Yes" is obtained in step S2714 of the program start processing (M_PRG_START) in FIG. 41, and the process proceeds to initialization processing (M_INI_SET) in step S2731. Furthermore, since it is reset time, "Yes" is obtained in step S2741 of the initialization processing (M_INI_SET) of FIG. 44, and the setting change confirmation processing (M_RANK_CTL) of step S2742 is skipped. Therefore, this time, it does not move to the setting change state. After that, through the processing of steps S2744 to S2747, the process proceeds to the main processing (M_MAIN) (FIG. 46) of step S248, and a medal can be betted. At this time, since the setting value data (_NB_RANK) of the address "F000(H)" of the RWM 53 is "0" as described above, the setting value becomes "1".

Also, in this embodiment, power-off processing (I_POWER_DOWN) is executed in step S2771 of the interrupt processing (I_INTR) in FIG. Furthermore, in step S2776 of the power-off process (I_POWER_DOWN) in FIG. 48, the RWM checksum set process (S_SUM_SET) is executed. Then, in the RWM checksum set processing (S_SUM_SET) of FIG. 49, the processing of steps S2785 to S2794 is executed to calculate the RWM checksum data (complement data), and the calculated RWM checksum data is transferred to the It is stored in the address "F2A0(H)" of the RWM 53 by processing.

As described above, this RWM checksum data consists of data at addresses "F000(H)" to "F1FF(H)" in the use area of the RWM 53 and data at addresses "F210(H)" to "F3FF(H)" outside the use area. H)” (excluding “F2A0(H)”) is a value that becomes “0” when added to the added value of the data.

In addition, in this embodiment, even if a recoverable error occurs and the recoverable error state (the error detection flag is turned on and the progress of the game is stopped), the interrupt processing (I_INTR ) can be executed. Therefore, even if an event occurs in which the supply of power is interrupted (the power is turned off) in a recoverable error state, power-off processing (I_POWER_DOWN) can be executed.
On the other hand, an unrecoverable error occurs, an unrecoverable error state (unrecoverable error processing (C_ERROR_STOP) in FIG. 43 or unrecoverable error processing 2 (S_ERROR_STOP) in FIG. 51 is executed, and the game progresses). In this state, interrupt processing (I_INTR) is prohibited as described above. Therefore, if an event occurs in which the power supply is interrupted (the power is turned off) in an unrecoverable error state, the power-off process (I_POWER_DOWN) is not executed.

In this way, when the power is turned off in an unrecoverable error state, by not executing the power-off processing (I_POWER_DOWN), when the power is turned on after that, the program start processing ( M_PRG_START), it can be determined in step S2708 that there is an abnormality in recovery from power failure, and the process proceeds to unrecoverable error processing (C_ERROR_STOP) in step S2801.
That is, when an unrecoverable error state occurs, the unrecoverable error state occurs again simply by turning on/off the power supply.
When an unrecoverable error state occurs, the power must be turned off once and an operation (turning on the power while the setting key switch 152 is turned on) to shift to the setting change state is performed. It is possible to make it impossible to return to a state in which medals can be betted (a state in which the game can proceed).

When an unrecoverable error state occurs, even if the power is turned off with the reset switch (RWM clear switch) 153 turned on, the program start processing (M_PRG_START) in FIG. In step S2708, it is determined that there is a power failure recovery abnormality, and the process proceeds to the unrecoverable error process (C_ERROR_STOP) in step S2801, so the main process (M_MAIN) (Fig. 46) is not performed. It cannot be returned to (a state in which the game can be progressed).

Also, even if a recoverable error occurs and a recoverable error state (the error detection flag is turned on and the progress of the game has stopped), interrupt processing (I_INTR) can be executed, but recovery is not possible. When a possible error occurs and it becomes an unrecoverable error state (the unrecoverable error process (C_ERROR_STOP) in FIG. 43 or the unrecoverable error process 2 (S_ERROR_STOP) in FIG. 51 is executed and the progress of the game is stopped) , interrupt processing (I_INTR) is disabled.
Furthermore, LED display control (I_LED_OUT) for controlling lighting of digits 1 to 5 (credit number display LED 76, acquired number display LED 78, set value display LED 73) and lighting of digits 6 to 9 (management information display LED 74) are controlled. The ratio display preparation process (S_DSP_READY) is executed in the interrupt process (I_INTR).

Therefore, in a recoverable error state, interrupt processing (I_INTR) can be executed, so LED display control (I_LED_OUT) and ratio display preparation processing (S_DSP_READY) can also be executed. Therefore, even in the recoverable error state, error information is displayed on the acquisition number display LED 78 (digits 3 and 4) by LED display control (I_LED_OUT), and management information is displayed by ratio display preparation processing (S_DSP_READY). The LED 74 (digits 6 to 9) can sequentially display information types and various ratios related to game results.

On the other hand, in an unrecoverable error state, interrupt processing (I_INTR) is prohibited, so neither LED display control (I_LED_OUT) nor ratio display preparation processing (S_DSP_READY) is executed.
Therefore, during the unrecoverable error state, the above-described unrecoverable error processing (C_ERROR_STOP) in FIG. 43 or unrecoverable error processing 2 (S_ERROR_STOP) in FIG. Display error information.

Also, in step S1494 of the unrecoverable error process (C_ERROR_STOP) in FIG. 43 or the unrecoverable error process 2 (S_ERROR_STOP) in FIG. .
As a result, during an unrecoverable error state, the output from output port 6 (output port for digits 6 to 9 signals) and output port 7 (output port for segment signals for digits 6 to 9) is "00000000 (B)". , all digits 6 to 9 of the management information display LED 74 remain extinguished until the unrecoverable error state is canceled and the interrupt process (I_INTR) is restarted.
The fact that digits 6 to 9 of the management information display LED 74 all remain unlit is a feature specific to the unrecoverable error state. You can let us know what happened.

Although the third embodiment of the present invention has been described above, the present invention is not limited to the contents described above, and various modifications such as those described below are possible.
(1) In the above embodiment, during an unrecoverable error state, the outputs of output port 6 (digit 6-9 signal output port) and output port 7 (segment signal output port for digits 6-9) are turned off. By setting it to (“00000000(B)”), all the digits 6 to 9 of the management information display LED 74 remain off.
However, the display mode of the digits 6 to 9 of the management information display LED 74 in the unrecoverable error state is not limited to this.

For example, digits 6 to 9 of the management information display LED 74 may each display "8" during an unrecoverable error state. That is, the display of the management information display LED 74 may be set to "8888".
FIG. 58 is a flowchart showing a modification of the unrecoverable error process 2 (S_ERROR_STOP), and corresponds to FIG.
58, step numbers different from those in FIG. 51 are underlined, and steps identical to those in FIG. 51 are assigned the same step numbers.
Differences from FIG. 51 will be mainly described below.

In the unrecoverable error process 2 (S_ERROR_STOP) shown in FIG. 58, step S1505 is followed by step S1506. Output.
Specifically, output port 6 outputs "00000001 (B)" (data in which only digit 6 signal is "1"), and output port 7 outputs "01111111 (B)" (segment 2A to 2G signals is "1").

Next, proceeding to step S1507, the main control board 50 executes standby (wait) processing for preventing flickering of the LED. How long to wait depends on the performance of the LED, but can be set to about "0.1 ms", for example. For example, a predetermined value (for example, "255") is stored in the B register, and this value is subtracted by the internal system clock. The process advances to step S1508.

In step S1508, the main control board 50 turns off the outputs of the output ports 6 and 7 (“00000000 (B)”). This process is for preventing afterimages.
Next, proceeding to step S1509, the main control board 50 executes standby (wait) processing for preventing flickering of the LED. This process is for ensuring that the LEDs are extinguished after the outputs of the output ports 6 and 7 are turned off.

Proceeding to the next step S1510, the main control board 50 outputs data for displaying "8" in the digit 7 from the output ports 6 and 7. FIG.
Specifically, output port 6 outputs "00000010 (B)" (data in which only digit 7 signal is "1"), and output port 7 outputs "01111111 (B)" (segment 2A to 2G signals is "1").
Steps S1511 to S1513 are the same as steps S1507 to S1509.

Proceeding to step S1514, the main control board 50 outputs data for displaying "8" as the digit 8 from the output ports 6 and 7. FIG.
Specifically, output port 6 outputs "00000100 (B)" (data in which only digit 8 signal is "1"), and output port 7 outputs "01111111 (B)" (segment 2A to 2G signals is "1").
Steps S1515-S1517 are the same as steps S1507-S1509.

Proceeding to step S1518, the main control board 50 outputs data for displaying "8" in the digit 9 from the output ports 6 and 7. FIG.
Specifically, output port 6 outputs "00001000 (B)" (data in which only digit 9 signal is "1"), and output port 7 outputs "01111111 (B)" (segment 2A to 2G signals is "1").
Steps S1519 to S1521 are the same as steps S1507 to S1509. After executing the process of step S1521, the process returns to step S1497.

In this manner, digits 6 to 9 of the management information display LED 74 may each display "8" during an unrecoverable error state.
The display of digits 6 to 9 of the management information display LED 74 all being "8" is a feature specific to an unrecoverable error state. It is possible to notify that an error state has occurred.

The display of the management information display LED 74 may be "----" instead of "8888". That is, only segments G of digits 6 to 9 may be illuminated.
Also, the display of the management information display LED 74 may be "...". That is, only segments P of digits 6 to 9 may be illuminated.
Furthermore, the display of the management information display LED 74 may be "8.8.8.8.". That is, as shown in FIG. 30(a) or (c), all segments of digits 6 to 9 (segments A to G and P) may be illuminated.

(2) In the above embodiment, during an unrecoverable error state, the outputs of output port 6 (digit 6-9 signal output port) and output port 7 (segment signal output port for digits 6-9) are turned off. By setting it to (“00000000(B)”), all the digits 6 to 9 of the management information display LED 74 remain off.
However, in step S1494 of unrecoverable error processing (C_ERROR_STOP) in FIG. 43 or unrecoverable error processing 2 (S_ERROR_STOP) in FIG. may be maintained instead of In this case, the display of digits 6 to 9 of the management information display LED 74 is as follows.

As described above, the digits 6 to 9 of the management information display LED 74 are dynamically lit with four interrupts as one cycle. Therefore, for example, when "7P.65" is displayed in digits 6 to 9 of the management information display LED 74, digit 9 "5", digit 8 "6", digit 7 "P." The "7" of the digit 6 are illuminated sequentially. Assume, for example, that digits 6 to 8 of the management information display LED 74 are extinguished and digit 9 is illuminated with "5", and an unrecoverable error state occurs. In this case, the interrupt processing (I_INTR) stops while the signal (digit signal and segment signal) that causes digits 6 to 8 to turn off and digit 9 to light up and display "5" is output from output ports 6 and 7. do.

Specifically, output port 6 outputs "00001000 (B)" (digit 9 signal is "1" and others are "0"), and output port 7 outputs "01101101 (B)" (segment 2G, 2F, 2D, 2C, and 2A signals are "1" and the others are "0" data), interrupt processing (I_INTR) is stopped, and then output from output ports 6 and 7 The signal (data) to be rewritten is not performed.
Therefore, the output of the signals (digit signal and segment signal) from the output ports 6 and 7 is maintained until the unrecoverable error state is canceled and the interrupt processing (I_INTR) is restarted. remains unlit, and digit 9 remains illuminated with "5".

Similarly, for example, assume that digit 6 of the management information display LED 74 is illuminated with "7" and digits 7 to 9 are extinguished, and an unrecoverable error state occurs.
In this case, until the unrecoverable error state is canceled and the interrupt processing (I_INTR) is restarted, the signal (digit signal and segment signal) that causes digit 6 to display "7" and digits 7 to 9 to go out. Since the state of output from the output ports 6 and 7 continues, the digit 6 is illuminated with "7" and the digits 7 to 9 remain extinguished.

Further, for example, assume that the non-recoverable error process 2 is executed by the second program under the condition that the digit 6 of the management information display LED 74 is lit and the digits 7 to 9 are not lit. Assume that the outputs of the output ports 6 and 7 are maintained without being turned off in the unrecoverable error process 2 by the second program. In this case, as described above, the state in which the signal (digit signal and segment signal) causing the digit 6 to light up and the digits 7 to 9 to go out (the digit signal and the segment signal) continues to be output from the output ports 6 and 7. Digit 6 is illuminated with "7", and digits 7-9 remain unlit.

When the power is turned off in this state, the digits 6 to 9 of the management information display LED 74 are extinguished. After that, when the power is turned on with the setting key switch 152 turned off, "Yes" is given in step S2708 of the program start processing (M_PRG_START) in FIG. Processing is performed. In this case, the data in the RWM 53 are maintained without being initialized, since the process does not proceed to the initialization process of step S2731. For this reason, data related to lighting control of the management information display LED 74 (role ratio monitor) in the RWM 53 (for example, ratio display number (_SN_DSP_NO) of address “F292 (H)” to LED display counter 2 (_SC_LED_DSP2) of “F297 (H)” etc.) are also maintained without being initialized.

Here, it is assumed that interrupt processing (I_INTR) is made executable without being prohibited in the unrecoverable error processing by the first program. In this case, lighting control of the management information display LED 74 is performed by the ratio display preparation processing (S_DSP_READY) in the interrupt processing (I_INTR). The ratio information immediately before the possible error process 2 is executed, that is, "7P.65" (instruction-containing accessory ratio, ratio display number "1") is displayed.

Further, it is assumed that "7P.65" was displayed, for example, for "2000 ms" in digits 6 to 9 of the management information display LED 74 immediately before the unrecoverable error process 2 by the second program was executed. In this case, when the ratio display preparation process (S_DSP_READY) is resumed in the non-recoverable error process by the first program, the digits 6 to 9 of the management information display LED 74 show "7P.65" and "4791.84ms". - "2000ms" = displayed for "2791.84ms". After that, the display items after the ratio display number "2" are sequentially displayed on the management information display LED 74 by the ratio display preparation process (S_DSP_READY).

In this way, when the ratio display preparation process (S_DSP_READY) is resumed in the unrecoverable error process by the first program, the display continues from the ratio information immediately before the unrecoverable error process 2 by the second program is executed. is started (restarted).
On the other hand, if the interrupt processing (I_INTR) is prohibited in the unrecoverable error processing by the first program, the ratio display preparation processing (S_DSP_READY) in the interrupt processing (I_INTR) is not executed either. to 9 remain unlit.

In addition, as described above, regarding the instructed accessory ratio, the continuous accessory ratio (cumulative), the accessory ratio (cumulative), and the accessory state ratio, when the total number of games played is less than “175000”, the Blinks the identification segment. With respect to the continuous role ratio (6000 times) and the role ratio (6000 times), when the total number of games played is less than "6000", the identification seg is blinked. In addition, when the displayed value of the instructed role product ratio, the role product ratio (accumulated), and the role product ratio (6000 times) is "70" or more, the ratio segment is displayed blinking. When the displayed value of the continuous role product ratio (accumulated) and the continuous role product ratio (6000 times) is "60" or more, the ratio segment is displayed blinking. When the displayed value of the state ratio of the role product is "50" or more, the ratio seg blinks. In addition, when the blinking display is performed, lighting and extinguishing are repeated every about 0.3 seconds.

Therefore, digits 6 to 9 of the management information display LED 74 may all go out. For example, under the condition that digits 6 to 9 of the management information display LED 74 are all extinguished, that is, when the output from the output ports 6 and 7 is "00000000 (B)" (off), recovery is impossible. Assume that an error has occurred.
In this case, the outputs from the output ports 6 and 7 are maintained as "00000000 (B)" (off) until the unrecoverable error state is canceled and the interrupt processing (I_INTR) is restarted. All digits 6 to 9 of the display LED 74 remain off.

The display mode of the digits 6 to 9 of the management information display LED 74 as described above is a display mode peculiar to the non-recoverable error state. It is possible to notify that a possible error state has occurred.

(3) In the above embodiment, the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off on condition that the power failure recovery is normal (not the power failure recovery failure). When the power is turned on (to shift to the setting change state), the setting key switch 152 is off, and the reset switch (RWM clear switch) 153 is on. The initialization process of the RWM 53 was executed in the same range as when it was turned on.

However, the present invention is not limited to this, and when the power is turned on (when transitioning to the setting change state) in a situation where the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off. , the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on.
For example, when the setting key switch 152 is off and the reset switch (RWM clear switch) 153 is on, when the power is turned on, the RWM 53 is initialized in the same range as when the advantageous section ends. conversion processing may be performed.
Specifically, a predetermined range (for example, addresses “F061(H)” to “F068(H)” in FIG. 33) of the use area of the RWM 53 storing data relating to the advantageous section is initialized. Other ranges (for example, credit amount data (_NB_CREDIT) at address "F010(H)" in FIG. 33, bet amount data (_NB_PLAY_MEDAL) at "F043(H)", etc.) can be maintained without being initialized. .
In any case, the initialization range when the reset switch (RWM clear switch) 153 is on and the power is turned on is set to be narrower than the initialization range when shifting to the setting change state. is preferred.

(4) In the above embodiment, it is determined in step S458 of the interrupt processing (I_INTR) in FIG. 47 whether or not the set value is within the normal range. Go to 2 (S_ERROR_STOP). However, it is not limited to this.
For example, it may be determined whether or not the set value is within the normal range immediately after determining that the start switch 41 is turned on (operated) in the main process (M_MAIN) (FIG. 46).

(5) In the above embodiment, when the power is turned off while staying in the setting change state and then turned on while the reset switch (RWM clear switch) 153 is turned on, the setting change state is entered. The medal was moved to a situation where it was possible to bet without letting
However, this is not the only option. When this occurs, an unrecoverable error state may occur.

Specifically, for example, a setting change state flag is provided, and when the setting change state is entered, the setting change state flag is set in a predetermined storage area of the RWM 53, and when the termination condition of the setting change state is satisfied, Clear the configuration change status flag.
Then, when the power is turned off in the setting change state and then turned on while the reset switch (RWM clear switch) 153 is turned on, in step S2714 of the program start processing (M_PRG_START) in FIG. It is determined whether or not the setting change status flag is on. When it is determined that the setting change state flag is ON, the process advances to unrecoverable error processing (C_ERROR_STOP) in step S2801 to set the unrecoverable error state.
As a result, it is possible to prevent the setting value from being set even though the operation for finalizing the setting value (for example, turning on the start switch 41) has not been performed.

(6) In the above embodiment, any value from "0(D)" to "5(D)" is stored at the address "F000(H)" of the RWM 53 as the set value data (_NB_RANK). That is, the set value data is managed by "0(D)" to "5(D)".
However, the address "F000 (H)" of the RWM 53 may store any value from "1 (D)" to "6 (D)" as the set value data (_NB_RANK). good. That is, the set value data may be managed as "1(D) to "6(D)".

Then, when shifting to the setting change state, the setting value data (_NB_RANK) of the address “F000 (H)” of the RWM 53 is cleared (to “0”), and the setting value is fixed (for example, by pressing the start switch 41). turn on) is performed, any value from "1 (D)" to "6 (D)" is stored as the set value data (_NB_RANK) at the address "F000 (H)" of the RWM 53. good too.
In this case, when the power is turned off in the setting change state and then turned on while the reset switch (RWM clear switch) 153 is turned on, the setting value is out of the normal range ( It may be determined that a set value error has occurred), proceed to unrecoverable error processing 2 (S_ERROR_STOP) in step S2811, and enter an unrecoverable error state.

(7) In the above embodiment, as shown in FIG. 38, digit signals for digits 1 to 5 (digit 1 to 5 signals) are output from the output port 3, and segment signals for digits 1 to 5 (segments 1A to 5) are output from the output port 3. 1P signal) is output from output port 4, digit signals for digits 6 to 9 (digit 6 to 9 signals) are output from output port 6, and segment signals for digits 6 to 9 (segment 2A to 2P signals) are output from output port 6. Output from output port 7.
When lighting digits 1 to 5, the digit signal was output from the output port 3 and the segment 1 signal was output from the output port 4. FIG. When the digits 6 to 9 are lit, the digit signal is output from the output port 6 and the segment 2 signal is output from the output port 7 . That is, the output ports to be used are divided into digits 1 to 5 that control lighting by the program in the usage area (first program) and digits 6 to 9 that control lighting by the program outside the usage area (second program). rice field.

However, not limited to this, for example, digits 1 to 5 that control lighting by a program in the usage area (first program) and digits 6 to 9 that control lighting by a program outside the usage area (second program). , the output port may be shared.
FIG. 59 is a diagram showing a modification of the output port in the third embodiment.
As shown in FIG. 59, segment signals for digits 1 to 9 (segment A to P signals) may be output from the output port 3. FIG. Digit signals for digits 1 to 5 (digits 1 to 5 signals) are output from output port 2, and digit signals for digits 6 to 9 (digits 6 to 9 signals) are output from output port 4. can do.
In this case, during an unrecoverable error state, by turning off the output of output port 4 (the output port for digits 6 to 9 signals) ("00000000 (B)"), digits 6 to 9 of the management information display LED 74 can be left off.

(8) In the above embodiment, as shown in FIG. 40, an LED display counter 1 (_CT_LED_DSP1) for outputting digit 1 signal to digit 5 signal is provided in the use area of the RWM 53, and outside the use area of the RWM 53, An LED display counter 2 (_SC_LED_DSP2) is provided for outputting digit 6 to digit 9 signals. That is, an LED display counter for lighting digits 1 to 5 and an LED display counter for lighting digits 6 to 9 are provided independently. However, it is not limited to this.

FIG. 60 is a diagram showing a modification of the LED display counter in the third embodiment.
As shown in FIG. 60, an LED display counter 1 (_CT_LED_DSP1) with 5 interrupts per cycle is provided in the RWM 53 area. , and digit 6 to digit 9 signals may be output. That is, the LED display counter for lighting the digits 1 to 5 and the LED display counter for lighting the digits 6 to 9 may be used in common.

In this case, in step S1471 of the ratio display process (S_LED_OUT) in FIG. 56, the value of the LED display counter 1 (_CT_LED_DSP1) is obtained and stored in the D register.
In the next step S1472, it is determined whether or not there is a ratio display request. Specifically, the value of the LED display counter 1 stored in the D register and "11110000 (B)" are ANDed. , and when the AND operation result is not "0", it is determined that there is no ratio display request, and the processing according to this flowchart is terminated.

Here, when the value of the LED display counter 1 is "00001000 (B)", "00000100 (B)", "00000010 (B)", or "00000001 (B)", the AND operation result is "0". Therefore, it is determined that there is a ratio display request, and the process proceeds to step S1475.
On the other hand, when the value of the LED display counter 1 is "00010000 (B)", the result of the AND operation does not become "0". In this case, since the outputs of the output ports 6 and 7 are maintained, the display mode of the digits 6 to 9 of the management information display LED 74 becomes the same as the display mode during the previous interrupt processing. For example, when the digit 6 was lit and displayed as "7" during the previous interrupt processing, the digit 6 is also lit and displayed as "7" during the current interrupt processing.

In step S1472, when it is determined that there is no ratio display request, the outputs of output port 6 (output port for digits 6 to 9 signals) and output port 7 (output port for segment signals for digits 6 to 9) are turned off. ("00000000(B)"), and all digits 6 to 9 of the management information display LED 74 may be extinguished.

(9) For example, under the condition that the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off under the condition that the power failure recovery is normal (not the power failure recovery failure). Even if the initialization range of the RWM 53 is changed when the power is turned on and when the power is turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are on. good.
Specifically, when the power is turned on under the condition that the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off, the initialization range of the RWM 53 is, for example, the use area. address "F001(H)" to "F1FF(H)" of the area and addresses "F292(H)" to "F3FF(H)" outside the use area are set. In this case, the set value data (_NB_RANK) of the address "F000 (H)" of the RWM 53 and the addresses "F210 (H)" to "F291 (H)" outside the use area are not initialized (cleared). maintain.

On the other hand, when the power is turned on while both the setting key switch 152 and the reset switch (RWM clear switch) 153 are on, the initialization range of the RWM 53 is, for example, the address "F000(H)". Including the set value data (_NB_RANK), the entire range of the used area (addresses "F000 (H)" to "F1FF (H)"), and the addresses outside the used area "F292 (H)" to "F3FF (H) ” is set. In this case, the addresses "F210 (H)" to "F291 (H)" outside the use area are maintained without being initialized (cleared), but the set value data (_NB_RANK) of the address "F000 (H)" is initialized (cleared). In this case, the set value data (_NB_RANK) is "0", so the set value is "1". As a result, the setting value can be changed to "1" simply by shifting to the setting change state.

Also, when the power is turned on under the condition that the setting key switch 152 is on and the reset switch (RWM clear switch) 153 is off, the setting key switch 152 and the reset switch (RWM clear switch) 153 Even when the power is turned on under the condition that both are on, both can be allowed to transition to the setting change state.

(10) In the above embodiment, as the initialization range of the RWM 53 for normal recovery from power failure, the addresses "F001 (H)" to "F1FF (H)" in the use area of the RWM 53 and the address "F292" outside the use area (H)” to “F3FF (H)” are set.
However, the initialization range of the RWM 53 is not limited to the range described above, and can be appropriately set according to the specifications of the slot machine 10 .

For example, the initialization range of the RWM 53 can be varied according to the contents of the action state flag (_FL_ACTION) at the address "F030(H)" of the RWM 53 in FIG.
Specifically, for example, when the D2 bit of the operation status flag (_FL_ACTION) of "F030 (H)" is "1" and 1BB is in operation, the address "F030 (H )” action status flag (_FL_ACTION) can be removed.
On the other hand, when the D2 bit of the operation status flag (_FL_ACTION) of "F030(H)" is "0" and 1BB is not in operation, the address "F030(H)" operation A status flag (_FL_ACTION) can be included.

(11) In the above embodiment, interrupt processing is prohibited in step S1490 of the unrecoverable error processing (C_ERROR_STOP) in FIG. However, the present invention is not limited to this and, for example, interrupt processing may not be prohibited in unrecoverable error processing (C_ERROR_STOP).
Specifically, when "Yes" is determined in step S2708 or S2715 of the program start processing (M_PRG_START) in FIG. good.

Even during execution of the unrecoverable error processing (C_ERROR_STOP), the interrupt processing (I_INTR) in FIG. 47 can be executed, and LED display control (I_LED_OUT) in step S2821 and ratio display preparation (S_DSP_READY) in step S2221 are executed. It may be possible.
As a result, even during execution of unrecoverable error processing (C_ERROR_STOP), digits 1 to 5 (credit number display LED 76, acquired number display LED 78, set value display LED 73) and digits 6 to 9 (management information display LED 74) light up. Control may be executable.

(12) In the above embodiment, the operation for shifting to the setting change state (turning on the power while the setting key switch 152 is turned on) is performed, and when it is determined that the power is restored normally, the address of the RWM 53 is changed. "F292(H)" (ratio display number) is initialized. For this reason, for example, the power is turned off when the role product ratio (cumulative) data (ratio display number "5") is displayed on the management information display LED 74 (role ratio monitor), and then the setting change state is entered. When it is determined that the power supply is restored normally, the management information display LED 74 displays from the designated accessory ratio data (ratio display number “1”), which is the first display item of various ratio information. is started.

However, the present invention is not limited to this. For example, if an operation for shifting to the setting change state (turning on the power while the setting key switch 152 is turned on) is performed and it is determined that the power failure recovery is normal, the management information The display LED 74 first displays specific information different from the ratio information such as "8888" or "8.8.8.8." The display may start from the ratio data (ratio display number “1”).
As a result, it is possible to confirm whether or not all the segments of digits 6 to 9 are lit, so that it is possible to confirm whether or not there is a fault in the segments and whether or not the signal lines of the segments are broken.
Similarly, when an operation is performed to shift to the setting change state and it is determined that there is a power failure recovery failure, the management information display LED 74 first displays a ratio such as "8888" or "8.8.8.8." Specific information different from the information may be displayed, and then the display may be started from the instructed accessory ratio data (ratio display number “1”), which is the first display item of the various ratio information.

(13) For example, when the power is turned on with the setting key switch 152 turned off and the reset switch (RWM clear switch) 153 also turned off, the setting key switch 152 is turned on and the reset switch 153 is turned off. When the power is turned on with the setting key switch 152 turned off and the reset switch 153 turned on, the setting key switch 152 is turned on and the reset switch 153 is turned on. In any case when the power is turned on in the state where the You can display specific information that is different from

After that, the digits 6 to 9 of the management information display LED 74 (role ratio monitor) indicate the on/off status of various switches when the power is turned on, and whether it was determined that the power failure recovery was normal or that the power failure recovery was abnormal. Display information according to As a result, it is possible to check whether or not all the segments of digits 6 to 9 are lit when the power is turned on, so it is possible to check whether there is a failure in the segment or whether there is a disconnection in the signal line of the segment. be able to.

When the power is turned on with the setting key switch 152 turned on and the reset switch 153 turned off, the power is turned on with the setting key switch 152 turned off and the reset switch 153 turned on. When the power is turned on while the setting key switch 152 is turned on and the reset switch 153 is also turned on, "8888" or "8. 8, 8, 8.”, etc., when the power is turned on with the setting key switch 152 turned off and the reset switch (RWM clear switch) 153 turned off. may not display the above specific information on the management information display LED 74 .

(14) In the above embodiment, the operation for shifting to the setting change state (turning on the power while the setting key switch 152 is turned on) is performed, and when it is determined that the power failure recovery is normal, the RWM 53 Initialize the data related to the lighting control of the management information display LED 74 (role ratio monitor) (for example, the ratio display number (_SN_DSP_NO) of address "F292 (H)" to the LED display counter 2 (_SC_LED_DSP2) of "F297 (H)", etc.) bottom.
However, not limited to this, when an operation for shifting to the setting change state is performed and it is determined that the power failure recovery is normal, data related to lighting control of the management information display LED 74 (role ratio monitor) in the RWM 53 The ratio display number (_SN_DSP_NO) of "F292(H)" to the LED display counter 2 (_SC_LED_DSP2) of "F297(H)", etc.) may be maintained without being initialized.

For example, when the management information display LED 74 (role ratio monitor) is displaying the role ratio (cumulative) data (ratio display number “5”), the power is turned off, and then the operation for shifting to the setting change state. is performed, and it is determined that the recovery from power failure is normal. In this case, when the interrupt process (I_INTR) is activated and the ratio display preparation process (S_DSP_READY) is restarted, the management information display LED 74 first displays the ratio information immediately before turning off the power, that is, the character ratio ( Cumulative) data is displayed.

It is also assumed that the role ratio (cumulative) data (ratio display number “5”) is displayed on the management information display LED 74 (role ratio monitor) immediately before the power is turned off, for example, for “1000 ms”. In this case, when the interrupt process (I_INTR) is activated and the ratio display preparation process (S_DSP_READY) is restarted, the management information display LED 74 displays the role product ratio (cumulative) data as "4791.84 ms" - "1000 ms". ”=“3791.84 ms”. After that, the display items after the ratio display number "6" are sequentially displayed on the management information display LED 74 by the ratio display preparation process (S_DSP_READY).
In this way, when the operation for shifting to the setting change state is performed and it is determined that the recovery from power failure is normal and the ratio display preparation process (S_DSP_READY) is restarted, the ratio information immediately before the power is turned off Display starts (resumes) from the continuation.

(15) In the above embodiment, when the power is turned on while the setting key switch 152 is turned off and the reset switch (RWM clear switch) 153 is turned on, and it is determined that the recovery from power failure is normal, the RWM 53 Data related to the lighting control of the information display LED 74 (role ratio monitor) (for example, the ratio display number (_SN_DSP_NO) of address "F292 (H)" to LED display counter 2 (_SC_LED_DSP2) of "F297 (H)", etc.) has been initialized. .
However, not limited to this, when the power is turned on with the setting key switch 152 turned off and the reset switch (RWM clear switch) 153 turned on and it is determined that the power failure recovery is normal, the management information in the RWM 53 Data related to the lighting control of the display LED 74 (role ratio monitor) (for example, ratio display number (_SN_DSP_NO) of address "F292 (H)" to LED display counter 2 (_SC_LED_DSP2) of "F297 (H)") is not initialized may be maintained at

For example, when the continuous role ratio (6000 games) data (ratio display number “2”) is displayed on the management information display LED 74 (role ratio monitor), the power is turned off, and then the setting key switch 152 is turned off. , and the power is turned on with the reset switch (RWM clear switch) 153 turned on, and it is determined that the power failure recovery is normal. In this case, when the interrupt process (I_INTR) is activated and the ratio display preparation process (S_DSP_READY) is restarted, the management information display LED 74 first displays the ratio information immediately before the power is turned off, that is, the continuous character ratio (6000 games) Data is displayed.

Also, it is assumed that the continuous role ratio (6000 games) data (ratio display number “2”) is displayed on the management information display LED 74 (role ratio monitor) immediately before the power is turned off, for example, for “3000 ms”. . In this case, when the interrupt process (I_INTR) is activated and the ratio display preparation process (S_DSP_READY) is restarted, the management information display LED 74 displays the continuous role ratio (6000 games) data as "4791.84 ms"- "3000 ms" = "1791.84 ms" is displayed. After that, the display items after the ratio display number "3" are sequentially displayed on the management information display LED 74 by the ratio display preparation process (S_DSP_READY).
In this way, the power is turned on while the setting key switch 152 is turned off and the reset switch (RWM clear switch) 153 is turned on, and it is determined that the recovery from power failure is normal, and the ratio display preparation process (S_DSP_READY) is restarted. When the power is turned off, the display starts (resumes) from the continuation of the ratio information immediately before the power is turned off.

(16) In the above embodiment, the setting cannot be changed during the period from the start switch acceptance process (step S279 in FIG. 46) to the game end check process (step S301 in FIG. 46) including the rotation of the reel 31 (during the game). , and during this time, turned on the unchangeable flag.
However, the configuration is not limited to this, and the setting change may be allowed at all times without providing a period during which the setting cannot be changed and therefore without setting the setting change disabled flag.

(17) In the above embodiment, it is determined in step S2770 of the interrupt processing (I_INTR) in FIG. 47 whether or not a power failure has occurred. I_POWER_DOWN), and when it is determined that the power failure has not occurred, the power failure processing (I_POWER_DOWN) of step S2771 is skipped and the process proceeds to step S454.
However, the present invention is not limited to this. For example, when the occurrence of power shutdown is detected without executing the power shutdown processing (I_POWER_DOWN) during the interrupt processing (I_INTR) of FIG. 47, the interrupt processing (I_INTR) of FIG. A separate interrupt process may be executed, and the power-off process (I_POWER_DOWN) may be executed in this separate interrupt process.
In this case, when the occurrence of power failure is detected during the execution of interrupt processing (I_INTR) in FIG. After the end of , another interrupt process is started, and the power-off process (I_POWER_DOWN) is executed in this another interrupt process.

(18) In the above embodiment, the slot machine 10 is used as an example of a gaming machine, but the present invention is not limited to this. For example, as game media, parrots that use game balls, sealed game machines (medal-less game machines) that use electronic information (electronic medals) instead of physical medals (as tangible objects), and casino machines. The present invention can be applied.

<Fourth Embodiment>
The fourth embodiment relates to interrupt processing and an interrupt disabled period. Note that "interrupt (processing)" is also referred to as "timer interrupt (processing)", but is simply referred to as "interrupt (processing)" in the following description.
Also, in the interrupt processing in the fourth embodiment, an interrupt disabled period may be provided. As described in the third embodiment, interrupt processing includes a maskable interrupt (INT) that can be disabled and a non-maskable interrupt (NMI) that cannot be disabled. means a "maskable interrupt" in which an interrupt disabled period can be set. When referring to a "non-maskable interrupt", the term "interrupt" is not abbreviated and is referred to as a "non-maskable interrupt".
The "interrupt disabled period" is also called "interrupt disabled section" or "interrupt disabled state". Similarly, the "interrupt-enabled period" is also called an "interrupt-enabled section" or an "interrupt-enabled state."
In addition, in the specification and claims of the present application, "when doing" means "before doing ("before" includes "immediately before"), "at the same time as doing", " After ("after" includes "immediately after")" is used as a generic term for the meaning including both. Specifically, for example, "when starting interrupt processing" means "before starting interrupt processing (immediately before),""simultaneously with starting interrupt processing," and "after starting interrupt processing (immediately after)." It means to include.

The information processing executed in the gaming machine 10 includes main processing (FIG. 46) that is executed once for each game, and main processing that is interrupted during execution of the main processing and executed after exiting the main processing. and an interrupt process (see FIG. 66 to be described later). Interrupt processing is executed at predetermined intervals. In this embodiment, the main process is started after the initialization process (see FIG. 65). The concept of the main process may also include the process before the game is started, such as (FIG. 65).

FIG. 61 is a block diagram showing a timer circuit 500 and the like for executing interrupt processing. The timer circuit 500 is incorporated in the main chip (MPU (main CPU 55)) of the one-chip microprocessor.
The timer circuit 500 includes a PTC 8-bit counter (hereinafter simply referred to as "8-bit counter") 501, a PTC prescaler register (also referred to as "PTC prescaler setting register". Hereinafter simply referred to as "prescaler register") 502, and a PTC counter setting register. (also referred to as "PTC count value setting register"; hereinafter simply referred to as "counter setting register") 503;

The 8-bit counter 501 is an 8-bit (1 byte) counter for measuring the timing of interrupt processing. When the power is turned on (the power (switch) is turned on), the 8-bit counter 501 is set to "0". The timing at which "0" is set in the 8-bit counter 501 is, for example, before the program starts or at the same time as the program starts in FIG. 63, which will be described later.

A prescaler register 502 is a built-in register that can set a set value for selecting a clock to be supplied to the 8-bit counter 501 . Specifically, it is a built-in register that can set how many frequencies of the system clock (SCK) are to be supplied to the 8-bit counter 501 (at a rate of once). For example, when the system clock is "16" MHZ and "143" is set in the prescaler register 502,
16 (MHZ)/143 = about "111.8881" KHZ
is the clock source for the 8-bit counter 501 .
A system clock (SCK) is a clock supplied to the main chip (MPU). It is configured to be able to execute various programs (instructions) based on the system clock.

A counter setting register 503 is a built-in register that can set the count value of the 8-bit counter 501 . Specifically, it is a built-in register that can set how many times the number of clocks from the prescaler register 502 is input to execute interrupt processing. For example, as described above, if the clock source of the 8-bit counter 501 is approximately "111.8881" KHZ, and the clock of approximately "111.8881" KHZ is input "125" times, the 8-bit counter 501 times out. It shall be.
in this case,
125/111.8881 (KHZ) = about "1.117" ms
Interrupt processing can be executed at the cycle of
After the value is set in the counter setting register 503, the count value of the 8-bit counter 501 is updated based on the clock from the prescaler register 502 (for example, "1" subtraction or "1" addition).
Note that the value of the prescaler register 502 may be stored before the program (instruction) that stores the value of the counter setting register 503 .

After power-on, the initial value of the 8-bit counter 501 is "0". When, for example, "125" is written to the counter setting register 503, the value of the 8-bit counter 501 changes from "0" to "125", and when it reaches "125", the update of the 8-bit counter 501 is started. . As noted above, "1" is subtracted approximately every "111.8881" KHZ. When the value of the 8-bit counter 501 is "1", it becomes "125" when updated.
Therefore,
"0" (when power is turned on)→"125"→"124"→...→"2"→"1"→"125"→"124"→...
and repeat.
In other words, the value of the 8-bit counter 501 becomes "0" when the power is turned on, otherwise it does not become "0" and circulates between "125" and "1".

Also, when the value of the 8-bit counter 501 is updated from "1" to "125" (immediately before the update or at the moment of the update), the 8-bit counter 501 times out.
The period for the value of the 8-bit counter 501 to change from "125" to "1" is approximately "1.117" ms, which is the period of interrupt processing (interrupt period. "Tc" in FIG. 71 to be described later). ).

Further, for example, when the value of the 8-bit counter 501 is “n” (n=an arbitrary value from “1” to “125”), the power is turned off and then turned on. 8-bit counter 501 becomes "0" as described above.
In this way, the 8-bit counter 501 cycles between '125' and '1' while the power is on, and never becomes '0' again. It becomes "0" only when the power is turned off and then turned on again.
On the other hand, even if the power is turned off when the value of the 8-bit counter 501 is any value between "125" and "1", the initial value of the 8-bit counter 501 will be becomes "0". In this way, the time from when the power is turned on until the 8-bit counter 501 times out for the first time can be kept constant, and compared to the case where the count value of the 8-bit counter 501 is stored when the power is turned off. You can increase the amount of time before the first timeout by using

On the other hand, a timer storage area is provided in a predetermined storage area of the RWM 53 . As a timer, for example,
A timer for measuring "4.1" seconds, which is the shortest time for one game,
a timer for determining errors;
Examples include timers used for outputting test signals. These timer values are backed up when the power is turned off, are maintained during the power off, and return to the values before the power was turned off when the power is turned on again.
As described above, the timer value provided in the RWM 53 is configured to be able to maintain the value before the power is turned off, while the value of the 8-bit counter 501 is always "0" when the power is turned on. "become.

In addition, even if the main processing or interrupt processing runs out of control or the processing takes an unexpected amount of time, the 8-bit counter 501 does not stop, and if the system clock is normal, the 8-bit The counter 501 can cycle between '125' and '1'.
Furthermore, even during interrupt processing, the 8-bit counter 501 does not stop, and if the system clock is normal, the 8-bit counter 501 can circulate between "125" and "1". can.
Furthermore, even during the interrupt disabled period, the 8-bit counter 501 does not stop, and if the system clock is normal, the 8-bit counter 501 can circulate between "125" and "1". can.

At least one interrupt disabled period is provided during the main process. For example, in FIG. 46, there is a period between step S296 and step S300. The prohibition of interrupt here is for prohibiting interrupt processing during the ratio setting processing of step S298.
The reason why interrupt processing is prohibited during execution of ratio set processing is that ratio set processing uses a program stored outside the usage area, and interrupt This is because when processing is entered, the program processing within the usage area and the program processing outside the usage area coexist (simultaneously in parallel), which complicates the processing.

Also, although not shown, other examples of disabling interrupts are as follows.
a) When sending a control command from the main control board 50 to the sub-control board 80, when writing the control command to the control command buffer or when updating the write pointer of the control command, interrupt before and after these processes. If processing is prohibited,
b) When the blocker signal is turned on (medal acceptance permitted state) and the blocker state is turned on (the insertion display LED is lit), interrupt processing is prohibited before and after that,
c) When the blocker signal is turned off (medal acceptance refusal state) and the blocker state is turned off (the insertion display LED is turned off), interrupt processing is prohibited before and after that,
d) In the case of executing the process of setting the number of outputs of the medal bet signal, and prohibiting the interrupt process before and after the process,
e) In the case of executing the set processing of the number of outputs of the medal payout signal, the interrupt processing is prohibited before and after the processing.

The above a) is to prevent malfunction (such as writing to an address different from the normal write address) due to execution of interrupt processing during write processing of the control command.
Also, in the above b) and c), when an interrupt process enters between the process of turning on or off the blocker signal and the process of turning on or off the blocker state, one is turned on and the other is turned off. This is to prevent an inconsistency in which, for example, although ON is output to the blocker, ON is not output to the ON display LED (extinguishing).
Furthermore, the above d) and e) are intended to prevent the medal bet signal or the medal payout signal from being updated due to the execution of interrupt processing during the medal bet signal or medal payout signal set processing.

An interrupt flag 504 is a flag indicating that the 8-bit counter 501 has timed out.
The interrupt flag 504 is set (turned on) when the value of the 8-bit counter 501 is updated from "1" to "125" (when the 8-bit counter 501 times out). The timing of canceling (turning off) the set interrupt flag 504 is arbitrary. For example, the timing for canceling (turning off) the interrupt flag 504 is
a) When executing interrupt processing b) Predetermined information (hereinafter simply "information ).

The interrupt wait monitor register 301 is one of the internal registers of the MPU capable of storing information indicating that an interrupt request signal has been generated after the interrupt flag 504 is set. Interrupt flag 504 is set when 8-bit counter 501 times out. When the interrupt flag 504 is set, an interrupt request signal is output to the interrupt wait monitor register 301, and information indicating that the interrupt request signal has been generated is stored in a predetermined bit of the interrupt wait monitor register 301. FIG.
In the following description, ``information indicating that an interrupt request signal has been generated in the interrupt wait monitor register 301 is stored in a predetermined bit'' will be simply referred to as ``when an interrupt request signal has been generated in the interrupt wait monitor register 301.'' Information indicating that the
Then, an interrupt request signal is output to the main CPU 55 via the interrupt waiting monitor register 301, so that interrupt processing can be executed. Information indicating that an interrupt request signal has been generated is cleared when the main CPU 55 accepts the interrupt request (executes interrupt processing).

Here, "the situation in which information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301" is
a) Circumstances where there is an interrupt request b) Circumstances where a predetermined flag relating to the interrupt request is on (“1”) c) A predetermined flag indicating that the 8-bit counter 501 has timed out is on (“1”) It may also be referred to as a situation where
Similarly, "a situation in which information indicating that an interrupt request signal has been generated is not stored in the interrupt wait monitor register 301"
a) A situation in which there is no interrupt request b) A situation in which a predetermined flag related to an interrupt request is turned off (“0”) c) A predetermined flag indicating that the 8-bit counter 501 has timed out is turned off (“0”) It may also be referred to as a situation where

When the 8-bit counter 501 times out again in a situation where information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301, the 8-bit counter 501 times out again. Although the interrupt request signal based on the interrupt request signal is output to the interrupt wait monitor register 301, the information stored in the interrupt wait monitor register 301 is not saved again based on the interrupt request signal (in this case, the interrupt request signal ).

In a situation where the interrupt wait monitor register 301 stores information indicating that an interrupt request signal has been generated, interrupt processing is not started during the interrupt disabled period, but the interrupt request signal is stored in the interrupt wait monitor register 301. A situation is maintained that stores information indicating that there has been an occurrence of Even in this state, the circulation of the 8-bit counter 501 continues without interruption. Then, when about "1.117" ms has passed and the 8-bit counter 501 times out again, if the interrupt disabled period continues, the interrupt wait monitor register 301 has generated an interrupt request signal. It remains in the state where the information indicating is stored. Here, even if the processing for setting the interrupt flag 504 is executed regardless of whether or not the information indicating that the interrupt request signal has been generated is stored in the interrupt wait monitor register 301 . good. Alternatively, when the 8-bit counter 501 times out, it is determined whether information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301, and the interrupt request signal is stored in the interrupt wait monitor register 301. When information indicating that an interrupt request signal has occurred is stored, the processing for setting the interrupt flag 504 is not executed, and information indicating that an interrupt request signal has occurred is stored in the interrupt wait monitor register 301. If not, processing for setting the interrupt flag 504 may be executed.
In the following description, when the 8-bit counter 501 times out, the interrupt flag 504 is set regardless of whether or not the interrupt wait monitor register 301 stores information indicating that an interrupt request signal has been generated. will be described assuming that processing for setting is executed.

Further, when the interrupt waiting monitor register 301 stores information indicating that an interrupt request signal has been generated at the end of the interrupt disabled period, interrupt processing is started and the interrupt request signal is stored in the interrupt waiting monitor register 301. clear the information As a result, when interrupt processing is started, the interrupt wait monitor register 301 does not store information indicating that an interrupt request signal has been generated.
Therefore, even if the 8-bit counter 501 times out multiple times during the period in which the information indicating the occurrence of the interrupt request signal is stored in the interrupt wait monitor register 301, the interrupt wait monitor will resume after the interrupt disabled period ends. The number of times interrupt processing is executed based on the fact that information indicating that an interrupt request signal has been generated is stored in the register 301 is limited to "1".
It should be noted that the 8-bit counter 501 keeps circulating the values from "m" to "1" even during interrupt processing.

In addition, as shown in FIG. 61, an interrupt disable flag 302 is provided within the one-chip microprocessor. The interrupt disable flag 302 in the fourth embodiment corresponds to the IFF1 register shown in FIG. 112 (sixth embodiment).
The IFF1 register is a register for determining whether maskable interrupts are enabled or disabled. The IFF2 register is a register used for restoring the IFF1 register after processing a non-maskable interrupt or for restoring by a RETEX instruction after execution of a CALLEX instruction.

When (maskable) interrupt processing is executed, both the IFF1 register and the IFF2 register are set to "0" in order to change from the interrupt enabled state to the interrupt disabled state. When the IFF1 register is "0", it indicates that the interrupt is disabled. Then, at the end of interrupt processing, in order to switch from the interrupt disabled state to the interrupt enabled state, an instruction (EI instruction) for enabling interrupts is executed immediately before the end of interrupt processing, and both the IFF1 and IFF2 registers are set to "1". to When the IFF1 register is "1", it indicates that the interrupt is enabled.

The interrupt disabled period is first set in the main process. For example, in FIG. 46, it is between step S296 and step S300.
Secondly, the interrupt disabled period is set during execution of interrupt processing. For example, as shown in FIG. 66, which will be described later, the IFF1 and IFF2 registers become "0" when interrupt processing is executed. This is because duplicate interrupts are prohibited in interrupt processing, as described above.

When the interrupt request signal is output to the main CPU 55 when the IFF1 register is "1" in a situation where information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301, Also, the main CPU 55 accepts an interrupt request signal. In other words, interrupt processing is performed.
On the other hand, if the IFF1 register is "0" in a situation where information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301, an interrupt request signal is output to the main CPU 55. At this time, the main CPU 55 does not accept the interrupt request signal. In other words, no interrupt processing is performed. In this case, the interrupt wait monitor register 301 keeps storing information indicating that an interrupt request signal has been generated, and continues to output the interrupt request signal to the main CPU 55 . Then, when the IFF1 register changes from "0" to "1" (when the interrupt permission period is reached), interrupt processing is executed based on the interrupt request signal.
When the interrupt processing is executed based on the interrupt request signal, the information indicating that the interrupt request signal has been generated stored in the interrupt wait monitor register 301 is cleared. In other words, the output of the interrupt request signal to the main CPU 55 is stopped.

Next, the relationship between the interrupt enabled state, interrupt disabled state, and the IFF1 and IFF2 registers will be described using a simple program.
FIG. 62 shows an example of a program explaining interrupt prohibition and interrupt enablement. In the figure, (A) and (B) show the main processing program, and (C) shows the interrupt processing program.
In FIG. 62A, the "DI" instruction is an instruction for disabling interrupts, as shown in FIG. 118 (sixth embodiment). The "EI" instruction is an instruction for enabling interrupts, as shown in FIG. 118 (sixth embodiment).
"AAAA", "BBBB", and "CCCC" are arbitrary programs (instructions).
When the "DI" instruction is executed, both the IFF1 register value and the IFF2 register value become "0" and the interrupt is disabled.

After that, when "AAAA" and "BBBB" of the program are executed, and then the "EI" instruction is executed, both the IFF1 register value and the IFF2 register value become "1" and the interrupt is enabled.
The program "CCCC" after the "EI" instruction includes, for example, the "RET" instruction. In this case, after execution of the "RET" instruction (ie, after execution of "CCCC"), the interrupt can be executed. At least immediately after the "RET" instruction, the interrupt wait monitor register 301 must store information indicating that an interrupt request signal has been generated.
As described above, even if the interrupt enable instruction "EI" is executed, interrupt processing is not executed until the next instruction ("CCCC" in this example, for example "RET") is executed. The instructions after the enable instruction "EI" can be reliably executed.

In FIG. 62B, the "CALLEX" instruction and the "RETEX" instruction are the same as those shown in FIG. 115 (sixth embodiment).
That is, when the "CALLEX" instruction is executed, regardless of whether the interrupt is enabled or disabled at that time, the interrupt is disabled and the specified address is called. .
Also, when the "RETEX" instruction is executed, the interrupt state is set to the state before the "CALLEX" instruction, and the return ("RET") is performed (returns to the state before "CALLEX", in other words, the interrupt following "CALLEX"). Execute return to instruction (program at return address).

Here, when the "CALLEX" instruction is executed, the IFF1 register value becomes "0" and the IFF2 register value does not change.
Also, when the "RETEX" instruction is executed, the IFF1 register value becomes the IFF2 register value, and the value of the IFF2 register does not change.
Since the 'RETEX' instruction includes the 'RET' instruction, the interrupt process can be executed immediately after the 'RETEX' instruction.
For example, when the IFF1 register value is "1" and the IFF2 register value is "1" immediately before the "CALLEX" instruction is executed, the "CALLEX" instruction causes the IFF1 register value to be "0" and the IFF2 register value to be "1". 1”. Also, the IFF1 register value becomes "1" and the IFF2 register value becomes "1" by the "RETEX" instruction. By having the IFF2 register in this way, it is possible to restore the IFF1 register values and the IFF2 register values before the "CALLEX" instruction is executed.

In FIG. 62(C), both the IFF1 register value and the IFF2 register value become "0" when interrupt processing (maskable interrupt (INT)) is executed. As a result, interrupts (multiple interrupts) are disabled. Therefore, the "DI" instruction is unnecessary when starting interrupt processing.
Also, when ending the interrupt process, the "EI" instruction is executed immediately before the end of the interrupt process, that is, immediately before the "RETI" instruction, in order to switch from the interrupt disabled state to the interrupt enabled state. Both the IFF1 register value and the IFF2 register value become "1" by this "EI" instruction.

When the "RETI" instruction is subsequently executed, the value of the IFF1 register becomes the value of the IFF2 register and the value of the IFF2 register does not change, similarly to the "RETEX" instruction.
From the above, the IFF1 and IFF2 registers are
At the start of interrupt processing: IFF1=0, IFF2=0
↓
"EI" instruction: IFF1=1, IFF2=1
↓
"RETI" command: IFF1=IFF2, IFF2=maintenance.
It is configured so that interrupt processing can be executed after the "RETI" instruction. As a result, redundant interrupt processing is prevented, such as interrupt processing being executed immediately after the "EI" instruction and then interrupt processing being executed after the "RETI" instruction.

Data holding/clearing due to power on/off in the interrupt flag 504, the interrupt wait monitor register 301, the interrupt prohibition flag 302 (IFF1 register and IFF2 register), and the timer storage area of the RWM 53 are as follows.
As the timer storage area of the RWM 53, for example, there is a "timer storage area for measuring '4.1' seconds, which is the shortest time for one game". However, the timer storage area of the RWM 53 is not limited to the above "timer storage area for measuring the shortest time of one game, ie, 4.1 seconds", Predetermined timer storage areas capable of measuring various predetermined times, such as "standby timer storage area". Also, the predetermined timer storage area may be a 1-byte storage area or may be a multi-byte storage area.

a) When the power is turned on when the setting change condition is not satisfied and the setting change state is not entered Both the wait monitor register 301 and the interrupt disable flag 302 (IFF1 register and IFF2 register) are cleared (to "0"). On the other hand, the predetermined timer storage area of RWM 53 is not cleared.
For example, assume that the power is turned off under the condition that the value stored in the predetermined timer storage area of the RWM 53 is "X" and the value of the 8-bit counter 501 is "Y". In this case, when the setting change condition is not satisfied and the power is turned on without shifting to the setting change state, the value stored in the timer storage area is "X" and the value of the 8-bit counter 501 is "X". is returned as "0".

b) At power-on when shifting to the setting change state by satisfying the setting change condition IFF2 register) as well as a predetermined timer storage area of the RWM 53 are cleared (to "0").
Therefore, the 8-bit counter 501, the interrupt flag 504, the interrupt wait monitor register 301, and the interrupt disable flag 302 (IFF1 register and IFF2 register) determine whether or not the setting change condition is satisfied (shift to the setting change state) when the power is turned on. is cleared (becomes "0") regardless of whether the
On the other hand, the predetermined timer storage area is not cleared (does not become "0") when the power is turned on and does not shift to the setting change state because the setting change condition is not satisfied. is cleared (becomes "0") when the power is turned on.

As described in the third embodiment, the setting key switch 152 is turned on by inserting the setting key from the setting key insertion opening 151 and rotating the setting key clockwise by 90 degrees. When the power is turned on in this state, it is determined that the door switch signal is on ("Yes" in step S2706) and the setting key switch signal is on ("Yes" in step S2707) in FIG. 63, which will be described later. , and other predetermined conditions are satisfied, the process proceeds to the initialization process of step S2863 (FIG. 65, which will be described later). Then, in step S2742 in FIG. 65, the process shifts to setting change confirmation processing (see FIG. 45, also referred to as setting change confirmation mode, setting change confirmation state, setting change confirmation (processing) in progress, etc.).
Satisfaction of the condition for shifting to the setting change confirmation process corresponds to the above-mentioned "at the time of power-on in the case of shifting to the setting change state due to the satisfaction of the setting change condition".

Also, the above is an example in which the gaming machine is the slot machine 10 . On the other hand, when the game machine is a pinball game machine (pachinko game machine), "satisfying the setting change condition" means that the door switch (frame open switch) signal is ON and the setting change key switch signal is ON. It is on and corresponds to the reset switch being on. In the pinball game machine (pachinko game machine), when it is determined that all of these three conditions are satisfied, the setting change condition is satisfied and the setting change state is entered.
In the pinball game machine (pachinko game machine), when the door switch (frame open switch) signal is on, the setting change key switch signal is on, and the reset switch is off, (setting (Although the change condition is not satisfied), the setting confirmation condition is satisfied, and the setting confirmation state is entered.

As described above, when the power is turned off, the value of the 8-bit counter 501 is not retained (when the power is restored, the value of the 8-bit counter 501 is set to "0"). As a result, it is possible to keep the time from when the power is turned on until the first interrupt process starts. In addition, the update cycle of the 8-bit counter 501 ("8.9375" microseconds) is shorter than the update cycle of the timer value of the RWM 53 (interrupt processing cycle. "1.117" ms.). , the effect of clearing the 8-bit counter 501 is negligible for the gaming machine as a whole.
For this reason,
a) Hold the value of the 8-bit counter 501 when the power is turned off, and restart the counting of the 8-bit counter 501 from the value when the power is turned off when the power is turned on (the value of the 8-bit counter 501 is backed up). and
b) A configuration in which the value of the 8-bit counter 501 is set to "0" when power is restored (this embodiment)
When compared with , even with the configuration of b) above, it is possible to return with an error within "1" interrupt. In the configuration b) above, means for backing up the value of the 8-bit counter 501 when the power is turned off is not required.

Next, the ON/OFF timing of the interrupt prohibition flag 302 (IFF register) will be described based on a flowchart.
FIG. 63 is a flowchart showing program start (M_PRG_START) in the fourth embodiment, and is a flowchart corresponding to FIG. 41 of the third embodiment. In FIG. 63, the same step numbers are assigned to the same processes as in FIG. 41, and the description thereof is omitted. Further, in FIG. 63, step numbers different from those in FIG. 41 are underlined.
When program start is executed in step S2701, the value of the 8-bit counter 501 is "0" and the IFF1 and IFF2 registers are "0". Since the IFF1 register is "0", interrupts are disabled until the IFF1 register becomes "1".

Proceeding to step S2861, the counter setting register 503 is set to the initial value "m".
Here, in the fourth embodiment, as examples of setting the initial value "m" in the counter setting register 503, an example performed before execution of the RWM abnormality determination process and an example performed after the execution of the RWM abnormality determination process will be described. The "RWM abnormality determination process" here is a process for determining whether or not the data stored in the RWM 53 before power-off is normal, and corresponds to the processes in steps S2708, S2712, and S2715. . Step S2861 in FIG. 63 is an example of setting an initial value in the counter setting register 503 before RWM abnormality determination.
The initial value "m" is, for example, "125" as described above. When the initial value is set in the counter setting register 503, the 8-bit counter 501 starts updating the count value and continues to update the count value until the power is turned off.
As described above, when the power is turned on and the program is started, the interrupt is disabled at first, and when the initial value is set to the counter setting register 503 before the RWM abnormality determination, the counter setting register 503 is set to the initial value. Bit counter 501 begins to update.

FIG. 64 is a flowchart showing power restoration processing (M_POWER_ON) (step S2862 in FIG. 63) in the fourth embodiment, and is a flowchart corresponding to FIG. 42 in the third embodiment. In FIG. 64, the same step numbers are assigned to the same processes as in FIG. 42, and the description thereof is omitted. 64, step numbers different from those in FIG. 42 are underlined.
The power restoration process of FIG. 64 shows an example of setting the counter setting register 503 after the RWM abnormality determination.
In this example, after step S2724, the process advances to step S2871 to set the initial value "m" in the counter setting register 503. FIG.

When the initial value is set in the counter setting register 503 in step S2861 of FIG. 63 (when the counter setting register 503 is set before RWM abnormality determination), the processing of step S2871 in FIG. 64 is not performed. On the other hand, when step S2861 in FIG. 63 is not performed (when the counter setting register 503 is set after the RWM abnormality is determined), if the initialization process (M_INI_SET) in step S2863 in FIG. 63 is not performed, the step in FIG. In S2871, the initial value "m" is set in the counter setting register 503.
After step S2871, the process advances to the return address of the interrupt process immediately before power-off (FIG. 66, which will be described later). The power-off process is executed in the interrupt process (step S2771 in FIG. A processing return address is stored. Then, after the power recovery process of FIG. 64, the process proceeds to the return address of the interrupt process, and the continuation of the interrupt process is executed. At step S2892 of the interrupt processing (FIG. 66), the IFF1 register and the IFF2 register become "1", and the interrupt is enabled.

As described above, when the 8-bit counter 501 is configured to start updating before the RWM abnormality is determined, the 8-bit counter 501 can be updated earlier than when the 8-bit counter 501 is updated after the RWM abnormality is determined. can be timed out (information indicating that an interrupt request signal has been generated can be stored in the interrupt wait monitor register 301). interrupt processing can be executed without delay.
On the other hand, if the 8-bit counter 501 is configured to start updating after the RWM abnormality is determined, the IFF1 register may become "1" due to noise or the like before the RWM abnormality is determined, or when the power is turned on. Even if there is a problem that the IFF1 register becomes "1" (a problem that an unintended interrupt enabled state occurs), the 8-bit counter 501 has not timed out before the RWM abnormality is determined (an interrupt request is sent to the interrupt wait monitor register 301). (No information indicating that the signal has been generated is stored.) Therefore, interrupt processing is not executed before RWM abnormality determination. In other words, it is possible to prevent the RWM data from being changed from before the power-off due to interrupt processing before the RWM abnormality determination. Thereby, an RWM abnormality can be accurately determined.

FIG. 65 is a flowchart showing initialization processing (M_INI_SET) (step S2863 in FIG. 63) in the fourth embodiment, and is a flowchart corresponding to FIG. 44 in the third embodiment. In FIG. 65, the same step numbers are assigned to the same processes as in FIG. 44, and the description thereof is omitted. 65, step numbers different from those in FIG. 44 are underlined.
In FIG. 63, when "Yes" is determined in step S2712 or when "Yes" is determined in step S2714, the initialization process in FIG. 65 is performed.
In this initialization process, after the AF register is restored in step S2737, the counter setting register is set in step S2881. This processing is an example of executing the counter setting register setting after the RWM abnormality determination, and is an example of executing the counter setting register setting in the case of shifting to the initialization processing (without shifting to the power restoration processing).

Also, in step S2740, a setting command set process is executed. This process is a process of storing a control command in the control command buffer in order to transmit a control command for starting the setting change confirmation process (step S2742) to the sub-control board 80. FIG. As described above, interrupt processing is prohibited before the control command is written to the control command buffer or the write pointer of the control command is updated, and interrupt processing is permitted after completion of these processes.
Therefore, in step S2740,
(1) DI (IFF1=0, IFF2=0)
(2) Actual setting command set (processing for writing control commands to the control command buffer, processing for updating the write pointer of the control commands, etc.)
(3) EI (IFF1=1, IFF2=1)
are executed.
As described above, when proceeding from the program start (FIG. 63) to the initialization process (FIG. 65), the interrupt enabled state is set by the "EI" instruction in the setting command set in step S2740. In this way, the interrupt disabled state is changed to the interrupt enabled state by using the process of executing the interrupt disable instruction (DI) and the interrupt enable instruction (EI) before and after the process.

Note that the setting command set in step S2746 is a process of transmitting a command to end the setting change confirmation process to the sub-control board 80, and similarly to step S2740, the "DI" command and the "EI" command are sent at the beginning and end of the process, respectively. execute the command.

As described above, when a value is written to the counter setting register 503 after RWM abnormality determination, it is possible to prevent interrupt processing from being started due to a problem or the like while RWM abnormality determination is being performed. Note that when interrupt processing is started, RWM data may be updated.

FIG. 66 is a flowchart showing interrupt processing (I_INTR) in the fourth embodiment, and is a flowchart corresponding to FIG. 47 of the third embodiment. In FIG. 66, the same step numbers are assigned to the same processes as in FIG. 47, and the description thereof is omitted. Further, step numbers in FIG. 66 that are different from those in FIG. 47 are underlined.
When interrupt processing is started, the IFF1 and IFF2 registers become "0". This results in an interrupt disabled state (duplicate interrupt disabled state).
In step S452 of FIG. 47, initial processing including duplicate interrupt inhibition is executed, but in the case of the fourth embodiment, register value save processing is executed in step S2891.

After restoring the register value in step S469, the "EI" instruction is executed in step S2892. As a result, the IFF1 register and the IFF2 register become "1" and the interrupt is enabled.
Furthermore, in the final step S2893, the IFF1 register value becomes the IFF2 register value by the "RETI" instruction corresponding to the return instruction. Also, the IFF2 register value is maintained.
As described above, the "EI" instruction in step S2892 causes the interrupt enabled state, but the configuration is such that interrupt processing can be executed after the next "RETI" instruction in step S2893.
After the "RETI" instruction is completed, if the interrupt wait monitor register 301 does not store information indicating that an interrupt request signal has been generated, the main processing program (return address). On the other hand, if information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 after the "RETI" instruction is completed, the interrupt process is executed again.

Next, the relationship between the 8-bit counter 501 and interrupt processing will be explained using a time chart.
FIG. 67 is a time chart showing the relationship between the 8-bit counter 501 and interrupt processing. FIG. 67 shows an example in which the main process does not have an interrupt disabled period.
In FIG. 67, the value of the 8-bit counter 501 is "0" when the power is turned on, but the counter value "m" is set by the counter setting register setting process described above. The counter value "m" is "125" in the above example. Then, as in the above example, the count value of the 8-bit counter 501 is decremented by "1" at a clock of approximately "111.8881" KHZ (every "8.9375" microseconds).

When the value of the 8-bit counter 501 is updated from "1", it returns to "m". When "1" is updated to "m"("T1" in the figure), the 8-bit counter 501 "timeouts", and when a timeout occurs, the interrupt flag 504 is set, an interrupt request signal is output, and an interrupt waits. Information indicating that an interrupt request signal has been generated is stored in the monitor register 301 . In the figure, the off state of the interrupt wait monitor register 301 indicates that no information indicating the occurrence of the interrupt request signal is stored, and the on state of the interrupt wait monitor register 301 indicates that the interrupt request signal has been generated. It indicates that information indicating that there has been an event is stored (the same applies to FIGS. 68 to 75 below).
When information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 and the interrupt prohibition flag 302 is not set (interrupt permission state), interrupt processing is started.
It should be noted that even at the moment when the information indicating the occurrence of the interrupt request signal is stored in the interrupt wait monitor register 301, some processing (instruction) is being executed in the main processing, and the processing ( instruction) is completed, interrupt processing is started. In other words, the actual processing in the main processing and the interrupt processing do not run concurrently. In the example of FIG. 67, after information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 at timing "T1", interrupt processing is started at timing "T2". there is

Also, when interrupt processing is started, an interrupt prohibition flag 302 is set. This corresponds to "IFF1=0, IFF2=0" shown on the right side of step S2890 in FIG. Then, when the interrupt processing ends, the set state of the interrupt prohibition flag 302 is canceled. This process corresponds to the process (IFF1=1, IFF2=1) in step S2892 in FIG.
In the following description, unless otherwise specified, "the interrupt disable flag 302 is set" means that at least IFF1 becomes "1" (IFF2 may be "0" or "1"). Point. Further, "the set state of the interrupt prohibition flag 302 is canceled" or "the interrupt prohibition flag 302 is not set" means that at least IFF1 becomes "0" (IFF2 is "0"). "0" or "1").

FIG. 68 is a time chart showing the relationship between the 8-bit counter 501 and interrupt processing. FIG. 68 shows an example in which the main process has an interrupt disabled period.
In FIG. 68, the timing "T0", which is the start of the interrupt disabled period, corresponds to the "DI" or "CALLEX" instruction shown in FIG. Timing "T3", which is the end of the interrupt disabled period, corresponds to the "EI" instruction or "RETEX" instruction shown in FIG. Similarly, in FIG. 69 and after, the "DI" instruction or "CALLEX" instruction corresponds to the start of the interrupt disabled period, and the "EI" instruction or "RETEX" instruction corresponds to the end of the interrupt disabled period.
The example of FIG. 68 shows an example in which an interrupt disabled period is set in the main process at timing "T0" which is timing before "T1" at which the 8-bit counter 501 times out. In this case as well, information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 at timing "T1" when the 8-bit counter 501 times out, as in the example of FIG. .
On the other hand, at timing "T1", it is still the interrupt disabled period and the interrupt disabled flag 302 is set, so the interrupt processing is not started. However, even after that, the interrupt wait monitor register 301 maintains the state in which the information indicating the occurrence of the interrupt request signal is stored.

After that, the interrupt disabled period ends at timing "T3". As a result, "information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 and the interrupt prohibition flag 302 is not set", so that interrupt processing can be executed. Become. The example of FIG. 67 shows an example in which interrupt processing is started at timing "T4".
If the timing "T3" corresponds to the "EI" instruction and the interrupt processing is started at the timing "T4" after the execution of one instruction (for example, the "RET" instruction), the timing "T3" and "T4" has a time lag of one instruction. On the other hand, if the "CALLEX" instruction is executed at the timing "T0" and the "RETEX" instruction is executed at the timing "T3", immediately after the execution of the "RETEX" instruction without further execution of one instruction. Therefore, no time lag occurs between the timings "T3" and "T4".
When starting interrupt processing, the information stored in the interrupt wait monitor register 301 is cleared. On the other hand, the interrupt prohibition flag 302 is set to prohibit duplicate interrupts.

FIG. 69 is a time chart showing an example (1) in which the 8-bit counter 501 times out multiple times in relation to the 8-bit counter 501 and interrupt processing.
In this example, after the interrupt disabled period starts at timing "T0", the 8-bit counter 501 times out at timing "T1", the interrupt flag 504 is set, and an interrupt request signal is generated in the interrupt wait monitor register 301. This is an example in which information indicating that is stored, and the 8-bit counter 501 times out at timing "T2". At timing "T2", the interrupt disabled period has not yet ended. Although details will be described later, when the interrupt period (timeout period of the 8-bit counter 501) is "Tc" and the designed period of interrupt processing is "Tp", the designed maximum period of the interrupt disabled period is "Tc −Tp”. For this reason, normally, when an interrupt disabled section is started immediately after an interrupt process is finished, the next interrupt cycle comes after the interrupt disabled period ends.

On the other hand, the main processing may run out of control, or the main processing executed during the interrupt disabled period may take longer than necessary, as shown in FIG. It is conceivable that more than one time-out may occur.
Even in such a case, the 8-bit counter 501 continues to update the count value if the system clock is normal, and sets the interrupt flag 504 when timeout occurs. In the example of FIG. 69, the 8-bit counter 501 times out at timing "T1", the interrupt flag 504 is set, and information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301. showing.
After that, even if the interrupt disabled period continues, if the 8-bit counter 501 is normal, the count value continues to be updated. If information indicating that a signal has been generated is already stored, that state is maintained.
Next, when the interrupt prohibition period ends (interrupt is allowed) at timing "T3", the interrupt processing can be executed. At "T4", interrupt processing is started, and information indicating that an interrupt request signal has been generated stored in the interrupt wait monitor register 301 is cleared. Until 8-bit counter 501 next times out and interrupt flag 504 is set, interrupt wait monitor register 301 does not store information indicating that an interrupt request signal has occurred.

As described above, even if the 8-bit counter 501 times out multiple times (twice or more) during the interrupt disabled period, the interrupt wait monitor register 301 stores information indicating that an interrupt request signal has been generated. It is done once. In other words, even if the 8-bit counter 501 times out multiple times (twice or more) during the interrupt disabled period, the times out are not counted. After the interrupt disabled period ends, the number of interrupts executed is one, based on the information indicating that the interrupt request signal has been generated in the interrupt wait monitor register 301 .
In other words, the interrupt processing is not repeated (continuously) executed “n” times (n≧2) based on the 8-bit counter 501 timing out “n” times (n≧2).
Therefore, it is possible to prevent the interrupt processing from being repeated a plurality of times in succession after the end of the interrupt disabled period, and the main processing being unable to be executed during that time.
Note that each time the 8-bit counter 501 times out, the interrupt flag 504 is set, and the setting of the interrupt flag 504 is canceled at a predetermined timing thereafter.

FIG. 70 is a time chart showing an example (2) in which the 8-bit counter 501 times out multiple times in relation to the 8-bit counter 501 and interrupt processing.
In FIG. 70, information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 at timing "T1", and based on this, interrupt processing is started at timing "A1". An example is shown in which interrupt processing is not completed until the 8-bit counter 501 next times out (timing “T2”) due to an unexpected time being required or a runaway in any of the processing.
This example shows an example in which the 8-bit counter 501 timed out twice (timings "T2" and "T3") during interrupt processing started at timing "A1". During interrupt processing, when the 8-bit counter 501 times out at timing “T2”, information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 . Furthermore, after that, when the 8-bit counter 501 times out at timing "T3", the information indicating that the interrupt request signal has been generated, which is stored in the interrupt wait monitor register 301, remains stored.

After that, when the interrupt processing ends at timing "A2", the information indicating that the interrupt request signal has been generated is stored in the interrupt wait monitor register 301 at that point, so the next interrupt processing is immediately executed. do. In other words, the interrupt processing is continuously executed without executing the main processing. When executing the interrupt process, the information indicating that an interrupt request signal has been generated stored in the interrupt wait monitor register 301 is cleared (timing "T4").
Next, when the 8-bit counter 501 times out at timing "T5", information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301. FIG. On the other hand, the interrupt process started at timing "A2" ends before timing "T5". As a result, the next interrupt process is started based on the fact that information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 at timing "T5".
As described above, even if the 8-bit counter 501 times out multiple times during interrupt processing, the interrupt processing that is executed after the end of the relevant interrupt processing is executed when an interrupt request signal is generated in the interrupt wait monitor register 301. It is only once based on the fact that information indicating that there has been is stored. In other words, even if the 8-bit counter 501 times out multiple times during interrupt processing, the interrupt processing will not be executed continuously multiple times after the interrupt processing ends. Also, even if the 8-bit counter 501 times out a plurality of times (twice or more) during the execution of interrupt processing, the times are not counted.

Next, the execution timing of interrupt processing will be described.
71 to 75 described below show interrupt processing 1 to interrupt processing 4 (however, in the example of FIG. 74, interrupt processing 1 to interrupt processing 3). They are all the same processing (interrupt processing shown in FIG. 66). Specifically, for example, in the example of FIG. 71, after interrupt processing 1 (interrupt processing shown in FIG. 66) is started, interrupt processing 2 (the same processing as interrupt processing 1) is started after “Tc” has elapsed. means that
FIG. 71 is a time chart showing an interrupt cycle and the like when there is no interrupt disabled period in the main process.
As described above, the interrupt cycle "Tc" of the 8-bit counter 501 is set to "16" MHZ, the value of the prescaler register 502 to "143", and the value of the counter setting register 503 to "125". It is the period from when the value is "125" to "125" next, and corresponds to about "1.117" ms.

As shown in FIG. 71, when there is no interrupt disabled period during the period in which the interrupt process is executed four times, the interrupt process is executed for each interrupt cycle "Tc". The example of FIG. 71 shows an example in which interrupt processing is started at timings of "A1", "A2", "A3", and "A4". The time "Tp" required for one interrupt process varies depending on the content of the interrupt process, but the design value of the interrupt process time "Tp" is at least a time shorter than the interrupt cycle "Tc"(Tp<Tc). is.
Also, as in the above example, during the period of interrupt processing, an interrupt disabled state is set and the interrupt disabled flag 302 is set.

As is clear from FIG. 71, no matter what the value of the 8-bit counter 501 is, execution of interrupt processing does not return the value of the 8-bit counter 501 to "m". The value continues to be updated at regular time intervals.
Also, in FIG. 71, the period (time) of each interrupt process is illustrated as if it were constant (Tp), but in reality the period of interrupt process is not necessarily constant. For example, the current interrupt processing may take longer than the previous interrupt processing.

FIG. 72 shows an example in which an interrupt prohibition period in main processing is set between interrupt processing 1 and interrupt processing 2 . Interrupt processing 1 starts at timing "A1", and after interrupt processing 1 ends at timing "A1'", an interrupt disabled period for main processing starts at timing "T1", and the interrupt disabled period ends at timing "T2". is finished (interrupt enabled state). Here, the timing "T2" is before the start timing "A2" of the next interrupt process 2. As is clear from FIG. 72, "Td<Tc-Tp", where "Td" is the interrupt disabled period. In this way, when the interrupt disabled period is within the interval between the end of interrupt processing and the next interrupt processing, the timing of interrupt processing is restricted by the interrupt disabled period even if the interrupt disabled period is set. never Therefore, as shown in FIG. 72, even if the interrupt disabled period is set after the end of the interrupt process 1 and before the start of the interrupt process 2, after the start of the interrupt process 1, the interrupt period "Tc" arrives. Process 2 can begin.
In particular, when the interrupt disabled period "Td" that satisfies "Td<Tc-Tp" is the designed maximum period of the interrupt disabled period, the interrupt processing ends, the main processing returns, and the interrupt is disabled immediately in the main processing. When the period is set, it can be set so that the start timing of the next interrupt process comes after the end of the interrupt disabled period.

FIG. 73 is a time chart showing an example (example 1) in which the timing at which interrupt processing is scheduled to be executed is the interrupt disabled period.
In this example, after the end of interrupt process 1, the interrupt prohibition period of the main process is set at timing "T1" before timing "A2" for the next interrupt process arrives. Note that the timing "A2" is after the interruption cycle "Tc" has elapsed from the start timing "A1" of the first interruption process.
The interrupt prohibition flag 302 is set during the interrupt prohibition period. Therefore, when the timing "A2" arrives, the interrupt processing cannot be started because the interrupt prohibition flag 302 is set. In the figure, the chain double-dashed line indicates interrupt processing assuming that interrupt processing 2 is started at timing "A2" (it is not actually started).
On the other hand, immediately before timing "A2" arrives, the 8-bit counter 501 times out, so the interrupt wait monitor register 301 stores information indicating that an interrupt request signal has been generated.

After that, when the interrupt prohibition period ends at timing "T2", the interrupt prohibition flag 302 is unset. Further, the information indicating that the interrupt request signal was generated in the interrupt wait monitor register 301 at the timing "T2" remains stored. As a result, at timing "T2", the interrupt is enabled, and the second interrupt process 2 is started. FIG. 73 shows an example in which interrupt processing 2 is started at timing "A5". When the interrupt process 2 is executed, the information stored in the interrupt wait monitor register 301 is cleared. Also, when the interrupt process 2 is executed, the interrupt prohibition flag 302 is set.

Next, at the timing "A5'" at which the interrupt process 2 ends, the timing "A3" at which the third interrupt process 3 is started has not yet arrived. Therefore, the interrupt process 3 can be started when the timing "A3" arrives.
From the above, the interrupt process 2 cannot be executed at the timing "A2", but the interrupt process 2 can be executed at the subsequent timing "A5", and the interrupt process 3 can be executed at the timing "A3". The number of times is the same as when there is no interrupt disabled period.

Since the interrupt period "Tc" is kept constant regardless of whether or not there is an interrupt disabled period, the interrupt period "Tc" can be maintained. Furthermore, even if interrupt processing cannot be performed due to the interrupt disabled period, updating of the 8-bit counter 501 is not affected.
If the interrupt wait monitor register 301 stores information indicating that an interrupt request signal has been generated when the interrupt disabled period ends, the interrupt process is executed without waiting for the next interrupt cycle. However, the update of the 8-bit counter 501 is not affected.

FIG. 74 is a time chart showing an example (Example 2) in which the timing at which interrupt processing is scheduled to be executed is the interrupt disabled period.
In this example, after the interrupt process 1 ends, the interrupt disabled period of the main process starts at the timing "T1" before the timing "A2" of the next interrupt process 2 arrives. As a result, the interrupt disable flag 302 is set.
Therefore, at timing "A2", information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301, but the interrupt prohibition flag 302 is also set, so interrupt processing cannot be executed. .

Even when the interrupt period "Tc" has passed from the timing "A2" and the timing "A3" has come, the interrupt disabled period is still continuing. Therefore, at timing "A3", information indicating that an interrupt request signal has been generated is still stored in the interrupt wait monitor register 301, but the interrupt prohibition flag 302 is also set, so interrupt processing cannot be executed. . Although the 8-bit counter 501 times out at timing "A3", there is no change in the state in which the information indicating the occurrence of the interrupt request signal is stored in the interrupt wait monitor register 301. FIG.
After the timing "A3", when the interrupt prohibition period ends at the timing "T2", the set state of the interrupt prohibition flag 302 is canceled. At this time, information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 . After that, the interrupt process 2 is started at the timing "A6". When the interrupt process 2 is started, the information indicating that an interrupt request signal has been generated stored in the interrupt wait monitor register 301 is cleared, and the interrupt prohibition flag 302 is set.

In this example, the timing "A6'" at which the interrupt process 2 ends is earlier than the timing "A4", that is, the timing "3×Tc" after the timing "A1". Therefore, after interrupt processing 2 ends at timing "A6'", the 8-bit counter 501 times out at timing "T3", and information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301. be. As a result, the interrupt process 3 is started at the subsequent timing "A4". When the interrupt process 3 is started, the information indicating that an interrupt request signal has been generated stored in the interrupt wait monitor register 301 is cleared, and the interrupt prohibition flag 302 is set.

As described above, when "Tc" elapses from timing "A1" (timing "A2") and when "Tc" elapses (timing "A3") from that time point, interrupt processing cannot be executed, but interrupt processing is prohibited. Immediately after the period ends at timing "T2", interrupt processing 2 is executed. Since there is no interrupt disabled period, the interrupt process 3 can be executed at the timing "A4" at which the interrupt process 4 should be executed. As a result, the interrupt processing can be executed three times between the timing "A1" and the timing "A4", which is one less than the number of interrupt processing (four times) when there is no interrupt disabled period.
Furthermore, at the timing "A4", the interrupt period "Tc" from the timing "A1" is not collapsed. Furthermore, the update status of the 8-bit counter 501 is also constant.

FIG. 75 is a time chart showing an example (example 3) in which the timing at which interrupt processing is scheduled to be executed is the interrupt disabled period.
In this example, after the end of interrupt processing 1, the interrupt disabled period starts at timing "T1" before the next interrupt processing timing "A2" arrives, and the interrupt disabled period ends at timing "T2". be. In other words, the timing "A2" at which the interrupt process 2 should be executed arrives during the interrupt disabled period. At timing "A2", interrupt processing cannot be executed because the interrupt prohibition flag 302 is set.
However, since the 8-bit counter 501 times out immediately before timing "A2" arrives, information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 at timing "A2".
Next, when timing "T2" comes and the interrupt prohibition period ends, the interrupt prohibition flag 302 is unset. At this time, information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 . Therefore, the interrupt process 2 is started at the subsequent timing "A7".

On the other hand, during the execution of interrupt process 2, timing "T3" arrives, the 8-bit counter 501 times out, and information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301. FIG. However, since the interrupt process 2 is being executed at this time, duplicate interrupts cannot be made. In other words, the interrupt process 3 cannot be executed at the timing "A3" which is the timing at which the interrupt process 3 should be executed.
When the interrupt process 2 ends at timing "A8", the setting of the interrupt prohibition flag 302 is canceled. At this time, information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 . Therefore, the interrupt process 3 is immediately started at the timing "A8". In other words, the program (instruction) in the main process is not executed between the interrupt process 2 and the interrupt process 3, and the interrupt process 3 is started immediately after the interrupt process 2 ends. It is
However, when the interrupt process 2 ends, the IFF1 register is set to "1" by the "EI" instruction in step S2892 in FIG. Next, when the "RETI" instruction is executed in step S2893, the interrupt processing in step S2890 is started again. be. Therefore, the set state of the interrupt prohibition flag 302 is canceled for a moment between the interrupt process 2 and the interrupt process 3. FIG.
When the interrupt process 3 is started, the information indicating that an interrupt request signal has been generated stored in the interrupt wait monitor register 301 is cleared, and the interrupt prohibition flag 302 is set.
At the end of the interrupt process 3, the timing "A4" (when "3×Tc" has elapsed from the timing "A1"), which is the start timing of the interrupt process 4, has not yet arrived.

After the interrupt process 3 ends, the 8-bit counter 501 times out, and information indicating that an interrupt request signal has been generated is stored in the interrupt wait monitor register 301 . Since the interrupt prohibition flag 302 is not set at this point, interrupt processing can be executed. Therefore, interrupt processing 4 is started at timing "A4". When the interrupt process 4 is started, the information indicating that an interrupt request signal has been generated stored in the interrupt wait monitor register 301 is cleared, and the interrupt prohibition flag 302 is set.
In this way, when "3×Tc" elapses from timing "A1", interrupt processing can be started four times, and interrupt processing is executed the same number of times as when there is no interrupt disabled period for main processing. can do.

As described above, when the timing to start interrupt processing is during the interrupt disabled period, the next interrupt processing is started immediately after the interrupt disabled period ends. Furthermore, when an interrupt cycle arrives during execution of the next interrupt process, the next interrupt process is started immediately after the end of the next interrupt process. By configuring in this way, it is possible to quickly return to the situation in which interrupt processing is started when the original interrupt period arrives, while minimizing the reduction in the number of interrupts.

Although the fourth embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment, and various modifications such as those described below are possible.
(1) In the fourth embodiment, when the system clock is "16" MHZ, the prescaler register 502 is set to "143" and the counter setting register 503 is set to "143" in order to set the interrupt cycle to about "1" ms. was set to "125". Therefore, the set value of the prescaler register 502 and the counter setting register 503 fluctuate depending on how long the interrupt period is set, and are not limited to the above values. The system clock is not limited to "16" MHZ, but can be set to various values such as "12" MHZ, "24" MHZ, and the like.
For example, if the value of the counter setting register 503 is "250" under the above conditions, the interrupt cycle is
250/(16/143)=2.234 (ms)
can be
In this case, even if the value of the counter setting register 503 is "250", the value can be within 1 byte.
On the other hand, the counter setting register 503 may be a 2-byte storage area instead of a 1-byte storage area. If the counter setting register 503 is a 2-byte storage area, the 8-bit counter 501 may be replaced with a 16-bit counter 501 .

(2) In FIGS. 63, 64, and 65, the counter setting register setting process is performed before and after the RWM abnormality determination. 64 and FIG. 65 are not limited. The setting process of the counter setting register may be executed by the timing at which the interrupt process is to be started.

(3) Initialization process (FIG. 65) The process of setting the IFF1 register to "1" (processing to enable interrupts) at the time of transition uses the setting command set in step S2740, but is not limited to this. For example, the "EI" instruction may be executed after step S2747. In this way, as in steps S2740 and S2746, even if each process during the initialization process consists only of processes that do not have the "DI" and "EI" instructions, the interrupt enabled state can be established. becomes possible.
(4) The fourth embodiment can be applied not only to slot machines, but also to pinball game machines (pachinko game machines), sparrow ball game machines, casino machines, and the like.

<Fifth Embodiment>
The fifth embodiment relates to error history display.
FIG. 76 is a time chart showing the relationship (example 1) between the rotation of the reel 31 and error detection (occurrence) and notification. It should be noted that "while the reels are rotating" in this embodiment means that at least one reel 31 is rotating. Further, "stopping the reels" indicates that all the reels 31 have stopped.
Furthermore, in this embodiment, when an error occurs, it is assumed that the error is detected with almost no time lag. In other words, in this embodiment, "when an error occurs" and "when an error is detected" are assumed to be substantially the same.

Furthermore, the "error" in this embodiment corresponds to the "recoverable error" in the above-described other embodiments.
FIG. 76 shows an example in which an error is detected while the reel 31 is rotating. Types of errors in this case include, for example, selector-related errors (passage sensor 46 error due to medal retention, insertion sensor 44 error, etc.), hopper error (payout sensor 37 error due to abnormal payout, etc.), and the like. .

Note that while the reel 31 is rotating, medals are not accepted, and even if medals are inserted from the medal slot 47, they are returned by the blocker 45.例文帳に追加However, if a fraudulent act is performed while the reels 31 are rotating, there is a possibility that a selector error will be detected. Also, while the reel 31 is rotating, the hopper 35 is not driven, so medals are not paid out.
As described above, an error may be detected while the reel 31 is rotating.

When the main control board 50 detects an error (time t0), it turns on the corresponding bit (the bit corresponding to the detected error) of the abnormal input flag provided in a predetermined storage area of the RWM 53 . Also, the main control board 50 transmits the detection of an error (error command) to the sub-control board 80, but the transmission timing in this embodiment is at the time of error notification ("t1" in FIG. 76). . However, the present invention is not limited to this, and an error command may be transmitted when an error is detected, as indicated by a chain double-dashed line in FIG.
The main control board 50 determines whether or not an error has been detected in the interrupt processing. Specifically, it is determined whether or not the abnormal input flag bit is on. This determination is executed by step S463 (input error check process) in the interrupt process shown in FIG. 47, for example.

When transmitting an error command to the sub-control board 80, for example, in the interrupt processing of FIG. 47, the control command transmission processing of step S464 is performed.
If an error command is to be sent to the sub-control board 80 immediately upon detection of an error, it may be sent to the sub-control board 80 in the first interrupt process after the abnormal input flag bit is turned on. Alternatively, if an error command is to be sent to the sub-control board 80 after all reels 31 have stopped (at the timing at which an error is reported), the command is sent to the sub-control board 80 in the first interrupt process after all reels 31 have stopped. do it.

When all the reels 31 are stopped and an error command is received, the sub-control board 80 notifies the error using the performance lamp 21, the speaker 22, and the image display device 23. When the error command is transmitted at the timing of time t1 in FIG. 76, the sub-control board 80 notifies the error after all the reels 31 have stopped. In other words, no error is reported while the reel 31 is rotating.
If an error occurs on the main control board 50 side as well when all the reels 31 are stopped, the error is notified. For example, the acquisition number display LED 78 may display "En"("n" is an integer and its value indicates the type of error).

When the cause of the error is removed and the reset switch 153 (see the third embodiment, not shown in FIG. 1) is operated, the main control board 50 and the sub-control board 80 terminate the error notification. In other words, when the cause of the error is removed and the reset switch 153 is operated, the state before error detection is restored on condition that no error is detected. Therefore, even if the cause of the error is removed, the state before the error detection is not restored unless the reset switch 153 is operated. When the reset switch 153 is operated and no error is detected, the abnormal input flag bit stored in the RWM 53 of the main control board 50 is turned off.
Furthermore, the sub-control board 80 stores an error history (data) in a predetermined storage area of the RWM 83, and displays the error history upon request. Note that the error history of the sub-control board 80 is not erased when the power is turned on or off or when the setting is changed. Unless a serious error (unrecoverable error) occurs in the RWM of the sub-control board 80, the error history is not erased.

77A and 77B are diagrams showing examples of image display of the error history including the progress of FIG.
In the fifth embodiment, power off, power on, door open, and door close are not errors themselves, but are displayed together with the error history.
Further, when the state is changed to the setting confirmation state or the setting change state, the error history screen is not displayed, and the setting change history screen (not shown) separate from the error history screen is displayed.
Furthermore, although the history of detected errors is displayed, recovery from errors is not displayed on the error history screen. However, it is not limited to this, and error recovery may also be displayed on the error history screen.

The error history can be displayed, for example, in the setting confirmation state. The setting confirmation process in this embodiment is the same as the setting change confirmation process shown in FIG. 45 (third embodiment). Specifically, as described in the third embodiment, when the setting key switch 152 is turned on in a state where the number of bets is "0" during game standby (before the game starts), D The register is set to store "1". Then, in step S2755 in FIG. 45, the main control board 50 stores the D register value in the A register and determines whether or not the A register value is "1". When the A register value is "1", the main control board 50 determines that it is time to confirm the settings, and proceeds to step S2760. After determining whether the A register value is "1", the C register value is stored in the A register. As described in the third embodiment, since the A register value is stored in the C register in step S2752, the set value data is stored in the C register. Therefore, when the C register value is stored in the A register, the A register value becomes set value data.

In this manner, when the setting key switch 152 is turned on in a situation where the number of bets during game standby is "0", the setting confirmation state is entered. In the setting confirmation state, the current setting value is displayed on the setting value display LED 73 and the menu screen for the administrator of the gaming machine 10 is displayed on the image display device 23 . In this menu, an item of "error history" is provided, and when "error history" is selected with the four-way controller and a decision operation is performed (in this case, the push button is turned on), the display shown in FIG. 77 is displayed. error history screen is displayed.

For example, in FIG. 77A, “January 29, 2021, 13:27:45”, which is the time of the ◯× error of error number “003”, corresponds to time t1 in FIG. In other words, for example, if an error is reported at time t1 after 3 minutes have passed since the error was detected (time t0 in the figure), the actual An error was detected in
However, as described above, by displaying the start date and time of the error notification as the time of the error, even if the error is detected during rotation of the reel 31 and it takes time from the time of detection of the error to the time of notification, Since there is no deviation between the timing when the error is reported and the displayed error time, the administrator may be made aware that there is a problem with the gaming machine 10, or the possibility of fraud being committed. It can be made not to recognize that there is.
As described above, when displaying the time of recovery from an error in the error history, "Ox error recovery" is displayed together with the time between the error numbers "001" and "002" in the figure. .

In FIG. 77A, the date and time when the sub-control board 80 started the error notification is displayed as the error time. The sub-control board 80 associates and stores the error content and time. Information about the time is obtained using, for example, an RTC (real time clock) function provided in the sub-control board 80 .
On the other hand, FIG. 77B is an example of displaying the elapsed date and time from the current time as the time. Thus, the actual time may be displayed as shown in FIG. 77(A), or the elapsed time and date from the current time may be displayed as shown in FIG. 77(B).
Further, although "time" is displayed in the example of FIG. 77, it may be displayed as "notification time", "occurrence time", or "detection time".
However, even when the "occurrence time" and "detection time" are displayed, the actual error occurrence time and detection time are not displayed, and the actual error notification is started.

In the example of FIG. 76, when an error is detected while the reel 31 is rotating, the detected error cannot be notified immediately because the reel 31 is rotating, so the error is notified after the reel 31 stops. The reason why an error is not notified while the reels 31 are rotating when an error is detected during the rotation of the reels 31 is that priority is given to progressing the game (stopping the spinning reels 31) over error notification. be.
On the other hand, when an error is detected while the reels 31 are not rotating (for example, during game standby after all the reels 31 have stopped), an error command is immediately sent to the sub-control board 80, and the sub-control board 80 An error is reported (corresponding to the first error in FIG. 82, which will be described later). Therefore, in this case, the time displayed in the error history coincides with the time when the error was detected.

Example 2 of FIG. 78 is a time chart showing a case where the setting is changed after an error is detected while the reel 31 is rotating.
Here, in the above-described third embodiment, the gaming machine 10 is provided with a setting change prohibition flag. When the start switch 41 is operated (when the reels 31 start rotating), the setting change disable flag is turned on, and when all the reels 31 stop, the setting change disable flag is turned off. In this case, when the setting change disable flag is on, the setting change state cannot be entered. When the power is turned off while the reel 31 is rotating, it is memorized that the setting change disable flag is on. is turned on), it does not transition to the setting change state.
On the other hand, in the fifth embodiment, it is assumed that the setting change prohibition flag in the third embodiment is not provided. Therefore, when the power is turned off while the reel 31 is rotating and the power is turned on with the setting key switch 152 turned on, it is possible to shift to the setting change state.

When an error is detected during rotation of the reel 31, "1" is stored in the corresponding bit of the abnormal input flag provided in the RWM 53 of the main control board 50, as described above.
Further, when the power is turned off while the reel 31 is rotating, the power supply to the motor 32 for driving the reel 31 is cut off, so that the reel 31 stops rotating thereafter. Next, when the front door is opened and the power is turned on with the setting key switch 152 turned on, as shown in FIGS. 45).

Here, when the initialization process (FIG. 44) is executed, the abnormal input flag in the storage area of the RWM 53 of the main control board 50 is also initialized ("RWM clear when setting is changed" in FIG. 78). . Therefore, when the game machine 10 starts up via the setting change state, the error data detected before the setting change process is erased. Therefore, when the game machine 10 starts up via the setting change state, the error detected before shifting to the setting change state (error based on the data stored in the abnormal input flag) is not reported.

As described above, as in Example 2 of FIG. 78, when an error is detected during rotation of the reel 31 and passes through the setting change state, the error is detected while the reel 31 is rotating and before transition to the setting change state. Since the error detection data is erased by the RWM clear processing in the setting change state, the error will not be notified after the setting change processing state ends.
In addition, in this example 2, by going through the setting change state, the data of the error detected before shifting to the setting change state is erased. No error command is sent to 80 either. When the power is turned on with the setting key switch 152 turned on, the first interrupt processing is after step S2740 as shown in FIG. In this case, since the initialization process has already been executed in step S2732, the error command stored before the power-off is erased when the first interrupt process is executed. Therefore, the error command will not be transmitted to the sub-control board 80 even if the process shifts to the interrupt process (FIG. 47) and the control command transmission process of step S464 in FIG.
Therefore, it is stored as an error history in the RWM 83 of the sub-control board 80 and is not displayed.

FIG. 79 is a diagram showing the error history screen of FIG. 78 (Example 2). In FIG. 79, the power off of error number "004" corresponds to time t3 in FIG. Also, the power-on of the error number "003" corresponds to time t4 in FIG.
In this example, after the power is turned off, the door is opened, and after the setting key switch 152 is turned on, the power is turned on. Therefore, door opening is detected at the same time when the power is turned on. Then, setting change processing is performed between error numbers "001" and "002", and then the door is closed. As described above, the setting change process is not displayed on the error history screen.

As described above, since the error data detected before shifting to the setting change state (before the power is turned off) is erased, the error is not notified even after the setting change state ends, and is also displayed in the error history. not.
Therefore, errors that have not been reported are not displayed as an error history, so that consistency between reported errors and errors displayed as history can be achieved, and misunderstandings by the administrator can be prevented. In other words, an unreported error is never displayed as an error history.

FIG. 80 is a time chart showing a case (example 3) where multiple errors are detected during the setting confirmation state.
In FIG. 80, the transition from the game standby state to the setting confirmation state is the same as described above.
In this example, it is assumed that first the first error is detected and then the second error is detected during the setting confirmation state. Similar to the above, the first error and the second error include selector errors (errors related to the path sensor 46 and the input sensor 44) and hopper errors (errors related to the dispensing sensor 37).
When the first error and the second error are respectively detected during the setting confirmation state, the main control board 50 stores information about the type of the detected error in the storage area of the RWM 53 in the same manner as described above at the time the error is detected. memorize
In the setting confirmation state, similarly to when the reel 31 is rotating, even if an error is detected, the error is not notified, and the error is notified after the setting confirmation state ends. This is because the control processing of the setting confirmation state has priority over the notification of the error.

After ending the setting confirmation state, the main control board 50 first transmits an error command based on detection of the second error to the sub control board 80 (time t5 in the figure). The sub-control board 80 notifies of the second error based on the reception of the error command. In other words, when the errors are detected in the order of the first error and the second error in the setting confirmation state, the errors are notified in the order of the second error and the first error after the setting confirmation state is completed (in the order of the detected errors). and vice versa). When the sub-control board 80 receives a second error command from the main control board 50, it stores the content of the second error as an error history in a predetermined storage area of the RWM 83 in association with the notification start date and time.
The notification of the second error by the sub-control board 80 continues until the cause of the second error is removed, and when the main control board 50 determines that the cause of the second error has been removed, it issues a command to that effect. It is transmitted to the sub-control board 80 . When the sub-control board 80 receives the command, it ends the notification of the second error.

Further, when the cause of the second error is removed, the main control board 50 next transmits an error command based on the detection of the first error to the sub control board 80 (time t6 in the figure). The sub-control board 80 notifies the first error based on the reception of the error command. When the sub-control board 80 receives the first error command from the main control board 50, it associates it with the notification start date and time and stores the content of the first error as an error history in a predetermined storage area of the RWM 83.
The notification of the first error continues until the cause of the first error is removed, and when the main control board 50 determines that the cause of the first error has been removed, it sends a command to that effect to the sub-control board 80. do. When the sub-control board 80 receives the command, it ends the notification of the first error.
As in Example 1 of FIG. 76, the first error command is sent to the sub-control board 80 when the first error is detected (two-dot chain line in the figure), and the second error command is sent when the second error is detected. may be transmitted to the sub-control board 80 (two-dot chain line in the figure).

Here, in Example 3 of FIG. 80, it is assumed that the priority of notification of the first error and the second error is the same (the priority of notification is not superior or inferior).
On the other hand, there are cases where priority is set for error reporting. For example, if the notification priority of the first error is higher than the notification priority of the second error, the notification of the first error is performed first after the setting confirmation state is completed, and the cause of the first error is eliminated. A second error will be reported.
Also, in this case, the first error is displayed first, and then the second error is displayed in the error history according to the error notification order.

81 is a diagram showing the error history in Example 3 of FIG. 80. FIG. In this example, after the door of error number "004" is opened, the setting confirmation state is entered, and at the end of this setting confirmation state, the second error of error number "003" is detected. Note that the "setting confirmation state" may or may not be displayed in the error history.
After removing the cause of the second error, the first error is notified. In the error history, the first error is displayed as error number "002" (time t6 in FIG. 80). In this way, since the error history is also in the order of the second error and the first error, it matches the notified error order. Therefore, it is possible to eliminate the difference between the error notification order and the history display order, thereby avoiding misunderstandings by the administrator.
As described above, in the present embodiment, when a plurality of errors occur under conditions in which error notification is not possible, when the condition becomes available for error notification, errors detected later are sequentially notified. It is designed to

FIG. 82 is a time chart showing a case (example 4) in which the first error and the second error are detected during game standby (after all reels 31 have stopped and before the start switch 41 is operated (before the game starts)). be.
Since the reels 31 are not rotating or the settings are being confirmed during game standby, when an error is detected, the detected error can be notified immediately.
First, when the main control board 50 detects the first error during game standby, it transmits a first error command to the sub control board 80 . When the sub-control board 80 receives the command for the first error, it starts reporting the first error (time t7 in the figure). The received first error information is stored in the error history in association with the notification start time information.
After detecting the first error, if the second error is detected before the cause of the first error is removed (during the notification of the first error), the main control board 50, as will be described later, Similarly, it is transmitted to the sub-control board 80 at the timing when the notification of the second error becomes possible (time t8 in the drawing). However, it is not limited to this, and a second error command may be sent to the sub-control board 80 when the second error is detected (two-dot chain line in the figure).

When the cause of the first error is removed, the main control board 50 transmits information to that effect to the sub control board 80 . When the sub-control board 80 receives the information indicating that the cause of the first error has been removed, it ends the notification of the first error.
On the other hand, when the main control board 50 detects that the cause of the first error has been eliminated, it transmits a second error command to the sub-control board 80 . When the sub-control board 80 receives the second error command, it starts reporting the second error (time t8 in the figure). The received second error information is stored in the error history in association with the notification start time information.
When the cause of the second error is removed, the main control board 50 transmits information to that effect to the sub control board 80 . When the sub-control board 80 receives the information indicating that the cause of the second error has been removed, it ends the notification of the second error.
As described above, when errors are detected in the order of the first error and the second error during game standby, unlike during the setting confirmation state, the first error and the second error are notified in the order. This is because there is no need to suspend notification of the first error when the first error is detected, and notification of the first error can be started immediately.

83 is a diagram showing the error history in Example 4 of FIG. 82. FIG. In this example 4, when the first error is notified, the history of the first error is displayed in the error number "004". The time of the first error with error number "004" corresponds to time t7 in FIG. Further, when the cause of the first error is removed, the second error is reported next, and the second error is displayed with the error number "002". The time of the second error with error number "002" corresponds to time t8 in FIG.
Therefore, the notification order of the first error and the second error matches the error history order.

Also, although not exemplified in this embodiment, when errors are continuously detected, the following processing is performed.
For example, when a medal retention error of the selector (an error of the insertion sensor 44 ) is detected during game standby, a medal retention error command is transmitted to the sub-control board 80 . As a result, the sub-control board 80 notifies the medal retention error.
Next, it is assumed that the medal retention error occurs again as a result of inserting medals from the medal slot 47 before the administrator operates the reset switch 153 after removing the medal retention error. In this case, the main control board 50 does not retransmit the medal retention error command to the sub control board 80 . Then, when the manager removes the medal retention error again and operates the reset switch 153, it is determined whether or not the cause of the error has been removed. It is sent to the substrate 80 . When the sub-control board 80 receives the information, it ends the notification of the medal retention error.

In this way, for example, even if the main control board 50 detects two medal retention errors, the medal retention error command is transmitted to the sub-control board 80 before the reset switch 153 is operated. only once. Therefore, the error history by the sub-control board 80 displays one medal retention error.
Although the medal retention error is exemplified above, it is not limited to the medal retention error, and applies to other errors that are recovered by operating the reset switch 153 after removing the cause of the error.

<Sixth embodiment>
The sixth embodiment relates to the structures of the main control board 50 , the socket (also referred to as “chip socket”) 56 and the main chip 55 .
In the sixth embodiment and the seventh embodiment described later, "mounting" means mounting various electronic components (CPU, ROM, RAM, resistors, connectors, 7 It refers to functioning (operating) as an electronic circuit by soldering or attaching a segment display, etc.) to a socket.
Further, the "main chip 55" in this embodiment, as described with reference to FIG. 32 (third embodiment), includes a main CPU 55 and an internal memory, and further includes a ROM 54 and an RWM 53 in this internal memory. shall refer to a chip microprocessor.

FIG. 84 is an external perspective view showing the main control board 50, the socket 56, and the main chip 55 not attached to the socket 56 in the sixth embodiment.
The socket 56 is mounted with the main chip 55 and is for electrically connecting the main chip 55 and the main control board 50 . The socket 56 is mounted at a predetermined position on the main control board 50 . Although the details will be described later, the socket 56 is made of a transparent resin material (as long as the hollow portion 56a inside can be visually observed, and may be translucent). A top surface of the socket 56 is formed with a pin insertion opening 56c into which the pin 55a (terminal) of the main chip 55 is inserted.
84, the resistor 50a is also shown on the main control board 50 so that the height of the resistor 50a and the height of the notch 56e of the socket 56 can be compared. Details of this point will be described later.

FIG. 85 is a plan view (viewed vertically downward from above) showing in more detail the main chip 55 mounted in the socket 56. FIG. 86 is an arrow view (front view) seen from the Z1 direction in FIG. 85. FIG. Furthermore, FIG. 87 is an arrow view (side view) seen from the Z2 direction in FIG.
Here, in FIG. 85, the "upper side of the drawing" and the "lower side of the drawing" are defined as shown.
The pins 55a of the main chip 55 consist of "71" in this example. Here, "pin 55a(1)" refers to the first pin 55a, "pin 55a(2)" refers to the second pin 55a, ..., "pin 55a(71)" refers to The 71st pin 55a shall be pointed out.

A substantially circular recess 55b is provided at substantially the center of the upper and lower edges of the main chip 55 in the longitudinal direction (horizontal direction in the figure).
Among the 71 pins 55a, the lower edge in the longitudinal direction of the main chip 55 is located at the first pin 55a(1) to the 35th pin 55a(35) except for the portion where the recessed portion 55b is formed. ) are provided. Similarly, the upper edge in the longitudinal direction of the main chip 55 is provided with the 36th pin 55a (36) to the 71st pin 55a (71) except for the portion where the recessed portion 55b is formed. .
Also, among the 1st to 71st pins 55a, the 17th (pin 55a (17)), the 35th (pin 55a (35)), the 54th (pin 55a (54)), and the 71st (pin 55a ( 71)) serves as a GND (ground) line. Pins other than these four are signal lines.

Here, the 35th pin 55 a ( 35 ) is positioned at the right end of the lower edge of the main chip 55 , and the 71st pin 55 a ( 71 ) is positioned at the left end of the upper edge of the main chip 55 . The 17th pin 55a (17) and the 54th pin 55a (54), which are the GND lines, are located adjacent to the recess 55b.
When the worker grips the main chip 55, first, he/she presses and holds the vicinity of the 35th pin 55a (35) and the 71st pin 55a (71). By having a corner), it is possible to have the vicinity of the GND line, so that the number of signal lines touched by the operator's finger can be reduced accordingly.

Secondly, it is possible to hold the main chip 55 so as to grip the vicinity of the depressions 55b on the lower and upper edges of the main chip 55. FIG. Having the recessed portion 55b makes it easier to hold the main chip 55.例文帳に追加Furthermore, when holding the recessed portion 55b, by holding and holding the vicinity of the 17th pin 55a (17) and the 54th pin 55a (54), it is possible to have the vicinity of the GND line in the same manner as described above. Therefore, the number of signal lines touched by the operator's finger can be reduced accordingly.

A two-dimensional code 55e is printed on the upper surface of the main chip 55 in the left area. A model number sticker 55f displaying the model number of the gaming machine 10 is attached to the right area. The area where the two-dimensional code 55e is printed and the area where the model number sticker 55f is attached are flat surfaces (surfaces without steps). In particular, displaying the two-dimensional code 55e on a flat surface makes it easier to read the two-dimensional code. Further, by providing the model number sticker 55f on a flat surface, it becomes easier to read the information displayed on the model number sticker 55f. Furthermore, by attaching the model number seal 55f to a flat surface, it becomes difficult to peel off.
Further, a substantially semicircular stepped portion 55c is formed on the left edge of the main chip 55. As shown in FIG. This stepped portion 55c and stepped portions 55d and 55i described below are all recessed from the surface.
The stepped portion 55c is recessed in a substantially semicircular region.
A stepped portion 55d is formed near the stepped portion 55c and closer to the pin 55a(1). The stepped portion 55d has a substantially circular region that is recessed, and a number “1” is displayed within the substantially circular region. The portion with the number "1" may be recessed further than the substantially circular region, or conversely, may be formed to be more convex than the substantially circular region (provided that it is located above the surface of the main chip 55). do not protrude upwards). Also, although the number "1" is shown in this example, other numbers, symbols, and the like may be used.

On the upper surface of the main chip 55, between the two-dimensional code 55e and the model number sticker 55f, a product name 55g (bold line characters in the figure) and a company name 55h (dotted line characters in the figure) are displayed. The product name 55g is printed. Further, the company name 55h has a step portion 55i.
FIG. 88A is an enlarged view of the product name 55g and company name 55h. In addition, (B) of the same figure is a cross-sectional view taken along line Z3-Z3 in (A).
As shown in FIG. 88, a region corresponding to the line thickness of the company name 55h is recessed from the surface to form a stepped portion 55i.
FIG. 89 is a cross-sectional view showing the relationship between the stepped portion 55c (semicircular portion), the stepped portion 55d (the circular portion in which the number "1" is displayed), and the stepped portion 55i.
When the depth of the stepped portion 55c is D1, the depth of the stepped portion 55d is D2, and the depth of the stepped portion 55i is D3, the magnitude relationship is "D1>D2>D3". By making the depths of the three stepped portions 55c, 55d, and 55i different in this manner, counterfeiting is made difficult.
Furthermore, since the depths of the plurality of stepped portions 55c, 55d, and 55i are different, the operator can grasp the mounting orientation by touching the top surface of the main chip 55. FIG.

Further, as shown in FIG. 88(A), at least part of the product name 55g is arranged so as to overlap with the company name 55h. In this example, the product names "B" and "C" overlap the company name "A", the product names "D", "E" and "F" overlap the company name "B", and the product name ""G" overlaps with the "C" of the company name.
In other words, the letters "BCDEFG" in the product name "ABCDEFG" are arranged so as to overlap the step portion 55i. By displaying the product name 55g in this way, counterfeiting is made difficult.
For example, after printing the product name 55g, if an attempt is made to form the company name 55h with the stepped portion 55i, the portion of the product name 55g that overlaps the stepped portion 55i may be erased.
On the other hand, when the product name 55g is printed after forming the company name 55h having the stepped portion 55i, the product name 55g overlapping the stepped portion 55i may not be printed clearly.

Furthermore, hidden characters 55j are displayed in the characters of the product name 55g. The size of each character of the hidden characters 55j is equal to or less than the line thickness of the characters of the product name 55g.
As shown in FIG. 88(A), the character "A" of the hidden character 55j is displayed within the line of the character "C" of the product name 55g. Similarly, the letter "B" of the hidden letter 55j is displayed within the line of the letter "D" of the product name 55g, and the letter "C" of the hidden letter 55j is displayed within the line of the letter "E" of the product name 55g. ing.
Further, among the characters "A", "B", and "C" of the hidden characters 55j, the characters "A" and "C" of the hidden characters 55j are arranged so as to straddle the stepped portion 55i of the company name 55h.
Therefore, the letter "C" of the product name 55g and the letter "A" of the hidden letter 55j are displayed so as to straddle the stepped portion 55i of the letter "A" of the company name 55h.
Similarly, the character "E" of the product name 55g and the character "C" of the hidden character 55j are displayed so as to straddle the stepped portion 55i of the character "B" of the company name 55h.
This configuration makes counterfeiting more difficult. Also, by confirming the presence or absence of the hidden characters 55j, it is possible to determine whether or not it is forged.

The main body of socket 56 is made of, for example, a transparent resin material as described above. Furthermore, as shown in FIG. 87, socket pins 56d (terminals) are provided inside the socket 56 at positions corresponding to the pins 55a of the main chip 55 to be mounted. Note that FIG. 87 shows only the 35th socket pin 56d (35) and the 36th socket pin 56d (36), and the illustration of the socket pin 56d is omitted in FIG. It has socket pins 56d(1) to 56d(71) that are connected to pins 55a(1) to 55a(71) of the chip 55, respectively.
By soldering the socket pins 56d(1) to 56d(71) of the socket 56 to the main control board 50, the socket pins 56d and the main control board 50 are electrically connected, and the socket 56 is connected to the main control board 50. is implemented in
When the main chip 55 is attached to the socket 56, the pins 55a(1) to 55a(71) of the main chip 55 and the socket pins 56d(1) to 56d(71) of the socket 56 are electrically connected. Connected. Thereby, the main chip 55 and the main control board 50 are electrically connected. After the main chip 55 is attached to the socket 56 , the main chip 55 is coupled so that it cannot be easily pulled out from the socket 56 .

As shown in FIG. 85, on the surface of the main control board 50, mark numerals 50b and marks 50c are printed around the area where the sockets 56 are mounted.
The marker number 50b includes a marker number 50b (1) displaying the number "1", a marker number 50b (35) displaying the number "35", a marker number 50b (36) displaying the number "36", and a number " It has four of the landmark numerals 50b (71) displaying "71".
These four marker numerals 50b(1), 50b(35), 50b(36), and 50b(71) are associated with pins 55a(1) and 55a(35) of the main chip 55, respectively. ), pin 55a (36), and pin 55a (71) correspond to each other. Specifically, when the main chip 55 is attached to the socket 56 and viewed vertically downward from above the main chip 55, the pin 55a(1) is positioned near the index number 50b(1) and the pin 55a (35) is located near the marker number 50b (35), the pin 55a (36) is located near the marker number 50b (36), and the pin 55a (71) is located near the marker number 50b (71). It is located.

Furthermore, on the surface of the main control board 50, there are six marks 50c(5), 50c(10) and 50c(15) between the mark number 50b(1) and the mark number 50b(35). , a mark 50c (20), a mark 50c (25), and a mark 50c (30) are printed. These marks 50c are printed with dots.
In FIG. 85, when the main chip 55 is mounted in the socket 56 and viewed vertically downward from above the main chip 55, a mark 50c (5) is positioned substantially directly below the pin 55a (5) of the main chip 55. is located, the mark 50c (10) is located approximately directly below the pin 55a (10), the mark 50c (15) is located approximately directly below the pin 55a (15), and the mark is approximately directly below the pin 55a (20). 50c (20) is positioned, the mark 50c (25) is positioned substantially directly below the pin 55a (25), and the mark 50c (30) is positioned substantially directly below the pin 55a (30).

On the other hand, on the surface of the main control board 50, between the mark number 50b (36) and the mark number 50b (71), there are seven marks 50c (40), 50c (45), 50c (50), A mark 50c (55), a mark 50c (60), a mark 50c (65), and a mark 50c (70) are printed. These marks 50c are printed with dots in the same manner as the marks 50c described above.
85, when the main chip 55 is mounted in the socket 56 and viewed from above the main chip 55 vertically downward, the main control board 50 is positioned substantially directly above the pins 55a (40) of the main chip 55. The mark 50c (40) is positioned, the mark 50c (45) is positioned substantially directly above the pin 55a (45) of the main chip 55, and the mark 50c (50) is positioned substantially directly above the pin 55a (50). The mark 50c (55) is positioned substantially directly above the pin 55a (55), the mark 50c (60) is positioned substantially directly above the pin 55a (60), and the mark 50c (60) is positioned substantially directly above the pin 55a (65). The mark 50c (65) is positioned, and the mark 50c (70) is positioned substantially directly above the pin 55a (70).

With the above configuration, when the main chip 55 is mounted in the socket 56 and viewed from directly above, the pin numbers of the main chip 55 can be easily known. For example, in FIG. 85, the pin 55a (36) of the main chip 55 positioned substantially directly below the index number 50b (36) can be easily known to be the "36"th pin. Also, for example, the pin 55a (17) (GND) is easily the "17"th pin 55a by the mark number 50b (1), the mark 50c (5), the mark 50c (10), and the mark 50c (15). I understand.

In FIG. 85, a stepped portion 56b (56b(1) and 56b(71)) is formed on the left end portion of the surface (top surface) of the socket 56 . The step portion 56b(1) has a substantially rectangular area recessed from the surface, and the number "1" is displayed within the substantially rectangular area. Although the amount of depression of the stepped portion 56b is arbitrary, for example, it may be approximately the same as the amount of depression of the stepped portion 55c of the main chip 55. FIG.
Also, the number "1" of the stepped portion 56b(1) is displayed in a direction rotated counterclockwise by 90 degrees in FIG. Therefore, when the main chip 55 is attached to the socket 56, the number "1" displayed on the stepped portion 55d of the main chip 55 and the number "1" displayed on the stepped portion 56b(1) of the socket 56 are are shifted by 90 degrees. By doing so, when the main chip 55 and the socket 56 are viewed in the direction of the drawing shown in FIG. 85, the number "1" displayed on the stepped portion 55d of the main chip 55 is in the correct direction.
Therefore, when the main control board 50 is attached to the game machine 10 in the orientation shown in FIG. 85, the number "1" displayed on the stepped portion 55d of the main chip 55 can be seen in the correct orientation. On the other hand, when the main control board 50 is attached to the gaming machine 10 in an orientation rotated clockwise by 90 degrees from the orientation of the drawing shown in FIG. The "1" can be viewed in the correct orientation. Therefore, even if the main control board 50 is attached to the gaming machine 10 in any of the above orientations, the numbers on either the stepped portion 55d of the main chip 55 or the stepped portion 56b(1) of the socket 56 can be viewed in the correct orientation. Therefore, it is possible to easily confirm the pin number when mounting the main chip 55 to the socket 56 .

The orientation of the main chip 55 can also be confirmed by looking at the position of the stepped portion 55c. That is, in the main chip 55, the side having the step portion 55c is the pin number "1" and "71" sides.
When the main chip 55 is viewed from above, only the lower left corner of the main chip 55 in FIG. 85 is chamfered. The chamfered corner side has the pin number "1". Therefore, the position of the pin number "1" can be easily confirmed only by confirming the chamfered corner.

Furthermore, the stepped portion 56b (71) has a substantially rectangular area recessed from the surface, and the number "71" is displayed within the substantially rectangular area. Like the number "1" of the step portion 56b(1), the number "71" of the step portion 56b(71) is also displayed in the direction rotated counterclockwise by 90 degrees in FIG.
When the main chip 55 is attached to the socket 56, the first pin 55a(1) of the main chip 55 is positioned near the stepped portion 56b(1) of the socket 56, and the 71 The second pin 55 a ( 71 ) (GND) is positioned near the stepped portion 56 b ( 71 ) of the socket 56 .

The stepped portion 56b(1) and the stepped portion 56b(71) of the socket 56 are also provided with depressions in which numerals are displayed, thereby making the socket 56 difficult to forge.
Also, the number of pins 55a of the main chip 55 is "71", that is, an odd number, and in FIG. 85, the number is "35" on the lower side and "36" on the upper side. Since the socket 56 side is also shaped so that these pins 55a can be inserted, the main chip 55 cannot be mounted in the opposite direction (insert the side having 36 pins 55a downward in the drawing). As a result, erroneous mounting can be prevented. When the main chip 55 is attached to the socket 56, the number "1" displayed on the stepped portion 55d of the main chip 55 and the number "1" displayed on the stepped portion 56b(1) of the socket 56 are , the main chip 55 can be attached to the socket 56 in the correct orientation.

Furthermore, when the main chip 55 is attached to the socket 56, the number "1" of the step portion 56b(1) makes it easy to identify the pin 55a(1) of the main chip 55 as the "1"th pin 55a. can be verified. Similarly, it can be easily confirmed that the pin 55a (71) (GND) of the main chip 55 is the "71"th pin 55a from the number "71" of the step portion 56b (71).

As shown in FIG. 86, two notches 56e (height H1) are formed in the bottom portion of the socket 56 in the longitudinal direction. Further, as shown in FIG. 87, a notch portion 56f (height H2) is formed in the bottom portion of the socket 56 in the lateral direction. With these notches 56e and 56f, it is possible to visually confirm that no unauthorized parts are attached to the bottom surface of the socket 56. FIG. As described above, since the main body of the socket 56 is made of a transparent or translucent resin material, it is possible to visually confirm that there are no unauthorized parts inside (the hollow portion 56a). With 56e and 56f, it is possible to visually confirm that there is no illegal component on the contact surface between the socket 56 and the main control board 50. FIG.
Here, as shown in FIG. 87, a socket pin 56d is provided inside the socket 56. As shown in FIG. Therefore, if the height H1 of the notch 56e is excessively high in the longitudinal direction of the socket 56 (the side on which the socket pins 56d are aligned), it becomes possible to insert a wire or the like through the notch 56e. There is a risk that it will be

However, in this embodiment, as shown in FIG. 86, the height H1 of the notch 56e is lower than the height H3 of the resistor 50a mounted on the main control board 50 (H1<H3). Specifically, height H1 of notch 56e is, for example, less than "1" millimeter, and height H3 of resistor 50a is, for example, about "1" to "3" millimeters. It should be noted that the height H3 of the resistor 50a is assumed to be the lowest resistor among the plurality of types of resistors mounted on the main control board 50. FIG.
As described above, it is difficult to insert a foreign object such as a wire through the notch 56 e of the socket 56 . As a result, it is difficult to access the socket pin 56d through the notch 56e, so that it is possible to suppress the misbehavior.

<Seventh Embodiment>
The seventh embodiment relates to the positional relationship between the board and the electronic component.
In the seventh embodiment, the "board" includes the above-described main control board 50 and sub-control board 80, other control boards connected to the main control board 50 and sub-control board 80, relay boards, and the like. be done.
In addition, "electronic parts" include (cable) connectors, 7-segment displays, and the like. When the electronic component is a 7-segment display, for example, a set value display LED 73 (1 digit), a credit number display LED 76 (2 digits), an acquired number display LED 78 (2 digits), and a management information display LED (role ratio monitor) 74 (4 digits) (see FIGS. 1 and 36).
Further, in the present embodiment, the "front surface" of the substrate refers to the surface on which predetermined electronic components are mounted (so-called "component surface"), and the "back surface" refers to the surface opposite to the surface on which predetermined electronic components are mounted. side surface (so-called “solder surface”).

In the seventh embodiment, by providing a predetermined amount of gap between the substrate and the bottom surface of the predetermined electronic component (the surface facing the substrate), it is possible to prevent unauthorized components from being placed between the bottom surface of the predetermined electronic component and the substrate. It is possible to visually confirm whether or not any of the parts is attached. Under the condition that the board is attached to the game machine 10, depending on the position where the board is attached, the gap may not be easily visually confirmed depending on the attachment position.
However, when assembling the game machine 10 or during maintenance after installation of the game machine 10, the operator can easily visually confirm the gap.
Furthermore, as will be described later, by illuminating the gap with an LED, it is possible to check the gap even in a dim environment after the substrate is installed in the housing of the gaming machine 10 .

90A and 90B are diagrams showing the positional relationship (example 1) between a substrate and a predetermined electronic component in the seventh embodiment, where (A) shows a plan view and (B) shows a front view.
The “predetermined electronic component” in Example 1 corresponds to the connector 57 .
FIG. 91(A) is a view viewed from the Z4 direction in FIG. 90(A), and the illustration of the substrate is omitted. Also, FIG. 90(B) is a view viewed from the Z5 direction (bottom side of the connector) in FIG. 90(B), and illustration of the substrate is omitted.
In the example of FIG. 90, a connector 57 is mounted on the board. The connector 57 corresponds to a cable connector for connecting with another board (for example, the main control board 50) with a cable.

Further, as shown in FIG. 91(B), a plurality of legs 57a are formed on the bottom side of the connector 57. As shown in FIG. As a result, the entire area of the bottom surface of the connector 57 does not come into contact with the board, and only the foot 57a of the connector comes into contact with the board. A gap is formed. In other words, the connector 57 is arranged so as to float from the substrate surface by the height of the leg portion 57a.
With such a configuration, the gap between the connector 57 and the substrate can be visually confirmed, and it can be confirmed whether an illegal component or the like is attached.

The lead wires 57b of the connector 57 are arranged in two rows as shown in FIG. 91(B), and are arranged so as to avoid the legs 57a. As a result, when viewed from the front as shown in FIG. 90B or viewed from the back as shown in FIG. Therefore, it is possible to correctly determine whether or not an illegal component or the like is attached to the gap between the board and the connector 57 .
As shown in FIG. 91(A), the lead wire 57b is visible when viewed from behind the connector 57, but when viewed from directly above the connector 57, as shown in FIG. 90(A). The lead wire 57b is configured so as not to be seen.
For example, if this board is installed inside the game machine 10 (for example, inside the housing, behind the front door, etc.), it is installed in a form that looks like FIG. 90(A) when the front door is opened. If this is done, the lead wire 57b of the connector 57 cannot be seen from that position, so security can be enhanced.

92A and 92B are diagrams showing the positional relationship (example 2) between a substrate and a predetermined electronic component in the seventh embodiment, where (A) shows a plan view and (B) shows a side view (enlarged view). .
The substrate of Example 2 corresponds to the display substrate 75 shown in FIG. 36 (third embodiment). Also, the “predetermined electronic component” corresponds to the credit number display LED 76 and the acquired number display LED 78 .
To explain the overview of the display board 75 again, as shown in FIG. 1, the display board 75 is a board that is electrically connected to the main control board 50, so it is preferable that anti-tampering measures are taken.

As shown in FIG. 92, on the display substrate 75, a credit number display LED 76 and an acquired number display LED 78 are mounted. Each of these consists of two (upper and lower digits) 7-segment displays juxtaposed.
In addition, on the display substrate 75, six status display LEDs 79 are mounted below the credit number display LED 76 and the acquired number display LED 78 in FIG. 92(A). These are independent LEDs one by one.

As shown in FIG. 92(B), the credit number display LED 76 and the acquired number display LED 78 have legs (legs 78a in the case of the acquired number display LED 78) on the bottom surface in the same manner as the connector 57 shown in FIG. and the height of the leg portion 78a is formed to be "H4". Thus, when the acquisition number display LED 78 is mounted on the display substrate 75 , a gap “H 4 ” is formed between the bottom surface of the acquisition number display LED 78 and the display substrate 75 . This point also applies to the credit number display ED76.

In addition, when the state display LED 79 (although the game start display LED 79d is shown in FIG. 92(B), it applies to all the state display LEDs 79) is mounted on the display board 75, the state display is performed in the same manner as the connector 57. The lead wires of the LEDs 79 are soldered to the display board 75, but the gap "H5" between the bottom surface of the status display LEDs 79 and the display board 75 at that time is almost "0" or very small. be. Therefore, the gap "H4" between the bottom surface of the credit display LED 76 and the acquired number display LED 78 and the display substrate 75 is larger than the gap "H5" between the bottom surface of the status display LED 79 and the display substrate 75 (H5 <H4). With this configuration, it is possible to illuminate the gap "H4" between the display substrate 75 and the bottom surface of the credit number display LED 76 and the acquired number display LED 78 when the status display LED 79 is lit.

In particular, the status display LED 79 is positioned so close to the credit amount display LED 76 and the earned amount display LED 78 that the light from the status display LED 79 reaches the bottoms of the credit amount display LED 76 and the earned amount display LED 78 . As a result, it is possible to visually confirm the bottom surfaces of the credit number display LED 76 and the acquired number display LED 78 using the light when the status display LED 79 is lit.
For example, when medals are betted, at least one of the 1-bet display LED 79a, 2-bet display LED 79b, and 3-bet display LED 79c lights up. can be visually confirmed.

In addition, when the power of the gaming machine 10 is turned off while medals are betted, when the power is turned on again, the bet number data before the power is turned off is read, and the gaming machine 10 is started up. Sometimes, at least one of the 1-bet indication LED 79a, 2-bet indication LED 79b, or 3-bet indication LED 79c lights up again. Therefore, it is possible to turn on the LEDs by a simple operation of turning on the power, and visually confirm the bottom surfaces of the credit number display LED 76 and the acquired number display LED 78 .
The above is not limited to the 1-bet display LED 79a, the 2-bet display LED 79b, and the 3-bet display LED 79c, and the same applies to other LEDs. For example, after the replay symbol combination is stopped and displayed, the replay display LED 79f remains illuminated unless the next game is started. At startup, the replay display LED 79f lights up again. Therefore, it is possible to visually confirm the bottom surfaces of the credit number display LED 76 and the acquired number display LED 78 by using the light when the replay display LED 79f is lit.
The display board 75 is attached to the rear side of the front door of the gaming machine 10, and the credit number display LED 76, the acquired number display LED 78, and the status display LED 79 are arranged so as to be visible from the control panel 12c.
Under the condition that the display board 75 is attached to the gaming machine 10 in this way, even if the status display LED 79 is turned on, it may not be easy to visually confirm the bottom surfaces of the credit number display LED 76 and the earned number display LED 78. There is Therefore, under the condition that the display board 75 is electrically connected to the game machine 10 (under the condition that the display board 75 is connected by a harness), the display board 75 is removed from the front door, and the operator removes the display board 75. is held in hand and the status display LED 79 is turned on, the bottom surfaces of the credit number display LED 76 and the acquired number display LED 78 can be easily confirmed visually.

93A and 93B are diagrams showing the positional relationship (example 3) between the substrate and the predetermined electronic component in the seventh embodiment, (A) showing the surface (mounting surface of the predetermined electronic component) view, and (B) shows a side view, and (C) shows a back view.
The board of Example 3 corresponds to the main control board 50 . Also, the “predetermined electronic component” corresponds to the management information display LED (role ratio monitor) 74 . The management information display LED (role ratio monitor) 74 is the same as that shown in FIG. 1 (first embodiment) and FIG. 36(B) (third embodiment).

First, the management information display LED (role ratio monitor) 74 in the example of FIG. 93 is composed of four independent 7-segment displays (digits in FIG. 36(B)) arranged side by side. . Also, each 7-segment display has a DP (decimal point) (segment P in FIG. 37) as in the example of FIG. 36(B).
Furthermore, as shown in FIG. 9B, the management information display LED (role ratio monitor) 74 has a foot portion (not shown in FIG. 93) on the bottom surface, as in the other examples of the seventh embodiment. is provided, a gap is formed between the bottom surface of the management information display LED (role ratio monitor) 74 and the surface of the main control board 50 . By configuring in this manner, it is possible to visually confirm whether or not illegal parts are attached to the management information display LED (role ratio monitor) 74 .

Furthermore, on the back side of the main control board 50, the area where the management information display LED (role ratio monitor) 74 is mounted on the front side has substantially the same dimensions as the outer shape of the management information display LED (role ratio monitor) 74. A boundary line 50d is printed. If the color of main control board 50 is green, for example, boundary line 50d is displayed in white, for example, to make it easier to see. Furthermore, a DP mark 50e is also printed at a position corresponding to the DP of the management information display LED (role ratio monitor) 74 on the front side. The DP mark 50e is displayed, for example, in white like the boundary line 50d.

With this configuration, it is possible to confirm whether or not the management information display LED (role ratio monitor) 74 is attached to the correct position on the main control board 50 . Specifically, it is possible to confirm whether or not the management information display LED (role ratio monitor) 74 is correctly attached to the front surface position corresponding to the boundary line 50d on the back surface side of the main control board 50 . Also, if the outer dimensions of the boundary line 50d are substantially the same as the outer shape of the management information display LED (role ratio monitor) 74, a different 7-segment display (for example, a 7-segment display with a different number of digits) is not attached. You can check whether
Furthermore, by confirming the positions of the four DP marks 50e on the back surface of the main control board 50 and the positions of the DPs of each 7-segment display of the management information display LED (role ratio monitor) 74, the management information display LED ( It is possible to check whether the role ratio monitor) 74 is mounted in the correct direction.

94A and 94B are diagrams showing a modification of Example 3 of FIG. 93, and similarly to FIG. 93, FIG. , (C) shows a back view.
The management information display LED (role ratio monitor) 74 in the example of FIG. 94 is different from the example of FIG. 93 in that a 4-digit 7-segment display is integrally formed (each digit cannot be separated). . In other words, the management information display LED (role ratio monitor) 74 is a single part.
In such a case, as for the boundary line 50d on the back surface of the main control board 50, only the outline is printed (displayed), and the boundary line for each digit is not printed. Therefore, the number of parts can be easily confirmed by whether it is printed like the boundary line 50d of FIG. 93(B) or printed like the boundary line 50d of FIG. 94(B).

On the other hand, as many DP marks 50e as the number of DPs provided on the management information display LED (role ratio monitor) 74 are printed at positions corresponding to the positions of the DPs. This makes it possible to confirm whether the 4-digit management information display LED (role ratio monitor) 74 is correctly attached and whether the orientation of the management information display LED (role ratio monitor) 74 is correct.

Although the fifth to seventh embodiments of the present invention have been described above, the present invention is not limited to the above description, and various modifications such as those described below are possible.
A. Fifth Embodiment (1) The number of error histories to be stored and displayed is arbitrary in consideration of the storage capacity of the RWM 83 of the sub-control board 80 . For example, the error history may be stored without being erased until the upper limit of the storage area of the RWM 83 storing the error history is reached, and all of the stored error history may be displayed. Then, when the upper limit of the storage area of the RWM 83 for storing the error history is reached, the error history data is erased sequentially from the oldest one.
Further, for example, error history data after a predetermined number of days (for example, half a year, one year, etc.) have elapsed from the current time may be deleted from the error history data. Alternatively, the error history data is stored until the upper limit of the storage area of the RWM 83 for storing the error history is reached (it is preferable that the error history can be checked in some way). As for the display of the history, for example, it is possible to display only those within one month before the current time.

(2) Although not illustrated in the above embodiment, when an error occurs during rotation of the reel 31, the power is turned off before the reel 31 stops, and then the power is turned on (in the setting change state, When not migrating), it is processed as follows.
When the power is turned off after an error is detected, the error data is stored in the abnormal input flag as described above.
After the power is turned on, if the system starts up without transitioning to the setting change state, the process proceeds to step S2721 (power return process) in the process of FIG. 41 (program start). After step S2724 in FIG. 42 (power recovery process), an interrupt process occurs, and the error command stored before the power is turned off is sent to the sub-control board 80. FIG. When the sub-control board 80 receives the error command, it starts reporting the error. Then, the time of the error history for the error is the time when notification of the error was started.

(3) The error contents and times shown on the error history screen are examples, and are not limited to these. For example, door open and door close need not be displayed in the error history. Also, power on/off may not be displayed in the error history. On the other hand, when shifting to the setting change state or the setting confirmation state, any display along with the time may be displayed on the error history screen so that the fact can be understood.
Furthermore, the time may be any of those that display the date and time, those that display the month and day and time, those that display the year, month, day and time.

(4) The error history screen can be displayed in the setting confirmation state, but this is not limiting. It may be possible to display it (the setting key may not be required to display the error history screen).
Alternatively, conversely, the error history screen may not be displayed until the setting change state is entered.
(5) Under the condition that an error is being reported, the error reporting may be terminated even if the reset switch 153 is not operated when the cause of the error is eliminated. Alternatively, even if the cause of the error is removed and the reset switch 153 is operated under the condition that the error is reported, the error is continued to be reported until a predetermined time elapses from that point, The error notification may be terminated after the predetermined time has elapsed.

B. Sixth Embodiment (1) A socket 56 is provided with two stepped portions 56b(1) and 56b(71), and characters "1" and "71" are displayed, respectively. However, not limited to this, for example, even if only the step portion 56b(1) is provided, it is possible to align with the numeral "1" of the step portion 55d of the main chip 55. FIG.
(2) In addition to the four mark numbers 50b, 13 marks 50c are displayed on the main control board 50, but the present invention is not limited to this, and only the mark numbers 50b may be displayed. Further, the landmark numeral 50b may be only the landmark numeral 50b(1) or only the landmark numerals 50b(1) and 50b(71). It is possible to align with the number "1" of the stepped portion 55d of the main chip 55 only with the mark number 50b(1).

(3) In the above embodiment, the main chip 55 is provided with the depression 55b, the model number sticker 55f is attached, and the two-dimensional code 55e, product name 55g, company name 55h, and hidden characters 55j are displayed (printed). , does not necessarily mean that these are essential requirements of the main chip 55 .
(4) In the above embodiment, the number of pins of the main chip 55 is "71", but the number is not limited to this and may be an even number (for example, "72"). Further, when the odd number is used, the number is not limited to "71", but may be, for example, "75" (32+33). The number of pins of the main chip 55 is determined by the required number of signal lines and GND (ground).

(5) The cutouts 56e and 56f of the socket 56 are not necessarily essential. However, it is preferable to provide at least one notch 56e or 56f on the bottom of the socket 56 so that the space between the bottom of the socket 56 and the main control board 50 can be visually checked. Further, even when the cutouts 56e and 56f are provided, it is not essential to have the height described above.
(6) Socket 56 can also be formed from an opaque material. However, from the standpoint of fraud prevention, it is preferable to use a transparent or translucent material that allows the inside to be seen.
(7) The stepped portion 55i of the company name 55h is not necessarily an essential requirement. Even if the company name 55h is provided, it may be a character that does not have a stepped portion. Furthermore, the depths (D1, D2, and D3 in FIG. 89) of the stepped portions 55c, 55d, and 55i may be partially the same (for example, D1=D2 and D1≠D3), or may be all They may be the same (D1=D2=D3).

(8) The orientation of the characters of the stepped portions 56b(1) and 56b(71) is rotated 90 degrees counterclockwise with respect to the character "1" of the stepped portion 55d and the characters of the mark numeral 50b. Not limited. The orientation of the characters on the stepped portions 56b(1) and 56b(71) may be the same as the orientation of the character "1" on the stepped portion 55d and the characters of the mark numeral 50b.
Alternatively, the orientation of the characters on the stepped portions 56b(1) and 56b(71) is rotated clockwise by 90 degrees in FIG. may be rotated counterclockwise by 90 degrees in FIG.
(9) In the main chip 55, the pin numbers of the GND (ground) lines are 17, 35, 54, and 71, but are not limited to these. For example, Nos. 1, 35, 36, and 71 may be GND (ground) lines. Alternatively, the 17th, 18th, 53rd and 54th pins (all pins adjacent to the recess 55b) may be GND (ground) lines.

C. Seventh Embodiment (1) The shape of the foot portion (for securing a gap with the substrate) provided on the bottom portion of the predetermined electronic component may be any shape. For example, as shown in FIG. 91(B), the legs 57a of the connector 57 are formed in a line shape. may This applies not only to the connector 57 but also to the 7-segment display (FIGS. 92, 93 and 94).
(2) As shown in FIG. 92(B), "H5" was exemplified as the gap between the bottom surface of the LED and the substrate. The gap between the bottom surface of and the substrate is approximately "0".

(3) In the examples of FIGS. 93 and 94, the management information display LED (role ratio monitor) 74 was exemplified. It is possible. For example, if the credit number display LED 76 is composed of two 7-segment displays arranged side by side, a boundary line 50d corresponding to the two 7-segment displays arranged side by side is displayed on the back surface of the display substrate 75. , and two DP marks 50e are displayed.
In addition, when the credit number display LED 76 is an integrated 7-segment display device in which the upper digits and lower digits are connected, a boundary line 50d indicating its outline is displayed on the back surface of the display substrate 75, and two A DP mark 50e is displayed. This also applies to the acquisition number display LED 78 .
Furthermore, the set value display LED 73 consisting of, for example, one digit can also be configured in the same manner. In this case, a boundary line 50d corresponding to the outline of the set value display LED 73 is displayed on the back surface of the board (the main control board 50 or the board on which the set value display LED 73 is mounted), and one DP mark 50e is displayed. be done. Incidentally, when the set value display LED 73 does not have DP, only the boundary line 50d is displayed on the back surface of the substrate.

<Eighth embodiment>
The eighth embodiment relates to timer interrupt processing and vector addresses (also called "interrupt vector addresses").
In the eighth embodiment, terms are used as follows.
(1) "Timer interrupt processing" in the eighth embodiment is the same as "interrupt processing (I_INTR)" in the fourth embodiment (FIG. 66). In the following description of the eighth embodiment, "timer interrupt processing" may be simply abbreviated as "interrupt processing" as necessary.
(2) "Address value" means the numerical value of the address in the built-in memory. For example, in FIG. 96, which will be described later, the "vector address value" is "0004H". In this specification, the term "address" and the term "address" may be used as necessary, but these have the same meaning.

(3) "Address data value" refers to the data value stored at the address. For example, the above-mentioned "vector address" actually consists of 2-byte addresses "0004H" and "0005H". A data value (a 2-byte (16-bit) value) stored in
(4) Add "H" to the address value. "H" indicates "hexa" in hexadecimal. Also, "B" is attached to the bit value stored in the address. "B" indicates a binary "bit".
When indicating a 2-byte bit value (16-bit value), a "/" is added between the upper byte (8-bit) value and the lower byte (8-bit) value. For example, "00000000/00000100B".

(5) On the other hand, a register does not have an address, and the "value (of) a register" refers to the data value stored in the register.
(6) In this embodiment, the storage areas in the built-in memory are called "program area", "data area", "register area", "program management area", "work area", and "stack area". . However, these are not limited to this, and may be called "program area", "data area", "register area", "program management area", "work area", and "stack area", respectively.
The "program area" is also called "program code area" or "program code area."

FIG. 95 is a diagram showing a one-chip microprocessor (hereinafter simply referred to as "chip") in the eighth embodiment. This one-chip microprocessor is mounted on the main control board 50 in FIG.
95, the chip includes a main CPU 55 (same as in FIG. 1) and a built-in memory. Various hardware other than these two pieces of hardware is provided in the chip, but the description and illustration thereof are omitted.
The built-in memory includes a built-in ROM 54 having an address range of "0000H" to "3FFFH" (16384 bytes) and a built-in RWM 53 having an address range of "F000H" to "F3FFH" (1024 bytes).
The built-in ROM 54 is the same as "ROM 54" in FIG. 1, and the built-in RWM 53 is the same as "RWM 53" in FIG.

Further, the built-in memory includes a function setting register area and a function control register area as built-in memory register areas.
The function setting register area is a register storage area for operation settings including interrupt processing (for example, initial settings for interrupt processing, etc.). Registers (including counters) stored in the function setting register area specifically include, for example, a prescaler register 502 and a counter setting register 503 in FIG. 61 (fourth embodiment). Furthermore, although not shown in FIG. 95, registers for setting the maximum value of random numbers are also provided in the function setting register area.
As in the fourth embodiment, the prescaler register 502 is a register capable of setting a set value for selecting the clock to be supplied to the 8-bit counter 501 .
A counter setting register 503 is a built-in register that can set the count value of the 8-bit counter 501 .

The function control register area is a storage area for registers that manage monitoring and control, for example, a storage area for registers that monitor interrupt processing and store random numbers. For example, in FIG. 61 (fourth embodiment), an interrupt wait monitor register 301, an 8-bit counter 501, and an interrupt flag 504 are provided in the function control register area.
As in the fourth embodiment, the interrupt wait monitor register 301 is a register for storing information indicating that an interrupt request signal has been generated after the interrupt flag 504 is set.
The 8-bit counter 501 is an 8-bit (1-byte) counter value storage area for measuring the timing of interrupt processing.
An interrupt flag 504 is a flag indicating that the 8-bit counter 501 has timed out.
The built-in memory register area is not limited to the function setting register area and the function control register area shown in FIG.

On the other hand, the main CPU 55 has a CPU register area. This CPU register area is a register area different from the built-in memory register area provided in the built-in memory.
A, B, C, D, E, F, H, and L registers, which are general-purpose registers, are provided in the CPU register area. Note that the F register is a flag register.
The Q register is a register that stores the upper address "F0H" of the work area (see FIG. 97) in the use area of the built-in RWM 53 and is used for instructions. Then, it is used in an instruction to read data whose upper address is "F0H" in the storage area of the built-in RWM 53. FIG.
Furthermore, the I register is a register called an interrupt page address register, which is a register for determining the upper byte value of the vector address, as will be described later in detail.

The interrupt disable flag (IFF1, IFF2) 302 is the same as shown in FIG. 61 (fourth embodiment). The IFF1 register is a register for determining whether maskable interrupts are enabled or disabled. The IFF2 register is a register used for restoring the IFF1 register after processing a non-maskable interrupt or for restoring by a RETEX instruction after execution of a CALLEX instruction.
In addition to the above registers, various registers such as a Q register and a U register are provided, but illustration and description thereof are omitted in the eighth embodiment.

Also, the registers, counters, and flags shown in FIG. 95 are examples, and are not limited to those shown in FIG. For example, although the 8-bit counter 501 is provided in the function control register area, it is not limited to this, and can be provided in the CPU register area within the main CPU 55 or can be configured by a circuit. The interrupt flag 504 may also have a function of storing ON/OFF, and may be provided in, for example, the CPU register area instead of the function control register area, or may be configured by a circuit. In addition, the prescaler register 502, the counter setting register 503, and the interrupt wait monitor register 301 can be similarly provided in the CPU register area or another area in the built-in memory, or can be configured by a circuit.

FIG. 96 is a diagram showing in more detail the memory map in the built-in ROM 54 in FIG.
The area of the built-in ROM 54 is provided with a used area and a non-used area.
The "usage area" is a storage area in which information related to the progress of the game is stored.
In addition, the "area outside the use area" is a storage area in which information unrelated to the progress of the game is stored. This is a storage area in which programs, anti-fraud programs, etc. are stored.
A program area and a data area are provided in the used area and the non-used area in the built-in ROM 54, respectively.
The “program area” is also called a “control area” and is a storage area in which various programs executed by the main control means 50 are stored.
A "data area" is a storage area in which information other than a program is stored, and is a storage area in which data used when the program is executed is stored.

Here, as shown in parentheses in FIG. 96, the "use area" may be referred to as the "first area". Also, the "outside use area" may be referred to as a "second area".
The program area of the used area may also be referred to as a "first program area" or a "first control area". Also, the data area of the used area may be referred to as a "first data area".
Furthermore, the program stored in the program area of the used area may be referred to as "first program".
Similarly, the program area of the area outside the use area may be called a "second program area" or a "second control area". Also, the data area outside the used area may be referred to as a "second data area".
Furthermore, the program stored in the program area outside the used area may be referred to as a "second program".

As shown in FIG. 96, in this embodiment, there is an unused area (address "11FFH") between the program area and the data area of the used area. It may be arranged so as to be continuous with the data area.
In addition, although there is an unused area (addresses "1DF7H" to "1FFFH") between the used area and the area outside the used area, the unused area is eliminated, and the used area and the area outside the used area are continuous. may be placed.
Furthermore, as for the area outside the used area, the program area and the data area are arranged continuously. You may have
It should be noted that the used area and the non-used area may be defined so as to indicate only the program area and data area and exclude the unused area. On the other hand, when there is an unused area between the program area and the data area like the used area in FIG. 96, the unused area including the unused area may be called a used area (or an area outside the used area).

The built-in ROM 54 is provided with a storage area for storing the company name, date, model name (of the gaming machine 10), etc., and a program management area, in addition to the above-described used area, non-used area area, and unused area. there is
In the above, the vector address (0004H) described in detail below is provided in the program area of the used area in this embodiment.
A program code area start/end address (3FD3H to 3FD8H) and an interrupt initialization address (3FDAH) are provided in the program management area.
The program management area has program code area setting addresses (3FD3H to 3FD8H) and an interrupt initial setting address (3FDAH), which will be described later.

FIG. 97 is a diagram showing in more detail the memory map within the built-in RWM 53 in FIG.
Similar to the area of the internal ROM 54, the area of the internal RWM 53 is divided into a use area (may be referred to as a "first area") and an area outside the use area (may be referred to as a "second area"). is provided. The concepts of these "use area" and "outside use area" are the same as in the case of the built-in ROM 54. FIG.
Further, the used area and the non-used area in the built-in RWM 53 respectively have a working area, an unused area, and a stack area.
The work area (also referred to as "first work area") and the stack area (also referred to as "first stack area") in the use area are programs stored in the program area of the use area of the built-in ROM 54 (for progress of the game). Related programs) are used (updated, referenced) during execution.

Similarly, the work area (also referred to as a "second work area") and stack area in the area outside the use area is also referred to as a "second stack area". ) is used (updated, (referenced) storage area.
The "stack area" is a storage area in which data such as various registers and program return addresses can be temporarily saved (stored).

Next, the interrupt initialization address will be explained.
First, the "vector address" is an address that stores the start address (top address) of the timer interrupt processing program (I_INTR) to be executed when a timer interrupt processing factor occurs. In other words, the vector address does not store the timer interrupt processing program (I_INTR) itself, but is an address that stores the location (starting address) of the timer interrupt processing program (I_INTR).
The "interrupt initialization address" is an address that stores data that enables the value of the vector address to be specified. Especially in this embodiment, the vector address cannot be specified only by the data stored in the interrupt initial setting address, and the vector address value is specified based on the value of the I register and the data stored in the interrupt initial setting address. make it possible.

FIG. 98 is a diagram for explaining interrupt initialization addresses. In the figure, (A) is a diagram showing the details of the data value of the interrupt initialization address, and (B) is a diagram showing the relationship between the interrupt priority order and the interrupt priority order setting value.
As described with reference to FIG. 96, the interrupt initial setting address is provided in the program management area of the built-in ROM 54, and the address is "3FDAH" (1 byte) in this embodiment. However, this is an example and is not limited to this.
After the gaming machine 10 is powered on, the data value stored at this interrupt initialization address is read and used to determine the vector address.

In FIG. 98A, the upper 4 bits (A7 bit to A4 bit) of the data value of the interrupt initial setting address take a predetermined value as the vector address setting value, and in this embodiment, "0000B". It's becoming This vector address setting value constitutes part of the vector address value, as will be described later.
Although the vector address setting value is set to "0H (0000B)" in this embodiment, it is not limited to this, and various settings such as "8H (1000H)" and "FH (1111B)" are possible. .
Also, in the data value of the interrupt initialization address, the A3 bit and A2 bit are fixed values, and are set to "00B" in this embodiment. Although the details will be described later, this 2-bit value, which is a fixed value, is configured to be checked (in the security mode) when the gaming machine 10 is started, and when the 2-bit value is not "00B" , is configured to be an error.
Also, this fixed value is not limited to "00B", but can be set to various values such as "11B".
Furthermore, the A1 and A0 bits, which are the lower two bits of the data value of the interrupt initialization address, are the interrupt priority setting values.
Here, in this embodiment, as shown in FIG. 98B, four types of "00B", "01B", "10B", and "11B" are provided as interrupt priority setting values. .

FIG. 98(B) shows the relationship between interrupt priority setting values and interrupt factors.
In this embodiment, there are five types of interrupt factors, "IR0" to "IR5", and the smaller the number at the end, the higher the priority of the interrupt factor. In other words, the "IR0" interrupt factor has the highest interrupt priority, and the "IR5" interrupt factor has the lowest interrupt priority.
The types of interrupts are "PTC0" to "PTC2", "RX0" to "RX1", and "XINT". Here, "PTC0" to "PTC2" are interrupt factors used for timer interrupt processing, and particularly "PTC2" corresponds to timer interrupt processing (I_INTR) in this embodiment.

In this embodiment, "01B" is used as the interrupt priority setting value. As a result, the interrupt priorities are "PTC0", "PTC1", "PTC2", "XINT", "RX0", and "RX1" in descending order of priority.
Further, when "01B" is adopted as the interrupt priority setting value, the A1 bit and A0 bit of the data value of the interrupt initial setting address are "01B".
As described above, in this embodiment, the value of the interrupt initialization address is "3FDAH" and the data value of the interrupt initialization address is "00000001B".

FIG. 99 is a diagram for explaining vector address values and data values stored at the vector addresses.
FIG. 99A shows vector address values.
In this embodiment, the vector address is provided in the program area of the use area in the built-in ROM 54 and is 2 bytes.
As for the vector address value, as shown in FIG. 99A, the upper 1-byte value is the I register value, and the lower 1-byte value consists of the vector address set value and the automatically assigned value.

Here, the I register value in this embodiment is "00H". As shown in FIG. 95, the I register is provided in the CPU register area, and is set to "00H" after the gaming machine 10 is powered on. In other words, immediately after the gaming machine 10 is powered on, each register value provided in the CPU register area is cleared. After that, unless a value other than "00H" is stored in the I register, the I register value remains "00H".
In this embodiment, no value is set in the I register after the game machine 10 is powered on. Therefore, the I register value remains "00H".
Therefore, the upper 1-byte value of the vector address is "00H".

Next, in the lower byte of the vector address value, the A7 to A4 bit values correspond to the A7 to A4 bit values (vector address setting value) of the data value of the interrupt initialization address (3FDAH). As shown in FIG. 98A, in the data value of the interrupt initial setting address, the A7-A4 bit value is "0000B", so this value becomes the A7-A4 bit value of the lower byte of the vector address as it is.

Also, in the lower byte of the vector address value, the A3-A0 bit values are automatically assigned values.
FIG. 99B is a diagram showing the relationship between interrupt factors and automatically assigned values. As shown in FIG. 98B, in this embodiment, "01B" is adopted as the interrupt priority setting value, and the priority of the interrupt factor of PTC2, which is the timer interrupt processing (I_INTR) of this embodiment, is "IR2 ”.
Therefore, as shown in FIG. 99B, the automatically assigned value for the interrupt factor "IR2" and the interrupt "PTC2 (I_INTR)" is "0100B" (04H). This "0100B" is the A3-A0 bit value of the vector address value.

From the above, as shown in FIG. 99(A), the value of the vector address is
"00000000/00000100B" = "0004H"
becomes.
As a result, in FIG. 96, "0004H" becomes the vector address in the storage area of the built-in ROM 54 starting from "0000H".
Since the value of the vector address is 2 bytes as described above, the vector addresses are actually "0004H" and "0005H".

FIG. 99C shows an example of data values of vector addresses. In this embodiment, the timer interrupt processing (I_INTR) program is stored from "1134H" in the program area of the use area of the built-in ROM 54. FIG. In other words, the start address of the timer interrupt processing (I_INTR) program is "1134H".
Therefore, the data value of the vector address (0004H) becomes "1134H".
When "1134H" is stored in a 2-byte vector address, the lower byte value "34H" is stored in the first "0004H", and "11H" is stored in the next "0005H".
This will
0004H: 34H (00110100B)
0005H: 11H (00010001B)
is stored.

When the power of the gaming machine 10 is turned on and the main CPU 55 is activated, it is configured to be able to recognize where the vector address is based on the data value and I address value of the interrupt initialization address.
Specifically, first, since the upper 4-bit value of the interrupt initialization address (3FDAH) is "0000B", the upper 4-bit value of the lower byte of the vector address is "0000B".
In addition, since the value of the interrupt priority setting value, which is the value of the lower 2 bits of the interrupt initial setting address (3FDAH), is "01B", the lower byte of the vector address corresponding to PTC2 (interrupt of timer counter ch2) A 4-byte value is assigned to '0100B' by the interrupt controller.

On the other hand, when the power is turned on, the value of the I register becomes "00H", so the value of the upper byte of the vector address becomes "00000000B".
From the above, the main CPU 55 determines that the vector address (the address where the start address of "I_INTR" is stored) corresponding to PTC2 (interrupt of timer counter ch2; corresponding to timer interrupt processing (I_INTR) in this embodiment) is set to "0004H".
Therefore, from the data value stored in the vector address, it is possible to recognize at which address the timer interrupt processing (I_INTR) program is stored (starting address of the timer interrupt processing program).

Note that the process of setting "00H" to the I register is not executed after the power is turned on. When the power is turned on, the CPU register area on the main CPU 55 side in FIG. 95 is initialized, so that the I register value becomes "00H" similarly to the other register values.
Also, when the register is initialized after the power is turned on, "F0H" is stored in the Q register. When "F0H" is stored in the Q register, when specifying the upper address "F0H" in the storage area of the built-in RWM 53, the Q register is specified.
Further, in this embodiment, when timer interrupt processing (I_INTR) of PTC 2 is entered, the program (that is, timer interrupt processing (I_INTR)) is called. In other words, the program code for timer interrupt processing (I_INTR) can be executed.

FIG. 100 is a diagram showing the process from power-on to transition to user mode in this embodiment.
First, before the power is turned on (when the power is off), "XSRST" is "L (low)". Here, "XSRST" indicates the operation status of the main CPU 55, and is "XSRST=L" when the main CPU 55 is not allowed to operate (while the main CPU 55 is stopped). ).
When the power is turned on under this condition, the system reset is released, and when the power supply becomes stable, the main CPU 55 changes from "L (low)" to "H (high)" in terms of the circuit. .

A register in the CPU register area is then initialized to determine if there is a PROM mode request. Here, "PROM mode" means a mode in which data is written in ROM (ROM is burned). When it is determined that there is a request to shift to the PROM mode, it shifts to the PROM mode, and when it is determined that there is no request to shift to the PROM mode, it shifts to the security mode. Game machines installed in the market are configured so that it is determined that there is no request to shift to the PROM mode after the system reset is released.
In the security mode, a security check is performed, and when the security check is determined to be OK, the mode shifts to the user mode, and when the security check is determined to be NG, the execution (processing) is stopped.
As a security check in the security mode, the program code area setting address of the program management area, the interrupt initial setting address (3FDAH), etc. are read. Then, the presence or absence of a setting error in the program management area and self-diagnosis are executed. Also, in this security mode, the data value of the interrupt initialization address (3FDAH) is read to recognize the vector address value.

Here, the data of the interrupt initialization address is read, and if the value of the fixed value (A3 and A2 bits) in FIG.
If it is determined that the security check is OK in the security mode, then the user mode is entered.
This user mode corresponds to program processing that starts from "0000H" in the program area of the internal ROM 54 used area.
In addition, in FIG. 100, "travel outside the designated area" will be described later.

FIG. 101 is a diagram showing an example of a program starting from "0000H" in the program area of the use area of the built-in ROM 54. As shown in FIG.
Here, in this embodiment, special call instructions and normal call instructions are provided as the call instructions by the main CPU 5 .
The special call instruction is called the "RST instruction" and the normal call instruction is called the "CALLF instruction".
The RST instruction is an instruction that can be represented as a 1-byte (4-cycle) program. On the other hand, the CALLF instruction is an instruction that can be expressed as a 2-byte (4-cycle) program. Therefore, since the number of bytes for describing the RST instruction is smaller than the number of bytes for describing the CALLF instruction, using the RST instruction can reduce the program capacity rather than using the CALLF instruction. Therefore, programs that are called frequently are called using the RST instruction.

Here, "a program with a high calling frequency" includes, for example, a program that is called many times (a plurality of times) in one game.
However, "frequently called programs" include, for example, programs that are called at least once in one game, and programs that are not necessarily called at least once in one game, but are likely to be called during the game. be done.

Also, in this embodiment, addresses that can be called using the RST instruction are limited to predetermined addresses.
Specifically, the "predetermined address" is
0008H
0010H
0018H
0020H
0028H
0030H
0038H
0040H
It consists of eight
It should be noted that these eight addresses are merely examples, and various values (addresses) and number of "predetermined addresses" can be set according to the specifications of the chip.

By storing programs that can be called by the RST instruction at the above eight addresses, the program capacity can be reduced.
On the other hand, as described above, the program area of the used area starts from "0000H", and the power-on program is stored from "0000H". The power-on program corresponds to, for example, "program start processing (M_PRG_START)" shown in FIG. 41 (third embodiment).

Also, as described above, the vector address is "0004H".
Therefore, as shown in FIG. 101,
0000H: Power-on program (start program)
:
0004H: vector address :
0008H: Program 1 called by RST instruction
:
0010H: Program 2 called by RST instruction
:
0018H: Program 3 called by RST instruction
:
0020H: Program 4 called by RST instruction
:
0028H: Program 5 called by RST instruction
:
0030H: Program 6 called by RST instruction
:
0038H: Program 7 called by RST instruction
:
0040H: Program 8 called by RST instruction
:
This is the arrangement of data (including instructions and programs).

Also, a jump instruction requires a capacity of 3 bytes in this embodiment. Therefore, a jump instruction is stored in "0001H" to "0003H", and "0050H", for example, is designated as the jump destination address. After "0050H", the program following "0000H" is stored.
Here, a program including the jump instruction may be referred to as a power-on program, or a program not including the jump instruction may be referred to as a power-on program.
As a result, it is possible to start the power-on program at "0000H", jump to "0050H" with the next jump instruction of "0001H", and continue the power-on program from "0050H".
With this setting, the vector address can be placed at "0004H" while starting the power-on program from "0000H". Furthermore, the RST instruction can be placed at "0008H", "0010H", etc., while starting the power-on program at "0000H".

Incidentally, in the continuation of the power-on program, for example, it is determined whether or not to shift to the setting change mode.
Here, since the voltage is unstable when the power is turned on, the jump instruction may not be executed normally. If the jump instruction is not executed normally, it may take a long time to enter the setting change mode or the setting change mode may not be entered. For this reason, if an operation (for example, a predetermined operation of a setting key) to switch to the setting change mode is performed and the power is turned on, if the switch to the setting change mode is not made within the standard time (T), , it can be determined that the program containing the jump instruction was not successfully executed. When the manager determines that the setting change mode will not be entered by the time (T) as a guideline, the power of the gaming machine 10 is turned on again. When the power is turned on again, the program starts from the address "0000H" through the security mode again.
Also, it is preferable that the jump command of the power-on program is executed from "0000H" to "0007H". This is to enable use of "0008H" as the RST instruction.

Also, if program 1 called by the RST instruction is stored in "0008H", the program 1 is allocated with a capacity of 8 bytes from "0008H" to "000FH" or a program that requires a capacity of less than 8 bytes.
Similarly, when storing the program 2 called by the RST instruction in "0010H", the program 2 is arranged with a capacity of 8 bytes from "0010H" to "0017H" or a program that can be stored within 8 bytes.

Here, if the program 2 consists of 4 bytes of "0010H" to "0013H", the addresses of "0014H" to "0017H" may be used in any way.
For example, firstly, addresses "0014H" to "0017H" may be set as an unused area ("00000000B" is stored).
Secondly, other programs that can be stored within 4 bytes may be stored in "0014H" to "0017H".
Furthermore, thirdly, a program following the power-on program starting from "0000H" is stored in "0014H", and a jump instruction (an address where the program following "0014H" is stored is stored in "0015H" to "0017H"). ) may be stored.

The above also applies to "0018H", "0020H", "0028H", "0030H", "0038H" and "0040H".
For example, when storing program 4 called by the RST instruction in "0020H", if the program 4 has a capacity of 14 bytes from "0020H" to "002DH", the program that calls "0028H" by the RST instruction 5 may be omitted. However, if the program called by the RST instruction exceeds 8 bytes, it is preferable to store it after "0040H" where there is no limit to the program capacity. With this configuration, eight programs can be stored as programs that can be called by the RST instruction.
In addition, when the program called by the RST instruction exceeds 8 bytes, the method of arranging the program is not limited to storing it after "0040H". Then, a jump instruction is stored in "0025H" to "0027H", and the jump instruction jumps to "0040H" and beyond. By doing so, a program that can be called by the RST instruction can be stored in "0028H". By adopting such a method, even if the program called by the RST instruction exceeds 8 bytes, eight programs called by the RST instruction can be provided.
In the example of FIG. 101, an instruction to jump to "0050H" is stored in "0001H", and a program subsequent to "0000H" is stored after "0050H".

Although the vector address is set to "0004H" in this embodiment, it is not limited to this.
Here, the upper byte of the value of the vector address is the value of the I register. Then, as in this embodiment, after the power is turned on, the I register is initialized as a register of the main CPU 55 without executing the process of setting a specific value to the I register, and the state remains at "00H". The upper byte value of the address is "00H". However, the present invention is not limited to this, and when executing processing for setting a specific value in the I register after initializing the I register after power-on, the upper byte value of the vector address can be set to the specific value. .
However, as shown in FIG. 96, when the vector address is provided in the program area of the use area in the built-in ROM 54, the value of the I register is in the range of "00H" to "11H".
As will be described later, vector addresses are not limited to being provided in the program area of the used area, but can also be provided in the data area of the used area, the program area of the non-used area, and the data area of the non-used area. be.

However, if the I register is initialized after the power is turned on and then a process for setting a specific value in the I register is to be executed, that much program capacity is required. For example, if the specific value is "02H", it is necessary to provide "LD I, 02H" (an instruction (program) to load "02H" into the I register) after initializing the I register after power-on. If the program requires a capacity of, for example, 2 bytes, that much program storage area is consumed.
On the other hand, if the initialized value "00H" is used as the I register value as in the present embodiment, there is no need to set a specific value in the I register. can save money. As a result, the program capacity can be reduced by setting the upper byte value of the vector address to "00H".

Furthermore, when the I register value is "00H", the value of the vector address is not limited to "0004H". Specifically, the value of the vector address is, for example, "00FEH" and "00FFH" or less, and is other than the address to be called by the RST instruction ("0008H", "0010H", etc. described above). If there is, it can be set arbitrarily. For example, it can be set to "00F4H". If the lower 4-bit value of the lower byte of the vector address is "0100B (4H)", the automatically assigned value of this embodiment shown in FIG. 99B can be used as it is.
When the upper 4-bit value of the lower byte of the vector address is set to "FH" (1111B) as described above, the data value of the interrupt initialization address (3FDAH) in FIG. (Vector address set value) becomes "1111B".

FIG. 102 is a diagram showing an example when the vector address value is "00F4H". In this case, since "0004H" is not a vector address, the power-on program can be stored in "0000H" to "0004H".
If the program capacity of the jump instruction requires 3 bytes, the jump instruction is placed in the 3-byte storage area from "0005H" to "0007H", and is called by the RST instruction in "0008H" as in FIG. Program 1 can be stored.

Next, a program called by the RST command, that is, a program called a plurality of times in one game will be described.
FIG. 103 is a flowchart showing an example of processing called by the RST instruction, (A), (B), and (C) showing examples 1, 2, and 3, respectively.
Example 1 of FIG. 103(A) is a flow chart showing control command set 1 (R_CMD_SET). This process corresponds to, for example, the process of step S303 in FIG. 46 (third embodiment), and is a process for setting command data to be transmitted from the main control board 50 to the sub control board 80. FIG.
Furthermore, although not shown, in FIG. 46 (third embodiment), the operation state (whether or not the BB operation pattern is displayed, whether or not the replay operation pattern is displayed, etc.) in the game start set process in step S272 is set, and control command set 1 is executed.
Similarly, although not shown, in the start switch acceptance process at step S279 in FIG. 46 (third embodiment), an output request at the start of reel rotation is set, and control command set 1 is executed.

In FIG. 103A, first, in step S151, the main control board 50 executes interrupt prohibition processing. In the next step S152, control command set 2 (C_CMD_SET) is executed. Then, in step S503, the interrupt processing prohibited in step S151 is canceled (that is, the interrupt is permitted). Interrupt processing is prohibited during execution of the control command set 2 by the above processing.
Although detailed processing of the control command set 2 is omitted, this processing is processing for writing control commands. In addition, since interrupt processing is prohibited during execution of control command set 2, malfunction due to execution of interrupt processing during control command write processing can be prevented.

Example 2 of FIG. 103(B) is a flow chart showing the interrupt waiting process (R_INTR_WAIT). This process corresponds to, for example, the process of step S2754 in FIG. 45 (third embodiment) or step S295 in FIG. 46 (third embodiment).
First, in step S161, the main control board 50 acquires an interrupt counter value. This process is a process of storing the interrupt counter value in the A register. A 16-bit (2-byte counter) interrupt counter value is stored at a predetermined address in the work area of the use area of the built-in RWM 53. In step S161, the value stored in the lower 8-bit address is is stored in the A register.
In the next step S162, the main control board 50 determines whether or not the lower 8-bit value of the interrupt counter value has changed. Specifically, the value of the lower 8 bits is subtracted from the value of the A register, and if the result of the operation is not "0" (when the zero flag is "0"), "Yes" is determined. When it is determined that the value has changed, the processing according to this flow chart is terminated, and when it is determined that the value has not changed, the processing of step S162 is continued.

Example 3 of FIG. 103(C) is a flowchart showing the countdown (R_CNT_DOWN). This process includes, for example, the process of subtracting the advantageous zone clear counter in step S301 (game end check process) of FIG. 46 (third embodiment), and the timer value It is used for the process of updating the , or the process of updating the number of AT games during the AT game (not shown).
In this process, the counter value is decremented by "1" in step S171, and the process of this flowchart ends.
Note that the three processes shown in FIG. 103 are examples of processes that are called multiple times in one game, and are not limited to these three processes, and many more processes can be mentioned. Then, a program that has a program capacity that can be stored in the above address and that is called many times in one game is set to be called by the RST command.

FIG. 104 is a diagram showing program code area designation addresses and their data values. It should be noted that although it is hereinafter referred to as a "program code area designation address", it may also be referred to as a "program code area setting address".
As shown in FIG. 96, in the program management area of the built-in ROM 54, addresses "3FD3H" to "3FD8H" are set as program code area designation addresses.
The main CPU 55 judges that the program code stored within the address range designated in the program code area is normal when executed, and determines that the program code stored outside the address range designated in the program code area is normal. If the program code is executed, it is judged to be abnormal (travel outside the designated area). When the main CPU 55 determines that there is an abnormality (running outside the designated area), the main CPU 55 generates a reset.
In other words, a reset is generated when a program code (instruction) stored outside the specified area is called (instruction fetched).

This is done for the following reasons.
The first reason is that the illegal program code is stored in an area other than the original program area, and the illegal program code is jumped from the original program area to the illegal program code by, for example, a jump instruction, and the illegal program code is executed. Because there is
The second reason is that a runaway may occur when the voltage is unstable immediately after the power is turned on, or a runaway may occur due to heat, and instructions may fly to areas other than the program area. Specifically, for example, when there is an instruction to jump from an A address to a B address, if the instruction is not executed correctly, instructions stored after the B address may not be executed within the design time. In such a case, the power is once turned off and then turned on again (restarted).

FIG. 100 also illustrates the processing when traveling outside the designated area.
As shown in FIG. 100, when running outside the specified area is detected during execution of the user mode, a reset is generated. In this case, the main CPU 55 initializes the registers, goes through the security mode, and executes the user mode again (executes the program from address "0000H").
It should be noted that the present invention is not limited to this, and when travel outside the designated area is detected and a reset is generated, after initializing the register, the operation may be executed from the user mode without going through the security mode.
In the example of FIG. 100, it is determined whether or not there is a PROM mode request after the register is initialized. You may make it not judge the presence or absence of.
However, when running outside the designated area is detected and a reset is generated, the initialization of the register is always executed.

FIG. 104A is a diagram showing addresses for designating the end address of the program code area 1. FIG. "Program code area 1" corresponds to the program area of the used area in FIG. "Program code area 2" to be described later corresponds to the program area outside the use area in FIG.
Here, as shown in FIG. 96, the address range of the program area of the used area is "0000H" to "11FEH". For this reason, in this embodiment, the start address "0000H" is not defined, and only the end address "11FEH" is defined. This eliminates the need for a storage area (2 bytes) for determining the start address "0000H".
If only the end address is defined and the start address is not defined, the main CPU 55 inevitably recognizes the range from the start address to the end address of the built-in memory as the program code area 1 . Since the program code area 1 (the program area of the used area) actually starts from "0000H", there is no problem even if the main CPU 55 recognizes it as described above.

The end address of program code area 1 is stored at addresses "3FD3H" and "3FD4H" (2-byte area) of the program management area. In this embodiment, as shown in FIG. 104A, the lower byte is stored at address "3FD3H" and the upper byte is stored at address "3FD4H".
Therefore, "FEH" (11111110B) is stored at address "3FD3H", and "11H" (00010001B) is stored at address "3FD4H".

FIG. 104B is a diagram showing addresses for designating the start address of the program code area 2. As shown in FIG.
The addresses for designating the start address of the program code area 2 are set to "3FD5H" and "3FD6H". As shown in FIG. 96, the address range of the program area of the non-used area is "2000H" to "245DH". Therefore, the start address of the program code area 2 is "2000H".
Therefore, "00H" (000000000B) is stored at address "3FD5H", and "20H" (00100000B) is stored at address "3FD6H".

FIG. 104(C) is a diagram showing an address for designating the end address of the program code area 2. As shown in FIG. Addresses for designating the end address of the program code area 2 are set to "3FD7H" and "3FD8H".
"5DH" (01011101B) is stored at address "3FD7H", and "24H" (00100100B) is stored at address "3FD8H".

As described above, under the condition that the end address of the program code area 1 and the start and end addresses of the program code area 2 are stored in the program management area, the main CPU 55 determines that the program code within these designated address ranges is If it is executed, it is determined to be normal, but if the program code outside the specified address range is executed, it is determined to be abnormal.

Note that it is also possible not to specify the program code area. In this case, "0000H" is stored in all of the program code area 1 end address, the program code area 2 start address, and the program code area 2 end address.
Further, for example, if only the address of program code area 1 is specified and the address of program code area 2 is not specified, the end address of program code area 1 is set to "11FEH" as shown in FIG. The address and end address should be "0000H".

Although the eighth embodiment of the present invention has been described above, the present invention is not limited to the above description, and various modifications such as those described below are possible.
(1) Although the vector address is provided in the program area of the use area, it is also possible to provide the vector address in the data area of the use area, for example. For example, if the upper byte value of the vector address is set to "12H", after the power is turned on, "12H" is stored in the I register.
Also, a vector address may be provided in the program area outside the use area. For example, if the upper byte value of the vector address is set to "20H", after the power is turned on, "20H" is stored in the I register.
Furthermore, a vector address may be provided in the data area outside the use area. For example, if the upper byte value of the vector address is set to "24H", after the power is turned on, "24H" is stored in the I register.
When vector addresses are provided in the data area of the used area, when vector addresses are provided in the program area of the non-used area, and when vector addresses are provided in the data area of the non-used area, vector Simply reading the data value stored in the address results in running outside the designated area, and no reset is applied.

(2) The data value stored in the vector address, that is, the start address where the timer interrupt processing program is stored can be set arbitrarily. Although "1134H" is used in the example of FIG. 99(c), it is not limited to this. Also, the top address where the timer interrupt processing program is stored may be after the vector address or before the vector address.
(3) In the above embodiment, two address ranges are defined as the program code executable range (runnable area) as shown in FIG. may
In determining the executable range of the program code in the program area of the use area of the built-in ROM 54, only the end address is defined in the above embodiment, and the start address is not defined. Both can be specified.

(4) In the above embodiment, the addresses storing the programs called by the RST instruction are "0008H", "0010H", "0018H", "0020H", "0028H", "0030H", "0038H", and "0040H" are provided, but the addresses are not limited to these eight addresses. However, it is preferable to set the upper byte of the address storing the program called by the RST instruction to "00H".
By doing so, by providing a module that is called multiple times in one game near the top address (0000H), the module is designed first in the development stage, and the other modules are designed later ( consideration).

(5) The relationship between the address storing the program called by the RST instruction and the vector address is as follows.
First, as shown in FIG. 101, vector addresses may be placed before all addresses storing programs called by the RST instruction.
Second, as shown in FIG. 102, vector addresses may be placed after all addresses storing programs called by the RST instruction.
Third, between one address (eg, "0020H") storing the program called by the RST instruction and another address (eg, "0028H") storing the program called by the RST instruction (eg, "0026H" and "0027H").

In this case, if the vector address is arranged within the program area (within the range of "0000H" to "00FFH") of the used area, it is not necessary to set the upper byte value of the vector address in the I register after power is turned on. In other words, the program capacity can be reduced by setting the I register value to "00H".
Also, as shown in FIG. 99(B), the A3-A0 bit value in the lower 1 byte of the vector address value is "0100B" in this example. Therefore, at this time, the vector address value becomes "00000000/####0100B"("#" is an arbitrary value of "0" or "1").
Here, the above "####B" (vector address set value) is "0000B" in the example of FIG. 99(A). However, it is not limited to this, and "####B" may be replaced with "1000B (8H)" or "1111B (FH)", for example.
When "####B" is set to "1000B (8H)", the vector address value is "00000000/10000100B", and when "####B" is set to "1111B (FH)", the vector address value is The address value is "00000000/11110100B".

(6) The upper byte value of the vector address value is the I register value and is set to "00H". However, the value of the high-order byte of the vector address may be set to a value other than "00H", for example, "02H", although it partially overlaps with the above. In this case, after the game machine 10 is powered on, the I register is initialized, and then the process of storing "02H" in the I register is executed.
In particular, when the vector address is provided in the program area of the use area in the built-in ROM 54, the value of the I register, that is, the upper byte value of the vector address may be in the range of "00H" to "11H".

However, since the I register is initialized (to "00H") each time the power of the game machine 10 is turned on, a process of storing, for example, "02H" in the I register is executed again after the initialization. . As described above, for example, the program code "LD I, 02H" is provided, and the process of storing "02H" in the I register is executed.
On the other hand, if the value of the upper byte of the vector address is set to "00H" as in this embodiment, the value of the I register becomes "00H". After that, the process of storing the specific value in the I register becomes unnecessary. In other words, there is no need to provide the program code "LD I, 00H". Therefore, the program capacity can be reduced accordingly.

(7) The various modifications shown in the first to eighth embodiments and the first to eighth embodiments are not limited to being implemented independently, and can be implemented in combination as appropriate. is.
In particular, the following exemplifies an invention that combines the fourth embodiment and the eighth embodiment.

<Appendix>
The inventions described in the original specification, etc. of the present application (original inventions) can include, for example, the following original inventions 1 to 13, which solve the problem to be solved by the original invention and the problem related to the original invention, respectively. The means for doing so and the effects of the original invention are as follows. However, the inventions described in this specification are not meant to be limited to the initial inventions 1 to 13.
In addition, regarding the original inventions 1 to 5, modified examples will also be described.

1. Original Invention 1
(a) Problem to be Solved by Original Invention 1 The original invention relates to a gaming machine capable of executing timer interrupt processing.
Conventionally, there is known a gaming machine that executes timer interrupt processing at predetermined time intervals during execution of main processing (see, for example, Japanese Unexamined Patent Application Publication No. 2018-089184).
However, the conventional technology lacks the viewpoint of efficiently recognizing the start address of the timer interrupt processing program.
The first problem to be solved by the invention is to make it possible to recognize the start address of the timer interrupt processing program without increasing the program capacity.

(b) Means for Solving the Problem of the Original Invention 1 (Corresponding embodiments are described in parentheses.)
The original invention (eighth embodiment) is
The ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing the start address of the timer interrupt processing program to be executed when a cause for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
It is characterized in that it is configured not to execute processing for setting a value of a predetermined register by a program.
(c) Effect of Original Invention 1 According to the original invention, there is no need to program a value in a predetermined register corresponding to the high-order byte value of the vector address, so the program capacity can be reduced accordingly.

(d) Modification of Original Invention 1 Modifications of Original Invention 1 (eighth embodiment and fourth embodiment) are as follows:
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
has a timer interrupt process (FIG. 66) with an execution period "T"("Tc" in FIG. 73),
When timing A (“A2” in FIG. 73) at which the execution cycle “T” of the timer interrupt processing has arrived is the period when the timer interrupt processing is prohibited, timing B (“A5” in FIG. ”) to enable execution of timer interrupt processing,
After executing timer interrupt processing at timing B, the timing of the next timer interrupt processing (“A3” in FIG. 73) is the timing after “n (n is a natural number)×T” has passed from timing A. Characterized by

(e) Effect of Modified Example of Original Invention 1 According to the modified example of Original Invention 1, in addition to the effects of Original Invention 1, the following effects are obtained.
In the prior art, when the cycle of the timer interrupt processing arrives during the period when the timer interrupt processing is prohibited, the timer interrupt processing may not be executed appropriately thereafter.
However, in the modified example of the original invention 1, the period of the timer interrupt processing can be kept as constant as possible even when the timer interrupt processing is prohibited. In addition, it is possible to avoid affecting the measurement of the timer value updated by the timer interrupt process.

2. Original invention 2
(a) Problems to be Solved by Original Invention 2 The original invention relates to a game machine having a ROM area having a use area and an area outside the use area.
In the prior art, there is known a gaming machine having a use area and an area outside the use area in the ROM area, each having a control area (program area) and a data area (for example, Japanese Patent Laid-Open No. 2018-089184). See Figure 124).
However, in the conventional technology, countermeasures against execution of program code outside the designated area are insufficient.
The original problem to be solved by the invention is to appropriately set the travel prohibition function outside the designated area.

(b) Means for solving the problem of invention 2 (the corresponding embodiment is described in parentheses)
The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
When executing a program in a predetermined address range, it is configured so as not to be reset.
As a predetermined address range,
a first range from the start address of the program area of the used area to the end address of the program area of the used area;
a second range from the start address of the program area of the area outside the use area to the end address of the program area of the area outside the use area,
When defining the second range, it is configured to designate a start address and an end address,
When defining the first range, the end address is specified, but the start address is not specified.
(c) Effect of Original Invention 2 According to the original invention, the first range can be defined without specifying the start address of the first range that is not reset, so the program capacity for defining the first range can be reduced. be able to.

(d) Modified example of the original invention 2 Modified examples of the original invention 2 (eighth embodiment and fourth embodiment) are as follows:
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
When executing a program in a predetermined address range, it is configured so as not to be reset.
As a predetermined address range,
a first range from the start address of the program area of the used area to the end address of the program area of the used area;
a second range from the start address of the program area of the area outside the use area to the end address of the program area of the area outside the use area,
When defining the second range, it is configured to specify a start address and an end address,
When defining the first range, the end address is specified, but the start address is not specified,
has a timer interrupt process (FIG. 66) with an execution period "T"("Tc" in FIG. 75),
When the timing A (“A2” in FIG. 75) at which the execution cycle “T” of the timer interrupt processing arrives is the timer interrupt processing prohibition period, the timing B (“A7” in FIG. 75) after the termination of the prohibition period ”) to enable execution of timer interrupt processing,
After executing the timer interrupt process at the timing B, the timing of the next timer interrupt process ("A3" in FIG. 75) is the timing after "n (n is a natural number)×T" has passed from the timing A,
If the timer interrupt processing (interrupt processing 2 in FIG. 75) started at timing B is being executed at the timing (“A3” in FIG. 75) after “n×T” has passed from timing A, , the timer interrupt processing can be executed at timing C (“A8” in FIG. 75) after the timer interrupt processing started at timing B ends.

(e) Effect of Modified Example of Original Invention 2 According to the modified example of Original Invention 2, in addition to the effects of Original Invention 2, the following effects are obtained.
In the prior art, when the cycle of the timer interrupt processing arrives during the period when the timer interrupt processing is prohibited, the timer interrupt processing may not be executed appropriately thereafter.
However, in the modified example of the original invention 2, even if there is a period during which timer interrupt processing is prohibited, the cycle of timer interrupt processing can be kept as constant as possible. In addition, it is possible to avoid affecting the measurement of the timer value updated by the timer interrupt process.

3. Original invention 3
(a) Problem to be solved by original invention 3 Same as original invention 1.
(b) Means for solving the problem of invention 3 (the corresponding embodiment is described in parentheses)
The original invention (eighth embodiment) is
It has a use area as ROM (built-in ROM 54),
The used area has a program area (also referred to as "control area", hereinafter the same),
A program related to power-on is stored from the first address of the program area of the used area,
A jump instruction to a B address (the B address is an address after the A address) is stored at the A address of the program area of the used area,
At the B address of the program area in the used area, a program following the program related to power-on is stored.
A vector address is provided between the A address and the B address to store a start address of a program for timer interrupt processing to be executed when a cause for timer interrupt processing occurs.
(c) Effect of Original Invention 3 According to the original invention, the program related to power-on is stored from the first address of the used area to the A address before the vector address, and furthermore, in the A address, the B address after the vector address is stored. , so the vector address can be placed at the optimal address.

(d) Modification of Original Invention 3 Modifications of Original Invention 3 (Eighth Embodiment and Fourth Embodiment) are as follows:
It has a use area as ROM (built-in ROM 54),
The used area has a program area (also referred to as "control area", hereinafter the same),
A program related to power-on is stored from the first address of the program area of the used area,
A jump instruction to a B address (the B address is an address after the A address) is stored at the A address of the program area of the used area,
At the B address of the program area in the used area, a program following the program related to power-on is stored.
Between the A address and the B address, there is a vector address storing a start address of a timer interrupt processing program to be executed when a timer interrupt processing factor occurs,
has a timer interrupt process (FIG. 66) with an execution period "T"("Tc" in FIG. 72),
The main processing has at least one timer interrupt processing disabled period,
Assuming that the designed maximum period of the timer interrupt processing disabled period is "S"("Td" in FIG. 72),
T>S (Tc>Td)
is characterized by satisfying

(e) Effect of Modified Example of Original Invention 3 According to the modified example of Original Invention 3, in addition to the effect of Original Invention 3, the following effects are obtained.
In the prior art, the cycle of timer interrupt processing may come during the period when timer interrupt processing is prohibited, and timer interrupt processing may not be executed appropriately after that.
However, in the modified example of invention 3, the designed maximum period "S" of the timer interrupt processing inhibition period is shorter than the execution period "T" of the timer interrupt processing. Therefore, even when the timer interrupt process prohibition period has started, the timer interrupt process prohibition period can be ended before the next timer interrupt process execution period arrives. As a result, the next timer interrupt process can be executed while maintaining the timer interrupt process execution period "T".

4. Original Invention 4
(a) Problem to be solved by original invention 4 Same as original invention 1.
(b) Means for solving the problem of the original invention 4 (Corresponding embodiments are described in parentheses.)
The original invention (eighth embodiment) is
It has a use area as ROM (built-in ROM 54),
The used area has a program area (also referred to as "control area", hereinafter the same),
A program related to power-on is stored from the first address of the program area of the used area,
A jump instruction to a B address (the B address is an address after the A address) is stored at the A address of the program area of the used area,
At the B address of the program area in the used area, a program following the program related to power-on is stored.
Between the A address and the B address, at least one module (for example, control command set 1) called multiple times when executing one game is stored,
A vector address is provided between the A address and the B address to store a start address of a program for timer interrupt processing to be executed when a cause for timer interrupt processing occurs.

(c) Effect of Original Invention 4 According to the original invention, the program related to power-on is stored from the first address of the used area to the A address before the vector address, and furthermore, at the A address, the B address after the vector address is stored. , so the vector address can be placed at the optimal address.
Also, it is possible to arrange modules that are called multiple times in one game at appropriate addresses.
The module is preferably called multiple times in one game, but may be a module called once in one game, for example.

(d) Modification of Original Invention 4 Modifications of Original Invention 4 (eighth embodiment and fourth embodiment) are as follows:
It has a use area as ROM (built-in ROM 54),
The used area has a program area (also referred to as "control area", hereinafter the same),
A program related to power-on is stored from the first address of the program area of the used area,
A jump instruction to a B address (the B address is an address after the A address) is stored at the A address of the program area of the used area,
At the B address of the program area in the used area, a program following the program related to power-on is stored.
Between the A address and the B address, at least one module (for example, control command set 1) called multiple times when executing one game is stored,
Between the A address and the B address, there is a vector address storing a start address of a timer interrupt processing program to be executed when a timer interrupt processing factor occurs,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
The main processing has at least one timer interrupt processing disabled period,
Even if a predetermined flag is set during the period in which timer interrupt processing is disabled, timer interrupt processing is not executed during the period in which timer interrupt processing is disabled, and the value of a predetermined counter can be updated. and

(e) Effect of Modified Example of Original Invention 4 According to the modified example of Original Invention 4, in addition to the effect of Original Invention 4, the following effects are obtained.
In the prior art, the cycle of timer interrupt processing may come during the period in which timer interrupt processing is disabled. It becomes a problem.
However, in the modified example of the original invention 4, even if there is a period during which timer interrupt processing is prohibited, it is possible to keep the execution cycle of timer interrupt processing as short as possible. In addition, it is possible to prevent the period during which timer interrupt processing is prohibited from affecting the updating of a predetermined counter.

5. original invention 5
(a) Problem to be solved by original invention 5 Same as original invention 1.
(b) Means for solving the problem of the original invention 5 (Corresponding embodiments are described in parentheses.)
The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a use area and a management area,
The used area has a program area (also referred to as "control area", hereinafter the same),
The program area of the used area has a vector address storing the start address of the timer interrupt processing program to be executed when a cause for timer interrupt processing occurs,
The management area has an address (hereinafter referred to as "interrupt initialization address") storing data for initializing timer interrupt processing,
bit values of at least some of the lower bytes of the vector address are configurable based on data stored at the interrupt initialization address;
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
It is characterized in that it is configured not to execute processing for setting a value of a predetermined register by a program.
(c) Effect of original invention 5 Same as original invention 1.

(d) Modified example of the original invention 5 Modified examples of the original invention 5 (eighth embodiment and fourth embodiment) are:
ROM (built-in ROM 54) has a use area and a management area,
The used area has a program area (also referred to as "control area", hereinafter the same),
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The management area has an address (hereinafter referred to as "interrupt initialization address") storing data for initializing timer interrupt processing,
bit values of at least some of the lower bytes of the vector address are configurable based on data stored at the interrupt initialization address;
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
The main processing has at least one timer interrupt processing disabled period,
If a predetermined flag is set during the period in which timer interrupt processing is disabled, the next instruction (for example, the "RET" instruction) is executed based on the timer interrupt processing permission instruction ("EI" instruction). Afterwards, the timer interrupt processing can be executed (FIG. 62(A))
It is characterized by

(e) Effects of Modification of Original Invention 5 According to the modification of Initial Invention 5, in addition to the effects of Initial Invention 5, the following effects are obtained.
In the prior art, the cycle of timer interrupt processing may come during the period in which timer interrupt processing is disabled. It becomes a problem.
However, in the modified example of the original invention 5, even if there is a period during which timer interrupt processing is prohibited, it is possible to keep the execution cycle of timer interrupt processing as short as possible. In addition, it is possible to prevent the period during which timer interrupt processing is prohibited from affecting the updating of a predetermined counter.

In addition, in the modified example of the original invention 1 to the modified example of the original invention 5, the predetermined invention specifying matters in the fourth embodiment are added to the original inventions 1 to 5, respectively, but the modifications are limited to the above modifications. isn't it.
In other words, to any one of the initial inventions 1 to 5, any of the invention specifying matters of the fourth embodiment in the modification of the initial invention 1 to the modification of the initial invention 5 may be added.
Furthermore, to any one of the initial inventions 1 to 5, a plurality of invention specifying matters of the fourth embodiment in the modification of the original invention 1 to the modification of the original invention 5 may be added.
Furthermore, for any of the initial inventions 6 to 13 described later, any of the invention specifying matters of the fourth embodiment (one or more invention specifying matters) in the modification of the initial invention 1 to the modification of the initial invention 5 You can add

6. original invention 6
(1) Problem to be solved by original invention 6 Same as original invention 1.
(2) Problem to be solved by original invention 6 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing the start address of the timer interrupt processing program to be executed when a cause for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
The main processing has at least one timer interrupt processing disabled period,
Even if the main process runs out of control during the period in which the timer interrupt process of the main process is disabled and the predetermined counter times out "n (n>1)" times, "n '' times of timer interrupt processing are not executed continuously (Fig. 69).
It is characterized by

(c) Effect of Original Invention 6 According to the original invention, it is not necessary to set a value in a predetermined register corresponding to the upper byte value of the vector address by a program, so that the program capacity can be reduced accordingly.
Also, even if there is a period during which timer interrupt processing is prohibited, it is possible to keep the execution cycle of timer interrupt processing as short as possible. Furthermore, it is possible to prevent the period during which timer interrupt processing is prohibited from affecting the updating of a predetermined counter.
Furthermore, it is possible to prevent the main processing from becoming unable to be executed due to the timer interrupt processing being continuously executed a plurality of times after the expiration of the period in which the timer interrupt processing is prohibited.

(d) Others The following matters specifying the invention in the original invention 6 "Equipped with a predetermined counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
The main processing has at least one timer interrupt processing disabled period,
Even if the main process runs out of control during the period in which the timer interrupt process of the main process is disabled and the predetermined counter times out "n (n>1)" times, "n "It is configured so that timer interrupt processing is not executed continuously."
can be combined with any of the initial inventions 2 to 5.

7. original invention 7
(1) Problem to be solved by original invention 7 Same as original invention 1.
(2) Problem to be solved by original invention 7 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing the start address of the timer interrupt processing program to be executed when a cause for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
The main processing has at least one timer interrupt processing disabled period,
The period during which the timer interrupt process in the main process is prohibited is shorter than the period during which the count value of the predetermined counter goes around (Fig. 72).
It is characterized by

(c) Effect of Original Invention 7 According to the original invention, it is not necessary to set a value in a predetermined register corresponding to the upper byte value of the vector address by a program, so that the program capacity can be reduced accordingly.
In addition, even if there is a period during which timer interrupt processing is prohibited, it is possible to keep the execution cycle of timer interrupt processing as short as possible. Furthermore, it is possible to prevent the period during which timer interrupt processing is prohibited from affecting the updating of a predetermined counter.
Furthermore, even if the timer interrupt process is executed after the expiration of the timer interrupt process prohibition period, the timer interrupt process can be completed before the arrival of the next timer interrupt process execution period.

(d) Others The following matters specifying the invention in the original invention 7 "Equipped with a predetermined counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
The main processing has at least one timer interrupt processing disabled period,
The period during which timer interrupt processing in the main process is disabled is shorter than the period during which the count value of the predetermined counter goes around."
can be combined with any of the initial inventions 2 to 5.

8. original invention 8
(1) Problem to be solved by original invention 8 Same as original invention 1.
(2) Problem to be solved by original invention 8 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
After the power is turned on, after the value is written in the counter setting register, updating of the predetermined counter is started. Execute the RWM abnormality determination processing in steps S2708, S2712, and S2715),
After determining whether or not there is an RWM abnormality, the power is turned on when a timer interrupt processing permission instruction is executed (for example, "EI" instruction in step S2740 in FIG. 65) and a predetermined flag is set. It is characterized by being able to execute the first timer interrupt process after the timer has run out.

(c) Effect of Original Invention 8 According to the original invention, it is not necessary to set a value in a predetermined register corresponding to the upper byte value of the vector address by a program, so that the program capacity can be reduced accordingly.
In addition, even if there is a period during which timer interrupt processing is prohibited, it is possible to keep the execution cycle of timer interrupt processing as short as possible. Furthermore, it is possible to prevent the period during which timer interrupt processing is prohibited from affecting the updating of a predetermined counter.
Furthermore, it is possible to prevent the RWM data from changing from before the power is turned off due to timer interrupt processing. As a result, the RWM abnormality determination can be accurately performed, and the timer interrupt processing can be performed as soon as possible after the timer interrupt processing permission instruction is issued.

(d) Others The following matters specifying the invention in Original Invention 8: "Equipped with a prescribed counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
After the power is turned on, after the value is written in the counter setting register, updating of the predetermined counter is started, and then the presence or absence of the RWM abnormality can be determined,
After determining whether or not there is an RWM abnormality, a timer interrupt processing permission instruction is executed, and when a predetermined flag is set, the first timer interrupt processing after the power is turned on can be executed.”
can be combined with any of the initial inventions 2 to 5.

9. original invention 9
(1) Problem to be solved by original invention 9 Same as original invention 1.
(2) Problem to be solved by original invention 9 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
After the power is turned on, it is determined whether or not there is an RWM abnormality, and then the value is written in the counter setting register (in FIG. process),
After determining whether or not there is an RWM abnormality, a timer interrupt processing permission instruction is executed, and when a predetermined flag is set, the first timer interrupt processing after the power is turned on can be executed. characterized by

(c) Effect of Original Invention 9 According to the original invention, it is not necessary to set a value in a predetermined register corresponding to the upper byte value of the vector address by a program, so that the program capacity can be reduced accordingly.
Also, even if there is a period during which timer interrupt processing is prohibited, it is possible to keep the execution cycle of timer interrupt processing as short as possible. Furthermore, it is possible to prevent the period during which timer interrupt processing is prohibited from affecting the updating of a predetermined counter.
Furthermore, it is possible to prevent timer interrupt processing from being started due to a problem during the execution of the RWM abnormality determination. As a result, it is possible to prevent the RWM data from being updated due to execution of the timer interrupt process before the RWM abnormality determination.

(d) Others The following matters specifying the invention in the original invention 9 "Equipped with a predetermined counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
After the power is turned on, after judging whether there is an RWM abnormality, write the value to the counter setting register,
After determining whether or not there is an RWM abnormality, a timer interrupt processing permission instruction is executed, and when a predetermined flag is set, the first timer interrupt processing after the power is turned on can be executed.”
can be combined with any of the initial inventions 2 to 5.

10. original invention 10
(1) Problem to be solved by original invention 10 Same as original invention 1.
(2) Problem to be Solved by Original Invention 10 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
The power is turned off when the predetermined counter value is "n" and the predetermined timer value stored in the RWM is "t", and then the power is turned on without satisfying the setting change condition. The value of the predetermined counter is "0" and the predetermined timer value stored in the RWM is maintained at "t" when the timer reaches .

(c) Effect of Original Invention 10 According to the original invention, it is not necessary to set a value in a predetermined register corresponding to the upper byte value of the vector address by a program, so that the program capacity can be reduced accordingly.
When the power is turned off and then turned on without satisfying the setting change condition, the value of the predetermined counter becomes "0", so the value of the predetermined counter is held when the power is turned off. Compared to the case, it is possible to lengthen the time from when the power is turned on until the first timer interrupt processing is executed.

(d) Others The following matters specifying the invention in the original invention 10 "Equipped with a predetermined counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
The power is turned off when the predetermined counter value is "n" and the predetermined timer value stored in the RWM is "t", and then the power is turned on without satisfying the setting change condition. is reached, the value of the predetermined counter is '0' and the predetermined timer value stored in the RWM is maintained at 't'."
can be combined with any of the initial inventions 2 to 5.

11. original invention 11
(1) Problem to be solved by original invention 11 Same as original invention 1.
(2) Problems to be Solved by Original Invention 11 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
The value of the predetermined counter can cycle from 'm' (for example, '125') to '1',
Regardless of the value of the predetermined counter, the value of the predetermined counter does not return to "m" based on the execution of timer interrupt processing,
It is characterized in that the value of a predetermined counter can be updated even during execution of timer interrupt processing.

(c) Effect of Original Invention 11 According to the original invention, it is not necessary to set a value in a predetermined register corresponding to the upper byte value of the vector address by a program, so that the program capacity can be reduced accordingly.
Also, regardless of the time required for timer interrupt processing, the execution cycle of timer interrupt processing can be kept constant.

(d) Others The following matters specifying the invention in the original invention 11 "Equipped with a predetermined counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
The value of the predetermined counter can circulate from "m" to "1",
Regardless of the value of the predetermined counter, the value of the predetermined counter does not return to "m" based on the execution of timer interrupt processing,
Make it possible to update the value of a given counter even while timer interrupt processing is in progress.”
can be combined with any of the initial inventions 2 to 5.

12. original invention 12
(1) Problem to be solved by original invention 12 Same as original invention 1.
(2) Problems to be solved by the original invention 12 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
During the execution of timer interrupt processing, duplicate timer interrupt processing is prevented (in FIG. 66, step S2890 (IFF1=0, IFF2=0)),
When terminating the timer interrupt process, after executing the timer interrupt process permission instruction (step S2892), the return instruction (step S2893) can be executed,
When a predetermined flag is set during execution of timer interrupt processing, the next timer interrupt processing can be executed after execution of a return instruction after the end of the timer interrupt processing.

(c) Effect of Original Invention 12 According to the original invention, since it is not necessary to set a value in a predetermined register corresponding to the upper byte value of the vector address by a program, the program capacity can be reduced accordingly.
Further, by preventing the timer interrupt processing from being executed immediately after the timer interrupt processing permission instruction is issued, it is possible to prevent the timer interrupt processing from being redundantly executed.

(d) Others The following matters specifying the invention in the original invention 12 "Equipped with a predetermined counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
Avoid duplicating timer interrupt processing while executing timer interrupt processing.
When terminating timer interrupt processing, a return instruction can be executed after a timer interrupt processing permission instruction is executed,
When a predetermined flag is set during the execution of timer interrupt processing, the next timer interrupt processing can be executed after executing the return instruction after the end of the timer interrupt processing.”
can be combined with any of the initial inventions 2 to 5.

13. original invention 13
(1) Problem to be solved by original invention 13 Same as original invention 1.
(2) Problems to be solved by the original invention 13 The original invention (eighth embodiment) is
ROM (built-in ROM 54) has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a predetermined register (I register),
The initial value of the value of the predetermined register is "00H",
The program is configured not to execute the process of setting the value of a predetermined register,
A predetermined counter (8-bit counter 501) is provided,
When a predetermined counter times out (for example, when it reaches "125"), a predetermined flag (interrupt flag 504) can be set,
Based on the fact that a predetermined flag is set, timer interrupt processing (FIG. 66) can be executed,
During the execution of timer interrupt processing, duplicate timer interrupt processing is prevented (in FIG. 66, step S2890 (IFF1=0, IFF2=0)),
Even if the timer interrupt process runs out of control during the execution of the timer interrupt process and the value of the predetermined counter times out "n (n >1)" times during the execution of the timer interrupt process, "n" times It is configured not to continuously execute timer interrupt processing "n" times based on timeout (Fig. 70)
It is characterized by

(c) Effect of Original Invention 13 According to the original invention, it is not necessary to set a value in a predetermined register corresponding to the high-order byte value of the vector address by a program, so that the program capacity can be reduced accordingly.
In addition, it is possible to prevent the main process from becoming unable to be executed due to the repeated execution of the timer interrupt process a plurality of times after the expiration of the period in which the timer interrupt process is prohibited.

(d) Others The following matters specifying the invention in Original Invention 13: "Equipped with a predetermined counter,
A predetermined flag can be set when a predetermined counter times out,
enabling execution of timer interrupt processing based on the setting of a predetermined flag;
Avoid duplicating timer interrupt processing while executing timer interrupt processing.
Even if the timer interrupt process runs out of control during the execution of the timer interrupt process and the value of the predetermined counter times out "n (n >1)" times during the execution of the timer interrupt process, "n" times It is configured not to continuously execute timer interrupt processing "n" times based on timeout."
can be combined with any of the initial inventions 2 to 5.

10 slot machine (gaming machine)
10a lower panel 11 power switch 12 front door 12c control panel 13 cabinet 14 pattern display device 17 door switch 21 effect lamp (decorative lamp part)
22 speaker 23 image display device 24 (24A, 24B) operation button 31 reel 32 motor 33 reel sensor 35 hopper 36 hopper motor 37a, 37b payout sensor 40a 1-bet switch 40b 3-bet switch 41 start switch 42 stop switch 43 settlement switch 44a, 44b insertion sensor 45 blocker 46 path sensor 47 medal insertion slot 50 main control board (main control means)
50a resistance 50b mark number 50c mark 50d boundary line 50e DP mark 51 input port 52 output port 53 RWM
54 ROMs
55 Main CPU (main chip)
55a Pin 55b Recessed portion 55c Stepped portion 55d Stepped portion 55e Two-dimensional code 55f Model number seal 55g Product name 55h Company name 55i Stepped portion 55j Hidden character 56 Socket 56a Cavity portion 56b Stepped portion 56c Pin insertion port 56d Socket pin 56e Notch portion 57 Connector 57a Foot 57b Lead wire 61 Hand lottery means 62 Winning flag control means 63 Push order instruction number selection means 64 Effect group number selection means 65 Reel control means 66 Winning judgment means 67 Payout means 71 Control command transmission means 73 Set value display LED
74 management information display LED (role ratio monitor)
75 display substrate 76 credit number display LED
77 Advantageous period display LED
78 Acquisition number display LED
79 Status display LED
79a 1 bet display LED
79b 2bet indicator LED
79c 3bet indicator LED
79d Game start display LED
79e Input indicator LED
79f Replay display LED
80 sub-control board (sub-control means)
81 Input port 82 Output port 83 RWM
84 ROMs
85 Sub CPU
91 effect output control means 151 setting key insertion port 152 setting key switch 153 setting change (reset) switch 200 hall computer 301 interrupt waiting monitor register 302 interrupt prohibition flag (IFF1 register, IFF2 register)
500 timer circuit 501 (PTC) 8-bit counter 502 (PTC) prescaler register 503 (PTC) counter setting register 504 (PTC) interrupt flag

Claims (1)

As a ROM area, it has a used area and an area outside the used area,
The used area has a program area (also referred to as a "control area"; the same shall apply hereinafter) and a data area,
The out-of-use area has a program area and a data area,
The program area of the used area has a vector address storing a start address of a program for timer interrupt processing to be executed when a factor for timer interrupt processing occurs,
The value of the upper byte of the vector address is the value of a given register,
The initial value of the value of the predetermined register is "00H",
A game machine characterized in that it is configured not to execute a process of setting a value of a predetermined register by a program.

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