JP2023013738A - Light emitting device, display, photoelectric conversion device, electronic apparatus, and wearable device - Google Patents

Abstract

To provide a technique advantageous in reducing power consumption in a display.SOLUTION: A light emitting device includes: a plurality of pixels that are arranged to constitute a plurality of rows and a plurality of columns; and a control unit for controlling the plurality of pixels. The plurality of pixels each include a light emitting element, a pixel memory that holds a luminance signal, a driving circuit that generates a driving signal according to the luminance signal, and a current generation circuit that supplies a driving current according to the driving signal to the light emitting element. The control unit can control the timing at which the driving circuit generates the driving signal for each pixel of the plurality of pixels.SELECTED DRAWING: Figure 2

Description

The present invention relates to light-emitting devices, display devices, photoelectric conversion devices, electronic devices, and wearable devices.

A light-emitting device that causes a light-emitting element to emit light with a predetermined luminance can be used for monitors of mobile devices such as smartphones. Since portable devices often operate using a battery as a power source, low power consumption is required. Japanese Patent Application Laid-Open No. 2002-200000 discloses that an SRAM circuit is provided for each pixel, and power consumption is reduced by not transferring display data to the pixel when the display content is not changed.

JP 2003-108095 A

In the configuration disclosed in Patent Document 1, data is rewritten for each row selected by a scanning line, so even when part of the data in a row is rewritten, data for the entire row is transferred. Depending on the display content, such as the number of pixels whose data is to be rewritten, the effect of reducing power consumption may be diminished.

SUMMARY OF THE INVENTION An object of the present invention is to provide a technique that is advantageous for reducing power consumption in a display device.

In view of the above problems, a light emitting device according to an embodiment of the present invention provides a plurality of pixels arranged to form a plurality of rows and a plurality of columns, a control unit for controlling the plurality of pixels, wherein each of the plurality of pixels includes a light emitting element, a pixel memory holding a luminance signal, a driving circuit generating a driving signal corresponding to the luminance signal, and a driving signal corresponding to the driving signal. and a current generation circuit that supplies a drive current to the light emitting element, wherein the control unit is capable of controlling the timing at which the drive circuit generates the drive signal for each of the plurality of pixels. Characterized by

ADVANTAGE OF THE INVENTION According to this invention, the technique which suppresses the light emission dispersion|variation of a light emitting element can be provided, suppressing the increase in a circuit scale.

1A and 1B are diagrams showing a configuration example of a light-emitting device according to the present embodiment; FIG. FIG. 2 is a diagram showing a configuration example of a pixel of the light emitting device in FIG. 1; FIG. 3 is a diagram showing a configuration example of a drive circuit for the pixel in FIG. 2; FIG. 3 is a diagram showing a configuration example of a current generation circuit and a light emitting element of the pixel in FIG. 2; FIG. 2 is a diagram showing an arrangement example of pixels whose luminance signals are updated and pixels whose luminance signals are not updated in the light-emitting device of FIG. 1; FIG. 2 is a timing chart showing an example of driving the light emitting device in FIG. 1; FIG. 2 is a timing chart showing an example of driving the light emitting device in FIG. 1; FIG. 2 is a diagram showing an arrangement example of the light emitting device in FIG. 1; FIG. 3 is a diagram showing an arrangement example of pixels in FIG. 2; FIG. 3 is a diagram showing a configuration example of a drive circuit for the pixel in FIG. 2; FIG. 2 is a timing chart showing an example of driving the light emitting device in FIG. 1; FIG. 2 is a timing chart showing an example of driving the light emitting device in FIG. 1; 1A and 1B are diagrams showing a configuration example of a light-emitting device according to the present embodiment; FIG. FIG. 14 is a diagram showing a configuration example of a pixel of the light emitting device of FIG. 13; FIG. 15 is a diagram showing a configuration example of a drive circuit for the pixel in FIG. 14; FIG. 14 is a timing chart showing an example of driving the light emitting device of FIG. 13; FIG. 2 is a diagram showing a configuration example of a pixel of the light emitting device in FIG. 1; FIG. 2 is a diagram showing a configuration example of a pixel of the light emitting device in FIG. 1; 1A and 1B are diagrams showing an example of a display device using the light emitting device of this embodiment; FIG. 1A and 1B are diagrams showing an example of a photoelectric conversion device using the light emitting device of this embodiment; FIG. 1A and 1B are diagrams illustrating an example of an electronic device using a light-emitting device of this embodiment; FIG. 1A and 1B are diagrams showing an example of a display device using the light emitting device of this embodiment; FIG. 1A and 1B are diagrams showing an example of a wearable device using the light emitting device of this embodiment; FIG.

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. In addition, the following embodiments do not limit the invention according to the scope of claims. Although multiple features are described in the embodiments, not all of these multiple features are essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same or similar configurations are denoted by the same reference numerals, and redundant description is omitted.

A light emitting device according to an embodiment of the present disclosure will be described with reference to FIGS. 1 to 23(b). FIG. 1 is a block diagram showing an outline of a light emitting device 101 of this embodiment. As shown in FIG. 1, the light emitting device 101 includes a plurality of pixels 102 arranged to form a plurality of rows and a plurality of columns, and a controller 110 for controlling the plurality of pixels 102. . An external system 115 is connected to the light emitting device 101 . The external system 115 supplies the control signal 10 and the external luminance signal 11 to the controller 110 of the light emitting device 101 . Control unit 110 outputs various signals for driving light emitting device 101 based on control signal 10 and external luminance signal 11 . Specifically, the control unit 110 supplies the pixel control signal 12 and the luminance signal 13 to each pixel 102 .

As shown in FIG. 1, a region in which a plurality of pixels 102 are arranged in a two-dimensional array is sometimes called a pixel array 103. In FIG. In the configuration shown in FIG. 1, the pixel array 103 in which the pixels 102 are arranged in 12 columns in the row direction (horizontal direction) and 8 rows in the column direction (vertical direction) is illustrated. The number of pixels 102 to be processed is not limited to this. For example, more pixels 102 can be arranged in pixel array 103 . This also applies to subsequent figures.

FIG. 2 is a diagram showing a configuration example of the pixel 102. As shown in FIG. As shown in FIG. 2, each of the plurality of pixels 102 arranged in the light emitting device 101 includes a pixel memory 201, a driving circuit 202, a current generating circuit 203, and a light emitting element 204. FIG.

The pixel memory 201 holds the luminance signal 13 supplied from the control section 110 . The luminance signal 13 held in the pixel memory 201 is supplied to the drive circuit 202 as image data 20 . The control unit 110 supplies address information for designating an arbitrary pixel among the plurality of pixels 102 together with a luminance signal 13 that is digital data (grayscale value) corresponding to the emission luminance of the pixel 102 . This enables each pixel 102 to perform the operation of receiving the required luminance signal 13 in response to the address information.

The pixel memory 201 may have any specific configuration as long as it can write the digital data luminance signal 13 supplied from the control unit 110 and output the digital data image data 20 to the drive circuit 202 . For example, the pixel memory 201 may be composed of a flip-flop, or may be composed of an SRAM or a DRAM. If the pixel memory 201 is configured using SRAM or DRAM, a control circuit dedicated to the pixel memory 201 may be required for writing the luminance signal 13 and reading the image data 20 .

A drive circuit 202 generates a drive signal 21 corresponding to the luminance signal 13 . FIG. 3 shows a configuration example of the drive circuit 202 in this embodiment. The drive circuit 202 shown in FIG. 3 includes a D/A converter 301 for generating an analog signal corresponding to the luminance signal 13 as the drive signal 21 . More specifically, the D/A converter 301 is supplied with the luminance signal 13 held in the pixel memory 201 as the image data 20, and converts the image data 20 from digital to analog to obtain the value of the image data 20. A drive voltage 32 that becomes a luminance signal 21 corresponding to the voltage is generated and output to the write transistor 302 . Also, the D/A converter 301 operates when receiving the D/A start signal 30 included in the pixel control signal 12 supplied from the control unit 110 .

One of the two main terminals of the write transistor 302 is connected to the control terminal of the drive transistor 402 of the current generation circuit 203, which will be described later. A drive voltage 32 is supplied to the other of the two main terminals of the write transistor 302 . A write control signal 31 included in the pixel control signal 12 is supplied to the control terminal of the write transistor 302 . The write transistor 302 becomes conductive in response to the write control signal 31 supplied to the control terminal. As a result, the write transistor 302 supplies the drive voltage 32 corresponding to the luminance signal 13 to the current generation circuit 203 as the drive signal 21 .

FIG. 4 shows a configuration example of the current generation circuit 203 and the light emitting element 204 in this embodiment. A current generating circuit 203 supplies a driving current 22 corresponding to the driving signal 21 to the light emitting element 204 . In the configuration shown in FIG. 2, current generation circuit 203 includes holding capacitor 401 and driving transistor 402 . Light emitting element 204 is shown as diode 403 .

A drive signal 21 supplied from the drive circuit 202 is written in the storage capacitor 401 and applied to the control terminal of the drive transistor 402 . The back gate voltage of any transistor arranged in the pixel 102 may be equal to the voltage Vdd of the power supply terminal 404 . The holding capacitance 401 may be a parasitic capacitance of the driving transistor 402, or may be MIM (Metal Insulator Metal) capacitance or the like.

In this embodiment, the light emitting element 204 may be a current driven element such as an organic EL (Organic Electroluminescent) element. When the light emitting element 204 emits light, the amount of current flowing through the driving transistor 402 changes according to the driving signal 21 . As a result, the capacitance between the two main terminals (anode and cathode) of the light emitting element 204 is charged to a predetermined potential, and a current corresponding to the potential difference flows through the light emitting element 204 . As a result, the light emitting element 204 emits light with a predetermined luminance.

The light emitting element 204 can be an organic EL element as described above. In this case, the light-emitting element 204 comprises an organic layer including a light-emitting layer between the anode and cathode terminals. The organic layer may appropriately have one or more of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer in addition to the light emitting layer. In addition, the case where the drive transistor 402 is connected to the anode of the light emitting element 204 and the write transistor 302 and the drive transistor 402 are P-type transistors will be described below, but the present invention is not limited to this. The polarity and conductivity type may be reversed. Further, for example, the driving transistor 402 may be a P-type transistor, and the writing transistor 302 may be an N-type transistor, and the supplied potentials and connections may be changed as appropriate according to the conductivity type and polarity.

As a specific configuration shown in FIG. 4 , one of the two main terminals of the driving transistor 402 (the drain here) is connected to one of the two main terminals of the light emitting element 204 . The other (source here) of the two main terminals of the drive transistor 402 is connected to the power supply terminal 404 (voltage Vdd). The other of the two main terminals of the light emitting element 204 is connected to the power supply terminal 405 (voltage Vss). The driving transistor 402 supplies a current from the power supply terminal 404 to the light emitting element 204 to emit light. More specifically, the drive transistor 402 supplies a current corresponding to the drive signal 21 to the light emitting element 204, and the light emitting element 204 emits light with luminance corresponding to the amount of current supplied.

Next, an example of driving the light emitting device 101 will be described with reference to FIGS. FIG. 5 is an image diagram showing pixels 102 whose luminance is changed and pixels 102 whose luminance is not changed in one frame out of a plurality of frames for displaying an image in the light emitting device 101. FIG. Hereinafter, when a specific pixel among the plurality of pixels 102 is indicated, the pixel 102 in the Xth column and the Yth row may be referred to as a pixel (X, Y). FIG. 5 shows a frame in which the intensity of pixel (5,3) is changed and the intensity of the other pixel 102 is unchanged.

FIG. 6A is a timing chart showing an example of driving the pixel 102 whose luminance is changed, and FIG. 6B is a timing chart showing an example of driving the pixel 102 whose luminance is not changed. FIG. 6(a) shows driving of pixel (5, 3) shown in FIG. 5, and FIG. 6(b) shows driving of pixel 102 other than pixel (5, 3), for example, pixel (5, 4). shows drive.

In the timing chart of FIG. 6A, the period before time t2 is a light emission period 601 during which the light emitting element 204 emits light according to the luminance signal 13 supplied from the control section 110 before time t0. In FIG. 6A, a light emission period 601 is shown as a period during which the drive signal 21 supplied from the drive circuit 202 to the current generation circuit 203 according to the luminance signal 13 is at voltage Vsig1. During this light emission period 601, the write transistor 302 is in an off state.

From time t0 in the light emission period 601, the control unit 110 supplies a luminance signal 13 having a signal value different from that before time t0 to the pixel (5, 3) whose luminance is to be changed. As described above, the control unit 110 controls the luminance signal 13 of the pixel (5, 3), which is the change target pixel whose signal value is to be changed among the plurality of pixels 102, and the pixel (5, 3), which is the change target pixel. 3) Supply the address information. The pixel (5, 3), which is the pixel to be changed, updates the luminance signal 13 held in the pixel memory 201 according to the address information. When the luminance signal 13 is written in the pixel memory 201, the image data 20, which is the luminance signal 13 supplied from the pixel memory 201 to the driving circuit 202, is updated from data1 to data2. At time t1 after the image data 20 is updated to data2, the luminance of the light emitting element 204 of the pixel 102 starts to change.

At time t1, the control unit 110 supplies the D/A start signal 30 as the pixel control signal 12 to the D/A converter 301, and the drive circuit 202 starts generating the reset voltage. The drive voltage 32, which is the output of the D/A converter 301, transitions to the reset voltage Vres. The reset voltage Vres can be supplied from outside the drive circuit 202, for example. Here, the voltage of the driving voltage 32 before time t1 may be any voltage value and is not used. For example, the voltage of the drive voltage 32 may be 0V.

Next, at time t2, the control unit 110 causes the write control signal 31 as the pixel control signal 12 to transition from the low state to the high state. As a result, the signal supplied to the control terminal of the write transistor 302 transitions from the high state to the low state, the write transistor 302 becomes conductive, and the voltage Vres of the drive voltage 32 is applied as the drive signal 21 to the drive transistor. 402 control terminal. When the voltage Vres is supplied to the driving transistor 402 as the driving signal 21, the driving transistor 402 becomes non-conductive. As a result, no current is supplied from the driving transistor 402 to the light emitting element 204, so that the pixel (5, 3) enters the non-light emitting period 611. FIG.

At time t3, control unit 110 causes write control signal 31 to transition from a high state to a low state, thereby rendering write transistor 302 non-conductive. Next, at time t4, the control unit 110 supplies the D/A start signal 30 as the pixel control signal 12 to the D/A converter 301, and the driving circuit 202 starts generating the driving voltage. The driving voltage 32 that is the output of the D/A converter 301 transitions from the reset voltage Vres to the voltage Vsig2 according to the data2 of the image data 20 that is the luminance signal 13 .

At time t5, the control unit 110 causes the write control signal 31 as the pixel control signal 12 to transition from the low state to the high state. As a result, the signal supplied to the control terminal of the write transistor 302 transitions from the high state to the low state, the write transistor 302 becomes conductive, and the voltage Vsig2 of the drive voltage 32 is applied as the drive signal 21 to the drive transistor 302 . 402 control terminal. When the voltage Vsig2 is supplied to the driving transistor 402 as the driving signal 21, the driving transistor 402 becomes conductive according to the voltage Vsig2. As a result, a predetermined current flows through the driving transistor 402 . Thus, the period during which the gate voltage of the driving transistor 402 is set to the voltage Vsig2 (the period from time t5 to time t6) is the signal write period.

By the above operation, the pixel (5, 3) whose signal value of the luminance signal 13 is changed transitions to the light emitting period 602 in which the light emitting element 204 emits light with the luminance corresponding to the changed signal value. Although the voltage of the drive voltage 32 after time t6 is shown in FIG. 6A as if it holds the voltage Vsig2, it may actually have any voltage value and is not used. For example, the voltage of the drive voltage 32 may be 0V.

The timing diagram of FIG. 6(b) is for a pixel 102 that does not change its intensity (eg, pixel (5,4)). As shown in FIG. 6(b), since the luminance signal 13 does not change, the image data 20 retains data1. For example, the control unit 110 does not have to supply the luminance signal 13 of a pixel (for example, pixel (5, 4)) for which the signal value of the luminance signal 13 is not changed among the plurality of pixels 102 . Also, the control unit 110 does not supply the pixel control signal 12 (D/A start signal 30, write control signal 31). Therefore, the drive voltage 32 and the drive signal 21 are not changed, and the write operation to the drive transistor 402 is not performed. Therefore, light emission with luminance corresponding to the voltage Vsig1 is maintained.

As described above, the light-emitting device 101 of this embodiment can perform different pixel control (here, update/non-update of luminance). More specifically, the control unit 110 can control the timing at which the drive circuit 202 generates the drive signal 21 for each pixel of the plurality of pixels 102 . The control unit 110 supplies the pixel control signal 12 (D/A start signal 30, write control signal 31) indicating the timing of generating the drive signal 21 to the pixel (5, 3), which is the pixel to be changed, and controls the pixel ( 5 and 3), the drive circuit 202 generates a drive signal 21 according to the pixel control signal 12 . In other words, the brightness signal 13 is transmitted only to the pixels 102 in which the display has changed in the pixel array 103 of the light emitting device 101, and the brightness of each pixel 102 can be updated. Therefore, it is possible to suppress power for data transmission from the control unit 110 to the pixels 102 (pixel array 103). Also, for example, it is possible to reduce the amount of information in the external luminance signal 11 transmitted from the external system 115 to the light emitting device 101, thereby reducing power consumption.

Further, as described above, in this embodiment, scanning is not performed for each frame, and there is no concept of frame rate. That is, the display is updated at the minimum from time t0 to time t6 shown in FIG. 6(a). When the number of pixels 102 whose signal values of the luminance signal 13 are changed is small and the delay or waiting time of the luminance signal 13 is small, the update speed in terms of pixel units can be increased compared to the frame scan method. be.

Here, in the present embodiment, in the pixel (5, 3) in which the signal value of the luminance signal 13 is changed, there is a non-light-emitting time 611 during which the reset voltage Vres is supplied between the light-emitting period 601 and the light-emitting period 602. be. In this case, if the update speed is increased, the brightness will relatively decrease. Therefore, to improve the update speed, the reset voltage generation and the non-light emitting period 611 may be omitted. More specifically, the operation from time t1 to time t4 may be omitted.

In the timing chart shown in FIG. 6B, the control unit 110 does not supply the pixel control signal 12 to the pixels 102 for which the signal value of the luminance signal 13 is unchanged. However, even in the pixel 102 whose luminance is not changed, the drive voltage 21 may drop due to leakage of the drive transistor 402 or the like, and the drive current 22 may drop as the drive voltage 21 drops. When the driving current is degraded, the brightness of the light emitting element 204 is lowered. Therefore, a refresh operation for recovering from this decrease in luminance will be described with reference to FIG.

FIG. 7 is a timing diagram illustrating an example drive for a pixel 102 that does not change luminance (eg, pixel (5,4) shown in FIG. 5). In the timing chart of FIG. 7, the period before time t2 is a light emission period 601 during which the light emitting element 204 emits light according to the luminance signal 13 supplied from the control unit 110 before time t0. In FIG. 7, a light emission period 601 is shown as a period during which the drive signal 21 supplied from the drive circuit 202 to the current generation circuit 203 according to the luminance signal 13 is at voltage Vsig1. During this light emission period 601, the write transistor 302 is in an off state. Since the driving of the pixels 102 shown in FIG. 7 does not change the luminance, the luminance signal 13 is not transmitted from the control unit 110, and the image data 20, which is the luminance signal 13, remains data1. A refresh operation is started from time t1.

At time t1, the control unit 110 supplies the D/A start signal 30 as the pixel control signal 12 to the D/A converter 301 to start reset voltage generation. The drive voltage 32, which is the output of the D/A converter 301, transitions to the reset voltage Vres. Here, the voltage of the driving voltage 32 before time t1 may be any voltage value and is not used. For example, the voltage of the drive voltage 32 may be 0V.

Next, at time t2, the control unit 110 causes the write control signal 31 as the pixel control signal 12 to transition from the low state to the high state. As a result, the signal supplied to the control terminal of the write transistor 302 transitions from the high state to the low state, the write transistor 302 becomes conductive, and the voltage Vres of the drive voltage 32 is applied as the drive signal 21 to the drive transistor. 402 control terminal. When the voltage Vres is supplied to the driving transistor 402 as the driving signal 21, the driving transistor 402 becomes non-conductive. As a result, no current is supplied from the driving transistor 402 to the light emitting element 204 , so the pixel 102 enters a non-light emitting period 611 .

At time t3, the write control signal 31 supplied from the control unit 110 transitions from the high state to the low state, thereby rendering the write transistor 302 non-conductive. Next, at time t4, the control unit 110 supplies the D/A start signal 30 as the pixel control signal 12 to the D/A converter 301 to start generating the drive voltage. The drive voltage 32 that is the output of the D/A converter 301 transitions from the reset voltage Vres to the voltage Vsig1 corresponding to data1 of the image data 20 that is the luminance signal 13 .

At time t5, the control unit 110 causes the write control signal 31 as the pixel control signal 12 to transition from the low state to the high state. As a result, the signal supplied to the control terminal of the write transistor 302 transitions from the high state to the low state, the write transistor 302 becomes conductive, and the voltage Vsig1 of the drive voltage 32 is applied as the drive signal 21 to the drive transistor 302 . 402 control terminal. When the voltage Vsig1 is supplied to the driving transistor 402 as the driving signal 21, the driving transistor 402 becomes conductive according to the voltage Vsig1. As a result, a predetermined current flows through the driving transistor 402 . Thus, the period during which the gate voltage of the driving transistor 402 is set to the voltage Vsig1 (the period from time t5 to time t6) is the signal write period.

By the above operation, the pixel 102 whose signal value of the luminance signal 13 is not changed transits to the light emission period 602 in which the light emitting element 204 emits light with the luminance corresponding to the voltage Vsig1 of the drive signal 21 again. Although the voltage of the drive voltage 32 after time t6 is shown in FIG. 7 as holding the voltage Vsig1, it may actually have an arbitrary voltage value and is not used. For example, the voltage of the drive voltage 32 may be 0V.

By the above operation, the luminance signal 13 can be transmitted only to the pixels 102 in which the display has changed, and the luminance of each pixel 102 can be updated. Therefore, it is possible to suppress power for data transmission from the control unit 110 to the pixels 102 (pixel array 103). Also, for example, it is possible to reduce the amount of information in the external luminance signal 11 transmitted from the external system 115 to the light emitting device 101, thereby reducing power consumption. Further, the control unit 110 outputs the pixel control signal 12 (D/A start signal 30, write control signal 31) at predetermined intervals to the pixels 102 of the plurality of pixels 102 in which the signal value of the luminance signal 13 is not changed. supply. By performing the refresh operation, a decrease in luminance of the pixels 102 whose display does not change and the signal value of the luminance signal is not changed due to leakage of the driving transistor 402 or the like is suppressed, and the luminance of the pixels 102 whose display does not change is suppressed. It can be kept constant.

In the pixel 102 whose signal value of the luminance signal 13 shown in FIG. 6A is changed and the pixel 102 whose signal value of the luminance signal 13 is not changed shown in FIG. is shown as That is, the control unit 110 applies the pixel control signal 12 (D/A start signal 30 , write control signals 31). Further, the pixel control signals 12 (D/A start signal 30, write control signal) are applied at different timings to the pixels 102 whose signal value of the luminance signal 13 is changed and the pixels 102 whose signal value of the luminance signal 13 is not changed. 31) may be supplied.

For the pixels 102 whose signal values of the plurality of luminance signals 13 are not changed, the times t0 to t6 may be the same timing, or may be different timings for each pixel. That is, even if the control unit 110 supplies the pixel control signals 12 (the D/A start signal 30 and the write control signal 31) at the same timing to the pixels 102 whose signal values of the luminance signals 13 are not changed, Alternatively, they may be supplied at different timings. If the control unit 110 supplies the pixel control signals 12 (the D/A start signal 30 and the write control signal 31) at the same timing, the supply of the signals for performing the refresh operation can be made common, which facilitates the control. can be For example, the control unit 110 may cause the pixel array 103 to collectively perform a refresh operation for each row, each column, each region, or the entire surface. However, flickering or flickering may be perceived depending on the magnitude of luminance variation of the pixels 102 during the refresh operation, so controllability and image quality may be in a trade-off relationship. Also, in order to make flicker and flicker less visible, it is possible to change the timing of the refresh operation for each row, each column, and each region. For example, the control unit 110 may supply the pixel control signal 12 (D/A start signal 30, write control signal 31) at random timing for each row.

Next, an arrangement example of the light emitting device 101 on the substrate will be described. Each component of the light emitting device 101 may be arranged on one substrate. However, the present invention is not limited to this, and as shown in FIG. 8, the light emitting device 101 includes a substrate 801 and a substrate 802 at least partially laminated to each other, and the substrates 801 and 802 have respective components of the light emitting device 101. Elements may be placed. The substrates 801 and 802 are electrically connected. As shown in FIG. 8, the light emitting surface 803 on which the light emitting elements 204 of the pixels 102 are arranged is arranged on the substrate 801 .

FIG. 9 is a schematic diagram showing an arrangement example between the substrate 801 and the substrate 802 of the pixel 102. As shown in FIG. As shown in FIG. 9, the current generation circuit 203 and the light emitting element 204 may be arranged on the substrate 801 and the pixel memory 201 and the driving circuit 202 may be arranged on the substrate 802 . Each component shown in FIG. 9 of the pixel 102 divided into two substrates 801 and 802 is connected via a conductive pattern that supplies the drive signal 21 from the drive circuit 202 to the current generation circuit 203 . However, the present invention is not limited to this, and the drive circuit 202 may be arranged on the substrate 801 and the current generation circuit 203 may be arranged on the substrate 802 . Also, for example, the controller 110 can be arranged on the substrate 802 .

In the configuration of the pixel 102 shown in FIG. 9, by disposing the pixel memory 201 and the driving circuit 202 on the substrate 802, the area of the portion of the pixel 102 disposed on the substrate 801 can be reduced. For example, it is possible to increase the definition of the pixel array 103 . Further, when it is not necessary to reduce the size of the portion of the pixel 102 that is arranged on the substrate 801, the areas of the current generation circuit 203 and the light emitting element 204 can be increased. That is, it is possible to improve the accuracy of the current generated by the current generation circuit 203 and improve the brightness by enlarging the light emitting element 204 .

In the pixels 102 shown in FIG. 3 described above, a D/A converter 301 is arranged in the driving circuit 202 of each pixel 102 . Generally, the D/A converter 301 increases in circuit scale as the number of gradations of output increases, which may make it difficult to miniaturize the light emitting device 101 . Therefore, an example of adopting a PWM (Pulse Width Modulation) driving method for the driving circuit 202 will be described.

FIG. 10 shows a configuration example of the driving circuit 202 when adopting the PWM driving method. FIG. 11A is a timing chart showing an example of driving the pixel 102 whose luminance is changed, and FIG. 11B is a timing chart showing an example of driving the pixel 102 whose luminance is not changed. FIG. 11(a) shows driving of pixel (5, 3) shown in FIG. 5, and FIG. 11(b) shows driving of pixel 102 other than pixel (5, 3), for example, pixel (5, 4). shows drive.

As shown in FIG. 10, in comparison with the drive circuit 202 of FIG. The counter control circuit 311 generates the PWM signal 34 corresponding to the signal value of the image data 20, which is the luminance signal 13, as the driving signal 21 in order to control the gradation of the light emitting element 204 in the PWM driving method, that is, the light emitting period. . The PWM signal 34 is a signal for determining the period (length) during which the pixel 102 emits light during one frame period, while keeping the light emission luminance per unit time constant. For example, if the light-emitting element 204 emits light in a period of 0.5 frames out of one frame period, the output luminance is defined as the maximum luminance when the light emission continues for one frame period, and the luminance is 0.5 times. can recognize. In other words, PWM drive controls the light emission luminance using the ratio (duty ratio) between the light emission period and the non-light emission period.

A count start signal 33 is supplied from the control section 110 to the counter control circuit 311 as the pixel control signal 12 . The count start signal 33 is continuously input from the control section 110 to the drive circuit 202 at intervals corresponding to one frame period. When the counter control circuit 311 receives the count start signal 33 as the pixel control signal 12 , the PWM signal 34 becomes a low value (voltage Vlow) and is supplied to the current generation circuit 203 as the drive signal 21 . The voltage Vlow is, for example, the same as the voltage Vsig1 described with reference to FIG. 6(a). That is, the voltage Vlow of the PWM signal 1011 is supplied as the driving signal 21 to the control terminal of the driving transistor 402, and the driving transistor 402 becomes conductive according to the voltage Vlow. As a result, the driving current 22 is supplied from the driving transistor 402 to the light emitting element 204, and the light emitting element 204 emits light with a predetermined luminance.

At the same time, the counter control circuit 311 latches the value of the image data 20 which is the luminance signal 13 . Furthermore, at the same time, the counter control circuit 311 starts counting up with a predetermined clock. Here, the value of the image data 20 is the information of the luminance signal 13, but in this embodiment, it is adjusted so that the maximum value when counted up by a predetermined clock is the maximum luminance in one frame period. Suppose there is

The counter control circuit 311 continues to output the voltage Vlow until the count-up value reaches the value of the latched image data 20, and when it reaches the value of the image data 20, it outputs the voltage Vhigh. This voltage Vhigh is the same as the voltage Vres described in FIG. 6A, for example. That is, the voltage Vres of the PWM signal 1011, which is the driving signal 21, is supplied to the control terminal of the driving transistor 402, and the driving transistor 402 becomes non-conductive. Therefore, since the driving current 22 is not supplied from the driving transistor 402 to the light emitting element 204, the light emitting element 204 enters a non-light emitting period. The non-emission period is maintained until the next count start signal 33 is supplied as the pixel control signal 12 .

In the timing chart shown in FIG. 11A, the period before time t2 is the light emission control period of the light emitting element 204 in the n−1 frame, which is the frame period one frame before the n frame starting at time t2. The n−1 frame shown in FIG. 11(a) is the non-light emitting period of the n−1 frame.

The luminance signal 13 of n frames is supplied from the control unit 110 from an arbitrary time t0 of n−1 frames. As described above, the control unit 110 controls the luminance signal 13 of the pixel (5, 3), which is the change target pixel whose signal value is to be changed among the plurality of pixels 102, and the pixel (5, 3), which is the change target pixel. 3) Supply the address information. The pixel (5, 3), which is the pixel to be changed, updates the luminance signal 13 held in the pixel memory 201 according to the address information. When the luminance signal 13 is written in the pixel memory 201, the image data 20, which is the luminance signal 13 supplied from the pixel memory 201 to the driving circuit 202, is updated from data1 to data2.

In this embodiment, the image data 20 has a waiting time from time t1 when data2 is updated to time t2 when n frames are started. This is based on the general concept of fixing the period of one frame and stabilizing the control of the emission luminance by PWM control. As in the timing chart shown in FIG. 6A, when the luminance of the light emitting element 204 is changed immediately after the image data 20 is updated, control should be performed so that time t1=time t2. However, in this case, there is a possibility that the duty ratio in the n−1 frame will not be as intended, the desired light emission luminance cannot be obtained, and the image quality may be affected.

At time t2, the control unit 110 supplies the count start signal 33 as the pixel control signal 12, thereby starting light emission control for n frames. The voltage Vlow of the PWM signal 1011 is supplied as the drive signal 21, and the light emitting element 204 starts emitting light. At the same time, the counter control circuit 311 latches data2 from the image data 20 and starts counting up.

At time t3, the count-up value reaches data2, which is latch data, so that voltage Vhigh of PWM signal 1011 is supplied as drive signal 21, and light emitting element 204 enters a non-light emitting period. The non-emission period continues until time t4 when the control for n+1 frames is started, and the control period for n+1 frames starts from time t4.

The timing diagram shown in FIG. 11(b) is for pixel operation without changing luminance. As shown in FIG. 11B, since the signal value of the luminance signal 13 does not change, the image data 20 retains data1. Therefore, PWM control according to data1 is performed. The operation is the same as the control of the pixel 102 that changes the brightness described with reference to FIG. 11A, except that the image data 20 is data1. The difference is the timing of changing from the light emission period to the non-light emission period since the latch data is data1, so detailed description is omitted here.

By the above operation, the light emitting device 101 adopting the PWM driving method can perform different pixel control (here, update/non-update of luminance). That is, the luminance signal 13 can be transmitted only to the pixels 102 in which the display has changed, and the luminance of each pixel 102 can be updated. Therefore, it is possible to suppress power for data transmission from the control unit 110 to the pixels 102 (pixel array 103). Also, for example, it is possible to reduce the amount of information in the external luminance signal 11 transmitted from the external system 115 to the light emitting device 101, thereby reducing power consumption. Moreover, by implementing PWM control for each pixel, the circuit scale of the drive circuit 202 can be significantly reduced compared to the case where the D/A converter 301 is arranged for each pixel.

The timing at which the control unit 110 supplies the pixel control signal 12 (count start signal 33) indicating the timing at which the drive circuit 202 generates the drive signal 21 is all as shown in FIGS. may be common to the pixels 102 of Further, for example, the timing at which the control unit 110 supplies the pixel control signal 12 (count start signal 33) may differ for each pixel 102. FIG. If the timing at which the control unit 110 supplies the pixel control signal 12 (count start signal 33) is common to all the pixels 102, the counter control circuit 311 counts up the pixel control signal 12 supplied from the control unit 110. A common circuit can be used for Therefore, the circuit scale of the pixel 102 (drive circuit 202) can be further reduced.

On the other hand, when the pixel control signal 12 (count start signal 33) is supplied at different timings for each pixel 102, it is possible to arbitrarily control the timing for changing the luminance for each pixel 102. FIG. Also, in this case, the counter control circuit 311 does not count up as shown in FIGS. It is possible to reduce the circuit size by latching as an initial value and counting down. When the counter control circuit 311 counts down, when the count reaches 0, it is controlled to transition to the non-light emitting period.

Further, in this embodiment, the PWM control is performed in the order of the light emission period and the non-light emission period for each frame, but the present invention is not limited to this. Control may be performed so that the luminance decreases in the order of the non-light-emitting period and the light-emitting period, ie, the larger the value of the image data 20, the lower the luminance.

Further, as shown in FIGS. 11(a) and 11(b), when PWM control is employed to control the luminance of the light emitting element 204, one frame period is basically constant. That is, the timing at which the brightness is changed is frame by frame for each pixel 102 . For this reason, as described above, it is difficult to speed up the luminance change.

It has been explained that by adopting the PWM driving method in the driving circuit 202, the circuit scale can be reduced compared to the case where the D/A converter 301 is provided for each pixel 102. FIG. However, PWM driving can have its own problems, such as flickering. Therefore, an example of adopting the voltage sample-and-hold method for the drive circuit 202 will be described. Here, differences from the case where the drive circuit 202 includes the above-described D/A converter 301 will be mainly described.

FIG. 13 is a schematic diagram showing an outline of a configuration example of a light-emitting device 101' when adopting the voltage sample-and-hold method. As shown in FIG. 13, compared with the light emitting device 101 shown in FIG. 1, the light emitting device 101' additionally includes a reference voltage generation circuit 111 that generates a reference voltage. Also, the reference voltage control signal 14 for controlling the reference voltage generation circuit 111 is supplied from the control unit 110 , and the reference voltage signal 15 is supplied from the reference voltage generation circuit 111 to the pixels 102 arranged in the pixel array 103 . . The reference voltage signal 15 is supplied to the drive circuit 202 as described later and used as a reference voltage for generating the drive voltage 32 as the drive signal 21 . A reference voltage signal 15 may be supplied to all pixels 102 .

FIG. 14 is a configuration example of the pixel 102 arranged in the light emitting device 101' shown in FIG. As shown in FIG. 14, the pixel 102 has a pixel memory 201, a driving circuit 202', a current generating circuit 203, and a light emitting element 204. As compared to the drive circuit 202 shown in FIG. 2 above, the drive circuit 202' is supplied with the reference voltage signal 15 described above.

FIG. 15 shows a configuration example of the driving circuit 202' when adopting the voltage sample-and-hold method. Compared with the drive circuit 202 shown in FIG. 3, the drive circuit 202' shown in FIG.

The counter control circuit 321 generates a sample timing signal 36 that controls the sample hold circuit 322 . Specifically, when the image data 20, which is the luminance signal 13, is updated, the control unit 110 supplies the start signal 35 to the counter control circuit 321, and in response to the start signal 35, the counter control circuit 321 Start working.

The counter control circuit 321 first generates the sample timing signal 36 . This is due to the reset operation of the pixels 102 described above. Next, the counter control circuit 321 generates the second sample timing signal 36 according to the signal value of the image data 20 which is the luminance signal 13 . The sample hold circuit 322 has a function of sampling and holding the reference voltage signal 15 when the second sample timing signal 36 is supplied. The reference voltage signal 15 at this time is supplied to the write transistor 302 as the driving voltage 32 . The drive voltage 32 corresponds to the voltage Vres for resetting the pixels 102 and the signal value of the image data 20, which is the luminance signal 13, as described with reference to FIGS. voltage Vsig. When the write transistor 302 is rendered conductive by the write control signal 31 that is the pixel control signal 12 , the drive voltage 32 is supplied as the drive signal 21 to the control terminal of the drive transistor 402 of the current generation circuit 203 .

FIG. 16A is a timing chart showing an example of driving the pixel 102 whose luminance is changed, and FIG. 16B is a timing chart showing an example of driving the pixel 102 whose luminance is not changed. FIG. 16(a) shows driving of pixel (5, 3) shown in FIG. 5, and FIG. 16(b) shows driving of pixel 102 other than pixel (5, 3), for example, pixel (5, 4). shows drive.

In the timing chart of FIG. 16A, before time t3 is a light emission period 601 during which the light emitting element 204 emits light according to the luminance signal 13 supplied from the control unit 110 before time t0. In FIG. 16A, a light emission period 601 is shown as a period during which the drive signal 21 supplied from the drive circuit 202 to the current generation circuit 203 according to the luminance signal 13 is at voltage Vsig1. During this light emission period 601, the write transistor 302 is in an off state.

From time t0 in the light emission period 601, the control unit 110 supplies a luminance signal 13 having a signal value different from that before time t0 to the pixel (5, 3) whose luminance is to be changed. As described above, the control unit 110 controls the luminance signal 13 of the pixel (5, 3), which is the change target pixel whose signal value is to be changed among the plurality of pixels 102, and the pixel (5, 3), which is the change target pixel. 3) Supply the address information. The pixel (5, 3), which is the pixel to be changed, updates the luminance signal 13 held in the pixel memory 201 according to the address information. When the luminance signal 13 is written in the pixel memory 201, the image data 20, which is the luminance signal 13 supplied from the pixel memory 201 to the driving circuit 202, is updated from data1 to data2.

Here, it is necessary to wait from the time t1 when the image data 20 is updated from data1 to data2 until the start time t2 of the current frame. This is to wait for the supply of the reference voltage signal 15 . Next, from time t2, change of the luminance emitted by the light emitting element 204 of the pixel 102 is started.

At time t2, the control unit 110 supplies the start signal 35 (first time: reset voltage generation) as the pixel control signal 12 to the counter control circuit 321, and the driving circuit 202 starts generating the reset voltage. Upon receiving the start signal 35 , the counter control circuit 321 supplies the sample timing signal 36 to the sample hold circuit 322 . At the same time, since the sample and hold circuit 322 is supplied with the reset voltage Vres from the reference voltage generation circuit 111 as the reference voltage signal 15, the sample and hold circuit 322 outputs the driving voltage Vres by sampling and holding the reset voltage Vres. 32 transitions to the reset voltage Vres. Here, the voltage of the driving voltage 32 before time t2 may be any voltage value and is not used. For example, the voltage of the drive voltage 32 may be 0V.

Next, at time t3, the control unit 110 causes the write control signal 31 as the pixel control signal 12 to transition from the low state to the high state. As a result, the signal supplied to the control terminal of the write transistor 302 transitions from the high state to the low state, the write transistor 302 becomes conductive, and the voltage Vres of the drive voltage 32 is applied as the drive signal 21 to the drive transistor. 402 control terminal. When the voltage Vres is supplied to the driving transistor 402 as the driving signal 21, the driving transistor 402 becomes non-conductive. As a result, no current is supplied from the driving transistor 402 to the light emitting element 204, so that the pixel (5, 3) enters the non-light emitting period 611. FIG.

At time t4, control unit 110 causes write control signal 31 to transition from a high state to a low state, thereby rendering write transistor 302 non-conductive. Next, at time t5, the control unit 110 supplies the start signal 35 (second time: driving voltage generation) as the pixel control signal 12 to the counter control circuit 321, and the driving circuit 202 starts generating the driving voltage. At the same time, the counter control circuit 321 latches data2 from the image data 20 and starts counting up.

Here, the voltage value of the reference voltage signal 15 decreases from the voltage Vres as shown in FIG. 16(a). In other words, the reference voltage generation circuit 111 generates, as the reference voltage signal 15, a sweep voltage that varies with time from the voltage Vres. The control unit 110 may supply the reference voltage control signal 14 to the reference voltage generation circuit 111 when supplying the start signal 35 (second time: drive voltage generation) as the pixel control signal 12 to the counter control circuit 321 . This causes the reference voltage generation circuit 111 to start generating sweep voltages.

At time t6, when the count-up value reaches data2, which is latch data, the counter control circuit 321 supplies the sample timing signal 36 to the sample hold circuit 322. FIG. The voltage value (voltage Vsig2) of the reference voltage signal 15 when the sample timing signal 36 is received is sampled by the sample hold circuit 322, so that the voltage Vsig2 is held as it is as the driving voltage 32 output from the sample hold circuit 322. be.

At time t7, the control unit 110 causes the write control signal 31 as the pixel control signal 12 to transition from the low state to the high state. As a result, the signal supplied to the control terminal of the write transistor 302 transitions from the high state to the low state, the write transistor 302 becomes conductive, and the voltage Vsig2 of the drive voltage 32 is applied as the drive signal 21 to the drive transistor 302 . 402 control terminal. When the voltage Vsig2 is supplied to the driving transistor 402 as the driving signal 21, the driving transistor 402 becomes conductive according to the voltage Vsig2. As a result, a predetermined current flows through the driving transistor 402 . Thus, the period during which the gate voltage of the driving transistor 402 is set to the voltage Vsig2 (the period from time t7 to time t8) is the signal write period.

By the above operation, the pixel (5, 3) whose signal value of the luminance signal 13 is changed transitions to the light emitting period 602 in which the light emitting element 204 emits light with the luminance corresponding to the changed signal value. Although the voltage of the drive voltage 32 after time t8 is shown as holding the voltage Vsig2 in FIG. 16(a), it may actually have any voltage value and is not used. For example, the voltage of the drive voltage 32 may be 0V.

The timing diagram of FIG. 16(b) is for a pixel 102 (eg, pixel (5,4)) that does not change its intensity. As shown in FIG. 16(b), since the luminance signal 13 does not change, the image data 20 retains data1. Also, the control unit 110 does not supply the pixel control signal 12 (start signal 35, write control signal 31). Therefore, the drive voltage 32 and the drive signal 21 are not changed, and the write operation to the drive transistor 402 is not performed. Therefore, light emission with luminance corresponding to the voltage Vsig1 is maintained.

As described above, the light-emitting device 101' adopting the voltage sample-and-hold method is capable of performing different pixel control (here, luminance updating/non-updating). More specifically, the control unit 110 can control the timing at which the drive circuit 202 generates the drive signal 21 for each pixel of the plurality of pixels 102 . The control unit 110 supplies the pixel control signal 12 (start signal 35, write control signal 31) indicating the timing of generating the drive signal 21 to the pixel (5, 3), which is the pixel to be changed, and controls the pixel (5, 3). ) generates a drive signal 21 according to the pixel control signal 12 . In other words, the brightness signal 13 is transmitted only to the pixels 102 in which the display has changed in the pixel array 103 of the light emitting device 101, and the brightness of each pixel 102 can be updated. Therefore, it is possible to suppress power for data transmission from the control unit 110 to the pixels 102 (pixel array 103). Also, for example, it is possible to reduce the amount of information in the external luminance signal 11 transmitted from the external system 115 to the light emitting device 101, thereby reducing power consumption.

Further, the drive circuit 202 includes a counter control circuit 321 and a sample hold circuit 322 for sampling the sweep voltage (reference voltage signal 15) generated by the reference voltage generation circuit 111 according to the luminance signal 13 as the drive signal 21. . The voltage sample-and-hold method of sampling the sweep voltage generated by the reference voltage generation circuit 111 for each pixel 102 significantly increases the circuit scale of the drive circuit 202 compared to the case of using the D/A converter 301 for each pixel 102. can be reduced to Furthermore, the voltage sample-and-hold method does not cause flashing caused by light emission with different duty ratios, unlike PWM control, and can suppress deterioration of image quality.

The timing at which the control unit 110 supplies the pixel control signal 12 (the start signal 35 and the write control signal 31) indicating the timing at which the drive circuit 202 generates the drive signal 21 is shown in FIGS. It may be common to all pixels 102 as shown. Also, for example, the timing at which the control unit 110 supplies the pixel control signal 12 (the start signal 35 and the write control signal 31 ) may differ for each pixel 102 . If the timing at which the control unit 110 supplies the pixel control signal 12 (the start signal 35 and the write control signal 31) is common to all the pixels 102, counter control for the pixel control signal 12 supplied from the control unit 110 is performed. A circuit for counting up the circuit 311 can be shared. Therefore, the circuit scale of the pixel 102 (drive circuit 202) can be further reduced.

On the other hand, when the pixel control signals 12 (the start signal 35 and the write control signal 31) are supplied at different timings for each pixel 102, the timing for changing the luminance for each pixel 102 can be arbitrarily controlled. In this case, the circuit scale of the counter control circuit 321 can be reduced by counting down, as in the case described with reference to FIGS. 11(a) to 12(b). When the counter control circuit 311 counts down, when the count reaches 0, it is controlled to transition to the non-light emitting period.

The number of reference voltage generators 111 may be one as shown in FIG. Also, in the case where the reference voltage signal 15 is affected by a voltage drop due to wiring resistance or the like, a plurality of reference voltage generators 111 may be arranged in one light emitting device 101'.

Also, the sweep voltage generated as the reference voltage signal 15 by the reference voltage generation circuit 111 changes linearly with time in the examples shown in FIGS. It is not limited to , but may be various relationships. For example, any nonlinear function shape such as an exponential increase/decrease in voltage value with respect to time or a square root function increase/decrease may be used. Further, the reference voltage signal 15 has a shape common to all pixels 102 , but may be adjusted by applying an offset, gain, or the like to each pixel 102 when correction is desired for each pixel 102 .

Moreover, although the configuration in which the voltage Vres is also supplied as the reference voltage signal 15 generated by the reference voltage generation circuit 111 is shown, the voltage Vres may be supplied separately. For example, it may be generated within the sample and hold circuit 312 . If the voltage Vres is generated in the sample-and-hold circuit 312, it is possible to perform a sampling operation using the reference voltage signal 15 during the period in which the voltage Vres is written. becomes possible.

Modifications of the above embodiments will be described below. Although an example in which the pixel control signal 12 for controlling the drive circuits 202 and 202' is generated in the control unit 110 has been described, the present invention is not limited to this. An appropriate configuration may be taken according to each embodiment. For example, pixel control signals 12 may be supplied from pixel memory 201, as shown in FIG. The pixel memory 201 of the pixel 102 whose signal value of the luminance signal 13 is changed transmits the pixel control signal 12 indicating the timing of updating the driving signal 21 to the driving circuit 202 of the pixel in response to the update of the luminance signal 13 . supply to More specifically, in the driving circuit 202 shown in FIG. 3, when the writing of the luminance signal 13 to the pixel memory 201 is completed (the pixel data 20 is changed from data1 to data2), the memory 201 performs pixel control. A D/A start signal 30 is supplied as signal 12 to a D/A converter 301 . Furthermore, since the time at which the operation of the D/A converter 301 is completed is usually fixed, the pixel control signal 12 is written into the memory 201 at a delayed timing at which the operation of the D/A converter 301 is completed. A control signal 31 may be provided to the write transistor 302 . Alternatively, for example, the memory 201 may supply the write control signal 31 to the write transistor 302 with the operation completion of the D/A converter 301 as a trigger.

Further, as shown in FIG. 18, the driving circuit 202 may use both the pixel control signal 12a supplied from the control unit 110 and the pixel control signal 12 generated by the pixel memory 201. FIG. In this case, the two pixel control signals 12 a and 12 b may be synthesized by the control OR circuit 205 and input to the driving circuit 202 . In this case, for example, in the pixel 102 that changes the signal value of the luminance signal 13, the pixel memory 201 supplies the D/A start signal 30 and the write control signal 31 as the pixel control signal 12b. Further, the control unit 110 supplies the D/A start signal 30 and the write control signal 31 as the pixel control signal 12a to the pixel 102 whose signal value of the luminance signal 13 is not changed. As a result, the refresh operation described above is performed in the pixels 102 that do not change the signal value of the luminance signal 13 . As a result, wiring patterns for individually controlling the pixels 102 can be reduced, and wiring patterns can also be reduced by sharing the pixel control for the refresh operation.

Moreover, although an example in which the luminance signal is supplied only to the pixel 102 whose signal value of the luminance signal 13 is to be changed has been shown, the present invention is not limited to this. In order to perform data transmission efficiently and to simplify the control of each pixel 102, peripheral pixels 102 including the pixel whose signal value of the luminance signal 13 is changed are simultaneously supplied with the luminance signal 13 and driven. Signal 21 may be updated. That is, the control unit 110 applies the pixel control signal to the pixels arranged around the change target pixel (the pixel (5, 3) in FIG. 5) whose signal value of the luminance signal 13 is to be changed among the plurality of pixels 102. 12 may be supplied. The pixels 102 around the pixel to be changed may be, for example, pixels adjacent to the pixel to be changed, or pixels arranged in a rectangular area of 3×3 pixels, 5×5 pixels, etc. around the pixel to be changed. 102. Further, for example, the pixels 102 around the pixel to be changed may be the pixels 102 arranged in the same column and the pixels 102 arranged in the same row as the pixel to be changed.

Further, for example, the pixel memory 201 may be configured to be able to hold a plurality of luminance signals 13 (image data 20). For example, the pixel memory 201 may hold image data 20a and image data 20b, and an image corresponding to the image data 20a and an image corresponding to the image data 20b may be arbitrarily selected and displayed. For example, the image data 20a may be an image of the outside world acquired by an image sensor, and the image data 20b may be various information data (pop-up information, time, etc.) overlaid on the image of the outside world. Alternatively, the image corresponding to the image data 20a and the image corresponding to the image data 20b may be alternately displayed at arbitrary timing. In this case, a plurality of images can be synthesized and displayed (watermark display). Furthermore, the pixel memory 201 may hold the image data 20 which is the luminance signal 13 and the correction data which is a correction signal for correcting the image data 20 . Corrected image data may be calculated from the image data 20 (luminance signal 13) and corrected data (corrected signal), and an image corresponding to the corrected image data may be displayed on the pixel array 103. FIG. In this case, a correction unit is further provided for correcting the pixel data 20 (luminance signal 13) according to the correction data (correction signal). The correction unit may be arranged between the pixel memory 201 and the driving circuit 202 or may be arranged in the pixel memory 201 or the driving circuit 202 .

Further, in each of the above-described embodiments, only the data of the pixel 102 whose signal value of the luminance signal 13 is to be changed is transmitted from the external system 115 as the external luminance signal 11, but the present invention is not limited to this. . Data of the pixel 102 that does not change the signal value of the luminance signal 13 may be sent from the external system 115 to the controller 110 . In this case, in the light-emitting device 101, for example, the control unit 110 determines whether or not the signal value of the luminance signal 13 of each pixel 102 is changed, and supplies the luminance signal 13 only to the pixels 102 whose signal value is changed. may Also, the control unit 110 may perform control to update the driving signal 21 of the pixel 102 whose signal value of the luminance signal 13 is changed. Further, even for the pixels 102 in which the signal value of the luminance signal 13 is not changed, when the external luminance signal 11 is transmitted from the external system 115, the control unit 110 supplies the luminance signal 13 and the driving signal 21. You may update. Each of these operations can be combined as appropriate.

Here, application examples in which the light-emitting devices 101 and 101' of the present embodiment are applied to display devices, photoelectric conversion devices, electronic devices, and wearable devices will be described with reference to FIGS. 19 to 23. FIG. The display device has an image input section for inputting image information from an area CCD, a linear CCD, a memory card, etc., has an information processing section for processing the input information, and displays the input image on the display section. It may be an image information processing apparatus that Further, a display unit of a camera or an inkjet printer may have a touch panel function. The driving method of this touch panel function may be an infrared method, a capacitive method, a resistive film method, or an electromagnetic induction method, and is not particularly limited. The display device may also be used as a display section of a multi-function printer.

FIG. 19 is a schematic diagram showing an example of a display device using the light emitting devices 101 and 101' of this embodiment. Display device 1000 may have touch panel 1003 , display panel 1005 , frame 1006 , circuit board 1007 , and battery 1008 between upper cover 1001 and lower cover 1009 . The touch panel 1003 and display panel 1005 are connected to flexible printed circuits FPC 1002 and 1004 . Active elements such as transistors are arranged on the circuit board 1007 . The battery 1008 may not be provided unless the display device 1000 is a portable device, and even if the display device 1000 is a portable device, it is not necessary to be provided at this position. The light-emitting devices 101 and 101 ′ described above can be applied to the display panel 1005 . The light-emitting devices 101 and 101' functioning as the display panel 1005 are connected to active elements such as transistors arranged on the circuit board 1007 to operate.

A display device 1000 shown in FIG. 19 is a display unit of a photoelectric conversion device (imaging device) having an optical unit having a plurality of lenses and an imaging element that receives light that has passed through the optical unit and photoelectrically converts the light into an electric signal. may be used for The photoelectric conversion device may have a display section that displays information acquired by the imaging element. Further, the display section may be a display section exposed to the outside of the photoelectric conversion device, or may be a display section arranged within the viewfinder. The photoelectric conversion device may be a digital camera or a digital video camera.

FIG. 20 is a schematic diagram showing an example of a photoelectric conversion device using the light emitting devices 101 and 101' of this embodiment. The photoelectric conversion device 1100 may have a viewfinder 1101 , a rear display 1102 , an operation unit 1103 and a housing 1104 . The photoelectric conversion device 1100 can also be called an imaging device. The light-emitting devices 101 and 101' described above can be applied to the viewfinder 1101 which is a display unit. In this case, the light-emitting devices 101 and 101' may display not only the captured image but also environmental information, imaging instructions, and the like. The environmental information may include the intensity of outside light, the direction of outside light, the moving speed of the subject, the possibility that the subject will be blocked by an obstacle, and the like.

Since the timing suitable for imaging is often short, it is better to display the information as soon as possible. Therefore, the light emitting devices 101 and 101 ′ including organic light emitting materials such as organic EL elements as the light emitting elements 204 can be used for the viewfinder 1101 . This is because the organic light-emitting material has a high response speed. The light-emitting devices 101 and 101' using organic light-emitting materials are more suitable than liquid crystal display devices for these devices that require high display speed.

The photoelectric conversion device 1100 has an optical section (not shown). The optical section has a plurality of lenses, and forms an image on a photoelectric conversion element (not shown) accommodated in a housing 1104 that receives light that has passed through the optical section. The multiple lenses can be focused by adjusting their relative positions. This operation can also be performed automatically.

The light-emitting devices 101 and 101' may be applied to display units of electronic devices. In that case, it may have both a display function and an operation function. Mobile terminals include mobile phones such as smartphones, tablets, and head-mounted displays.

FIG. 21 is a schematic diagram showing an example of an electronic device using the light emitting devices 101 and 101' of this embodiment. Electronic device 1200 includes display portion 1201 , operation portion 1202 , and housing 1203 . The housing 1203 may include a circuit, a printed board including the circuit, a battery, and a communication portion. The operation unit 1202 may be a button or a touch panel type reaction unit. The operation unit 1202 may be a biometric recognition unit that recognizes a fingerprint and performs unlocking or the like. A mobile device having a communication unit can also be called a communication device. The light-emitting devices 101 and 101 ′ described above can be applied to the display portion 1201 .

22(a) and 22(b) are schematic diagrams showing an example of a display device using the light emitting devices 101 and 101' of this embodiment. FIG. 22(a) shows a display device such as a television monitor or a PC monitor. A display device 1300 has a frame 1301 and a display portion 1302 . The light-emitting devices 101 and 101 ′ described above can be applied to the display portion 1302 . The display device 1300 may have a base 1303 that supports the frame 1301 and the display section 1302 . The base 1303 is not limited to the form shown in FIG. 11(a). For example, the lower side of the frame 1301 may also serve as the base 1303 . Also, the frame 1301 and the display portion 1302 may be curved. Its radius of curvature may be between 5000 mm and 6000 mm.

FIG. 22B is a schematic diagram showing another example of a display device using the light emitting devices 101 and 101' of this embodiment. A display device 1310 in FIG. 11B is configured to be foldable, and is a so-called foldable display device. A display device 1310 has a first display portion 1311 , a second display portion 1312 , a housing 1313 and a bending point 1314 . The light emitting devices 101 and 101 ′ described above can be applied to the first display portion 1311 and the second display portion 1312 . The first display portion 1311 and the second display portion 1312 may be a seamless display device. The first display portion 1311 and the second display portion 1312 can be separated at a bending point. The first display unit 1311 and the second display unit 1312 may display different images, or the first display unit and the second display unit may display one image.

Further application examples of the light-emitting devices 101 and 101' of the above embodiments will be described with reference to FIGS. 23(a) and 23(b). The light-emitting devices 101 and 101' can be applied to systems that can be worn as wearable devices such as smart glasses, head-mounted displays (HMD), and smart contacts. An imaging display device used in such an application includes an imaging device capable of photoelectrically converting visible light and a light emitting device capable of emitting visible light.

FIG. 23(a) illustrates glasses 1600 (smart glasses) according to one application. An imaging device 1602 such as a CMOS sensor or SPAD is provided on the surface side of lenses 1601 of spectacles 1600 . Further, the above-described light emitting devices 101 and 101' are provided on the rear surface side of the lens 1601. FIG.

Glasses 1600 further comprise a controller 1603 . The control device 1603 functions as a power source that supplies power to the imaging device 1602 and the light emitting devices 101 and 101' according to each embodiment. Also, the control device 1603 controls the operations of the imaging device 1602 and the light emitting devices 101 and 101'. The lens 1601 is formed with an optical system for condensing light onto the imaging device 1602 .

FIG. 23(b) illustrates glasses 1610 (smart glasses) according to one application. The glasses 1610 have a control device 1612, and the control device 1612 is equipped with an imaging device corresponding to the imaging device 1602 and the light emitting devices 101 and 101'. An imaging device in the control device 1612 and an optical system for projecting light emitted from the light emitting devices 101 and 101 ′ are formed on the lens 1611 , and an image is projected onto the lens 1611 . The control device 1612 functions as a power source that supplies power to the imaging device and the light emitting devices 101 and 101', and controls the operations of the imaging device and the light emitting devices 101 and 101'. The control device 1612 may have a line-of-sight detection unit that detects the line of sight of the wearer. Infrared rays may be used for line-of-sight detection. The infrared light emitting section emits infrared light to the eyeballs of the user who is gazing at the display image. A captured image of the eyeball is obtained by detecting reflected light of the emitted infrared light from the eyeball by an imaging unit having a light receiving element. By having a reduction means for reducing light from the infrared light emitting section to the display section in plan view, deterioration in image quality is reduced.

The line of sight of the user with respect to the display image is detected from the captured image of the eye obtained by imaging the infrared light. Any known method can be applied to line-of-sight detection using captured images of eyeballs. As an example, it is possible to use a line-of-sight detection method based on a Purkinje image obtained by reflection of irradiation light on the cornea.

More specifically, line-of-sight detection processing based on the pupillary corneal reflection method is performed. The user's line of sight is detected by calculating a line of sight vector representing the orientation (rotational angle) of the eyeball based on the pupil image and the Purkinje image included in the captured image of the eyeball using the pupillary corneal reflection method. be.

The light-emitting devices 101 and 101' according to an embodiment of the present invention may have imaging devices having light-receiving elements, and may control display images based on user line-of-sight information from the imaging devices.

Specifically, the light-emitting devices 101 and 101' determine a first visual field area that the user gazes at and a second visual field area other than the first visual field area based on the line-of-sight information. The first visual field region and the second visual field region may be determined by the control device of the light emitting devices 101 and 101', or may be determined by an external control device. In the display areas of the light emitting devices 101 and 101', the display resolution of the first viewing area may be controlled to be higher than the display resolution of the second viewing area. That is, the resolution of the second viewing area may be lower than that of the first viewing area.

Further, the display area has a first display area and a second display area different from the first display area, and based on line-of-sight information, an area with a higher priority is determined from the first display area and the second display area. be done. The first display area and the second display area may be determined by the control device of the light emitting devices 101 and 101', or may be determined by an external control device. The resolution of areas with high priority may be controlled to be higher than the resolution of areas other than areas with high priority. In other words, the resolution of areas with relatively low priority may be lowered.

AI may be used to determine the first field of view area and the areas with high priority. The AI is a model configured to estimate the angle of the line of sight from the eyeball image and the distance to the object ahead of the line of sight, using the image of the eyeball and the direction in which the eyeball of the image was actually viewed as training data. It can be. The AI program may be possessed by the light emitting device 101 or 101', the imaging device, or the external device. If the external device has it, it is transmitted to the light emitting device 101, 101' via communication.

When display control is performed based on visual recognition detection, it can be preferably applied to smart glasses that further have an imaging device that captures an image of the outside. Smart glasses can display captured external information in real time.

The invention is not limited to the embodiments described above, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the claims are appended to make public the scope of the invention.

101: light emitting device, 102: pixel, 110: control section, 201: pixel memory, 202: drive circuit, 203: current generation circuit, 204: light emitting element

Claims (23)

A light emitting device comprising: a plurality of pixels arranged to form a plurality of rows and a plurality of columns; and a control unit for controlling the plurality of pixels,
each of the plurality of pixels,
a light emitting element;
a pixel memory that holds a luminance signal;
a drive circuit that generates a drive signal corresponding to the luminance signal;
a current generation circuit that supplies a drive current corresponding to the drive signal to the light emitting element,
The light-emitting device according to claim 1, wherein the control section can control the timing at which the drive circuit generates the drive signal for each of the plurality of pixels. The control unit supplies address information of the change target pixel together with the brightness signal of the change target pixel whose signal value of the brightness signal is to be changed among the plurality of pixels,
2. The light emitting device according to claim 1, wherein the pixel to be changed updates the luminance signal held in the pixel memory according to the address information. 3. The light emitting device according to claim 2, wherein the control unit does not supply the luminance signal of a pixel whose signal value of the luminance signal is not changed among the plurality of pixels. The control unit supplies a pixel control signal indicating timing for generating the drive signal to the pixel to be changed,
4. The light emitting device according to claim 2, wherein the drive circuit for the pixel to be changed generates the drive signal according to the pixel control signal. 5. The light-emitting device according to claim 4, wherein the control unit does not supply the pixel control signal to a pixel, among the plurality of pixels, for which the signal value of the luminance signal is not changed. 5. The light-emitting device according to claim 4, wherein the control unit supplies the pixel control signal at predetermined intervals to a pixel whose signal value of the luminance signal is not changed among the plurality of pixels. 7. The control unit supplies the pixel control signal at the same timing to the pixel to be changed and to the pixel whose signal value of the luminance signal is not changed among the plurality of pixels. The light-emitting device according to . 5. The light emitting device according to claim 4, wherein the control unit supplies the pixel control signal to pixels arranged around the pixel to be changed among the plurality of pixels. the pixel memory of the pixel to be changed supplies a pixel control signal indicating timing for updating the drive signal to the drive circuit of the pixel to be changed in response to the update of the luminance signal;
4. The light emitting device according to claim 2, wherein the drive circuit for the pixel to be changed generates the drive signal according to the pixel control signal. The pixel control signal is a first pixel control signal,
10. The light-emitting device according to claim 9, wherein the control unit supplies a second pixel control signal indicating the timing of generating the drive signal to the pixel whose signal value of the luminance signal is not changed. 11. The light emitting device according to claim 10, wherein the first pixel control signal and the second pixel control signal are supplied at the same timing. 12. The light emitting device according to any one of claims 1 to 11, wherein the drive circuit includes a D/A converter for generating an analog signal corresponding to the luminance signal as the drive signal. 12. The light emitting device according to claim 1, wherein the drive circuit includes a counter control circuit for generating a PWM signal corresponding to the luminance signal as the drive signal. further comprising a reference voltage generation circuit that generates a sweep voltage that varies with time;
12. The light emitting device according to claim 1, wherein said drive circuit includes a counter control circuit for sampling said sweep voltage according to said luminance signal as said drive signal. 15. The light emitting device of claim 14, wherein the sweep voltage varies linearly with time. 15. The light emitting device according to claim 14, wherein said sweep voltage varies non-linearly with time. 17. The light emitting device according to claim 1, wherein said pixel memory is configured to be able to hold a plurality of said luminance signals. the pixel memory further holds a correction signal for correcting the luminance signal;
18. The light-emitting device according to claim 1, further comprising a correction unit that corrects the luminance signal according to the correction signal. a first substrate on which the light emitting element and the current generation circuit are arranged;
a second substrate on which the pixel memory and the driving circuit are arranged;
further comprising
19. The light emitting device according to any one of claims 1 to 18, wherein at least a portion of said first substrate and said second substrate are laminated together. 20. A display device comprising: the light emitting device according to claim 1; and an active element connected to the light emitting device. An optical unit having a plurality of lenses, an imaging device that receives light that has passed through the optical unit, and a display unit that displays an image,
20. A photoelectric conversion device, wherein the display unit displays an image picked up by the imaging element, and comprises the light emitting device according to claim 1. A housing provided with a display unit, and a communication unit provided in the housing and communicating with the outside,
20. An electronic device, wherein the display unit comprises the light emitting device according to claim 1. A wearable device having a display device for displaying an image,
A wearable device, wherein the display device comprises the light emitting device according to any one of claims 1 to 19.

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