JP2023013704A - Switching converter, controller circuit for the same, and electronic equipment including the switching converter - Google Patents

Abstract

To provide a switching converter without RHPZ (Right Half Plane Zero).SOLUTION: An inductor L1 is connected between a switching node SW and an output line 104. A first switch SW1 and a second switch SW2 are connected in series between an input line 102 and a ground line 106. A third switch SW3 is connected between the switching node SW and the input line 102. A flying capacitor C1 is connected between both ends of the third switch SW3 and the first switch SW1. A controller IC 200 drives the first to third switches SW1 to SW3.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to switching converters.

A DC/DC converter (switching converter) is used to generate a voltage lower or higher than the power supply voltage. A step-down converter generally has high efficiency in a region where the step-down ratio is close to 1, and efficiency decreases in a region where the step-down ratio is low, ie, a region where the output voltage is low. In order to solve this problem, a hybrid configuration (referred to as a hybrid DC/DC converter) is proposed in which a capacitor is added to the DC/DC converter. In this configuration, a capacitor can be used to generate a switching voltage having an amplitude of 1/2 the input voltage, thereby improving efficiency over a normal Buck converter.

U.S. Pat. No. 7,696,735 B2

It is in this context that the present disclosure is made, and one of its exemplary objectives is to provide a switching converter that is more efficient than a Buck converter.

Certain aspects of the present disclosure relate to switching converters. The switching converter includes an input line, an output line, a ground line, a first transistor, a second transistor, a third transistor and a fourth transistor connected in series between the input line and the ground line, a second transistor and a a first capacitor connected between a connection node of the third transistor and a ground line; a first capacitor connected between a connection node of the first transistor and the second transistor; and a connection node of the third transistor and the fourth transistor. 2 capacitors, a first inductor connected between a connection node of the third transistor and the fourth transistor and the output line, an output capacitor connected to the output line, a ground line to the fourth transistor, the second capacitor, the A second inductor on a loop that returns to the ground line through a two transistor, first capacitor, and a controller circuit that drives the first to fourth transistors.

Another aspect of the present disclosure is a controller circuit for a switching converter. The switching converter comprises an input line, an output line, a ground line, a first transistor, a second transistor, a third transistor and a fourth transistor connected in series between the input line and the ground line; between a first capacitor connected between a connection node of the second transistor and the third transistor and the ground line, a connection node of the first transistor and the second transistor, and a connection node of the third transistor and the fourth transistor; a first inductor connected between a connection node of the third transistor and the fourth transistor and the output line; an output capacitor connected to the output line; 2 capacitors, a second transistor, and a second inductor on a loop that returns to the ground line through the first capacitor.

Arbitrary combinations of the above constituent elements, and mutually replacing constituent elements and expressions in methods, apparatuses, systems, and the like are also effective as embodiments of the present invention.

According to certain aspects of the present disclosure, the efficiency of switching converters can be improved.

FIG. 1 is a circuit diagram of a switching converter according to an embodiment. FIG. 2 is a circuit diagram of a switching converter according to a comparative technique. FIG. 3 is an equivalent circuit diagram of the first state φ _I of the switching converter according to the comparative technique. FIG. 4 is an equivalent circuit diagram of the second state φ _II of the switching converter according to the comparative technique. FIG. 5 is an operation waveform diagram of a switching converter according to a comparative technique. FIG. 6 is an equivalent circuit diagram of the first state φ1 of the switching converter of FIG. FIG. 7 is an equivalent circuit diagram of the second state φ2 of the switching converter of FIG. FIG. 8 is an operation waveform diagram of the switching converter of FIG. FIG. 9 is a circuit diagram of a switching converter according to Modification 2. As shown in FIG. FIG. 10 is a circuit diagram of a switching converter according to Modification 3. As shown in FIG. FIG. 11 is a diagram illustrating an example of an electronic device that includes a switching converter;

(Overview of embodiment)
SUMMARY OF THE INVENTION Several exemplary embodiments of the disclosure are summarized. This summary presents, in simplified form, some concepts of one or more embodiments, as a prelude to the more detailed description that is presented later, and for the purpose of a basic understanding of the embodiments. The size is not limited. This summary is not a comprehensive overview of all possible embodiments, and it is intended to neither identify key elements of all embodiments nor delineate the scope of some or all aspects. For convenience, "one embodiment" may be used to refer to one embodiment (example or variation) or multiple embodiments (examples or variations) disclosed herein.

A switching converter according to one embodiment includes an input line, an output line, a ground line, and first, second, third and fourth transistors connected in series between the input line and the ground line. , a first capacitor connected between a connection node of the second and third transistors and a ground line, a connection node of the first and second transistors, and a connection node of the third and fourth transistors. a first inductor connected between a connection node of the third transistor and the fourth transistor and the output line; an output capacitor connected to the output line; a ground line to the fourth transistor; A second capacitor, a second transistor, a second inductor on a loop that returns to the ground line through the first capacitor, and a controller circuit that drives the first to fourth transistors.

According to this configuration, the charging current is limited by the second inductor when the first capacitor and the second capacitor are connected in parallel and the charge is transferred from the second capacitor to the first capacitor. As a result, it is possible to suppress a sharp increase in the charging current and reduce the switching loss.

In one embodiment, a second inductor may be connected in series with the second capacitor across the second and third transistors.

In one embodiment, a second inductor may be connected in series with the first capacitor between the connection node of the second and third transistors and the ground line.

In one embodiment, the inductance of the second inductor may be less than the inductance of the first inductor.

In one embodiment, the first to fourth transistors may be N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

In one embodiment, the controller circuit comprises a first state in which the first and third transistors are on and the second and fourth transistors are off; A second state in which the four transistors are on may be alternated.

In one embodiment, the length of the second state may be approximately half the natural period, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor, the second capacitor, and the second inductor. . As a result, resonance operation is realized, and efficiency can be improved. The term "substantially 1/2 times" is meant to include not only the case of being completely 1/2 times, but also the case of deviating from 1/2 within the range in which resonance operation can be achieved. Refers to the range of ±20%.

A controller circuit according to one embodiment controls a switching converter. The switching converter includes an input line, an output line, a ground line, a first transistor, a second transistor, a third transistor and a fourth transistor connected in series between the input line and the ground line, a second transistor and a a first capacitor connected between a connection node of the third transistor and a ground line; a first capacitor connected between a connection node of the first transistor and the second transistor; and a connection node of the third transistor and the fourth transistor. 2 capacitors, a first inductor connected between a connection node of the third transistor and the fourth transistor and the output line, an output capacitor connected to the output line, a ground line to the fourth transistor, the second capacitor, the Two transistors, a second inductor on a loop that returns to the ground line through the first capacitor. The controller circuit has a first state in which the first and third transistors are on and the second and fourth transistors are off, and a first state in which the first and third transistors are off and the second and fourth transistors are on. A state control unit that alternately repeats a certain second state and a driving circuit that drives the first to fourth transistors according to the output of the state control unit.

In one embodiment, the length of the second state may be approximately half the natural period, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor, the second capacitor, and the second inductor. .

In one embodiment, the controller circuit may be monolithically integrated on a single semiconductor substrate. "Integrated integration" includes the case where all circuit components are formed on a semiconductor substrate, and the case where the main components of a circuit are integrated. A resistor, capacitor, or the like may be provided outside the semiconductor substrate. By integrating the circuits on one chip, the circuit area can be reduced and the characteristics of the circuit elements can be kept uniform.

(embodiment)
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent constituent elements, members, and processes shown in each drawing are denoted by the same reference numerals, and duplication of description will be omitted as appropriate. Moreover, the embodiments are illustrative rather than limiting the invention, and not all features and combinations thereof described in the embodiments are necessarily essential to the invention.

In this specification, "a state in which member A is connected to member B" refers to a case in which member A and member B are physically directly connected, as well as a case in which member A and member B are electrically connected to each other. It also includes the case of being indirectly connected through other members that do not substantially affect the physical connection state or impair the functions and effects achieved by their combination.

Similarly, "the state in which member C is provided between member A and member B" refers to the case where member A and member C or member B and member C are directly connected, as well as the case where they are electrically connected. It also includes the case of being indirectly connected through other members that do not substantially affect the physical connection state or impair the functions and effects achieved by their combination.

Further, "signal A (voltage, current) corresponds to signal B (voltage, current)" means that signal A has a correlation with signal B. Specifically, (i) signal A is signal B, (ii) signal A is proportional to signal B, (iii) signal A is obtained by level-shifting signal B, (iv) signal A is obtained by amplifying signal B. (v) if signal A is obtained by inverting signal B; (vi) or any combination thereof; It will be understood by those skilled in the art that the range of "depending on" is determined according to the types of signals A and B and the application.

The vertical and horizontal axes of the waveform diagrams and time charts referred to in this specification are enlarged or reduced as appropriate for ease of understanding, and each waveform shown is also simplified for ease of understanding. or exaggerated or emphasized.

(embodiment)
FIG. 1 is a circuit diagram of a switching converter 100 according to an embodiment. The switching converter 100 steps down an input voltage V _IN on an input line 102 and generates a stepped-down output voltage V _OUT on an output line 104 . The switching converter 100 includes a first transistor M1 to a fourth transistor M4, a first capacitor C1, a second capacitor C2, an output capacitor C3, a first inductor L1, a second inductor L2, and a controller IC200. The second capacitor C2 is also called a flying capacitor.

A first transistor M 1 , a second transistor M 2 , a third transistor M 3 and a fourth transistor M 4 are connected in series between the input line 102 and the ground line 106 . The first to fourth transistors M1 to M4 are N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

A first capacitor C1 is connected between a connection node n2 of the second transistor M2 and the third transistor M3 and the ground line 106. As shown in FIG. The second capacitor C2 is connected between a connection node n1 between the first transistor M1 and the second transistor M2 and a connection node n3 between the third transistor M3 and the fourth transistor M4.

A first inductor L1 is connected between a connection node n3 of the third transistor M3 and the fourth transistor M4 and the output line 104. As shown in FIG.

Output capacitor C3 is connected to output line 104 .

A second inductor L2 is provided on a loop 110 from the ground line 106 through the fourth transistor M4, the second capacitor C2, the second transistor M2, the first capacitor C1 and back to the ground line 106. FIG. In this embodiment, the second inductor L2 is connected in series with the second capacitor C2 between both ends of the second transistor M2 and the third transistor M3, that is, between the node n1 and the node n3. The inductance of the second inductor L2 is preferably smaller than the inductance of the first inductor L1.

The controller IC 200 drives the first transistor M1 to the fourth transistor M4. For example, the controller IC 200 alternately repeats the first state φ1 and the second state φ2.
・First state φ1
First transistor M1: ON
Second transistor M2: OFF
Third transistor M3: ON
Fourth transistor M4: OFF

・Second state φ2
First transistor M1: OFF
Second transistor M2: ON
Third transistor M3: OFF
Fourth transistor M4: ON

The controller IC 200 is a functional IC that includes a drive circuit 210, a state control section 220, and a feedback circuit 230, and is integrated on one semiconductor substrate. Gate pins G1 to G4 of the controller IC200 are connected to the gates of the first transistor M1 to the fourth transistor M4. A feedback signal V _FB corresponding to the output voltage V _OUT of the switching converter 100 is fed back to the feedback pin FB of the controller IC 200 . Resistors R1 and R2 divide the output voltage V _OUT to produce a feedback signal V _FB .

Resistors R1 and R2 may be integrated into controller IC200. Also, the first to fourth transistors M1 to M4 may be integrated in the controller IC200.

The state control unit 220 is a control logic, generates control signals S ₁ to S ₄ that specify ON/OFF of the first transistor M1 to the fourth transistor M4, and controls the state of the switching converter 100 .

The drive circuit 210 drives the first to fourth transistors M1 to M4 according to the outputs S ₁ to S ₄ of the state control section 220 . Drive circuit 210 includes four drivers Dr1-Dr4.

The feedback circuit 230 controls the time ratio between the first state φ1 and the second state φ2 so that the error between the feedback signal V _FB and the reference voltage V _REF approaches zero. Feedback circuit 230 can be configured in the same manner as a general DC/DC converter, and can include, for example, a pulse width modulator and a pulse frequency modulator. The control method is not particularly limited, and may be a voltage mode controller, a peak current mode controller, or an average current mode controller, or ripple control, specifically hysteresis control (Bang- Bang control), fixed bottom detection ON time, and fixed peak detection OFF time.

The above is the configuration of the switching converter 100 . Before describing the operation of the switching converter 100, a switching converter according to a comparative technique will be described.

FIG. 2 is a circuit diagram of a switching converter 100R according to a comparative technique. Switching converter 100R has a configuration in which second inductor L2 is omitted from switching converter 100 in FIG. The switching converter 100R according to the comparative technique is also called a hybrid DC/DC converter.

The switching converter 100R repeats a first state _φI in which the transistors M1 and M3 are on and M2 and M4 are off, and a second state _φII in which the transistors M1 and M3 are off and M2 and M4 are on.

FIG. 3 is an equivalent circuit diagram of the first state φ _I of the switching converter 100R according to the comparative technique. In the first state _φI , the charging current IC2 of the second capacitor _C2 and the discharging current IC1 of the first capacitor _C1 flow through the first inductor L1. A charging current IC2 of the second capacitor _C2 passes through the first transistor M1. On the other hand, the discharge current IC1 of the first capacitor _C1 passes through the third transistor M3.

Since the second capacitor C2 and the first capacitor C1 are connected in series between the input line 102 and the ground line 106 in the first state φ _I , V _IN =V _C1 +V _C2 holds. VC1 is the voltage across the first capacitor _C1 , and VC2 is the voltage across the second capacitor _C2 . In the first state φ _I , voltage V _C2 increases with time and voltage V _C1 decreases with time.

The voltage at the connection node n3 between the third transistor M3 and the fourth transistor M4 is V _n3 =V _IN -V _C2 . The voltage ΔV _{L (φI)} across the first inductor L1 is
ΔV _{L (φI)} = V _IN - V _C2 - V _OUT
is. As described below, when V _C1 =V _C2 =V _IN /2,
ΔV _{L (φI)} = V _IN /2-V _OUT
The coil current I _L flowing through the first inductor L1 increases with a slope of ΔV _L(φI) /L1=(V _IN /2−V _OUT )/L1.

FIG. 4 is an equivalent circuit diagram of the second state φII of the switching converter 100R according to the comparative technique. In the second state _φII , the voltage at the connection node n3 between the third transistor M3 and the fourth transistor M4 is 0V. The voltage ΔV _{L (φII)} across the first inductor L1 is
ΔV _{L (φII)} = -V _OUT
is. The coil current I _L flowing through the first inductor L1 decreases with a slope of ΔV _L(φII) /L1=-V _OUT /L1.

In the second state _φII , the coil current IL flows through the first inductor _L1 . Also, the current I _C21 flows from the second capacitor C2 to the first transistor M1 via the second transistor M2, the charge is transferred from the second capacitor C2 to the first capacitor C1, and the second capacitor C2 is discharged. 1 capacitor C1 is charged. When C1=C2, the charge transfer results in V _C1 =V _C2 =V _IN /2.

FIG. 5 is an operation waveform diagram of the switching converter 100R according to the comparative technique. FIG. 5 shows waveforms for one switching cycle of the coil current I _L and the currents I _M1 to I _M4 flowing through the first transistor M1 to the fourth transistor M4.

In the first state φ _I , the current I _M1 corresponds to the current I _C2 and the current I _M3 to the current I _C1 . The coil current I _L is the sum of I _M1 and I _M3 . In the second state _φII , I _M2 corresponds to I _C21 and current I _M4 is the sum of I _L and I _M2 .

Let t _ON be the length of the first state φ _I and t _OFF be the length of the second state φ _II . In the steady state, the amount of change in the coil current _IL is the same between the first state _φI and the second state _φII .
(V _IN /2-V _OUT )/L1×t _ON =V _OUT /L×t _OFF

Assuming that d= _tON /( _tON + _tOFF ),
(V _IN /2−V _OUT )×d=V _OUT ×(1−d)
get Therefore, at steady state,
V _OUT =d×V _IN /2
holds. The output voltage V _OUT can be controlled from 0 to V _IN /2 depending on the duty cycle d.

Immediately after the transition from the first state φ _I to the second state φ _II , a current I _M2 =I _C21 flows through the second transistor M2. If the potential difference between the voltages _VC1 and _VC2 immediately before the transition is large, a large spike current _IM2 flows immediately after the transition. The loss (switched capacitor loss) occurring in the second transistor M2 is
P=(4C·f) ⁻¹ ·I _OUT ²
is represented by C is the combined capacitance of the first capacitor C1 and the second capacitor C2, and f is the switching frequency. The switching converter 100R according to the comparative technique has a problem that the loss increases due to the spike of the current IM2 immediately after the transition to _φII . These are the problems of comparison technology.

Next, the operation of switching converter 100 will be described. The operation of the switching converter 100 is basically the same as that of the switching converter 100R according to the comparative technique.

FIG. 6 is an equivalent circuit diagram of the first state φ1 of the switching converter 100 of FIG. In the first state φ1, the charging current IC2 of the second capacitor _C2 and the discharging current IC1 of the first capacitor _C1 flow through the first inductor L1.

The coil current I _L flowing through the first inductor L1 increases with a slope of ΔV _L(φ1) /L1=(V _IN /2−V _OUT )/L1.

FIG. 7 is an equivalent circuit diagram of the switching converter 100 of FIG. 1 in the second state φ2. The voltage ΔV _{L (φII)} across the first inductor L1 is
ΔV _{L (φII)} = -V _OUT
is. The coil current I _L flowing through the first inductor L1 decreases with a slope of ΔV _L(φ2) /L1=-V _OUT /L1.

Also, in the second state φ2, the coil current IL flows through the first inductor _L1 . Also, a current _IC21 flows from the second capacitor C2 to the first transistor M1 via the second transistor M2, and charges are transferred from the second capacitor C2 to the first capacitor C1. The current I _C21 in FIG. 7 differs from the current I _C21 in FIG. 4 in that it passes through the second inductor L2.

In the switching converter 100 of FIG. 1 as well, in a steady state,
_VOUT =d* _VIN /2= _VOUT
holds. That is, the output voltage V _OUT can be controlled in the range of 0 to V _IN /2 according to the duty cycle d.

FIG. 8 is an operation waveform diagram of switching converter 100 of FIG. FIG. 8 shows the waveform of the coil current _IL for one switching cycle.

After the transition from the first state φ1 to the second state φ2, a current I _M2 =I _C21 flows through the second transistor M2. As mentioned above, this current I _M2 =I _C21 passes through the second inductor L2. Due to this second inductor L2, the current I _M2 (=I _C21 ) gradually increases and then gradually decreases in the second state φ2 _. Suppressed. Thereby, the switched capacitor loss can be reduced.

The length _tOFF of the second state φ2 is approximately half the natural period _T0 , which is the reciprocal of the resonance frequency of the LC resonance circuit formed by the first capacitor C1, the second capacitor C2, and the second inductor L2. is preferred. This allows operation in resonance, further improving efficiency.

(Modification)
Those skilled in the art will understand that the above-described embodiments are examples, and that various modifications can be made to combinations of each component and each processing process. Such modifications will be described below.

(Modification 1)
Although the controller IC 200 alternately switches between the first state φ1 and the second state φ2 in the first embodiment, the present disclosure is not limited thereto. For example, in a light load state, three states of a third state φ3 in addition to the first state φ1 and the second state φ2 may be switched. A third state φ3 is a high impedance state in which all transistors M1-M4 are off.

(Modification 2, Modification 3)
The insertion of the second inductor L2 is not limited to the position shown in FIG. 1, and may be inserted on the path of the current _IC21 in the second state φ2. For example, the positions of the second capacitor C2 and the second inductor L2 may be exchanged, or they may be inserted in other locations.

FIG. 9 is a circuit diagram of a switching converter 100A according to Modification 2. As shown in FIG. In this variant, the second inductor L2 is connected in series with the second transistor M2 between the switching nodes n1 and n2. Also in this case, in the second state φ2, the peak of the current _IC21 flowing through the second transistor M2 can be suppressed, and the efficiency can be improved.

FIG. 10 is a circuit diagram of a switching converter 100B according to Modification 3. As shown in FIG. In this variant, the second inductor L2 is connected between the switching node n2 and the ground line 106 in series with the first capacitor C1. The first capacitor C1 and the second inductor L2 may be interchanged. In Modified Example 3, the current I _C1 in the first state φ1 also passes through the second inductor L2, so that the current I _C1 is also affected.

(Application)
FIG. 11 is a diagram showing an example of an electronic device 700 that includes the switching converter 100. As shown in FIG. Electronic device 700 includes an internal circuit 710 and a power supply circuit 720 . The internal circuit 710 can include a CPU (Central Processing Unit), a memory, a LAN (Local Area Network) interface circuit, and the like. The power supply circuit 710 boosts (or steps down) the input voltage _VIN and supplies it to the internal circuit 710 . The buck-boost converter 100 described above can be used as the power supply circuit 720 .

Electronic device 700 is not limited to a server, and may be an in-vehicle device. In addition, the electronic device 700 may be an industrial device, an OA (Office Automation) device, or a consumer device such as an audio device.

The embodiments are examples, and it should be noted that there are various modifications in the combination of each component and each processing process, and such modifications are included in the present disclosure and can constitute the scope of the present invention. It is understood by those skilled in the art.

100 switching converter 102 input line 104 output line 106 ground line M1 first transistor M2 second transistor M3 third transistor M4 fourth transistor C1 first capacitor C2 second capacitor C3 output capacitor L1 first inductor L2 second inductor 200 controller IC
210 drive circuit 220 state control unit 230 feedback circuit

Claims (13)

an input line;
an output line;
a ground line;
a first transistor, a second transistor, a third transistor and a fourth transistor connected in series between the input line and the ground line;
a first capacitor connected between a connection node of the second transistor and the third transistor and the ground line;
a second capacitor connected between a connection node between the first transistor and the second transistor and a connection node between the third transistor and the fourth transistor;
a first inductor connected between a connection node of the third transistor and the fourth transistor and the output line;
an output capacitor connected to the output line;
a second inductor provided on a loop returning from the ground line to the ground line via the fourth transistor, the second capacitor, the second transistor, the first capacitor;
a controller circuit that drives the first to fourth transistors;
A switching converter. 2. The switching converter according to claim 1, wherein said second inductor is connected in series with said second capacitor across said second transistor and said third transistor. the second inductor is connected in series with the second transistor between the connection node of the first transistor and the second transistor and the connection node of the second transistor and the third transistor; A switching converter according to claim 1 . 2. The switching converter according to claim 1, wherein said second inductor is connected in series with said first capacitor between said connection node of said second transistor and said third transistor and said ground line. 5. The switching converter according to claim 1, wherein the inductance of said second inductor is smaller than the inductance of said first inductor. 6. The switching converter according to claim 1, wherein said first to fourth transistors are N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). The controller circuit comprises:
A first state in which the first transistor and the third transistor are on and the second transistor and the fourth transistor are off, and a first state in which the first transistor and the third transistor are off and the second transistor and the fourth transistor are off. 7. A switching converter as claimed in any preceding claim, alternating between a second state in which the transistor is on. 8. The length of the second state is approximately half the natural period, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor, the second capacitor, and the second inductor. The switching converter described in . A controller circuit for a switching converter,
The switching converter is
an input line;
an output line;
a ground line;
a first transistor, a second transistor, a third transistor and a fourth transistor connected in series between the input line and the ground line;
a first capacitor connected between a connection node of the second transistor and the third transistor and the ground line;
a second capacitor connected between a connection node between the first transistor and the second transistor and a connection node between the third transistor and the fourth transistor;
a first inductor connected between a connection node of the third transistor and the fourth transistor and the output line;
an output capacitor connected to the output line;
a second inductor provided on a loop returning from the ground line to the ground line via the fourth transistor, the second capacitor, the second transistor, the first capacitor;
with
The controller circuit comprises:
A first state in which the first transistor and the third transistor are on and the second transistor and the fourth transistor are off, and a first state in which the first transistor and the third transistor are off and the second transistor and the fourth transistor are off. a state controller that alternates between a second state in which the transistor is on;
a drive circuit that drives the first to fourth transistors according to the output of the state control unit;
a controller circuit. 10. The length of the second state is approximately half the natural period, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor, the second capacitor, and the second inductor. controller circuit as described in . 11. The controller circuit according to claim 9 or 10, monolithically integrated on one semiconductor substrate. A switching converter comprising a controller circuit according to any of claims 9-11. An electronic device comprising the switching converter according to any one of claims 1 to 8 and 12.

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