JP2023005147A - Method for manufacturing printed wiring board - Google Patents

Abstract

To provide a printed wiring board having stable performance.SOLUTION: A method for manufacturing a printed wiring board in an embodiment includes: laminating a copper foil on a resin insulation layer; forming a plated resist on the copper foil; forming a first electrolytic plating film on the copper foil exposed from the plated resist; removing the plated resist; removing the copper foil in a part not covered with the first electrolytic plating film; and forming a conductor layer formed of the copper foil, the first electrolytic plating film on the copper foil, and a second electrolytic plating film on the first electrolytic plating film by forming the second electrolytic plating film on the first electrolytic plating film.SELECTED DRAWING: Figure 3

Description

The technology disclosed by this specification relates to a method for manufacturing a printed wiring board.

Patent Document 1 discloses a coil sheet having an insulating substrate and a spiral coil pattern formed on the insulating substrate. The coil sheet manufacturing method of Patent Document 1 includes forming a spiral lower-layer conductor pattern on an insulating substrate, and additionally forming an electrolytic plating film on the conductor pattern.

JP 2009-246363 A

[Problem of Patent Document 1]
In the technique disclosed in Patent Document 1, an electrolytic plating film is formed on the conductor pattern after the conductor pattern is formed on the insulating substrate. It is thought that this method causes variations in the thickness of the completed coil pattern. It is considered that the gaps between the wires forming the coil pattern are uneven.

A method of manufacturing a printed wiring board according to the present invention includes laminating a copper foil on a resin insulating layer, forming a plating resist on the copper foil, and forming a first copper foil on the copper foil exposed from the plating resist. forming an electrolytic plated film; removing the plating resist; removing the copper foil from a portion not covered with the first electrolytic plated film; Forming an electrolytic plated film to form a conductor layer composed of the copper foil, the first electrolytic plated film on the copper foil, and the second electrolytic plated film on the first electrolytic plated film; have.

According to the printed wiring board manufacturing method of the embodiment, the first electrolytic plated film having a certain thickness is formed on the copper foil before the circuit pattern is formed. After that, by forming a second electrolytic plated film on the first electrolytic plated film, a conductor layer composed of the copper foil, the first electrolytic plated film on the copper foil, and the second electrolytic plated film on the first electrolytic plated film is formed. It is formed. Therefore, according to the manufacturing method of the embodiment, compared with the conventional method of performing additional plating after forming the circuit pattern with copper foil, the gap between the conductor circuits included in the conductor layer of the printed wiring board to be manufactured. variation can be reduced. A printed wiring board having a conductor layer with a high space factor can be obtained. A printed wiring board with stable performance can be obtained.

1 is a plan view schematically showing a printed wiring board according to an embodiment; FIG. FIG. 2 is a bottom view schematically showing the printed wiring board of the embodiment; BRIEF DESCRIPTION OF THE DRAWINGS Sectional drawing which shows typically some printed wiring boards of embodiment. FIG. 4 is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to the embodiment; FIG. 4 is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to the embodiment; FIG. 4 is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to the embodiment; FIG. 4 is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to the embodiment; FIG. 4 is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to the embodiment; FIG. 4 is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to the embodiment; Sectional drawing which shows typically some printed wiring boards of a 1st modification. FIG. 5 is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to the first modified example;

[Embodiment]
FIG. 1 is a plan view showing a printed wiring board 2 of the embodiment. FIG. 2 is a bottom view showing the printed wiring board 2 of FIG. As shown in FIGS. 1 and 2 , printed wiring board 2 includes resin insulation layer 10 , conductor layer 20 formed on first surface 10 a of resin insulation layer 10 , second layer 20 of resin insulation layer 10 . and a conductor layer 30 formed on the surface 10b. The printed wiring board 2 of the embodiment is used as a motor coil substrate by winding it in a cylindrical shape. A motor is formed by arranging the formed motor coil substrate inside a cylindrical yoke and arranging a rotating shaft and a magnet inside the motor coil substrate (not shown).

Resin insulating layer 10 is formed using an insulating resin such as polyimide or polyamide. Resin insulation layer 10 has flexibility. The resin insulation layer can form a flexible substrate. Resin insulation layer 10 has first surface 10a and second surface 10b. The thickness of resin insulation layer 10 is in the range of 10 μm or more and 100 μm or less, for example, 12.5 μm.

The conductor layers 20, 30 are formed using copper. The conductor layers 20 and 30 are spirally formed coils. As shown in FIG. 1, the conductor layer 20 formed on the first surface 10a is spirally formed clockwise from the outer circumference toward the inner circumference. A connection terminal for connecting a connection cord (not shown) for connecting the conductor layer 20 to the outside is formed on the outer peripheral side end portion 24 of the conductor layer 20 . A through hole 16 is formed in the inner peripheral side end portion 22 of the conductor layer 20 so as to penetrate between the first surface 10 a and the second surface 10 b of the resin insulation layer 10 . A via conductor 45 is formed in the through hole 16 . Through holes 16 and via conductors 45 will be described later in detail with reference to FIG. Via conductors 45 electrically connect conductor layer 20 on first surface 10a and conductor layer 30 on second surface 10b.

As shown in FIG. 2, the conductor layer 30 formed on the second surface 10b is formed in a counterclockwise spiral shape from the outer circumference to the inner circumference. A connection terminal for connecting a connection cord (not shown) for connecting the conductor layer 30 to the outside is formed on the outer peripheral side end portion 34 of the conductor layer 30 . The inner peripheral side end portion 32 of the conductor layer 30 is electrically connected to the inner peripheral side end portion 22 of the conductive layer 20 through the via conductors 45 described above.

The conductor layers 20 and 30 are spirally formed in the same winding direction when viewed from the same plane. The conductor layers 20 and 30 on the first surface 10a and the second surface 10b function as one coil electrically connected in series. Although not shown, the first surface 10a and the conductor layer 20 are covered with a resin insulating layer. Similarly, the second surface 10b and the conductor layer 30 are covered with a resin insulating layer.

FIG. 3 is a cross-sectional view of part of the printed wiring board 2 of the embodiment. 3 is a cross-sectional view between III-III of FIGS. 1 and 2. FIG. The structure of the conductor layers 20, 30 will be described in detail with reference to FIG. As shown in FIG. 3, the conductor layer 20 includes a first conductor circuit 20a forming the coil (FIG. 1), a second conductor circuit 20b adjacent to the first conductor circuit 20a, and a conductor circuit 20b adjacent to the second conductor circuit 20b. and an inner peripheral side end portion 22 adjacent to the third conductive circuit 20c. The first conductive circuit 20a, the second conductive circuit 20b, the third conductive circuit 20c, and the inner peripheral end 22 are different parts of one continuous wire. The distance between the first conductive circuit 20a, the second conductive circuit 20b, the third conductive circuit 20c, and the inner peripheral side edge 22 is in the range of 10 μm or more and 50 μm or less, for example, 25 μm. The thicknesses of the first conductor circuit 20a, the second conductor circuit 20b, the third conductor circuit 20c, and the inner peripheral side end portion 22 are in the range of 80 μm or more and 150 μm or less, for example, 103 μm. The widths of the first conductor circuit 20a, the second conductor circuit 20b, and the third conductor circuit 20c are in the range of 80 μm or more and 150 μm or less, for example, 100 μm. The width of the inner peripheral side end portion 22 is, for example, 300 μm.

Similarly, the conductor layer 30 includes a first conductor circuit 30a forming a coil (FIG. 2), a second conductor circuit 30b adjacent to the first conductor circuit 30a, and a third conductor circuit 30c adjacent to the second conductor circuit 30b. and an inner peripheral end 32 adjacent to the third conductive circuit 30c. The first conductive circuit 30a, the second conductive circuit 30b, the third conductive circuit 30c, and the inner peripheral side end portion 32 are different portions of one continuous wiring. The distance between the first conductor circuit 30a, the second conductor circuit 30b, the third conductor circuit 30c, and the inner peripheral side edge 32 is in the range of 10 μm or more and 50 μm or less, for example, 25 μm. The thicknesses of the first conductor circuit 30a, the second conductor circuit 30b, the third conductor circuit 30c, and the inner peripheral side end portion 32 are in the range of 80 μm or more and 150 μm or less, for example, 103 μm. The widths of the first conductor circuit 30a, the second conductor circuit 30b, and the third conductor circuit 30c are in the range of 80 μm or more and 150 μm or less, for example, 100 μm. The width of the inner peripheral side end portion 32 is, for example, 300 μm.

The conductor layer 20 includes copper foils 12a-12d, first electrolytic plated films 40a-40d, and second electrolytic plated films 50a-50d. The conductor layer 30 has copper foils 14a-14d, first electrolytic plated films 41a-41d, and second electrolytic plated films 51a-51d. Hereinafter, when the copper foils 12a to 12d are collectively referred to without distinction, they will be referred to as "copper foil 12". The same applies to the first electrolytic plated films 40a-40d, the second electrolytic plated films 50a-50d, the copper foils 14a-14d, the first electrolytic plated films 41a-41d, and the second electrolytic plated films 51a-51d.

As described above, the through holes 16 are provided in the copper foil 12 d and the resin insulation layer 10 under the inner peripheral end 22 . A via conductor 45 is provided in the through hole 16 . The via conductor 45 electrically connects the inner peripheral side end portion 22 of the conductor layer 20 and the inner peripheral side end portion 32 of the conductive layer 30 .

The components of the conductor layer 20 are described below. Copper foil 12 is a copper thin film formed on first surface 10 a of resin insulation layer 10 . Copper foil 12 is formed in advance on first surface 10 a of resin insulation layer 10 . The copper foil 12 may be an electroless plated film. The thickness of the copper foil 12 ranges from 1 μm to 10 μm, for example, 3 μm.

The first electrolytic plated film 40 is a metal layer formed on the copper foil 12 . The first electrolytic plated film 40 is made of copper. Part of first electrolytic plated film 40 d is filled in through hole 16 to form via conductor 45 . The thickness of the first electrolytic plated film 40 ranges from 50 μm to 150 μm, for example, 90 μm. The width of the first electroplated films 40a to 40c is, for example, 280 μm.

The second electrolytic plated film 50 is a metal layer formed on the first electrolytic plated film 40 . The second electrolytic plated film 50 is also formed on the first surface 10 a lateral to the first electrolytic plated film 40 . The second electrolytic plated film 50 covers the upper surface of the first electrolytic plated film 40 , the side surfaces of the first electrolytic plated film 40 , and the side surfaces of the copper foil 12 immediately below the first electrolytic plated film 40 . The thickness of the second electrolytic plated film 50 ranges from 5 μm to 30 μm, for example, 10 μm.

The components of the conductor layer 30 are described below. As shown in FIG. 3 , copper foil 14 is a copper thin film formed on second surface 10 b of resin insulation layer 10 . Copper foil 14 is formed in advance on second surface 10 b of resin insulation layer 10 . The copper foil 14 may be an electroless plated film. The thickness of copper foil 14 is substantially the same as that of copper foil 12 .

The first electrolytic plated film 41 is a metal layer formed on the copper foil 14 . The first electrolytic plated film 41 is made of copper. The thickness of first electrolytic plated film 41 is substantially the same as that of first electrolytic plated film 40 .

The second electrolytic plated film 51 is a metal layer formed on the first electrolytic plated film 41 . The second electrolytic plated film 51 is also formed on the second surface 10 b lateral to the first electrolytic plated film 41 . The second electrolytic plated film 51 covers the upper surface of the first electrolytic plated film 41 , the side surfaces of the first electrolytic plated film 41 , and the side surfaces of the copper foil 14 immediately below the first electrolytic plated film 41 . The thickness of second electrolytic plated film 51 is substantially the same as that of second electrolytic plated film 50 .

In the embodiment, the conductor circuits such as the first conductor circuits 20a, 30a and the second conductor circuits 20b, 30b formed on the conductor layers 20, 30 have smaller variations in gap and thickness than conventionally. A printed wiring board 2 with stable performance can be obtained.

[Manufacturing Method of Printed Wiring Board 2 of Embodiment]
4A to 4F show a method for manufacturing the printed wiring board 2 of the embodiment. 4A-4F are cross-sectional views. FIG. 4A shows resin insulation layer 10, copper foil 12 previously provided on first surface 10a, and copper foil 14 previously provided on second surface 10b. The resin insulation layer 10 is a flexible substrate with copper foils 12 and 14 attached. At this point, the copper foils 12 and 14 cover the entire surfaces of the first surface 10a and the second surface 10b.

A laser is irradiated from above the copper foil 12 . As shown in FIG. 4B , through holes 16 are formed through copper foil 12 and resin insulation layer 10 .

A plating resist 60 is formed on the copper foil 12 as shown in FIG. 4C. The plating resist 60 has openings 62a to 62d at positions where the first conductive circuit 20a, the second conductive circuit 20b, the third conductive circuit 20c, and the inner peripheral side edge 22 are to be formed (see FIG. 3). . The copper foil 12 is exposed through the openings 62a-62d. A plating resist 61 is similarly formed on the copper foil 14 . Openings 63a to 63d are provided at positions where the first conductive circuit 30a, the second conductive circuit 30b, the third conductive circuit 30c, and the inner peripheral side edge 32 are to be formed (see FIG. 3). The copper foil 14 is exposed through the openings 63a-63d. The width of the plating resists 60 and 61 is, for example, 35 μm. The thickness of the plating resists 60 and 61 is 100 μm or more, for example 112 μm. The width of the openings 62a-62c and 63a-63c is, for example, 90 μm. The width of the openings 62d and 63d is, for example, 280 μm.

As shown in FIG. 4D, electrolytic plating (pattern plating) is performed to form first electrolytic plated films 40 a to 40 d on copper foil 12 exposed from plating resist 60 . Similarly, first electroplated films 41a to 41d are formed on copper foil 14 exposed from plating resist 61. Next, as shown in FIG. The thickness of the first electroplated films 40 and 41 at this point is, for example, 100 μm. The width of the first electrolytic plated films 40a-40c and 41a-41c formed in the openings 62a-62c and 63a-63c is, for example, 90 μm. The width of the first electroplated films 40d and 41d formed in the openings 62d and 63d is, for example, 280 μm.

As shown in FIG. 4E, the plating resists 60, 61 are removed. As a result, an opening 70 exposing the copper foil 12 is formed in the first electrolytic plated film 40 . An opening 71 is formed in the first electrolytic plated film 41 to expose the copper foil 14 . At this point, the width of the openings 70, 71 is the same as the width of the plating resists 60, 61 (FIG. 4C), eg, 35 μm.

A flash etch is performed. As shown in FIG. 4F, the copper foil 12 exposed through the openings 70 is removed. Copper foils 12a-12d are formed. A portion of the first electrolytic plated film 40 is also removed. The copper foil 14 exposed from the opening 71 is removed. Copper foils 14a-14d are formed. A portion of the first electrolytic plated film 41 is also removed. As the copper foils 12 and 14 are removed, the first electroplated films 40 and 41 become smaller as a whole. The first electroplated films 40 and 41 are removed, for example, by about 5 μm per location. At this point, the width of the openings 70, 71 expands to, for example, 45 μm. The thickness of the first electroplated films 40 and 41 is, for example, 90 μm. The width of the first electroplated films 40a-40c and 41a-41c is, for example, 80 μm.

Additional electroplating is then performed. As shown in FIG. 3, a second electrolytic plated film 50 covers the upper surface of the first electrolytic plated film 40, the side surface of the first electrolytic plated film 40, and the side surface of the copper foil 12 immediately below the first electrolytic plated film 40. is formed. Similarly, a second electrolytic plated film 51 is formed to cover the top surface of first electrolytic plated film 41 , the side surface of first electrolytic plated film 41 , and the side surface of copper foil 14 immediately below first electrolytic plated film 41 . The thickness of the second electroplated films 50 and 51 is, for example, 10 μm.

A first conductor circuit 20a, a second conductor circuit 20b, a third conductor circuit 20c, and an inner peripheral side end 22 are formed by the copper foils 12a to 12d, the first electrolytic plated films 40a to 40d, and the second electrolytic plated films 50a to 50d. be done. A conductor layer 20 is formed. Similarly, the copper foils 14a to 14d, the first electrolytic plated films 41a to 41d, and the second electrolytic plated films 51a to 51d form the first conductive circuit 30a, the second conductive circuit 30b, the third conductive circuit 30c, and the inner peripheral side end portion. 32 are formed. A conductor layer 30 is formed. As a result, the printed wiring board 2 (FIG. 3) of the embodiment is obtained.

According to the manufacturing method of the embodiment, the first electroplated films 40 and 41 having a certain thickness are formed on the copper foils 12 and 14 before the circuit patterns are formed. After that, the conductor layers 20 and 30 are formed by forming the second electrolytic plated films 50 and 51 on the first electrolytic plated films 40 and 41 . Therefore, according to the manufacturing method of the embodiment, compared to the conventional method of performing additional plating after forming the circuit pattern with copper foil, the distance between the conductor circuits 20a to 20c and 30a to 30c included in the conductor layers 20 and 30 to be manufactured is reduced. gap variation and thickness variation can be reduced. A printed wiring board 2 having conductor layers 20 and 30 with a high space factor is obtained. A printed wiring board 2 with stable performance can be obtained.

[First modification of the embodiment]
FIG. 5 shows a first variant of the embodiment. In the first modified example, the copper foils 12 and 14 exist partially between the first electroplated films 40 and 41 . The second electrolytic plated films 50 and 51 are formed on the first electrolytic plated films 40 and 41 and on the copper foils 12 and 14 between the first electrolytic plated films 40 and 41 .

The manufacturing method of the printed wiring board 2 of the first modified example is the same as the embodiment up to the middle. The steps described in FIGS. 4A to 4E are performed in the first modified example as well as in the embodiment. In a first variant, after the plating resists 60, 61 are removed (FIG. 4E), an additional electroplating is performed prior to the flash etching. As a result, as shown in FIG. 6, the upper surface of the first electrolytic plated film 40, the side surface of the first electrolytic plated film 40, and the copper foil 12 positioned between the first electrolytic plated film 40 (copper exposed from the opening 70). A second electroplated film 50 is formed to cover the upper surface of the foil 12). A second electrolytic layer covering the upper surface of first electrolytic plated film 41, the side surface of first electrolytic plated film 41, and the upper surface of copper foil 14 located between first electrolytic plated film 41 (copper foil 14 exposed from opening 71). A plated film 51 is formed.

In a first variant, a flash etch is then performed. As shown in FIG. 5, the second electrolytic plated film 50 in the opening 70 and the copper foil 12 directly thereunder are removed. Copper foils 12a-12d are formed. A portion of the second electrolytic plated film 50 covering the first electrolytic plated film 40 is also removed. Similarly, the second electrolytic plated film 51 in the opening 71 and the copper foil 14 directly thereunder are removed. Copper foils 14a-14d are formed. A portion of second electrolytic plated film 51 covering first electrolytic plated film 41 is also removed. The second electrolytic plated films 50 and 51 covering the first electrolytic plated films 40 and 41 become smaller as a whole.

As a result, the first conductive circuit 20a, the second conductive circuit 20b, the third conductive circuit 20c, and the inner peripheral side edge 22 are formed. A conductor layer 20 is formed. Similarly, a first conductor circuit 30a, a second conductor circuit 30b, a third conductor circuit 30c, and an inner peripheral side edge 32 are formed. A conductor layer 30 is formed. A first modified printed wiring board 2 (FIG. 5) is obtained.

According to the manufacturing method of the first modified example, since all of the copper foils 12 and 14 remain when the additional electrolytic plating is performed, the power for the additional electrolytic plating is applied to some of the copper foils 12 and 14. Can be used as a feeding lead. There is no need to provide a separate lead.

2: Printed wiring board 10: Resin insulating layers 12 (12a to 12d), 14 (14a to 14d): Copper foils 20, 30: Conductive layers 40 (40a to 40d), 41 (41a to 41d): First electrolytic plating Films 50 (50a to 50d), 51 (51a to 51d): second electroplated films 60, 61: plating resist

Claims (4)

laminating a copper foil on the resin insulation layer;
forming a plating resist on the copper foil;
forming a first electrolytic plated film on the copper foil exposed from the plating resist;
removing the plating resist;
removing the portion of the copper foil that is not covered with the first electroplated film;
By forming a second electrolytic plated film on the first electrolytic plated film, the copper foil, the first electrolytic plated film on the copper foil, and the second electrolytic plated film on the first electrolytic plated film and forming a conductor layer. 2. The method of manufacturing a printed wiring board according to claim 1, wherein the thickness of said first electroplating film is 50 [mu]m or more. 2. The method of manufacturing a printed wiring board according to claim 1, wherein forming said second electroplating film is performed after removing said copper foil. 2. The method of manufacturing a printed wiring board according to claim 1, wherein forming the second electrolytic plated film includes forming the second electrolytic plated film immediately above the copper foil positioned between the first electrolytic plated films. and removing the copper foil includes removing the second electroplated film formed directly on the copper foil.

Images