JP2022525072A - Phase Redundant Voltage Regulator Phase Redundant Regulator Phase Sharing within the Device - Google Patents

Abstract

Phase redundant voltage regulator devices include a group of regulator phases, each having a multiphase controller (MPC) connected to each regulator phase. The MPC transfers the phase fault signal and one of the pulse width modulation (PWM) phase control signal and the shared current (ISHARE) phase control signal received from the regulator phase of the phase group to the control logic. The spare regulator phase includes an output OR device for limiting the flow of current to the spare regulator phase output. The output switching device is configured to electrically couple the spare regulator phase output to the common regulator output. The control logic is connected to the phase group MPC, asserts the phase enable signal, transfers the phase control signal to the spare regulator phase, and receives the phase fault signal from the spare regulator phase. The control logic electrically interconnects the spare regulator phase to a phase group containing the failed regulator phase in response to receiving a phase fault signal from the MPC.

Description

The present disclosure generally relates to voltage regulator circuits. In particular, the present disclosure relates to sharing a redundant regulator phase within a phase redundant voltage regulator circuit.

A voltage regulator is an electronic device or system that receives an input voltage and is designed to automatically maintain a constant voltage level at one or more output terminals. Depending on the design, a voltage regulator can be used to regulate one or more alternating current (AC) or direct current (DC) voltages. Voltage regulators can be included in electronic devices such as computer power supplies and are used to power electronic components such as processors, memory devices, and other types of integrated circuits (ICs). The resulting DC voltage can be stabilized. The voltage regulator circuit can receive the feedback voltage received from the sensing points located adjacent to the electronic components powered by the voltage regulator. This feedback voltage can be used to modulate the output voltage of the voltage regulator. This modulated output voltage brings the voltage received by the supplied electronic components to a stable value regardless of the current draw of these components or the voltage drop between the conductors that interconnect the voltage regulator to these components. Can be maintained.

A field effect transistor (FET) is a transistor that uses an electric field to control the shape of the channels of one type of charge carrier in a semiconductor material, and thus its conductivity. The FET can be a unipolar transistor because it can include single carrier type operation. The FET can be a majority charge carrier device in which the current is mainly carried by the majority carriers, or a minority charge carrier device in which the current is primarily due to the flow of the minority carriers. FET devices can consist of active channels through which electrons or holes, which are charge carriers, flow from the source to the drain. The conductors of the source and drain terminals can be connected to the semiconductor via ohmic contacts. The conductivity of the channel can be a function of the potential applied between the gate terminal and the source terminal.

The embodiment can target a phase redundant voltage regulator device. A phase redundant voltage regulator device comprises a plurality of regulator phases, each including a regulator that receives an input voltage at the regulator input and is electrically coupled to provide a respective output voltage at the regulator output. The phase redundant voltage regulator device comprises a set of phase groups of a plurality of regulator phases, including first and second phase groups. Each phase group includes a common regulator input electrically interconnected to the regulator input of the phase group regulator and a common regulator output electrically interconnected to the regulator output of the phase group regulator. Each phase group also includes at least one redundant regulator phase and a polyphase controller (MPC) electrically coupled to each regulator phase of the phase group. The MPC transfers the phase fault signal and one of the pulse width modulation (PWM) phase control signal and the shared current ( _ISHARE ) phase control signal received from each regulator phase of each phase group to the control logic. It is configured as follows. The phase redundant voltage regulator device includes a set of spare regulator phases for a plurality of regulator phases, including a first and second spare regulator phase. Each spare regulator phase includes a secondary output OR device that is electrically coupled and configured to limit the flow of current to the secondary output of the spare regulator phase. Each spare regulator phase also provides a first output switching device configured to electrically couple the regulator output of the spare regulator phase to the first common regulator output in response to the first phase enable signal. include. Each spare regulator phase also has a second output switching configured to electrically couple the regulator output of the spare regulator phase to the second common regulator output and control logic in response to the second phase enable signal. -Includes devices. The control logic is electrically connected to the MPC of each phase group of the set of phase groups, receives the phase control signal from the MPC, and is configured to exchange the phase fault signal with the MPC. The control logic is also electrically connected to the spare regulator phase of the set of spare regulator phases. The control logic is configured to assert the phase enable signal, transfer the phase control signal to the spare regulator phase, and receive the phase fault signal from the spare regulator phase. The control logic is also configured to electrically interconnect the spare regulator phase to a phase group containing the failed regulator phase in response to receiving a phase fault signal from the MPC.

The embodiment can also be directed to a phase redundant voltage regulator device. A phase redundant voltage regulator device can include multiple regulator phases, each containing a regulator that receives an input voltage at the regulator input and is electrically coupled to provide a respective output voltage at the regulator output. The phase redundant voltage regulator device also includes a set of phase groups of a plurality of regulator phases, including first and second phase groups. Each phase group includes a common regulator input electrically interconnected to the regulator input of the phase group regulator and a common regulator output electrically interconnected to the regulator output of the phase group regulator. Each phase group comprises at least one redundant regulator phase and an MPC electrically coupled to each regulator phase of the phase group. The MPC is configured to transfer the phase fault signal and one of the PWM phase control signal and the _ISHARE phase control signal received from each regulator phase of each phase group to the control logic. The phase redundant voltage regulator device also includes a set of spare regulator phases for a plurality of regulator phases, including first and second spare regulator phases. Each spare regulator phase is a secondary output logical sum field effect transistor (FET) electrically coupled between the regulator output and the secondary output of the spare regulator, and the source and drain terminals of the secondary output OR FET. Includes a second comparator, which has an input electrically connected to the. The second comparator further has an output electrically connected to the gate terminal of the secondary output OR FET. The second comparator, together with the secondary output OR FET, is configured to limit the flow of current to the secondary output of the spare regulator phase. Each spare regulator phase is also electrically connected and configured to electrically couple the regulator output of the spare regulator phase to the first common regulator output in response to the first phase enable signal. Includes output switching FET. Each spare regulator phase is also a second output switching FET connected and configured to electrically couple the regulator output of the spare regulator phase to the second common regulator output in response to the second phase enable signal. including. Phase redundant voltage regulator devices also include control logic. The control logic is electrically connected to the MPC of each phase group of the set of phase groups, receives the phase control signal from the MPC, and is configured to exchange the phase fault signal with the MPC. The control logic is also electrically connected to the spare regulator phase of the set of spare regulator phases, asserting the phase enable signal, transferring the phase control signal to the spare regulator phase, and sending the phase fault signal from the spare regulator phase. It is configured to receive. The control logic is configured to electrically interconnect the spare regulator phase to a phase group containing the failed regulator phase in response to receiving a phase fault signal from the MPC.

Embodiments can also cover methods for sharing a set of redundant spare regulator phases between phase groups of regulator phases. In response to monitoring the phase failure signal received from the phase group, the method transfers the primary output of the first spare regulator phase to the first spare regulator phase of the set of redundant spare regulator phases in the first phase group. It involves using control logic configured to assert a phase enable signal that is electrically coupled to the common regulator output in response to detection of a phase single fault signal from the first phase group. The method also transmits one of the PWM phase control signal and the _ISHARE phase control signal received from the MPC of the first phase group to the first spare regulator phase from the first spare regulator phase. It involves using control logic to electrically connect the phase fault signal to the MPC of the first phase group. The method also discontinues monitoring of the phase single point of failure signal in response to the detection of the phase single point of failure signal from the first phase group and puts the first spare regulator phase into the non-volatile memory in the control logic. Includes the use of control logic to store the association between and the common regulator output of the first phase group. The method also supplements the primary output of the second spare regulator phase to the second spare regulator phase of the set of redundant spare regulator phases in response to the detection of additional phase failure signals from the supplementary phase group. It involves using control logic to assert a phase enable signal that electrically couples to the common regulator output of the phase group. The method also transmits the PWM phase control signal or _ISHARE phase control signal received from the MPC of the supplementary phase group to the second spare regulator phase and the phase failure signal from the second spare regulator phase to the supplementary phase. Includes using control logic to electrically connect to the group's MPC. The method also discontinues monitoring of the additional phase fault signal in response to detection of the additional phase fault signal from the supplementary phase group, with the common regulator output of the second spare regulator phase and the supplementary phase group. Includes the use of control logic to store the association between and in non-volatile memory. The method also uses control logic to send system notifications requesting regulator replacement operation in response to the output of all redundant spare regulator phases that are electrically coupled to the common regulator output of the phase group. Including that.

The above overview is not intended to illustrate each or all of the exemplified embodiments of the present disclosure.

The drawings included in this application are incorporated herein and form in part thereof. These drawings exemplify embodiments of the present disclosure and, along with explanations, serve to explain the principles of the present disclosure. The drawings are merely illustrations of specific embodiments and are not intended to limit the disclosure.

It is a block diagram which shows the phase redundant voltage regulator apparatus by embodiment of this disclosure. 2 is a diagram showing a voltage regulator phase and a standby voltage regulator phase according to an embodiment consistent with the figure. It is a block diagram which shows the phase redundant voltage regulator apparatus which has a shared redundant spare according to the embodiment which coincides with the figure. FIG. 6 is a flow chart illustrating a method for sharing a set of redundant spare regulator phases between groups of regulators, according to an embodiment consistent with the figure.

The present invention can accept various modified and alternative forms, the details of which are illustrated and illustrated in detail in the drawings. However, it should be understood that the intent is not limited to the particular embodiment described of the present invention. On the contrary, the intent is to include all modified, equal and alternative forms within the ideas and scope of the invention.

In drawings and detailed description, similar numbers generally refer to similar components, parts, steps, and processes.

Certain embodiments of the present disclosure can be understood in the context of sharing a redundant regulator phase within a phase redundant voltage regulator circuit. Sharing such a redundant regulator phase can help reduce cost and design complexity, and provide phase redundancy and robust power delivery. By sharing the redundant regulator phase within the voltage regulator circuit, the reliability of power supply to the electronic system can be improved.

An embodiment can provide a shared redundant regulator phase to an electronic device such as a server that can be used to provide data to a client connected to the server over a network. Such servers can include, but are not limited to, web servers, application servers, mail servers, virtual servers. The embodiments discussed in this context, but not necessarily limited, can facilitate the understanding of various aspects of the present disclosure. Certain embodiments also provide a shared redundant regulator phase for other equipment and related applications, such as electronic equipment such as computing systems that can be used in a wide variety of computational and data processing applications. Can be targeted. Such computing systems can include, but are not limited to, supercomputers, high performance computing (HPC) systems, and other types of dedicated computers. Embodiments can also cover shared redundant regulator phases for equipment used in telecommunications, aircraft, and automotive applications and the like.

The acronym "FET" can be used herein to help interconnect two circuit nodes within a voltage regulator design by providing a relatively low impedance electrical connection between the nodes. Used for field effect transistors that can. In embodiments, it can be appreciated that voltage regulator designers can select different types of FETs to meet the electrical performance criteria of a particular voltage regulator design. Such FET types can include, but are not limited to, enhancement mode, depletion mode, N-channel field effect transistor (NFET), and P-channel field effect transistor (PFET) devices. Such FETs can also be referred to as "power FETs" and "power metal oxide semiconductor field effect transistors" (MOSFETs) without losing their meaning. It can also be understood that in some embodiments, various other types of electronic devices can be used instead of FETs. Such electronic devices can include, without limitation, bipolar devices such as NPN and PNP transistors, and transistors manufactured by other semiconductor techniques.

For ease of discussion and illustration, the terms "ORing device" and "ORing FET" refer to the flow of current to the phase output of a voltage regulator without loss of meaning. It can be used indistinguishably to refer to a semiconductor device configured to prevent. The FET symbol, eg, 244 in FIG. 2, is used to represent such a device, but this should not be construed as limiting, as would other types of devices as described above. Can be used for the purpose of.

In the present specification, for example, the descriptor "OR" used in connection with "OR device", "OR", and "OR regulator" is the logical sum of a device, for example, an FET or a voltage regulator. It can be understood as referring to a function and an output protection function. Such devices and voltage regulators are protected from reverse current to the device output by FETs configured to behave like output protection diodes.

The terms "phase" and "regulator phase" are used interchangeably herein with respect to a redundant voltage regulator used within a voltage regulator device. The voltage regulator phase is generally activated by a polyphase controller (MPC) at a different time than the activation time of other voltage regulators. This is commonly referred to as being activated "out of phase" with other voltage regulators.

Various electronic systems use voltage regulators to power electronic components in the system at a stable voltage. Such electronic systems can include, but are not limited to, computers, computing equipment, servers, and equipment used in telecommunications, aircraft, and automotive applications. The components in the system are central processing unit (CPU), graphics processing unit (GPU), other integrated circuit (IC) types, hard disk drives, solid state drives (SSDs), memory, and other Can include, but is not limited to, types of electronic components and devices.

A voltage regulator can be electrically connected between a power supply and a component designated to receive a voltage lower than the voltage supplied by the power supply. For example, the power supply can supply various voltages, such as 12V, 24V, or 48VDC, to the voltage regulator. The output voltage of the voltage regulator is, for example, 3.3V, 2.5V, 1.8V, 1.0V, 0.7V, or any other designated suitable for powered electronic components and systems. Can include voltage.

Voltage regulators, including parallel-connected phase redundant regulators, can provide many advantages to various electronic systems powered by voltage regulators. For example, such a voltage regulator results from the system's reliability that the voltage regulator device can dynamically and automatically replace the failed or failed regulator phase with a redundant spare or "backup" phase. The property and robustness can be improved. The regulator phase can fail due to a failure of one or more components, such as a capacitor, FET, amplifier, or driver circuit, in the regulator phase, such as a short circuit.

The reliability of the electronic system can also be increased by reducing the number of decoupling capacitors in the phase redundant voltage regulator design. This decrease in the number of capacitors can result in a decrease in the effective failure rate of the voltage regulator. Adding one or more redundant or standby phases to a voltage regulator design reduces the overall current demand imposed on each of the multiple redundant phases contained within the voltage regulator, thereby reducing design confidence. It can also enhance sex.

By using a phase redundant voltage regulator with phases that are activated alternately in time, the output voltage ripple may be reduced and the transient response to fluctuations in the current load imposed on each phase may be improved. Multiple redundant regulator phases can be particularly helpful in managing the cost of the entire voltage regulator system. According to embodiments, the cost of a voltage regulator using multiple smaller redundant regulator phases can be significantly lower than the cost of a regulator using a smaller, larger regulator phase, each with a larger current output. There is sex.

Certain types of electronic systems can use phase redundant voltage regulators to power specific subsystems and electronic components. For example, a computer system may have five CPUs, each with a specified supply voltage requirement of 1.0V at 80A, thus generating a total power supply requirement of 1.0V at 400A in total. To. This power requirement can be supplied, for example, by eight phase redundant voltage regulators, each with a nominal current output capacity of 50 A. Similarly, an electronic system can be supplied by a four-phase redundant voltage regulator, each with a nominal current output capacity of 50A, to supply different voltage requirements to the CPU or another type of device at 200A. May have different supply voltage requirements of .25V.

Additional redundant voltage regulator phases can be added for each voltage domain or output level to ensure reliable operation of the system in the event of one or more voltage regulator failures. Following this example, the designer would install four additional redundant voltage regulators in the 1.0V power supply circuit, two additional redundant voltage regulators in the 1.25V power supply circuit, and in addition to the twelve voltage regulators described above. A total of six additional redundant voltage regulators can be incorporated.

However, the method of adding a redundant voltage regulator at each voltage level may not be particularly efficient or cost effective. Using this method can result in excessive and unnecessary costs, power consumption, system space / area, and design complexity. A more efficient method of designing a voltage regulator, i.e., reducing the number of components used, cost, power consumption, system area, and design complexity is desirable.

According to embodiments, redundant voltage regulators can be added to the voltage regulator design and assigned or shared "as needed" between various voltage domains. In this example, one or more redundant voltage regulators can be made available for either 1.0V or 1.25V power circuits, for power circuits that have suffered one or more regulator failures. It can be dynamically and electrically connected. The control logic can monitor the voltage source circuit for voltage regulator failure and re-reserve voltage regulator phase as needed to provide robust and uninterrupted power supply at all voltage levels / domains. You can instruct the assignment. In this example, three additional redundant voltage regulators can be used to meet the redundancy needs of both 1.0V or 1.25V power circuits, thus reducing the cost, area, and components of the voltage regulator design. The number and design complexity are greatly reduced. However, the voltage and current examples provided above should not be construed as limiting, but are provided solely for the purpose of illustration and clarification of embodiments of the present disclosure.

The figures herein show the interactions of certain exemplary circuits, functions, electrical interconnections, and components used to implement the embodiments of the present disclosure. These are provided as examples and should not be construed as limiting. Embodiments may also include, within the ideas and scope of the present disclosure, circuits, functions, electrical interactions, and component interactions not described or illustrated herein.

For ease of explanation and discussion, a limited number of regulator phases, regulator phase groups, and spare regulator phases are shown and discussed herein. For example, two regulator phase groups, each comprising three regulator phases with two spare regulator phases, can be used to illustrate embodiments of the present disclosure. However, this should not be construed as limiting, and within embodiments, any other number of regulator phases, regulator phase groups, and spare regulator phases can be used. According to embodiments and design practices, the number of regulator phases "N" used to meet the current requirements of the voltage domain in the electronic system can be a relatively small number, such as 1 or 2, or 20. It can be a much larger number such as the above. Any number of regulator phase groups within an electronic system can be used to meet the needs of a particular unique voltage domain. The number of spare regulator phases can be selected by the power system designer based on the expected average failure rate of the regulator phase, as well as other design criteria.

The embodiments of the present disclosure can help reduce the package size and cost of a voltage regulator as compared to a voltage regulator that does not use a shared redundant regulator phase to provide a regulated voltage level. Electronic systems configured according to embodiments of the present disclosure can be made more reliable and can reduce the cost, complexity, number of components, and mounting area of the included voltage regulator.

A phase redundant voltage regulator device with a shared redundant regulator phase, designed according to a particular embodiment, can be compatible with existing proven electronic systems and is shared redundant to the voltage source that powers the electronic system. It can be a useful and cost-effective way to add a regulator phase. The phase redundant voltage regulator device constructed according to the embodiments of the present disclosure can be installed in an existing electronic system.

The embodiments of the present disclosure are for use within an electronic system by using existing proven IC and printed circuit board (PCB) manufacturing techniques and material sets, electronic design methods, design tools, and manufacturing processes. It can be useful to implement a phase redundant voltage regulator with a shared redundant regulator phase.

FIG. 1 is a block diagram showing a phase redundant voltage regulator device 100 including a plurality of redundant voltage regulator phases 126A, 126B, and 126C. Multiple redundant regulator phases 126A, 126B, and 126C are electrically connected in parallel between the common regulator input V _IN and the common regulator output V _OUT , and each regulator phase receives an input voltage at V _IN input 136. , V _OUT Output 148 to provide an output voltage.

"N + 1" or "N + 2" voltage regulator phases can be electrically connected in parallel, where "N" represents the minimum number of phases required to supply the specified current and is added. One or two phases of can help replace one or two failed voltage regulator phases. In the event of one or more redundant phase failures or "failures", disable the failed redundant phase to share the current load between the remaining active phases and thus ensure uninterrupted power supply. can do. Redundant phases can also be used to perform "masked redundancy", which means that if a phase fails, the failure is not reported to system control function 108. In that case, the redundant phase can be used to generate a reliable regulator instead of using it as the redundant phase. This regulator phase exchange can be controlled by the MPC 122.

Each of the regulator phases 126A, 126B, and 126C includes a step-down regulator 116, an input protection device 114, an OR device 118, and a phase redundant controller 106. The phase redundancy controller 106, along with the input protection device 114, can help isolate the input of the failed step-down regulator 116 from the other phases of the device 100. The phase redundancy controller 106 can monitor the input and output currents of the regulator phase, eg 126A, as well as the output voltage, eg, controlling the input protection device 114 in response to anomalous currents or voltages in the phase. be able to. Such anomalous currents or voltages can result from failure of components such as capacitors or FETs in the buck regulator 116, such as short circuits.

The input protection device 114 can be used to provide input overcurrent protection and output overvoltage protection for each regulator phase, eg, 126A of regulator phase 1. The input protection device 114 protects 126A of regulator phase 1 by electrically insulating, i.e. disconnecting _{, the} common regulator input _VIN from the step-down regulator 116 in response to the signal generated by the phase redundancy controller 106. Can be done. Each of the regulator phases 126A, 126B, and 126C also includes an OR device 118 that can be used to limit or prevent the flow of reverse current to the VOUT output 148 of the regulator phase. Such reverse current can result from a short circuit or failure of the FET or capacitor in the regulator phase.

The MPC 122 is electrically coupled to each of the regulator phases 126A, 126B, and 126C via the detected current output 102 and control signal 124. The master controller 112 of the MPC 122 generates a control signal 124 to activate each of the regulator phases 126A, 126B, and 126C periodically and sequentially over a predetermined period of time. In some applications, this activation can be used, for example, to generate controlled current sharing between phases. The MPC 122 maintains current sharing between active regulator phases following a failure or failure of one or more of the regulator phases having one or more phases provided to allow redundancy. Can be used for. Current sharing can also be performed between multiple active regulator phases if none of the phases have previously failed.

The redundant failure reporting circuit 104 of the MPC 122 collects and reports phase failures / failures based on the plurality of detected current signals presented to the detected current outputs 102A, 102B, and 102C from their respective regulator phases. can do. The detected current signal can be used and interpreted to indicate a failure of one or more specific regulator phases. In some applications, the MPC 122 can reduce ripple and transient response times from the redundant regulator phase by staggering the respective V _OUT outputs 148 so that they are out of phase with each other. The MPC 122 is also configured to adjust the control signal 124 in response to the feedback output voltage from the common regulator output V _OUT received at the feedback input 101.

The serial control bus 120 can be used to interconnect the regulator serial interface 110 of the MPC 122 to the system control function 108. The regulator serial interface 110 can send and receive control and monitoring signals to and from the system control function 108, which can control one or more phase redundant regulator devices 100 in the electronic system. .. In an application, the system control function 108 is a hardware unit and / or software unit that can be used in an electronic system such as a computer or server to monitor and control various aspects of the system's hardware functions. Can be represented. The system control function 108 can be used within an electronic system, for example, to monitor and control functions such as power supply and voltage regulator functions, system clock frequency, cooling, and the like.

In some applications, the serial control bus 120 can be, for example, a serial peripheral interface (SPI) bus, a power management bus (PMBus), or an integrated circuit-to-integrated circuit (I ^2C ) interface. The serial control bus 120 can be used, for example, to send monitoring data indicating which regulator phase has failed or failed to the system control function 108 and receive commands and controls from the system control function 108. You can also do it.

FIG. 2 includes two block diagrams, including a diagram showing a voltage regulator phase 126 and a diagram showing a standby voltage regulator phase 227, according to an embodiment consistent with the figure. The various circuits, functions, and functional blocks shown in FIG. 2 are generally consistent with those shown in FIG. 1 and described with reference to FIG. FIG. 2 shows the switch devices 217 and 219 on a regulator phase, eg 126A of FIG. 1, to provide an expanded and more detailed depiction of these functions and to form a standby voltage regulator phase 227. , As well as the addition of the OR devices 118 and 118A can be useful. It can be seen that 126 in FIG. corresponds to a single regulator phase, eg, 126A, regulator phase 1 in FIG. The addition of multiple switch devices 217 and 219, as well as the OR devices 118 and 118A, causes the regulator output 242 of the step-down regulator 116 to have two or more outputs, such as the primary and secondary outputs 204 and 206 of the standby voltage regulator phase 227. Can be especially helpful in allowing you to selectively electrically connect to.

The voltage regulator phase 126 includes a step-down regulator 116 capable of receiving an input voltage at the regulator input 240 and driving the output voltage to the regulator output 242. The driver M1 is configured to enable and disable the FET in the buck regulator 116 in response to a control signal received at the control input 250, eg 124 in FIG. According to the embodiment, the control signal 124 can be a digital signal having a logic "0" level and a logic "1" level, respectively, of 0V and 3.3V. In some embodiments, other voltage levels can be used.

The voltage regulator phase 126 also includes an input protection device 114, an OR device 118, and a phase redundancy controller 106. The phase redundancy controller 106 includes a current detection circuit 234, an output overvoltage protection circuit 232, and an input overcurrent protection circuit 230. The input overcurrent protection circuit 230 may be electrically connected and configured to monitor the current received at the _VIN input 136, while the output overvoltage protection circuit 232 may monitor the output voltage of the regulator output 242. can. The latch 228 is part of an input overcurrent protection circuit 230 electrically connected to the output overvoltage protection circuit 232. The current detection circuit 234 can be used to monitor the output current of the regulator output 242.

The phase redundancy controller 106 can help monitor the input and output currents as well as the output voltage of the voltage regulator phase 126, thereby providing input overcurrent protection and output overvoltage protection for the voltage regulator phase 126. It is possible to control the input protection device 114 that can be used for.

The phase redundancy controller 106 can control the input protection device 114 by asserting the Q output of the latch 228 of the input overcurrent protection circuit 230. The Q output of the latch 228 is used to control the input of the gate input G of the input protection FET 238. The input protection FET 238 has a drain input D coupled to the _VIN input 136 and a source input S coupled to the regulator input 240. A control signal applied to the gate input G of the input protection FET 238 can activate or deactivate the input protection FET 238, thereby electrically connecting the _VIN input 136 and the regulator input 240 of the step-down regulator 116, respectively. Or disconnect. The control of the input protection device 114 by the phase redundancy controller 106 is the voltage regulator phase by electrically insulating the regulator input 240 from the other phases in the voltage regulator device in the event of a failure or failure of the buck regulator 116. The 126 can be useful in providing input overcurrent protection and output overvoltage protection.

In some applications, the current detection circuit 234 is an analog from 0V to 3.3V that proportionally represents the level of the detected current flowing out of the V _OUT output 148 of the voltage regulator phase 126 to the detected current output 202. A signal having a voltage level can be provided. Other analog voltage levels / ranges may be used in some applications. In embodiments, the detected current signal can serve to indicate a failure of a particular regulator phase.

The OR device 118 can be used to limit or prevent the flow of reverse current to the V _OUT output 148 of the voltage regulator phase 126, and thus can also regulate the flow of reverse current to the regulator output 242. can. Such reverse current flow can result from a short circuit or failure of the FET or capacitor in the buck regulator 116. The comparator 246 has an input electrically connected to the source terminal S and the drain terminal D of the output logical sum FET 244. The output of the comparator 246 is electrically connected to the gate terminal G of the output logical sum FET 244. The comparator 246, together with the output OR FET 244, is configured and connected to limit the flow of current to the regulator output 242 in response to a voltage at the V _OUT output 148 that is greater than the voltage at the regulator output 242. If the voltage of the V _OUT output 148 is greater than the voltage of the regulator output 242 and exhibits a reverse current flow, the comparator 246 outputs a low voltage to the gate G of the output OR FET 244 and therefore invalidates the output OR FET 244. And prevent further reverse current flow.

The phase redundancy controller 106, input protection device 114, and buck regulator 116 of the standby voltage regulator phase 227 are generally consistent with the voltage regulator phase 126 in terms of electrical interconnection and function. The standby voltage regulator phase 227 also includes output switching devices 217 and 219, which are referred to herein as "FET 217" and "FET 219" without loss of meaning for ease of description and discussion. And referenced. In embodiments, the switch devices 217 and 219 can also be NFETs, PFETs, NPN transistors, PNP transistors, or other suitable types of transistors or semiconductor devices, respectively.

The FET 217 and the FET 219 each have a gate input G electrically connected to the enable input 216 and the enable input 218, respectively. These interconnects activate the FETs 217 and 219 in response to the phase enable signals received at the enable inputs 216 and 218 of the phase redundancy controller 106, respectively, that is, the drain D and source S terminals. The conductive path between them can be enabled. Using this activation, the regulator output 242 of the buck regulator 116 is electrically connected to either the primary output 204 or the secondary output 206 via the OR device 118 and the secondary OR device 118A, respectively. be able to. In the embodiment, the primary output 204 and the secondary output 206 can be electrically connected to the common regulator output of the phase group (see FIG. 3).

The electrical configuration and function of the OR device 118 and the secondary OR device 118A of the standby voltage regulator phase 227 are consistent with the configuration and function of the OR device 118 of the voltage regulator phase 126. Similar to the OR device 118 of the voltage regulator phase 126, the OR device 118 and the secondary OR device 118A of the standby voltage regulator phase 227 are reverse to the primary output 204 and the secondary output 206 of the standby voltage regulator phase 227, respectively. It can be used to limit or prevent the flow of current, and thus the flow of reverse current to the regulator output 242 can also be regulated.

FIG. 3 is a block diagram showing a phase redundant voltage regulator device 300 having a shared redundant spare according to an embodiment that is substantially the same as the figure. FIG. 3 is particularly useful to show a phase redundant voltage regulator device consistent with FIGS. 1 and 2, including standby voltage regulator phases 227A and 227B that can be electrically assigned to phase groups 374 and 376.

Many aspects of the embodiments shown in FIG. 3 are particularly consistent with those shown in FIGS. 1 and 2 and described in the associated text and are not described further herein. These aspects include circuits, logic and control functions, functional interactions, electrical interconnections, signal usage, and signal voltage ranges.

Each element of the phase redundant voltage regulator device 300, including the control logic 366, MPC 122, voltage regulator phase, eg 126A, and standby voltage regulator phase, eg 227A, is electrically interconnected, thereby representing various types of signals. Communicate through use. These types include phase fault signals, phase enable signals, _ISHARE phase control signals, and PWM phase control signals. These signal types can help enable control logic 366 to both monitor the function and failure of the regulator phase and control and reassign the regulator phase.

The phase failure signal is, in the embodiment, used to indicate a failure or failure of a particular regulator phase within the voltage regulator device 300. The phase fault signal can be generated by the redundancy fault reporting circuit 104 in response to the detected current output 102 received from the voltage regulator phase, eg, the individual phase redundancy controller (PRC) 106 of the 126A. For example, if the detected current output 102 received by the redundant fault reporting circuit 104 is significantly higher or lower than the other detected current outputs 102, then the redundant fault reporting circuit 104 will result in a corresponding phase. Each phase failure signal can be generated. The phase fault signal can also be generated directly by the PRC106 of the spare regulator phase, eg 227A and 227B.

The phase failure signals include V ₁ failure of signal 302A, V ₂ failure of signal 302B, V ₁ N-1 failure signal 308A, V ₁ N-2 failure signal 310A, V ₂ N-1 failure signal 308B, V ₂ N. -2 The fault signal 310B, the S1 fault signal 312A, and the S2 fault signal 312B are included.

The naming convention for phase fault signals as described above is such as a spare regulator indicator corresponding to the associated common regulator output voltage, eg, "V ₁ " or "V ₂ ", spare regulator phases 227A and 227B, respectively, eg "S1". Or "S2" and include a fault "level" indicator, such as "N-1" or "N-2". The "N-1" fault level indicator indicates that the fault signal is of the "single fault" type, that is, for a particular phase group from which the fault signal is generated, in a voltage regulator within that phase group. Shows that there is only one reported failure. Similarly, the "N-2" fault level indicator indicates that the fault signal is of the "double fault" type, that is, for a particular phase group from which the fault signal originated, a voltage regulator within that phase group. Indicates that there are two reported failures. The "preliminary fault" signal, eg, the S1 fault signal 312A, can be used to indicate the fault of the spare regulator phase, eg, 227A. The various phase failure signals are used by the control logic 366 in determining how to reallocate the standby phase to provide continuous and robust voltage regulator performance in the event of one or more phase failures. Can help provide an indication of the obstacles that can be.

The phase enable signal is, in the embodiment, used to enable the output of the spare regulator phase, eg 227A, to selectively interconnect to _a common regulator output, eg V1. In embodiments, the phase enable signal is generated by control logic 366. _Phase enable signals include S1 enable V1 signal 316A, S1 enable V2 signal _318A , S2 enable V1 signal _316B , and S2 enable V2 signal _318B . The naming convention for phase fault signals as described above is the associated common regulator output voltage, eg, "V ₁ " or "V ₂ ", and the associated spare regulator indicator, eg, "S1" or "S2". including.

The PWM phase control signal is a digital signal that represents the duty cycle or activation time of at least one regulator phase by repeating a series of variable width pulses. The PWM phase control signal can be generated, for example, by a phase group, eg, 374 MPC122, as an indicator of the relative activation time of the voltage regulator within the phase group. The relative duty cycle or activation time may change over time to modulate the output of the voltage regulator to provide a particular dynamic current load.

A PWM phase control signal can also be received and used to modulate the standby voltage regulator phase in order for the reserve voltage regulator phase to operate like an active voltage regulator phase in a phase group. Therefore, the PWM phase control signal, along with the phase enable signal, can be particularly useful in replacing a failed voltage regulator phase with an active standby voltage regulator phase. The PWM phase control signal includes V ₁ PWMS1 signal 304A, V1 _PWMS2 signal 306A, V2 _PWMS1 signal 304B, V2 _PWMS2 signal 306B, S1 PWM signal 314A, and S2 PWM signal 314B.

In embodiments, the _ISHARE phase control signal is a signal that represents the amount of current provided by each regulator phase within the phase group via an analog voltage. In an embodiment, the current " _ISHARE " = I _TOTAL / N, where = I _TOTAL is the total current output of the phase group and "N" is the number of phases in the phase group. In some embodiments, the _ISHARE signals can be analog voltages in the range 0V to 3.3V, respectively. As an example, a 0V _ISHARE signal voltage can represent a 0A regulator phase current output and _a 3.3V _ISHARE signal voltage can represent a total rating, eg, the maximum regulator phase output current. Therefore, the I _SHARE voltage from 0V to 3.3V can represent the regulator phase output current linearly proportional to the respective I _SHARE voltage between 0A and the total rated regulator phase output current. In some embodiments, other scaling / control schemes and / or voltage ranges may be used.

The I _SHARE phase control signal can be generated, for example, by the MPC 122 of the phase group, eg 374, as an indicator of the current output required by each voltage regulator in the phase group. The I _SHARE phase control signal may change over time in order to modulate the output of the voltage regulator to provide a particular dynamic current load.

To make the standby voltage regulator phase behave like an active voltage regulator phase in a phase group, the _ISHARE phase control signal can also be received and used to modulate the standby voltage regulator phase. Therefore, the _ISHARE phase control signal, along with the phase enable signal, can be particularly useful in replacing a failed voltage regulator phase with an active standby voltage regulator phase. The I _SHARE phase control signals include V ₁ I _SHARE S1 signal 304A, V ₁ I _SHARE S2 signal 306A, V ₂ I _SHARE S1 signal 304B, V ₂ I _SHARE S2 signal 306B, S1 I _{SHARE signal 314A, and S2I SHARE signal} 314. Is included.

According to embodiments, the phase fault signal, phase enable signal, _ISHARE phase control signal and PWM phase control signal are all digital signals having a logic "0" level and a logic "1" level of 0V and 3.3V, respectively. can do. In some embodiments, other voltage levels can be used. In FIG. 3, the above-mentioned signal is shown as a line with an arrow, the end of the signal line with an arrow indicates the destination of a specific signal, and the opposite end indicates the source of the signal. Can be understood.

The phase redundant voltage regulator device 300 includes phase groups 374 and 376, each comprising a plurality of voltage regulator phases 126A, 126B, and 126C, including an interconnected MPC 122. The voltage regulator device 300 also includes spare regulator phases 227A and 227B, each of which includes output switching devices 217 and 219 and OR devices 118 and 118A, respectively. The control logic 366, including the non-volatile memory 368 and the regulator serial interface 110, is electrically connected to each of the voltage regulator phase, the standby voltage regulator phase, and the MPC.

Consistent with FIG. ₁ , each phase group 374 and 376 includes a plurality of redundant voltage regulator phases 126A, 126B, and 126C, these redundant voltage regulator _phases to the common regulator outputs V1 and V2. It can help provide phase redundancy in each of the power supplies. The V _OUT output 148 of each phase in the phase group is connected to a common regulator output, eg V ₁ . For ease of explanation and discussion, the phase redundant voltage regulator device 300 includes two output voltage levels, ie, common regulator outputs V ₁ and V ₂ , _and two standby regulator phases 227A and 227B. However, in embodiments, any number of voltage levels and the number of spare regulator phases can be specified for a particular electronic system.

The MPC 122 of each phase group is electrically coupled to each regulator phase of the phase group, such as 126A, 126B, and 126C. The MPC 122 transfers the phase fault signal and either the pulse width modulation (PWM) phase control signal or the shared current ( _ISHARE ) phase control signal received from each regulator phase of each phase group to the control logic 366. It is configured in. The MPC 122 is also configured to generate a PWM control signal or an _ISHARE control signal that can be used to sequentially activate each regulator phase of a phase group for a predetermined period of time, which is within the phase group. Can help manage controlled current sharing between phases.

Each spare regulator phase 227A and 227B includes output switching devices 217 and 219, as well as OR devices 118 and 118A, which connect the spare regulator _phases 227A and 227B to the common regulator outputs V1 and _/ or V2. Can be especially helpful in connecting. According to embodiments, the output switching devices 217 and 219 can be activated, thus connecting the regulator output 242 of the step-down regulator 116 to a spare regulator phase, eg, 227A primary output 204 or secondary output 206. Can be done. This activation can occur, for example, in response to receiving the _phase S1 enable V1 signal 316A or the S1 enable V2 signal _318A , respectively, for the spare regulator phase 227A. These phase enable signals are received by the phase redundancy controller 106 and supplied to the output switching devices 217 and 219, respectively (see FIG. 2 for details).

The control logic 366 is electrically connected to the respective MPCs 122 of the phase groups 374 and 376. The control logic 366 is configured to receive a phase control signal from the MPC and exchange a phase fault signal with the MPC. The control logic 366 is also configured to be electrically connected to the spare regulator phase, assert the phase enable signal, transfer the phase control signal to the spare regulator phase, and receive the phase fault signal from the spare regulator phase. There is. For example, the S1 enable V2 signal _318A can be asserted by the control logic 366 to enable the _secondary output 206 (V2 output) of the spare regulator phase 227A. The control logic 366 also receives a PWM phase control signal or an I _SHARE phase control signal, eg, a V ₁ PWM S1 (or V ₁ I _SHARE S1) signal 304A or a V ₁ PWM S2 (or V ₁ I _SHARE S2) signal 306A, respectively. It can be transferred to the S1PWM or S1I _SHARE signal 314A via the connection 380 or the connection 382. The control logic 366 can also receive a phase fault signal, eg, _a V1 N-2 fault signal 310A, from the spare regulator phase.

The control logic 366 monitors the failure of the voltage regulator phase, enables or disables various phases in response to the detection of the failed regulator phase, and sends a PWM control signal or I _SHARE control signal to the activated phase. Can be especially helpful in supplying. According to embodiments, the PWM control signal or _ISHARE control signal received from _the phase group can be transferred to the spare regulator phase by the control logic 366, which coincides the spare regulator phase with the active regulator phase of the phase group. Can help drive at a level that does. Further examples of the functions performed by the control logic 366 are further detailed in FIG. 4 and the associated text.

In an embodiment, the control logic 366 may include a non-volatile memory 368, the non-volatile memory comprising an activated spare regulator phase and a phase group having one or more faulty regulator phases. It can be used to remember the association between. According to embodiments, the control logic 366 can be a microcontroller, a custom integrated circuit (IC), a programmable logic device (PLD), an application specific integrated circuit (ASIC), and the like. The non-volatile memory 368 can be a flash memory, an electrically erasable programmable read-only memory (EEPROM), or any other type of memory device that does not lose data when the power supply voltage is removed.

Embodiments of the present disclosure reduce the package size and cost of a voltage regulator as compared to a voltage regulator device that uses a dedicated voltage regulator phase to achieve a reliable and robust power supply. Can be useful. These benefits are obtained by using a shared standby voltage regulator phase instead of a redundant voltage regulator phase dedicated to the voltage level.

In some embodiments, the common regulator input V _IN as shown in FIG. 3 is connected to the V _IN inputs 136 of all phase groups 374 and 376, as well as the V _IN inputs 136 of all spare regulator phases 227A and 227B. be able to. In some embodiments, different common regulator inputs can be connected to _VIN input 136 and used to provide a unique voltage for each phase group and spare regulator phase. According to embodiments, the respective V _OUT outputs 148 of the phase groups, eg, regulator phases 126A, 126B, and 126C in 374, are all connected to the same common regulator output, eg V ₁ . In embodiments, the primary and secondary outputs 204 and 206 of the spare regulator phases 227A and 227B are both enabled signals asserted by the control logic 366 to the spare regulator phases _227A and 227B, eg, the S1 enable V1 signal 316A. Alternatively, in response to the S1 enable V2 signal _318A , it can be selectively connected to either the common regulator _{output V1} or the common regulator output V2.

According to embodiments, "N + 1" or "N + 2" voltage regulator phases can be electrically connected in parallel, where "N" is the minimum required to supply the specified current. And an additional one or two phases can help replace one or two failed regulator phases. In the event of one or more redundant phase failures or "failures", the failed redundant phase can be disabled to share the current load and ensure that the power supply is uninterrupted.

FIG. 3 shows a phase redundant voltage regulator that does not have a current sharing circuit between the voltage regulator phases 126A, 126B, and 126C. However, embodiments are contemplated in which current sharing is maintained between the voltage regulator phases 126A, 126B, and 126C. In some such embodiments, independent current throttle points are mounted within each regulator phase 126A, 126B, and 126C so that one or more voltage regulator phases operate at their current output limits. Allow other voltage regulator phases to provide the additional current needed to meet the total current load. This embodiment can allow for simplified current sharing, which allows a particular voltage regulator phase to operate at full current load, while the additional voltage regulator phase has a lower current. It can be operated at the level. In some embodiments, passive or "hanging" sharing can be performed, where current sharing results from the phase redundant regulator output voltage hanging below a specified reference voltage, in response. Various regulator phases electrically connected to that output can boost their current output. This allows load sharing between regulators. In some embodiments, active or "forced" current sharing can be performed by using additional current monitoring, control, and feedback loops.

FIG. 4 is a flow diagram illustrating a method 400 for sharing a set of redundant spare regulator phases between groups of regulator phases within a phase redundant voltage regulator device, according to an embodiment consistent with the figure. The phase redundant voltage regulator device includes a plurality of spare regulator phases, such as 227A in FIG. 3, and is consistent with the phase redundant voltage regulators and devices illustrated and described with reference to FIGS. 1-3. Method 400 is generally performed by using the control logic 366 of FIG. 3, which is electrically such as to monitor phase fault signals received from a phase group, eg, phase groups 374 and 376 of FIG. Connected to and configured to.

The execution of method 400 can increase the reliability of the power supply to the electronic system by using the shared redundant regulator phase controlled and assigned by the control logic. When used with a phase redundant voltage regulator device in an electronic system, Method 400 can also substantially reduce the cost, packing area, design complexity, and failure rate of the voltage regulator by using a shared redundant regulator phase. can. Such improvements can correspondingly lead to an overall reduction in the cost, complexity, and failure rate of electronic systems. The method depicted and described with reference to FIG. 4 is largely consistent with the phase redundant voltage regulators and devices with shared redundancy reserves described and described with reference to FIGS. 1-3.

The operating state of the system at start 402 does not include voltage regulator phase failure, both _phase groups 374 and 376 are operating normally, and "N" _phases are attached to the common regulator outputs V1 and V2. It is used to supply current to each of the applied loads. Method 400 proceeds from start 402 to operation 404.

Operation 404 generally refers to detecting the first phase failure. Using the control logic 366 of FIG. 3, "N-1" phase single point of failure signals such as those produced by the redundant fault reporting circuit 104 of each MPC 122, eg, V1 N _{- 1} fault signals 308A and V2. Monitor the N-1 failure signal 308B. The control logic 366 determines from which phase group the phase single point of failure signal originates. As an example, a first phase failure can be detected in phase group 374. When the first phase failure is detected, method 400 proceeds to operation 406.

Operation 406 generally refers to asserting a phase enable signal that electrically couples the output of the first available spare regulator phase to the common regulator output of the phase group with the first phase failure. In this example, the standby voltage regulator phase 227A of FIG. 3 is the first available spare regulator phase. Therefore, the control logic 366 of FIG. 3 can assert the S1 enable V1 signal 316A to the spare regulator _phase 227A, thereby electrically connecting its _primary output 204 to the common regulator output V1 of the phase group 374. It will be possible. According to embodiments, the first spare regulator phase is configured to use a _phase enable signal to output either the voltage present at the common regulator _output V1 or the voltage present at the common regulator output V2. can do. When the phase enable signal is asserted, method 400 proceeds to operation 408.

Operation 408 generally refers to transferring a PWM phase control signal or an _ISHARE phase control signal to a first spare regulator phase. In an embodiment, the transferred phase control signal is received from a phase group that produces a phase single point of failure signal, in this example phase group 374. The phase control signal is generated by the MPC 122 of the phase group 374. In this example, the phase control signal received by the control logic 366 is the V1 _ISHARE S1 or V1 _PWMS1 signal 304A, which is then transferred to the spare regulator phase 227A as the _{S1I SHARE or} S1 PWM signal 314A. To. This phase control signal is then used to modulate the output of the spare regulator phase 227A consistently with the output of the active voltage regulator phase of phase group 374. When the phase control signal is transmitted to the first spare regulator phase, method 400 proceeds to operation 410.

Operation 410 generally refers to electrically connecting the phase failure signal from the first spare regulator phase to the MPCs of the first phase group. In this example, the S1 fault signal 312A is electrically connected by the control logic 366 to the V1 fault of the signal 302A of the MPC 122 of the _phase group 374. The MPC 122 can monitor the fault of the assigned standby voltage regulator phase 227A and transmit the fault to the control logic 366. When the phase fault signal is connected, method 400 proceeds to operation 412.

Operation 412 generally refers to discontinuing monitoring of the phase single point of failure signal. When the phase single point of failure signal is detected from the phase group 374 of FIG. 3, the control logic 366 of FIG. 3 stops monitoring the phase single point of failure signal. When the monitoring of the phase single point of failure signal is stopped, method 400 proceeds to operation 414.

Operation 414 generally stores the association between the first used spare regulator phase and the common regulator output of the first phase group in a non-volatile memory within the control logic, eg, 368 of FIG. Point to. In this example, the association includes information about a phase group, i.e. "phase group 374" or common regulator output V1, and _a spare, i.e., spare regulator phase 227A. This information is stored in the non-volatile memory 368 and can be useful in maintaining _a link to the common regulator output V1 of the spare regulator phase 227A in the event of a power failure. Upon restart of the voltage regulator following a power failure, the control logic 366 can reinitialize the electrical connection of the spare regulator phase _227A to the common regulator output V1. Once the association is stored, method 400 proceeds to operation 416.

Operation 416 generally refers to detecting an additional phase failure. In embodiments, the additional phase failure can be indicated by a phase single point of failure signal, a phase double failure signal, or a preliminary phase failure signal. Each of these types of phase fault signals, such as those produced by the redundant fault reporting circuit 104 of each MPC 122 and by the spare regulator phase, eg, the phase redundant controller 106 of 227A, using the control logic 366 of FIG. To monitor. The control logic 366 determines from which supplemental voltage regulator phase group or standby voltage regulator the additional phase fault signal originated. According to embodiments, the supplementary phase group can be either a first phase group or a second phase group. As an example, additional phase single points of failure can be detected in phase group 376. If an additional phase failure is detected, method 400 proceeds to operation 418.

Operation 418 generally refers to asserting a phase enable signal that electrically couples the output of a second available spare regulator phase to the common regulator output of a group of phases with additional phase failure. In this example, the standby voltage regulator phase 227B of FIG. 3 is the second available spare regulator phase. Therefore, the control logic 366 of FIG. 3 can assert the S2 enable V2 signal _318B to the spare regulator phase 227B, thereby electrically connecting the _secondary output 206 to the common regulator output V2 of the phase group 376. can. According to embodiments, the second spare regulator phase is configured to use a _phase enable signal to output either the voltage present at the common regulator _output V1 or the voltage present at the common regulator output V2. be able to. When the phase enable signal is asserted, method 400 proceeds to operation 420.

Operation 420 generally refers to transferring a PWM phase control signal or an _ISHARE phase control signal to a second spare regulator phase. In an embodiment, the transferred phase control signal is received from a phase group that produces an additional phase fault signal, in this example phase group 376. The phase control signal is generated by the MPC 122 of the phase group 376. In this example, the phase control signal received by the control logic 366 is the V2 _PWMS2 or V2 _{I SHARE} S2 signal 306B, which is then transferred to the spare regulator phase 227B as the S2 PWM or S2I _SHARE signal 314B. To. This phase control signal is then used to modulate the output of the spare regulator phase 227B consistently with the output of the active voltage regulator phase of phase group 376. When the phase control signal is transmitted, method 400 proceeds to operation 422.

Operation 422 generally refers to electrically connecting the phase failure signal from the second spare regulator phase to the MPC of the complementary phase group. _In this example, the S2 fault signal 312B is electrically connected by the control logic 366 to the V2 fault of signal 302B of the MPC 122 of the phase group 376. The MPC 122 can monitor the fault of the assigned standby voltage regulator phase 227B and transmit the fault to the control logic 366. When the phase fault signal is electrically connected, method 400 proceeds to operation 424.

Operation 424 generally refers to discontinuing monitoring of additional phase fault signals. When an additional phase fault signal is detected from the phase group 376, the control logic 366 discontinues monitoring of the additional phase fault signal. When the monitoring of the additional phase fault signal is discontinued, method 400 proceeds to operation 426.

Operation 426 generally stores the association between the second used spare regulator phase and the common regulator output of the additional phase group in a non-volatile memory in the control logic 366 of FIG. 3, eg, 368 of FIG. Refers to doing. In this example, the association includes information about a phase group, i.e. "phase group 376" or common regulator output V ₂ , and a spare, i.e., spare regulator phase 227B. This information is stored in the non-volatile memory 368 of FIG. 3 and can be useful in maintaining a link to the common regulator _output V2 of the spare regulator phase 227B in the event of a power failure. Upon system restart following a power failure, the control logic 366 can reinitialize the electrical connection of the spare regulator phase 227B to the common regulator _output V2. Once the association is stored in the non-volatile memory, method 400 proceeds to operation 428.

Operation 428 generally refers to sending a system notification requesting a regulator replacement operation. This notification was initiated in response to the fact that both the spare regulator phases 227A and 227B were used, i.e., electrically coupled to the common regulator output of the phase group, and the voltage regulator phase further failed. There are no additional spare regulator phases available in case. The system notification requesting the regulator replacement operation can be, for example, an email message, a text message, a system console message, or a voicemail message. When the system notification is sent, method 400 ends at block 430.

The above method comprises an "N + 2" voltage regulator phase configuration, i.e., two available standby voltage regulators that can be used in the event of failure of one or more voltage regulators in a particular phase group. Can be understood to be suitable for. Other similar methods within the ideas and scope of the present disclosure can be used for voltage regulator devices with different numbers of available reserve voltage regulators, such as 1, 3, 4.

According to embodiments, the current supply capacity of each regulator phase within a phase group is specified to result in the supply of the specified cumulative output current of the phase group following the failure of one regulator phase within the phase group. Can be done. In some embodiments, the per-phase current supply capacity of each regulator phase in the phase group provides the specified cumulative output current of the phase group following the failure of at least two regulator phases in the phase group. Can be made possible.

The description of the various embodiments of the present disclosure has been presented for illustrative purposes, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and ideas of the embodiments described. The terminology used herein is to explain the principles of the embodiment, the actual application or technical improvement to the techniques found on the market, or to those skilled in the art to understand the embodiments disclosed herein. Selected to be able to.

Claims (20)

With multiple regulator phases, each containing a regulator electrically coupled to receive the input voltage at the regulator input and provide the respective output voltage at the regulator output.
A set of the plurality of regulator phase phase groups, including the first and second phase groups, wherein each phase group is:
A common regulator input electrically interconnected to the regulator input of the regulator in the phase group,
A common regulator output electrically interconnected to the regulator output of the regulator in the phase group,
At least one redundant regulator phase,
A polyphase controller (MPC) electrically coupled to each regulator phase in the phase group, which includes a phase fault signal, a pulse width modulation (PWM) phase control signal received from each regulator phase in each phase group, and a pulse width modulation (PWM) phase control signal. The multiphase controller (MPC), configured to transfer one of the shared current ( _ISHARE ) phase control signals to the control logic.
including,
With the set of phase groups
A set of spare regulator phases of the plurality of regulator phases, including the first and second spare regulator phases, each of which is a spare regulator phase.
A secondary output OR device, electrically coupled and configured to limit the flow of current to the secondary output of the spare regulator phase.
A first output switching device configured to electrically couple the regulator output of the spare regulator phase to the first common regulator output in response to the first phase enable signal, and a second phase. A second output switching device configured to electrically couple the regulator output of the spare regulator phase to the second common regulator output in response to an enable signal.
including,
With the set of spare regulator phases,
It ’s control logic,
It is electrically connected to the MPC of each phase group of the set of the phase groups, is configured to receive the phase control signal from the MPC and exchange phase fault signals with the MPC.
Electrically connected to the spare regulator phase of the set of spare regulator phases, the phase enable signal is asserted, the phase control signal is transferred to the spare regulator phase, and a phase failure signal is received from the spare regulator phase. Consists of
In response to receiving a phase fault signal from the MPC, the spare regulator phase is configured to electrically interconnect the phase group containing the failed regulator phase.
With the control logic
A phase redundant voltage regulator device. Each regulator phase of the plurality of regulator phases
With a phase redundancy controller (PRC) configured to monitor the current at the regulator input and further configured to monitor the current and voltage at the regulator output.
An output OR device configured to limit the flow of current to the primary output of each regulator phase,
An input protection device configured to provide input overcurrent protection and output overvoltage protection to each of the regulator phases in response to a control signal from the PRC.
The phase redundant voltage regulator device according to claim 1, further comprising. The MPC of each phase group
The feedback output voltage is received from each regulator phase of the phase group, and each detected current signal is received.
A PWM control signal or an _ISHARE control signal that manages controlled current sharing between the phases is generated to sequentially activate each regulator phase of the phase group for a predetermined period of time.
Following the failure of one or more regulator phases in the phase group, the current sharing between all active regulator phases in the phase group is maintained.
The phase redundant voltage regulator device according to claim 1, further configured as described above. The phase redundant voltage regulator device according to claim 1, wherein each control signal is a digital signal representing the duty cycle / activation time of at least one regulator phase by a series of pulse widths. A claim, wherein the output logic sum device and the secondary output logic sum device are selected from the group consisting of an N-channel field effect transistor (NFET), a P-channel field effect transistor (PFET), an NPN transistor, and a PNP transistor, respectively. The phase redundant voltage regulator device according to 1. The MPC's regulator serial interface is system controlled via a serial control bus selected from the group consisting of a serial peripheral interface (SPI) interface, a power management bus (PMBus) interface, and an integrated circuit-to-integrated circuit ( ^IC2C ) interface. The phase redundant voltage regulator device according to claim 1, which is coupled to a function. The phase redundant voltage regulator device according to claim 1, wherein the first phase group of the set of the phase groups is configured to maintain current sharing. With multiple regulator phases, each containing a regulator electrically coupled to receive the input voltage at the regulator input and provide the respective output voltage at the regulator output.
A set of the plurality of regulator phase phase groups, including the first and second phase groups, wherein each phase group is:
A common regulator input electrically interconnected to the regulator input of the regulator in the phase group,
A common regulator output electrically interconnected to the regulator output of the regulator in the phase group,
A multiphase controller (MPC) electrically coupled to at least one redundant regulator phase and each regulator phase in the phase group, with a phase fault signal and pulse width received from each regulator phase in each phase group. The polyphase controller (MPC), configured to transfer one of a modulation (PWM) phase control signal and a shared current ( _ISHARE ) phase control signal to a control logic.
including,
With the set of phase groups
A set of spare regulator phases of the plurality of regulator phases, including the first and second spare regulator phases, each of which is a spare regulator phase.
A secondary output logical sum field effect transistor (FET) electrically coupled between the regulator output and the secondary output of the spare regulator,
A second comparator having an input electrically connected to the source terminal and the drain terminal of the secondary output logical sum FET, and further adding an output electrically connected to the gate terminal of the secondary output logical sum FET. The second comparator, which has and is configured to limit the flow of current of the spare regulator phase to the secondary output together with the secondary output OR FET.
A first output switching FET, electrically connected and configured to electrically couple the regulator output of the spare regulator phase to the first common regulator output in response to the first phase enable signal.
A second output switching FET, connected and configured to electrically couple the regulator output of the spare regulator phase to the second common regulator output in response to the second phase enable signal.
including,
With the set of spare regulator phases,
It ’s control logic,
It is electrically connected to the MPC of each phase group of the set of the phase groups, is configured to receive a phase control signal from the MPC and exchange a phase fault signal with the MPC.
Electrically connected to the spare regulator phase of the set of spare regulator phases, the phase enable signal is asserted to transfer the phase control signal to the spare regulator phase and receive a phase fault signal from the spare regulator phase. Configured,
In response to receiving a phase fault signal from the MPC, the spare regulator phase is configured to electrically interconnect the phase group containing the failed regulator phase.
With the control logic
A phase redundant voltage regulator device. Each regulator phase of the plurality of regulator phases
With a phase redundancy controller (PRC) configured to monitor the current at the regulator input and further configured to monitor the current and voltage at the regulator output.
An output logical sum FET electrically coupled between the primary output of the regulator and the common regulator output,
The first comparator having an input electrically connected to the source terminal and the drain terminal of the output disjunction FET, further having an output electrically connected to the gate terminal of the output disjunction FET. Along with the output OR FET, the first comparator configured to limit the flow of current to the primary output of each regulator phase.
An input protection FET coupled between the common regulator input and the regulator input of the regulator,
A latch having an output electrically connected to the gate terminal of the input protection FET, configured to provide input overcurrent protection and output overvoltage protection to each of the regulator phases along with the input protection FET. , The latch and
8. The phase redundant voltage regulator device according to claim 8. The MPC of each phase group
The feedback output voltage is received from each regulator phase of the phase group, and each detected current signal is received.
A PWM control signal or an _ISHARE control signal that manages controlled current sharing between the phases is generated to sequentially activate each regulator phase of the phase group for a predetermined period of time.
Following the failure of one or more regulator phases in the phase group, the current sharing between all active regulator phases in the phase group is maintained.
The phase redundant voltage regulator device according to claim 9, further configured as described above. The phase redundant voltage regulator device according to claim 8, wherein each control signal is a digital signal representing the duty cycle / activation time of at least one regulator phase by a series of pulse widths. The MPC's regulator serial interface is system controlled via a serial control bus selected from the group consisting of a serial peripheral interface (SPI) interface, a power management bus (PMBus) interface, and an integrated circuit-to-integrated circuit ( ^IC2C ) interface. The phase redundant voltage regulator device according to claim 8, which is coupled to a function. The phase redundant voltage regulator device of claim 8, wherein the first phase group of the set of phase groups is configured to maintain current sharing. A method of sharing a set of redundant spare regulator phases between phase groups of regulator phases, in response to monitoring of phase failure signals received from said phase group.
In response to the detection of a single failure signal for a phase from the first phase group, the output of the first spare regulator phase is transferred to the first spare regulator phase of the set of redundant spare regulator phases. Assert a phase enable signal that electrically couples to the group's common regulator output and
One of the pulse width modulation (PWM) phase control signal and the shared current ( _ISHARE ) phase control signal received from the polyphase controller (MPC) of the first phase group is set in the first spare regulator phase. Send and
The phase failure signal from the first spare regulator phase is electrically connected to the MPC in the first phase group.
In response to the detection of the phase single point of failure signal from the first phase group, monitoring of the phase single point of failure signal is stopped.
The non-volatile memory in the control logic stores the association between the first spare regulator phase and the common regulator output of the first phase group.
To the second spare regulator phase of the set of redundant spare regulator phases, in response to the detection of an additional phase failure signal from the supplementary phase group, the output of the second spare regulator phase of the supplementary phase group. Assert a phase enable signal that electrically couples to the common regulator output and
The phase control signal received from the MPC of the supplementary phase group is transmitted to the second spare regulator phase.
The phase failure signal from the second spare regulator phase is electrically connected to the MPC in the supplementary phase group.
In response to the detection of the additional phase fault signal from the supplementary phase group, monitoring of the additional phase fault signal is discontinued.
The non-volatile memory stores the association between the second spare regulator phase and the common regulator output of the supplementary phase group.
In response to the output of all the redundant spare regulator phases electrically coupled to the common regulator output of the phase group, a system notification requesting a regulator replacement operation is sent.
A method that involves using control logic that is configured to be. 14. The method of claim 14, wherein the supplemental phase group is selected from a group consisting of a first phase group and a second phase group. Claimed that the current supply capacity of each regulator phase in a phase group is specified to result in the supply of the specified cumulative output current of said phase group following the failure of one regulator phase in the phase group. 14. The method according to 14. The current supply capacity of each regulator phase in a phase group is specified to provide the specified cumulative output current supply for the phase group following the failure of at least two regulator phases in the phase group. Item 14. The method according to item 14. 14. The method of claim 14, wherein the first spare regulator phase is configured to output a voltage selected from the group consisting of a first voltage and a second voltage. 14. The method of claim 14, wherein the additional phase fault signal is selected from the group consisting of a single fault signal, a double fault signal, and a preliminary fault signal. 14. The method of claim 14, wherein the system notification requesting a regulator replacement operation is selected from the group consisting of email messages, text messages, console messages, and voice mail messages.

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