JP2022186866A - game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suitably execute processing in control means.

SOLUTION: In setting change processing, a set value to be selected is changed each time when a pressing operation of a reset button is started. The pressing operation of a reset button is monitored periodically, data stored in a reset present state storage area are shifted to a reset previous storage area when the monitoring is performed, and current monitoring result data are stored in the reset present state storage area. Contents of the reset previous storage area are non-operation data, and it is determined that the pressing operation of the reset button is started when contents of the reset current storage area are data for generating operation. In this case, before execution of first determination regarding whether or not the pressing operation of the reset button is started when starting setting change processing, the monitoring is executed twice and monitoring result information of the reset button is stored in each area in the above.

SELECTED DRAWING: Figure 9

COPYRIGHT: (C)2023,JPO&INPIT

Description

The present invention relates to gaming machines.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to a winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player (see Patent Document 1, for example).

JP 2014-045989 A

Here, in gaming machines such as those exemplified above, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a gaming machine capable of suitably executing processing in a control means.

In order to solve the above problems, the invention according to claim 1 provides special setting means for setting a special execution situation based on the fact that a special execution opportunity has occurred;
information updating means for updating the contents of special information stored in a special storage area based on the fact that the operation of the predetermined operating means is specified in the special execution situation;
with
The special information is not updated by the information updating means by the operation of the predetermined operation means when the special execution situation occurs while the operation of the predetermined operation means is continued. and

According to the present invention, it is possible to preferably execute the processing in the control means.

1 is a front view of a slot machine according to a first embodiment; FIG. 1 is a perspective view of a slot machine showing a state in which a front door is opened; FIG. It is a front view of a housing|casing. It is a figure which shows the pattern arrangement|sequence of each reel. FIG. 10 is an explanatory diagram showing the relationship between a pattern and a combination line that can be visually recognized through the display window; FIG. 10 is an explanatory diagram showing the relationship between the winning mode and the privilege to be given; (a) It is a front view of a common display area, (b) It is explanatory drawing for demonstrating the content of the information corresponding to the stop order displayed on a combined display part. 10A and 10B are explanatory diagrams for explaining the relationship between the notification content of the stop order on the image display device and the display content of the stop order on the combined display unit; FIG. 1 is an electrical configuration diagram of a slot machine; FIG. 4 is a flowchart showing main processing executed by the main MPU; FIG. 4 is an explanatory diagram for explaining a signal path of a power failure signal; (a) to (e) are time charts showing how the process waits until the power failure signal becomes HI level when the main process is started. It is a flowchart which shows the process for power failures performed by main side MPU. (a) to (d) are time charts showing how an information abnormality flag is used to specify that an information abnormality has occurred in the main RAM. 7 is a flowchart showing setting change processing executed by the main MPU; FIG. 4 is an explanatory diagram for explaining the contents of a storage area of a main RAM; (a) to (h) are time charts showing how main-side RAM clear processing is executed in setting change processing. FIG. 11 is a flowchart showing setting change execution processing executed by the main MPU; FIG. 4 is a flowchart showing timer interrupt processing executed by the main MPU; (a) It is a flowchart which shows the sensor monitoring process performed by main-side MPU, (b) It is explanatory drawing for demonstrating the content of the storage area provided in main-side RAM. (a) to (k) When the supply of operating power is started while the reset button is being pressed, the setting value to be selected may be changed by the pressing operation of the maintained reset button. It is a time chart which shows a state without. It is a flowchart which shows the monitoring process of the door opening sensor performed by main side MPU. It is a flowchart which shows the process for alerting|reporting performed by main side MPU. (a) to (i) are time charts showing how various notifications are executed when supply of operating power is started and setting change processing is executed. 4 is a flowchart showing normal processing executed by the main MPU; It is a flowchart which shows the start waiting process performed by main side MPU. FIG. 10 is a flowchart showing bet handling processing executed by the main MPU; FIG. FIG. 10 is a flow chart showing control processing of a bet display unit executed by the main MPU; FIG. FIG. 4 is an explanatory diagram for explaining contents of an index value; FIG. 10 is an explanatory diagram for explaining the relationship between the order in which the reels are stopped and the winning mode to be established; (a) It is an explanatory diagram for explaining the contents of data in the main ROM for performing the lottery process for the winning combination, and (b) is an explanatory diagram for explaining the contents of the storage area of the main RAM for performing the lottery process for the winning combination. It is an explanatory diagram for. It is an explanatory diagram for explaining the contents of the combination lottery table group. (a) is an explanatory diagram for explaining the data group for IV=1, (b) is an explanatory diagram for explaining the data group for IV=16, and (c) is an explanatory diagram for explaining the data group for IV=17. It is an explanatory diagram for. FIG. 11 is a flow chart showing a lottery process for a winning combination executed by the main MPU; FIG. FIG. 10 is a flowchart showing determination value acquisition processing executed by the main MPU; FIG. FIG. 10 is a flowchart showing PV acquisition processing executed by the main MPU; FIG. FIG. 10 is a flow chart showing winning data acquisition processing executed by the main MPU; FIG. 4 is a flowchart showing reel control processing executed by the main MPU; FIG. 10 is a flow chart showing a corresponding process at the end of a game, which is executed by the main MPU; FIG. It is an explanatory diagram for explaining the game state and the game section that exist in the slot machine. (a) An explanatory diagram for explaining the first section and the second section, and (b) an explanatory diagram for explaining the contents of each game state in the second section. (a) An explanatory diagram for explaining the first CB combination and the second CB combination, and (b) an explanatory diagram for explaining the first CB state and the second CB state. It is a flowchart which shows the 1st control processing of the game area performed by main side MPU. It is a flowchart which shows the 2nd control processing of the game area performed by main side MPU. FIG. 10 is a flowchart showing ending handling processing executed by the main MPU; FIG. FIG. 10 is a flowchart showing advantageous lottery processing at the start of a game, which is executed by the main MPU; FIG. It is a flowchart which shows the normal process performed by main side MPU. (a) An explanatory diagram for explaining the selection probability of the number-of-games mode, and (b) an explanatory diagram for explaining the selection probability of the win rate mode. (a) is an explanatory diagram for explaining a latch area, (b) is an explanatory diagram for explaining an example of a second random number stored in the latch area, and (c) is an explanatory diagram for explaining an example of an upper byte. (d) is an explanatory diagram for explaining an example of a 7-bit random number. FIG. 11 is a flow chart showing a second start setting process executed by the main MPU; FIG. (a) An explanatory diagram for explaining a number-of-games mode lottery table, and (b) an explanatory diagram for explaining a win-rate mode lottery table. FIG. 10 is a flowchart showing LV acquisition processing executed by the main MPU; FIG. FIG. 10 is a flow chart showing freeze setting processing at the time of transition to bonus, which is executed by the main MPU; FIG. (a) to (e) are time charts showing how a freeze period is set. FIG. 10 is a flow chart showing advantageous state processing at the start of a game, which is executed by the main MPU; FIG. FIG. 10 is a flow chart showing a pseudo-bonus process executed by the main MPU; FIG. FIG. 10 is a flow chart showing a clearing process executed by the main MPU at the end of the bonus; FIG. (a) to (e) are time charts showing execution timings of various processes when the pseudo-bonus state ends. FIG. 10 is a flowchart showing AT state processing at the start of a game executed by the main MPU; FIG. FIG. 10 is a flowchart showing AT processing executed by the main MPU; FIG. It is a flowchart which shows the external output setting process performed by main side MPU. 4 is a flowchart showing external output processing executed by the main MPU; (a) to (h) are time charts showing how the output modes of the first external signal and the second external signal are appropriately changed. FIG. 11 is an explanatory diagram for explaining an electrical configuration of a main MPU in the second embodiment; FIG. 4A and 4B are explanatory diagrams for explaining the states of jump status flags when a predetermined storage area is cleared to "0" by a CLR execution circuit; FIG. 4A and 4B are explanatory diagrams for explaining the states of jump status flags when the value of a specific storage area is decremented by 1 by the DEC execution circuit; FIG. (a) is an explanatory diagram for explaining the data configuration of a JR instruction; (b) is an explanatory diagram for explaining the data configuration of a JRS instruction; FIG. 10 is an explanatory diagram for explaining an example of the contents of a program in which both a JR instruction and a JRS instruction are executed as JP instructions; 13A to 13C are explanatory diagrams for explaining a stack area provided in the main RAM in the third embodiment; FIG. FIG. 10 is a flowchart showing advantageous lottery processing at the start of a game, which is executed by the main MPU; FIG. FIG. 10 is a flow chart showing advantageous state processing at the start of a game, which is executed by the main MPU; FIG. FIG. 10 is a flowchart showing AT state processing at the start of a game executed by the main MPU; FIG. FIG. 10 is a flowchart showing ending determination processing executed by the main MPU; FIG. 9 is a flowchart showing an ending determination process of a comparative example; FIG. 11 is a flow chart showing advantageous state processing at the start of a game in a comparative example; FIG. FIG. 14 is a flowchart showing wait period calculation processing executed by the main MPU in the fourth embodiment; FIG. FIG. 8A to FIG. 8C are explanatory diagrams for explaining the content of subtraction processing of a weight counter; FIG. 10 is a flow chart showing medal monitoring processing executed by the main MPU; FIG. (a) to (c) are explanatory diagrams for explaining the content of addition processing of the monitoring period counter, and (d) content of a comparative example in which the addition processing of the monitoring period counter is executed without executing the "SBC" instruction; It is an explanatory view for explaining. FIG. 16 is a flowchart showing wait period calculation processing executed by the main MPU in the fifth embodiment; FIG. 10A and 10B are explanatory diagrams for explaining the content of addition processing of a weight counter; FIG. FIG. 10 is a flow chart showing medal monitoring processing executed by the main MPU; FIG. (a) and (b) are explanatory diagrams for explaining the content of subtraction processing of the monitoring period counter, and (c) the content of a comparative example in which the subtraction processing of the monitoring period counter is executed without executing the "ADC" instruction. It is an explanatory view for explaining. FIG. 16 is a flowchart showing main processing executed by the main MPU in the sixth embodiment; FIG. FIG. 21 is a flow chart showing main processing executed by the main MPU in the seventh embodiment; FIG.

<First embodiment>
A first embodiment in which the present invention is applied to a slot machine 10, which is a type of game machine, will be described in detail below with reference to the drawings. 1 is a front view of the slot machine 10, FIG. 2 is a perspective view of the slot machine 10 with the front door 12 opened, and FIG.

As shown in FIGS. 2 and 3, the slot machine 10 has a housing 11 forming its outer shell. A plurality of wooden panels are fixed to the housing 11 so that the housing 11 is formed into a box-like shape that is open forward as a whole.

A front door 12 is attached to the front side of the housing 11 as shown in FIGS. The front door 12 is supported by the housing 11 so as to be able to open and close the internal space of the housing 11 with a shaft portion 15 provided on the left side of the housing 11 as a rotation axis. The front door 12 is locked so that it cannot be opened by a locking device 13 provided on the rear surface thereof.

A door open sensor 16 is provided on the top of the housing 11 . The door open sensor 16 is for detecting whether or not the front door 12 is opened with respect to the housing 11 . The door open sensor 16 is electrically connected to a main controller 70, which will be described later. A signal corresponding to the state is transmitted, and when the front door 12 is in an open state with respect to the housing 11 , a signal corresponding to the open state is transmitted from the door open sensor 16 to the main controller 70 .

A game panel 20 is provided near the upper center portion of the front door 12 as shown in FIG. The game panel 20 has three vertically long display windows 21L, 21M, and 21R arranged side by side. The display windows 21L, 21M and 21R are made of a transparent or translucent material, and the inside of the slot machine 10 is visible through the display windows 21L, 21M and 21R.

As shown in FIGS. 2 and 3, the inside of the housing 11 is divided into upper and lower parts by a partition plate 11a, and the reel unit 31 is attached to the upper part of the partition plate 11a. The reel unit 31 includes a left reel 32L, a middle reel 32M, and a right reel 32R, which are each formed in a cylindrical shape. Each of the reels 32L, 32M, 32R is rotatably supported such that its center axis coincides with the rotation axis of the reel 32L, 32M, 32R. The rotation axes of the reels 32L, 32M, 32R are arranged on the same axis extending substantially horizontally, and the reels 32L, 32M, 32R correspond to the display windows 21L, 21M, 21R one-to-one. there is Therefore, a part of the surface of each reel 32L, 32M, 32R is visible through the corresponding display window portions 21L, 21M, 21R. Further, when the reels 32L, 32M, 32R rotate forward, the surfaces of the reels 32L, 32M, 32R are projected through the respective display windows 21L, 21M, 21R as if they are moving from top to bottom.

A start lever 41 is provided on the lower left side of the game panel 20 as shown in FIG. When the start lever 41 is operated when a predetermined number or more of game media (or game values), which are medals or virtual medals, are betted, the reels 32L, 32M, 32R start rotating all at once.

On the right side of the start lever 41, stop buttons 42, 43, 44 are provided to be operated to individually stop the rotating reels 32L, 32M, 32R. The respective stop buttons 42, 43, 44 are arranged directly below the display windows 21L, 21M, 21R corresponding to the reels 32L, 32M, 32R to be stopped, respectively. Each of the stop buttons 42, 43, 44 is in a state in which it can be stopped after a predetermined time has passed since the left reel 32L started rotating.

The reels 32L, 32M, and 32R start rotating based on the operation of the start lever 41, and the reels 32L, 32M, and 32R stop rotating based on the operation of the stop buttons 42, 43, and 44. One game (game cycle) is performed until the execution of various processes such as the granting of and the management of the game state is completed.

A medal slot 45 for inserting medals is provided on the lower right side of the display windows 21L, 21M, and 21R. As shown in FIG. 2, the medals inserted from the medal insertion slot 45 are guided to the hopper device 53 by the selector 52 provided on the back of the front door 12 when reception is permitted, and are guided to the hopper device 53 when reception is prohibited. The medals are led to a medal receiving tray 59 from a medal discharge port 58 provided in the front lower portion of the front door 12 (see FIG. 1). The hopper device 53 has a function of paying out the medals stored in the storage tank to the medal receiving tray 59 through the medal discharge port 58 when a prize corresponding to the awarding of game media is established on the main line ML, which will be described later. have. Below the medal slot 45, as shown in FIG. 1, a return button 46 is provided to be pushed when the medals inserted into the medal slot 45 are stuck in the selector 52. As shown in FIG.

On the lower left side of the display windows 21L, 21M, and 21R are a first credit insertion button 47 for inserting the maximum amount of credited virtual medals that can be betted at once, and a button for inserting two virtual medals at once. A second credit input button 48 is provided. In this slot machine 10, there are situations where the number of game media (medals or virtual medals) that can be betted (that is, bet setting) at one time is "3" and "2".

The first credit insertion button 47 is operated in a situation where the number of bets that can be betted at one time is "3", the current number of bets is "0", and three or more virtual medals are stored. In this case, the number of bets becomes "3" instead of decreasing the number of virtual medals by three. The first credit insertion button 47 is operated in a situation where the number of bets that can be made at one time is "3", the current number of bets is "1", and two or more virtual medals are stored. In this case, the number of bets becomes "3" instead of the number of virtual medals being reduced by two. The first credit insertion button 47 is operated in a situation where the number of bets that can be betted at one time is "3", the current number of bets is "2", and one or more virtual tokens are stored. In this case, the number of bets becomes "3" instead of the number of virtual medals being reduced by one. The first credit insertion button 47 is operated in a situation where the number of bets that can be betted at one time is "2", the current number of bets is "0", and two or more virtual medals are stored. In this case, the number of bets becomes "2" instead of the number of virtual medals being reduced by two. The first credit insertion button 47 is operated in a situation where the number of bets that can be betted at one time is "2", the current number of bets is "1", and one or more virtual medals are stored. In this case, the number of bets becomes "2" instead of the number of virtual medals being reduced by one.

If the number of stored virtual medals is less than the difference between the current bet number and the bettable number, and the first credit insertion button 47 is operated, the bet number will be the number of virtual medals. The number of virtual medals is increased, and the number of virtual medals becomes zero.

The second credit insertion button 48 is operated in a situation where the number of bets that can be betted at one time is "3", the current number of bets is "0", and two or more virtual medals are stored. In this case, the number of bets becomes "2" instead of the number of virtual medals being reduced by two. The second credit insertion button 48 is operated in a situation where the number of bets that can be betted at one time is "3", the current number of bets is "1", and one or more virtual medals are stored. In this case, the number of bets becomes "2" instead of the number of virtual medals being reduced by one. The second credit insertion button 48 is operated in a situation where the number of bets that can be made at one time is "2", the current number of bets is "0", and two or more virtual medals are stored. In this case, the number of bets becomes "2" instead of the number of virtual medals being reduced by two. The second credit insertion button 48 is operated in a situation where the number of bets that can be betted at one time is "2", the current number of bets is "1", and one or more virtual medals are stored. In this case, the number of bets becomes "2" instead of the number of virtual medals being reduced by one.

When the second credit insertion button 48 is operated in a situation where the number of stored virtual medals is one and the current bet number is "0", the bet number will be "1". At the same time, the number of virtual medals becomes zero.

The first credit insertion button 47 has a wider pressing surface than the second credit insertion button 48 when the player operates the button. Thereby, the operability of the first credit insertion button 47 is enhanced.

A settlement button 51 is provided on the left side of the start lever 41 . The slot machine 10 has a credit function of accumulating and storing surplus inserted medals up to a predetermined maximum value (equivalent to 50 medals) and payout medals at the time of winning as virtual medals. When the settlement button 51 is operated under the condition that the virtual medals are stored and stored, the virtual medals are dispensed from the medal discharge port 58 as real medals.

A power supply device 54 is provided inside the housing 11 to the left of the hopper device 53 as shown in FIGS. The power supply device 54 includes a power switch 55 operated when the power is turned on or off, a reset button 56 for resetting various states of the slot machine 10, and a set value of the slot machine 10 from "1" to "6". , a setting key insertion hole 57 into which a setting key owned by the manager of the game hall is inserted and operated is provided.

Next, the symbols attached to each reel 32L, 32M, 32R will be described.

FIG. 4 shows the pattern arrangement of the left reel 32L, middle reel 32M and right reel 32R. As shown in the figure, 21 symbols are arranged in a line on each reel 32L, 32M, 32R. In addition, numbers "0" to "20" are assigned to the respective reels 32L, 32M, 32R, and these numbers are visible from the display windows 21L, 21M, 21R of the main controller 70, which will be described later. It is a number for recognizing the symbol in a state of being in a bad state, and is not actually attached to the reels 32L, 32M, 32R. However, the numbers will be used in the following description.

The symbols include a “bell” symbol (eg, 20th on the left reel 32L), a “replay” symbol (eg, 19th on the left reel 32L), a “watermelon” symbol (eg, 18th on the left reel 32L), and “ Red 7" symbol (e.g., 15th on left reel 32L), "BAR" symbol (e.g., 10th on left reel 32L), "Cherry" symbol (e.g., 9th on left reel 32L), "White 7" symbol (for example, the 5th on the left reel 32L). The number and arrangement order of various symbols are different for each of the reels 32L, 32M, and 32R.

FIG. 5 is a front view of the display windows 21L, 21M and 21R. Each of the display window portions 21L, 21M, 21R is formed so that three of the 21 symbols attached to the corresponding reels 32L, 32M, 32R are visible as a whole. Therefore, when all the reels 32L, 32M, 32R are stopped, 3×3=9 symbols are visible through the display windows 21L, 21M, 21R.

In this slot machine 10, one main line ML is set so as to connect positions where symbols on the reels 32L, 32M, and 32R are visible. The main line ML is a line connecting the middle symbols of the left reel 32L, the middle symbols of the middle reel 32M, and the middle symbols of the right reel 32R. The reels 32L, 32M, and 32R are started to rotate in a state where a predetermined number or more of game media are betted, and when a prize corresponding to the winning combination is established on the main line ML, the profit of giving the game media. , the benefit of replaying, or the transition of the game state.

That is, in the present slot machine 10, only one main line ML is set as a line on which winning can be established. The main line ML is set as a straight line. Therefore, a subline SL1 connecting the upper pattern of the left reel 32L, the middle pattern of the middle reel 32M and the lower pattern of the right reel 32R, and the upper pattern of the left reel 32L, the upper pattern of the middle reel 32M and the upper pattern of the right reel 32R. A subline SL3 connecting a connected subline SL2, a lower pattern of the left reel 32L, a lower pattern of the middle reel 32M, and a lower pattern of the right reel 32R, a lower pattern of the left reel 32L, a middle pattern of the middle reel 32M, and a right reel 32R. Winning is not established even if a winning combination is established on a straight line such as a sub-line SL4 connecting the upper symbols of .

Hereinafter, with reference to FIG. 6, the correspondence relationship between the combination of winning symbols and the privilege given when winning will be described. FIG. 6 is an explanatory diagram for explaining the correspondence relationship between the combination of winning symbols and the privilege given when winning.

The small winnings to which the game media are given include the first compensation winning, the second compensation winning, the third compensation winning, the fourth compensation winning, the fifth compensation winning, the sixth compensation winning, the seventh compensation winning, and the eighth compensation winning. There are supplemental prizes, ninth supplemental prizes, first bell prizes, second bell prizes, first watermelon prizes, second watermelon prizes and cherry prizes. Specifically, in the main line ML, when the stopped symbol on the left reel 32L is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "red 7" symbol, It will be the first supplementary prize. In the main line ML, when the stopped symbol on the left reel 32L is a "bell" symbol, the stopped symbol on the middle reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the second compensation winning prize becomes. In the main line ML, when the stopped symbol on the left reel 32L is a "red 7" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the third compensation winning prize becomes. In the main line ML, when the stopped symbol on the left reel 32L is the "Bell" symbol, the stopped symbol on the middle reel 32M is the "Bell" symbol, and the stopped symbol on the right reel 32R is the "BAR" symbol, the fourth supplementary prize is awarded. Become. In the main line ML, when the stopped symbol on the left reel 32L is a "bell" symbol, the stopped symbol on the middle reel 32M is a "BAR" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the fifth supplementary prize is awarded. Become. In the main line ML, when the stopped symbol on the left reel 32L is the "BAR" symbol, the stopped symbol on the middle reel 32M is the "Bell" symbol, and the stopped symbol on the right reel 32R is the "Bell" symbol, the sixth supplementary prize is awarded. Become. In the main line ML, when the stopped symbol on the left reel 32L is a "bell" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "white 7" symbol, the seventh compensation winning prize becomes. In the main line ML, when the stopped symbol on the left reel 32L is a "bell" symbol, the stopped symbol on the middle reel 32M is a "white 7" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the eighth compensation winning prize becomes. In the main line ML, when the stopped symbol on the left reel 32L is a "white 7" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the ninth compensation prize is won. becomes. If any one of the first to ninth supplementary prizes is won, the number of game media to be awarded becomes “1”.

When the stopped symbol on the left reel 32L is the "bell" symbol, the stopped symbol on the middle reel 32M is the "bell" symbol, and the stopped symbol on the right reel 32R is the "bell" symbol on the main line ML, the first bell wins. becomes. When the stopped symbol on the left reel 32L is the "bell" symbol, the stopped symbol on the middle reel 32M is the "bell" symbol, and the stopped symbol on the right reel 32R is the "replay" symbol on the main line ML, the second bell wins. becomes. When either the first bell prize or the second bell prize is won, the number of game media to be given becomes “15”.

When the stopped symbol on the left reel 32L is the "watermelon" symbol, the stopped symbol on the middle reel 32M is the "watermelon" symbol, and the stopped symbol on the right reel 32R is the "watermelon" symbol on the main line ML, the first watermelon wins. becomes. On the main line ML, when the stopped symbol on the left reel 32L is a "watermelon" symbol, the stopped symbol on the middle reel 32M is a "watermelon" symbol, and the stopped symbol on the right reel 32R is a "BAR" symbol, the second watermelon wins. becomes. When either the first watermelon prize or the second watermelon prize is won, the number of game media to be given becomes “5”. When the stopped symbol of the left reel 32L on the main line ML is a "cherry" symbol, the cherry prize is won regardless of whether the stopped symbol of the middle reel 32M or the right reel 32R is. In the case of winning a cherry prize, the number of game media to be given becomes “2”.

Winnings that give the privilege of replaying the next game without betting game media include normal replay winnings, first chance replay winnings, and second chance replay winnings. Specifically, when the stopped symbol on the left reel 32L is the "replay" symbol, the stopped symbol on the middle reel 32M is the "replay" symbol, and the stopped symbol on the right reel 32R is the "replay" symbol on the main line ML, On the main line ML, when the stopped symbol on the left reel 32L is a "red 7" symbol, the stopped symbol on the middle reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "BAR" symbol, the main line On the ML, when the stopped symbol on the left reel 32L is a "replay" symbol, the stopped symbol on the middle reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol, on the main line ML When the stopped symbol on the left reel 32L is a "replay" symbol, the stopped symbol on the middle reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "BAR" symbol, or the left reel on the main line ML. When the stopped symbol on the reel 32L is a "watermelon" symbol, the stopped symbol on the middle reel 32M is a "red 7" symbol, and the stopped symbol on the right reel 32R is a "bell" symbol, the normal replay prize is won. When the stopped symbol on the left reel 32L is the "replay" symbol, the stopped symbol on the middle reel 32M is the "cherry" symbol, and the stopped symbol on the right reel 32R is the "bell" symbol on the main line ML, the first chance replay. Win a prize. When the stopped symbol on the left reel 32L is a "watermelon" symbol, the stopped symbol on the middle reel 32M is a "bell" symbol, and the stopped symbol on the right reel 32R is a "replay" symbol on the main line ML, the second chance replay. Win a prize.

If any of the above replay wins are made, a replay privilege is given that allows the player to play the next game without betting the game medium. Specifically, if any of the replay wins in the game in which "3" game media are betted, the betting of the game media is not required, and the next game is started with the "3" game media being betted. A game can be started. In addition, if any of the replay wins in the game in which the game medium "2" is betted, the play of the next game is started with the game medium "2" betted, while the game medium is not required to be wagered. It becomes possible to

A first CB prize and a second CB prize are available as state transition prizes in which only game state transitions are performed. Specifically, on the main line ML, the stopped symbol on the left reel 32L is the "Red 7" symbol, the stopped symbol on the middle reel 32M is the "Red 7" symbol, and the stopped symbol on the right reel 32R is the "White 7" symbol. If there is, it will be the 1st CB prize. On the main line ML, when the stopped symbol on the left reel 32L is the "white 7" symbol, the stopped symbol on the middle reel 32M is the "white 7" symbol, and the stopped symbol on the right reel 32R is the "red 7" symbol, 2CB award. When the first CB win is established, the game state shifts to the first CB state ST2, and when the second CB win is established, the game state shifts to the second CB state ST3 (see FIG. 40).

The first CB state ST2 and the second CB state ST3 are gaming states in which when the combination of symbols corresponding to the winning of a minor combination stops on the main line ML, medals are paid out as a winning regardless of whether there is a winning combination. For example, even if winning data corresponding to the first bell winning is not set, game media are provided to the player when the combination of symbols corresponding to the first bell winning is stopped on the main line ML. On the other hand, the replay winning prize is established on the condition that the corresponding combination is won in the lottery.

In the first CB state ST2 and the second CB state ST3, reel control different from that in the non-CB state is performed. In the non-CB state, the reels 32L, 32M, and 32R are controlled so that the reels 32L, 32M, and 32R can slide up to four symbols after the stop buttons 42-44 are operated. In other words, in the non-CB state, reel control is performed for each of the reels 32L, 32M, and 32R to stop the reels within a specified time (190 milliseconds) after the stop buttons 42 to 44 are operated. On the other hand, in the first CB state ST2 and the second CB state ST3, the middle reel 32M and the right reel 32R are controlled as described above, that is, the same reel control as in the normal game, but the left reel 32L is not controlled. As for the left reel 32L, reel control is performed such that the left reel 32L is slid only up to one symbol after the left stop button 42 is operated. That is, in the first CB state ST2 and the second CB state ST3, the left reel 32L is reel-controlled to stop within a specified time (75 msec) shorter than the specified time after the left stop button 42 is operated.

In the first CB state ST2 and the second CB state ST3, the reel control to slide up to one symbol is not limited to the left reel 32L. Control may be performed such that the game is slipped only up to the symbol, or reel control may be performed such that only predetermined reels are slipped for a maximum of one symbol. Further, the stop button operated in a certain order is controlled such that the reel corresponding to the stop button operated second or the stop button operated last is controlled to slide only up to one symbol. Reel control may be performed such that the reel corresponding to the .

In the first CB state ST2 and the second CB state ST3, when a winning combination corresponding to the replay winning is won, the replay winning is given priority, and when the replay winning is not possible, the first bell winning can be established. Also, the first bell winning can be established even when the winning combination corresponding to the replay winning has not been won.

Both the first CB state ST2 and the second CB state ST3 are game states in which the game media owned by the player are not increased. Furthermore, in both the first CB state ST2 and the second CB state ST3, the number of game media owned by the player at the end of the relevant game state is greater than the number of game media owned by the player at the start of the relevant game state. It is a game state in which the number of is reduced. Details of the first CB state ST2 and the second CB state ST3 will be described later.

Next, a device for executing various notifications and various effects will be described.

Above the front door 12, as shown in FIG. 1, an upper lamp 61, a speaker 62, and an image display device 63 are provided. When an abnormality occurs in the slot machine 10, light emission of the upper lamp 61 is controlled in a manner corresponding to the abnormality, and light emission is controlled in a manner corresponding to the winning result. Further, the upper lamp 61 is controlled to emit light so that a light emission effect corresponding to the display effect on the image display device 63 is performed. The speakers 62 are provided as a pair of left and right speakers, and when an abnormality occurs in the slot machine 10, the sound output is controlled so that a sound or voice corresponding to the abnormality is output, and a sound or voice corresponding to the winning result is output. Sound output is controlled so that Further, the speaker 62 is controlled to output sound so that a sound output effect corresponding to the display effect on the image display device 63 is performed.

The image display device 63 has a display surface and is configured as a liquid crystal display device having a liquid crystal display, but is not limited to a liquid crystal display device, and may be a plasma display device, an organic EL display device, or a CRT. It may be another display device having a display surface, or it may be a dot matrix display. When an abnormality occurs in the slot machine 10, display control is performed so that an image corresponding to the abnormality is displayed on the display surface. Further, the image display device 63 is controlled to display on the display surface images corresponding to the winning result of the winning combination in the internal lottery and the winning result in each game. That is, the image display device 63 executes a display effect.

On the game panel 20 of the front door 12, below the display windows 21L, 21M, and 21R, there is a bet display portion 64 for displaying the number of game media currently betted, and the number of stored virtual medals. , and the number of game media to be awarded when winning a small winning combination is displayed, and when the stop order of the reels 32L, 32M, and 32R is notified on the image display device 63, the content notified , and furthermore, a dual-use display section 66 for displaying a display for notifying the management result of the game history, and a section display section 67 for displaying a display corresponding to the fact that the game section is the second section. and are provided.

The bet display portion 64 has three light emitting portions arranged in parallel in the vertical direction, and each light emitting portion uses a single-color light emitting LED such as red. When the number of game media currently bet is "1", the lowermost light-emitting portion is turned on and the remaining light-emitting portions are turned off. When the number of game media currently bet is "2", the lowermost and central light-emitting units are lit, and the uppermost light-emitting unit is extinguished. When the number of game media currently bet is "3", all the three light-emitting portions are lit. After all the reels 32L, 32M, 32R stop rotating in one game, all the light-emitting parts of the bet display part 64 are turned off regardless of whether or not any replay prize is established in the game. In this case, in the case of the final game in the pseudo-bonus state ST4, which will be described later, when the processing for terminating the pseudo-bonus state ST4 is executed, all the light-emitting portions of the bet display portion 64 are turned off. In the case of a game other than the final game, all the light-emitting portions of the bet display portion 64 are turned off when the processing of one game is completed. In addition, if no replay win has been established, each light emitting unit is kept turned off until a new bet on the game medium occurs. seconds), the same number of light emitting units as the number of games in which the replay winning has been established are turned on. The credit display section 65 is composed of a 7-segment display, and each segment uses a monochromatic LED such as green.

FIG. 7A is a front view of a common display area 68 provided with a combined display section 66 and a section display section 67. FIG. In the common display area 68, as shown in FIG. 7(a), a combined display section 66 in which two 7-segment displays 66a and 66b are arranged side by side, and a section display section composed of one light emitting section. 67 are aggregated.

When any of the small wins (1st to 9th compensation wins, 1st bell wins, 2nd bell wins, 1st watermelon wins, 2nd watermelon wins or cherry wins) corresponding to the provision of game media is established , the combined display unit 66 displays the number of given game media corresponding to the small winning combination when the game in which the small winning combination is established is finished. Specifically, when any one of the first to ninth compensation winnings is established in the non-CB state, the left 7-segment display 66a is hidden and "1" is displayed on the right 7-segment display 66b. By being displayed, it is notified that the game medium of "1" has been provided. When either the first bell win or the second bell win is established in the non-CB state, "1" is displayed on the left 7-segment display 66a and "5" is displayed on the right 7-segment display 66b. By being displayed, it is notified that "15" game media have been provided. Further, when either the first watermelon winning prize or the second watermelon winning prize is established in the non-CB state, the left 7-segment display 66a is hidden and "5" is displayed on the right 7-segment display 66b. It is notified that the game media of "5" have been awarded. In addition, when a cherry prize is won in the non-CB state, the left 7-segment display 66a is hidden, and '2' is displayed on the right 7-segment display 66b, whereby the game medium of '2' is displayed. is given.

In the first CB state ST2 and the second CB state ST3, the number of game media awarded for winning a small winning combination is "1", as will be described later in detail. Therefore, when a small winning combination is established in the first CB state ST2 or the second CB state ST3, the left 7-segment display 66a is hidden and "1" is displayed on the right 7-segment display 66b. By doing so, it is notified that the game medium of "1" has been provided.

On the other hand, even if a winning such as a replay winning or a CB winning that does not give a game medium is established, the display corresponding to the winning is not displayed on the combined display unit 66. The 7-segment displays 66a and 66b are maintained in a non-display state. The display of the number of given game media on the dual-use display unit 66 is ended when the game media are betted to start the next game after the game in which the display was performed, and each 7-segment display is displayed at this bet timing. The devices 66a and 66b are in a non-display state.

When the stop order of the reels 32L, 32M, and 32R is reported on the image display device 63, information corresponding to the reported stop order is displayed on the combined display section 66. FIG. FIG. 7(b) is an explanatory diagram for explaining the contents of the information corresponding to the stop order displayed on the dual-use display section 66. As shown in FIG. As shown in FIG. 7B, in the slot machine 10, the reels 32L, 32M, and 32R are stopped in the order indicated by the image display device 63. The first stop is the left reel 32L, and the second stop is the middle reel. 32M and the third stop is the right reel 32R, the first stop is the left reel 32L, the second stop is the right reel 32R and the third stop is the middle reel 32M, and the first stop. is the middle reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R, and the first stop is the middle reel 32M, the second stop is the right reel 32R, and the third stop is The stop order is the left reel 32L, the first stop is the right reel 32R, the second stop is the left reel 32L, and the third stop is the middle reel 32M, and the first stop is the right reel 32R and the third stop. The stop order where the second stop is the middle reel 32M and the third stop is the left reel 32L, the stop order where the first stop is the left reel 32L and the rest are optional, and the first stop is the middle reel 32M and the rest are There is a stop order that is arbitrary and a stop order where the first stop is the right reel 32R and the rest are arbitrary.

The notification of the stop order in the image display device 63 is made when a winning combination including the first bell winning data and any of the first to sixth compensation winning data is won in the winning lottery process in the non-CB state, or It can be executed when a winning combination containing any of the seventh to ninth complementary winning data as well as the second bell winning data is won. Specifically, when winning a combination including the first bell winning data and any of the first to sixth complementary winning data, the reel 32L is selected in the stop order corresponding to the current winning combination among the above stop orders. , 32M, 32R are stopped, the first bell winning is established, and if the reels 32L, 32M, 32R are not stopped in the order of stopping corresponding to the winning combination of this time, the first to sixth compensation winnings are established. Either can be established. When the first bell win is established, as already explained, "15" game media are given to the player, and when any one of the first to sixth compensation wins is established, as already explained, "1" is awarded. of game media is given to the player.

When winning a combination that includes the second bell winning data and any of the seventh to ninth complementary winning data, the reels 32L, 32M, and 32R are played in the stop order corresponding to the current winning combination among the above stop orders. If the reels 32L, 32M and 32R are not stopped in the stopping order corresponding to the winning combination of this time, any one of the seventh to ninth complementary winnings is established. obtain. When the second bell win is established, as already explained, the game medium of "15" is given to the player, and when any of the seventh to ninth supplementary prizes is established, as already explained, "1" is awarded. of game media is given to the player.

When any one of the stop orders is notified by the image display device 63, the left 7-segment display 66a of the dual-use display unit 66 is maintained in a non-display state, while the right 7-segment display 66b is maintained. , a display corresponding to the stop order of the notification targets is performed. The contents of this display are as shown in FIG. 7(b), and the display contents of the stop order on the combined display unit 66 are set in one-to-one correspondence with the notification contents of the stop order on the image display device 63. . However, the present invention is not limited to this, and a configuration may be adopted in which a plurality of types of display contents on the dual-purpose display unit 66 are set so as to correspond to part or all of the notification contents of the stop order on the image display device 63. good too.

The display content of the stop order on the dual-purpose display portion 66 differs from the display content to be displayed when the dual-purpose display portion 66 displays a display corresponding to the provision of game media. This makes it easy to distinguish whether the content displayed on the dual-use display unit 66 corresponds to the number of game media provided or to the stop order of the reels 32L, 32M, and 32R.

FIGS. 8(a) and 8(b) are explanatory diagrams for explaining the relationship between the content of notification of the order of stopping on the image display device 63 and the content of display of the order of stopping on the dual-use display section 66. FIG.

When the image display device 63 notifies the stop order of the reels 32L, 32M, and 32R, as shown in FIG. unit display images G1 to G3 are displayed, and image display corresponding to the stopping order of the reels 32L, 32M, and 32R is performed in each of the unit display images G1 to G3. Specifically, a left unit display image G1 corresponding to the left reel 32L, a middle unit display image G2 corresponding to the middle reel 32M, and a right unit display image G3 corresponding to the right reel 32R are displayed. FIG. 8(a) shows how the stop order is notified when the first stop is the middle reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R. The left unit display image G1 displays an image "2" corresponding to the stop order of the left reel 32L, and the middle unit display image G2 displays an image "1" corresponding to the stop order of the middle reel 32M. , an image of "3" corresponding to the stop order of the right reel 32R is displayed on the right unit display image G3.

While the image display device 63 displays an image notifying the stopping order of the reels 32L, 32M, and 32R as described above, the combined display unit 66 displays the reels as shown in FIG. 8(b). An "L" is displayed corresponding to the stop order of 32L, 32M, and 32R. That is, in the image display device 63, the unit display images G1 to G3 corresponding to the number of the reels 32L, 32M, 32R are displayed, and the reels 32L, 32M, 32R corresponding to the unit display images G1 to G3 are displayed in the stopping order. While the corresponding image display is performed, the combined display section 66 performs display irrelevant to the number of reels 32L, 32M, and 32R. As a result, the player can be made to pay attention to the display contents on the image display device 63 even if the display corresponding to the notification contents of the stop order of the reels 32L, 32M, and 32R is performed on the combined display section 66 .

The display range of the combined display unit 66 is narrower than the display range of the image display device 63 . Also from this point, it is possible to reduce the player's attention to the combined display unit 66 compared to the image display device 63 . In addition, the dual-purpose display section 66 is located on the side opposite to the image display device 63 with the display windows 21L, 21M, and 21R that make the reels 32L, 32M, and 32R visible. As a result, the combined display section 66 is arranged at a position spaced apart from the image display device 63 , and this also makes it possible to reduce the player's attention to the combined display section 66 .

When the stop order of the reels 32L, 32M, and 32R is notified, display corresponding to the stop order of the reels 32L, 32M, and 32R on the combined display unit 66 and corresponding to the stop order of the reels 32L, 32M, and 32R on the image display device 63 This display is started after the winning lottery process is performed and before the stop operation of the reels 32L, 32M, and 32R is validated. In this case, the display corresponding to the stop order of the reels 32L, 32M, 32R on the combined display unit 66 is started earlier than the display corresponding to the stop order of the reels 32L, 32M, 32R on the image display device 63. However, these displays may start at the same time or substantially at the same time, and the display start order may be reversed. The display corresponding to the stop order of the reels 32L, 32M, and 32R on the combined display unit 66 and the image display device 63 is a stop command for all the reels 32L, 32M, and 32R in the game for which the display is executed. is terminated when

The shared display section 66 is arranged on the central side of the common display area 68 , while the section display section 67 is arranged on the corner side of the common display area 68 . The section display section 67 is a display section for notifying that the game section is the second section SC2 out of the first section SC1 and the second section SC2. The second section SC2 includes the reels 32L, 32M, 32R that enable the establishment of a winning that is advantageous to the player when a winning combination to be established is different according to the stop order of the reels 32L, 32M, 32R. As a result of notification of the stop order, the expected value of acquisition of game media in one game (the value obtained by subtracting the "number of game media betted in one game" from the "expected number of game media awarded in one game") is 1 or more. It is a section in which an advantageous game state (specifically, a pseudo-bonus state ST4 and an AT state ST5) can be started and a section in which the advantageous game state can be continued. On the other hand, the first section SC1 is a section in which the advantageous gaming state does not start and does not continue.

The interval display section 67 is displayed when winning a combination with different winnings to be established according to the order of stopping the reels 32L, 32M, 32R or a combination with different winnings depending on the order of stopping the reels 32L, 32M, 32R. The order of stopping the reels 32L, 32M, and 32R that enables the player to win a prize advantageous to the player is reported to the player, and in the case of an advantageous game state in which the expected value of acquisition of the game medium is 1 or more, the lighting state is set. Become. In this case, the pseudo-bonus state ST4 and the AT state ST5 correspond to the advantageous gaming state, while the second section SC2, which is neither the pseudo-bonus state ST4 nor the AT state ST5, does not correspond to the advantageous gaming state. Therefore, when the first section SC1 shifts to the second section SC2, the section display section 67 may or may not switch from the off state to the on state. When the section display unit 67 is maintained in the off state when the transition to the second section SC2 is performed, when the pseudo bonus state ST4 or the AT state ST5 is started in the second section SC2, the section display unit 67 is turned off from the off state. Lights up. When the section display portion 67 is in the lighting state, the lighting state is maintained until the second section SC2 ends, and when the second section SC2 ends and transitions to the first section SC1, the section display section 67 is turned off. Become.

As described above, once the section display section 67 is turned on in the second section SC2, the lighting state is maintained until the second section SC2 ends. The dual-use display unit 66 is turned on when a game medium is given, and turned off when the next game starts, and the order of stopping the reels 32L, 32M, and 32R is displayed on the image display device 63. When the game is finished, it is turned on and turned off when the game ends. Therefore, in a configuration in which the interval display portion 67 is arranged in the common display area 68 so as not to be too conspicuous to the player, only the interval display portion 67 is displayed in the common display area 68 in the situation of the second interval SC2. It is possible to positively create a lighting state, and the manager of the game hall can easily check the section display section 67 .

Instead of maintaining the lighting state of the section display portion 67 during the second section SC2, the section display section 67 may blink at a predetermined cycle during the second section SC2. Further, as the combined display section 66 and the section display section 67, other displays such as a liquid crystal display device may be used.

The slot machine 10 is provided with various control devices. Specifically, a main controller 70 is provided above the reel unit 31 as shown in FIG. The main controller 70 is attached to the back plate 11b that forms the rear portion of the housing 11. As shown in FIG. The main controller 70 is constructed by housing a main control board 71 in a board box 81 . An MPU 72 is mounted on the element mounting surface, which is one plate surface of the main control board 71 . The board box 81 is formed transparent so that the MPU 72 accommodated in the board box 81 can be visually observed from the outside of the board box 81 . Although the board box 81 is formed colorless and transparent, it may be formed colored and transparent as long as the MPU 72 accommodated in the board box 81 can be visually observed from the outside of the board box 81. The main control device 70 is mounted on the back plate 11b of the housing 11 in the board box 81 so that the facing wall portion 82 facing the element mounting surface of the main control board 71 faces the front of the slot machine 10 . Therefore, by opening the front door 12 to the front of the slot machine 10 with respect to the housing 11 to expose the internal space of the housing 11, it becomes possible to see the opposing wall portion 82 of the board box 81 and It is possible to see the MPU 72 through the opposing wall portion 82 .

The substrate box 81 is formed by assembling a plurality of case bodies back and forth, and these plurality of case bodies are provided with an adhesive to prevent the case bodies from separating and to leave a trace when the case bodies are separated. A coupling portion 83 is provided. A plurality of coupling portions 83 are arranged side by side on one side of the substantially rectangular parallelepiped board box 81 . As a result, in a state in which separation of the case body is prevented by using some of the joints 83, even if the case body is separated by destroying the part of the joints 83, another joint may be used after that. By connecting 83, separation of the case body can be prevented again. In addition, when the case body is separated, the connecting portion 83 is destroyed and a trace remains, so that it is possible to grasp whether or not the case body is being separated illegally by visually checking the connecting portion 83. Become. A sealing seal 84 is attached to a side of the substrate box 81 other than the side on which the coupling portions 83 are arranged so as to straddle the boundary between the case bodies. When the sealing seal 84 is peeled off, the adhesive layer remains on the case body. As a result, when the sealing seal 84 is peeled off when the case body is separated, it is possible to leave a trace of it.

The slot machine 10 is provided with an effect control device 90 in addition to the main control device 70, as shown in FIG. The effect control device 90 is arranged behind the image display device 63 on the front door 12 . The effect control device 90 controls the upper lamp 61 , the speaker 62 and the image display device 63 based on commands received from the main control device 70 . In addition, the production control device 90 has a control board housed in a board box in the same manner as the main control device 70 .

Next, the electrical configuration of the slot machine 10 will be described with reference to the block diagram of FIG.

The MPU 72 is mounted on the main control board 71 of the main controller 70 as already described. The MPU 72 includes a ROM 73 storing various control programs and fixed value data to be executed by the MPU 72, and a memory for temporarily storing various data when executing the control programs stored in the ROM 73. A RAM 74, a first random number circuit 75 for sequentially updating the first random number within a predetermined numerical range based on the clock signal output from the clock circuit, and a second random number based on the clock signal output from the clock circuit. A second random number circuit 76 that sequentially updates within a predetermined numerical range and a clock circuit that outputs a rectangular wave of a predetermined frequency are provided. In addition, the MPU 72 also incorporates an interrupt circuit, a data input/output circuit, and the like. It should be noted that it is not essential that the ROM 73 and the RAM 74 are integrated into one chip for the MPU 72, and they may be individually integrated into chips.

The MPU 72 is provided with an input port and an output port. The input side of the MPU 72 includes a door open sensor 16, a reel unit 31, a start detection sensor 41a for detecting the operation of the start lever 41, and stop detection sensors 42a and 43a for individually detecting the operation of the stop buttons 42, 43 and 44. , 44a, an inserted medal detection sensor 45a for detecting medals inserted from the medal insertion slot 45, credit insertion detection sensors 47a and 48a for individually detecting the operation of the credit insertion buttons 47 and 48, and detection of the operation of the checkout button 51. A settlement detection sensor 51a, a payout detection sensor of the hopper device 53, a reset detection sensor that detects the operation of a reset button 56 provided in the power supply device 54, and a setting key insertion hole 57 detects that the setting key is inserted. Various sensors such as a setting key detection sensor are connected, and signals from these sensors are input to the MPU 72 .

On the output side of the MPU 72 are the reel unit 31, the selector driving section 52a provided in the selector 52, the payout motor of the hopper device 53, the bet display section 64, the credit display section 65 (not shown in FIG. 9), and the combined display section 66. , section display section 67, external output terminal board 78, effect control device 90 and the like are connected. In each game, the MPU 72 controls the rotation of the reels 32L, 32M, and 32R of the reel unit 31. FIG. The selector 52 guides the medals inserted from the medal slot 45 to the hopper device 53 after being detected by the inserted medal detection sensor 45a if reception is permitted, and to the inserted medal detection sensor 45a if reception is prohibited. It has a function of ejecting to the medal receiving tray 59 without being detected by the The selector drive unit 52a has a function of switching the state of the selector 52 between the reception permission state and the reception prohibition state. and a position for prohibiting reception. The MPU 72 switches the state of the selector 52 between the reception permission state and the reception prohibition state by switching the output state and the stop state of the driving signal to the selector driving section 52a.

The MPU 72 executes drive control of the hopper device 53 when a small winning combination is established and medals are to be paid out. Further, the MPU 72 controls the display of the bet display unit 64 so that the number of bets is notified when a game medium bet is placed. Further, when virtual game media are stored, the MPU 72 controls the display of the credit display unit 65 so that the number of virtual game media stored is displayed. Further, the MPU 72 controls the dual-use display unit 66 so that the number of game media to be awarded is displayed when game media are awarded. Further, the MPU 72 performs display control of the section display unit 67 so that the notification of the second section SC2 is performed when the notification start trigger occurs in the second section SC2. Further, the MPU 72 controls the dual-use display unit 66 so that a display corresponding to the game management result is performed. In addition, the external output terminal plate 78 is installed on the inner space side of the housing 11, and the MPU 72 outputs a signal to the external output terminal plate 78 to the management computer of the game hall through the external output terminal plate 78 ( Specifically, a first external signal and a second external signal) are externally output.

The MPU 72 transmits a command to the effect control device 90 at each timing of each game, and also transmits a command to the effect control device 90 for informing the stopping order of the reels 32L, 32M, and 32R in the image display device 63. executes display control of the dual-use display unit 66 so that a display corresponding to the content to be notified is performed. In this case, the direct display control of the image display device 63 is performed by the performance control device 90 , while the direct display control of the combined display section 66 is performed by the MPU 72 . That is, for the image display device 63, which is subject to relatively complicated display control, direct display control is performed by the effect control device 90, and the combined display unit 66, which is subject to relatively simple display control. Direct display control is executed in the MPU 72 for . As a result, it is possible to perform both a display that emphasizes the improvement of attention to the presentation and a display that emphasizes reliability while reducing the processing load of the MPU 72 .

An input side of the MPU 72 is connected to a power failure monitoring circuit 54b provided in the power supply device 54 (see FIG. 11). The power supply unit 54 is equipped with a power supply unit 54a that supplies drive power to each electronic device of the slot machine 10, including the main controller 70, and a power failure monitoring circuit 54b. The voltage applied to the unit 54a is monitored, and if the voltage exceeds the reference voltage (eg, 5 V), the output level of the power failure signal to the MPU 72 is set to HI level, and the voltage becomes equal to or lower than the reference voltage. In this case, the output level of the power failure signal to the MPU 72 is set to LOW level. The MPU 72 executes power failure processing by receiving a power failure signal of LOW level, and after the power is restored, it is possible to return to the processing state before the power failure. Further, the power supply device 54 is provided with a power-off power supply unit for supplying backup power to the RAM 74 as power-off power when the supply of operating power from the external power supply is interrupted. As a result, even when the supply of operating power from the external power supply is cut off, data is stored and retained in the RAM 74 in a situation where backup power can be supplied to the power supply unit during a power failure (for example, for one or two days). be done.

The performance control device 90 includes a performance control board 91 for controlling execution of various notifications and various performances. An MPU 92 is mounted on the effect control board 91 . The MPU 92 includes a ROM 93 storing various control programs and fixed value data to be executed by the MPU 92, and a memory for temporarily storing various data when executing the control programs stored in the ROM 93. A RAM 94 is built in, and a clock circuit for outputting a rectangular wave of a predetermined frequency, an interrupt circuit, a data input/output circuit, a random number generation circuit, and the like are also built in.

It should be noted that it is not essential that the ROM 93 and the RAM 94 are integrated into one chip for the MPU 92, and they may be individually integrated into chips. In addition, the RAM 94 is not supplied with backup power from the power supply section of the power supply unit 54 when the supply of operating power from the external power supply is interrupted, but the RAM 94 is supplied with backup power. good too.

The MPU 92 is provided with an input port and an output port. The input side of the MPU 92 is connected to the MPU 72 of the main control device 70 as already described, and receives various commands from the MPU 72 . An upper lamp 61 , a speaker 62 and an image display device 63 are connected to the output side of the MPU 92 . Based on commands received from the MPU 72 of the main control device 70, the MPU 92 executes light emission control of the upper lamp 61, sound output control of the speaker 62, and display control of the image display device 63, thereby performing various notifications and various effects. let it happen.

In addition to the MPU 92, the effect control board 91 is equipped with a video display processor (VDP), a character ROM, a video RAM, and the like, although not shown. The VDP is a kind of drawing circuit that directly operates an image processing device as a liquid crystal display driver incorporated in the image display device 63 . The VDP intervenes in the reading and writing of data in the video RAM, reads image data to be stored in the video RAM from the character ROM at a predetermined timing, and causes the image display device 63 to display the image data. The character ROM serves as an image data library for storing character data such as designs displayed on the image display device 63 . This character ROM holds bitmap format image data of various display patterns, a color palette table to be referred to when determining the expression color of each dot of the bitmap image, and the like. The video RAM is a memory for storing display data to be displayed on the image display device 63 . When the MPU 92 determines the execution contents of the effect based on the command received from the MPU 72 of the main control device 70, the MPU 92 stores a drawing list indicating the contents of the image corresponding to each update timing in the VDP according to the determined execution contents of the effect. Output. The VDP reads image data from the character ROM according to the drawing list, and uses the read image data to create display data in the video RAM. Then, the VDP outputs an image signal corresponding to the generated display data to the image display device 63, thereby causing the image display device 63 to display an image corresponding to the display data.

In the following description, for convenience of explanation, the MPU 72, ROM 73 and RAM 74 of the main control device 70 will be referred to as the main MPU 72, main ROM 73 and main RAM 74 respectively, and the MPU 92, ROM 93 and RAM 94 of the effect control device 90 will be referred to as the effect side. They are referred to as an MPU 92, an effect-side ROM 93, and an effect-side RAM 94.

<Regarding various processes executed by the main MPU 72>
Next, processing executed by the main MPU 72 will be described. First, the main processing executed by the main MPU 72 when the supply of operating power to the main MPU 72 is started will be described with reference to the flowchart of FIG.

First, a power failure signal is read (step S101). Here, the power failure signal will be explained. FIG. 11 is an explanatory diagram for explaining the signal path of the power failure signal. As shown in FIG. 11, the power supply unit 54 includes a power supply unit 54a that supplies operating power to various electronic devices including the main control unit 70 using power supplied from an external power supply, and a power supply unit A power failure monitoring circuit 54b monitors the voltage applied to 54a and sets the output level of the power failure signal to LOW level when the voltage drops below the reference voltage. The power supply unit 54a and the main controller 70 are electrically connected by a power supply line ELN, and operating power is supplied from the power supply unit 54a to the main controller 70 through the power supply line ELN.

The power failure monitoring circuit 54b and the main side MPU 72 are electrically connected by a signal line LN, and a power failure signal is transmitted from the power failure monitoring circuit 54b to the main side MPU 72 through the signal line LN. The main MPU 72 is provided with an input port 72a, and information corresponding to the state of the power failure signal is stored in a predetermined bit (specifically, the most significant bit) of the input port 72a. In this case, when power is normally supplied from the external power source to the power supply unit 54a, a power failure signal of HI level is transmitted from the power failure monitoring circuit 54b to the main MPU 72. Specifically, a signal of 5 V is transmitted as the HI level power failure signal, but the voltage of this power failure signal is arbitrary. When the power failure signal of HI level is transmitted, the information of "1" which is one of the binary information is stored in the predetermined bit of the input port 72a as the information corresponding to the power failure signal. When power is not normally supplied from the external power source to the power supply unit 54a, a LOW level power failure signal is transmitted from the power failure monitoring circuit 54b to the main MPU 72. The LOW level power failure signal is specifically a signal of less than 5V. When a power failure signal of LOW level is transmitted, information of "0" which is the other of the binary information is stored in the predetermined bit of the input port 72a as information corresponding to the power failure signal. Note that the relationship between HI and LOW of the power failure signal may be reversed, and when power is normally supplied from the external power supply to the power supply unit 54a, the power failure signal is transmitted and power is normally supplied from the external power supply to the power supply unit 54a. It may be configured such that the power failure signal is not transmitted when the power is not supplied to the power supply.

The main MPU 72 basically monitors the predetermined bit of the input port 72a in the power failure process (step S503) in the timer interrupt process (FIG. 19) to be described later, thereby periodically specifying whether or not a power failure has occurred. Configuration. However, the execution of the timer interrupt process (FIG. 19) is prohibited at the timing when the main process is started, and the execution of the timer interrupt process (FIG. 19) is first permitted when the main process ends. is. Therefore, at the start of supply of operating power, the presence or absence of power failure is specified by monitoring the predetermined bit of the input port 72a in step S101 without waiting for execution of the timer interrupt process (FIG. 19). After that, it is determined whether or not the power failure signal received from the power failure monitoring circuit 54b is at HI level by determining whether or not "1" is stored in the predetermined bit of the input port 72a (step S102).

If the power failure signal is at the LOW level (step S102: NO), return to step S101, read the information stored in the predetermined bit of the input port 72a again (step S101), and the information is "1". It is determined whether or not the power failure signal received from the power failure monitoring circuit 54b is at HI level (step S102). When the power failure signal is HI level (step S102: YES), the process proceeds to step S103 and subsequent steps.

With reference to the time chart of FIG. 12, the manner in which the progress of the processing waits until the power failure signal becomes HI level when the main processing is started will be described. FIG. 12(a) shows a period during which operating power is supplied to the main MPU 72, FIG. 12(b) shows a power failure signal transmitted from the power failure monitoring circuit 54b, and FIG. FIG. 12(d) shows a period during which the main process is being executed by the MPU 72, and FIG. 12(e) shows a power failure signal in the timer interrupt process (FIG. indicates a period during which the process at the time of power failure is executed when it is specified that the is at the LOW level.

At the timing of t1, as shown in FIG. 12(a), supply of operating power from the power supply unit 54a to the main MPU 72 is started, and as shown in FIG. ) is started. In this case, the voltage level of the power failure signal may not be stable immediately after the power supply to the power supply unit 54a is started because the power supply is not stable. In the case illustrated in the time chart of FIG. 12, the voltage of the power failure signal becomes unstable in a state of less than 5 V over the timing of t1 to t2 as shown in FIG. 12(b). On the other hand, in the main process (FIG. 10), the processes of steps S101 and S102 are executed as already described, so as shown in FIG. becomes HI level, it waits without proceeding to the processing after step S103.

After that, at the timing of t2, the power failure signal is stabilized at the HI level as shown in FIG. 12(b). Therefore, as shown in FIG. 12(d), the state of waiting for the progress of the process (that is, the state of making a negative determination in step S102) is cancelled, and the process proceeds to step S103 and subsequent steps. As a result, it is possible to complete the main process (FIG. 10) under the stable condition that the power failure signal is at HI level, and to start the subsequent process for progressing the game.

After that, the main process (FIG. 10) ends at the timing t3 as shown in FIG. 12(c). In this case, execution of the timer interrupt process (FIG. 19) is changed from a prohibited state to a permitted state. By permitting the execution of the timer interrupt process (FIG. 19), the timer interrupt process (FIG. 19) is periodically executed and the predetermined bit of the input port 72a is set to " 1” is stored, it is determined whether or not the power failure signal is at HI level.

After that, at the timing of t4, as shown in FIG. 12(a), the supply of operating power from the external power supply to the power supply unit 54a is stopped, so that the power failure signal changes from HI level to LOW level as shown in FIG. 12(b). becomes. Then, when it is specified by the timer interrupt processing (FIG. 19) that the power failure signal has become LOW level, as shown in FIG. Processing is performed.

FIG. 13 is a flowchart showing power failure processing executed in step S503 of the timer interrupt processing (FIG. 19).

In the power failure process, first, it is determined whether or not the predetermined bit of the input port 72a stores "1", thereby determining whether or not the power failure signal is HI level (step S201). If the power failure signal is HI level (step S201: YES), the main power failure processing ends without executing the power failure processing shown in steps S202 to S205.

When the value of the predetermined bit of the input port 72a is "0", that is, when the power failure signal is at the LOW level (step S201: NO), the power failure flag provided in the main RAM 74 is set to "1" ( Step S202), a checksum is calculated using information stored in a checksum calculation target area among a number of storage areas provided in the main RAM 74 (step S203), and the calculated checksum is In the storage area of the RAM 74, it is stored in an area that is not subject to checksum calculation (step S204). After all the output ports of the main MPU 72 are cleared to "0" (step S205), an infinite loop is formed. This infinite loop continues until the supply of operating power for power failure to the main MPU 72 is completely stopped. As a result, when the power failure process is normally executed when the supply of operating power to the main MPU 72 is stopped, the power failure flag in the main RAM 74 is set to "1", and the main RAM 74 The checksum is stored.

As described above, when the supply of operating power to the main MPU 72 is started, execution of the processing after step S103 in the main processing (FIG. 10) waits until the power failure signal is stabilized at the HI level. As a result, it is possible to start the processing for progressing the game under the condition that the power failure signal of HI level is stably output.

When the main process (Fig. 10) is started, execution of the timer interrupt process (Fig. 19) is prohibited, so even if the power failure signal is not stable at HI level, the power failure process will not be executed. As a result, the process at the time of power failure is not executed. In this case, in the main process (FIG. 10), the predetermined bit of the input port 72a is repeatedly monitored until the power failure signal becomes HI level. This makes it possible to monitor whether or not the power failure signal is at HI level even in a situation where execution of timer interrupt processing (FIG. 19) is prohibited.

Returning to the description of the main processing (FIG. 10), if the determination in step S102 is affirmative, the internal function setting processing is executed (step S103). In the internal function setting process, various initial settings are made for the registers and I/O devices in the main MPU 72 .

Thereafter, the information abnormality flag 74g (see FIG. 9) provided in the main RAM 74 is set to "1" (step S104). The information abnormality flag 74g is a flag for the main side MPU 72 to specify whether or not an information abnormality has occurred in the main side RAM 74 when supply of operating power is started.

After that, in order to specify whether or not an information abnormality has occurred, first, it is determined whether or not the power failure flag of the main RAM 74 is set to "1" (step S105). In addition, a checksum is calculated using information stored in a checksum calculation target area among a number of storage areas provided in the main RAM 74 (step S106). It is determined whether or not it matches the checksum calculated in step S203 of the power failure process (FIG. 13) and stored in the main RAM 74 when the power supply is stopped (steps S107 and S108). Also, it is determined whether or not the set value data stored in the set value storage area provided in the main RAM 74 is 6 or more (step S109). The set value data of "0" corresponds to the set value of "1", the set value data of "1" corresponds to the set value of "2", and the set value data of "2" corresponds to the set value of "3". ", the setting value data of "3" corresponds to the setting value of "4", the setting value data of "4" corresponds to the setting value of "5", The set value data of "5" corresponds to the set value of "6". Set value data of "0" to "5" is normal, and data of 6 or more is abnormal.

If the power failure flag is set to "1" (step S105: YES), the checksum matches (step S108: YES), and the set value data is less than 6 (step S109: NO), the main This means that no information abnormality has occurred in the side RAM 74 . In this case, the information abnormality flag 74g of the main RAM 74 is cleared to "0" (step S110). On the other hand, if the power failure flag is not set to "1" (step S105: NO), if the checksum does not match (step S108: NO), or if the set value data is 6 or more (step S109: YES), the state in which the information abnormality flag 74g is set to "1" is maintained.

When a negative determination is made in step S105, when a negative determination is made in step S108, when an affirmative determination is made in step S109, or when the process of step S110 is executed, a setting change operation is performed when starting supply of operating power. is performed (step S111). Specifically, it is determined whether or not the setting key inserted into the setting key insertion hole 57 is ON-operated. If the setting change operation has not been performed (step S111: NO), it is determined whether or not the information abnormality flag 74g of the main RAM 74 is set to "1" (step S112).

If the information abnormality flag 74g is not set to "1" (step S112: NO), it means that the power failure processing at the time of the previous power failure was executed normally and no information abnormality occurred in the main RAM 74. means. In this case, by writing the value of the stack pointer saved in the main RAM 74 to the stack pointer of the main MPU 72 and returning the data saved in the main RAM 74 to the register of the main MPU 72, the register of the main MPU 72 The state is restored to the state before the power was cut off (step S113). Also, the power failure flag in the main RAM 74 is cleared to "0" (step S114). Also, a power recovery command for recognizing the execution of power recovery processing is transmitted to the effect side MPU 92 (step S115).

Thereafter, execution of timer interrupt processing (FIG. 19) is permitted (step S116). Execution of the timer interrupt process (FIG. 19) is not permitted at the timing when the supply of operating power to the main MPU 72 is started. allowed to run. As a result, timer interrupt processing (FIG. 19) is started periodically. After that, it returns to the address before the power is cut off (step S117).

If the information abnormality flag 74g is set to "1" (step S112: YES), the operation prohibition process is executed. In the operation prohibition process, all the output ports of the main MPU 72 are cleared to "0" to turn off all actuators connected to the output ports (step S118), and the hall manager or the like is notified of the occurrence of an error. Then, an error notification process is executed (step S119). And it becomes an infinite loop. Even if the supply of operating power to the main MPU 72 is stopped, the operation prohibition process is executed again when the supply of operating power is started until the setting change process (FIG. 15) described later is performed. be. When setting change processing (FIG. 15), which will be described later, is executed, execution of operation prohibition processing is avoided.

FIG. 14 is a time chart showing how the information abnormality flag 74g is used to specify that the main RAM 74 has an information abnormality. FIG. 14(a) shows the period during which the main process (FIG. 10) is executed, FIG. 14(b) shows the state of the information abnormality flag 74g, and FIG. 14(c) shows the abnormality detection process (step S105 to step S109) are executed, and FIG. 14D shows a period during which the operation prohibition process (steps S118 and S119) is executed.

First, the case where no information abnormality occurs in the main RAM 74 will be described.

When the supply of operating power to the main MPU 72 is started, main processing (FIG. 10) is started in the main MPU 72 as shown in FIG. After the information abnormality flag 74g is set to "1" at the timing t2 as shown in FIG. 14(b), the abnormality is grasped as shown in FIG. (steps S105 to S109) are executed. In this case, it is not specified that the information abnormality has occurred in the main RAM 74 in the abnormality detection process (steps S105 to S109). Therefore, at the timing of t4, the information abnormality flag 74g is cleared to "0" as shown in FIG. 14(b), so the operation prohibition process (steps S118 and S119) is not executed as shown in FIG. 14(d). . After that, at the timing of t5, as shown in FIG. 14(a), the main processing (FIG. 10) ends, and the processing for advancing the game (timer interrupt processing (FIG. 19), normal processing (FIG. 25)) starts. be done.

Next, the case where information abnormality occurs in the main RAM 74 will be described.

When the supply of operating power to the main MPU 72 is started, main processing (FIG. 10) is started in the main MPU 72 as shown in FIG. After the information abnormality flag 74g is set to "1" as shown in FIG. 14(b) at the timing t7, the abnormality is grasped as shown in FIG. (steps S105 to S109) are executed. In this case, it is identified that an information abnormality has occurred in the main RAM 74 in the abnormality detection process (steps S105 to S109). Therefore, as shown in FIG. 14(b), the state in which the information abnormality flag 74g is set to "1" is maintained, so that the operation prohibition process (step S118) is performed at the timing t9 as shown in FIG. and step S119) is started.

After the information abnormality flag 74g, which is a flag for specifying whether or not an information abnormality has occurred in the main side RAM 74, is set to "1" by the main side MPU 72 as described above, an information abnormality is detected in the main side RAM 74. Abnormality grasping processing is executed for executing various determinations as to whether or not an abnormality has occurred. Then, when it is specified that an information abnormality has occurred in the main RAM 74 in the abnormality grasping process, the state in which the information abnormality flag 74g is set to "1" is maintained. When it is specified that no information abnormality has occurred in the main RAM 74 in the processing of 1), the information abnormality flag 74g is cleared to "0". When the information abnormality flag 74g remains set to "1", the operation prohibition process is executed, and when the value of the information abnormality flag 74g is "0", the operation prohibition process is executed. A process for progressing the game is started. In this way, the information abnormality flag 74g is first set to "1" and then cleared to "0" when it is determined that no information abnormality has occurred in the main RAM 74. Therefore, even if various determinations are not made as to whether or not an information abnormality has occurred in the main RAM 74 due to the occurrence of electrical noise, although an information abnormality has actually occurred, the operation is prohibited. Processing can be performed.

Returning to the description of the main processing (FIG. 10), when the setting key inserted into the setting key insertion hole 57 is turned ON when the supply of operating power is started, that is, when the setting change operation is performed (step S111). : YES), after executing the setting change process (step S120), the normal process is executed (step S121).

FIG. 15 is a flow chart showing the setting change process in step S120.

First, a start address setting process is executed (step S301). In the start address setting process, when executing the clear process for initializing the storage area of the main RAM 74 by clearing it to "0" at the start of the setting change process, the main RAM 74 to which the clear process is to be started is specified. Sets the address of the storage area. FIG. 16 is an explanatory diagram for explaining the contents of the storage area of the main RAM 74. As shown in FIG. As shown in FIG. 16, each storage area of the main RAM 74 is set with an address. The address is set as serial number information. Specifically, the address "0000" is set as the initial address, the address "0001" is set as the next address, and the address "0002" is set as the next address. The addresses are set so that the numbers are consecutive even after that.

A second CB winning data area, which is an area for storing the second CB winning data, is set as a storage area corresponding to the start address "0000". When the second CB winning data is selected in the winning lottery process (FIG. 34) to be described later, the second CB winning data is set in the second CB winning data area, and when the second CB winning is established, the second CB winning data. The second CB winning data is cleared from the area.

A first CB winning data area, which is an area for storing the first CB winning data, is set as a storage area corresponding to "0001" which is the next order to the start address "0000". When the first CB winning data is selected in the winning lottery process (FIG. 34) to be described later, the first CB winning data is set in the first CB winning data area, and when the first CB winning is established, the first CB winning data. The first CB winning data is cleared from the area.

A setting value storage area, which is an area for storing setting values to be used, is set as a storage area corresponding to "0002" which is next in order to "0001". The setting values selected in the setting change process (FIG. 15) are stored in the setting value storage area.

A continuous game number counter 74c is set as a storage area corresponding to "0003", a total winning number counter 74d is set as a storage area corresponding to "0004", and a credit card is set as a storage area corresponding to "0005". A counter 74b is set, and a door state area 74e is set as a storage area corresponding to "0006". Various storage areas are also set in the storage areas corresponding to "0007" to "k-3". The various storage areas include second section flags and the like, which will be described later. Also, a bet number history counter 74f is set as a storage area corresponding to "k-2", and a grant number history counter is set as a storage area corresponding to "k-1", which corresponds to "k". A pseudo-bonus status flag is set as a storage area to be used, a pseudo-bonus continuation counter is set as a storage area corresponding to "k+1", and a bet number setting counter 74a is set as a storage area corresponding to "k+2". A medium provision counter is set as a storage area corresponding to "k+3". For example, an information abnormality flag 74g is set as a storage area for addresses after "k+4". The information abnormality flag 74g has already been described, and the counters 74a to 74e and various areas 74f other than the information abnormality flag 74g will be described later.

In the process of setting the start address in step S301, "0001" is set as the start address in the clear target address provided in the register of the main MPU 72. FIG. Although the details will be described later, "0" clearing and initialization of the storage area of the main side RAM 74 are performed for the storage area of the address set as the clear target address, and then the clear target address is the next address in the order. The clear target address is incremented by 1 so that the clear target address is incremented by 1, and the storage area corresponding to the clear target address after the 1 addition is cleared to "0" and initialized. In this case, when "0001" is set as the start address in the clear target address, the storage area corresponding to the address after "0001" becomes the target of "0" clear and initialization, and the address of "0000" The corresponding storage area will not be subject to "0" clearing and initialization.

After that, it is determined whether or not information abnormality has occurred in the main RAM 74 by determining whether or not the information abnormality flag 74g of the main RAM 74 is set to "1" (step S302). Also, it is determined whether or not the reset button 56 is pressed when starting supply of operating power (step S303). If negative determinations are made in both steps S302 and S303, the process of correcting the start address is executed (step S304). In the start address correction process, the clear target address of the main MPU 72 is overwritten with "0000" as the corrected start address. When "0000" is set as the start address in the clear target address, all storage areas of the main side RAM 74 are targeted for "0" clear and initialization.

That is, when the setting change process is started in a situation where an information error has occurred in the main RAM 74 and the information error flag 74g is set to "1", the " 0” The storage areas to be cleared and initialized are all storage areas of the main RAM 74 . Further, even if the setting change process is started in a situation where no information abnormality has occurred in the main RAM 74 and the value of the information abnormality flag 74g is "0", the setting key will When not only the ON operation but also the pressing operation of the reset button 56 is executed, all the storage areas of the main side RAM 74 are the target of "0" clearing and initialization executed at the start of the setting change process. storage area.

If an affirmative determination is made in step S302, if an affirmative determination is made in step S303, or if the process of step S304 is executed, the storage area of the main RAM 74 corresponding to the address set as the clear target address is cleared to " 0” is cleared and initialization is executed (step S305). Thereafter, update processing of the clear target address is executed (step S306). In the update process, by adding 1 to the value of the clear target address, the address set as the clear target address is changed to the next address in the order of the addresses of the main RAM 74 . Then, it is determined whether or not the updated address exceeds the end address, which is the last address in the main RAM 74 (step S307). If a negative determination is made in step S307, the storage area of the updated address is cleared to "0" and initialized (step S305), and the processing of steps S306 and S307 is performed again. If an affirmative determination is made in step S307, it means that the clearing process of the main RAM 74 has ended. In this case, the process proceeds to step S308.

Here, how the clearing process of the main RAM 74 is executed in the setting change process will be described with reference to the time chart of FIG. 17 . 17(a) shows a period during which operating power is supplied to the main MPU 72, FIG. 17(b) shows a period during which main processing (FIG. 10) is executed in the main MPU 72, 17c) shows a period during which the setting key inserted into the setting key insertion hole 57 is turned on as a setting change operation, and FIG. 17d shows a period during which the reset button 56 is pressed. 17(e) shows the state of the information abnormality flag 74g, FIG. 17(f) shows the period during which the setting change process (FIG. 15) is executed in the main MPU 72, and FIG. 17(g) shows the main RAM 74. FIG. 17(h) shows a period during which the clearing process is performed on the entire storage area of the main RAM 74. FIG.

First, the case where the supply of operating power is started without pressing the reset button 56 and the setting change process is executed under the condition that no information abnormality has occurred in the main RAM 74 will be described.

At the timing t1, supply of operating power to the main MPU 72 is started as shown in FIG. ) is started. Further, as shown in FIG. 17(c), a setting change operation is performed at the start of supply of operating power. After that, at timing t2, the information abnormality flag 74g is set to "1" as shown in FIG. 17(e). By specifying that no information abnormality has occurred in the main RAM 74, the information abnormality flag 74g is cleared to "0" at the timing of t3.

After that, at the timing of t4, the setting change process (FIG. 15) is started in the main MPU 72 as shown in FIG. 17(f). When the setting change process (FIG. 15) is started, the clearing process of the main RAM 74 is executed. The value of the information abnormality flag 74g is "0" as shown in FIG. 17(e), and the reset button 56 has not been pressed as shown in FIG. . Therefore, as shown in FIG. 17(g), a partial clear process is executed in which "0001" is set as the start address in the current clear process of the main RAM 74. FIG. In this case, as already explained, the second CB winning data area, which is a storage area in which the initial address is set in the main RAM 74, is excluded from the targets for "0" clearing and initialization, and for storage areas other than this area, "0" clearing and initialization are sequentially executed and are completed at timing t5 as shown in FIG. 17(g). As a result, even when the setting change process (FIG. 15) is executed, the information in the second CB winning data area can be maintained in the state before the last supply of operating power was stopped.

Next, regarding the case where the supply of operating power is started while the reset button 56 is being pressed and the setting change process is executed in a situation where an information abnormality has not occurred in the main RAM 74. explain.

At timing t6, supply of operating power to the main MPU 72 is started as shown in FIG. ) is started. Further, as shown in FIG. 17(c), a setting change operation is performed at the start of supply of operating power, and the reset button 56 is pressed as shown in FIG. 17(d). After that, at the timing t7, the information abnormality flag 74g is set to "1" as shown in FIG. 17(e). By specifying that no information abnormality has occurred in the main RAM 74, the information abnormality flag 74g is cleared to "0" at the timing of t8.

After that, at the timing of t9, the setting change process (FIG. 15) is started in the main MPU 72 as shown in FIG. 17(f). When the setting change process (FIG. 15) is started, the clearing process of the main RAM 74 is executed. As shown in FIG. 17(e), the value of the information abnormality flag 74g is "0". On the other hand, as shown in FIG. 17(d), the reset button 56 is pressed at the start of the current supply of operating power, and the pressing operation is continued at the timing of t9. Therefore, in the current clearing process of the main RAM 74, as shown in FIG. 17(h), the all-clearing process in which "0000" is set as the start address is executed. In this case, all storage areas of the main side RAM 74 including the second CB winning data area, which is a storage area in which the initial address is set in the main side RAM 74, are sequentially cleared to "0" and initialized. Then, as shown in FIG. 17(h), it ends at the timing of t10. This makes it possible to initialize all storage areas of the main RAM 74 when the setting change process (FIG. 15) is executed.

Next, the case where the supply of operating power is started while the reset button 56 is not being pressed and the setting change process is executed while an information error has occurred in the main RAM 74. explain.

At the timing of t11, supply of operating power to the main MPU 72 is started as shown in FIG. ) is started. Further, as shown in FIG. 17(c), a setting change operation is performed at the start of supply of operating power. After that, at the timing of t12, the information abnormality flag 74g is set to "1" as shown in FIG. 17(e). By specifying that the information abnormality has occurred in the side RAM 74, the state in which the information abnormality flag 74g is set to "1" is maintained.

After that, at the timing of t13, as shown in FIG. 17(f), the main MPU 72 starts the setting change process (FIG. 15). When the setting change process (FIG. 15) is started, the clearing process of the main RAM 74 is executed. As shown in FIG. 17(e), the value of the information abnormality flag 74g is "1". Therefore, in the current clearing process of the main RAM 74, as shown in FIG. 17(h), the all-clearing process in which "0000" is set as the start address is executed. In this case, all storage areas of the main side RAM 74 including the second CB winning data area, which is a storage area in which the initial address is set in the main side RAM 74, are sequentially cleared to "0" and initialized. Then, as shown in FIG. 17(h), it ends at the timing of t14. As a result, when the setting change process (FIG. 15) is executed in a situation where an information error has occurred in the main RAM 74, the setting value is changed after initializing all the storage areas of the main RAM 74. It is possible to start the process for

Returning to the description of the setting change process (FIG. 15), if the determination in step S307 is affirmative, a setting change start command is transmitted to the effect side MPU 92 (step S308). When the setting change start command is received, the effect side MPU 92 controls the upper lamp 61, the speaker 62, and the image display device 63 so that a notification indicating that the setting value is being changed is executed. In this case, the image display device 63 may be configured to display an image that allows the manager of the game hall to recognize the operation content for changing the set value.

Thereafter, setting change execution processing is executed (step S309). FIG. 18 is a flowchart showing setting change execution processing.

First, execution of timer interrupt processing (FIG. 19) is permitted (step S401). Execution of the timer interrupt process (FIG. 19) is not permitted at the timing when the supply of operating power to the main MPU 72 is started, but the setting change process (FIG. 15) is executed in the main process (FIG. 10). If yes, execution of the timer interrupt process (FIG. 19) is permitted by executing the process of step S401 of the setting change execution process (FIG. 18). As a result, timer interrupt processing (FIG. 19) is started periodically.

FIG. 19 is a flowchart showing timer interrupt processing. Note that the timer interrupt process is activated, for example, every 1.49 milliseconds.

First, further interrupts in the timer interrupt process (FIG. 19) are prohibited (step S501). After that, register save processing is executed (step S502). In the register saving process, the values of all the registers in the main MPU 72 used in the normal process (FIG. 25) to be described later are saved in the main RAM 74 . After that, power failure processing is executed (step S503). The contents of the power failure process have already been explained. After that, in order to rotate the reels 32L, 32M, 32R, stepping motor control processing is performed to drive the stepping motors provided for the respective reels 32L, 32M, 32R (step S504). Also, a sensor monitoring process is executed (step S505).

FIG. 20(a) is a flow chart showing the sensor monitoring process. First, shift processing of the detection state storage area is executed (step S601). FIG. 20(b) is an explanatory diagram for explaining the contents of the detection state storage area provided in the main RAM 74. As shown in FIG. As shown in FIG. 20B, the main RAM 74 is provided with a current reset storage area 74h and a previous reset storage area 74i as detection state storage areas. Information corresponding to the state of the reset button 56 grasped in the most recent sensor monitoring process (FIG. 20(a)) is stored in the reset status storage area 74h. Specifically, a HI level signal indicating that the reset button 56 is being pressed is received as a detection signal from the reset button 56 in the most recent sensor monitoring process (FIG. 20(a)). When the reset status storage area 74h is being pressed, information "1" is stored in the reset status storage area 74h, and when a LOW level signal indicating that the reset button 56 is not pressed is received, the reset status storage area 74h is stored. Clear "0". Further, in the previous reset storage area 74i, information corresponding to the state of the reset button 56 ascertained in the sensor monitoring process (FIG. 20(a)) of the previous process is stored. Specifically, a HI level signal indicating that the reset button 56 is being pressed is used as the detection signal from the reset button 56 in the sensor monitoring process (FIG. 20(a)) performed immediately before the process. If received, the information "1" is stored in the previous reset storage area 74i, and if a LOW level signal indicating that the reset button 56 is not pressed is received, the previous reset. The information in the storage area 74i is "0".

In the shift processing of the detection state storage area in step S601, the information stored in the current reset storage area 74h is overwritten in the previous reset storage area 74i. Thereafter, the signal received from the reset button 56 is specified, and if the specified signal is HI level (step S602: YES), "1" is set in the reset status storage area 74h (step S603). If the identified signal is at LOW level (step S602: NO), the reset status storage area 74h is cleared to "0" (step S604).

If the process of step S603 or step S604 has been executed, other processes are executed (step S605). In the other processing, processing for specifying the contents of detection signals from various sensors other than the sensor that detects pressing operation of the reset button 56 is executed.

Returning to the description of the timer interrupt processing (FIG. 19), after executing the sensor monitoring processing, timer subtraction processing for subtracting the values of the respective counters and timers is executed (step S506). Also, command output processing for transmitting various commands to the effect side MPU 92 is executed (step S507). Also, port output processing for outputting data corresponding to the I/O device from the input/output port is executed (step S508). In the port output process, the dual-use display unit 66 is operated so as to display the number corresponding to the value of the medium supply counter of the main side RAM 74, which will be described later, when the stop order of the reels 32L, 32M, and 32R is not notified. display control. If the value of the medium provision counter is "0" in a situation where the stop order of the reels 32L, 32M, and 32R is not notified, the combined display section 66 is turned off. Further, control processing of the bet display unit 64 is executed so that the display corresponding to the number of bets is executed on the bet display unit 64 (step S509). Also, a management process is executed for managing the game history and displaying the content corresponding to the management result on the combined display section 66 (step S510). Specifically, the ratio of the total number of games in the second section SC2, which will be described later, to the total number of games is calculated, and the ratio of the calculation result is displayed on the combined display section 66. FIG. After that, the values of each register saved in the main RAM 74 in the previous step S502 are returned to the corresponding registers in the main MPU 72 (step S511), and the execution of the next timer interrupt process (FIG. 19) is permitted. (step S512).

Returning to the description of the setting change execution process (FIG. 18), after permitting execution of the timer interrupt process (FIG. 19) in step S401, it is determined whether or not the timer interrupt process (FIG. 19) has been executed (step S402), and waits in step S402 until timer interrupt processing (FIG. 19) is executed. Although the processing configuration for specifying whether or not the timer interrupt processing (FIG. 19) has been executed is arbitrary, in the present slot machine 10, an executed flag is provided in the register of the main side MPU 72, and the main side MPU 72 When the supply of operating power is started, the executed flag is cleared to "0", and the executed flag is set to "1" each time the timer interrupt process (FIG. 19) is executed thereafter. process is executed. In this case, in step S402, it is determined whether or not the executed flag in the register of the main MPU 72 is set to "1". A determination is made, and if the executed flag is set to "1", an affirmative determination is made in step S402. If an affirmative determination is made in step S402, the executed flag of the register of the main MPU 72 is cleared to "0" (step S403).

After that, it is determined whether or not the value in the setting value storage area provided in the main RAM 74 is 6 or more (step S404). The setting value storage area is an area for specifying the setting value that is the current selection target in the main side MPU 72 . When the value of the setting value storage area is "0", the setting value to be selected is "1", and when the value of the setting value storage area is "1", it is to be selected. If the value in the setting value storage area is "2", the setting value to be selected is "3", and the value in the setting value storage area is "3". , the setting value to be selected is "4", and when the value in the setting value storage area is "4", the setting value to be selected is "5". When the value in the setting value storage area is "5", the setting value to be selected is "6". If the value in the setting value storage area is 6 or more, it means that the value in the setting value storage area exceeds the maximum value, so the setting value storage area is cleared to "0" (step S405). As a result, the set value to be selected becomes "1".

If a negative determination is made in step S404, or if the processing of step S405 is executed, it is determined whether timer interrupt processing (FIG. 19) has been executed (step S406), and timer interrupt processing (FIG. 19) is executed. It waits in step S406 until it is done. Specifically, similarly to step S402, it is determined whether or not the executed flag in the register of the main MPU 72 is set to "1". The executed flag is cleared to "0" when an affirmative determination is made in step S402, and furthermore, as already explained, the executed flag is set to "1" each time the timer interrupt process (FIG. 19) is executed. processing is executed. Therefore, in step S406, it is determined whether or not the timer interrupt process (FIG. 19) has been executed at least once since the affirmative determination was made in step S402. If the executed flag is not set to "1", a negative determination is made in step S406, and if the executed flag is set to "1", an affirmative determination is made in step S406. If an affirmative determination is made in step S406, the executed flag of the register of the main MPU 72 is cleared to "0" (step S407).

After that, it is determined whether or not the start lever 41 is turned ON (step S408). When the start lever 41 is turned ON while the setting change execution process is being executed, the setting value that is the selection target is confirmed as the use target. If the start lever 41 has not been turned ON (step S408: NO), it is determined whether or not the reset button 56 has been pressed (step S409). Specifically, the information stored in the previous reset storage area 74i of the main RAM 74 is "0" corresponding to the fact that the reset button 56 is not pressed, and the current reset storage area of the main RAM 74 is "0". It is determined whether or not the information stored in 74h is "1" corresponding to the pressing operation of the reset button 56 being performed. If a negative determination is made in step S409, the process returns to step S406. If an affirmative determination is made in step S409, 1 is added to the value in the set value storage area of the main RAM 74 (step S410). After that, the process returns to step S404, and if the value in the set value storage area after adding 1 is 6 or more (step S404: YES), after clearing the set value storage area to "0" (step S405), step The processing after S406 is executed. If the start lever 41 has been turned ON (step S408: YES), the system waits until the setting key inserted into the setting key insertion hole 57 is turned OFF (step S411: NO), and the setting key is turned OFF. If the OFF operation has been performed (step S411: YES), this setting change execution process is terminated.

In other words, in a situation where the setting change execution process is being executed, the set value to be selected is changed to the set value of the advantage one level higher every time the reset button 56 is pressed. When the reset button 56 is pressed when the set value is already set to "6", which is the highest degree of advantage, the set value storage area is cleared to "0", and the value is set to "1", which is the lowest advantage. set value. Also, when the start lever 41 is turned ON, the set value to be selected is determined to be used, and then the setting key inserted into the setting key insertion hole 57 is turned OFF to change the setting. Execution processing ends.

In the setting change execution process, the processes of steps S402 and S406 are executed as described above, thereby determining whether or not the pressing operation of the reset button 56 is started after the setting change execution process (FIG. 18) is started. Before the determination process starts, an interrupt waiting period, which is a period for waiting for progress of the process until the timer interrupt process (FIG. 19) is newly executed, occurs twice. By setting these interrupt standby periods, the supply of operating power to the main MPU 72 is started when the reset button 56 is pressed, and the setting is changed when the reset button 56 is kept pressed. Even if the execution process (FIG. 18) is started, the setting value to be selected will not be changed by pressing the reset button 56 that is maintained. This content will be described with reference to the time chart of FIG.

FIG. 21 shows how, when the supply of operating power is started while the reset button 56 is pressed, the setting value to be selected is not changed by the pressing operation of the reset button 56 that is maintained. is a time chart showing FIG. 21(a) shows a period during which operating power is supplied to the main MPU 72, FIG. FIG. 21(d) shows a period during which the reset button 56 is pressed, and FIG. FIG. 21(f) shows the period during which the setting change execution process (FIG. 18) is executed, and FIG. ) indicates the period during which the timer interrupt process (FIG. 19) is executed, FIG. indicates the state of the reset current storage area 74h of the main side RAM 74, FIG. 21(j) indicates the state of the previous reset storage area 74i of the main side RAM 74, and FIG. indicates the specific timing of

At the timing t1, supply of operating power to the main MPU 72 is started as shown in FIG. ) is started. Further, as shown in FIG. 21(c), the setting key is turned ON at the start of supply of operating power, and the reset button 56 is pressed as shown in FIG. 21(d).

Since the setting key has been turned ON as described above, the setting change process (FIG. 15) is started thereafter. When the setting change process (FIG. 15) is started, the clearing process of the main RAM 74 is executed. , the pressing operation is continued at the timing of t2. Therefore, at the timing t2, as shown in FIG. 21(e), the clearing process for all the storage areas of the main RAM 74 is started. In this case, the reset current storage area 74h and the previous reset storage area 74i are also cleared to "0" by the clear processing.

After that, at the timing of t3, the clearing process is completed as shown in FIG. 21(e). At the timing t3, the setting change execution process (FIG. 18) is started as shown in FIG. 21(f). In this case, in the setting change execution process (FIG. 18), execution of the timer interrupt process (FIG. 19) is permitted in step S401, and the process waits until the timer interrupt process (FIG. 19) is executed in step S402. That is, an interrupt standby period occurs as shown in FIG. 21(h).

At the timing t4 in the interrupt standby period, the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18) as shown in FIG. 21(g). At the timing of t5 when the timer interrupt process (FIG. 19) is being executed, the sensor monitoring process (FIG. 20A) of step S505 in the timer interrupt process (FIG. 19) is executed to reset the reset button. It is specified whether or not 56 is being pressed. At the timing t5, the pressing operation of the reset button 56 is continued as shown in FIG. 21(d). Therefore, at the timing t5, "1" is set in the reset status storage area 74h as shown in FIG. 21(i). The information in the previous reset storage area 74i is maintained at "0". The timer interrupt processing (FIG. 19) ends at the timing t6 as shown in FIG. 21(g). As a result, the processing executed by the main MPU 72 returns to the setting change execution processing (FIG. 18).

Since the timer interrupt process (FIG. 19) has already been executed in the setting change execution process (FIG. 18), an affirmative determination is made in step S402, and the processes after step S403 are executed. Then, in step S406, it waits until the timer interrupt process (FIG. 19) is executed again. That is, as shown in FIG. 21(h), an interrupt standby period occurs at the timing of t7.

At the timing t8 in the interrupt standby period, the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18) as shown in FIG. 21(g). At the timing of t9 when the timer interrupt process (FIG. 19) is being executed, the sensor monitoring process (FIG. 20A) of step S505 in the timer interrupt process (FIG. 19) is executed. In this case, the information stored in the current reset storage area 74h is first shifted to the previous reset storage area 74i. As shown in FIG. 21(j), "1" is set in the previous reset storage area 74i. Further, whether or not the reset button 56 is pressed is specified in the sensor monitoring process (FIG. 20(a)). At the timing t9, the pressing operation of the reset button 56 is continued as shown in FIG. 21(d). Therefore, at the timing t9, "1" is set in the reset status storage area 74h as shown in FIG. 21(i). The timer interrupt processing (FIG. 19) ends at the timing t10 as shown in FIG. 21(g). As a result, the process executed by the main MPU 72 returns to the setting change execution process (FIG. 18).

Since the timer interrupt process (FIG. 19) has already been executed in the setting change execution process (FIG. 18), an affirmative determination is made in step S406, and the processes after step S408 are executed. Then, at the timing of t11, as shown in FIG. 21(k), processing for determining whether or not the pressing operation of the reset button 56 is started in step S409 is executed. Specifically, the information stored in the previous reset storage area 74i of the main RAM 74 is "0" corresponding to the fact that the reset button 56 is not pressed, and the current reset storage area of the main RAM 74 is "0". It is determined whether or not the information stored in 74h is "1" corresponding to the pressing operation of the reset button 56 being performed. In this case, the information in the previous reset storage area 74i is "1" as shown in FIG. 21(j), and the information in the current reset storage area 74h is "1" as shown in FIG. 21(i). Therefore, in step S409, it is not determined that the reset button 56 has been pressed. As a result, when the supply of operating power is started while the reset button 56 is being pressed, the setting value to be selected is not changed by the pressing operation of the reset button 56 that is maintained. It becomes possible to

Thereafter, at time t12, step S406 of the setting change execution process (FIG. 18) is executed. At step S406, the process waits until the timer interrupt process (FIG. 19) is executed again. That is, as shown in FIG. 21(h), an interrupt standby period occurs at the timing of t12. At the timing of t13 in the interrupt waiting period, the pressing operation of the reset button 56 is released as shown in FIG. 21(d). Also, at the timing of t14, as shown in FIG. 21(g), the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18). At the timing of t15 when the timer interrupt process (FIG. 19) is being executed, the sensor monitoring process (FIG. 20A) of step S505 in the timer interrupt process (FIG. 19) is executed. In this case, the information stored in the current reset storage area 74h is first shifted to the previous reset storage area 74i. As shown in FIG. 21(j), "1" is set in the previous reset storage area 74i. Further, whether or not the reset button 56 is pressed is specified in the sensor monitoring process (FIG. 20(a)). At the timing of t15, the reset button 56 is not pressed as shown in FIG. 21(d). Therefore, at the timing of t15, the reset status storage area 74h is cleared to "0" as shown in FIG. 21(i). The timer interrupt processing (FIG. 19) ends at the timing of t16 as shown in FIG. 21(g). As a result, the process executed by the main MPU 72 returns to the setting change execution process (FIG. 18).

Since the timer interrupt process (FIG. 19) has already been executed in the setting change execution process (FIG. 18), an affirmative determination is made in step S406, and the processes after step S408 are executed. Then, at the timing of t17, as shown in FIG. 21(k), processing for determining whether or not the pressing operation of the reset button 56 is started in step S409 is executed. Specifically, the information stored in the previous reset storage area 74i of the main RAM 74 is "0" corresponding to the fact that the reset button 56 is not pressed, and the current reset storage area of the main RAM 74 is "0". It is determined whether or not the information stored in 74h is "1" corresponding to the pressing operation of the reset button 56 being performed. In this case, the information in the previous reset storage area 74i is "1" as shown in FIG. 21(j), and the information in the current reset storage area 74h is "0" as shown in FIG. 21(i). Therefore, in step S409, it is not determined that the reset button 56 has been pressed.

Thereafter, at time t18, step S406 of the setting change execution process (FIG. 18) is executed. At step S406, the process waits until the timer interrupt process (FIG. 19) is executed again. That is, as shown in FIG. 21(h), an interrupt standby period occurs at the timing of t18. At the timing of t19 in the interrupt standby period, the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18) as shown in FIG. 21(g). At the timing of t20 when the timer interrupt process (FIG. 19) is being executed, the sensor monitoring process (FIG. 20A) of step S505 in the timer interrupt process (FIG. 19) is executed. In this case, the information stored in the current reset storage area 74h is first shifted to the previous reset storage area 74i. j), the previous reset storage area 74i is cleared to "0". Further, whether or not the reset button 56 is pressed is specified in the sensor monitoring process (FIG. 20(a)). At the timing t20, the reset button 56 is not pressed as shown in FIG. 21(d). Therefore, at the timing of t20, the reset status storage area 74h is cleared to "0" as shown in FIG. 21(i). The timer interrupt processing (FIG. 19) ends at the timing of t21 as shown in FIG. 21(g). As a result, the process executed by the main MPU 72 returns to the setting change execution process (FIG. 18).

If the determination in step S406 is affirmative, the executed flag of the main MPU 72 is cleared to "0" in step S407. Timer interrupt processing (FIG. 19) is never executed. Therefore, when step S406 is executed again after an affirmative determination is made in step S406, an interrupt standby period is certainly generated at that time, and the timer interrupt process (FIG. 19) is performed once during the interrupt standby period. Canceled by executing.

As described above, in the setting change execution process (FIG. 18), by executing the processes in steps S402 and S406, it is determined whether or not the reset button 56 has been pressed since the setting change execution process (FIG. 18) was started. By the time the first determination process is started, an interrupt waiting period, which is a period for waiting for progress of the process until the timer interrupt process (FIG. 19) is newly executed, occurs twice. By setting these interrupt standby periods, the supply of operating power to the main MPU 72 is started when the reset button 56 is pressed, and the setting is changed when the reset button 56 is kept pressed. Even if the execution process (FIG. 18) is started, the reset is performed at the time when the first determination process of whether or not the pressing operation of the reset button 56 is started after the setting change execution process (FIG. 18) is started. The content of the information in the previous storage area 74i and the reset current storage area 74h indicates that the pressing operation of the reset button 56 is being continued. Therefore, in step S409, it is not determined that the reset button 56 has been pressed. As a result, when the supply of operating power is started while the reset button 56 is being pressed, the setting value to be selected is not changed by the pressing operation of the reset button 56 that is maintained. It becomes possible to

Returning to the description of the setting change process (FIG. 15), after executing the setting change execution process of step S309, a setting change end command is transmitted to the effect side MPU 92 (step S310). When the effect-side MPU 92 receives the setting change end command, it controls the upper lamp 61, the speaker 62, and the image display device 63 so as to end the notification indicating that the setting value is being changed. Thereafter, reset state information is set in the door state area 74e of the main RAM 74 (step S311).

The door state area 74e is an area referred to when the main MPU 72 specifies whether or not a change in the open/closed state of the front door 12 with respect to the housing 11 has occurred. FIG. 22 is a flow chart showing monitoring processing of the door opening sensor 16 executed in the main MPU 72 in other processing (step S605) of the sensor monitoring processing (FIG. 20(a)).

If a signal corresponding to the open state of the front door 12 is received from the door open sensor 16 (step S701: YES), it is determined whether or not the information stored in the door state area 74e is open information. Determine (step S702). The open information is information indicating that a signal corresponding to the open state of the front door 12 was received from the door open sensor 16 in the processing immediately before this monitoring processing. If open information is stored in the door state area 74e (step S702: YES), this monitoring process is terminated. If the information in the door status area 74e is information other than open information (step S702: NO), that is, if closed information is stored in the door status area 74e, reset status information is stored in the door status area 74e. If so, or if the information in the door state area 74e is "0", an open command is transmitted to the effect side MPU 92 (step S703). When the production side MPU 92 receives the open command, it controls the upper lamp 61, the speaker 62 and the image display device 63 so that the notification indicating that the front door 12 is open is executed.

After that, open information is stored in the door state area 74e (step S704). As a result, even if the signal corresponding to the open state of the front door 12 from the door open sensor 16 continues to be received in the next process of this monitoring process, the open information is stored in the door state area 74e. By making an affirmative determination in step S702 due to the fact that the opening command is not newly transmitted. Therefore, it is possible to prevent the open command from being repeatedly transmitted while the front door 12 is maintained in the open state.

When the signal corresponding to the closed state of the front door 12 is received from the door open sensor 16 (step S701: NO), it is determined whether or not the information stored in the door state area 74e is closed information. Determine (step S705). The closed information is information indicating that a signal corresponding to the closed state of the front door 12 was received from the door open sensor 16 in the processing immediately before this monitoring processing. If closed information is stored in the door state area 74e (step S705: YES), this monitoring process is terminated. When information other than closed information is stored in the door state area 74e (step S705: NO), that is, when open information is stored in the door state area 74e, reset state information is stored in the door state area 74e. If there is, or if the information in the door state area 74e is "0", a close command is transmitted to the effect side MPU 92 (step S706). When the effect-side MPU 92 receives the closing command, after finishing the notification indicating that the front door 12 is in the open state, the notification indicating that the front door 12 has changed from the open state to the closed state is executed. Also controls the upper lamp 61 , the speaker 62 and the image display device 63 . The notification of the closed state continues for 30 seconds unless the front door 12 is newly opened. When the front door 12 is newly opened, the notification that the front door 12 is open is started again.

After that, closed information is stored in the door state area 74e (step S707). As a result, even if the reception of the signal corresponding to the closed state of the front door 12 from the door open sensor 16 continues in the next process of this monitoring process, the closed information is stored in the door state area 74e. By making an affirmative determination in step S705 because it has been done, no new transmission of the closing command is performed. Therefore, it is possible to prevent the closing command from being repeatedly transmitted while the front door 12 is maintained in the closed state.

FIG. 23 is a flow chart showing the notification process executed by the effect-side MPU 92. As shown in FIG. The notification process is repeatedly executed in a relatively short cycle (for example, 2 milliseconds) by the effect side MPU 92 .

If a setting change start command has been received (step S801: YES), a setting change in-progress notification start process is executed (step S802). In the start process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so as to start notification indicating that the setting value is being changed. In this case, the image display device 63 may be configured to display an image that allows the manager of the game hall to recognize the operation content for changing the set value. Further, after the start process is executed, the upper lamp 61 is controlled so that the content of the setting change in-progress notification is continued or updated by other processes in step S818 until a setting change end command is received from the main MPU 72 . , the speaker 62 and the image display device 63 are controlled.

If an open command has been received (step S803: YES), if a setting change notification is being executed (step S804: YES), no processing is executed in response to the reception of the open command, and the End the process. Thereby, it is possible to give priority to the notification during setting change over the notification during door opening indicating that the front door 12 is in the open state. If an open command has been received (step S803: YES) and if setting change notification is not being executed (step S804: NO), the door open notification start process is executed (step S805). In the start process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door-opening notification indicating that the front door 12 is open is started. Further, after the start process is executed, until the close command is received from the main MPU 72, other processes in step S818 are performed so that the upper lamp 61, speaker 62 and the image display device 63 are controlled.

If the setting change end command has been received (step S806: YES), end processing for notification during setting change is executed (step S807). In the ending process, the upper lamp 61, the speaker 62 and the image display device 63 are controlled so that the notification during setting change is ended. Also, a clearing process of the effect-side RAM 94 is executed (step S808). In the clear processing, each storage area of the effect side RAM 94 is cleared to "0" and initialized. As a result, when setting values to be used are set in the main MPU 72, not only each storage area of the main RAM 74 but also each storage area of the effect RAM 94 can be initialized. Become. When the production side RAM 94 is initialized, the upper lamp 61, the speaker 62 and the image display device 63 perform post-initialization notification.

If the closing command has been received (step S809: YES), if the setting change notification is being executed (step S810: YES), no processing is executed in response to the reception of the closing command. End the process. Thereby, it is possible to give priority to the notification during setting change over the door closed notification indicating that the front door 12 has changed from the open state to the closed state. If the close command has been received (step S809: YES) and the setting change notification is not being executed (step S810: NO), the door opening notification ending process is executed (step S811). In the termination process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door open notification indicating that the front door 12 is open is terminated.

After that, the start processing of the door closing notification is executed (step S812). In the start process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door closing notification indicating that the front door 12 has changed from the open state to the closed state is started. Further, after the execution of the start process, until the door closing notification period (specifically, 30 seconds) elapses, the content of the door closing notification is continued or updated in other processes in step S818. It controls the upper lamp 61 , the speaker 62 and the image display device 63 . In addition, the setting processing of the door closing notification counter provided in the production side RAM 94 is executed (step S813). In the setting process, information corresponding to the door closing notification period (specifically, 30 seconds) is set in the door closing notification counter.

When the value of the door closing notification counter of the effect side RAM 94 is 1 or more (step S814: YES), 1 is subtracted from the value of the door closing notification counter (step S815). Then, by determining whether or not the value of the door closing notification counter after subtracting 1 is "0", it is determined whether or not the door closing notification period has elapsed since the start of the door closing notification ( step S816). If the value of the door closing notification counter is "0" (step S816: YES), end processing of the door closing notification is executed (step S817). In the termination process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door closing notification indicating that the front door 12 has changed from the open state to the closed state is terminated.

Next, how various notifications are executed when the supply of operating power is started and the setting change process (FIG. 15) is executed will be described with reference to the time chart of FIG. FIG. 24(a) shows a period during which operating power is supplied to the main MPU 72, FIG. c) shows the period during which the front door 12 is open, FIG. 24(d) shows the period during which the storage area of the main side RAM 74 is being cleared, and FIG. FIG. 24(f) shows the period during which the process (FIG. 18) is being executed, and FIG. 24(h) shows the period during which the door open notification is executed, and FIG. 24(i) shows the period during which the door closed notification is executed.

At the timing t1 when the front door 12 is open as shown in FIG. At the timing of , main processing (FIG. 10) is started in the main MPU 72 as shown in FIG. 24(b). Also, since the front door 12 is opened and the setting key is turned ON when the supply of operating power is started, the setting change process (FIG. 15) is started at the timing of t2. When the setting change process (FIG. 15) is started, the clearing process of the main RAM 74 is executed. No information abnormality has occurred in the main side RAM 74 either. Therefore, at the timing of t2, as shown in FIG. 24(d), the clearing process for part of the storage area of the main RAM 74 is started. In this case, the door status area 74e is also cleared to "0" by the clearing process, so that neither the open information nor the closed information is stored in the door status area 74e. The state in which execution of timer interrupt processing (FIG. 19) is prohibited continues from the start of supply of operating power.

After that, at the timing of t3, the clearing process is completed as shown in FIG. 24(d). At the timing t3, the setting change execution process (FIG. 18) is started as shown in FIG. 24(e). In addition, the setting change start command is transmitted from the main side MPU 72 to the effect side MPU 92 by executing the processing of step S308 in the setting change processing (FIG. 15) immediately before the setting change execution processing (FIG. 18) is started. be. Therefore, as shown in FIG. 24(f), the notification during setting change is started at the timing of t3. In the setting change execution process (FIG. 18), execution of the timer interrupt process (FIG. 19) is permitted in step S401, and the open information is not stored in the door state area 74e. In 19), an opening command is transmitted to the effect side MPU 92 in the process of monitoring the door opening sensor 16, but since the setting change notification has already started, the door opening notification is not started.

After that, at the timing of t4, the setting change execution process (FIG. 18) ends as shown in FIG. 24(e). In this case, a setting change end command is transmitted from the main side MPU 72 to the effect side MPU 92 by executing the process of step S310 in the setting change process (FIG. 15). Therefore, as shown in FIG. 24(e), the notification during setting change is terminated at the timing of t4.

Thereafter, at time t5, the process of step S311 in the setting change process (FIG. 15) is executed, and the reset state information, which is neither the open information nor the closed information, is stored in the door state area 74e. After that, timer interrupt processing (FIG. 19) is executed, and monitoring processing (FIG. 22) of the door opening sensor 16 is executed in the timer interrupt processing (FIG. 19) at the timing of t6. In this case, since reset state information is stored in the door state area 74e when the front door 12 is open as shown in FIG. Therefore, at the timing t6, as shown in FIG. 24(h), the door opening notice is started. Since open information is set in the door state area 74e at the timing t6, no reset state information is stored in the door state area 74e as shown in FIG. 24(g).

After that, at the timing of t7, the front door 12 is closed as shown in FIG. 24(c). In this case, since open information is stored in the door state area 74e, when the monitoring process (FIG. 22) of the door open sensor 16 is executed in the timer interrupt process (FIG. 19), the close command is sent to the production side MPU 92. sent to. Therefore, at the timing t7, the door open notification is terminated as shown in FIG. 24(h), and the door closed notification is started as shown in FIG. 24(i). Closed information is set in the door state area 74e at the timing of 7. After that, when the door closing notification period (specifically, 30 seconds) elapses at the timing of t8, the door closing notification ends as shown in FIG. 24(i).

In the configuration in which the clearing process of the storage area of the main RAM 74 is executed when the setting change process (FIG. 15) is executed to set the setting value to be used as described above, the setting change execution process (FIG. ) is completed, the reset state information, which is neither the open information nor the closed information, is stored in the door state area 74e. As a result, when the front door 12 is in the open state after the setting change execution process (FIG. 18) is completed, the door open notification is started after the setting change notification is completed. Further, when the front door 12 is in the closed state when the setting change execution process (FIG. 18) is completed, the door closing notification is started after the setting change notification is finished. Therefore, when the setting change execution process (FIG. 18) is completed, either the door open notification or the door closed notification can be executed following the setting change notification. Therefore, it is possible to reliably notify either that the front door 12 is open or that the front door 12 is closed.

If the front door 12 is closed at the timing when the reset state information is set in the door state area 74e after the setting change execution process (FIG. 18) is completed, the timer interrupt process (FIG. 19) In the monitoring process of the door open sensor 16 (FIG. 22), it is specified that the front door 12 is in the closed state when the reset state information is stored in the door state area 74e. It is sent to the MPU 92 . In this case, the door closed notification is executed instead of the door open notification after the setting change notification.

Next, normal processing executed by the main MPU 72 will be described with reference to the flowchart of FIG.

First, start waiting processing is executed (step S901). FIG. 26 is a flowchart showing start waiting processing. First, it is determined whether or not a replay bet set flag provided in the main RAM 74 is set to "1" (step S1001). The replay bet set flag specifies whether or not the bet setting for the same number of bets as the previous bet number has already been completed when any of the replay winnings have been established in the previous game. is a flag for If a negative determination is made in step S1001, on the condition that any replay winning has been established in the previous game (step S1002: YES), the bet number setting counter 74a provided in the main side RAM 74 (FIG. 9 ), the value of the bet number history counter 74f similarly provided in the main side RAM 74 is set (step S1003). The bet number setting counter 74a is a counter for specifying the bet number of the game to be executed by the main side MPU 72, and the bet number history counter 74f is for specifying the bet number of the previous game by the main side MPU 72. is a counter. After that, the replay bet set flag is set to "1" (step S1004).

When the determination in step S1001 is affirmative, when the determination in step S1002 is negative, or when the process of step S1004 is executed, a bet handling process is executed (step S1005). FIG. 27 is a flowchart showing bet handling processing.

If the current gaming state is not the second CB state ST3 (step S1101: NO), "3" is set as the upper limit number of bets, which is the upper limit number of game media that can be betted in the current game (step S1102). If the current gaming state is the second CB state ST3 (step S1101: YES), the upper limit number of bets, which is the upper limit number of game media that can be betted in the current game, is set to "2" (step S1103). That is, in the slot machine 10, the maximum bet number is set to "2" in the case of the second CB state ST3, and the maximum bet number is set to "3" in the case of not being in the second CB state ST3.

When the process of step S1102 or step S1103 is executed, on condition that the value of the bet number setting counter 74a of the main side RAM 74 is not the current bet upper limit number (step S1104: NO), the stored virtual medals are It is determined whether or not an effective bet operation has been performed with one or more cards (step S1105). The main RAM 74 is provided with a credit counter 74b (see FIG. 9) as an area for storing the number of virtual medals stored. In step S1105, it is determined whether or not the value of the credit counter 74b is 1 or more, thereby determining whether or not there are one or more virtual medals stored. Further, when the first credit insertion button 47 is operated, it is determined that a valid betting operation has been performed, and when the second credit insertion button 48 is operated, the value of the bet number setting counter 74a is increased. It is determined that a valid bet operation has been made on condition that the number is 1 or less.

When an affirmative determination is made in step S1105, bet setting processing is executed (step S1106). In the bet setting process, when the first credit insertion button 47 is operated, if the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b is equal to or greater than the upper limit number of bets, the value of the bet number setting counter 74a is changed. In addition to setting the bet upper limit number, the value corresponding to the number of virtual medals used for the setting is subtracted from the credit counter 74b, and the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b is less than the bet upper limit number. If so, the value of the credit counter 74b is cleared to "0" after adding the value of the credit counter 74b to the bet number setting counter 74a. In addition, in the bet amount setting process, when the second credit insertion button 48 is operated, if the sum of the value of the bet amount setting counter 74a and the value of the credit counter 74b is 2 or more, the value of the bet amount setting counter 74a is set to "2", the value for the number of virtual medals used for the setting is subtracted from the credit counter 74b, and if the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b is less than 2 If there is, the value of the credit counter 74b is added to the bet number setting counter 74a, and then the value of the credit counter 74b is cleared to "0".

If affirmative determination is made in step S1104, if a negative determination is made in step S1105, or if the processing of step S1106 is executed, the inserted medal detection sensor 45a detects that medals have been inserted into the medal slot 45. It is determined whether or not one medal has been detected (step S1107). When the determination in step S1107 is affirmative, if the value of the bet number setting counter 74a of the main side RAM 74 is less than the bet upper limit number (step S1108: NO), the value of the bet number setting counter 74a is incremented by 1 (step S1109 ), if the value of the bet number setting counter 74a is greater than or equal to the bet upper limit number (step S1108: YES), the value of the credit counter 74b of the main side RAM 74 is incremented by 1 (step S1110). When the processing of step S1109 or step S1110 is executed, the value of the bet number setting counter 74a is equal to or greater than the bet upper limit number, and the value of the credit counter 74b is equal to or greater than the upper limit stored memory number (specifically, "50"). (step S1111: YES), reception prohibition processing is executed (step S1112). By executing the reception prohibiting process, even if a medal is inserted into the medal slot 45, the medal is ejected to the medal receiving tray 59 without being detected by the inserted medal detection sensor 45a.

If a negative determination is made in step S1107, if a negative determination is made in step S1111, or if the process of step S1112 is executed, it is determined whether or not the current gaming state is the first CB state ST2 (step S1113 ). If the current gaming state is the first CB state ST2 (step S1113: YES), on condition that the value of the bet number setting counter 74a is "3" (step S1114: YES), "1" is set in the bet set flag at the time of acceptance (step S1115). On the other hand, if the current gaming state is not the first CB state ST2 (step S1113: NO), on condition that the value of the bet number setting counter 74a is 2 or more (step S1116: YES), the bet setting at the time of acceptance has been completed. The flag is set to "1" (step S1115).

The bet set completion flag at the time of acceptance is a flag for specifying in the main side MPU 72 whether or not the number of game media capable of starting one game has been betted. When the gaming state is the first CB state ST2, a single game cannot be started in a state where "3" game media are not betted. It is possible to start one game. Further, when the gaming state is not the first CB state ST2, one game cannot be started in a state where two or more game media are not betted, and two or more game media are betted. It is possible to start one game.

Returning to the description of the start waiting process (FIG. 26), after executing the bet handling process in step S1005, it is determined whether or not the settlement button 51 has been operated (step S1006). If the settlement button 51 has been operated (step S1006: YES), after executing settlement processing (step S1007), the bet set completion flag at the time of acceptance in the main side RAM 74 is cleared to "0" (step S1008). In the settlement process of step S1007, if the bet set flag at the time of replay in the main RAM 74 is not set to "1", the number of bets corresponding to the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b The hopper device 53 is driven and controlled so that the medals are discharged to the medal receiving tray 59. In this case, the bet number setting counter 74a is cleared to "0" and the credit counter 74b is cleared to "0". On the other hand, when the bet set flag at the time of replay of the main RAM 74 is set to "1", the hopper device 53 is operated so that the number of medals corresponding to the value of the credit counter 74b is discharged to the medal receiving tray 59. Drive control. In this case, the credit counter 74b is cleared to "0".

The bet number setting counter 74a is set by executing the start waiting process as described above. As already described, the slot machine 10 is provided with the bet display section 64 on the front surface of the slot machine 10, and the bet display section 64 displays a value corresponding to the bet number setting counter 74a. The display control of the bet display section 64 is executed in the control processing of the bet display section 64 in step S509 of the timer interrupt processing (FIG. 19). FIG. 28 is a flow chart showing control processing of the bet display unit 64 .

When the value of the number-of-bets setting counter 74a is "0" (step S1201: YES), all lights-out processing is executed (step S1202). By executing the all-light-off process, all of the three light-emitting units arranged in the vertical direction in the bet display unit 64 are turned off.

When the value of the bet number setting counter 74a is "1" (step S1203: YES), the first lighting process is executed (step S1204). By executing the first lighting process, the lowermost light-emitting portion among the three light-emitting portions arranged in the vertical direction in the bet display portion 64 is turned on, and the remaining light-emitting portions are turned off.

When the value of the bet number setting counter 74a is "2" (step S1205: YES), the second lighting process is executed (step S1206). By executing the second lighting process, among the three light emitting units arranged in the vertical direction in the bed display unit 64, the bottom light emitting unit and the center light emitting unit are respectively turned on, and the top light emitting unit is turned off. state.

When the value of the bet number setting counter 74a is "3" (step S1205: NO), the third lighting process is executed (step S1207). By executing the third lighting process, all of the three light-emitting portions arranged in the vertical direction in the bet display portion 64 are turned on.

Returning to the description of the normal processing (FIG. 25), after executing the start waiting processing in step S901, either the replay bet set flag or the acceptance bet set flag in the main RAM 74 is set to "1". is set (step S902). If a negative determination is made in step S902, the process returns to step S901. If an affirmative determination is made in step S902, it is determined whether or not the start lever 41 has been operated (step S903). If the start lever 41 has not been operated, the process returns to step S901.

If the start lever 41 has been operated (step S903: YES), after the main line ML is activated, reception prohibition processing is executed (step S904). By executing the reception prohibiting process, even if a medal is inserted into the medal slot 45, the medal is ejected to the medal receiving tray 59 without being detected by the inserted medal detection sensor 45a. Also, in step S905, a setting process at the time of starting is executed for performing various settings when the game is started. In the setting process at the time of start, both the bet set flag at the time of replay and the bet set flag at the time of acceptance are cleared to "0".

After that, in step S906, a winning lottery process for performing a winning lottery in the current game is executed, and in step S907, a freeze period for waiting for the start of rotation of the reels 32L, 32M, 32R in the current game is set. Freeze setting processing at the time of bonus transition is executed to do so, and when the freeze period is set in step S908, execution of the subsequent processing is waited. When the freeze period is not set or when the measurement of the freeze period is completed, in step S909, the reels 32L, 32M, and 32R are driven and controlled in a manner corresponding to the result of the lottery process for the current combination. Execute reel control processing.

After that, medium application processing is executed in step S910. In the medium awarding process, when a minor winning combination has been established in the current game, a process for awarding the player with a number of game media corresponding to the winning of the minor winning combination is executed. Specifically, when virtual medals are awarded, a value corresponding to the current minor winning combination is added to the credit counter 74b of the main side RAM 74, and when the value of the credit counter 74b reaches the upper limit storage memory number. drives and controls the hopper device 53 so that the number of medals exceeding the upper limit storage memory number is paid out to the medal receiving tray 59 . In addition, in the medium provision process, the medium provision counter provided in the main-side RAM 74 stores information on the number of game media to be provided this time. In a situation where notification of the stop order of the reels 32L, 32M, and 32R is not being performed on the dual-use display unit 66, the medium supply counter is stored in the port output process (step S508) in the timer interrupt process (FIG. 19). The combined display section 66 is controlled to display a value corresponding to the information received. As a result, when a minor winning combination is established, the player can grasp the number of game media provided by establishing the minor winning combination by checking the combined display section 66 . The information stored in the medium provision counter is cleared to "0" when the pseudo-bonus state ST4 ends or when a game medium is newly bet. When the value of the medium supply counter becomes "0" in a situation where the stop order of the reels 32L, 32M, and 32R is not notified, the number "0" is not displayed on the combined display section 66. , the combined display unit 66 is turned off.

Then, in step S911, history storage processing is executed (step S911). In the history storage process, the value of the bet number setting counter 74a of the main RAM 74 is set in the bet number history counter 74f of the main RAM 74. FIG. Moreover, the value of the medium provision counter of main side RAM74 is set to the provision number log|history counter of main side RAM74.

After that, in step S912, a process for dealing with the end of the game is executed to enable the setting of the game state and the game section corresponding to the result of the current game. Also, in step S913, an external output setting process for outputting the state of the slot machine 10 to the management computer of the game hall is executed. Thereafter, reception permission processing is executed in step S914. By executing the acceptance permission process, the medals inserted from the medal slot 45 are collected by the hopper device 53 after being detected by the inserted medal detection sensor 45a.

<Regarding lottery processing for roles>
Next, the winning lottery process executed in step S906 of the normal process (FIG. 25) will be described.

In the winning lottery process, the first random number obtained from the first random number circuit 75 is used to draw a lottery for the index value IV. FIG. 29 is an explanatory diagram for explaining the contents of the index value IV. Seventeen index values IV from "1" to "17" are set, and winning data is set corresponding to each index value IV. In the following description, the explanatory diagram of FIG. 30 will be referred to as appropriate.

As shown in FIG. 29, the index values IV=1 to 6 are set with the first bell winning data and any one of the first to sixth complementary winning data. If the winning is made with the index value IV=1, as shown in FIG. When the reel 32M is the middle reel 32M and the reel 32R is the third stop (reel where the last stop command is issued), the first bell win is guaranteed regardless of the operation timings of the stop buttons 42 to 44. Otherwise, the first compensation winning prize can be established. When winning with index value IV=2, the first stop is the left reel 32L, the second stop is the right reel 32R, and the third stop is the middle reel 32M, each of the stop buttons 42-44. Regardless of the operation timing of (1), the first bell winning is established without fail, and in other cases, the fourth compensation winning can be established. When winning with index value IV=3, when the first stop is the middle reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R, each of the stop buttons 42-44. Regardless of the operation timing of (1), the first bell winning is established without fail, and in other cases, the third complementary winning can be established. When winning with index value IV=4, the first stop is the middle reel 32M, the second stop is the right reel 32R, and the third stop is the left reel 32L, each of the stop buttons 42-44. Regardless of the operation timing of (1), the first bell winning is established without fail, and in other cases, the sixth compensation winning can be established. When winning with index value IV=5, when the first stop is the right reel 32R, the second stop is the left reel 32L, and the third stop is the middle reel 32M, each of the stop buttons 42-44. Regardless of the operation timing of (1), the first bell winning is established without fail, and in other cases, the second compensation winning can be established. When winning with index value IV=6, when the first stop is the right reel 32R, the second stop is the middle reel 32M, and the third stop is the left reel 32L, each of the stop buttons 42-44. Regardless of the operation timing of (1), the first bell winning is surely established, and in other cases, the fifth compensation winning can be established.

In the present slot machine 10, as already explained, when the stop buttons 42 to 44 are operated in the non-CB state, the reels 32L, 32M, and 32R are controlled so that up to four symbols can be slid. done. In other words, the reels 32L, 32M, and 32R are controlled to stop within a specified time (190 milliseconds) after the stop buttons 42-44 are operated. By performing such reel control, it becomes possible to facilitate establishment of a prize corresponding to a winning combination, and to avoid establishment of a prize corresponding to a non-winning combination. becomes possible. However, since the amount of rotation of the reels 32L, 32M, 32R that can be slid is limited as described above, only one reel 32L, 32M, 32R constitutes a combination of symbols for establishing a prize. If there are 5 or more symbols between the constituent symbols, depending on the operation timing of the corresponding stop buttons 42 to 44, the constituent symbols may not stop on the main line ML (this phenomenon is also known as "dropout"). Say). The 1st bell winning, 2nd bell winning and various replay winnings are a winning mode in which no loss occurs when the reels 32L, 32M and 32R are stopped in the corresponding order. The watermelon prize, the second watermelon prize, the cherry prize, the first CB prize, and the second CB prize are prize modes in which failure can occur depending on the stop operation timing of the stop buttons 42 to 44 with respect to the rotational positions of the reels 32L, 32M, and 32R.

As shown in FIG. 29, the index values IV=7 to 9 are set with the second bell winning data and one of the seventh to ninth complementary winning data. When winning with index value IV=7, as shown in FIG. 30, when the first stop is the left reel 32L, the types and respective The second bell winning prize is established without fail regardless of the operation timing of the stop buttons 42 to 44, and in other cases, the seventh compensation winning prize can be established. When winning with the index value IV=8, when the first stop is the middle reel 32M, the types of the reels 32L, 32M, 32R to be the second stop and the third stop and the operation of the stop buttons 42 to 44 Regardless of the timing, the 2nd bell winning is surely established, and in other cases, the 9th compensation winning can be established. When winning with index value IV=9, when the first stop is the right reel 32R, the types of the reels 32L, 32M, 32R to be the second stop and the third stop and the operation of each of the stop buttons 42 to 44 Regardless of the timing, the 2nd bell winning is surely established, and in other cases, the 8th compensation winning can be established.

As shown in FIG. 29, the first bell winning data is set to the index value IV=10. When winning with the index value IV=10, as shown in FIG. 30, the winning of the first bell is surely established regardless of the order of stopping the reels 32L, 32M, and 32R and the operation timings of the stop buttons 42-44. .

As shown in FIG. 29, only the first watermelon winning data is set to the index value IV=11. If a win is made with the index value IV=11, as shown in FIG. 30, the first watermelon win can be established regardless of the order in which the reels 32L, 32M, and 32R are stopped. However, depending on the operation timing of each of the stop buttons 42 to 44, there is a possibility that the first watermelon prize will not be established. As shown in FIG. 29, only the second watermelon winning data is set to the index value IV=12. If a win is made with the index value IV=12, as shown in FIG. 30, the second watermelon win can be established regardless of the order in which the reels 32L, 32M, and 32R are stopped. However, depending on the operation timing of each of the stop buttons 42 to 44, there is a possibility that the second watermelon prize will not be established.

As shown in FIG. 29, the index value IV=13 is set with only cherry winning data. If a win is made with the index value IV=13, as shown in FIG. 30, a cherry win can be established regardless of the order in which the reels 32L, 32M and 32R are stopped. However, depending on the operation timing of the left stop button 42 with respect to the rotation position of the left reel 32L, there is a possibility that the cherry winning will not be established.

As shown in FIG. 29, only the first chance replay winning data is set to the index value IV=14. When winning with index value IV=14, as shown in FIG. 30, 1st chance replay winning is established without fail regardless of the stop order of the reels 32L, 32M, 32R and the operation timing of each of the stop buttons 42-44. do. Also, as shown in FIG. 29, only the second chance replay winning data is set to the index value IV=15. When winning with index value IV=15, as shown in FIG. 30, 2nd chance replay winning is established regardless of the stop order of the reels 32L, 32M, 32R and the operation timing of each stop button 42-44. do. In addition, as shown in FIG. 29, only the normal replay winning data is set to the index value IV=16. When winning with index value IV=16, as shown in FIG. 30, normal replay winning is established without regard to the stop order of the reels 32L, 32M, 32R and the operation timings of the stop buttons 42-44.

Only the CB winning data is set to the index value IV=17 as shown in FIG. In this case, if the number of bets on the game medium is "3" and the winning is made with the index value IV=17, then the first CB winning data is won, and the number of betting on the game medium is "2". In this case, if the player wins with the index value IV=17, the player wins the second CB winning data. In other words, the first CB winning data is data that is set as a winning combination only when the number of bets on the game media is "3". The first CB winning can be established only when the number of game media bet is "3". Further, the second CB winning data is data set as a winning combination only when the number of bets on the game media is "2". Then, the second CB winning can be established only when the number of game media bet is "2". When the first CB winning data is set, if the number of bets on the game medium is "3", as shown in FIG. 30, the first CB winning can be established regardless of the stop order of the reels 32L, 32M, 32R. However, depending on the operation timing of each stop button 42-44, there is a possibility that the first CB winning will not be established. When the second CB winning data is set, if the number of game media bets is "2", the second CB winning can be established regardless of the order in which the reels 32L, 32M, and 32R are stopped, as shown in FIG. However, depending on the operation timing of each stop button 42-44, there is a possibility that the second CB winning will not be established.

Here, the winning data other than the first CB winning data and the second CB winning data are deleted in the winning game regardless of whether or not the corresponding winning has been established, and are deleted in the games following the winning game. is not carried over. On the other hand, the 1st CB winning data and the 2nd CB winning data are stored until the corresponding winning is established even in the game after the winning game, except when the main side RAM 74 is cleared. stored in memory. In this case, in a game in which one of the first CB winning data and the second CB winning data is carried over, the index value IV corresponding to the first CB winning data and the second CB winning data is excluded from the lottery.

In other words, as a result of playing the game in a situation where the number of bets is "3", the first CB winning data is set in the main side RAM 74 and the first CB winning data is carried over because the first CB winning has not been established. In this state, the index value IV corresponding to the first CB winning data is excluded from the lottery even if the game is played with the number of bets "3" after that, and the number of bets is increased after that. Even if the game is played under the condition of "2", the index value IV corresponding to the second CB winning data is excluded from the lottery. In addition, as a result of the game being played in a situation where the number of bets is "2", the second CB winning data is set in the main side RAM 74 and the second CB winning data is carried over because the second CB winning has not been established. In this state, the index value IV corresponding to the first CB winning data is excluded from the lottery even if the game is played with the number of bets "3" after that, and the number of bets is increased after that. Even if the game is played under the condition of "2", the index value IV corresponding to the second CB winning data is excluded from the lottery. Thus, to prevent either the first CB winning data or the second CB winning data from being newly stored although either the first CB winning data or the second CB winning data is already stored. is possible, and it is possible to prevent a plurality of CB winning data from being accumulated and stored.

The second CB winning data is stored in the second CB winning data area corresponding to the address "0000" in the main RAM 74, and the first CB winning data is stored in the first CB winning data area corresponding to the address "0001" in the main RAM 74. (See FIG. 16). As already explained, when the setting change process (FIG. 15) is executed, the clearing process of the main side RAM 74 is executed. In this case, if the reset button 56 is not pressed and no information abnormality occurs in the main side RAM 74 when the supply of operating power is started, the main side RAM 74 except for the second CB winning data area While the clearing process is executed for the storage area, when the reset button 56 is pressed when the supply of operating power is started, or when an information abnormality occurs in the main side RAM 74 Clear processing is executed for all storage areas of the main side RAM 74 including the second CB winning data area. As a result, it is possible to select whether or not to erase the second CB winning data depending on whether or not the reset button 56 is pressed under the condition that no information abnormality has occurred in the main side RAM 74 . Further, when an information abnormality occurs in the main side RAM 74, it is possible to execute the clear processing for all the storage areas of the main side RAM 74 including the second CB winning data.

In the structure in which the index value IV is set as described above, a point value PV is set corresponding to each game state for each index value IV. Specifically, in the case of the first CB state ST2 or the second CB state ST3, only the index value IV=16 is set as the lottery target, and the index values IV=1 to 15 and 17 are set as the lottery targets. do not have. In addition, in the non-CB state, when neither the first CB winning data nor the second CB winning data is stored, all the index values IV=1 to 17 are set as lottery targets, and in the non-CB state, In a situation where either the first CB winning data or the second CB winning data is stored, index values IV=1 to 16 are set as lottery targets, but index value IV=17 is set as a lottery target. do not have.

When the number of bets is "2" in the non-CB state, regardless of whether or not either the first CB winning data or the second CB winning data is stored, the index value IV is set to each of 1 to 16. point value PV is the same. Accordingly, when the number of bets is "2" in the non-CB state, either the first CB winning data or the second CB winning data is stored as the winning probability of each of the index values IV=1 to 16. The case is the same as the case where both the first CB winning data and the second CB winning data are not stored. Also, when the number of bets is "3" in the non-CB state, regardless of whether or not either the first CB winning data or the second CB winning data is stored, the index values IV are set to 1 to 16, respectively. The point values PV are the same. Accordingly, when the number of bets is "3" in the non-CB state, either the first CB winning data or the second CB winning data is stored as the winning probability of each of the index values IV=1 to 16. The case is the same as the case where both the first CB winning data and the second CB winning data are not stored.

When the number of bets is "2" in the non-CB state, the probability of winning for each of the index values IV=1 to 16 is lower than when the number of bets is "3" in the non-CB state. Specifically, when the number of bets is "2" in the non-CB state, the probability of winning for each of the index values IV = 1 to 16 is the probability when the number of bets is "3" in the non-CB state. is less than 2/3 of the probability. As a result, the game executed with the number of bets of "3" is more likely to win a minor prize and replay with the provision of the game medium than the game executed with the number of bets of "2". can be increased.

However, when neither the first CB winning data nor the second CB winning data is stored in the non-CB state, the probability of winning when the index value IV=17 is about 1/2.2. On the other hand, when neither the first CB winning data nor the second CB winning data is stored in the non-CB state, the probability of winning when the index value IV=17 is about 1/3.3. As a result, in the non-CB state and neither the first CB winning data nor the second CB winning data is stored, a game with a bet number of "2" is executed and the second CB winning data is stored in the main side RAM 74. A game with a bet number of "3" is executed in a non-CB state and neither the first CB winning data nor the second CB winning data is stored, and the first CB winning data is the main. It is possible to make the probability higher than that stored in the side RAM 74 .

In the slot machine 10, six levels of setting values from "1" to "6" are prepared in advance, and the setting values to be used are changed by executing the setting change processing (FIG. 15) already described. Can be set. In the winning lottery process, the winning index value IV is selected according to the winning probability corresponding to the set value to be used. A set value of "n+1" is more advantageous to the player than "n" in winning probability. Specifically, since the probability of winning a predetermined index value IV (that is, a predetermined combination) is higher when the set value is "n+1" than when the set value is "n", the set value is "n+1" than when the set value is "n". is advantageous for the player. In the non-CB state, the winning probability of each index value IV varies according to the set value. However, the present invention is not limited to this, and some index value IVs may have a winning probability that varies according to the set value, while other index value IVs may have a configuration where the winning probability does not vary according to the set value. Note that the point value PV illustrated in FIG. 29 has a set value of "3". In the CB state, only the index value IV=16 is selected by lottery as described above, but the point value PV of the index value IV is the same regardless of the setting value.

A specific configuration for performing the winning lottery process will be described. FIG. 31(a) is an explanatory diagram for explaining the contents of the data in the main ROM 73 for performing the winning lottery process.

In the main ROM 73, as data to be referred to when executing the winning lottery process, a winning combination lottery table group 73a for setting 1 to be referred to when the setting value of the usage target is "1", A combination lottery table group 73b for setting 2 that is referenced when the set value is "2", and a combination lottery table group 73c for setting 3 that is referenced when the set value to be used is "3". , a combination lottery table group 73d for setting 4 that is referred to when the set value to be used is "4", and a combination lottery table group 73d for setting 5 that is referred to when the set value to be used is "5". A table group 73e and a combination lottery table group 73f for setting 6, which is referred to when the set value to be used is "6", are stored in advance. Each combination lottery table group 73a to 73f has corresponding set values, as shown in FIG. data is set.

FIG. 32 is an explanatory diagram for explaining the contents of the combination lottery table groups 73a to 73f. Note that FIG. 32 exemplifies the combination lottery table group 73c for setting 3, but the other combination lottery table groups 73a, 73b, 73d to 73f also have basic data although the specific content of the point value PV is different. The configurations are identical.

Data groups 101a to 10q are set in the combination lottery table groups 73a to 73f corresponding to the index values IV=1 to 17, respectively. Specifically, the IV=1 data group 101a is referred to when executing the winning lottery process for the index value IV=1, and the IV=1 data group 101a is referred to when executing the winning lottery process for the index value IV=2. A data group 101b for IV=2, a data group 101c for IV=3 that is referred to when executing the winning lottery process for the index value IV=3, and a case where the winning lottery process is executed for the index value IV=4 data group 101d for IV=4 to be referred to, data group 101e for IV=5 to be referred to when executing the lottery process for the winning combination with respect to the index value IV=5, and lottery processing for the winning combination for the index value IV=6. data group 101f for IV=6 referred to when executing the above, data group 101g for IV=7 referred to when executing the winning lottery process for index value IV=7, and index value IV=8 A data group 101h for IV=8 that is referred to when executing the winning lottery process, a data group 101i for IV=9 that is referred to when executing the winning lottery process for the index value IV=9, and an index value. A data group 101j for IV=10, which is referred to when executing the winning lottery process for IV=10, and a data group 101k for IV=11, which is referred to when executing the winning lottery process for the index value IV=11. , a data group 101l for IV=12, which is referred to when executing the lottery process for the winning combination with respect to the index value IV=12, and IV=13, which is referred to when executing the lottery process for the winning combination with respect to the index value IV=13. a data group 101m for IV=14, which is referred to when executing the winning lottery process for the index value IV=14; and a data group 101n for IV=14, which is referred to when executing the winning lottery process for the index value IV=15. a data group 101o for IV=15, a data group 101p for IV=16 referred to when executing a lottery process for a winning combination with respect to an index value IV=16, and a lottery process for a winning combination with respect to an index value IV=17. A data group 101q for IV=17 that is referred to in the case is set.

Although the details will be described later, the data groups 101a to 101q are referred to in order from the data group 101a for IV=1 in the winning lottery process in any gaming state. Each of these data groups 101a to 101q includes data indicating whether or not a lottery target is selected in each gaming state, data indicating the type of winning data set when the corresponding index value IV is won, and Data indicating the point value PV in each game state to be selected by lottery is set.

The contents of the data groups 101a to 101q will be described with reference to the explanatory diagram of FIG. FIG. 33(a) is an explanatory diagram for explaining the data group 101a for IV=1, FIG. 33(b) is an explanatory diagram for explaining the data group 101p for IV=16, and FIG. ) is an explanatory diagram for explaining the data group 101q for IV=17. The data groups 101b to 101o for IV=2 to 15 have different data contents, but have the same basic data structure.

As shown in FIGS. 33(a) to 33(c), each data group 101a, 101p, 101q includes game state data 102a, 103a as data indicating whether or not a lottery object is selected in each game state. , 104a are set. The game state data 102a, 103a and 104a have a data capacity of 1 byte. The game states classified in the game state data 102a, 103a, and 104a include CB state (first CB state ST2 or second CB state ST3), non-CB state and CB winning data (first CB winning data or second CB winning data ) is not stored and the number of bets is "2" (hereinafter referred to as a non-internal 2-card bet state), a non-CB state and CB winning data (first CB winning data or second CB Winning data) is not stored and the number of bets is "3" (hereinafter referred to as non-internal three bet state), non-CB state and CB winning data (first CB winning data or The second CB winning data) is stored and the number of bets is "2" (hereinafter referred to as the internal 2 bet state), and the non-CB state and the CB winning data (first CB winning data) data or second CB winning data) is stored and the number of bets is "3" (hereinafter referred to as an internal 3-card bet state). Among these five types of game states, the least significant bit D0 in the game state data 102a, 103a, 104a is assigned to the CB state, and the game state data 102a, 103a, The second lowest bit D1 in 104a is assigned, and the third lowest bit D2 in the gaming state data 102a, 103a, 104a is assigned to the non-internal 3-bet state. The 2-bet state is assigned the fourth lowest bit D3 in the gaming state data 102a, 103a and 104a, and the 3-bet state inside the state is assigned the 5th lowest bit in the gaming state data 102a, 103a and 104a. is assigned bit D4. The remaining bits D5 to D7 in the game state data 102a, 103a and 104a are blank and are not assigned to any game state.

Regarding the data group 101a for IV=1 in detail, as already explained, the index value IV=1 is not set as a lottery target in the CB state, and is not set as a lottery target in the non-internal 2-bet state, and in the non-internal 3-bet state. The lottery is set in the state of betting 2 coins, the state of betting 2 coins in the inside, and the state of betting 3 coins in the inside. Therefore, as shown in FIG. 33(a), in the gaming state data 102a, the least significant bit D0 is set to "0", and the second to fifth lowest bits D1 to D4 are set to "1". is set. The contents of this data are the same for the data groups 101b-101o for IV=2-15.

Regarding the IV=16 data group 101p in detail, as already explained, the index value IV=16 is in the CB state, the 2-card bet state in the non-internal state, the 3-card bet state in the non-internal state, and the 2-card bet state in the internal state. It is set as a lottery object in all of the state and the three bet state in the inside. Therefore, as shown in FIG. 33(b), "1" is set in the lowest to fifth bits D0 to D4 in the game state data 103a.

Regarding the data group 101q for IV=17 in detail, as already explained, the index value IV=17 is set as a lottery target in the CB state, the internal 2-bet state, and the internal 3-bet state. First, the non-inside 2-coin bet state and the non-inside 3-coin bet state are set as lottery targets. Therefore, as shown in FIG. 33(c), in the gaming state data 104a, the lowest bit D0, the fourth lowest bit D3 and the fifth lowest bit D4 are set to "0". "1" is set in the second bit D1 from the bottom and the third bit D2 from the bottom.

By setting the game state data 102a, 103a, 104a as described above, the data group 101a corresponding to the game state corresponding to the bit set to "1" in the game state data 102a, 103a, 104a It becomes possible to specify whether or not the index value IV of ~101q is a lottery target.

As shown in FIGS. 33(a) to 33(c), each of the data groups 101a, 101p, and 101q contains data indicating the type of winning data set when the corresponding index value IV is won. Data 102b, 103b, and 104b are set. The winning object data 102b, 103b, 104b have a data capacity of 2 bytes. As for the data group 101a for IV=1, as shown in FIG. 33(a), first bell winning data and first complementary winning data are set in the winning object data 102b. For the data group 101p for IV=16, as shown in FIG. 33(b), normal replay winning data is set in the winning target data 103b. As for the data group 101q for IV=17, CB winning data is set in the winning target data 104b as shown in FIG. 33(c).

With the winning target data 102b, 103b, and 104b set as described above, the result of the lottery process for the combination with reference to the data groups 101a to 101q is the index value IV of the predetermined data groups 101a to 101q. When a prize is won, it is possible to specify the type of the winning data by referring to the predetermined data groups 101a to 101q.

As shown in FIGS. 33(a) to 33(c), each data group 101a, 101p, 101q includes point value data 102c, 103c, 104c as data indicating the point value PV in each game state to be selected by lottery. is set. The point value data 102c, 103c, 104c are such that the combination of the address data of 1-byte data capacity and the point value PV of 2-byte data capacity is "1" in the corresponding gaming state data 102a, 103a, 104a. are set corresponding to the number of bits set with "1". In this case, when there are a plurality of combinations of address data and point value PV in point value data 102c, 103c, 104c, combinations corresponding to lower bits in corresponding game state data 102a, 103a, 104a , is set to an address in the front order in the address data.

Regarding the data group 101a for IV=1 in detail, as already explained, the index value IV=1 is not set as a lottery target in the CB state, and is not set as a lottery target in the non-internal 2-bet state, and in the non-internal 3-bet state. The lottery is set in the state of betting 2 coins, the state of betting 2 coins in the inside, and the state of betting 3 coins in the inside. In this case, as shown in FIG. 33(a), four types of combinations of address data and point values PV are set in the point value data 102c. A(0), which is the first address data, corresponds to the second least significant bit D1 in the gaming state data 102a, that is, the non-internal 2-card bet state. A point value PV of 900” is set. A(1), which is the address data in the next order, corresponds to the third least significant bit D2 in the gaming state data 102a, that is, the non-internal 3-card bet state. A point value PV of "3000" is set. A(2), which is the address data in the next order, corresponds to the 4th bit D3 from the low order in the gaming state data 102a, that is, the internal 2-card bet state. A point value PV of 900” is set. A(3), which is the next address data in the order, corresponds to the fourth bit D3 from the lower order in the gaming state data 102a, that is, the internal 3-card bet state. 3000” point value PV is set.

In detail about the data group 101p for IV=16, as already explained, the index value IV=16 is in the CB state, the 2-card non-internal bet state, the non-internal 3-card bet state, and the 2-card internal bet state. It is set as a lottery object in all of the state and the three-bet state in the inside. In this case, as shown in FIG. 33(b), five types of combinations of address data and point values PV are set in the point value data 103c. B(0), which is the first address data, corresponds to the least significant bit D0 in the gaming state data 103a, that is, the CB state, and the point value PV of "9000" is set in association with B(0). It is B(1), which is the address data in the next order, corresponds to the second lowest bit D1 in the gaming state data 103a, that is, the non-internal double bet state, and is associated with B(1). A point value PV of "5500" is set. B(2), which is the address data in the next order, corresponds to the third least significant bit D2 in the gaming state data 103a, that is, the non-internal 3-card bet state. A point value PV of "9000" is set. B(3), which is the next address data, corresponds to the fourth lowest bit D3 in the gaming state data 103a, that is, the internal 2-card bet state. 5500” point value PV is set. B(4), which is the address data in the next order, corresponds to the fourth least significant bit D3 in the gaming state data 103a, that is, the internal three bet state. A point value PV of 9000” is set.

Regarding the data group 101q for IV=17 in detail, as already explained, the index value IV=17 is set as a lottery target in the CB state, the internal 2-bet state, and the internal 3-bet state. First, the non-inside 2-coin bet state and the non-inside 3-coin bet state are set as lottery targets. In this case, as shown in FIG. 33(c), two combinations of address data and point value PV are set in the point value data 104c. C(0), which is the first address data, corresponds to the second least significant bit D1 in the gaming state data 102a, that is, the non-internal 2-card bet state. 30000” point value PV is set. C(1), which is the address data in the next order, corresponds to the third least significant bit D2 in the gaming state data 102a, that is, the non-internal 3-card bet state. A point value PV of "20000" is set.

By setting the point value data 102c, 103c, 104c as described above, the lottery target in the current game state is specified by referring to the game state data 102a, 103a, 104a of the data groups 101a to 101q. In this case, by referring to the point value data 102c, 103c, 104c, it is possible to specify the point value PV corresponding to the current gaming state.

As described above, the data groups 101a to 101q for IV=1 to 17 are used to execute the lottery process for the winning combination. FIG. 31(b) is an explanatory diagram for explaining the contents of the storage area of the main side RAM 74 for performing the winning lottery process.

As shown in FIG. 31(b), the main RAM 74 is provided with a determination value counter 74j, a lottery number counter 74k, and an address counter 74l. The determination value counter 74j indicates that the current game state is a CB state, a non-internal 2-card bet state, a non-internal 3-card bet state, an internal 2-card bet state, or an internal 3-card bet state. It is used to identify whether The lottery number counter 74k is used to specify which index value IV is the lottery target of the lottery process for the winning combination. The address counter 74l is used to specify which of the point value data 102c, 103c, and 104c of the data groups 101a to 101q for IV=1 to 101q to be referred to is to be referred to. used.

The process configuration of the combination lottery process will be described below with reference to the flowchart of FIG.

First, a first random number used for judging whether a winning combination is right or wrong is obtained (step S1301). The slot machine 10 is configured such that when the start lever 41 is operated, the first random number at that time is latched from the first random number circuit 75 . The first random number circuit 75 generates a first random number from "0" to "65535". Stored in RAM 74 . By adopting such a configuration, it becomes possible to quickly acquire the first random number at the timing when the start lever 41 is operated. The first random number circuit 75 is configured to latch the value of the free-run counter each time the start lever 41 is operated.

After obtaining the first random number, the setting value to be used is grasped by referring to the setting value storage area of the main side RAM 74, and the combination lottery table group 73a to 73f corresponding to the grasped setting value is mainly used. The data is read from the side ROM 73 to the main side RAM 74 (step S1302). In this case, if the setting value to be used is "1", the setting 1 winning combination lottery table group 73a is read, and if the setting value to be used is "2", the winning combination for setting 2 is read. The lottery table group 73b is read out, and if the set value to be used is "3", the combination lottery table group 73c for setting 3 is read out, and if the set value to be used is "4", it is set. The combination lottery table group 73d for 4 is read, and if the set value to be used is "5", the combination lottery table group 73e for setting 5 is read, and the set value to be used is "6". If so, the combination lottery table group 73f for setting 6 is read.

After that, determination value acquisition processing is executed (step S1303). FIG. 35 is a flow chart showing a determination value acquisition process. If the current gaming state is the CB state (first CB state ST2 or second CB state ST3) (step S1401: YES), after setting "1" to the determination value counter 74j of the main side RAM 74 (step S1402), this End the acquisition process. The judgment value counter 74j is cleared to "0" when the judgment value acquisition process is started. Therefore, when the process of step S1402 is executed, the value of the judgment value counter 74j becomes "1".

If the current gaming state is not the CB state (step S1401: NO), the value of the bet number setting counter 74a of the main side RAM 74 is added to the judgment value counter 74j (step S1403). In this case, when the value of the bet number setting counter 74a is "2", that is, when the number of bets for the current game is "2", the value of the determination value counter 74j becomes "2", and the bet number setting counter 74a is "3", that is, if the number of bets in the current game is "3", the value of the determination value counter 74j is "3".

Thereafter, when CB winning data (first CB winning data or second CB winning data) is stored in the main RAM 74 (step S1404: YES), after adding "2" to the determination value counter 74j (step S1405), End this acquisition process. If the CB winning data (first CB winning data or second CB winning data) is not stored in the main RAM 74 (step S1404: NO), the acquisition process is terminated.

By executing the determination value acquisition process (FIG. 35) as described above, the value of the determination value counter 74j becomes "1" when the gaming state is the CB state, and the gaming state is 2, which is the non-internal state. When the game state is the bet state, the value of the determination value counter 74j becomes "2", and when the game state is the non-internal 3-bet state, the value of the determination value counter 74j becomes "3", and the game state is the internal two bet state, the value of the judgment value counter 74j becomes "4", and when the game state is the internal three bet state, the value of the judgment value counter 74j is "5" becomes. As a result, by confirming the value of the determination value counter 74j, the current gaming state can be changed to the CB state, non-internal 2-card bet state, non-internal 3-card bet state, internal 2-bet state, and internal 2-card bet state. It is possible to specify which of the 3 bet states in the middle.

Returning to the description of the combination lottery process (FIG. 34), after executing the determination value acquisition process in step S1303, the lottery number counter 74k of the main side RAM 74 is set to "1" (step S1304). As already described, the lottery number counter 74k is used to specify which index value IV is the lottery target of the lottery process for the winning combination. When "1" is set in the lottery number counter 74k, the index value IV that is the lottery target of the lottery process for the winning combination becomes "1".

After that, PV acquisition processing is executed (step S1305). FIG. 36 is a flowchart showing PV acquisition processing. First, in step S1302 of the winning lottery process (FIG. 34), among the data groups 101a to 101q for IV=1 to 17 in the winning lottery table groups 73a to 73f read out to the main RAM 74, the lottery of the main RAM 74 The data groups 101a to 101q corresponding to the value of the number counter 74k are read (step S1501). In this case, if the value of the lottery number counter 74k is X (X=one of 1 to 17), the IV=X data groups 101a to 101q are read.

After that, each bit of the game state data 102a to 104a in the data groups 101a to 101q read in step S1501 is shifted to the lower side (that is, to the right) by one bit (step S1502). Taking the game state data 102a of FIG. 33(a) as an example, Dm (m=one of 1 to 7) bit data is shifted to D(m−1) bit data. Also, the data of the D0 bit, which is the least significant bit, is shifted to the carry flag 77 (see FIG. 9) provided in the main MPU 72 . After that, it is determined whether or not the value of the carry flag 77 is "1" (step S1503). In the case of the game state data 102a of FIG. 33(a), when the processing of step S1502 is executed once, the value of the carry flag 77 is "0", and the game state data 103a of FIG. 33(b). In the case of , the value of the carry flag 77 is "1" when the process of step S1502 has been executed once.

If the value of the carry flag 77 is "1" (step S1503: YES), 1 is added to the value of the address counter 74l of the main RAM 74 (step S1504). As already explained, the address counter 74l determines which of the point value data 102c, 103c, and 104c of the IV=1 to 17 data groups 101a to 101q to be referred to is to be referred to. Used for identification. The address counter 74l is cleared to "0" when the process of step S1501 is executed.

When a negative determination is made in step S1503, or when the process of step S1504 is executed, 1 is subtracted from the value of the determination value counter 74j of the main side RAM 74 (step S1505). A value corresponding to the current game state is set in the determination value counter 74j at step S1303 in the winning lottery process (FIG. 34), as already described. Then, it is determined whether or not the value of the determination value counter 74j after subtracting 1 is "0" (step S1506). If the value of the judgment value counter 74j is not "0" (step S1506: NO), the processing of steps S1502 to S1505 is executed again.

If the value of the determination value counter 74j is "0" (step S1506: YES), it is determined whether or not the value of the carry flag 77 of the main MPU 72 is "1" (step S1507). If the value of the carry flag 77 is "1" (step S1507: YES), among the point value data 102c to 104c in the data groups 101a to 101q read in step S1501, the current address counter 74l in the main RAM 74 The address data corresponding to the value is specified, and the point value PV corresponding to the specified address data is obtained from the point value data 102c to 104c (step S1508). The point value PV becomes the point value PV of the index value IV that is currently the lottery target. On the other hand, if the value of the carry flag is "0" (step S1507: NO), "0" is grasped as the point value PV of the index value IV currently targeted for lottery (step S1509).

As described above, in the PV acquisition process (FIG. 36), the value of the determination value counter 74j is decremented by 1 in step S1505. A process for obtaining the point value PV in step S1509 is executed. Therefore, if the gaming state is the CB state, the processing for acquiring the point value PV of steps S1507 to S1509 is executed when the processing of steps S1502 to S1505 is executed once, and the gaming state is non-internal. If the two bet state is the state of , the processing for acquiring the point value PV of steps S1507 to S1509 is executed when the processing of steps S1502 to S1505 is executed twice, and the gaming state is non-internal 3 If it is in the bet state, the processing for acquiring the point value PV is executed in steps S1507 to S1509 when the processing of steps S1502 to S1505 is executed three times, and the game state is the internal medium bet state of two. If so, when the processing of steps S1502 to S1505 is executed four times, the processing for acquiring the point value PV of steps S1507 to S1509 is executed, and if the gaming state is an internal three-bet state When the processing of steps S1502 to S1505 has been executed five times, the processing of steps S1507 to S1509 for acquiring the point value PV is executed.

On the other hand, in step S1502, the game state data 102a to 104a are shifted, and as a result of the shift processing, if the carry flag 77 of the main MPU 72 is set to "1", the main MPU 72 is shifted to step S1504. The value of the address counter 74l of the side RAM 74 is incremented by one. Further, in the processing for acquiring the point value PV in steps S1507 to S1509, when the value of the determination value counter 74j becomes "0" in step S1506, the shift processing in step S1502 immediately before the carry flag 77 is set to "1", the point value PV having a pair relationship with the address data corresponding to the address counter 74l of the main side RAM 74 is obtained from the point value data 102c to 104c, and the carry flag 77 If the value is "0", the point value PV is "0".

If it is in the CB state, the processing for acquiring the point value PV in steps S1507 to S1509 is executed when the processing in steps S1502 to S1505 is executed once as described above. Therefore, if the carry flag 77 is "1" when the processing of steps S1502 to S1505 is executed once in the CB state, the point value PV corresponding to the first address data will be the point value data 102c to 104c. , and if the carry flag 77 is "0", the point value PV is "0".

If the gaming state is the non-internal 2-bet state, the processing for acquiring the point value PV in steps S1507 to S1509 is executed when the processing in steps S1502 to S1505 is executed twice as described above. be. Therefore, if the carry flag 77 is "1" when the processing of steps S1502 to S1505 is executed twice in the non-internal two-bet state, the point value PV corresponding to the address data at that time is It is obtained from the point value data 102c to 104c, and if the carry flag 77 is "0", the point value PV becomes "0".

If the gaming state is the non-internal 3-bet state, the processing for acquiring the point value PV in steps S1507 to S1509 is executed when the processing in steps S1502 to S1505 is executed three times as described above. be. Therefore, if the carry flag 77 is "1" when the processing of steps S1502 to S1505 is executed three times in the non-internal 3-bet state, the point value PV corresponding to the address data at that time is It is obtained from the point value data 102c to 104c, and if the carry flag 77 is "0", the point value PV becomes "0".

If the gaming state is the inner two-bet state, the processing for acquiring the point value PV in steps S1507 to S1509 is executed when the processing in steps S1502 to S1505 is executed four times as described above. . Therefore, if the carry flag 77 is "1" when the processing of steps S1502 to S1505 is executed four times in the internal two-bet state, the point value PV corresponding to the address data at that point is pointed. It is obtained from the value data 102c to 104c, and if the carry flag 77 is "0", the point value PV becomes "0".

If the gaming state is the internal three bet state, as described above, when the processing of steps S1502 to S1505 is executed five times, the processing of steps S1507 to S1509 for acquiring the point value PV is executed. . Therefore, if the carry flag 77 is "1" when the process of steps S1502 to S1505 is executed five times in the internal three-bet state, then the point value PV corresponding to the address data at that time points. It is obtained from the value data 102c to 104c, and if the carry flag 77 is "0", the point value PV becomes "0".

When the value of the lottery number counter 74k of the main side RAM 74 is "1" and the data group 101a for IV=1 is read in step S1501, the game state data 102a is displayed as shown in FIG. , the least significant bit D0 is "0", and the second to fifth least significant bits D1 to D4 are set to "1". Therefore, when step S1502 in the PV acquisition process (FIG. 36) is executed once, the value of the carry flag 77 becomes "0", and when step S1502 is executed two to five times, the carry flag 77 is "1".

That is, in the CB state, the point value PV is "0" because the carry flag 77 is "0" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed. In the non-internal 2-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and furthermore, in steps S1507 to S1509 Since the process of step S1504 has been executed once before the process is executed, the value of the address counter 74l is "1". Therefore, the address data corresponding to the value of the address counter 74l becomes A(0), and the point value PV of "900" corresponding to the address data is obtained. In the non-internal 3-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and furthermore, in steps S1507 to S1509 Since the process of step S1504 has been executed twice before the process is executed, the value of the address counter 74l is "2". Therefore, the address data corresponding to the value of the address counter 74l becomes A(1), and the point value PV of "3000" corresponding to the address data is obtained. In the internal two-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and the processing in steps S1507 to S1509 is performed. Since the process of step S1504 has been executed three times before is executed, the value of the address counter 74l is "3". Therefore, the address data corresponding to the value of the address counter 74l becomes A(2), and the point value PV of "900" corresponding to the address data is obtained. In the internal three-bet state, the carry flag 77 is "1" when the processing for obtaining the point value PV in steps S1507 to S1509 is executed, and the processing in steps S1507 to S1509 is performed. Since the process of step S1504 has been executed four times before is executed, the value of the address counter 74l is "4". Therefore, the address data corresponding to the value of the address counter 74l becomes A(3), and the point value PV of "3000" corresponding to the address data is obtained.

When the value of the lottery number counter 74k of the main RAM 74 is "16" and the IV=16 data group 101p has been read out in step S1501, the game state data 102a is displayed as shown in FIG. "1" is set in all of the least significant to fifth bits D0 to D4. Therefore, the carry flag 77 is "1" when the processing for obtaining the point value PV in steps S1507 to S1509 is executed.

That is, in the CB state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and the processing in steps S1507 to S1509 is executed. The value of the address counter 74l is "1" because the process of step S1504 has been executed once by then. Therefore, the address data corresponding to the value of the address counter 74l becomes B(0), and the point value PV of "9000" corresponding to the address data is acquired. In the non-internal 2-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and furthermore, in steps S1507 to S1509 Since the process of step S1504 has been executed twice before the process is executed, the value of the address counter 74l is "2". Therefore, the address data corresponding to the value of the address counter 74l becomes B(1), and the point value PV of "5500" corresponding to the address data is acquired. In the non-internal 3-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and furthermore, in steps S1507 to S1509 Since the process of step S1504 has been executed three times before the process is executed, the value of the address counter 74l is "3". Therefore, the address data corresponding to the value of the address counter 74l becomes B(2), and the point value PV of "9000" corresponding to the address data is acquired. In the internal two-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and the processing in steps S1507 to S1509 is performed. Since the process of step S1504 has been executed four times before is executed, the value of the address counter 74l is "4". Therefore, the address data corresponding to the value of the address counter 74l is B(3), and the point value PV of "5500" corresponding to the address data is obtained. In the internal three-bet state, the carry flag 77 is "1" when the processing for obtaining the point value PV in steps S1507 to S1509 is executed, and the processing in steps S1507 to S1509 is performed. Since the process of step S1504 has been executed five times before is executed, the value of the address counter 74l is "5". Therefore, the address data corresponding to the value of the address counter 74l becomes B(4), and the point value PV of "9000" corresponding to the address data is acquired.

When the value of the lottery number counter 74k of the main RAM 74 is "17" and the data group 101q for IV=17 has been read in step S1501, the game state data 102a is displayed as shown in FIG. , the least significant bit D0, the fourth least significant bit D3 and the fifth least significant bit D4 are set to "0", the second least significant bit D1 and the third least significant bit D2 are set to "1" is set. Therefore, when step S1502 in the PV acquisition process (FIG. 36) is executed once, four times, or five times, the value of the carry flag 77 becomes "0", and step S1502 is executed. The value of the carry flag 77 becomes "1" when it is executed twice or when it is executed three times.

That is, in the CB state, the point value PV is "0" because the carry flag 77 is "0" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed. In the non-internal 2-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and furthermore, in steps S1507 to S1509 Since the process of step S1504 has been executed once before the process is executed, the value of the address counter 74l is "1". Therefore, the address data corresponding to the value of the address counter 74l becomes C(0), and the point value PV of "30000" corresponding to the address data is acquired. In the non-internal 3-bet state, the carry flag 77 is "1" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, and furthermore, in steps S1507 to S1509 Since the process of step S1504 has been executed twice before the process is executed, the value of the address counter 74l is "2". Therefore, the address data corresponding to the value of the address counter 74l becomes C(1), and the point value PV of "20000" corresponding to the address data is acquired. In the internal two-bet state, the carry flag 77 is "0" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed, so the point value PV is "0". Become. In the internal three-bet state, the point value PV becomes "0" because the carry flag 77 is "0" when the processing for acquiring the point value PV in steps S1507 to S1509 is executed. .

As described above, in a configuration in which the type of index value IV to which the point value PV of 1 or more is set can vary depending on the game state, the numerical range of the index value IV may be varied according to each game state. An index in which a point value PV of 1 or more is set within the fixed range while the index value IV is set in a fixed range and the type of winning data associated with each index value IV is the same. The types of value IV are made different. As a result, the data format is simplified because it is not necessary to change the numerical range of the index value IV for each game state or to change the correspondence relationship between the index value IV and winning data for each game state. becomes possible.

Data groups 101a to 101q for IV=1 to 17 are provided in one-to-one correspondence with index values IV=1 to 17, respectively. Data for obtaining the point value PV (including "0") in the game state is set. As a result, there is no need to prepare a separate lottery table for each game state, so the data configuration can be simplified.

A determination value corresponding to each game state is calculated, and bits set to "1" in the game state data 102a to 104a set in the data groups 101a to 101q for IV=1 to 17 and their determination values are If so, the point value PV corresponding to the bit set to "1" is obtained from the point value data 102c-104c of the IV=1-17 data groups 101a-101q. As a result, even if the data groups 101a to 101q for IV=1 to 17 are set so as to be common to each game state, it is possible to acquire the point value PV corresponding to each game state. becomes.

Returning to the description of the winning lottery process (FIG. 34), after the PV acquisition process is executed in step S1305, the winning lottery value DV used for judging whether the winning combination is right or wrong is set (step S1306). In the lottery value setting process, a new lottery value DV is set by adding the point value PV acquired in step S1305 to the current lottery value DV. In the initial lottery value setting process, the value of the first random number (one of 0 to 65535) obtained in step S1301 is set as the current lottery value DV, and the value of the first random number is the point value obtained in step S1305. PV is added to obtain a new lottery value DV. Note that if the point value PV acquired in step S1305 is "0", the lottery value DV does not change even if the process of step S1306 is executed. That is, if the point value PV is "0" in the first lottery value setting process, the first random number (one of 0 to 65535) becomes the lottery value DV as it is, and in the second and subsequent lottery value setting processes, the point value PV If it is "0", the lottery value DV in the previous lottery value setting process will be the current lottery value DV as it is.

After that, it is determined whether the winning combination is appropriate for the index value IV corresponding to the current value of the lottery number counter 74k (step S1307). Whether or not the lottery value DV has exceeded "65535" is determined in the win/loss determination of the winning combination. If it exceeds "65535" (step S1307: YES), the processing for obtaining winning data is executed (step S1308). FIG. 37 is a flow chart showing processing for obtaining winning data.

First, by referring to the winning target data 102b to 104b in the data groups 101a to 101q corresponding to the current values in the lottery number counter 74k of the main RAM 74, the winning data corresponding to the index value IV that has been won this time is grasped. (Step S1601). If the winning data is CB winning data (step S1602: YES), if the value of the bet number setting counter 74a of the main RAM 74 is "3" (step S1603: YES), the first CB winning data is stored in the main RAM 74. (step S1604), and if the value of the bet number setting counter 74a is "2" (step S1603: NO), the second CB winning data is stored in the main side RAM 74 (step S1605). If the winning data corresponding to the index value IV won this time is not the CB winning data (step S1602: NO), the winning data grasped at step S1601 is stored in the main RAM 74 as it is (step S1606).

Returning to the description of the winning lottery process (FIG. 34), if the lottery value DV does not exceed "65535" (step S1307: NO), it means that the winning combination corresponding to the index value IV is lost. In such a case, after adding 1 to the value of the lottery number counter 74k of the main side RAM 74 (step S1309), it is determined whether there is a combination corresponding to the index value IV, that is, whether there is a selection target to be judged. Determine (step S1310). Specifically, it is determined whether or not the value of the lottery number counter 74k to which 1 has been added has exceeded the maximum value of "17". If the value of the lottery number counter 74k is equal to or less than the maximum value (step S1310: NO), the process returns to step S1305 to continue judging the winning combination. At this time, in step S1305, the data group 101a to 101q corresponding to the value of the lottery number counter 74k after adding 1 is read to acquire the point value PV, and in step S1306, the lottery value DV ( That is, the new lottery value DV is obtained by adding the point value PV newly acquired in step S1305 to the current lottery value DV), and in step S1307, the win/loss determination is performed based on the lottery value DV.

If the process of step S1308 is executed, or if an affirmative determination is made in step S1310, it means that the determination of whether or not the winning combination has been completed has been completed. In this case, stop information first setting processing for setting stop information for reel stop control is performed (step S1311). After that, in step S1312, the first control process for the game section is executed, and in step S1313, the advantageous lottery process at the start of the game is executed. Details of the processing in steps S1311 to S1313 will be described later.

Thereafter, stop order notification control processing is executed (step S1314). In the stop order notification control process, under the condition that the game state is a pseudo-bonus state ST4 or AT state ST5 described later and the number of bets on the game medium is "3", the index value IV is set to any of 1 to 6. The stopping order of the reels 32L, 32M, and 32R that enables the establishment of the first bell prize when winning is notified, and the establishment of the second bell prize is possible when any of the index values IV = 7 to 9 is won. In addition to executing the display control of the combined display unit 66 so as to notify the stop order of the reels 32L, 32M, 32R as do.

After that, a game start command transmission process is executed (step S1315). In the transmission process, if any winning combination is won in the current winning combination lottery process (Fig. 34), information corresponding to the winning combination and information corresponding to the current game state are provided. , and information corresponding to the processing results of steps S1312 and S1313 are set in a game start command, and the game start command is transmitted to the effect side MPU 92 . The game start command is a command for making the production side MPU 92 recognize that a new game has started, and is a command for making the production side MPU 92 recognize various information determined by the main side MPU 72. .

When receiving the game start command, the effect-side MPU 92 grasps various information about the current game from the game start command. Then, the effect-side MPU 92 determines the content of the effect in a manner corresponding to the grasped various information. Then, the data table corresponding to the content of the determined performance is read from the performance side ROM 93 to the performance side RAM 94, and the light emission control of the upper lamp 61, the sound output control of the speaker 62, and the display of the image display device 63 are performed according to the read data table. Execute control.

Next, the reel control processing executed in step S909 of the normal processing (FIG. 25) will be described with reference to the flowchart of FIG.

First, rotation start processing for starting rotation of the reels 32L, 32M, and 32R is performed (step S1701). In the rotation start process, it is confirmed whether or not a predetermined wait time (specifically, 4.1 seconds) has elapsed since the reels 32L, 32M, and 32R started rotating in the previous game. If not, it waits until the wait time elapses. When the wait time has passed, the wait time for the next game is set again, and rotation start information is set in the motor control storage area provided in the main RAM 74 . By performing such processing, the acceleration processing of the stepping motor is started in the stepping motor control processing of step S504 in the timer interrupt processing (FIG. 19), and the reels 32L, 32M, 32R start rotating. Thereafter, the reels 32L, 32M, and 32R wait until they rotate at a predetermined rotational speed at a constant speed, and the rotation start processing ends. Further, when the rotation speed of each reel 32L, 32M, 32R reaches a constant speed, the main MPU 72 can generate a stop command by lighting a lamp (not shown) of each stop button 42-44. Players and the like are notified of this.

After that, it is determined whether or not any one of the stop buttons 42 to 44 has been operated (step S1702). If none of the stop buttons 42-44 has been operated, the process of step S1702 is repeatedly executed until one of the stop buttons 42-44 is operated. When it is determined that any one of the stop buttons 42 to 44 has been operated, it is determined whether the stop buttons 42 to 44 corresponding to the rotating reels 32L, 32M, 32R have been operated, that is, whether a stop command has been generated. (step S1703). If no stop command has been generated, the process returns to step S1702, and the process of step S1702 is repeatedly executed until any one of the stop buttons 42 to 44 is operated. When a stop command is generated, the stop command is transmitted to the effect side MPU 92 (step S1704). The stop instruction command is a command for making the production side MPU 92 recognize which of the stop buttons 42 to 44 has been operated to generate the stop instruction. When the stop instruction command is transmitted, stop control processing shown in steps S1705 to S1711 is performed to stop the rotating reel.

In the stop control process, the symbol number of the reaching symbol that has reached the base position (specifically, the lower row) at the timing when the stop buttons 42 to 44 are operated is confirmed (step S1705). Specifically, the pattern number of the arrival pattern that has reached the base position is confirmed based on the number of excitation pulses output from the time when the detection signal of the reel index sensor is input. After that, based on the stop information stored in the main RAM 74, the number of slips of the reels 32L, 32M, 32R to be stopped this time is calculated (step S1706).

In the slot machine 10, as the stop modes for stopping the reels 32L, 32M, and 32R, when the stop buttons 42 to 44 are operated, the arrival symbol that has reached the base position is stopped as it is. A stop mode in which the reels 32L, 32M and 32R are slid by one symbol and then stopped, a stop mode in which the reels are stopped after being slid by two symbols, a stop mode in which the reels are stopped after being slid by three symbols, and four symbols. There are 5 patterns of stop modes, including a stop mode of stopping after sliding. Therefore, in step S1706, any value from "0" to "4" is calculated as the sliding number based on the stop information stored in the main side RAM74.

After that, the calculated sliding number is added to the symbol number of the reached symbol to determine the symbol number of the stop symbol to actually stop at the base position (step S1707). Then, it is determined whether or not the symbol number of the arrival symbol of the reels 32L, 32M, 32R to be stopped this time and the symbol number of the stop symbol are equal (step S1708), and if they are equal, the reels 32L, 32M, 32R A reel stop process for stopping the rotation of is performed (step S1709). After that, it is determined whether or not all the reels 32L, 32M, 32R have stopped (step S1710). If all the reels 32L, 32M, 32R are not stopped, stop information second setting processing is performed (step S1711), and the process returns to step S1702.

Here, the stop information is information for making the stop mode of each of the reels 32L, 32M, and 32R correspond to the result of the winning lottery process (FIG. 34). , it is possible to calculate the number of slips (specifically, "0" to "4") with respect to the arrival symbol that has reached the base position when each of the stop buttons 42 to 44 is operated to stop. As the stop information, sliding number data indicating the correspondence between each symbol and the sliding number is stored in advance in the main ROM 73 in association with each lottery result and the stopping order of the reels 32L, 32M, and 32R. However, the invention is not limited to this, and the sliding number data corresponding to each lottery result and the stopping order of each reel 32L, 32M, 32R may be derived while the reels 32L, 32M, 32R are rotating. .

As the processing for setting the stop information, the first stop information setting processing executed in step S1311 of the combination lottery processing (FIG. 34) and the reel control processing (FIG. 38) executed in step S1711. There is a stop information second setting process. In the first stop information setting process, stop information is set according to the result of the lottery process for the combination. In the second stop information setting process, the stop information stored in the main side RAM 74 in the first stop information setting process or the previous second stop information setting process is changed after some of the reels 32L, 32M, 32R are stopped. processing. In the second stop information setting process, the stop information is changed based on the set winning data, the order of stopping the reels 32L, 32M and 32R, and the stop numbers of the stopped reels 32L, 32M and 32R. .

When it is determined in step S1710 that all the reels 32L, 32M, and 32R are stopped, winning determination processing is executed in step S1712. In the winning determination process, the types of symbols stopped on the main line ML on each of the reels 32L, 32M, 32R are grasped. Then, based on the contents of the winning data stored in the main RAM 74, the combination of symbols stopped and displayed on the main line ML on each of the reels 32L, 32M, 32R becomes the winning combination in the winning combination lottery process. It is determined whether or not the combination of symbols corresponds to each other, and if the combination of symbols corresponds to the winning combination, it is determined that the winning combination has been won and the winning handling process is executed. In the winning handling process, information on the number of game media to be awarded is set in the main RAM 74 so that game media can be awarded in the medium awarding process if the winning is a minor win. On the other hand, if the winning is a replay winning, a flag setting process is executed in the next start waiting process (FIG. 26) so that the replay setting process is executed.

After executing the winning determination process, a winning result command is transmitted to the effect side MPU 92 (step S1713). The winning result command includes data indicating whether or not the current winning has been established, and if the winning has been established, data indicating the type of the winning.

Next, referring to the flowchart of FIG. 39, the processing for dealing with the end of the game executed in step S912 of the normal processing (FIG. 25) will be described. Since the process of step S912 in the normal process (FIG. 25) is executed after the reel control process (step S909), the process for dealing with the end of the game is that all the reels 32L, 32M, and 32R stop rotating in one game. will be executed after

First, CB processing is executed to perform transition control and progress control for the first CB state ST2 and the second CB state ST3 (step S1801). In the CB process, when the first CB winning is established, the first CB state flag provided in the main side RAM 74 is set to "1" and the first CB stored in the first CB winning data area of the main side RAM 74 is displayed. Clear winning data. Then, a first CB prize winning command indicating that the state has shifted to the first CB state ST2 is transmitted to the effect side MPU 92 . As a result, the gaming state becomes the first CB state ST2. In the first CB state ST2, the game is executed only in the situation where "3" game media are betted, as already explained. In the CB process, when the second CB winning is established, the second CB status flag provided in the main side RAM 74 is set to "1" and the second CB stored in the second CB winning data area of the main side RAM 74 is displayed. Clear winning data. Then, a second CB prize winning command indicating that the state has shifted to the second CB state ST3 is transmitted to the effect side MPU 92 . As a result, the gaming state becomes the second CB state ST3. In the second CB state ST3, as already explained, the game is executed only in the situation where "2" game media are betted.

In the CB process, if the current gaming state is the CB state (first CB state ST2 or second CB state ST3), if the first bell win has been established in the current game, Add 1 to the value of the total grant counter. The total given counter is a counter for specifying the total number of game media given in the CB state by the main MPU 72, and is cleared to "0" when the CB state is started. When the value of the total grant counter after adding 1 becomes "30", which is the reference number for ending the CB state, the CB state flag corresponding to the current CB state is cleared to "0". Then, a CB end command indicating that the current CB state has ended is transmitted to the effect side MPU 92 .

On the condition that the game is not in the CB state (step S1802: NO), the process jumps to the process corresponding to the current gaming state (step S1803). Specifically, when the gaming state is the normal gaming state ST1, normal processing is executed (step S1804), and when the gaming state is the pseudo-bonus state ST4, the pseudo-bonus processing is executed (step S1805). ), when the game state is the AT state ST5, AT processing is executed (step S1806), and when the game state is the end preparation state ST6, the second control processing of the game section is executed (step S1807). . In addition, the second control process (step S1807) of the game section is also executed when any one of the normal process of step S1804, the pseudo-bonus process of step S1805, and the process for AT of step S1806 is executed. Moreover, also when it is in the CB state, the second control process (step S1807) of the game section is executed. Details of the processing in steps S1804 to S1807 will be described later.

When the current gaming state is the CB state, the affirmative determination is made in step S1802, so that the normal processing in step S1804, the pseudo-bonus processing in step S1805, and the AT processing in step S1806 are not executed. Therefore, in the case of the CB state, the processing for advancing the normal game state ST1, the processing for advancing the pseudo-bonus state ST4, and the processing for advancing the AT state ST5 are not executed. On the other hand, even if the current game state is the CB state, the second control process of the game section in step S1807 is executed. Therefore, even in the CB state, the process for advancing the second section SC2 is executed.

<About game status and game section>
Next, the game state and game section will be described. FIG. 40 is an explanatory diagram for explaining game states and game intervals existing in the slot machine 10. FIG.

In this slot machine 10, as game states, there are a normal game state ST1, a first CB state ST2, a second CB state ST3, a pseudo-bonus state ST4, an AT state ST5, and an end preparation state ST6. These game states ST1 to ST6 do not overlap each other.

The normal game state ST1 is a game state in which the main side RAM 74 is cleared by execution (steps S301 to S307). Further, when the first CB state ST2 or the second CB state ST3 generated in the normal game state ST1 ends, the game state becomes the normal game state ST1 when the end preparation state ST6 ends. In the normal game state ST1, one game can be executed regardless of whether the number of game media bet is "3" or "2".

The normal game state ST1 is the expected net increase in game media in one game ("expected number of game media to be given in one game" to "game media bet in one game number of media”) is less than 1. In addition, the normal game state ST1 includes a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main side RAM 74, and a state in which either the first CB winning data or the second CB winning data is stored on the main side. There is an internal state stored in RAM 74 .

The first CB state ST2 is a game state to which the game shifts when the first CB winning is established in the situation where the first CB winning data is stored in the first CB winning data area of the main side RAM74. In the first CB state ST2, one game can be executed when the number of bets on game media is "3", while one game can be executed when the number of bets on game media is "2". can't Further, the second CB state ST3 is a game state to which the game is shifted when the second CB winning is established in a situation where the second CB winning data is stored in the second CB winning data area of the main side RAM74. In the second CB state ST3, one game can be executed when the bet number of game media is "2", while the upper limit bet number is set to "2", so "3" game media are bet. Can not do it.

The first CB state ST2 and the second CB state ST3 are game states in which the game media owned by the player are not increased. Furthermore, in both the first CB state ST2 and the second CB state ST3, the number of game media owned by the player at the end of the game state is greater than the number of game media owned by the player at the start of the game state. It is a game state in which the number of is reduced.

The pseudo-bonus state ST4 is a game state that is shifted to when conditions for shifting to the pseudo-bonus state ST4 are established in the normal game state ST1. The pseudo-bonus state ST4 ends when the remaining number of continuous games in the pseudo-bonus state ST4 becomes "0" or when the ending condition of the second section SC2 is met. When the pseudo-bonus state ST4 ends without fulfilling the ending condition of the second section SC2, which will be described later, and the condition for shifting to the AT state ST5 does not fulfill, the state shifts to the end preparation state ST6. Further, when the pseudo-bonus state ST4 ends by satisfying the ending condition of the second section SC2, which will be described later, the game shifts to the normal game state ST1.

In the pseudo-bonus state ST4, one game can be executed regardless of whether the number of game media bet is "3" or "2". The pseudo bonus state ST4 includes a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main side RAM 74, and a state in which either the first CB winning data or the second CB winning data is stored in the main side RAM 74. There is a stored internal state.

In the pseudo-bonus state ST4, when one of the index values IV=1 to 6 is won, if the number of bets on the game medium is "3", the reels 32L, 32M, and 32R that enable the establishment of the first bell win. Stopping order is announced. Further, if the pseudo bonus status ST4 is elected to any of the index values IV = 7 to 9, if the number of beds in the game media is "3", the reel 32L, 32m, which will be able to establish a second bell prize. 32R stop order is announced. A game medium of “15” is awarded when the first bell prize or the second bell prize is established. This makes it possible to increase the expected number of game media to be given in one game in the pseudo-bonus state ST4. In the pseudo-bonus state ST4, if 3 coins are bet, the net increase expected value of the game media in one game is 1 or more, and if 2 coins are bet in the pseudo-bonus state ST4, the amount of game media in 1 game. Net increase expected value is less than 1.

The AT state ST5 is a game state that is shifted to when conditions for shifting to the AT state ST5 are established in the pseudo-bonus state ST4. The AT state ST5 ends when the remaining number of continuous games in the AT state ST5 becomes "0" or when the ending condition of the second section SC2 is satisfied. When the AT state ST5 ends without satisfying the ending condition of the second section SC2, which will be described later, the state transitions to the end preparation state ST6. In addition, when the AT state ST5 is terminated by the satisfaction of the ending condition of the second section SC2, which will be described later, the normal game state ST1 is entered.

In the AT state ST5, one game can be executed regardless of whether the number of game media bet is "3" or "2". The AT state ST5 is a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main RAM 74, and either the first CB winning data or the second CB winning data is stored in the main RAM 74. There exists an internal state where

In the AT state ST5, if any of the index values IV=1 to 6 is won and the bet number of the game medium is "3", the reels 32L, 32M, and 32R that enable establishment of the first bell prize are stopped. The order will be announced. Further, in the AT state ST5, when any one of the index values IV=7 to 9 is won, if the bet number of the game medium is "3", the reels 32L, 32M, 32R that enable establishment of the second bell winning. is announced. A game medium of “15” is awarded when the first bell win or the second bell win is established. This makes it possible to increase the expected number of game media to be given in one game in the AT state ST5. In the AT state ST5, if 3 coins are bet, the expected net increase in game media in one game is 1 or more, and in the AT state ST5, if 2 coins are bet, the expected net increase in game media in 1 game. value is less than 1.

The end preparation state ST6 is a game state that is shifted to when the pseudo-bonus state ST4 ends without the conditions for the ending of the second section SC2 (to be described later) being satisfied and the conditions for shifting to the AT state ST5 being satisfied. Also, the end preparation state ST6 is a game state to which the game is shifted when the AT state ST5 ends without satisfying the ending condition of the second section SC2, which will be described later.

The end preparation state ST6 ends when one game is executed. When the ready-to-end state ST6 ends, the game shifts to the normal game state ST1. In the end preparation state ST6, one game can be executed regardless of whether the number of game media bet is "3" or "2". The end preparation state ST6 is a game state in which the net increase expected value of game media in one game is less than 1 regardless of whether 3 or 2 are bet. In addition, the termination preparation state ST6 includes a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main side RAM 74, and a state in which either the first CB winning data or the second CB winning data is stored on the main side. There is an internal state stored in RAM 74 .

In the configuration in which various game states ST1 to ST6 exist as described above, game sections are set separately from these game states ST1 to ST6. A first section SC1 and a second section SC2 are set as game sections. In other words, in the slot machine 10, the number of game media bets of "2" and "3", set values of "1" to "6", various game states ST1 to ST6, and There are game sections of the first section SC1 and the second section SC2.

The first section SC1 includes the reels 32L, 32M, and 32R that enable the player to win a prize that is advantageous to the player when a winning combination that is to be established is different depending on the stop order of the reels 32L, 32M, and 32R. Due to the notification of the stop order, the net increase expected value of game media in one game (the value obtained by subtracting the "number of game media betted in one game" from the "expected number of game media given in one game") is 1 or more. This is a section in which an advantageous game state (pseudo-bonus state ST4 and AT state ST5) that can be obtained does not start, and the above-mentioned advantageous game state does not continue. When the clearing process (steps S301 to S307) of the main side RAM 74 is executed, the game state is the normal game state ST1 and the first section SC1. In addition, when the initialization process for the second section SC2 is executed in the second section SC2, the first section SC1 also occurs. The second section SC2 is a section in which the advantageous gaming state can be started and in which the advantageous gaming state can be continued.

FIG. 41(a) is an explanatory diagram for explaining the first section SC1 and the second section SC2. When the clearing process (steps S301 to S307) of the main RAM 74 is executed as described above, the first section SC1 is set, and when the initialization process of the second section SC2 is executed, the first section SC1 is set. Become. On the other hand, the second section SC2 is shifted from the first section SC1 by generating an opportunity to shift to the second section SC2 based on the winning lottery process (FIG. 34) in the first section SC1. In this case, when a game with a bet number of "3" is executed in the first section SC1, a transition to the second section SC2 may occur, while the bet number of the first section SC1 is "2". Even if a certain game is executed, there is no opportunity to shift to the second section SC2. Therefore, a player who expects to shift from the first section SC1 to the second section SC2 needs to play a game with a bet number of "3" instead of a game with a bet number of "2". There is

In the first section SC1, the net increase expected value of the game media in one game is certainly less than 1, whereas in the second section SC2, only when the net increase expected value of the game media in one game is less than 1 It may be 1 or more. Therefore, the second section SC2 is more advantageous than the first section SC1. Therefore, the player expects the first section SC1 to shift to the second section SC2.

The first section SC1 ends when an opportunity to shift to the second section SC2 occurs, and shifts to the second section SC2. On the other hand, the second section SC2 ends when the pseudo-bonus state ST4, the AT state ST5, or the end preparation state ST6 ends and the game shifts to the normal game state ST1. When the second section SC2 ends, the process proceeds to the first section SC1. In addition, as a condition for ending the second section SC2, the total number of games executed by continuing the second section SC2 without transition to the first section SC1 is the upper limit number of games (specifically, 1500 games). ) and the continuation of the second section SC2 without transition to the first section SC1, the total number of restricted net additions of game media reaches the upper limit net addition number (specifically, 2400). An ending condition is set that either one of the conditions for reaching is satisfied. The restricted total net increase in the number of game media refers to "the total number of game media awarded by the game executed while the second section SC2 is continuing ("0 when no game media are awarded"). ")" minus the "total number of game media consumed to execute the game while the second section SC2 is being continued ("0" when the game is not being executed)" In the case of the difference number of sheets, the minimum value of the predetermined difference number of sheets is set as a predetermined reference value, and the number of sheets is the increase of the predetermined difference number of sheets from the predetermined reference value.

In other words, when the second section SC2 is continued and the total number of net increases with restrictions on the number of game media from the start of the second section SC2 reaches the upper limit net increase number, the second section SC2 ends and the second section SC2 ends. It shifts to 1 section SC1. Further, when the number of times the game is executed since the start of the second section SC2 reaches the upper limit number of games due to the continuation of the second section SC2, the second section SC2 ends and the first section SC1 starts. Transition. When either one of these ending conditions is met, the pseudo-bonus state ST4 or AT state ST5 is terminated in the game in which the ending condition is met even in the middle of the pseudo-bonus state ST4 or AT state ST5. At the same time, the second section SC2 ends and the state shifts to the first section SC1 and the normal game state ST1. This makes it possible to prevent the second section SC2 from continuing excessively.

As shown in FIG. 40, the normal game state ST1, the first CB state ST2 and the second CB state ST3 can be stayed in any of the first section SC1 and the second section SC2. On the other hand, the pseudo bonus state ST4, the AT state ST5, and the end preparation state ST6 do not stay in the first section SC1, but stay only in the second section SC2.

FIG. 41(b) is an explanatory diagram for explaining the contents of each game state ST1 to ST6 in the second section SC2. As already explained, in the normal game state ST1, the pseudo-bonus state ST4, the AT state ST5, and the end preparation state ST6, the game can be executed in any of the situations where the bet number of game media is "3" and "2". is possible. In the first CB state ST2, the game can be executed only when the number of game media bet is "3", and in the second CB state ST3, the game can be executed only when the number of game media bet is "2". It is possible to run

In the case of the normal game state ST1 in the second section SC2, whether the game with the bet number of "3" or the game with the bet number of "2" is executed. The net increase expected value of game media is less than one. In this case, in the normal game state ST1 in the second section SC2, as will be described later, a lottery process for shifting to the pseudo-bonus state ST4 can be executed based on the result of the lottery process (FIG. 34) for the winning combination in each game. , the transition lottery process is executed in the game with the bet number of "3", but is not executed in the game with the bet number of "2". Further, in the normal game state ST1 in the second section SC2, as will be described later, each time one game is executed, the value of the canceled game number counter provided in the main side RAM 74 is decremented by 1, and after the decrement by 1, the game is canceled. When the value of the number-of-games counter is "0", the transition to the pseudo-bonus state ST4 is confirmed, but the subtraction of the number-of-released-games counter is not executed in games where the number of bets is "3". On the other hand, it is not executed in games where the number of bets is "2". Therefore, in the normal game state ST1 in the second interval SC2, a game with a bet number of "3" is better to be executed than a game with a bet number of "2". It is advantageous for the player.

In the pseudo-bonus state ST4, when a game with a bet number of "3" is executed, the net increase expected value of game media can be 1 or more, whereas a game with a bet number of "2" is executed. If executed, the expected net increase in game media is less than one. Therefore, in the pseudo-bonus state ST4, a game with a bet number of "3" is better for the player than a game with a bet number of "2". Advantageous. In the pseudo-bonus state ST4, as will be described later, lottery processing for shifting to the AT state ST5 can be executed based on the result of the lottery processing (FIG. 34) for the winning combination in each game. It is executed in games where the number of bets is "3", but is not executed in games where the number of bets is "2". Therefore, from this point of view as well, in the pseudo-bonus state ST4, it is better to execute a game with a bet number of "3" than to execute a game with a bet number of "2". It is advantageous for those who

In the AT state ST5, when a game with a bet number of "3" is executed, the net increase expected value of game media can be 1 or more, whereas a game with a bet number of "2" is executed. If so, the net increase expected value of game media is less than one. Therefore, in the AT state ST5, playing a game with a bet number of "3" is more advantageous for the player than playing a game with a bet number of "2". is. In the AT state ST5, as will be described later, an additional lottery process for determining whether or not to increase the number of remaining sets in the AT state ST5 based on the result of the lottery process (FIG. 34) for the winning combination in each game. , and a transition lottery process to an additional period in which the number of remaining sets in the AT state ST5 is likely to increase. On the other hand, it is not executed in games where the number of bets is "2". Therefore, from this point of view as well, in the AT state ST5, a game with a bet number of "3" is better to be executed than a game with a bet number of "2". is advantageous for

As described above, in the normal game state ST1, the pseudo-bonus state ST4, and the AT state ST5 in the second section SC2, even if it is advantageous to execute the game with the number of bets "3". , the number of game media awarded in a game with a bet number of "2" in any of the normal game state ST1, the pseudo-bonus state ST4, and the AT state ST5 in the second section SC2 is the number of game media in the second section SC2. In addition to being added as a limited total net increase number, the game in which the number of bets is "2" in any of the normal game state ST1, the pseudo-bonus state ST4 and the AT state ST5 in the second section SC2 is continued in the second section SC2. is added as the total number of games played. In other words, a game with a bet number of "2" in any of the normal game state ST1, the pseudo-bonus state ST4, and the AT state ST5 in the second section SC2 is disadvantageous to the player. It ends up contributing to the side that satisfies the ending condition of section SC2. From this point of view as well, in the case of any of the normal game state ST1, the pseudo-bonus state ST4 and the AT state ST5 in the second section SC2, it is better to execute a game with a bet number of "3". It is more advantageous to the player than having the game with the number "2" run.

Even in the second section SC2, the first CB winning can be established and the second CB winning can be established in the same manner as in the first section SC1. When the first CB win is established in the second section SC2, the second section SC2 enters the first CB state ST2, and the second section SC2 is maintained even after the first CB state ST2 and after the first CB state ST2 ends. be. In addition, when the second CB winning is established in the second section SC2, the second section SC2 becomes the second CB state ST3, and the second section SC2 continues even after the second CB state ST3 and when the second CB state ST3 ends. maintained. In both the first CB state ST2 and the second CB state ST3, as already explained, the number of game media owned by the player at the end of the game state is greater than the number of game media owned by the player at the start of the game state. This is a game state in which the number of media is reduced. That is, the first CB state ST2 and the second CB state ST3 are game states disadvantageous to the player. On the other hand, the games executed in either the first CB state ST2 or the second CB state ST3 in the second section SC2 are added as the total number of games executed by continuing the second section SC2. In other words, although the games executed in the first CB state ST2 and the second CB state ST3 are disadvantageous to the player, the games contribute to fulfilling the ending condition of the second section SC2. . Therefore, if the first CB state ST2 or the second CB state ST3 occurs in the second section SC2, it is more disadvantageous for the player.

It should be noted that in the end preparation state ST6, the number of game media is reduced regardless of whether a game with a bet number of "3" is executed or a game with a bet number of "2" is executed in the second section SC2. Although the net increase expected value is less than 1, this is a gaming state in which only one game is executed while the second section SC2 ends with the end of the pseudo-bonus state ST4 or AT state ST5. Therefore, the games executed in the ready-to-end state ST6 do not contribute to the restricted total net increase in the number of game media in the second section SC2, and furthermore do not contribute to the total number of games in the second section SC2. However, the present invention is not limited to this, and even a game executed in the end preparation state ST6 contributes to the restricted total net increase in the number of game media in the second section SC2, and furthermore, in the second section SC2 It may be configured to contribute to the total number of games.

<Regarding CB states ST2 and ST3>
Next, the first CB state ST2 and the second CB state ST3 are described in detail. FIG. 42(a) shows that the first CB winning combination (that is, the index value IV at which the first CB winning data is stored in the main RAM 74) and the second CB winning combination (that is, the second CB winning data are stored in the main RAM 74). 42(b) is an explanatory diagram for explaining the first CB state ST2 and the second CB state ST3.

As shown in FIG. 42(a), the first CB combination can be won in games where the number of bets is "3", but cannot be won in games where the number of bets is "2". In a game where the number of bets is "3", the first CB combination is won with a probability of about 1/3.3. However, the winning state of the first CB role (that is, the state in which the first CB winning data is stored in the main RAM 74), the winning state of the second CB role (that is, the state in which the second CB winning data is stored in the main RAM 74), In either the first CB state ST2 or the second CB state ST3, the first CB combination is excluded from the lottery targets in the lottery process (FIG. 34).

The second CB combination can be won in games where the number of bets is "2", but cannot be won in games where the number of bets is "3". In a game where the number of bets is "2", the second CB role is won with a probability of about 1/2.2. However, the winning state of the first CB role (that is, the state in which the first CB winning data is stored in the main RAM 74), the winning state of the second CB role (that is, the state in which the second CB winning data is stored in the main RAM 74), In either the first CB state ST2 or the second CB state ST3, the second CB combination is excluded from the lottery targets in the lottery process (FIG. 34).

In the winning state of the 1st CB combination, the 1st CB winning can be established in the game with the number of bets of "3", but the winning of the 1st CB is not established in the game with the number of bets of "2". Therefore, in the case where the game with the number of bets of "2" is executed in the winning state of the 1st CB combination, even if the outcome of the winning lottery process (FIG. 34) is that none of the index values IV is won. , regardless of the stop order of the reels 32L, 32M, 32R and the stop operation timing of the stop buttons 42-44, the first CB winning is not established. Also, when a game with the number of bets of "2" is executed in the winning state of the first CB combination, even if the winning index value IV that can cause a so-called dropout occurs in the combination lottery process (FIG. 34), reel Regardless of the stop order of 32L, 32M, 32R and the stop operation timing of the stop buttons 42-44, the first CB prize is not established. When the game with the number of bets of "3" is executed in the winning state of the first CB combination and the first CB winning is established, the first CB state ST2 is entered.

As shown in FIG. 42(b), in the first CB state ST2, it is possible to execute a game in which the number of bets is "3". Impossible. In the first CB state ST2, normal replay winning data is stored in the main side RAM 74 with a probability of 3/10 in the winning lottery process (FIG. 34) in each game. If the operation timing of the button 42 is a predetermined timing, a normal replay prize is established regardless of the stop order of the reels 32L, 32M, 32R. When the operation timing of the left stop button 42 is not the predetermined timing, the normal replay winning is not established even if the normal replay winning data is stored.

In the first CB state ST2, when the normal replay winning data is not stored in the main RAM 74 in the winning lottery process (FIG. 34), or when the normal replay winning data is stored in the main RAM 74, the left stop button 42 is pressed. When the normal replay winning cannot be established because the operation timing is not the predetermined timing, the first bell winning can be established. In this case, the winning of the first bell is achieved regardless of the order in which the reels 32L, 32M, and 32R are stopped.

However, it is not limited to this, and in the first CB state ST2, when normal replay winning data is stored in the main side RAM 74 in the lottery process (FIG. 34) of the combination, the order of stopping the reels 32L, 32M, 32R Also, a configuration may be adopted in which the normal replay prize is established reliably regardless of the stop operation timing of each of the stop buttons 42-44. Also, in the first CB state ST2, when the normal replay winning data is not stored in the main side RAM 74 in the winning lottery process (FIG. 34), the stop order of the reels 32L, 32M, 32R and the stop of each stop button 42-44 A configuration may be adopted in which the winning of the first bell is surely established regardless of the operation timing.

When the first bell win is established in the first CB state ST2, the game medium of "1" is provided. As already explained, in the first CB state ST2, the game can be executed only when "3" game media are betted. On the other hand, the number of game media awarded in the game in the first CB state ST2 is "1". Then, the first CB state ST2 ends when "30" game media are provided. Therefore, in the first CB state ST2, it is necessary to generate 30 times the event that "1" game media is awarded in the game executed by betting "3" game media. The game media possessed by the player will decrease by at least 60 from the start of the first CB state ST2 to the end of the first CB state ST2. Therefore, the first CB state ST2 is a game state disadvantageous to the player.

In addition, in the first CB state ST2, as described above, the normal replay winning may be established, and both the normal replay winning and the first bell winning may not be established. Then, when the first CB state ST2 occurs in the second section SC2, the first CB state ST2, which is disadvantageous to the player, continues for 30 games or more, and the number of games is executed in the second section SC2. added to the total number of games played.

In the winning state of the second CB combination, the second CB winning can be established in the game with the bet number of "2", while the second CB winning is not established in the game with the bet number of "3". Therefore, when a game with the number of bets of "3" is executed in the winning state of the 2nd CB combination, even if the lottery process of the combination (FIG. 34) results in no winning of any index value IV. , the order in which the reels 32L, 32M, and 32R are stopped and the stop operation timing of the stop buttons 42-44 do not establish the second CB winning. Further, when a game with the number of bets of "3" is executed in the winning state of the 2nd CB combination, even if the winning index value IV that can cause a so-called dropout occurs in the combination lottery process (FIG. 34), reel The second CB prize is not established regardless of the stop order of 32L, 32M, and 32R and the stop operation timing of the stop buttons 42-44. When a game with a bet number of "2" is executed in the winning state of the second CB combination and the second CB winning is established, the state becomes the second CB state ST3.

As shown in FIG. 42(b), in the second CB state ST3, the game can be executed in a situation where the number of bets is "2", and the maximum bet number of game media is "2". In the second CB state ST3, normal replay winning data is stored in the main side RAM 74 with a probability of 3/10 in the winning lottery process (FIG. 34) in each game. If the operation timing of the button 42 is a predetermined timing, a normal replay prize is established regardless of the stop order of the reels 32L, 32M, 32R. When the operation timing of the left stop button 42 is not the predetermined timing, the normal replay winning is not established even if the normal replay winning data is stored.

In the second CB state ST3, when the normal replay winning data is not stored in the main side RAM 74 in the winning lottery process (FIG. 34), or when the normal replay winning data is stored in the main side RAM 74, the left stop button 42 is pressed. When the normal replay winning cannot be established because the operation timing is not the predetermined timing, the first bell winning can be established. In this case, the winning of the first bell is achieved regardless of the order in which the reels 32L, 32M, and 32R are stopped.

However, it is not limited to this, and when normal replay winning data is stored in the main side RAM 74 in the winning lottery process (FIG. 34) in the second CB state ST3, the order of stopping the reels 32L, 32M, 32R Also, a configuration may be adopted in which the normal replay prize is established reliably regardless of the stop operation timing of each of the stop buttons 42-44. In addition, in the second CB state ST3, when the normal replay winning data is not stored in the main side RAM 74 in the lottery process (FIG. 34) of the combination, the order of stopping the reels 32L, 32M, 32R and the stop of the stop buttons 42 to 44 A configuration may be adopted in which the winning of the first bell is reliably established regardless of the operation timing.

If the first bell win is established in the second CB state ST3, the game medium of "1" is provided. As already explained, in the second CB state ST3, the game can be executed only when "2" game media are betted. On the other hand, the number of game media awarded in the game in the second CB state ST3 is "1". Then, the second CB state ST3 ends when "30" game media are awarded. Therefore, in the second CB state ST3, it is necessary to generate 30 times the event that "1" game media is awarded in the game executed by betting "2" game media. The game media possessed by the player will decrease by at least 30 from the start of the second CB state ST3 to the end of the second CB state ST3. Therefore, the second CB state ST3 becomes a game state disadvantageous to the player. However, this disadvantage of the second CB state ST3 is lower than that of the first CB state ST2.

Further, in the second CB state ST3, as described above, the normal replay winning may be established, and both the normal replay winning and the first bell winning may not be established. Then, when the second CB state ST3 occurs in the second section SC2, the second CB state ST3, which is disadvantageous to the player, continues for 30 games or more, and the number of games is executed in the second section SC2. added to the total number of games played.

As described above, in the configuration in which the first CB state ST2 and the second CB state ST3 are set as game states disadvantageous to the player, by executing the game with the number of bets "2", the winning state of the second CB combination is obtained. At the same time, after the second CB winning is not established, a game with a bet number of "3" is executed, and as a result of the winning lottery process (FIG. 34) in each game, the reels 32L, 32M, and 32R are stopped. Regardless of the order and the stop operation timing of each of the stop buttons 42 to 44, it is possible to play the game while preventing the transition to the first CB state ST2 and the second CB state ST3. That is, when the second CB role is won by executing a game in which the number of bets is "2", a game in which the number of bets is "3" is subsequently executed to achieve the second CB role. Even in the winning state of , the second CB prize is not established. Also, in the winning state of the second CB role, even if a game with the number of bets of "3" is executed, the first CB role is excluded from the lottery targets in the role lottery process (FIG. 34). will not be elected. Since the winning state of the first CB combination is not established, the first CB prize is not established, and the game state does not shift to the first CB state ST2. As a result, it is possible to execute a game with a bet number of "3" while preventing transitions to the first CB state ST2 and the second CB state ST3. Then, by executing a game in which the number of bets is "3", a transition to the second section SC2 can occur as already described, and a transition to the pseudo-bonus state ST4 can occur.

As shown in FIG. 42(a), the probability of winning the second CB role in a game where the number of bets is "2" is about 1/2.2, whereas in a game where the number of bets is "3" The probability of winning the first CB role is about 1/3.3. That is, the probability of winning the second CB combination is set higher than the probability of winning the first CB combination. As a result, when the second CB role is won by executing a game in which the number of bets is "2" in a game hall or the like, the number of games required until the second CB role is won is reduced. becomes possible. On the other hand, even if a game in which the number of bets is "3" is executed before the 2nd CB role is erroneously won, the probability of winning the 1st CB role is higher than the probability of winning the 2nd CB role. By making it low, it is possible to make it difficult to win the first CB combination.

The probability of winning the 2nd CB role is not limited to a configuration higher than the probability of winning the 1st CB role, and the probability of winning the 1st CB role is higher than the probability of winning the 2nd CB role. A high configuration may be employed, and a configuration may be employed in which the probability of winning the first CB role and the probability of winning the second CB role are the same or substantially the same.

<Regarding the second section SC2>
Next, the second section SC2 will be explained. First, the first control process of the game section executed by the main MPU 72 will be described with reference to the flowchart of FIG. The first control process of the game section is executed in step S1312 after completion of the win/loss determination of the role in the lottery process (FIG. 34) and before the advantageous lottery process (step S1313) at the start of the game. .

First, it is determined whether or not the second section flag of the main RAM 74 is set to "1" (step S1901). The second section flag is a flag for specifying in the main MPU 72 whether or not the game section is the second section SC2. , and the first section SC1 is when the value of the second section flag is "0". If the second section flag is set to "1" (step S1901: YES), the processing after step S1902 is not executed. As a result, the lottery process for the number of unlocked games in step S1906 is not executed in the second section SC2.

If the second interval flag is not set to "1" (step S1901: NO), it is determined whether the current gaming state is the first CB state ST2 or the second CB state ST3 (step S1902). If the current gaming state is the first CB state ST2 or the second CB state ST3 (step S1902: YES), the processing after step S1903 is not executed. As a result, even if it is the first section SC1, if it is the first CB state ST2 or the second CB state ST3, the process for setting the second section SC2 in step S1905 and the lottery process for the number of unlocked games in step S1906. will not be executed.

If the current gaming state is neither the first CB state ST2 nor the second CB state ST3 (step S1902: NO), it is determined whether the value of the bet number setting counter 74a of the main side RAM 74 is "3". Then, it is determined whether or not the number of bets for the current game is "3" (step S1903). If the number of bets for the current game is "2" (step S1903: NO), the processing after step S1904 is not executed. As a result, in the game in which the number of bets is "2" even in the first section SC1, the process for setting the second section SC2 in step S1905 and the lottery process for the number of unlocked games in step S1906 are not executed. It will be.

If the number of bets for the current game is "3" (step S1903: YES), it is determined whether or not any index value IV has been won in the lottery process (FIG. 34) for the current combination (step S1904). ). If the lottery process (FIG. 34) for this combination is lost (step S1904: NO), the processes after step S1905 are not executed. As a result, even if it is the first section SC1, if it is lost in the winning lottery process (FIG. 34), the processing for setting the second section SC2 in step S1905 and the number of unlocked games in step S1906 lottery processing will not be executed.

In the lottery process (FIG. 34) for the current role, if any index value IV has been won (step S1904: YES), the second section flag of the main side RAM 74 is set to "1", and the main side RAM 74 The continuous game number counter 74c (see FIG. 9) and the total winning number counter 74d (see FIG. 9) provided in the are each cleared to "0" (step S1905). The second section SC2 is set by setting the second section flag to "1".

The number-of-continued-games counter 74c is for specifying the number of times the game is executed from the start of the second section SC2 when the second section SC2 is continued without intervening the first section SC1. is a counter of When the value of the number-of-continued-games counter 74c reaches a value corresponding to the upper limit number of games (specifically, 1500 games) in the second section SC2, even in the middle of the pseudo-bonus state ST4 or the AT state ST5, In the reached game, the second section SC2 ends, and the state shifts to the first section SC1 and the normal game state ST1.

The total acquisition number counter 74d informs the main side MPU 72 of the restricted total net increase number of game media from the start of the second section SC2 when the second section SC2 is continued without intervening the first section SC1. It is a counter for specifying As already explained, the restricted total net increase in the number of game media refers to the “total number of game media awarded by the game executed while the second section SC2 continues (the total number of game media awarded "0" when the game is not running)" to "the total number of game media consumed for executing the game while the second section SC2 is continuing ("0" when the game is not running) is the predetermined difference number of sheets, the minimum value of the predetermined difference number of sheets is set as a predetermined reference value, and the number of sheets increases by the predetermined difference number of sheets from the predetermined reference value. When the value of the total acquisition number counter 74d reaches the value corresponding to the upper limit net increase number (specifically, 2400 cards) in the second section SC2, even during the pseudo-bonus state ST4 or the AT state ST5, In the reached game, the second section SC2 ends, and the state shifts to the first section SC1 and the normal game state ST1.

Thereafter, lottery processing for the number of unlocked games is executed (step S1906). The number of unlocked games is a counter for the main MPU 72 to specify the number of games required until the transition to the pseudo-bonus state ST4 occurs when no winning is made to transition to the pseudo-bonus state ST4. In the lottery process for the number of unlocked games, first, the lottery table for the number of unlocked games pre-stored in the main ROM 73 is read, and numerical information is acquired from the lottery counter periodically updated in the main RAM 74 . Then, the number of unlocked games is selected by collating the numerical information acquired from the lottery counter against the lottery table of the number of unlocked games. In this case, one of 50 games, 100 games, 200 games, 300 games, 400 games, 500 games, 600 games, 700 games, and 800 games is selected as the number of unlocked games. In addition, the selection probabilities for each number of unlocked games are the same. However, the present invention is not limited to this, and the configuration may be such that the probability of selecting the number of unlocked games with a large number of games is set high, or the probability of selecting the number of unlocked games with a small number of games is set high. It is also possible to adopt a configuration in which After executing the lottery process for the number of unlocked games, the number of unlocked games selected in the lottery process for the number of unlocked games is set in the number of unlocked games counter provided in the main RAM 74 (step S1907). The unlocked game number counter is a counter for specifying the number of remaining unlocked games in the main MPU 72 .

Thereafter, a lighting lottery process for the section display section 67 is executed (step S1908). In the lighting lottery process of the section display unit 67, the lighting lottery table provided in the main ROM 73 and the lottery counter periodically updated in the main RAM 74 are used to set the second section SC2 from the beginning. A lottery determines whether the section display section 67 is to be lit (that is, to be lit immediately) or that the section display section 67 is to be to be lit (that is, standby for lighting) upon transition to the pseudo-bonus state ST4 thereafter. In the lottery process (Fig. 34) for the role in this game, if any of the index values IV = 1 to 10 is won, immediate lighting is selected with a probability of 50%, and standby lighting is selected with a probability of 50%. is selected, and if the index value IV=11 is won, immediate lighting is selected with a probability of 65%, and lighting standby is selected with a probability of 35%. is selected with a probability of 62% and the standby mode is selected with a probability of 38%. When lighting standby is selected and index value IV=14 is won, immediate lighting is selected with a probability of 75% and lighting standby is selected with a probability of 25% and index value IV=15 is won. , the immediate lighting is selected with a probability of 70%, and the lighting standby is selected with a probability of 30%. Lighting standby is selected with a probability, and when index value IV=17 is won, immediate lighting is selected with a probability of 30% and lighting standby is selected with a probability of 70%. In this case, the index value IV with a lower probability of winning in the winning lottery process (FIG. 34) has a higher probability of selecting immediate lighting.

When immediate lighting is selected in the lighting lottery process (step S1908) of the section display section 67 (step S1909: YES), the lighting process of the section display section 67 is executed (step S1910). In the lighting process of the section display section 67, the section display section 67 is switched from the off state to the on state. As a result, the section display unit 67 starts to notify that it is the second section SC2.

On the other hand, when lighting standby is selected in the lighting lottery process (step S1908) of the section display unit 67 (step S1909: NO), the lighting standby flag provided in the main RAM 74 is set to "1" ( step S1911). The lighting standby flag is a flag for specifying in the main MPU 72 that switching of the section display portion 67 from the off state to the lighting state is waiting in the second section SC2.

Next, the second control process of the game section executed by the main MPU 72 will be described with reference to the flowchart of FIG. The second control process for the game section is executed at step S1807 in the corresponding process (FIG. 39) at the end of the game. As described above, the corresponding processing at the end of the game is executed after all the reels 32L, 32M, 32R have stopped rotating in one game. is executed after all

When "1" is set to the second section flag of the main side RAM 74 and the current game section is the second section SC2 (step S2001: YES), the state of the flag of the main side RAM 74 is confirmed. It is determined whether or not the game state is the end preparation state ST6 (step S2002). The end preparation state ST6 is a case where the pseudo-bonus state ST4 or the AT state ST5 ends without satisfying the ending condition of the second section SC2, which will be described later. It is a game state to transition to when is finished.

If it is in the termination preparation state ST6 (step S2002: YES), it is determined whether or not the termination preparation completion flag provided in the main RAM 74 is set to "1" (step S2003). The termination preparation completion flag is a flag for the main side MPU 72 to specify whether or not one game has been executed in the termination preparation state ST6. In the pseudo-bonus processing (step S1805) in the corresponding processing at the end of the game (FIG. 39), it is specified that the number of remaining games to be continued in the pseudo-bonus state ST4 is 0, and then the state shifts to the normal game state ST1. In this case, a flag is set to enter the termination preparation state ST6, and the termination preparation completion flag is cleared to "0". In addition, in the AT process (step S1806) in the corresponding process at the end of the game (FIG. 39), one set is completed in a situation where the number of remaining sets in the AT state ST5 is 0 times, and the normal game state ST1 is entered. When this is identified, a flag is set to set the end preparation state ST6, and the end preparation completion flag is cleared to "0".

If the termination preparation completion flag is not set to "1" (step S2003: NO), the termination preparation completion flag is set to "1" (step S2004), and then the processing from step S2005 is executed. If the end preparation completion flag is set to "1" (step S2003: YES), it means that one game has been executed in the end preparation state ST6. In this case, a process for ending the second section SC2 is executed.

Specifically, first, the initialization process for the second section SC2 is executed (step S2014). In the initialization process of the second section SC2, the second section flag of the main RAM 74 is cleared to "0". As a result, the game section becomes the first section SC1. In addition, in the initialization process of the second section SC2, even if the user stays in the AT state ST5, the AT state ST5 including the counter for storing the remaining number of continuous games in the AT state ST5 is indicated. By clearing various data (including the AT state flag), the game state is shifted to the normal game state ST1. Note that even during the first CB state ST2 and the second CB state ST3, the initialization processing of the second section SC2 is executed and the second section SC2 ends, but the first CB state ST2 and the second CB state ST3 continues without being terminated.

After that, when the section display section 67 is in the lighting state, the section display section 67 is switched from the lighting state to the non-lighting state (step S2015). As a result, the notification of the second section SC2 on the section display section 67 is terminated. Thereafter, a second section initialization command indicating that the second section SC2 has been initialized is transmitted to the effect side MPU 92 (step S2016). As a result, the effect side MPU 92 executes the effect corresponding to the end of the second section SC2.

If it is not the end preparation state ST6 (step S2002: NO), or if the process of step S2004 is executed, the value of the continuous game number counter 74c of the main side RAM 74 is incremented by 1 (step S2005). As already explained, the number-of-continued-games counter 74c informs the main MPU 72 of the number of times the game has been executed from the start of the second section SC2 when the second section SC2 continues without intervening the first section SC1. It is a counter for specifying

After that, it is determined whether or not the value of the number-of-continued-games counter 74c after adding one is equal to or greater than 1500, which is the upper limit number of games (step S2006). If the value of the continuous game number counter 74c is 1500 or more, it means that the ending condition of the second section SC2 is met. In this case, an affirmative determination is made in step S2006, and processing for ending the second section SC2 in steps S2014 and S2016 is executed. The processing contents of steps S2014 to S2016 have already been described. As a result, the second section SC2 ends and becomes the first section SC1, and when the AT state ST5 is in the middle, the AT state ST5 is forcibly ended and the normal game state ST1 is entered.

If the value of the number-of-continued-games counter 74c is less than 1500 (step S2006: NO), is any of the first-chance replay wins, second-chance replay wins, and normal replay wins established in the current game? It is determined whether or not (step S2007). In this case, regardless of whether the number of bets in the current game is "2" or "3", the determination in step S2007 is made, and the current game is in the normal game state ST1, the first CB state ST2, and the second CB. Any gaming state of the state ST3, the pseudo-bonus state ST4 and the AT state ST5 is subject to the determination in step S2007.

If none of the replay wins have been established (step S2007: NO), the number of bets for this game is subtracted from the total winning number counter 74d of the main RAM 74 (step S2008). In this case, the number of bets for the current game is grasped from the value of the bet number history counter 74f instead of the value of the bet number setting counter 74a. As already explained, in the normal processing (FIG. 25), the timing is after the rotation of all the reels 32L, 32M, and 32R in one game is completed, and is earlier than the timing at which the processing for dealing with the end of the game (step S912) is started. At the previous timing, the value of the bet number setting counter 74a is set in the bet number history counter 74f. Therefore, at the timing when the second control process (FIG. 44) of the game section is started, the number of bets for the current number of games is set in the bet number history counter 74f. In addition, even if a replay win was established in the previous game, and the current game is a game corresponding to a replay due to the establishment of the replay win, the number of bets in this game (that is, the number of bet history counters 74f) value) from total wins counter 74d.

As already explained, the total acquisition number counter 74d counts the total net increase in number of game media with restrictions from the start of the second section SC2 when the second section SC2 continues without intervening the first section SC1. This is a counter for identification by the main MPU 72 . As already explained, the restricted total net increase in the number of game media refers to the “total number of game media awarded by the game executed while the second section SC2 continues (the total number of game media awarded "0" when the game is not running)" to "the total number of game media consumed for executing the game while the second section SC2 is continuing ("0" when the game is not running) is the predetermined difference number of sheets, the minimum value of the predetermined difference number of sheets is set as a predetermined reference value, and the number of sheets increases by the predetermined difference number of sheets from the predetermined reference value.

After that, in this game, any small role winning prize (1st to 9th supplementary prize, 1st bell prize, 2nd bell prize, 1st watermelon prize, 2nd watermelon prize and cherry prize) ) is established (step S2009). In this case, regardless of whether the number of bets in the current game is "2" or "3", the determination in step S2009 is made, and the current game is normal game state ST1, first CB state ST2, second CB. Any gaming state of the state ST3, the pseudo-bonus state ST4 and the AT state ST5 is subject to the determination in step S2009.

When an affirmative determination is made in step S2009, the number of game media provided in the current game is added to the total acquisition number counter 74d of the main RAM 74 (step S2010). In this case, the number of game media given in the current game is grasped from the value of the given number history counter instead of the value of the medium giving counter. As already explained, in the normal processing (FIG. 25), the corresponding processing at the end of the game is the timing after the rotation of all the reels 32L, 32M, and 32R in one game is completed and the medium provision processing (step S910) is completed. At a timing before the timing at which (step S912) is started, the value of the medium provision counter is set to the provision number history counter. Therefore, at the timing when the second control process (FIG. 44) of the game section is started, the number of game media given in the current game is set in the given number history counter.

When a negative determination is made in step S2009, or when the process of step S2010 is executed, it is determined whether or not the value of the total acquisition number counter 74d of the main side RAM 74 is 0 or more (step S2011). When the value of the total acquisition number counter 74d is less than 0 (step S2011: NO), the total acquisition number counter 74d is cleared to "0" (step S2012).

As described above, in step S2008, the number of bets for the current number of games is subtracted from the total winning number counter 74d. Therefore, for example, in the game in the normal game state ST1 immediately after the transition to the second section SC2, any small win is established. Otherwise, the value of the total acquisition number counter 74d will be less than zero. In this case, by making a negative determination in step S2011, the total acquisition number counter 74d is cleared to "0" in step S2012. As a result, "the total number of game media awarded by the game executed while the second section SC2 is continuing ("0" in the situation where no game medium is awarded)" to "the second section When the value obtained by subtracting the total number of game media consumed to execute the game while SC2 is being continued ("0" when the game is not being executed) is set as the predetermined difference number, Using the minimum value of the predetermined difference number as a predetermined reference value, the total net increase number with limitation of game media, which is the increase of the predetermined difference number from the predetermined reference value, is measured using the total acquired number counter 74d. becomes possible.

If an affirmative determination is made in step S2007, if an affirmative determination is made in step S2011, or if the process of step S2012 is executed, does the value of the total acquisition number counter 74d exceed the upper limit net increase number of "2400"? It is determined whether or not (step S2013). If the value of the total acquisition number counter 74d exceeds "2400", it means that the ending condition of the second section SC2 is satisfied. In this case, an affirmative determination is made in step S2013, and processing for ending the second section SC2 in steps S2014 to S2016 is executed. The processing contents of steps S2014 to S2016 have already been described. As a result, the second section SC2 ends and becomes the first section SC1, and when the AT state ST5 is in the middle, the AT state ST5 is forcibly ended and the normal game state ST1 is entered.

Here, if any of the replay prizes are established, affirmative determination is made in step S2007, and the processing of steps S2008 to S2012 is not executed. In a game in which a replay winning prize is established, the game media owned by the player at the start of the game is used for setting bets, but as a profit from the replay winning establishment, the same number of bets as in the game in which the replay winning prize was established It is possible to replay a new game with the number of bets. In other words, the number of game media owned by the player does not change in the game in which the replay winning has been established. In this case, by not executing the processing of steps S2008 to S2012 in a game in which a replay winning has been established, in a game in which the number of game media owned by the player does not change, the value of the total winning number counter 74d is increased. It is possible to omit the execution of processing for changing , and it is possible to omit the execution of useless processing.

On the other hand, even in a game in which a replay win has been established, it is determined in step S2013 whether or not the value of the total winning number counter 74d exceeds the upper limit net increase number of "2400". As a result, although the value of the total acquisition number counter 74d had already exceeded the upper limit net increase number of "2400" in the game prior to the game in which the replay winning was established, the second Even if the initialization process of the section SC2 has not been executed, it is specified that the value of the total acquisition number counter 74d exceeds the upper limit net increase number of "2400" in the game in which the subsequent replay winning has been established. , and the initialization process of the second section SC2 can be executed.

If a negative determination is made in step S2013, ending handling processing is executed (step S2017). FIG. 45 is a flow chart showing the ending handling process.

First, it is determined whether or not the first ending flag provided in the main RAM 74 is set to "1" (step S2101). The first ending flag is a flag for the main MPU 72 to specify that the number of times the game is executed in the second section SC2, which is counted using the number-of-continued-games counter 74c, is highly likely to reach the upper limit number of games. is.

If the first ending flag is not set to "1" (step S2101: NO), the value of the continuous game number counter 74c of the main side RAM 74, the value of the AT continuation counter provided in the main side RAM 74, and the value of the AT continuation counter provided in the main side RAM 74 Whether or not the sum of the value of the set number counter provided in the RAM 74 and the value of the initial continuous game number (50 games) in one set in the AT state ST5 is equal to or greater than the upper limit number of games in the second section SC2. is determined (step S2102). The AT continuation counter is a counter for the main side MPU 72 to specify the number of remaining continuation games in one set in the AT state ST5. The initial number of continuous games in one set in the AT state ST5 is 50 games, and the remaining number of continuous games can be increased by fulfilling the additional condition during the one set. The number-of-sets counter is a counter for specifying the number of remaining sets in the AT state ST5 in the main MPU 72 . The upper limit number of games in the second section SC2 is set to 1500 games as already explained. The upper limit number of games in the second section SC2 is not limited to 1,500 games, and may be less than 1,500 games or more than 1,500 games.

If an affirmative determination is made in step S2102, the first ending flag is set to "1" (step S2103). When the first ending flag is set to "1", the remaining number of continuous games and the number of remaining sets do not increase in the AT state ST5, details of which will be described later. As a result, in a situation where the ending condition of the second section SC2 is satisfied, it is possible to prevent further addition of the remaining number of continuous games and the number of remaining sets in the AT state ST5. Become.

After that, the first ending command is transmitted to the effect side MPU 92 (step S2104). The first ending command includes information on the number of games required to satisfy the ending condition of the second section SC2, that is, information corresponding to the difference between the upper limit number of games in the second section SC2 and the value of the number-of-continued-games counter 74c. included.

By receiving the first ending command, the effect-side MPU 92 can recognize that the main-side MPU 72 is in a situation where the first ending flag is set to "1". When the effect-side MPU 92 receives the first ending command in a situation where the effect in the execution mode corresponding to the ending period has not yet started, the effect execution mode in the upper lamp 61, the speaker 62, and the image display device 63 is changed to the ending period. Make it a corresponding execution mode. The situation in which the first ending flag is set to "1" basically occurs in the AT state ST5, but it can also occur in the first CB state ST2 or the second CB state ST3.

If an affirmative determination is made in step S2101, if a negative determination is made in step S2102, or if the process of step S2104 is executed, is the second ending flag provided in the main RAM 74 set to "1"? It is determined whether or not (step S2105). The second ending flag is for the main MPU 72 to specify that there is a high possibility that the limited total number of net additions of game media measured using the total acquisition number counter 74d will reach the upper limit number of net additions. is a flag.

If the second ending flag is not set to "1" (step S2105: NO), the value of the AT continuation counter, the value of the set count counter, and the value of the number of initial continuous games in one set of AT state ST5 (50 games ) and the expected value of game media acquired in AT state ST5 is added to the value of the total acquired number counter 74d. (step S2106). The expected acquisition value of game media in one game in the pseudo-bonus state ST4 and the AT state ST5 is about five. The upper limit net increase number of sheets in the second section SC2 is set to 2400 sheets as already explained. Note that the upper limit net increase number of sheets in the second section SC2 is not limited to 2400 sheets, and may be less than 2400 sheets or more than 2400 sheets.

If an affirmative determination is made in step S2106, the second ending flag is set to "1" (step S2107). When the second ending flag is set to "1", the remaining number of continuous games and the number of remaining sets do not increase in the AT state ST5, details of which will be described later. As a result, in a situation where the ending condition of the second section SC2 is satisfied, it is possible to prevent further addition of the remaining number of continuous games and the number of remaining sets in the AT state ST5. Become.

After that, the second ending command is transmitted to the effect side MPU 92 (step S2108). The second ending command includes information on the total net increase in number of game media with restrictions required until the ending condition of the second section SC2 is satisfied, that is, the value of the total acquired number counter 74d for the upper limit net increase in the number of game media in the second section SC2. contains information corresponding to the difference between

By receiving the second ending command, the effect-side MPU 92 can grasp the situation in which the second ending flag is set to "1" in the main-side MPU 72 . When the effect side MPU 92 receives the second ending command in a situation where the effect in the execution mode corresponding to the ending period has not yet started, the effect execution mode in the upper lamp 61, the speaker 62 and the image display device 63 is set to the ending period. Make it a corresponding execution mode. The situation in which the second ending flag is set to "1" occurs in the AT state ST5, but does not occur in other game states.

<Regarding normal game state ST1>
Next, the processing contents in the normal game state ST1 will be explained. FIG. 46 is a flow chart showing advantageous lottery processing at the start of the game, which is executed by the main MPU 72 . The advantageous lottery process at the start of the game is performed after the win/loss determination and the first control process (step S1312) of the game section in the lottery process (FIG. 34) are completed, and from the stop order notification control process (step S1314). is executed in step S1313, which is the process executed before.

First, it is determined whether or not the second section flag of the main RAM 74 is set to "1" (step S2201). As already explained, the second section flag is a flag for specifying whether or not the game section is the second section SC2 in the main side MPU 72, and the second section flag may be set to "1". The second section SC2 is the first section SC1 when the value of the second section flag is "0". If the second section flag is not set to "1" (step S2201: NO), the processing after step S2202 is not executed. As a result, when it is the first section SC1, the processing for shifting the game state to the pseudo-bonus state ST4 after step S2207 is not executed.

If the second section flag is set to "1" (step S2201: YES), if the current gaming state is the pseudo-bonus state ST4 or AT state ST5 (step S2202: YES), the advantageous state at the start of the game processing is executed (step S2203). Advantageous state processing at the start of the game will be described later.

If the second section flag is set to "1" (step S2201: YES) and the gaming state is neither the pseudo-bonus state ST4 nor the AT state ST5 (step S2202: NO), the current game It is determined whether the state is the first CB state ST2 or the second CB state ST3 (step S2204). If the current gaming state is the first CB state ST2 or the second CB state ST3 (step S2204: YES), the processing after step S2205 is not executed. As a result, even if it is the second section SC2, if it is the first CB state ST2 or the second CB state ST3, the processing for shifting the game state to the pseudo-bonus state ST4 after step S2207 is not executed. .

If the current gaming state is neither the first CB state ST2 nor the second CB state ST3 (step S2204: NO), it is determined whether or not the value of the bet amount setting counter 74a of the main side RAM 74 is "3". Then, it is determined whether or not the number of bets for the current game is "3" (step S2205). If the number of bets for this game is "2" (step S2205: NO), the processing after step S2206 is not executed. As a result, in the game in which the number of bets is "2" even in the second section SC2, the processing for shifting the gaming state to the pseudo-bonus state ST4 after step S2207 is not executed.

If the number of bets for the current game is "3" (step S2205: YES), it is determined whether or not the second transition confirmation flag provided in the main RAM 74 is set to "1" (step S2206). . The second transition determination flag is a flag for the main side MPU 72 to specify that the transition to the pseudo-bonus state ST4 has already been won in the transition lottery process (step S2215) described later. If "1" is set in the second transition confirmation flag (step S2206: YES), the processing after step S2207 is not executed. As a result, in a situation where the transition to the pseudo-bonus state ST4 has already been confirmed, the processing for shifting the gaming state to the pseudo-bonus state ST4 after step S2207 is not executed.

If "1" is not set to the second transition determination flag (step S2206: NO), it is determined whether winning data corresponding to a direct hit is stored in the main RAM 74 (step S2207). Winning data for direct hits is cherry winning data. In other words, if the lottery process (FIG. 34) for the role in the current game wins with the index value IV=13, affirmative determination is made in step S2207. When an affirmative determination is made in step S2207, direct hit lottery processing is executed (step S2208). In the direct hit lottery process, a direct hit lottery table provided in the main ROM 73 and a lottery counter periodically updated in the main RAM 74 are used to determine whether or not to transition to the pseudo-bonus state ST4 at the end of the current game. will be determined by lottery. Although the probability of winning a direct hit in the direct lottery process is arbitrary, the slot machine 10 has a 25% probability of winning a direct hit.

If the direct hit lottery process results in a direct hit win (step S2209: YES), the first transition determination flag provided in the main side RAM 74 is set to "1" (step S2210). The first transition confirmation flag is a flag for specifying in the main side MPU 72 that a direct hit win has been made. Thereafter, freeze counter setting processing is executed (step S2211). In the setting process, the freeze counter provided in the main side RAM 74 is set with the freeze period information corresponding to the direct hit winning. The freeze counter is a counter for the main MPU 72 to specify that the freeze period has been set, and for the main MPU 72 to specify the remaining period of the freeze period.

The freeze period is a period during which the player's operation on the rotation of the reels 32L, 32M, and 32R for which the reel control corresponding to the result of the winning lottery process (FIG. 34) is executed is invalidated. As already explained, in the normal processing (FIG. 25), after the winning lottery processing (step S906) is executed and before the reel control processing (step S909) is started, the value of the freeze counter is 1 or more. It is determined whether or not (step S908), and if the value of the freeze counter is 1 or more, the process waits in step S908. The value of the freeze counter is decremented by the timer subtraction process (step S506) each time the timer interrupt process (FIG. 19) is started. In other words, in the slot machine 10, the freeze period is a period in which the rotation of the reels 32L, 32M, and 32R is forced to wait for the operation of the start lever 41 for starting one game. However, the present invention is not limited to this, and the period in which the operations of the stop buttons 42 to 44 are disabled after the reels 32L, 32M, 32R start rotating may be the freeze period. The freeze period may be a period during which the operation of the stop buttons 42 to 44 is invalidated, in which the stop control corresponding to the result of the winning lottery process (FIG. 34) is executed after the start of rotation. Although the freeze period is specifically 30 seconds, it is arbitrary.

After that, "1" is set to the direct hit freeze occurrence flag provided in the main side RAM 74 (step S2212). The direct hit freeze occurrence flag is a flag for specifying in the main side MPU 72 that the freeze period has been set with the direct hit winning as a trigger. Also, a direct hit freeze command is transmitted to the effect side MPU 92 (step S2213). When the direct hit freeze command is received, the effect side MPU 92 makes the execution mode of the effect in the upper lamp 61, the speaker 62 and the image display device 63 correspond to the direct hit win. By confirming the effect, the player can grasp that the state will shift to the pseudo-bonus state ST4 triggered by the direct hit winning.

If a negative determination is made in step S2207 or if a negative determination is made in step S2209, it is determined whether winning data corresponding to migration is stored in the main RAM 74 (step S2214). The transferable winning data is any one of first watermelon winning data, second watermelon winning data, cherry winning data, first chance replay winning data, and second chance replay winning data. In other words, if the lottery process (FIG. 34) for the winning combination in the current game is won with any of the index values IV=11 to 15, affirmative determination is made in step S2214. When an affirmative determination is made in step S2214, shift lottery processing is executed (step S2215).

In the transition lottery process, a transition lottery table provided in the main ROM 73 and a lottery counter periodically updated in the main RAM 74 are used to determine by lottery whether to transition to the pseudo-bonus state ST4. In the lottery process (FIG. 34) for the role in this game, if the first watermelon winning data is stored in the main side RAM 74 (if the index value IV=11 is won), the probability is 20%. Transition to the pseudo-bonus state ST4 is won, and when the second watermelon winning data is stored in the main side RAM 74 (when the index value IV=12 is won), the transition to the pseudo-bonus state ST4 occurs at a probability of 10%. If it is won and cherry winning data is stored in the main side RAM 74 (if the index value IV=13 is won), there is a probability of 40% that the transition to the pseudo-bonus state ST4 is won, and the main side RAM 74 stores the second When the 1-chance replay winning data is stored (when the index value IV=14 is won), there is a 30% probability that the transition to the pseudo-bonus state ST4 is won, and the main-side RAM 74 stores the second-chance replay winning data. is stored (when index value IV=15 is won), there is a probability of 20% that the pseudo-bonus state ST4 is won. In this case, an index value IV with a lower probability of winning in the winning lottery process (FIG. 34) has a higher probability of winning a transition to the pseudo-bonus state ST4. As a result, it is possible to increase the advantage of winning an index value IV with a low winning probability in the winning lottery process (FIG. 34).

In the transition lottery process, when the pseudo-bonus state ST4 transition is won (step S2216: YES), the second transition confirmation flag of the main side RAM 74 is set to "1" (step S2217). The second transition confirmation flag is a flag for the main MPU 72 to specify that the transition to the pseudo-bonus state ST4 has already been won in the transition lottery process (step S2215), as already described. Also, a value corresponding to the number of transition standby games (specifically, 5 games) is set in the transition standby counter provided in the main RAM 74 (step S2118). The transition standby counter is a counter for the main MPU 72 to specify that the number of transition standby games (specifically, 5 games) has been completed after the second transition confirmation flag is set to "1". By winning the transition in the transition lottery process (step S2215), not only is the second transition confirmation flag set to "1", but also a value corresponding to the number of transition standby games is set to the transition standby counter. The value of the transition standby counter is decremented by 1 each time one game is completed in a situation where the second transition confirmation flag is set to "1". Then, when the value of the transition standby counter becomes "0" in a situation where "1" is set to the second transition confirmation flag, the game state shifts to the pseudo-bonus state ST4. Therefore, after the transition lottery process (step S2215) wins the transition, the number of transition standby games is consumed, and the transition to the pseudo-bonus state ST4 occurs.

Next, normal processing executed by the main MPU 72 will be described with reference to the flowchart of FIG. The normal process is executed at step S1804 in the corresponding process at the end of the game (FIG. 39). As described above, the corresponding processing at the end of the game is executed after all the reels 32L, 32M, 32R have stopped rotating in one game, so the normal processing also stops all the reels 32L, 32M, 32R from rotating in one game. executed later. As already described, in the corresponding processing at the end of the game (FIG. 39), if the state is the first CB state ST2 or the second CB state ST3, the normal processing (step S1804) is executed by making an affirmative determination in step S1802. not.

When "1" is set in the second section flag of the main side RAM 74 and the current game section is the second section SC2 (step S2301: YES), "1" is set in the first transition confirmation flag of the main side RAM 74. It is determined whether or not it is set (step S2302). If the direct hit lottery process (step S2208) executed at the start of the current game results in a direct hit win, "1" is set to the first transition confirmation flag.

If "1" is set to the first transition determination flag (step S2302: YES), the first start setting process is executed (step S2303). In the first start setting process, the pseudo-bonus state flag provided in the main RAM 74 is set to "1". Also, in the first start setting process, a value corresponding to 100 games is set in the pseudo-bonus continuation counter provided in the main RAM 74 as the initial number of continuous games in the pseudo-bonus state ST4. In addition, in the first start setting process, the AT transition confirmation flag indicating that the transition to the AT state ST5 after the end of the pseudo-bonus state ST4 is confirmed is set to "1". That is, when a direct hit is won in the direct hit lottery process (step S2208), it is possible not only to shift to the pseudo-bonus state ST4, but also to shift to the AT state ST5 after the pseudo-bonus state ST4 ends. Determine. The pseudo-bonus state flag is a flag for the main side MPU 72 to specify whether or not the gaming state is the pseudo-bonus state ST4, and the pseudo-bonus continuation counter mainly indicates the number of remaining continuous games in the pseudo-bonus state ST4. This is a counter for identification by the side MPU 72 . Also, the AT shift confirmation flag is a flag for specifying in the main side MPU 72 that the game will shift to the AT state ST5 after the pseudo-bonus state ST4 ends. After that, the first output start flag provided in the main RAM 74 is set to "1" (step S2304). The first output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of the pseudo-bonus state ST4 is to be executed.

If "1" is not set to the first transition confirmation flag (step S2302: NO), it is determined whether the value of the bet number setting counter 74a of the main side RAM 74 is "3". It is determined whether or not the number of bets on the game is "3" (step S2305). If the number of bets for this game is "2" (step S2305: NO), the processing after step S2306 is not executed. As already explained, in the processing after step S2306, the number of games required for transitioning to the pseudo-bonus state ST4 is subtracted as one game is completed, and the transition to the pseudo-bonus state ST4 is performed as the game is completed. When the condition is established, the process for shifting to the pseudo-bonus state ST4 is executed. In this case, if the game with the bet number of "2" is executed, the process from step S2306 onwards is not executed, so that even if the game with the bet number of "2" is completed, it will be a pseudo game. It is possible to avoid causing the transition to the bonus state ST4 to become closer.

If the number of bets for the current game is "3" (step S2305: YES), it is determined whether or not the second transition confirmation flag of the main RAM 74 is set to "1" (step S2306). As already explained, the second transition determination flag is a flag for the main MPU 72 to specify whether or not the transition lottery process (step S2215) has won the transition lottery.

When "1" is set to the second transition confirmation flag (step S2306: YES), the value of the transition waiting counter of the main RAM 74 is subtracted by 1 (step S2307). As already explained, the transition standby counter is a counter for the main MPU 72 to specify that the number of transition standby games (specifically, 5 games) has been completed since the second transition determination flag was set to "1". is. If the value of the transition standby counter after subtracting 1 is "0" (step S2308: YES), the second start setting process is executed (step S2309). Although the details will be described later, in the second start setting process, a process for shifting to the pseudo-bonus state ST4 is executed. After that, the first output start flag provided in the main RAM 74 is set to "1" (step S2310). The first output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of the pseudo-bonus state ST4 is to be executed.

If "1" is not set to the second transition confirmation flag (step S2306: NO), the value of the canceled game number counter in the main RAM 74 is subtracted by 1 (step S2311). The number-of-released-games counter is the number of games required to shift to the pseudo-bonus state ST4 in a situation where neither the first nor the second transition confirmation flag of the main side RAM 74 is set to "1". A counter for specifying the number of games in the main MPU 72 . When the game section shifts from the first section SC1 to the second section SC2, the number of released games is set to the counter for the number of released games. If the value of the canceled game number counter after subtracting 1 is "0" (step S2312: YES), a second start setting process is executed (step S2309). Although the details will be described later, in the second start setting process, a process for shifting to the pseudo-bonus state ST4 is executed. After that, the first output start flag provided in the main RAM 74 is set to "1" (step S2310). The first output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of the pseudo-bonus state ST4 is to be executed.

When the process of step S2310 is executed, it is determined whether or not the lighting standby flag of the main RAM 74 is set to "1" (step S2313). As already described, the lighting standby flag is a flag for specifying in the main MPU 72 that switching of the section display section 67 from the off state to the lighting state is waiting in the second section SC2. If the lighting standby flag is set to "1" (step S2313: YES), the lighting processing of the section display section 67 is executed (step S2314). In the lighting process of the section display section 67, the section display section 67 is switched from the off state to the on state. As a result, the section display section 67 starts to notify that the current section is the second section SC2. Note that the lighting standby flag is cleared to "0" when the process of step S2314 is executed.

When the transition to the pseudo-bonus state ST4 occurs while the lighting standby flag is set to "1" as described above, the interval display section 67 is switched from the off state to the on state. The pseudo-bonus state ST4 is a game in which the net increase expected value of game media in one game (the value obtained by subtracting the "number of game media betted in one game" from the "expected number of game media given in one game") can be 1 or more. state. In other words, although the section display section 67 can be maintained in the off state even after transitioning to the second section SC2, it is surely turned on when the game state shifts to a game state in which the expected value of the net increase in game media can be 1 or more. . As a result, in a game state in which the net increase expected value of game media can be 1 or more, it is possible to notify the manager of the game hall or the like that the game state is in question.

<Regarding the second start setting process>
Next, the second start setting process executed in step S2309 of the normal process (FIG. 47) will be described.

In the second start setting process, the AT transition lottery process at the start is executed with the current transition to the pseudo bonus state ST4 as a trigger. By winning the AT shift in the AT shift lottery process at the time of the start, the game will shift to the AT state ST5 after the current pseudo-bonus state ST4 ends. Also, in the second start setting process, the number of initial continuous games in the pseudo-bonus state ST4 to be shifted to this time is determined by lottery. In addition, in the pseudo-bonus state ST4, when the transition lottery opportunity occurs in each game, the AT transition lottery process is executed, and when the AT transition lottery process wins the AT transition lottery process, the current pseudo-bonus state ST4 ends. Later, it will shift to the AT state ST5. In this case, in the second start setting process, the probability of winning the AT shift in the AT shift lottery process in the pseudo-bonus state ST4 to be shifted to this time is determined by lottery.

FIG. 48(a) is an explanatory diagram for explaining the selection probability of the number-of-games mode that determines the initial number of continuous games in the pseudo-bonus state ST4, and FIG. 48(b) is an AT transition in each game in the pseudo-bonus state ST4. It is an explanatory diagram for explaining the selection probability of the winning rate mode that determines the probability of AT transition winning in the lottery process.

As shown in FIG. 48(a), a plurality of types of game number modes are set. Specifically, a first game number mode in which the initial number of continuous games in the pseudo-bonus state ST4 is 20 games, and a second game number mode in which the initial number of games is 30 games. A 2-game number mode, a third game-number mode with 40 games, a fourth game-number mode with 50 games, and a fifth game-number mode with 60 games are set. When the set value for use is "1", the first to fourth game number modes are selected, and the fifth game number mode is not selected. Further, the selection probability of each of the first to fourth game number modes is the same at 25%. When the set value for use is "2", the first to fourth game number modes are selected, and the fifth game number mode is not selected. Further, the selection probability of each of the third game number mode and the fourth game number mode is higher than the selection probability of each of the first game number mode and second game number mode. When the set value for use is "3", the first to fourth game number modes are selected, and the fifth game number mode is not selected. Also, the game number mode with a large number of initial continuous games has a higher selection probability than the game number mode with a small number of games. When the set value for use is "4", the first to fourth game number modes are selected, and the fifth game number mode is not selected. Further, the selection probability of each of the third game number mode and the fourth game number mode is higher than the selection probability of each of the first game number mode and second game number mode. When the set value to be used is "5", the first to fifth game number modes are selected. In addition, the selection probability of the 3rd game number mode and the 4th game number mode is the highest, the selection probability of the 1st game number mode and the 2nd game number mode is the next highest, and the selection probability of the 5th game number mode is the lowest. . When the set value to be used is "6", the first to fifth game number modes are selected. Further, the selection probability of each of the first to fifth game number modes is the same at 20%.

With the above configuration, the expected value of the number of initial continuous games in the pseudo-bonus state ST4 increases as the set value increases. As a result, it is possible to give an advantage or a disadvantage to the number of initial continuous games in the pseudo-bonus state ST4 according to the set value. Also, when comparing in the same number-of-games mode, the selection probability may differ according to the set value. In addition, the fifth number-of-games mode does not become a selection target if the setting value is 4 or less, but becomes a selection target if the setting value is 5 or more.

As shown in FIG. 48(b), a plurality of types of winning rate modes are set. Specifically, the expected value of the probability of winning AT transition in this pseudo-bonus state ST4 is about 20%. mode, a second winning rate mode of about 30%, a third winning rate mode of about 40%, a fourth winning rate mode of about 60%, and a fifth winning rate mode of about 75%. is set. When the set value to be used is "1", the first to fifth winning rate modes are selected. Further, the selection probabilities of the first to fifth winning rate modes are the same at 20%. When the set value to be used is "2", the first to fifth winning rate modes are selected. In addition, the probability of selection of the third winning-rate mode is the highest, the probability of selecting the fourth winning-rate mode and the fifth winning-rate mode is next highest, and the selection probability of the first winning-rate mode and the second winning-rate mode is the lowest. . When the set value to be used is "3", the first to fifth winning rate modes are selected. In addition, the probability of selection of the fourth winning-rate mode is the highest, the probability of selection of the third winning-rate mode and the fifth winning-rate mode is second highest, and the selection probability of the first winning-rate mode and the second winning-rate mode is the lowest. . When the set value to be used is "4", the first to fifth winning rate modes are selected. In addition, the selection probability of the 5th winning-rate mode is the highest, the selection probability of the 4th winning-rate mode is the next highest, and the selection probability of the 1st winning-rate mode, the 2nd winning-rate mode and the 3rd winning-rate mode is the lowest. . When the set value to be used is "5", the first to fifth winning rate modes are selected. In addition, the selection probability of the fifth winning-rate mode is the highest, the selection probability of the third winning-rate mode and the fourth winning-rate mode is the next highest, and the selection probability of the first winning-rate mode and the second winning-rate mode is the lowest. . When the set value to be used is "6", the second to fifth winning rate modes are selected, and the first winning rate mode is not selected. Further, the selection probability of each of the second to fifth game number modes is the same at 25%.

Due to the above configuration, the expected value of the probability of winning AT transition in the pseudo-bonus state ST4 increases as the set value increases. As a result, it is possible to generate an advantage or a disadvantage according to the set value with respect to the probability of AT transition winning in the pseudo-bonus state ST4. In addition, when compared in the same winning rate mode, the selection probability may differ according to the set value. Also, the first winning rate mode is not selected if the set value is "6", but is selected if the set value is 5 or less.

In the second start setting process, as described above, the AT transition lottery process at the start, the number-of-games mode lottery process, and the win rate mode lottery process are executed. In these lottery processes, a random number is acquired from the second random number circuit 76 of the main MPU 72, and the lottery is executed using the acquired random number. FIG. 49(a) is an explanatory diagram for explaining the latch area 111 for latching the second random number updated in the second random number circuit 76. FIG.

A latch area 111 is provided in the second random number circuit 76 . As already explained, the second random number circuit 76 sequentially updates the second random number within a predetermined numerical range based on the clock signal (specifically, the period of 0.1 nanoseconds) output from the clock circuit. When the second random number updated in the second random number circuit 76 is used in the main MPU 72 , a latch signal is transmitted from the main MPU 72 to the second random number circuit 76 . When the second random number circuit 76 receives the latch signal, it stores the second random number at that point in the latch area 111 . Since the second random number updated in the second random number circuit 76 has a data capacity of 2 bytes, the latch area 111 also has a data capacity of 2 bytes correspondingly. The upper 1 byte of the second random number is stored in the upper area 111 a of the latch area 111 , and the lower 1 byte of the second random number is stored in the lower area 111 b of the latch area 111 .

When the AT transition lottery process at the time of start is executed in the second start setting process, the second random number stored in the latch area 111 based on the fact that the latch signal is transmitted from the main MPU 72 to the second random number circuit 76 Random numbers are used as they are. That is, the random number used in the AT transition lottery process at the start has a data capacity of 2 bytes, and the numerical range of the random number is 0-65535. For example, if the second random number stored in the latch area 111 is "10110011" and "10110101" in binary as shown in FIG. Used as a random number.

When the lottery process of the number-of-games mode is executed in the second start setting process, the second random number stored in the latch area 111 based on the transmission of the latch signal from the main MPU 72 to the second random number circuit 76 Only the upper byte stored in the upper area 111a is used. In other words, the random number used in the lottery process in the number-of-games mode has a data capacity of 1 byte, and the numerical range of the random number is 0-255. For example, if the second random numbers stored in the latch area 111 are binary numbers "10110011" and "10110101" as shown in FIG. The byte "10110011" is used as a random number in the lottery process in the number-of-games mode.

When the lottery process in the winning rate mode is executed in the second start setting process, the second random number stored in the latch area 111 based on the transmission of the latch signal from the main MPU 72 to the second random number circuit 76 Of the upper bytes stored in the upper area 111a, only the lower 7 bits are used. In other words, the random number used in the lottery process in the winning rate mode has a data capacity of 7 bits, and the numerical range of the random number is 0-127.

When acquiring the 7-bit random number, first, the second random number is stored in the latch area 111 based on the latch signal transmitted from the main MPU 72 to the second random number circuit 76 . After that, the random number of the upper byte stored in the upper area 111 a of the latch area 111 is obtained in the register of the main MPU 72 . Then, the most significant bit of the random number in the high-order byte is cleared to "0". This makes it possible to obtain a 7-bit random number using the 2-byte second random number latched in the second random number circuit 76 .

For example, if the second random numbers stored in the latch area 111 are binary numbers "10110011" and "10110101" as shown in FIG. A byte “10110011” is acquired in the register of the main MPU 72 . Then, by clearing the most significant bit of the acquired 1-byte information to "0", the random number information stored in the register of the main MPU 72 is changed to " 00110011”. The random number information is used in the lottery process in the winning rate mode. In this case, the random number information is handled as 1-byte information "00110011", but the highest bit is forcibly cleared to "0", so it actually contributes to generating the numerical range of the random number. is the lower 7 bits excluding the most significant bit.

Here, a configuration is also conceivable in which the random number information is held as 7-bit information. However, in this case, the random number information cannot be handled as information in units of bytes, which complicates the handling of the information. On the other hand, even if it is 7 bits that contributes to generating a numerical range of random numbers in implementation, the random number information is 1 byte, so the random number information can be treated as byte unit information. becomes possible. Also, even if the random number information is 1 byte in this way, the highest bit is cleared to "0", so the numerical range of the random number exceeds the range of 0 to 127 corresponding to 7 bits. It is possible to make sure that there is no

Using the 2-byte second random number updated in the second random number circuit 76 as described above, it is possible to obtain a plurality of types of random numbers having different numerical ranges. This makes it possible to reduce the number of random number circuits and simplify the hardware configuration, compared to a configuration in which different random number circuits are individually provided for different numerical ranges.

FIG. 50 is a flow chart showing the second start setting process executed in step S2309 of the normal process (FIG. 47).

First, a second random number is obtained (step S2401). Specifically, by transmitting a latch signal to the second random number circuit 76 , the second random number information after the most recent update in the second random number circuit 76 is stored in the latch area 111 . Then, when the second random number is stored in the latch area 111 , the second random number is acquired in the register of the main side MPU 72 .

After that, the AT shift lottery table at the start is read from the main ROM 73 (step S2402). In the AT transition lottery table at the start, the numerical value included in the numerical range of the second random number from 0 to 65535 is set in either the AT transition winning or the transition missing numerical range. Specifically, it is set so that the probability of winning an AT shift is 10%.

Thereafter, an AT transition lottery process at the start is executed (step S2403). In the AT transition lottery process at the start, the second random number acquired in step S2401 is checked against the AT transition lottery table at the start read out in step S2402. As a result, when the AT transition is won (step S2404: YES), the AT transition confirmation flag of the main side RAM 74 is set to "1" (step S2405). As already explained, the AT shift confirmation flag is a flag for specifying in the main side MPU 72 that the game will shift to the AT state ST5 after the end of the pseudo bonus state ST4.

If a negative determination is made in step S2404 or if the process of step S2405 is executed, the upper byte of the second random number is acquired from the second random number circuit 76 (step S2406). Specifically, by transmitting a latch signal to the second random number circuit 76 , the second random number information after the most recent update in the second random number circuit 76 is stored in the latch area 111 . Then, the information of the upper byte stored in the upper area 111 a in the latch area 111 is obtained in the register of the main MPU 72 .

Here, in the second start setting process, a latch signal is transmitted so that the second random number circuit 76 latches the second random number in step S2401, and the second random number circuit 76 latches the second random number in step S2406. A latch signal is sent so that the random number is latched. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and this update cycle is 0.1 nanoseconds. During the period from the execution of the process of step S2401 to the execution of the process of step S2406, the second random number updated every 0.1 nanoseconds as described above has one cycle in the numerical range of 0 to 65535. It is longer than the period required to complete the process. Further, the period from the execution of the process of step S2401 to the execution of the process of step S2406 is within a predetermined period range when the process of step S2405 is executed and when the process of step S2405 is not executed. This variation is large in relation to the update cycle of the second random number. Therefore, even if the latch signal is transmitted to the second random number circuit 76 in each of steps S2401 and S2406 in one processing cycle of the second start setting processing (FIG. 50), the transmission of the latch signal in step S2401 causes the latch signal to be latched. No regularity occurs between the second random numbers stored in the area 111 and the second random numbers stored in the latch area 111 due to the transmission of the latch signal in step S2406.

After that, the lottery number counter 74k of the main RAM 74 is set to "1" (step S2407). As already explained, the lottery number counter 74k is used to specify which index value IV is the lottery target of the lottery process (FIG. 34). This is used by the main MPU 72 to specify which of the first to fifth number-of-games modes is the lottery target of the lottery process. If the value of the lottery number counter 74k in the lottery process of the number-of-games mode is "1", the second game-number mode becomes the lottery target of the lottery process, and the value of the lottery-number counter 74k in the lottery process of the number-of-games mode is "1". 2", the third game number mode is the lottery target of the lottery process, and when the value of the lottery number counter 74k is "3" in the lottery process of the game number mode, the fourth game number mode is the lottery process. If the value of the number-of-lottery counter 74k is "4" in the number-of-games mode lottery process, the fifth-number-of-games mode will be the lottery target of the lottery process. If the lottery number counter 74k does not win any of the values 1 to 4, the first game number mode is won.

After that, the starting address for the number-of-games mode lottery is set in the register for address reference in the main MPU 72 (step S2408). The start address is the start address of the number-of-games mode lottery table 112 provided in the main ROM 73 . FIG. 51(a) is an explanatory diagram for explaining the number-of-games mode lottery table 112. FIG.

The number-of-games mode lottery table 112 is set with a plurality of pieces of address information D(1) to D(24), and these pieces of address information D(1) to D(24) correspond to each other on a one-to-one basis. A judgment value LV is set. Each of the address information D(1) to D(24) has a data capacity of 1 byte and is serially numbered. The address information D(1) to D(4) in the first range corresponds to the setting value "1", and the address information D(5) to D(8) in the second range corresponds to the setting value "2". , the address information D(9) to D(12) in the third range correspond to the setting value "3", and the address information D(13) to D(16) in the fourth range correspond to The address information D(17) to D(20) in the fifth range corresponds to the setting value "4", and the address information D(21) in the sixth range corresponds to the setting value "5". ~D(24) corresponds to the set value of "6". In other words, when the set value is n (n is an integer from 1 to 6), the set value of n is within the range of the address information D ((n-1) x 4 + 1) to D ((n-1) x 4 + 4). Yes.

In the range of address information corresponding to each setting value, the first address information D(1), D(5), D(9), D(13), D(17) and D(21) have the second The determination value LV for the 2-game number mode is associated with the second address information D(2), D(6), D(10), D(14), D(18), D(22). is associated with the determination value LV of the third number-of-games mode, and the third address information D(3), D(7), D(11), D(15), D(19), D(23 ) is associated with the determination value LV of the fourth number-of-games mode, and the last address information D(4), D(8), D(12), D(16), D(20), D( 24) is associated with the determination value LV of the fifth number-of-games mode. That is, when the set value is n (n is an integer of 1 to 6), the determination value LV of the m-th game number mode (m is an integer of 2 to 4) is the address information D ((n−1)×4+ (m-1)).

In a configuration in which the selection probability of each number-of-games mode differs according to the set value to be used, the number-of-games mode lottery table 112 contains address information D(0) to D(24) according to each set value. A range is set, and the order of assignment of the second to fifth game number modes is common to each set value within the range of the address information D(0) to D(24) of each set value. As a result, instead of providing a different table for each set value, a single number-of-games mode lottery table 112 corresponding to all set values is provided to reduce the number of tables. When the determination value LV corresponding to the combination of the number-of-games mode to be selected is read from the number-of-games mode lottery table 112, the determination value LV can be read according to a certain rule.

For example, the determination value LV set in the address information D(1) is "64", and the numerical range of random numbers in the lottery process in the number-of-games mode is 0-255. In a certain case, the selection probability of the second number-of-games mode is 25% as shown in FIG. 48(a). Further, for example, since the determination value LV set in the address information D(8) is "0", the selection probability of the fifth number-of-games mode when the set value is "2" is shown in FIG. 0% as shown. In addition, as already explained, if the lottery process of the number-of-games mode results in a loss, the number-of-games mode is set to the first number-of-games mode regardless of the set value. A determination value LV corresponding to the mode is not set.

Returning to the description of the second start setting process (FIG. 50), the start address of the number-of-games mode lottery table 112 is set in the register for address reference in the main MPU 72, as already described in step S2408. In this case, the number-of-games mode lottery table 112 is read from the main ROM 73 to the main RAM 74 .

After that, LV acquisition processing is executed (step S2409). FIG. 52 is a flowchart showing LV acquisition processing.

First, the setting value information to be used is read from the setting value storage area of the main side RAM 74, and the read setting value information is set in the B register provided in the main side MPU 72 (step S2501). After that, the information of the lottery number counter 74k of the main side RAM 74 is read, and the read information is set in the C register provided in the main side MPU 72 (step S2502). Then, the offset value of the address information is calculated by executing the operation (B−1)×4+C (step S2503).

After that, the offset value of the address information calculated in step S2503 is added to the start address set in step S2408 of the second start setting process (FIG. 50) (step S2504). Then, the determination value LV corresponding to the target address of the addition result in step S2504 is read out from the number-of-games mode lottery table 112 (step S2505). As a result, the determination value LV corresponding to the combination of the set value to be used and the number-of-games mode to be selected by lottery is read from the number-of-games mode lottery table 112 .

Returning to the description of the second start setting process (FIG. 50), after obtaining the determination value LV in step S2409, the lottery value JV used for determining the suitability of the number-of-games mode targeted for lottery is set. (Step S2410). In this processing, the determination value LV obtained in step S2409 is added to the current lottery value JV to set a new lottery value JV. In the processing of step S2410 for the first time after the processing of steps S2406 to S2408 is executed, the value of the 1-byte random number information (any of 0 to 255) obtained in step S2406 is used as the current lottery value JV. , the determination value LV obtained in step S2409 is added to this 1-byte random number information to obtain a new lottery value JV. Note that if the determination value LV acquired in step S2409 is "0", the lottery value JV does not change even if the process of step S2410 is executed. That is, if the determination value LV is "0" in the first setting process, the 1-byte random number information (any of 0 to 255) becomes the lottery value JV as it is, and in the second and subsequent setting processes the determination value LV is " 0”, the lottery value JV in the previous setting process will be the lottery value JV of this time.

After that, the game number mode corresponding to the current value of the lottery number counter 74k is determined (step S2411). In this success/failure determination, it is determined whether or not the lottery value JV exceeds "255". If it does not exceed "255" (step S2411: NO), it means that the game number mode corresponding to the current value of the lottery number counter 74k has been lost. In this case, after adding 1 to the value of the lottery number counter 74k of the main RAM 74 (step S2412), it is determined whether or not the game number mode to be judged still exists (step S2413). Specifically, when the value of the lottery number counter 74k to which 1 has been added is not "5" (step S2413: NO), the process returns to step S2409 to continue determination of whether the number of games mode is correct. At this time, in the LV acquisition process (FIG. 52) in step S2409, although the set value set as the object to be used is the same value, the value of the lottery number counter 74k is the value at the time when the main acquisition process was executed last time. 1 is added to the value. Therefore, in step S2503 in the LV acquisition process (FIG. 52), a value obtained by adding 1 to the offset value of the address information acquired in the previous main acquisition process is calculated as the offset value of the current address information. , corresponding to the address information D(0) to D(24) that is one after the address information D(0) to D(24) that was referenced in the previous acquisition process. A determination value LV is acquired. Then, using the newly obtained determination value LV, a new lottery value JV is calculated in step S2410, and it is determined whether or not the calculated lottery value JV exceeds "255". As a result, it is determined whether the number-of-games mode corresponds to the current value of the number-of-lottery counter 74k.

If the lottery value JV exceeds "255" (step S2411: YES), it means that the game number mode corresponding to the current value of the lottery number counter 74k has been won. If the lottery value JV does not exceed "255" (step S2411: NO) and the value of the lottery number counter 74k after adding 1 is "5" (step S2413: YES), the second It means that you have not won any of the ˜5th game number modes, and in this case, it means that you have won the first game number mode. In these cases, the number of games is stored (step S2414).

In the game number storage process, if the determination in step S2413 is affirmative, it means that the current game number mode is the first game number mode. A value corresponding to 20 games, which is the minimum number of games, is set as the initial number of continuous games in ST4. In addition, in the game number storage process, if an affirmative determination is made in step S2411, it means that the current game number mode is the game number mode corresponding to the current value of the lottery number counter 74k. The value of the initial number of continuous games in the pseudo-bonus state ST4 corresponding to the number-of-games mode is set in the pseudo-bonus continuation counter of the main side RAM74. Specifically, when the value of the lottery number counter 74k is "1", the value of 30 games corresponding to the second game number mode is set in the pseudo bonus continuation counter, and when the value of the lottery number counter 74k is "2". If so, the value of 40 games corresponding to the third number-of-games mode is set in the pseudo-bonus continuation counter. If the value of the lottery number counter 74k is "4", the value of 60 games corresponding to the fifth game number mode is set to the pseudo bonus continuation counter. The pseudo-bonus continuation counter is a counter for the main side MPU 72 to specify the remaining number of continuous games in the pseudo-bonus state ST4, as already described.

When the process of step S2414 is executed, the upper byte of the second random number is acquired from the second random number circuit 76 (step S2415). Specifically, by transmitting a latch signal to the second random number circuit 76 , the second random number information after the most recent update in the second random number circuit 76 is stored in the latch area 111 . Then, the information of the upper byte stored in the upper area 111 a in the latch area 111 is obtained in the register of the main MPU 72 . Then, the most significant bit in the acquired high-order byte information is cleared to "0" (step S2416). This makes it possible to obtain a 7-bit random number.

Here, in the second start setting process, a latch signal is transmitted so that the second random number is latched in the second random number circuit 76 in step S2406, and the second random number in the second random number circuit 76 is latched in step S2415. A latch signal is sent so that the random number is latched. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and this update cycle is 0.1 nanoseconds. During the period from the execution of the process of step S2406 to the execution of the process of step S2415, the second random number updated every 0.1 nanoseconds as described above has one cycle in the numerical range of 0 to 65535. It is longer than the period required to complete the process. Also, the period from the execution of the process of step S2406 to the execution of the process of step S2415 fluctuates within a predetermined period range, and this fluctuation is large in relation to the second random number update cycle. is. Therefore, even if a latch signal is transmitted to the second random number circuit 76 in each of steps S2406 and S2415 in one processing cycle of the second start setting processing (FIG. 50), the transmission of the latch signal in step S2406 causes the latch signal to be latched. There is no regularity between the second random numbers stored in the area 111 and the second random numbers stored in the latch area 111 due to the transmission of the latch signal in step S2415.

After that, the lottery number counter 74k of the main RAM 74 is set to "1" (step S2417). As already explained, the lottery number counter 74k is used to specify which index value IV is the lottery object of the lottery process (FIG. 34), and is also used for the lottery process of the number-of-games mode lottery process. It is used to specify which game number mode is the target game number mode. It is used for identification by the MPU 72 . If the value of the lottery number counter 74k in the lottery process of the winning rate mode is "1", the second lottery mode will be the lottery target of the lottery process, and the value of the lottery number counter 74k in the lottery process of the winning rate mode will be "1". 2", the third winning rate mode becomes the lottery target of the lottery process, and when the value of the lottery number counter 74k in the lottery process of the winning rate mode is "3", the fourth winning rate mode is the lottery process. If the value of the lottery number counter 74k is "4" in the lottery process of the winning rate mode, the fifth winning rate mode becomes the lottery target of the lottery process. If the lottery number counter 74k does not win any of the values 1 to 4, it means that the first win rate mode has been won.

After that, the start address for the lottery for winning rate mode is set in the register for address reference in the main MPU 72 (step S2418). The start address is the start address of the winning rate mode lottery table 113 provided in the main ROM 73 . FIG. 51(b) is an explanatory diagram for explaining the winning rate mode lottery table 113. As shown in FIG.

The winning rate mode lottery table 113 is set with a plurality of pieces of address information E(1) to E(24), and the pieces of address information E(1) to E(24) correspond to each other on a one-to-one basis. A judgment value LV is set. Each of the address information E(1) to E(24) has a data capacity of 1 byte and is serially numbered. The address information E(1) to E(4) in the first range corresponds to the setting value "1", and the address information E(5) to E(8) in the second range corresponds to the setting value "2". , the address information E(9) to E(12) in the third range correspond to the setting value "3", and the address information E(13) to E(16) in the fourth range correspond to The address information E(17) to E(20) in the fifth range corresponds to the setting value "4", and the address information E(21) in the sixth range corresponds to the setting value "5". ˜E(24) correspond to the set value of “6”. In other words, when the set value is n (n is an integer from 1 to 6), the set value of n is within the range of the address information E ((n-1) x 4 + 1) to E ((n-1) x 4 + 4). Yes.

In the range of address information corresponding to each set value, the first address information E(1), E(5), E(9), E(13), E(17), E(21) have the second The judgment value LV of the 2-win probability mode is associated with the second address information E(2), E(6), E(10), E(14), E(18), E(22). is associated with the determination value LV of the third winning rate mode, and the third address information E(3), E(7), E(11), E(15), E(19), E(23 ) is associated with the determination value LV of the fourth winning rate mode, and the last address information E(4), E(8), E(12), E(16), E(20), E( 24) is associated with the determination value LV of the fifth winning rate mode. That is, when the set value is n (n is an integer of 1 to 6), the determination value LV of the m-th winning rate mode (m is an integer of 2 to 4) is the address information E ((n−1)×4+ (m-1)).

In a configuration in which the selection probability of each winning rate mode differs according to the setting value to be used, the winning rate mode lottery table 113 contains address information E(0) to E(24) according to each setting value. A range is set, and the order of allocation of the second to fifth winning rate modes is common to each set value within the range of the address information E(0) to E(24) of each set value. As a result, instead of providing a different table for each set value, one win rate mode lottery table 113 corresponding to all set values is provided to reduce the number of tables. When the determination value LV corresponding to the combination of winning rate modes targeted for lottery is read from the winning rate mode lottery table 113, the determination value LV can be read according to a certain rule.

For example, the determination value LV set in the address information E(1) is "25", and the numerical range of random numbers in the lottery process in the number-of-games mode is 0-127. The probability of selecting the second number-of-games mode in a certain case is about 20%, as shown in FIG. 48(b). Also, as already explained, if the lottery process of the winning rate mode is out, if the setting value is "1" to "5", it will be the first winning rate mode, and if the setting value is "6" Since the first winning rate mode is not included in the lottery target, the winning rate mode lottery table 113 does not set the determination value LV corresponding to the first winning rate mode.

Returning to the description of the second start setting process (FIG. 50), the start address of the winning rate mode lottery table 113 is set in the register for address reference in the main MPU 72 as already described in step S2418. In this case, the winning rate mode lottery table 113 is read from the main ROM 73 to the main RAM 74 .

After that, LV acquisition processing is executed (step S2419). FIG. 52 is a flowchart showing LV acquisition processing.

First, the setting value information to be used is read from the setting value storage area of the main side RAM 74, and the read setting value information is set in the B register provided in the main side MPU 72 (step S2501). After that, the information of the lottery number counter 74k of the main side RAM 74 is read, and the read information is set in the C register provided in the main side MPU 72 (step S2502). Then, the offset value of the address information is calculated by executing the operation (B−1)×4+C (step S2503).

After that, the offset value of the address information calculated in step S2503 is added to the start address set in step S2418 of the second start setting process (FIG. 50) (step S2504). Then, the judgment value LV corresponding to the target address of the addition result in step S2504 is read out from the winning rate mode lottery table 113 (step S2505). As a result, the judgment value LV corresponding to the combination of the set value to be used and the winning rate mode to be selected by lottery is read from the winning rate mode lottery table 113 .

Returning to the description of the second start setting process (FIG. 50), after acquiring the determination value LV in step S2419, the lottery value JV used when determining the propriety of the winning rate mode targeted for the lottery is set. (Step S2420). In this process, the determination value LV obtained in step S2419 is added to the current lottery value JV to set a new lottery value JV. In the process of step S2420 for the first time after the processes of steps S2415 to S2418 are executed, the value of the 7-bit random number information (any of 0 to 127) obtained in steps S2415 and S2416 is The determination value LV obtained in step S2419 is added to the 7-bit random number information to obtain a new lottery value JV. Note that if the determination value LV acquired in step S2419 is "0", the lottery value JV does not change even if the process of step S2420 is executed. That is, if the determination value LV is "0" in the first setting process, the 7-bit random number information (any of 0 to 127) becomes the lottery value JV as it is, and in the second and subsequent setting processes the determination value LV is " 0”, the lottery value JV in the previous setting process will be the lottery value JV of this time.

After that, it is determined whether or not the win rate mode corresponding to the current value of the lottery number counter 74k is correct (step S2421). In this success/failure determination, it is determined whether or not the lottery value JV exceeds "127". If it does not exceed "127" (step S2421: NO), it means that the win rate mode corresponding to the current value of the lottery number counter 74k has been lost. In this case, after adding 1 to the value of the lottery number counter 74k of the main RAM 74 (step S2422), it is determined whether or not there is still a winning rate mode to be determined (step S2423). Specifically, when the value of the lottery number counter 74k to which 1 has been added is not "5" (step S2423: NO), the process returns to step S2419 to continue determination of success or failure of the winning rate mode. At this time, in the LV acquisition process (FIG. 52) in step S2419, although the set value set as the object to be used is the same value, the value of the lottery number counter 74k is the value at the time when the main acquisition process was executed last time. 1 is added to the value. Therefore, in step S2503 in the LV acquisition process (FIG. 52), a value obtained by adding 1 to the offset value of the address information acquired in the previous main acquisition process is calculated as the offset value of the current address information. , corresponding to the address information E(0) to E(24) that is one after the address information E(0) to E(24) that was referenced in the previous acquisition process. A determination value LV is acquired. Then, using the newly obtained determination value LV, a new lottery value JV is calculated in step S2420, and it is determined whether or not the calculated lottery value JV exceeds "127". As a result, it is determined whether the winning rate mode corresponding to the current value of the lottery number counter 74k is correct.

If the lottery value JV exceeds "127" (step S2421: YES), it means that the win rate mode corresponding to the current value of the lottery number counter 74k has been won. If the lottery value JV does not exceed "127" (step S2421: NO) and the value of the lottery number counter 74k after adding 1 is "5" (step S2423: YES), the second It means that you have not won any of the to fifth winning rate modes, and in this case, it means that you have won the first winning rate mode. In these cases, the win rate mode memory processing is executed (step S2424).

In the winning rate mode storage process, if the determination in step S2423 is affirmative, it means that the current winning rate mode is the first winning rate mode. It is stored in the main side RAM 74 . In addition, in the winning rate mode storage process, if an affirmative determination is made in step S2421, this means that the current winning rate mode is the winning rate mode corresponding to the current value of the lottery number counter 74k. Information corresponding to the winning rate mode is stored in the main side RAM74. Specifically, when the value of the lottery number counter 74k is "1", information corresponding to the second winning rate mode is stored in the main RAM 74, and when the value of the lottery number counter 74k is "2", the third mode is stored. Information corresponding to the winning rate mode is stored in the main side RAM 74, and if the value of the lottery number counter 74k is "3", information corresponding to the fourth winning rate mode is stored in the main side RAM 74 and the value of the lottery number counter 74k is stored. If the value is "4", information corresponding to the fifth winning rate mode is stored in the main side RAM74.

After executing the process of step S2424, the pseudo bonus status flag of the main side RAM 74 is set to "1" (step S2425). The pseudo-bonus state flag is a flag for specifying in the main side MPU 72 whether or not the game state is the pseudo-bonus state ST4, as already explained.

<Regarding freeze setting processing at the time of bonus transition>
Next, the freeze setting process at the time of transition to the bonus, which is executed in step S907 of the normal process (FIG. 25), will be described.

In the structure in which the game state shifts to the pseudo-bonus state ST4 when the shift condition is satisfied in the normal game state ST1, a freeze period basically occurs at the start of the game first executed in the pseudo-bonus state ST4. As already explained, the freeze period is a period during which the player's operation on the rotation of the reels 32L, 32M, and 32R during which the reel control corresponding to the result of the winning lottery process (FIG. 34) is executed is invalidated. In this slot machine 10, the start of rotation of the reels 32L, 32M, and 32R is forced to wait for the operation of the start lever 41 for starting one game. The freeze period set at the start of the pseudo-bonus state ST4 differs according to the types of the number-of-games mode and winning rate mode determined when shifting to the pseudo-bonus state ST4.

Specifically, when the number-of-games mode is any one of the first to third number-of-games modes, the winning rate mode corresponds to the first combination regardless of the winning rate mode. In the case of any of the third win-rate modes, it corresponds to the first combination regardless of the number-of-games mode. If the first combination applies, 10 seconds is set as the freeze period at the start of the pseudo-bonus state ST4. If the game number mode is the fourth game number mode and the winning rate mode is the fourth winning rate mode or the fifth winning rate mode, it corresponds to the second combination, and the winning rate mode is the fourth winning rate mode. If the number-of-games mode is the fourth number-of-games mode or the fifth number-of-games mode, it corresponds to the second combination. In the case of the second combination, 20 seconds is set as the freeze period at the start of the pseudo-bonus state ST4. If the number-of-games mode is the fifth number-of-games mode and the win rate mode is the fifth win rate mode, it corresponds to the third combination. If the third combination applies, 30 seconds is set as the freeze period at the start of the pseudo-bonus state ST4.

As described above, at the start of the pseudo-bonus state ST4, a freeze period is basically set corresponding to the combination of the number-of-games mode and the win rate mode. However, the first start setting process (step S2303) is executed with the direct hit winning in the direct lottery process (step S2208) in the normal game state ST1, and the first start setting process is executed. If the transition to the pseudo-bonus state ST4 occurs in step S2208, the reels 32L, 32M, and 32R are frozen for 30 seconds before the rotation of the reels 32L, 32M, and 32R is started in the game won in the direct lottery process (step S2208). A period is set. Since the game for which this freeze period is set is the game immediately preceding the game that is first executed in the pseudo-bonus state ST4, the game that is first executed in the pseudo-bonus state ST4 has a further freeze period. If set, there is a risk that the player will be annoyed. On the other hand, in the present slot machine 10, the freeze period at the start of the first game is not set in the pseudo-bonus state ST4, which is shifted when the direct hit is won in the direct hit lottery process (step S2208). It's becoming

A processing configuration for realizing the configuration will be described below. FIG. 53 is a flow chart showing freeze setting processing at the time of transition to bonus, which is executed by the main MPU 72 .

If the current game is the first game executed in the pseudo-bonus state ST4 (step S2601: YES), it is determined whether or not the direct hit freeze occurrence flag in the main side RAM 74 is set to "1" (step S2602). ). As already described, the direct hit freeze occurrence flag is set to "1" in step S2212 when the direct hit lottery process (step S2208) in the advantageous lottery process (FIG. 46) at the start of the game results in a direct hit win. If "1" is set in the direct hit freeze occurrence flag (step S2602: YES), after clearing the direct hit freeze occurrence flag "0" (step S2603), the processing for setting the freeze period after step S2604 Terminate the freeze setting process at the time of transition to this bonus without executing.

When the direct hit lottery process (step S2208) results in a direct hit lottery process, the freeze counter setting process is executed in step S2211 in the advantageous lottery process (FIG. 46) at the start of the game. Information corresponding to the freeze period of 30 seconds is set in the freeze counter, and if the value of the freeze counter is 1 or more at step S908 that is executed after that in the normal processing (FIG. 25), then at step S908 By waiting, the start of rotation of the reels 32L, 32M, and 32R is waited. The value of the freeze counter is decremented by the timer subtraction process (step S506) each time the timer interrupt process (FIG. 19) is started. With such a configuration, when a direct hit lottery process (step S2208) is won, the rotation of the reels 32L, 32M, and 32R in the game in which the direct hit is won continues for a 30-second freeze period. Wait. At the end of the game in which the freeze period occurred, the transition to the pseudo-bonus state ST4 occurs, so the game following the game is the first game to be executed in the pseudo-bonus state ST4. In such circumstances, if the direct hit freeze occurrence flag is set to "1", the process for setting the freeze period after step S2604 is not executed, so that the direct hit winning is triggered It is possible to prevent further occurrence of the freeze period at the start of the pseudo-bonus state ST4 in the game subsequent to the game in which the freeze period has occurred.

If "1" is not set in the direct hit freeze occurrence flag (step S2602: NO), it is determined whether or not the combination of the number-of-games mode and winning rate mode in the current pseudo-bonus state ST4 is the first combination. (Step S2604). As already explained, if the number-of-games mode is any one of the first to third number-of-games modes, the winning rate mode corresponds to the first combination regardless of the winning rate mode. In the case of any one of the 3 win-rate modes, the first combination is applicable regardless of the number-of-games mode. If it is the first combination (step S2604: YES), the first freeze setting process is executed (step S2605). In the first freeze setting process, information corresponding to 10 seconds corresponding to the first freeze period is set in the freeze counter of the main RAM 74 . As a result, in the normal processing (FIG. 25) after the freeze setting processing at the time of transition to the bonus is completed, an affirmative determination is made in step S908 and the game waits until the first freeze period elapses. Therefore, the start of rotation of the reels 32L, 32M, and 32R in the current game is put on standby over the first freeze period.

After that, the first freeze command is transmitted to the effect side MPU 92 (step S2606). When the effect-side MPU 92 receives the first freeze command, the effect execution mode in the upper lamp 61, the speaker 62, and the image display device 63 is made to correspond to the first freeze period. By confirming the effect, the player can grasp that the pseudo-bonus state ST4 in which the combination of the number-of-games mode and the win rate mode is the first combination has occurred.

If the combination of the number-of-games mode and the win-rate mode in the current pseudo-bonus state ST4 is not the first combination (step S2604: NO), the combination of the number-of-games mode and the win-rate mode in the current pseudo-bonus state ST4 is the first combination. It is determined whether or not there are two combinations (step S2607). As already explained, if the number-of-games mode is the fourth number-of-games mode and the winning rate mode is the fourth winning rate mode or the fifth winning rate mode, it corresponds to the second combination, and the winning rate mode is the fourth. If the win rate mode is selected and the number-of-games mode is the fourth number-of-games mode or the fifth number-of-games mode, it corresponds to the second combination. If it is the second combination (step S2607: YES), the second freeze setting process is executed (step S2608). In the second freeze setting process, information corresponding to 20 seconds corresponding to the second freeze period is set in the freeze counter of the main RAM 74 . As a result, in the normal processing (FIG. 25) after the freeze setting processing at the time of transition to the bonus is completed, an affirmative determination is made in step S908 and the game waits until the second freeze period elapses. Therefore, the start of rotation of the reels 32L, 32M, and 32R in the current game is put on standby over the second freeze period.

After that, the second freeze command is transmitted to the effect side MPU 92 (step S2609). When the effect side MPU 92 receives the second freeze command, the effect execution mode in the upper lamp 61, the speaker 62 and the image display device 63 is set to the execution mode corresponding to the second freeze period. By confirming the effect, the player can grasp that the pseudo-bonus state ST4 in which the combination of the number-of-games mode and the win rate mode is the second combination has occurred.

If the combination of the number-of-games mode and the win-rate mode in the current pseudo-bonus state ST4 is not the second combination (step S2607: NO), the combination of the number-of-games mode and the win-rate mode in the current pseudo-bonus state ST4 is the second combination. It means that it is a 3-combination. As already explained, when the number-of-games mode is the fifth number-of-games mode and the win rate mode is the fifth win rate mode, it corresponds to the third combination. If it is the third combination (step S2607: NO), the third freeze setting process is executed (step S2610). In the third freeze setting process, information corresponding to 30 seconds corresponding to the third freeze period is set in the freeze counter of the main RAM 74 . As a result, in the normal processing (FIG. 25) after the freeze setting processing at the time of transition to the bonus is completed, the affirmative determination is made in step S908 until the third freeze period elapses and the game waits. Therefore, the start of rotation of the reels 32L, 32M, and 32R in the current game is put on standby over the third freeze period.

After that, the third freeze command is transmitted to the effect side MPU 92 (step S2611). When the effect side MPU 92 receives the third freeze command, the effect execution mode in the upper lamp 61, the speaker 62 and the image display device 63 is set to the execution mode corresponding to the third freeze period. By confirming the effect, the player can grasp that the pseudo-bonus state ST4 in which the combination of the number-of-games mode and the win rate mode is the third combination has occurred.

Next, how the freeze period is set will be described with reference to the time chart of FIG. FIG. 54(a) shows the execution period of one game, FIG. 54(b) shows the period of the normal game state ST1, FIG. 54(c) shows the period of the pseudo-bonus state ST4, and FIG. 54(d). ) indicates the freeze period, and FIG. 54(e) indicates the timing of direct hit winning in the direct hit lottery process (step S2208).

First, the case where a direct hit lottery process (step S2208) does not result in a direct hit lottery and a transition to the pseudo-bonus state ST4 occurs will be described.

In the normal game state ST1 as shown in FIG. 54(b), the game is executed at timings t1 to t2 and from t3 to t4 as shown in FIG. 54(a). Then, in the game executed from the timing t3 to the timing t4, the value of the transition standby counter or the number-of-released-games counter of the main side RAM 74 becomes "0", thereby shifting the game state to the pseudo-bonus state ST4. A second start setting process (FIG. 50) is executed. Therefore, at the timing of t4, the normal game state ST1 ends and the pseudo-bonus state ST4 starts as shown in FIGS. 54(b) and 54(c).

After that, at the timing of t5, the first game is started in the pseudo-bonus state ST4 as shown in FIG. 54(a). The pseudo-bonus state ST4 this time is not triggered by winning a direct hit in the direct lottery process (step S2208), but by winning a transition in the transition lottery process (step S2215) or the number of unlocked games. Triggered by the execution of the game. Therefore, as shown in FIG. 54(d), the freeze period is set from the timing t5 when the game is started to the timing t6. As already explained, this freeze period is any one of 10 seconds, 20 seconds and 30 seconds depending on the type of combination of the number-of-games mode and winning rate mode in the pseudo-bonus state ST4. By making an affirmative determination in step S908 in the normal process (FIG. 25) until the freeze period elapses, the reels 32L, 32M, and 32R start rotating even after execution of the winning lottery process (FIG. 34). is awaited. Then, the rotation of the reels 32L, 32M, and 32R is started when the freeze period elapses at the timing of t6. After that, as shown in FIG. 54(a), the current game ends at timing t7, and a new game is executed in the pseudo-bonus state ST4 from timing t8 to timing t9.

The occurrence of the freeze period as described above makes it possible for the player to clearly recognize that the pseudo-bonus state ST4 has started. Also, during the freeze period, an effect corresponding to the freeze period is executed by the upper lamp 61, the speaker 62, and the image display device 63. This makes it possible to increase the player's satisfaction with the start of the pseudo-bonus state ST4.

Next, a case where a direct hit lottery process (step S2208) results in a transition to the pseudo-bonus state ST4 will be described.

As shown in FIG. 54(b), in the normal game state ST1, the game is executed at timings t10 to t11 and from t12 to t14 as shown in FIG. 54(a). In this case, at the timing of t12, as shown in FIG. 54(e), direct hit lottery processing (step S2208) results in direct hit winning. Therefore, as shown in FIG. 54(d), the freeze period is set over the timing from t12 to t13. The freeze period triggered by direct hit winning is fixed at 30 seconds as already explained. By making an affirmative determination in step S908 in the normal processing (FIG. 25) until the freeze period elapses, the reels 32L, 32M, and 32R can start rotating even after execution of the winning lottery processing (FIG. 34). Wait. Then, the rotation of the reels 32L, 32M, and 32R is started when the freeze period elapses at the timing of t13.

By generating the freeze period in this way, it becomes possible for the player to clearly recognize that the opportunity to shift to the pseudo-bonus state ST4 has occurred. Also, during the freeze period, an effect corresponding to the freeze period is executed by the upper lamp 61, the speaker 62, and the image display device 63. This makes it possible to increase the player's satisfaction with the occurrence of the opportunity to shift to the pseudo-bonus state ST4.

After that, at the timing of t14, the current game ends as shown in FIG. 54(a). In this case, by executing the first start setting process (step S2303), the normal game state ST1 ends and the pseudo-bonus state ST4 starts as shown in FIGS. 54(b) and 54(c). . In addition, since the pseudo-bonus state ST4 is triggered by a direct hit winning, the state surely shifts to the AT state ST5 after the pseudo-bonus state ST4 ends.

After that, at the timing of t15, the first game is started in the pseudo-bonus state ST4 as shown in FIG. 54(a). The current pseudo-bonus state ST4 is triggered by direct hit winning in the direct hit lottery process (step S2208), and a freeze period has already occurred triggered by the direct hit winning. Therefore, the freeze period triggered by the start of the first game in the pseudo-bonus state ST4 does not occur. This makes it possible to prevent the freeze period from occurring excessively. Thereafter, the current game ends at timing t16 as shown in FIG. 54(a), and a new game is executed in the pseudo-bonus state ST4 from timing t17 to timing t18.

<Regarding Pseudo-Bonus State ST4>
Next, the details of processing in the pseudo-bonus state ST4 and AT state ST5 will be described. FIG. 55 is a flow chart showing the advantageous state processing at the start of the game, which is executed by the main MPU 72 . Advantageous lottery processing at the start of the game (FIG. 46) is performed after the determination of whether or not the winning combination has been completed in the winning lottery processing (FIG. 34), as already described, and the first control processing (step S1312) for the game section is executed. This is executed in step S1313, which is a process executed before the stop order notification control process (step S1314). Then, the advantageous state processing at the start of the game is executed at step S2203 in the advantageous lottery processing at the start of the game (FIG. 46).

First, it is determined whether or not the bet number of the current game is "3" by determining whether the value of the bet number setting counter 74a of the main RAM 74 is "3" (step S2701). If the number of bets for the current game is "2" (step S2701: NO), the processing after step S2702 is not executed. As a result, even in the pseudo-bonus state ST4 or the AT state ST5, in the game in which the number of bets is "2", the processing after step S2702 is not executed.

If the number of bets for this game is "3" (step S2701: YES), it is determined whether the current gaming state is the first CB state ST2 or the second CB state ST3 (step S2702). If the current gaming state is the first CB state ST2 or the second CB state ST3 (step S2702: YES), the processing after step S2703 is not executed. As a result, even if the pseudo-bonus state flag or the AT state flag of the main RAM 74 is set to "1", if the state is the first CB state ST2 or the second CB state ST3, the processing after step S2703 is executed. will not be executed.

If the current gaming state is not the first CB state ST2 or the second CB state ST3 (step S2702: NO), it is determined whether or not the pseudo bonus state flag of the main side RAM 74 is set to "1". is the pseudo-bonus state ST4 (step S2703). If the current gaming state is not the pseudo-bonus state ST4 (step S2703: NO), it means that the current gaming state is the AT state ST5, so the AT state processing at the start of the game is executed (step S2704). . The AT state processing at the start of the game will be described later.

If the current gaming state is the pseudo-bonus state ST4 (step S2703: YES), it is determined whether or not the AT transition confirmation flag provided in the main RAM 74 is set to "1" (step S2705). The AT transition confirmation flag is a flag for the main side MPU 72 to specify whether or not the conditions for transition to the AT state ST5 have already been satisfied in the pseudo-bonus state ST4. If the AT transition confirmation flag has already been set to "1" (step S2705: YES), it means that the condition for transition to the AT state ST5 has already been satisfied in the current pseudo bonus state ST4, so step S2706. After that, the process for determining whether or not to shift to the AT state ST5 is not executed.

When "1" is not set to the AT transition determination flag (step S2705: NO), it is determined whether winning data corresponding to transition is stored in the main RAM 74 (step S2706). The transferable winning data is any one of first watermelon winning data, second watermelon winning data, cherry winning data, first chance replay winning data, and second chance replay winning data. In other words, if the lottery process (FIG. 34) for the combination in the current game wins with any of the index values IV=11 to 15, affirmative determination is made in step S2706. When an affirmative determination is made in step S2706, AT shift lottery processing is executed (step S2707).

In the AT shift lottery process, the AT shift lottery table provided in the main ROM 73 and the lottery counter periodically updated in the main RAM 74 are used to shift to the AT state ST5 after the current pseudo-bonus state ST4 ends. A lottery will decide whether or not to allow it. In the lottery process (FIG. 34) for the role in this game, if the first watermelon winning data is stored in the main side RAM 74 (if the index value IV=11 is won), the probability is 20%. If the AT transition is won and the second watermelon winning data is stored in the main side RAM 74 (when the index value IV=12 is won), the AT transition is won with a probability of 10% and the cherry is stored in the main side RAM 74. If the winning data is stored (when the index value IV=13 is won), the AT shift wins with a probability of 40%, and if the first chance replay winning data is stored in the main side RAM 74 ( If the index value IV = 14 is won), the AT transition wins with a probability of 30%, and if the second chance replay winning data is stored in the main side RAM 74 If there is), there is a 20% probability that AT transition will be won. In this case, an index value IV with a lower probability of winning in the winning lottery process (FIG. 34) has a higher probability of winning an AT transition. As a result, it is possible to increase the advantage of winning an index value IV with a low winning probability in the winning lottery process (FIG. 34).

When the AT transition is won (step S2708: YES), the AT transition determination flag of the main side RAM 74 is set to "1" (step S2709). After that, an AT transition winning command indicating that the AT transition has been won is transmitted to the effect side MPU 92 (step S2710). When the performance-side MPU 92 receives the AT transition winning command, the performance indicating that the AT transition winning is achieved is executed by the upper lamp 61, the speaker 62 and the image display device 63. - 特許庁

Next, the pseudo-bonus processing executed by the main MPU 72 will be described with reference to the flow chart of FIG. The pseudo-bonus processing is executed at step S1805 in the corresponding processing (FIG. 39) at the end of the game. As described above, the corresponding processing at the end of the game is executed after all the reels 32L, 32M, and 32R have stopped rotating in one game, so the pseudo-bonus processing also stops all the reels 32L, 32M, and 32R from rotating in one game. is executed after

First, by determining whether the value of the bet number setting counter 74a of the main RAM 74 is "3", it is determined whether or not the bet number of the current game is "3" (step S2801). If the number of bets for the current game is "2" (step S2801: NO), the processes after step S2802 are not executed. As a result, even if a game with a bet number of "2" is executed in the pseudo-bonus state ST4, the remaining number of continuous games in the pseudo-bonus state ST4 is not subtracted.

In the case of the CB state (the first CB state ST2 or the second CB state ST3), the pseudo-bonus processing (FIG. 56) itself is not executed. The number of games played in the state is not treated as the number of games played in the pseudo-bonus state ST4. Therefore, even if the transition to the CB state occurs in the middle of the pseudo-bonus state ST4, the pseudo-bonus state ST4 is resumed from the state of the remaining number of continuous games immediately before the transition to the CB state after the end of the CB state. .

If the number of bets for this game is "3" (step S2801: YES), the value of the pseudo-bonus continuation counter in the main RAM 74 is subtracted by 1 (step S2802). After that, it is determined whether or not the value of the pseudo-bonus continuation counter is "0" (step S2803). When the value of the pseudo bonus continuation counter is "0" (step S2803: YES), it is determined whether or not "1" is set to the AT transition confirmation flag of the main side RAM 74 (step S2804).

When "1" is set to the AT transition determination flag (step S2804: YES), lottery processing for the set number of times is executed (step S2805). In the lottery process for the number of sets, the lottery counter periodically updated in the table for the number of sets provided in the main ROM 73 and the main RAM 74 is used to determine the initial number of sets for the AT state ST5 by lottery. As already explained, the initial number of continuous games in one set in the AT state ST5 is 50 games, and the remaining number of continuous games can be increased by fulfilling the additional condition during the one set. When one set is finished, the AT state ST5 is finished when the number of remaining sets is "0".

In the lottery process for the set number of times, if the opportunity to shift to the pseudo-bonus state ST4 that ended this time was triggered by a direct hit win, or if the win rate mode of the pseudo-bonus state ST4 that ended this time was the fifth win rate mode, 1 initial set number is selected with a probability of 20%, 2 initial set numbers are selected with a 30% probability, and 3 initial set numbers are selected with a 50% probability. In addition, when the winning rate mode of the pseudo-bonus state ST4 ended this time is the fourth winning rate mode or the third winning rate mode, one initial set number is selected with a probability of 30%, and two times are selected. The initial set number is selected with a probability of 50%, and the initial set number of 3 is selected with a probability of 20%. In addition, when the winning rate mode of the pseudo-bonus state ST4 ended this time is the second winning rate mode or the first winning rate mode, one initial set number is selected with a probability of 50%, and two times are selected. The initial number of sets is selected with a probability of 30%, and the number of initial sets of 3 is selected with a probability of 20%.

After that, the number of sets is stored (step S2806). In the set number storage process, the initial set number information selected in the set number lottery process is set in the set number counter of the main side RAM 74 . The number-of-sets counter is a counter for specifying the number of remaining sets in the AT state ST5 in the main MPU 72, as already described.

After that, the AT continuation counter of the main RAM 74 is set to "50" as the information of the number of initial continuation games (step S2807). As already explained, the AT continuation counter is a counter for the main MPU 72 to specify the number of remaining continuation games in one set in the AT state ST5. Also, the AT state flag provided in the main RAM 74 is set to "1" (step S2808). The AT state flag is a flag for specifying in the main side MPU 72 whether or not the gaming state is the AT state ST5. Then, an AT shift command indicating that the shift to the AT state ST5 occurs is transmitted to the effect side MPU 92 (step S2809). When the performance side MPU 92 receives the AT transition command, the upper lamp 61, the speaker 62 and the image display device 63 execute the performance indicating that the transition to the AT state ST5 will occur.

After that, the second output start flag provided in the main RAM 74 is set to "1" (step S2810). The second output start flag is a flag for specifying in the main side MPU 72 that the external output corresponding to the start of the AT state ST5 is to be executed.

On the other hand, if the AT transition confirmation flag is not set to "1" (step S2804: NO), the processing for setting the end preparation state ST6 is executed (step S2811). In the setting process, the termination preparation state flag provided in the main RAM 74 is set to "1". The end preparation state flag is a flag for the main MPU 72 to specify that the end preparation state ST6 is set, and when the end preparation state flag is set to "1", the game state becomes the end preparation state ST6. Also, the termination preparation completion flag of the main RAM 74 is cleared to "0" (step S2812). As already described, the end preparation completion flag is a flag for the main side MPU 72 to specify whether or not one game has been executed in the end preparation state ST6.

As already explained in the end preparation state ST6, if the affirmative determination is made in step S2002 in the second control process (FIG. 44) of the game section and the end preparation completion flag is not set to "1" (step S2003: NO), after setting the end preparation completion flag to "1", the process for specifying whether or not the ending condition of the second section SC2 is satisfied is executed, and the second control process of the game section in the current game ( FIG. 44) is terminated. On the other hand, if the end preparation completion flag is set to "1" (step S2003: YES), the process for ending the second section SC2 and shifting to the first section SC1 is executed (steps S2014 to S2016). ). As a result, the second section SC2 ends when the game following the game in which the pseudo-bonus state ST4 has ended ends.

After executing the processing of step S2812 in the pseudo-bonus processing (FIG. 56), a bonus end command indicating that the pseudo-bonus state ST4 has ended is transmitted to the effect side MPU 92 (step S2813). When the effect-side MPU 92 receives the bonus end command, it turns off the upper lamp 61 . The light-out state continues until a new game is started. Further, when the effect-side MPU 92 receives the bonus end command, the effect indicating that the pseudo-bonus state ST4 has ended is executed by the speaker 62 and the image display device 63.例文帳に追加Thereafter, the external output end flag provided in the main RAM 74 is set to "1" (step S2814). The external output end flag is used by the main MPU 72 to specify that the external output state should correspond to the termination of the pseudo-bonus state ST4 or the AT state ST5 and transition to the normal game state ST1. is a flag.

When the process of step S2810 or the process of step S2814 is executed, the clear process at the end of the bonus is executed (step S2815). In the clearing process at the end of the bonus, a process for clearing the area of the main side RAM 74 is executed in response to the end of the pseudo-bonus state ST4.

FIG. 57 is a flow chart showing the clearing process at the end of the bonus.

First, "k" is set as the start address in the clearing process to the clear target address provided in the register of the main MPU 72 (step S2901). Here, the contents of the storage area of the main RAM 74 will be explained again with reference to FIG. As shown in FIG. 16, each storage area of the main RAM 74 is set with an address. The address is set as serial number information. Specifically, the address "0000" is set as the initial address, the address "0001" is set as the next address, and the address "0002" is set as the next address. The addresses are set so that the numbers are consecutive even after that.

A second CB winning data area, which is an area for storing the second CB winning data, is set as a storage area corresponding to the start address "0000", and a storage area corresponding to the next order "0001". , the first CB winning data area, which is an area for storing the first CB winning data, is set, and the set value to be used is stored as a storage area corresponding to "0002" which is the next order. A setting value storage area is set as an area for the next order, and a continuous game number counter 74c is set as a storage area corresponding to the next order "0003", and the next order "0004". A total acquisition number counter 74d is set as a corresponding storage area, and a credit counter 74b is set as a storage area corresponding to the next order "0005", corresponding to the next order "0006". A door state area 74e is set as a storage area. In addition, the storage area corresponding to "0007" to "k-3" contains a second interval flag, a set number counter, an AT continuation counter, an AT state flag, a second output start flag, an end preparation state flag, and an end preparation completion flag. , an external output end flag, and a storage area for storing information indicating whether or not a replay win has been established. Also, a bet number history counter 74f is set as a storage area corresponding to "k-2", and a grant number history counter is set as a storage area corresponding to "k-1" which is the next order, A pseudo-bonus state flag is set as a storage area corresponding to the next order "k", a pseudo-bonus continuation counter is set as a storage area corresponding to the next order "k+1", and the following A bet number setting counter 74a is set as a storage area corresponding to the order "k+2", and a medium award counter is set as a storage area corresponding to the next order "k+3". In addition, the storage area for addresses after "k+4" includes, for example, an information abnormality flag 74g, an area for storing game number mode information, an area for storing win rate mode information, and the like.

After setting "k" to the clear target address of the main MPU 72 in step S2901, the memory area of the main RAM 74 corresponding to the address set as the clear target address is cleared to "0" and initialized. (step S2902). After that, update processing of the clear target address is executed (step S2903). In the update process, by adding 1 to the value of the clear target address, the address set as the clear target address is changed to the next address in the order of the addresses of the main RAM 74 . Then, it is determined whether or not the updated address exceeds the end address, which is the last address in the main RAM 74 (step S2904). If a negative determination is made in step S2904, the storage area of the updated address is cleared to "0" and initialized (step S2902), and the processing of steps S2903 and S2904 is performed again. If an affirmative determination is made in step S2904, it means that the clearing process of the main side RAM 74 at the end of the pseudo-bonus state ST4 has ended. In this case, the clearing process at the end of this bonus ends.

When the pseudo-bonus state ST4 ends by executing the clearing process at the end of the bonus as described above, the storage area corresponding to the addresses "0000" to "k-1" in the main RAM 74 is set to "0 " is not cleared. The storage area corresponding to "0000" is set as the second CB winning data area as described above, and the storage area corresponding to "0001" is set as the first CB winning data area as described above. Since these storage areas are excluded from execution targets of the clearing process at the end of the bonus, the first CB winning data will not be processed even if the pseudo-bonus state ST4 ends in a situation where the first CB winning data is stored in the main RAM 74. Even if the pseudo-bonus state ST4 ends in a situation where the second CB winning data is stored in the main side RAM 74, the second CB winning data will not be deleted.

The storage area corresponding to "0002" is set as the setting value storage area as described above. Since the memory area is excluded from the execution target of the clearing process at the end of the bonus, the set value to be used will not be erased even after the pseudo bonus state ST4 ends. The storage area corresponding to "0003" is set with the continuous game number counter 74c as described above, and the storage area corresponding to "0004" is set with the total winning number counter 74d as described above. Since these storage areas are excluded from the targets of execution of the clearing process at the end of the bonus, even if the pseudo-bonus state ST4 ends, the information for specifying the trigger for fulfillment of the ending condition of the second section SC2 is erased. never. As described above, the credit counter 74b is set in the storage area corresponding to "0005". Since the memory area is excluded from the execution target of the clearing process at the end of the bonus, the credited virtual medal information is not erased even when the pseudo-bonus state ST4 ends. As described above, the door status area 74e is set as the storage area corresponding to "0006". Since the storage area is excluded from the clearing process at the end of the bonus, the information on the monitoring state of the front door 12 is not erased even when the pseudo bonus state ST4 ends. A second interval flag is set in the storage area corresponding to "0007" to "k-3". By excluding the second section flag from the execution target of the clearing process at the time of bonus end, the second section SC2 is prevented from ending when the pseudo bonus state ST4 ends and shifts to the AT state ST5. It becomes possible to In the storage area corresponding to "0007" to "k-3", there are set number counter, AT continuation counter, AT state flag, second output start flag, end preparation state flag, end preparation completion flag and external output end flag. It is included. By excluding these storage areas from the execution targets of the clear processing at the end of the bonus, the information referred to after the pseudo-bonus state ST4 is ended is not erased at the end of the pseudo-bonus state ST4. becomes possible. Also, the storage area corresponding to "0007" to "k-3" includes a storage area for storing information indicating whether or not a replay winning has been established. Since the storage area is excluded from the execution target of the clearing process at the end of the bonus, if the replay winning is established in the final game in the pseudo bonus state ST4, the profit of the replay due to the establishment of the replay winning becomes the pseudo bonus state. It is possible to prevent the data from being erased at the end of ST4.

As described above, the bet number history counter 74f is set in the storage area corresponding to "k-2". Since the value of the bet number setting counter 74a is set in the bet number history counter 74f in step S911 in the normal process (FIG. 25), the bet number history counter 74f is set at the timing when the pseudo bonus process (FIG. 56) is executed. 74f stores the number of bets for the current game. The clearing process (FIG. 57) at the end of the bonus is executed in the pseudo-bonus process (FIG. 56), and the pseudo-bonus process (FIG. 56) is executed in the corresponding process (FIG. 39) at the end of the game. However, in the corresponding processing at the end of the game (FIG. 39), the second control processing (FIG. 44) of the game section is executed after the pseudo bonus processing (FIG. 56) is completed. In the second control process (FIG. 44) of the relevant game section, the value of the total win number counter 74d is made to correspond to the contents of the current game in order to specify whether or not the ending condition of the second section SC2 is satisfied, as already explained. The updating process (steps S2007 to S2012) is executed, and in step S2008 of the updating process, the process of subtracting the number of bets for the current number of games from the value of the total winning number counter 74d is executed. During this subtraction, the value of the bet number history counter 74f is subtracted from the value of the total winning number counter 74d. Under such circumstances, the bet number history counter 74f is excluded from the execution target of the clear processing at the end of the bonus, so that after the clear processing at the end of the bonus is executed, the second control processing (Fig. 44), even if the process of subtracting the number of bets in the current game from the value of the total winning number counter 74d is executed, it is possible to appropriately perform the process of subtracting.

The storage area corresponding to "k-1" is set with the grant number history counter as described above. Since the value of the medium grant counter is set in the grant number history counter in step S911 in the normal processing (FIG. 25), the grant number history counter is set at the timing when the pseudo-bonus processing (FIG. 56) is executed. , the number of game media provided in the game is stored. The clearing process (FIG. 57) at the end of the bonus is executed in the pseudo-bonus process (FIG. 56), and the pseudo-bonus process (FIG. 56) is executed in the corresponding process (FIG. 39) at the end of the game. However, in the corresponding processing at the end of the game (FIG. 39), the second control processing (FIG. 44) of the game section is executed after the pseudo bonus processing (FIG. 56) is completed. In the second control process (FIG. 44) of the relevant game section, the value of the total win number counter 74d is made to correspond to the contents of the current game in order to specify whether or not the ending condition of the second section SC2 is satisfied, as already explained. An updating process (steps S2007 to S2012) is executed, and in step S2010 of the updating process, a process of adding the number of game media awarded in the current game to the value of the total acquisition number counter 74d is executed. be. During this addition, the value of the grant number history counter is added to the value of the total acquisition number counter 74d. Under such circumstances, the number-of-granted-history counter is excluded from the execution target of the clearing process at the end of the bonus, so that the second control process (Fig. 44 ) to add the number of game media awarded in the current game to the value of the total acquisition number counter 74d, it is possible to appropriately perform the addition process. .

On the other hand, when the pseudo-bonus state ST4 ends, the storage areas corresponding to addresses after "k" in the main RAM 74 are cleared to "0" and initialized. The storage area corresponding to "k" has the pseudo-bonus status flag set as described above, and the storage area corresponding to "k+1" has the pseudo-bonus continuation counter set as described above. In addition, the storage area for addresses after "k+4" includes an area for storing game number mode information and an area for storing win rate mode information. Since these storage areas are included in the execution targets of the clearing process at the end of the bonus, the storage areas used in the pseudo-bonus state ST4 are cleared to "0" and initialized at the end of the pseudo-bonus state ST4. It becomes possible to

The bet number setting counter 74a is set in the storage area corresponding to "k+2" as described above, and the medium award counter is set in the storage area corresponding to "k+3" as described above. As already described, the bet number for one game is set in the bet number setting counter 74a, and the display contents of the bet display section 64 correspond to the information stored in the bet number setting counter 74a. Then, when the value of the bet number setting counter 74a is "0", all the three light emitting parts of the bet display part 64 are turned off. Further, as already explained, the number of game media awarded in one game is set in the medium provision counter, and the display contents of the dual-purpose display section 66 indicate that the stop order of the reels 32L, 32M, and 32R is not reported. The display contents correspond to the information stored in the medium provision counter in the situation. When the value of the medium provision counter is "0" in a situation where the stop order of the reels 32L, 32M, and 32R is not notified, all the light-emitting sections of the combined display section 66 are turned off. In such a configuration, the bet number setting counter 74a and the medium award counter are included in the execution targets of the clear processing at the end of the bonus, so that the bet display section 64 and the combined display section 66 are turned off at the end of the pseudo-bonus state ST4. state can be made. The light-out state of the bet display section 64 continues until a value of 1 or more is set in the bet number setting counter 74a, and the light-out state of the dual-purpose display section 66 newly starts notification of the stop order of the reels 32L, 32M, and 32R. or until a value of 1 or more is set in the medium provision counter.

The execution timing of various processes when the pseudo-bonus state ST4 ends will be described with reference to the time chart of FIG. FIG. 58(a) shows the execution period of one game, FIG. 58(b) shows the period of the pseudo-bonus state ST4, and FIG. 58(c) shows the history storage process (step S911) of the normal process (FIG. 25). is executed, FIG. 58(d) shows the timing at which the bet display section 64 and the combined display section 66 are all turned off, and FIG. 58(e) shows the second control processing of the game section (FIG. 44). indicates when is executed.

In the pseudo-bonus state ST4 as shown in FIG. 58(b), a new game is started at timing t1 as shown in FIG. 58(a). This game is the final game in the pseudo-bonus state ST4. After that, at the timing t2 after the rotation of all the reels 32L, 32M, and 32R in the current game is stopped and the medium provision processing (step S910) of the normal processing (FIG. 25) is completed, FIG. , the history storage process (step S911) of the normal process (FIG. 25) is executed. As a result, the value of the bet number setting counter 74a of the main RAM 74 is set to the bet number history counter 74f of the main RAM 74, and the value of the medium award counter of the main RAM 74 is set to the award number history counter of the main RAM 74. be done.

After that, the pseudo-bonus status flag in the main side RAM 74 is cleared to "0" by executing the clearing process (FIG. 57) at the end of the bonus in the pseudo-bonus process (FIG. 56) at the timing of t3. Therefore, at the timing t3, the pseudo-bonus state ST4 ends as shown in FIG. 58(b). In addition, in the clearing process (FIG. 57) at the end of the bonus, the bet number setting counter 74a of the main RAM 74 is cleared to "0" and the medium award counter of the main RAM 74 is cleared to "0". Therefore, at the timing t3, the bet display section 64 and the combined display section 66 are turned off as shown in FIG. 58(d). If the dual-use display unit 66 is already in the off state, the off state is maintained.

When the pseudo-bonus state ST4 ends in this way, the bet display section 64 and the dual-use display section 66 are turned off, making it easier for the player to recognize that the pseudo-bonus state ST4 has ended. Further, the manager of the game hall confirms whether or not the bet display section 64 and the combined display section 66 are turned off, so that the pseudo-bonus state ST4 is displayed on the image display device 63 whose display is controlled by the MPU 92 on the production side. It is possible to confirm whether or not an effect indicating that the game ends and the transition to the AT state ST5 occurs is normal.

After that, at the timing of t4, as shown in FIG. 58(e), the second control process (FIG. 44) of the game section is executed. As described above, the history storage process (step S911) is executed at the timing t2, which is the timing before the timing t3 at which the clearing process (FIG. 57) at the end of the bonus is executed. The value of the bet number setting counter 74 a is set in the bet number history counter 74 f of the main RAM 74 , and the value of the medium award counter of the main RAM 74 is set in the award number history counter of the main RAM 74 . Then, in the second control process (FIG. 44) of the game section, the information stored in the bet number history counter 74f and the award number history counter is used to execute the process for updating the value of the total winning number counter 74d. . As a result, even if the clearing process (FIG. 57) at the end of the bonus is executed as described above, it is possible to appropriately update the value of the total win counter 74d. After that, as shown in FIG. 58(a), the current game ends at timing t5, and a new game starts at timing t6.

<Regarding AT state ST5>
Next, the contents of the processing executed in the AT state ST5 will be explained. FIG. 59 is a flow chart showing AT state processing executed by the main MPU 72 at the start of the game. As already described, the AT state processing at the start of the game is executed at step S2704 in the advantageous state processing at the start of the game (FIG. 55).

First, it is determined whether or not "1" is set to either the first ending flag or the second ending flag of the main RAM 74 (step S3001). As already described, the first ending flag is for specifying in the main MPU 72 that the number of times the game has been executed in the second section SC2, which is counted using the continuous game number counter 74c, reaches the upper limit number of games. is a flag. As already explained, the second ending flag indicates by the main MPU 72 that there is a high possibility that the limited total number of net additions of game media measured using the total acquisition number counter 74d will reach the upper limit number of net additions. This is a flag for specifying. If "1" is set to either the first ending flag or the second ending flag (step S3001: YES), the processes after step S3002 are not executed. As a result, in a situation where the number of times the game has been executed in the second section SC2 reaches the upper limit number of games, or in a situation where there is a high possibility that the total net increase number with the restriction of game media will reach the upper limit net increase number, Processing for adding the number of continuous games or the number of sets in the AT state ST5 is not executed.

If "1" is not set to both the first ending flag and the second ending flag (step S3001: NO), it is determined whether the value of the additional period counter provided in the main RAM 74 is 1 or more. By doing so, it is determined whether or not the current state is the additional period in the AT state ST5 (step S3002). The add-on period counter is a counter for the main MPU 72 to specify whether or not it is an add-on period and the number of remaining games to be continued during the add-on period.

If the value of the add-on period counter is "0" and it is not the add-on period (step S3002: NO), it is determined whether or not winning data corresponding to transition is stored in the main RAM 74 (step S3003). The transferable winning data is any one of first watermelon winning data, second watermelon winning data, cherry winning data, first chance replay winning data, and second chance replay winning data. In other words, if the lottery process (FIG. 34) for the role in the current game wins with any of the index values IV=11 to 15, affirmative determination is made in step S3003. When an affirmative determination is made in step S3003, a transition lottery process for the additional period is executed (step S3004).

In the addition period transition lottery process, the addition period transition lottery table provided in the main ROM 73 and the lottery counter periodically updated in the main RAM 74 are used to add the remaining number of sets in the AT state ST5. It is determined by lottery whether or not to shift to an additional period that tends to occur. In the lottery process (FIG. 34) for the role in this game, if the first watermelon winning data is stored in the main side RAM 74 (if the index value IV=11 is won), there is a probability of 10%. If the second watermelon winning data is stored in the main side RAM 74 (if the index value IV = 12 is won), there is a 5% probability that the transition to the additional period will be won, and the main side will win. When cherry winning data is stored in the side RAM 74 (when the index value IV=13 is won), there is a probability of 20% that the player wins during the additional period, and the main side RAM 74 stores the first chance replay winning data. If it is stored (when index value IV=14 is won), there is a 15% chance of winning during the additional period. If the value IV=15 is won), there is a 10% probability that it will be won during the additional period. In this case, an index value IV with a lower probability of winning in the winning lottery process (FIG. 34) has a higher probability of winning during the additional period. As a result, it is possible to increase the advantage of winning an index value IV with a low winning probability in the winning lottery process (FIG. 34).

In the event that the transition to the additional period is won (step S3005: YES), the process of adding the number of continued games is executed (step S3006). In the process of adding the number of continuous games, the number of games equal to or greater than the number of continuous games for which the additional period continues is added to the value of the AT continuation counter of the main side RAM 74 . Specifically, the additional period continues over 10 games, and in step S3006, 20 games, which is the number of games equal to or greater than 10 games, is added to the value of the AT continuation counter of the main RAM 74. FIG. As a result, it is possible to prevent the number of remaining continuous games in the AT state ST5 from becoming "0" in the middle of the additional period.

After that, the first addition command is transmitted to the effect side MPU 92 (step S3007). The first addition command is a command for making the production-side MPU 92 recognize that the number of games has been added when the transition is made to the addition period. In addition, the first addition command includes information on 20 games, which is the number of games to be added this time. When the effect-side MPU 92 receives the first addition command, the upper lamp 61, the speaker 62, and the image display device 63 execute an effect indicating that the number of games has been increased at the time of transition to the additional period. do. After that, the addition winning flag provided in the main side RAM 74 is set to "1" (step S3008). The add-on win flag is a flag for the main MPU 72 to specify that the move win for the add-on period has been won in the move-on lottery process for the add-on period (step S3004).

If the transition lottery process for the additional period (step S3004) does not win the transition to the additional period (step S3005: NO), the first additional lottery process is executed (step S3009). In the first addition lottery process, the first addition lottery table provided in the main ROM 73 and the lottery counter periodically updated in the main RAM 74 are used to increase the number of remaining sets of the AT state ST5. It is decided by lottery whether or not to generate the addition that becomes. When the first watermelon winning data is stored in the main side RAM 74 (when the index value IV=11 is won), 1 set of additions is selected with a probability of 10%, and 2 with a probability of 10%. A set overlay is chosen and misses 80% of the time. When the second watermelon winning data is stored in the main side RAM 74 (when the index value IV=12 is won), 1 set of additions is selected with a probability of 5%, and 2 is selected with a probability of 5%. A set overlay is chosen and misses 90% of the time. When cherry winning data is stored in the main side RAM 74 (when the index value IV=13 is won), one set of additions is selected with a probability of 20%, and two sets of additions are selected with a probability of 20%. Override is chosen and misses 60% of the time. When the first chance replay winning data is stored in the main side RAM 74 (when the index value IV=14 is won), 1 set of additions is selected with a probability of 15%, and Two sets of overlays are chosen, with a 70% chance of being out. When second chance replay winning data is stored in the main RAM 74 (when the index value IV=15 is won), 1 set of additions is selected with a probability of 10%, and with a probability of 10%. Two sets of overlays are chosen, with an 80% chance of being out. In this case, an index value IV with a lower probability of winning in the winning lottery process (FIG. 34) has a higher probability of winning on top. In addition, the lower the probability of winning in the winning lottery process (FIG. 34), the higher the expected value of the number of sets to be added. As a result, it is possible to increase the advantage of winning an index value IV with a low winning probability in the winning lottery process (FIG. 34).

In the first add-on lottery process (step S3009), if either one set of add-on or two sets of add-on is selected and the add-on win is won (step S3010: YES), the set count addition process is executed (step S3011). In the set count addition process, the set count selected in the first addition lottery process (step S3009) is added to the set count counter of the main RAM 74. FIG. After that, the second addition command is transmitted to the effect side MPU 92 (step S3012). The second addition command is for causing the production side MPU 92 to recognize that the addition winning was made in the first addition lottery process (step S3009) and the number of addition sets selected in the first addition lottery process (step S3009). The second addition command includes information corresponding to the number of addition sets selected in the first addition lottery process (step S3009). When receiving the second addition command, the effect side MPU 92 causes the upper lamp 61, the speaker 62 and the image display device 63 to execute the effect indicating that the number of sets has been increased.

If the value of the add-on period counter of the main RAM 74 is 1 or more, indicating that the add-on period is on (step S3002: YES), the second add-on lottery process is executed (step S3013). In the second addition lottery process, a lottery counter periodically updated in the second addition lottery table provided in the main ROM 73 and the main RAM 74 is used to set the number of remaining sets in the AT state ST5. The number of times will be determined by lottery.

In the second addition lottery process (step S3013), if an index value IV other than the index value IV = 11 to 15 is won, one set of additions is selected with a probability of 80%, and two sets are selected with a probability of 10%. , with a 10% chance of choosing 3 sets of overlays. When the first watermelon winning data is stored in the main side RAM 74 (when the index value IV=11 is won), 1 set of additions is selected with a probability of 50%, and 2 with a probability of 25%. A set of overlays is selected, with a 25% chance of selecting 3 sets of overlays. When the second watermelon winning data is stored in the main side RAM 74 (when the index value IV=12 is won), 1 set of additions is selected with a probability of 60%, and 2 with a probability of 20%. A set of overlays is selected, with a 20% chance of selecting 3 sets of overlays. When cherry winning data is stored in the main side RAM 74 (when the index value IV=13 is won), one set of additions is selected with a probability of 20%, and two sets of additions are selected with a probability of 40%. Overrides are selected, with a 40% chance of selecting 3 sets of overrides. When the first chance replay winning data is stored in the main side RAM 74 (when the index value IV=14 is won), 1 set of additions is selected with a probability of 30%, and with a probability of 35%. Two sets of lifts are chosen, and 35% chance of picking three sets of lifts. When second chance replay winning data is stored in the main RAM 74 (when the index value IV=15 is won), 1 set of additions is selected with a probability of 50%, and with a probability of 25%. Two sets of lifts are chosen, and 25% chance of picking three sets of lifts. In this case, the lower the probability of winning in the winning lottery process (FIG. 34), the higher the expected value of the number of sets to be added. As a result, it is possible to increase the advantage of winning an index value IV with a low winning probability in the winning lottery process (FIG. 34).

After that, the addition processing of the set count is executed (step S3014). In the set count addition process, the set count selected in the second addition lottery process (step S3013) is added to the set count counter of the main RAM 74. FIG. After that, the third addition command is transmitted to the effect side MPU 92 (step S3015). The third addition command is a command for making the production side MPU 92 recognize the number of sets selected in the second addition lottery process (step S3013), and the third addition command includes the second addition lottery process (step S3013). The information corresponding to the number of addition sets selected in is included. When receiving the third addition command, the effect side MPU 92 causes the upper lamp 61, the speaker 62 and the image display device 63 to execute the effect indicating that the set number of times has been increased.

FIG. 60 is a flow chart showing AT processing executed by the main MPU 72 . The process for AT is executed in step S1806 in the corresponding process (FIG. 39) at the end of the game. As described above, since the corresponding processing at the end of the game is executed after all the reels 32L, 32M, 32R have stopped rotating in one game, the AT processing also stops all the reels 32L, 32M, 32R from rotating in one game. executed later.

First, by determining whether the value of the bet number setting counter 74a of the main RAM 74 is "3", it is determined whether or not the bet number of the current game is "3" (step S3101). If the number of bets for the current game is "2" (step S3101: NO), the processing after step S3102 is not executed. As a result, even if a game with a bet number of "2" is executed in the AT state ST5, the remaining number of continued games in the AT state ST5 is not subtracted, and furthermore, the remaining number of additional games in the AT state ST5 The number of continuous games is not subtracted.

Note that the AT process (FIG. 60) itself is not executed in the CB state (first CB state ST2 or second CB state ST3). The number of games played is not treated as the number of games played in AT state ST5. Therefore, even if the AT state ST5 is shifted to the CB state in the middle of the AT state ST5, the AT state ST5 is restarted from the state of the remaining number of continuous games immediately before the shift to the CB state after the end of the CB state.

When the number of bets for this game is "3" (step S3101: YES), the value of the AT continuation counter in the main side RAM 74 is subtracted by 1 (step S3102). After that, it is determined whether or not the current condition is the add-on period by determining whether or not the value of the add-on period counter of the main RAM 74 is 1 or more (step S3103).

If the value of the add-on period counter is "0" and it is not the add-on period (step S3103: NO), it is determined whether or not the add-on win flag in the main RAM 74 is set to "1" (step S3104). At the start of the game this time, if the transition lottery process for the addition period (step S3004) results in winning during the transition to the addition period, the addition winning flag is set to "1".

When "1" is set to the add-on win flag (step S3104: YES), the add-on period setting process is executed (step S3105). In the additional period setting process, the additional period counter of the main RAM 74 is set to a value corresponding to 10 games, which is the initial number of continuous games during the additional period. After that, after clearing the addition winning flag to "0" (step S3106), a command to start the addition period is transmitted to the effect side MPU 92 (step S3107). The add-on period start command is a command for making the effect-side MPU 92 recognize that the add-on period has started. When the production side MPU 92 receives the start command of the additional period, the upper lamp 61, the speaker 62 and the image display device 63 execute the production indicating that the additional period has started and the additional period. make it

If the value of the additional period counter is 1 or more and it is the additional period (step S3103: YES), the value of the additional period counter is subtracted by 1 (step S3108). Then, when the value of the additional period counter after subtracting 1 becomes "0" (step S3109: YES), an additional period end command is transmitted to the effect side MPU 92 (step S3110). The add-on period end command is a command for making the effect-side MPU 92 recognize that the add-on period has ended. When the performance side MPU 92 receives the end command of the additional period, the upper lamp 61, the speaker 62 and the image display device 63 execute the performance indicating that the additional period has ended.

When a negative determination is made in step S3104, when the process of step S3107 is executed, when a negative determination is made in step S3109, or when the process of step S3110 is executed, the value of the AT continuation counter in the main RAM 74 is "0". ” (step S3111). When the value of the AT continuation counter is "0" (step S3111: YES), 1 is subtracted from the value of the set number counter of the main side RAM 74 (step S3112). Then, it is determined whether or not the value of the number-of-sets counter after subtracting 1 is "0" (step S3113).

If the value of the set number counter is 1 or more (step S3113: NO), a process for starting a new set of the AT state ST5 is executed. Specifically, first, the AT continuation counter of the main RAM 74 is set to "50" as the initial continuation game number of a new set (step S3114). After that, an AT continuation command is transmitted to the effect side MPU 92 (step S3115). The AT continuation command is a command for making the production side MPU 92 recognize that a new set of the AT state ST5 has started. When receiving the AT continuation command, the effect-side MPU 92 causes the upper lamp 61, the speaker 62 and the image display device 63 to execute the effect indicating that a new set of the AT state ST5 has started.

After that, the third output start flag provided in the main RAM 74 is set to "1" (step S3116). The third output start flag is a flag for specifying in the main MPU 72 that external output corresponding to the start of a new set of the AT state ST5 is to be executed.

If the value of the number-of-sets counter is "0" (step S3113: YES), the process of setting the end preparation state ST6 is executed (step S3117). In the setting process, the termination preparation state flag provided in the main RAM 74 is set to "1". The end preparation state flag is a flag for the main MPU 72 to specify that the end preparation state ST6 is set, and when the end preparation state flag is set to "1", the game state becomes the end preparation state ST6. Also, the termination preparation completion flag of the main RAM 74 is cleared to "0" (step S3118). As already described, the end preparation completion flag is a flag for the main side MPU 72 to specify whether or not one game has been executed in the end preparation state ST6.

As already explained in the end preparation state ST6, if the affirmative determination is made in step S2002 in the second control process (FIG. 44) of the game section and the end preparation completion flag is not set to "1" (step S2003: NO), after setting the end preparation completion flag to "1", the process for specifying whether or not the ending condition of the second section SC2 is satisfied is executed, and the second control process of the game section in the current game ( FIG. 44) is terminated. On the other hand, if the end preparation completion flag is set to "1" (step S2003: YES), the process for ending the second section SC2 and shifting to the first section SC1 is executed (steps S2014 to S2016). ). As a result, the second section SC2 ends when the game following the game in which the AT state ST5 has ended ends.

After executing the process of step S3118 in the AT process (FIG. 60), the AT status flag of the main RAM 74 is cleared to "0" (step S3119). As a result, the AT state ST5 ends, and the game state changes to the normal game state ST1. Also, an AT end command indicating that the AT state ST5 has ended is transmitted to the effect side MPU 92 (step S3120). When receiving the AT end command, the effect side MPU 92 causes the upper lamp 61, the speaker 62 and the image display device 63 to execute the effect indicating that the AT state ST5 is ended. After that, the external output end flag of the main RAM 74 is set to "1" (step S3121). The external output end flag is used by the main MPU 72 to specify that the external output state should correspond to the end of the pseudo-bonus state ST4 or the AT state ST5 and the transition to the normal game state ST1. is a flag.

<Regarding external output setting processing>
Next, the external output setting process executed in step S913 of the normal process (FIG. 25) will be described. The external output setting process is executed after all the reels 32L, 32M and 32R have stopped rotating and the process for shifting the game state in the corresponding process at the end of the game (FIG. 39) is completed.

In the external output setting process, a process for externally outputting an external signal to the management computer of the game hall through each output terminal provided on the external output terminal board 78 is executed. The external output terminal plate 78 is provided with a first output terminal and a second output terminal.

The first output terminal and the main side MPU 72 are electrically connected through a first signal path, and the first output terminal is transmitted by the main side MPU 72 through the first signal path. The HI level first external signal is transmitted to the management computer of the game hall through the terminal. Although the details will be described later, when the pseudo bonus state ST4 is set, the first external signal becomes HI level, and when one set of the AT state ST5 continues, the first external signal becomes HI level. In this case, the first external signal becomes LOW level. The management computer of the gaming hall recognizes that the first external signal output from the slot machine 10 is at HI level, thereby determining that the slot machine 10 is in the pseudo-bonus state ST4 or the AT state ST5. and counting the number of times the output state of the first external signal switches from the LOW level to the HI level, the number of times the pseudo bonus state ST4 occurs and the number of times the AT state ST5 is set in the slot machine 10. It is possible to specify the number of times and the total number of times.

The second output terminal and the main MPU 72 are electrically connected through a second signal path. The HI level second external signal is transmitted to the management computer of the game hall through the terminal. Although the details will be described later, the second external signal becomes HI level when a transition from the pseudo-bonus state ST4 to the AT state ST5 occurs, and otherwise becomes LOW level. The management computer of the game hall recognizes that the second external signal output from the slot machine 10 is at HI level, so that the slot machine 10 shifts from the pseudo-bonus state ST4 to the AT state ST5. By identifying the situation and counting the number of times the output state of the second external signal switches from the LOW level to the HI level, the transition from the pseudo-bonus state ST4 to the AT state ST5 in the slot machine 10 can be performed. It is possible to specify the number of occurrences.

FIG. 61 is a flow chart showing the external output setting process.

First, it is determined whether or not the first output start flag of the main RAM 74 is set to "1" (step S3201). As already described, the first output start flag is set to "1" when the game state shifts from the normal game state ST1 to the pseudo-bonus state ST4. If the first output start flag is set to "1" (step S3201: YES), the first output start flag is cleared to "0" (step S3202). Then, the output timing counter provided in the main RAM 74 is set to "1" (step S3203). The output timing counter is a counter for determining whether or not the first external signal needs to be changed from LOW level to HI level by the main side MPU 72, and changes the first external signal from LOW level to HI level. It is a counter for specifying the timing by the main MPU 72 . Although the details will be described later, by setting "1" to the output timing counter, the first external signal is switched from the LOW level to the HI level at the end of the current game.

In the external output setting process, it is determined whether or not the second output start flag of the main RAM 74 is set to "1" (step S3204). As already described, the second output start flag is set to "1" when the game state shifts from the pseudo-bonus state ST4 to the AT state ST5. If the second output start flag is set to "1" (step S3204: YES), the second output start flag is cleared to "0" (step S3205). Then, "2" is set in the output timing counter of the main RAM 74 (step S3206). Although the details will be described later, by setting "2" to the output timing counter, the first external signal is switched from the HI level to the LOW level at the end of the current game, and the first external signal is switched at the end of the next game. is switched from LOW level to HI level.

After that, ON setting processing of the second external signal is executed (step S3207). In the ON setting process, the output state of the second external signal is switched from LOW level to HI level. As a result, a second external signal of HI level is transmitted from the main side MPU 72 to the second output terminal through the second signal path, and the second external signal of HI level is externally output to the management computer of the game hall through the second output terminal. be done.

In the external output setting process, it is determined whether or not the third output start flag of the main RAM 74 is set to "1" (step S3208). As already explained, the third output start flag is set to "1" when a new setting of the AT state ST5 is started. If the third output start flag is set to "1" (step S3208: YES), the third output start flag is cleared to "0" (step S3209). Then, "2" is set in the output timing counter of the main RAM 74 (step S3210). Although the details will be described later, by setting "2" to the output timing counter, the first external signal is switched from the HI level to the LOW level at the end of the current game, and the first external signal is switched at the end of the next game. is switched from LOW level to HI level.

In the external output setting process, after executing the processes of steps S3201 to S3210, the external output process is executed (step S3211). FIG. 62 is a flow chart showing processing for external output.

When the value of the output timing counter of the main RAM 74 is 1 or more (step S3301: YES), 1 is subtracted from the value of the output timing counter (step S3302). Then, it is determined whether or not the value of the output timing counter after subtracting 1 is "1" (step S3303). The case where the value of the output timing counter becomes "1" after subtraction of 1 means that the output timing is set in step S3206 of the external output setting process (FIG. 61) when a transition from the pseudo-bonus state ST4 to the AT state ST5 occurs. When "2" is set in the counter, or when "2" is set in the output timing counter in step S3210 of the external output setting process (FIG. 61) when a new set of AT state ST5 is started is.

If the value of the output timing counter after decrementing by 1 is "1" (step S3303: YES), the processing for setting the first external signal to OFF is executed (step S3304), and then this processing for external output ends. In the OFF setting process, the output state of the first external signal is switched from HI level to LOW level. As a result, the first external signal of LOW level is transmitted from the main side MPU 72 to the first output terminal through the first signal path, and the first external signal of LOW level is output to the management computer of the game hall through the first output terminal. be done.

If the value of the output timing counter after subtracting 1 is not "1", it means that the value of the output timing counter is "0". This is because the output timing counter is set to "1" or "2" in the external output setting process (FIG. 61). A case where the value of the output timing counter after subtracting 1 is "0" means that the normal game state ST1 has shifted to the pseudo-bonus state ST4 in the current game, and the external output setting process (FIG. 61) is executed. This corresponds to the case where "1" is set in the output timing counter in the current processing. In addition, in the previous game, the transition from the pseudo-bonus state ST4 to the AT state ST5 occurred. When set, or when "2" is set in the output timing counter in the previous processing of the external output setting processing (FIG. 61) due to the start of a new set of AT state ST5 in the previous game. This corresponds to the case where the first game is executed in the AT state ST5 shifted from the pseudo-bonus state ST4 or the case where the first game is executed in a new set of the AT state ST5.

If the value of the output timing counter is "0" (step S3303: NO), a second external signal OFF setting process is executed (step S3305). In the OFF setting process, the output state of the second external signal is switched from HI level to LOW level. As a result, the second external signal of LOW level is transmitted from the main side MPU 72 to the second output terminal through the second signal path, and the second external signal of LOW level is externally output to the management computer of the game hall through the second output terminal. be done. If the output state of the second external signal is already at LOW level, the LOW level state is maintained.

After that, after executing ON setting processing of the first external signal (step S3306), this external output processing ends. In the ON setting process, the output state of the first external signal is switched from LOW level to HI level. As a result, the first external signal of HI level is transmitted from the main side MPU 72 to the first output terminal through the first signal path, and the first external signal of HI level is externally output to the management computer of the game hall through the first output terminal. be done.

In the external output process, if it is determined in step S3301 that the value of the output timing counter is "0", it is determined whether or not the external output end flag of the main RAM 74 is set to "1" (step S3307). ). As already explained, the external output end flag is set to "1" when the pseudo-bonus state ST4 or the AT state ST5 ends and shifts to the normal game state ST1. If the external output end flag is set to "1" (step S3307: YES), the external output end flag is cleared to "0" (step S3308). Then, after executing the OFF setting processing of the first external signal (step S3309), this external output processing ends. In the OFF setting process, the output state of the first external signal is switched from HI level to LOW level. As a result, the first external signal of LOW level is transmitted from the main side MPU 72 to the first output terminal through the first signal path, and the first external signal of LOW level is externally output to the management computer of the game hall through the first output terminal. be done.

Next, how the output modes of the first external signal and the second external signal are appropriately changed will be described with reference to the time chart of FIG. 63(a) shows the execution period of one game, FIG. 63(b) shows the period of the normal game state ST1, FIG. 63(c) shows the period of the pseudo-bonus state ST4, and FIG. 63(d). ) indicates the period of the AT state ST5, FIG. 63(e) indicates the timing at which a new set is started in the AT state ST5, and FIG. 63(f) indicates the timing at which one set is completed in the AT state ST5. 63(g) shows the output state of the first external signal, and FIG. 63(h) shows the output state of the second external signal.

As shown in FIG. 63(b), in the normal game state ST1, a new game is started at timing t1 as shown in FIG. 63(a). This game is a game that triggers the transition from the normal game state ST1 to the pseudo-bonus state ST4. Therefore, when the game ends, the game state shifts from the normal game state ST1 to the pseudo-bonus state ST4 as shown in FIGS. 63(b) and 63(c). In addition, since "1" is set in the output timing counter of the main RAM 74 at step S3203 of the external output setting process (FIG. 61) in the game, the output timing is set at step S3302 in the external output process (FIG. 62). Since the value of the counter is decremented by 1 and the value of the output timing counter after the decrement of 1 becomes "0", ON setting processing of the first external signal (step S3306) is executed. Therefore, at the timing of t2, the state of the external output of the first external signal is switched from LOW level to HI level as shown in FIG. 63(g).

After that, as shown in FIG. 63(c), in the situation where the pseudo-bonus state ST4 continues, as shown in FIG. game is repeated. The game from timing t5 to timing t6 is the last game in the pseudo-bonus state ST4. Since the transition condition to the AT state ST5 is satisfied in the pseudo-bonus state ST4, the gaming state changes from the pseudo-bonus state ST4 to the AT state ST5 at the timing t6 as shown in FIGS. 63(c) and 63(d). transition to In addition, since "2" is set in the output timing counter of the main RAM 74 at step S3206 of the external output setting process (FIG. 61) in the game, the output timing is set at step S3302 in the external output process (FIG. 62). Since the value of the counter is decremented by 1 and the value of the output timing counter after the decrement of 1 is "1", the first external signal OFF setting process (step S3304) is executed. Therefore, at the timing of t6, the state of the external output of the first external signal is switched from HI level to LOW level as shown in FIG. 63(g). In addition, since the ON setting process of the second external signal is executed in step S3207 of the external output setting process (FIG. 61) in the game, the second external signal is turned on at the timing t6 as shown in FIG. 63(h). The state of the external output is switched from LOW level to HI level.

After that, as shown in FIG. 63(a), at the timing of t7, the first game in the AT state ST5 started this time is started. In this case, a new set of the AT state ST5 is started at the timing t7 as shown in FIG. 63(e). After that, the first game ends at the timing t8 as shown in FIG. 63(a). In this case, the value of the output timing counter of the main side RAM 74 is "1" when the external output setting process (FIG. 61) is started at the end of the game. Therefore, in the external output processing (FIG. 62), the value of the output timing counter is decremented by 1 in step S3302, and the value of the output timing counter after the decrementation of 1 becomes "0". A setting process (step S3305) is executed, and a first external signal ON setting process (step S3306) is executed. Therefore, at timing t8, the state of the external output of the second external signal is switched from HI level to LOW level as shown in FIG. The state of the external output is switched from LOW level to HI level.

That is, when a transition from the pseudo-bonus state ST4 to the AT state ST5 occurs, first, at the end of the final game in the pseudo-bonus state ST4, the output state of the first external signal is switched from the previous HI level to the LOW level. At the same time, the output state of the second external signal is switched from LOW level to HI level. Then, when the first game in the AT state ST5 is started and the game is finished, the output state of the second external signal is switched from HI level to LOW level, and the output state of the first external signal is changed. The current LOW level is switched to HI level. The management computer of the game hall recognizes that the output period of the first external signal of HI level has occurred with the period of output of the second external signal of HI level interposed therebetween, thereby realizing a pseudo bonus in the slot machine 10. It becomes possible to specify that state ST4 has ended and AT state ST5 has newly started.

Also, the first external signal is maintained at the LOW level and the second external signal is maintained at the HI level from the end of the final game in the pseudo-bonus state ST4 to the end of the first game in the AT state ST5. As a result, the period during which the first external signal is maintained at the LOW level and the period during which the second external signal is maintained at the HI level can be made longer than the shortest period required to execute one game. Become. Therefore, it is possible to reduce the possibility that the management computer of the gaming hall misses the occurrence of the output period of the first external signal of HI level sandwiching the output period of the second external signal of HI level. becomes.

After that, as shown in FIG. 63(a), at the timing of t9, one set of the current final game in the AT state ST5 is started. Then, at the timing of t10, as shown in FIGS. 63(a) and 63(f), one set of the current final game ends. In this case, in the external output setting process (FIG. 62), the output timing counter of the main RAM 74 is set to "2" in step S3210. Since the value is decremented by 1 and the value of the output timing counter after the decrement of 1 is "1", the first external signal OFF setting process (step S3304) is executed. Therefore, at the timing of t10, the state of the external output of the first external signal is switched from HI level to LOW level as shown in FIG. 63(g).

Thereafter, as shown in FIGS. 63(a) and 63(e), at the timing of t11, the first game of the new set of AT state ST5 is started. After that, the first game ends at the timing t12 as shown in FIG. 63(a). In this case, the value of the output timing counter of the main side RAM 74 is "1" when the external output setting process (FIG. 61) is started at the end of the game. Therefore, in the external output processing (FIG. 62), the value of the output timing counter is decremented by 1 in step S3302, and the value of the output timing counter after the decrementation of 1 becomes "0". Setting processing (step S3306) is executed. Therefore, at the timing of t12, the state of the external output of the first external signal is switched from LOW level to HI level as shown in FIG. 63(g).

That is, when one set of the AT state ST5 is completed and a new set is started, the output state of the first external signal changes from the previous HI level to LOW at the end of the final game of the one set to be completed. level can be switched. In this case, the output state of the second external signal is maintained at LOW level. Then, when the first game of the new set is started in the AT state ST5 and the game ends, the output state of the first external signal is switched from LOW level to HI level. In the management computer of the gaming hall, while the second external signal is maintained at the LOW level, the first external signal is once switched from the HI level to the LOW level, and then switched again from the LOW level to the HI level. By grasping that the slot machine 10 has started a new set of the AT state ST5, it becomes possible to specify that the slot machine 10 has started a new set.

In addition, the first external signal is maintained at the LOW level from the end of the final game in the AT state ST5 to the end of the first game in the new set in the AT state ST5. This makes it possible to set the period during which the first external signal is maintained at the LOW level to a period equal to or longer than the shortest period required for executing one game. Therefore, when the second external signal is maintained at the LOW level, the first external signal is once switched from the HI level to the LOW level, and then switched from the LOW level to the HI level again. It is possible to reduce the possibility of being overlooked by the management computer.

After that, at the timing of t13 to the timing of t16, similarly to the timing of t9 to the timing of t12, when one set in the AT state ST5 ends and a new set in the AT state ST5 is started, the second With the second external signal maintained at the LOW level, the first external signal is once switched from the HI level to the LOW level and then switched from the LOW level to the HI level again.

After that, as shown in FIG. 63(a), at the timing of t17, one set of the current final game in the AT state ST5 is started. Then, at the timing of t18, the final game of the current set ends as shown in FIGS. 63(a) and 63(f). When the set ends, the number of remaining sets in the AT state ST5 is "0". Therefore, at the timing of t18, the AT state ST5 ends as shown in FIGS. 63(b) and 63(d), and the game state becomes the normal game state ST1. At the end of the AT state ST5, the external output end flag of the main RAM 74 is set to "1", so the first external signal OFF setting process (step S3309) is executed in the external output process (FIG. 62). . Therefore, at the timing of t18, the state of the external output of the first external signal is switched from HI level to LOW level as shown in FIG. 63(g). As a result, the management computer of the game hall can specify that one set of the AT state ST5 has been completed in the slot machine 10. FIG. Thereafter, as shown in FIG. 63(a), the first game in the normal game state ST1 is executed from timing t19 to timing t20.

According to this embodiment detailed above, the following excellent effects are obtained.

When the supply of operating power to the main MPU 72 is started in a configuration in which the main MPU 72 executes power failure processing based on the determination that the output level of the power failure signal has become LOW. , the process waits until it is confirmed that the output level of the power failure signal is HI level. As a result, it is possible to prevent the process from proceeding when the supply of operating power is started, even though the reception status of the power failure signal is not stable. Therefore, when the supply of operating power is started and the process is in progress, the output level of the power failure signal becomes LOW due to the unstable reception of the power failure signal. It is possible to prevent a state in which processing is not executed at the timing. Therefore, it is possible to suitably execute the processing when the supply of operating power is started.

In a configuration in which power failure processing is executed based on the fact that the output level of the power failure signal is LOW in the timer interrupt processing (FIG. 19), the supply of operating power is started. Before the execution of the timer interrupt process (FIG. 19) is permitted, the main process (FIG. 10) waits until it is confirmed that the output level of the power failure signal is HI level. This prevents the timer interrupt processing (FIG. 19) from specifying whether the output level of the power failure signal is LOW before the reception status of the power failure signal is stabilized. becomes possible.

In addition, in the state of waiting for the progress of the process in this way, it is confirmed whether or not the output level of the power failure signal has become HI level in the process in the state of waiting for the progress, and the output level of the power failure signal is checked. becomes HI level, the state of waiting for the progress of the process is released. As a result, even in a configuration in which the timer interrupt process (FIG. 19) is not executed while the progress of the process is on standby, it is possible to identify whether or not the reception status of the power failure signal has stabilized. It is possible to proceed with the processing under the condition that the reception condition of the signal is stable.

After the information abnormality flag 74g, which is a flag for specifying whether or not an information abnormality has occurred in the main side RAM 74, is set to "1" by the main side MPU 72, the information abnormality has occurred in the main side RAM 74. Abnormality grasping processing for executing various determinations as to whether or not there is an abnormality is executed. Then, when it is specified that an information abnormality has occurred in the main RAM 74 in the process for detecting the abnormality, the information abnormality flag 74g is kept set to "1". When it is specified that no information abnormality has occurred in the main RAM 74 in the processing of 1), the information abnormality flag 74g is cleared to "0". When the information abnormality flag 74g remains set to "1", the operation prohibition process is executed, and when the value of the information abnormality flag 74g is "0", the operation prohibition process is executed. A process for progressing the game is started. In this way, the information abnormality flag 74g is first set to "1" and then cleared to "0" when it is determined that no information abnormality has occurred in the main RAM 74. As a result, when various determinations as to whether or not an information abnormality has occurred in the main RAM 74 are not made due to the occurrence of electrical noise, although an information abnormality has actually occurred, operation is performed. Prohibited processing can be executed.

It is set that the power failure flag is not set to "1", that the checksum does not match, and that the set value is abnormal as the information abnormality of the main side RAM 74, and if any of these information abnormality occurs In the configuration in which the operation prohibition process is executed, the information abnormality flag 74g is set to "1" before the processing for determining whether or not each information abnormality has occurred, and none of the above information abnormalities has occurred. The information abnormality flag 74g is cleared to "0" based on the fact that it is specified that there is no such information. This makes it possible to reduce the required storage capacity compared to the configuration in which the information abnormality flag 74g is provided corresponding to each information abnormality.

In the configuration in which the setting change process (FIG. 15) is executed when the setting change operation is performed when the supply of operating power is started, even if the information abnormality flag 74g is set to "1", When a setting change operation is being performed, execution of the setting change process is prioritized over execution of the operation prohibition process. This makes it possible to give priority to the execution of the setting change process (FIG. 15) with respect to the occurrence of the setting change operation.

In the setting change process (FIG. 15), clearing process of the main RAM 74 is executed. When the clearing process is executed, the information abnormality flag 74g is also cleared to "0". As a result, even if the information abnormality flag 74g is set to "1" before the setting change process (FIG. 15) is executed, the information abnormality flag 74g is set to "1" after the setting change process (FIG. 15) is executed. ” is not set.

In a configuration in which the execution of the setting change process (FIG. 15) is prioritized even when the information error flag 74g is set to "1", the information error flag is set when the setting change process (FIG. 15) is executed. When the flag 74g is set to "1", the number of storage areas of the main RAM 74 to be cleared is greater than when the information abnormality flag 74g is not set to "1". More specifically, when the information abnormality flag 74g is not set to "1", part of the storage area of the main RAM 74 is not subject to the clear processing, whereas the information abnormality flag 74g is set to "1". 1” is set, all storage areas of the main RAM 74 are subject to the clear processing. As a result, when an information abnormality occurs in the main RAM 74, it is possible to carefully clear the main RAM 74 in the setting change process (FIG. 15).

Not only when the information abnormality flag 74g is set to "1", but also when the reset button 56 is turned on together with the setting change operation when the supply of operating power is started, all the memories in the main side RAM 74 The area becomes a target for execution of clear processing. As a result, when the supply of the operating power is started and the manager of the game hall not only performs the setting change operation but also presses the reset button 56, all storage areas of the main side RAM 74 are cleared. Processing can be performed.

In the setting change execution process (FIG. 18), the processes of steps S402 and S406 are executed to determine whether or not the pressing operation of the reset button 56 is started after the setting change execution process (FIG. 18) is started. By the time the determination process is started, an interrupt waiting period, which is a period for waiting for the progress of the process until the timer interrupt process (FIG. 19) is newly executed, occurs twice. By setting these interrupt standby periods, the supply of operating power to the main MPU 72 is started when the reset button 56 is pressed, and the setting is changed when the reset button 56 is kept pressed. Even if the execution process (FIG. 18) is started, after the setting change execution process (FIG. 18) is started and before the first determination process of whether or not the pressing operation of the reset button 56 is started, The contents of the information in the previous reset storage area 74i and the current reset storage area 74h indicate that the pressing operation of the reset button 56 is being continued. Therefore, in step S409, it is not determined that the reset button 56 has been pressed. As a result, when the supply of operating power is started while the reset button 56 is being pressed, the setting value to be selected is not changed by the pressing operation of the reset button 56 that is maintained. It becomes possible to

Whether or not the reset button 56 has been pressed is grasped in the sensor monitoring process (FIG. 20), and the grasped results of plural times are stored in the current reset storage area 74h and the previous reset storage area 74i. When the information stored in the current reset storage area 74h and previous reset storage area 74i corresponds to the start of operation of the reset button 56, the set value to be selected is changed. This makes it possible to update the setting value to be selected once for one press operation of the reset button 56 . In this case, before the first execution of the process for identifying whether or not the reset button 56 has been pressed in the setting change process (FIG. 15), each of the current reset storage area 74h and the previous reset storage area 74i By setting the information corresponding to the operation state of the reset button 56 by pressing the This is a configuration in which updating of the setting value to be selected is not executed. That is, the sensor monitoring process (FIG. 20) in the timer interrupt process (FIG. 19) is executed before the process for identifying whether or not the reset button 56 is pressed is first executed in the setting change process (FIG. 15). With a simple configuration that guarantees, when the setting change process (FIG. 15) is started in a situation where the pressing operation of the reset button 56 is continued, the setting value that is the target of selection by the pressing operation of the reset button 56 can be prevented from being updated.

When the setting change process (FIG. 15) is executed to change the setting value to be used, the setting change execution process (FIG. 18) is completed in a configuration in which the storage area of the main RAM 74 is cleared. In this case, the reset state information, which is neither the open information nor the closed information, is stored in the door state area 74e. As a result, when the front door 12 is in the open state after the setting change execution process (FIG. 18) is completed, the door open notification is started after the setting change notification is completed. Further, when the front door 12 is in the closed state when the setting change execution process (FIG. 18) is completed, the door closing notification is started after the setting change notification is finished. Therefore, when the setting change execution process (FIG. 18) is completed, either the door open notification or the door closed notification can be executed following the setting change notification. Therefore, it is possible to reliably notify either that the front door 12 is open or that the front door 12 is closed.

When the memory area of the main side RAM 74 is cleared in the setting change process (FIG. 15), the reset state information different from the closed information is set in the door state area 74e. As a result, even if the setting change process (FIG. 15) is illegally performed while the front door 12 is maintained in the closed state, the front door 12 is maintained in the closed state in this case. Even if the front door 12 is in the closed state by specifying that the front door 12 is in the closed state after the clearing process of the storage area of the main side RAM 74 is executed and the reset state information is set in the door state area 74e. An announcement is made. This makes it possible to deal with the fraudulent act.

Since the display corresponding to the bet number stored in the bet number setting counter 74a is performed on the bet display section 64, the player can grasp the bet number by checking the bet display section 64. FIG. In this case, after the rotation of all the reels 32L, 32M, and 32R has stopped in the final game in the pseudo-bonus state ST4 and before the second control process (FIG. 44) of the game section is executed, By executing the process (FIG. 57), the bet number information stored in the bet number setting counter 74a is erased. By erasing the bet number information of the bet number setting counter 74a, the bet display section 64 is turned off. As a result, it is possible to notify that the final game in the pseudo-bonus state ST4 has ended, and to perform the notification early when all the reels 32L, 32M, and 32R stop rotating in the final game. becomes possible.

Further, in the final game in the pseudo-bonus state ST4, before the bet number information of the bet number setting counter 74a is erased, the bet number information of the bet number setting counter 74a is stored in the bet number history counter 74f, and the game is played. In the second control process (FIG. 44) of the section, a process for updating the value of the total winning number counter 74d is executed using the bet number information stored in the bet number history counter 74f. As a result, after the reels 32L, 32M, and 32R all stop rotating, the reels 32L, 32M, and 32R are rotated as described above while the value of the total winning number counter 74d can be updated using the bet number information. When all the bets are stopped, the bet display section 64 can be turned off early.

Since a display corresponding to the number of given game media stored in the medium giving counter of the main RAM 74 is displayed on the dual-purpose display unit 66, the player can grasp the number of given game media by checking the dual-purpose display unit 66. It becomes possible to In this case, after the rotation of all the reels 32L, 32M, and 32R has stopped in the final game in the pseudo-bonus state ST4 and before the second control process (FIG. 44) of the game section is executed, By executing the processing (FIG. 57), the information on the number of pieces to be given stored in the medium giving counter is erased. By erasing the information on the number of mediums provided in the medium provision counter, the dual-purpose display section 66 is turned off. As a result, it is possible to notify that the final game in the pseudo-bonus state ST4 has ended, and to perform the notification early when all the reels 32L, 32M, and 32R stop rotating in the final game. becomes possible.

In addition, in the final game in the pseudo-bonus state ST4, before the information on the number of awards of the medium award counter is erased, the information on the number of awards of the medium award counter is stored in the award number history counter of the main side RAM 74, and the game interval. In the second control process (FIG. 44), a process for updating the value of the total acquisition number counter 74d is executed using the information on the number of grants stored in the history counter of the number of grants. As a result, after the reels 32L, 32M, and 32R all stop rotating, the value of the total acquisition number counter 74d can be updated by using the information on the awarded number, while the reels 32L, 32M, and 32R rotate as described above. When all of the lights are stopped, the dual-use display section 66 can be turned off early.

In the direct hit lottery process (step S2208), when a transition to the pseudo-bonus state ST4 occurs without direct hit winning, the reels 32L and 32M are frozen during the first game in the pseudo-bonus state ST4. , 32R to start rotating. This makes it possible for the player to clearly recognize that the pseudo-bonus state ST4 has started. Also, when a direct hit lottery process (step S2208) results in a direct hit lottery, a freeze period occurs in the game, and the start of rotation of the reels 32L, 32M, and 32R is awaited. This makes it possible for the player to clearly recognize that the direct hit lottery process (step S2208) has resulted in the determination of the transition to the pseudo-bonus state ST4. In this case, when a direct hit lottery process (step S2208) results in a direct hit lottery, the freeze period is set in the game, whereas the freeze period is not set in the first game in the pseudo-bonus state ST4. . This makes it possible to prevent the freeze period from being repeated in a short period of time.

A number-of-games mode to be executed among the first to fifth number-of-games modes is determined by lottery. The probabilities of selection by lottery for the first to fifth number-of-games modes may differ for each type of number-of-games mode and may also differ depending on the set values to be used. In this case, in the number-of-games mode lottery table 112, the number of judgment values LV corresponding to the product of the number of types of number-of-games modes that can be selected by lottery and the number of types of setting values that can be set as targets for use is set. ing. As a result, the number-of-games mode lottery table 112 can be used in common for all combinations of number-of-games modes that can be used as lottery targets and set values that can be used. In addition, since the determination value LV for the number of types of set values is set for any number of games mode that can be the lottery target, the game number mode set for the lottery and the set value to be used It is possible to standardize the processing when reading the determination value LV corresponding to the combination of from the number-of-games mode lottery table 112 .

Even if the fifth number-of-games mode does not result in winning depending on the type of set value to be used, the number-of-games mode lottery table 112 contains numerical information corresponding to non-winning as the determination value LV corresponding to the combination. is set to "0". As a result, even in the fifth number-of-games mode in which there is a set value that is certain to result in non-winning, there will be a number of determination values LV corresponding to the number of types of set values. Therefore, the determination value LV is set in a number corresponding to the number of types of setting values in any number-of-games mode that can be the lottery target. It is possible to standardize the processing when reading out the determination value LV corresponding to the combination of setting values from the number-of-games mode lottery table 112 .

In the number-of-games mode lottery table 112, the determination value LV of the number corresponding to the number of types of set values corresponding to one type of number-of-games mode is the serial number of the address information D(0) to D(24) on the data. is set to As a result, in the number-of-games mode lottery table 112, a number of determination values LV corresponding to the number of types of set values are collectively set for each type of number-of-games mode. It becomes easy to acquire the determination value LV corresponding to the set value set as the target of use among the determination values LV corresponding to the modes.

The order of the address information D(0) to D(24) on the data corresponds to the judgment value LV of the number corresponding to the number of types of set values aggregated for each type of the game number mode in the game number mode lottery table 112. There is a certain order according to the type of setting value to be used. As a result, the address information D(0) to D on the data in which the determination value LV corresponding to the set value to be used among the determination values LV corresponding to the number-of-games mode to be used for the lottery is set is set. The order of (24) is uniquely determined according to the type of setting value. Therefore, it becomes easier to obtain the determination value LV corresponding to the setting value to be used among the determination values LV corresponding to the number-of-games mode to be selected by lottery.

Numerical information corresponding to the order of arrangement in the number-of-games mode lottery table 112 of the number-of-games mode for which the lottery is to be used, and numerical information corresponding to the order of arrangement in the number-of-games mode lottery table 112 of the currently used set values. By executing the arithmetic processing (step S2503 in the LV acquisition processing (FIG. 52)) for deriving the address using Address information D(0) to D(24) on the data in which the determination value LV corresponding to the combination of setting values is set is acquired. This makes it possible to reduce the processing load when acquiring the determination value LV corresponding to the combination of the number-of-games mode to be selected and the set value to be used.

In a configuration in which the second random number of 2 bytes is updated by the second random number circuit 76 each time an update trigger occurs, the AT transition lottery process (step S2403) at the start is executed using the second random number of 2 bytes. a case where lottery processing in the number-of-games mode (steps S2407 to S2413) is executed using a 1-byte random number that is a bit number smaller than 2 bytes in the second random number; There is a case where the lottery process (steps S2417 to S2423) in the winning rate mode is executed using a 7-bit random number, which is a bit number smaller than 2 bytes among the 2 random numbers. This makes it possible to increase the number of lottery processes while suppressing an increase in the number of random number circuits.

In a configuration in which the second random number of 2 bytes is read from the latch area 111 when the AT transition lottery process (step S2403) at the start is executed using the second random number of 2 bytes, the second random number is Even when lottery processing is executed using the used 1-byte random number or 7-bit random number, the 2-byte second random number is read from the latch area 111, and the 1-byte random number is read from the read second random number. Or derive a 7-bit random number. This makes it possible to derive random numbers having different data capacities while using a common configuration for reading random numbers from the second random number circuit 76 .

When acquiring a 7-bit random number, first, the second random number is stored in the latch area 111 based on the latch signal being transmitted from the main MPU 72 to the second random number circuit 76 . After that, the random number of the upper byte stored in the upper area 111 a of the latch area 111 is obtained in the register of the main MPU 72 . Then, the most significant bit of the random number in the high-order byte is cleared to "0". This makes it possible to acquire a 7-bit random number using the 2-byte second random number latched in the second random number circuit 76, and simplify the processing configuration for acquiring the 7-bit random number. It becomes possible to make it a thing.

Even when a 7-bit random number is used, the random number is treated as 1-byte data. As a result, even if a 7-bit random number is used, it can be handled as data in units of bytes.

A latch signal is transmitted so that the second random number is latched in the second random number circuit 76 in step S2401, and a latch signal is transmitted so that the second random number is latched in the second random number circuit 76 in step S2406. be done. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and this update cycle is 0.1 nanoseconds. During the period from the execution of the process of step S2401 to the execution of the process of step S2406, the second random number updated every 0.1 nanoseconds as described above has one cycle in the numerical range of 0 to 65535. It is longer than the period required to complete the process. Further, the period from the execution of the process of step S2401 to the execution of the process of step S2406 is within a predetermined period range when the process of step S2405 is executed and when the process of step S2405 is not executed. This variation is large in relation to the update cycle of the second random number. Therefore, even if the latch signal is transmitted to the second random number circuit 76 in each of steps S2401 and S2406 in one processing cycle of the second start setting processing (FIG. 50), the transmission of the latch signal in step S2401 causes the latch signal to be latched. No regularity occurs between the second random numbers stored in the area 111 and the second random numbers stored in the latch area 111 due to the transmission of the latch signal in step S2406.

A latch signal is transmitted so that the second random number is latched in the second random number circuit 76 in step S2406, and a latch signal is transmitted so that the second random number is latched in the second random number circuit 76 in step S2415. be done. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and this update cycle is 0.1 nanoseconds. During the period from the execution of the process of step S2406 to the execution of the process of step S2415, the second random number updated every 0.1 nanoseconds as described above has one cycle in the numerical range of 0 to 65535. It is longer than the period required to complete the process. Also, the period from the execution of the process of step S2406 to the execution of the process of step S2415 fluctuates within a predetermined period range, and this fluctuation is large in relation to the second random number update cycle. is. Therefore, even if a latch signal is transmitted to the second random number circuit 76 in each of steps S2406 and S2415 in one processing cycle of the second start setting processing (FIG. 50), the transmission of the latch signal in step S2406 causes the latch signal to be latched. There is no regularity between the second random numbers stored in the area 111 and the second random numbers stored in the latch area 111 due to the transmission of the latch signal in step S2415.

When the pseudo-bonus state ST4 transitions to the AT state ST5, or when the AT state ST5 continues to be set, the external output of the first external signal is temporarily stopped and then the external output of the first external signal is restarted. , the output timing counter of the main side RAM 74 is first set to "2", and then when the output level of the first external signal becomes LOW level, the value of the output timing counter is subtracted by 1, and the value of the output timing counter is is "1", the output level of the first external signal is set to the HI level after the value of the output timing counter is decremented by one. As a result, by only sequentially updating the value of the output timing counter, it is possible to restart the external output of the first external signal after temporarily stopping the external output of the first external signal. Therefore, it is possible to suitably perform processing for externally outputting the first external signal.

When the pseudo-bonus state ST4 is started, the output level of the first external signal is set to HI level under the condition that the output level of the first external signal is LOW level. In this case, "1" is set in the output timing counter of the main side RAM 74, and when the value of the output timing counter is "1", the value of the output timing counter is decremented by 1 as described above, and then the first The output level of the external signal is set to HI level. As a result, when the output level of the first external signal is once set to LOW level by using the output timing counter, and then when the output level of the first external signal is set to HI level again, and when the output level of the first external signal is simply set to HI level, the output control of the first external signal can be performed.

When the value of the output timing counter of the main RAM 74 is "0", the output level of the first external signal is not changed based on the value of the output timing counter. This makes it possible to create a situation in which the output level of the first external signal is not changed based on the value of the output timing counter.

When the game state is the CB state, the value of the determination value counter 74j is set to "1", and when the game state is the non-CB state and the CB winning data is stored in the main side RAM 74, the determination value is set. "2" is added to the value of the counter 74j. In addition, when the gaming state is the non-CB state, if the number of bets in the game is "2", "2" is added to the value of the judgment value counter 74j, and if the number of bets in the game is "3", judgment is made. "3" is added to the value of the value counter 74j. Therefore, when the game state is the CB state, the value of the determination value counter 74j becomes "1", and when the game state is the non-internal 2-bet state, the value of the determination value counter 74j becomes "2". When the game state is the non-internal 3-bet state, the value of the determination value counter 74j becomes "3", and when the game state is the internal 2-bet state, the value of the determination value counter 74j When the value is "4" and the game state is the internal three bet state, the value of the determination value counter 74j is "5". As a result, by confirming the value of the determination value counter 74j, the current game state can be changed to the CB state, non-internal 2-card bet state, non-internal 3-card bet state, internal 2-bet state, and internal 2-card bet state. It is possible to specify which of the 3 bet states in the middle.

When the gaming state is the CB state, the determination value counter 74j is set to "1", but the value corresponding to the number of bets is not added to the determination value counter 74j. As a result, in a configuration in which the number of bets does not affect the contents of the winning lottery process (FIG. 34) in the CB state, there will be a plurality of values of the determination value counter 74j for this situation. It is possible to prevent

In a configuration where the type of index value IV with a point value PV set to be 1 or more can vary depending on the game state, instead of varying the numerical range of the index value IV according to each game state, the index value A type of index value IV in which a point value PV equal to or greater than 1 is set in the fixed range while setting the IV to a fixed range and setting the same type of winning data associated with each index value IV. are different. As a result, the data format is simplified because it is not necessary to change the numerical range of the index value IV for each game state or to change the correspondence relationship between the index value IV and winning data for each game state. becomes possible.

Data groups 101a to 101q for IV=1 to 17 are provided in one-to-one correspondence with index values IV=1 to 17, respectively. Data for obtaining the point value PV (including "0") in the game state is set. As a result, there is no need to prepare a separate lottery table for each game state, so the data structure can be simplified.

A determination value corresponding to each game state is calculated, and bits set to "1" in the game state data 102a to 104a set in the data groups 101a to 101q for IV=1 to 17 and their determination values are If so, the point value PV corresponding to the bit set to "1" is obtained from the point value data 102c-104c of the IV=1-17 data groups 101a-101q. As a result, even if the data groups 101a to 101q for IV=1 to 17 are set so as to be common to each game state, it is possible to acquire the point value PV corresponding to each game state. becomes.

A determination value corresponding to each game state is calculated, and bits set to "0" in the game state data 102a to 104a set in the data groups 101a to 101q for IV=1 to 17 and their determination values are If it corresponds, the point value PV of "0", which is the numerical information corresponding to non-winning, is not set in the point value data 102c to 104c of the data groups 101a to 101q for IV=1 to 17, and in the process derived separately. As a result, it is not necessary to set numerical information corresponding to non-winning in the point value data 102c to 104c, so that the data capacity of the data groups 101a to 101q for IV=1 to 17 can be suppressed.

<Second embodiment>
This embodiment differs from the above-described first embodiment in the hardware configuration of the main MPU 72 and the manner in which processing is executed. The configuration different from that of the first embodiment will be described below. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 64 is an explanatory diagram for explaining the electrical configuration of the main MPU 72. As shown in FIG.

The main MPU 72 is provided with a jump status flag 121 , a CLR execution circuit 122 and a DEC execution circuit 123 . When the CLR execution circuit 122 clears a predetermined storage area to "0", the jump status flag 121 mainly indicates whether or not the information in the predetermined storage area was "0" before being cleared to "0". It is referred to when specifying when executing processing by the program of the side MPU 72 . The jump status flag 121, when the value of a specific storage area is decremented by 1 in the DEC execution circuit 123, determines whether or not the information in the specific storage area after the subtraction of 1 is "0". It is referred to when specifying when executing processing by the program of the MPU 72 .

The CLR execution circuit 122 is a dedicated circuit for clearing a predetermined storage area to "0". The predetermined storage area is not a fixed area, but is appropriately changed according to the contents of processing executed by the program of the main MPU 72 . FIGS. 65(a) and 65(b) are explanatory diagrams for explaining the state of the jump status flag 121 when the CLR execution circuit 122 clears the predetermined storage area to "0". When the CLR execution circuit 122 clears the predetermined storage area to "0", first, the information of the predetermined storage area is provided in the CLR execution circuit 122 as shown in FIGS. 65(a1) and 65(b1). It is stored in the CLR pre-storage buffer 122a. The pre-CLR storage buffer 122a has a data capacity of 1 byte. Also, although the area that can be the predetermined storage area has a data capacity of 8 bits or less, it also includes a flag with a data capacity of 1 bit. If the 1-bit data capacity flag is a predetermined storage area, the information of the flag is stored in the least significant bit of the pre-CLR storage buffer 122a.

Each bit of the CLR pre-storage buffer 122a is connected to a NOR circuit 122b, and the information stored in each bit is logically operated by NOR in the NOR circuit 122b. Then, the calculation result is stored in the jump status flag 121 . Specifically, when the information in the predetermined storage area before the "0" clear is executed is all "0" as shown in FIG. "1" is stored in the jump status flag 121 at . If the information in the predetermined storage area before the "0" clear is executed is "00000001" as shown in FIG. 121 stores "0".

The information stored in the pre-CLR storage buffer 122a is cleared to "0" by the CLR execution circuit 122, and the result is overwritten in a predetermined storage area as shown in FIGS. 65(a2) and 65(b2). As a result, the predetermined storage area is cleared to "0". If the predetermined storage area is a 1-bit data capacity flag, the 1-bit flag is cleared to "0".

The DEC execution circuit 123 is a dedicated circuit for subtracting 1 from the value of a specific storage area. The specific storage area is not a fixed area, but is appropriately changed according to the contents of the processing executed by the program of the main MPU 72 . 66(a) and 66(b) are explanatory diagrams for explaining the state of the jump status flag 121 when the DEC execution circuit 123 decrements the value of a specific storage area by one. When the DEC execution circuit 123 decrements the value of the specific storage area by 1, first, the information of the specific storage area is provided to the DEC execution circuit 123 as shown in FIGS. It is stored in the DEC pre-storage buffer 123a. The pre-DEC storage buffer 123a has a data capacity of 1 byte. Also, an area that can be a specific storage area has a data capacity of 8 bits or less.

The DEC execution circuit 123 subtracts 1 from the information stored in the pre-DEC storage buffer 123a. The result after subtracting 1 is stored in the post-DEC storage buffer 123b provided in the DEC execution circuit 123 as shown in FIGS. 66(a2) and 66(b2). The post-DEC storage buffer 123b has a data capacity of 1 byte. The information stored in the post-DEC storage buffer 123b is overwritten in a specific storage area.

Each bit of the post-DEC storage buffer 123b is connected to an OR circuit 123c, and the information stored in each bit is logically ORed by the OR circuit 123c. Then, the calculation result is stored in the jump status flag 121 . Specifically, if the information in the specific storage area before the subtraction of 1 is "00000010" as shown in FIG. becomes. In this case, "1" is stored in the jump status flag 121 by executing the OR logic operation. If the information in the specific storage area before the subtraction of 1 is "00000001" as shown in FIG. 66(b1), it becomes "00000000" after the subtraction of 1 as shown in FIG. 66(b2). In this case, "0" is stored in the jump status flag 121 by executing the OR logic operation.

The main MPU 72 basically executes various instructions according to the program according to the order determined by the program address when executing the processing according to the program. However, when a JP instruction is set by a program, if the conditions specified by the JP instruction are satisfied, the JP Executes the instruction at the program address advanced by the delta specified in the instruction. In the slot machine 10, a JR instruction and a JRS instruction are set as the JP instruction.

FIG. 67(a) is an explanatory diagram for explaining the data structure of the JR instruction. As shown in FIG. 67(a), the JR instruction has a data capacity of 2 bytes. In the high-order 1 byte of the 2-byte data, condition data is set that defines the condition for jumping the program address to the program address advanced by the difference determined in the JR instruction instead of the next program address. ing. The lower 1 byte of the 2-byte data is set with address data that defines the difference of the program address when the program address is jumped.

FIG. 67(b) is an explanatory diagram for explaining the data structure of the JRS instruction. As shown in FIG. 67(b), the JRS instruction has a data capacity of 1 byte. In the upper 5 bits of the 1-byte data, condition data is set that defines the condition for jumping the program address not to the next program address but to the program address advanced by the difference specified in the JRS instruction. there is In the lower 3 bits of the 1-byte data, address data that defines the difference of the program address when jumping the program address is set.

Since the JR instruction and the JRS instruction are set as described above, the use of the JRS instruction with a relatively small data capacity as the JP instruction is better than the use of the JR instruction with a relatively large data capacity. It is also possible to compress the program capacity. However, the JRS instruction has smaller condition data and address data than the JR instruction.

In the case of the JR instruction, since the data capacity of 1 byte is set as the condition data, a complicated condition can be defined as the condition for jumping. Therefore, complex conditions cannot be defined as conditions for jumping. In this case, the condition data of the JRS instruction includes data indicating that a jump is to be executed if the jump status flag 121 with a 1-bit data capacity is "0", or data indicating that a jump is executed if the jump status flag 121 with a 1-bit data capacity is "1". Data is set to execute a jump if

Since a data capacity of 1 byte is set as the address data for the JR instruction, the range of 0 to 255 is defined as the program address difference for jumping. On the other hand, in the JRS instruction, the address data has a data capacity of 3 bits.

Since the JR instruction and the JRS instruction are set as the JP instruction as described above, when it is necessary to define a complex condition as a condition for jumping, or when the difference in the program address for jumping is 8 or more If the condition for jumping is a condition corresponding to the binary value of the jump status flag 121 and the difference in the program address for jumping is 7 or less, the JR instruction is used. are using. This makes it possible to compress the program capacity while ensuring that the program can be executed appropriately.

FIG. 68 is an explanatory diagram for explaining an example of the contents of a program in which both JR and JRS instructions are executed as JP instructions. In this example, the external output setting process (FIG. 61) in the first embodiment is constructed using the jump status flag 121, the CLR execution circuit 122, the DEC execution circuit 123, the JR instruction and the JRS instruction. It is the content of the program.

As shown in FIG. 68, "1001" to "1027" are set as program addresses in this program. The instruction "CLR (SK1FG), 0" is set at the program address "1001". "CLR" is a "0" clear instruction by the CLR execution circuit 122, and "SK1FG" is the first output start flag of the main RAM 74 in the first embodiment. Therefore, the instruction "CLR (SK1FG), 0" is an instruction to clear the first output start flag to "0" by the CLR execution circuit 122. FIG.

The instruction "JRS (JPSFG)=1, 2" is set at the program address of "1002". "JRS" is a JRS instruction. “JPSFG” is the jump status flag 121 . Therefore, the instruction "JRS (JPSFG) = 1, 2" will change the program address if the value of the jump status flag 121 is "1" as a result of the instruction with the most recent program address (specifically, "1001"). This is an instruction to jump to "1004" obtained by adding "2" to "1002", and to proceed to the next program address "1003" if the value of the jump status flag 121 is "0". That is, if the value of the first output start flag is "0" before the CLR instruction at the program address "1001" is executed, the instruction at the program address "1003" is not executed and the instruction at the program address "1004" is executed. ”, and if the value of the first output start flag is “1” before the CLR instruction at the program address “1001” is executed, proceed to the program address “1003”. becomes.

An instruction "SET (STC), 1" is set at the program address "1003". "STC" is the output timing counter of the main RAM 74 in the first embodiment. Therefore, the instruction "SET (STC), 1" is an instruction to set the output timing counter to "1".

"SECP1" is set to the program address of "1004". This is not an instruction, but data that is referred to when the developer of the slot machine 10 checks the program. Therefore, when going to the program address of "1004", the program goes to the program address of "1005" without executing any instructions.

The instruction "CLR (SK2FG), 0" is set at the program address "1005". "SK2FG" is the second output start flag of the main RAM 74 in the first embodiment. Therefore, the instruction “CLR (SK2FG), 0” is an instruction to clear the second output start flag to “0” by the CLR execution circuit 122 .

The instruction "JRS (JPSFG)=1, 3" is set at the program address of "1006". If the value of the jump status flag 121 is "1" as a result of the instruction by the most recent program address (specifically "1005"), this instruction sets the program address to "1009" by adding "3" to "1006". ”, and if the value of the jump status flag 121 is “0”, proceed to the next program address “1007”. That is, if the value of the second output start flag is '0' before the CLR instruction at program address '1005' is executed, the instructions at program addresses '1007' and '1008' are executed. If the second output start flag value is "1" before the CLR instruction at the program address "1005" is executed, the program "1007" is jumped to. Go to the address.

The instruction "SET (STC), 2" is set at the program address "1007". This instruction is an instruction to set the output timing counter to "2". A command of "CALL ONSET2" is set at the program address of "1008". "ONSET2" is ON setting processing (step S3207) of the second external signal in the external output setting processing (FIG. 61) in the first embodiment. Therefore, the command "CALL ONSET2" is a command to read out a subroutine called ON setting processing of the second external signal (step S3207). When the subroutine of ON setting processing of the second external signal (step S3207) is finished, the process proceeds to the program address of "1009".

"SECP2" is set to the program address of "1009". This is not an instruction, but data that is referred to by the developer of the slot machine 10 when verifying the program. Therefore, when going to the program address of "1009", the program goes to the program address of "1010" without executing any instructions.

An instruction "CLR (SK3FG), 0" is set at a program address of "1010". "SK3FG" is the third output start flag of the main RAM 74 in the first embodiment. Therefore, the instruction "CLR (SK3FG), 0" is an instruction to clear the third output start flag to "0" by the CLR execution circuit 122. FIG.

The instruction "JRS (JPSFG)=1, 2" is set at the program address of "1011". If the value of the jump status flag 121 is "1" as a result of the instruction by the most recent program address (specifically "1010"), this instruction sets the program address to "1013" by adding "2" to "1011". ”, and if the value of the jump status flag 121 is “0”, proceed to the next program address “1012”. That is, if the value of the third output start flag is "0" before the CLR instruction at the program address "1010" is executed, the instruction at the program address "1012" is not executed and the instruction at the program address "1013" is executed. ', and if the value of the third output start flag is '1' before the CLR instruction at program address '1010' is executed, proceed to program address '1012'. becomes. The command "SET (STC), 2" is set at the program address "1012". This instruction is an instruction to set the output timing counter to "2".

"SECP3" is set to the program address of "1013". This is not an instruction, but data that is referred to by the developer of the slot machine 10 when verifying the program. Therefore, when going to a program address of "1013", the program goes to a program address of "1014" without executing any instructions.

The instruction "JR (STC)=0, 9" is set at the program address of "1014". This instruction causes the program address to jump to "1023" by adding "9" to "1014" if the value of the output timing counter of the main RAM 74 is "0", and if the value of the output timing counter is "0", This is an instruction to proceed to the next program address "1015" if there is no program address. In this JP instruction, the condition data is not conditional data corresponding to the value of the jump status flag 121, and the difference in program addresses is 8 or more, so the JR instruction is used instead of the JRS instruction.

A command "DEC (STC)" is set at the program address "1015". "DEC" is a command for subtracting 1 by the DEC execution circuit 123, and "STC" is the output timing counter of the main side RAM 74 as already explained. Therefore, the instruction "DEC (STC)" is an instruction to cause the DEC execution circuit 123 to subtract 1 from the value of the output timing counter.

The instruction "JRS (JPSFG)=0, 3" is set at the program address of "1016". If the value of the jump status flag 121 is "0" as a result of the instruction by the most recent program address (specifically "1015"), this instruction sets the program address to "1019" by adding "3" to "1016". ”, and if the value of the jump status flag 121 is “1”, proceed to the next program address “1017”. In other words, if the value of the output timing counter is "0" after the DEC instruction at the program address "1015" is executed, the instructions at the program addresses "1017" and "1018" are not executed. After jumping to the program address of "1019" and executing the DEC instruction at the program address of "1015", if the value of the output timing counter is "1", the process proceeds to the program address of "1017". .

The command "CALL OFFSET1" is set at the program address "1017". "OFFSET1" is the first external signal OFF setting process (step S3304) in the external output process (FIG. 62) in the first embodiment. Therefore, the command "CALL OFFSET1" is a command to read out a subroutine called OFF setting processing of the first external signal (step S3304). When the subroutine of the first external signal OFF setting process (step S3304) has ended, the process proceeds to the program address "1018".

The instruction "RET" is set at the program address "1018". In the first embodiment, the external output setting process (FIG. 61) is a subroutine executed in step S913 of the normal process (FIG. 25). Therefore, by executing the command "RET", the process proceeds to step S914 of the normal process (FIG. 25).

"SECP4" is set to the program address of "1019". This is not an instruction, but data that is referred to by the developer of the slot machine 10 when verifying the program. Therefore, when going to a program address of "1019", it goes to a program address of "1020" without executing any instructions.

A command of "CALL OFFSET2" is set at the program address of "1020". "OFFSET2" is the second external signal OFF setting process (step S3305) in the external output process (FIG. 62) in the first embodiment. Therefore, the instruction "CALL OFFSET2" is an instruction to read out a subroutine called OFF setting processing of the second external signal (step S3305). When the subroutine of the second external signal OFF setting process (step S3305) has ended, the process proceeds to the program address "1021".

The instruction "CALL ONSET1" is set at the program address "1021". "ONSET1" is ON setting processing (step S3306) of the first external signal in the processing for external output (FIG. 62) in the first embodiment. Therefore, the command "CALL ONSET1" is a command to read out a subroutine called ON setting processing of the first external signal (step S3306). When the subroutine of ON setting processing of the first external signal (step S3306) is finished, the process proceeds to the program address of "1022".

The instruction "RET" is set at the program address "1022". In the first embodiment, the external output setting process (FIG. 61) is a subroutine executed in step S913 of the normal process (FIG. 25). Therefore, by executing the command "RET", the process proceeds to step S914 of the normal process (FIG. 25).

"SECP5" is set to the program address of "1023". This is not an instruction, but data that is referred to when the developer of the slot machine 10 checks the program. Therefore, when going to a program address of "1023", it goes to a program address of "1024" without executing any instructions.

An instruction "CLR (GSSFG), 0" is set at a program address of "1024". "GSSFG" is the external output end flag of the main RAM 74 in the first embodiment. Therefore, the instruction "CLR (GSSFG), 0" is an instruction to clear the external output end flag to "0" by the CLR execution circuit 122. FIG.

The instruction "JRS (JPSFG)=1, 2" is set at the program address of "1025". If the value of the jump status flag 121 is "1" as a result of the instruction by the most recent program address (specifically "1024"), this instruction sets the program address to "1025" plus "2". ”, and if the value of the jump status flag 121 is “0”, proceed to the next program address “1026”. That is, if the value of the external output end flag is "0" before the CLR instruction at the program address "1024" is executed, the instruction at the program address "1026" is not executed and the instruction at the program address "1027" is executed. , and if the value of the external output end flag is "1" before the CLR instruction at the program address "1024" is executed, the process advances to the program address "1026". .

The command "CALL OFFSET1" is set at the program address "1026". "OFFSET1" is the first external signal OFF setting process (step S3309) in the external output process (FIG. 62) in the first embodiment. Therefore, the instruction "CALL OFFSET1" is an instruction to read out a subroutine called OFF setting processing of the first external signal (step S3309). When the subroutine of the first external signal OFF setting process (step S3309) has ended, the process proceeds to the program address "1027".

The instruction "RET" is set at the program address "1027". In the first embodiment, the external output setting process (FIG. 61) is a subroutine executed in step S913 of the normal process (FIG. 25). Therefore, by executing the command "RET", the process proceeds to step S914 of the normal process (FIG. 25).

According to this embodiment detailed above, the following excellent effects are obtained.

When any one of the first output start flag, the second output start flag, the third output start flag, and the external output end flag of the main RAM 74 is cleared to "0" by the CLR execution circuit 122, the "0" clear is If the target flag value is "0" before execution, the jump status flag 121 is set to "1", and the target flag value is set before the "0" clear is executed. is "1", the value of the jump status flag 121 becomes "0". Different processing is executed depending on whether the value of the jump status flag 121 is "1" or "0". As a result, when the target flag is cleared to "0" in the CLR execution circuit 122, which is a dedicated circuit, the value set in the target flag before the "0" clear is executed corresponds to the value set in the target flag. A value to be set is automatically set in the jump status flag 121, and processing corresponding to the value set in the jump status flag 121 can be executed. As a result, while reducing the processing load using the program, the target flag is cleared to "0" and the processing corresponding to the value set in the flag before the "0" clear is executed. It becomes possible to

When the value of the output timing counter of the main RAM 74 is decremented by 1 by the DEC execution circuit 123, if the value of the output timing counter after the decrement of 1 is other than "0", the jump status flag 121 When "1" is set and the value of the output timing counter after the subtraction of 1 is "0", the value of the jump status flag 121 becomes "0". Different processing is executed depending on whether the value of the jump status flag 121 is "1" or "0". Thus, when the value of the output timing counter is decremented by 1 in the DEC execution circuit 123, which is a dedicated circuit, the value corresponding to the value of the output timing counter after decrementing by 1 is automatically set in the jump status flag 121. , the process corresponding to the value set in the jump status flag 121 can be executed. As a result, it is possible to execute processing for subtracting 1 from the value of the output timing counter and processing corresponding to the value of the output timing counter after decrementing by 1, while reducing the processing load using the program.

In the configuration where the CLR execution circuit 122 can clear "0" and the DEC execution circuit 123 can subtract "1" as described above, by setting the CLR instruction in the program, the CLR execution circuit 122 can clear "0" and It is possible to set a value to the jump status flag 121, and by setting a DEC instruction, the DEC execution circuit 123 can subtract 1 and set a value to the jump status flag 121. FIG. As a result, it is possible to obtain the excellent effects as described above while reducing the program capacity.

A JR instruction with a relatively large data capacity and a JRS instruction with a relatively small data capacity are set as jump instructions. This makes it possible to reduce the program capacity by selectively using the JR instruction and the JRS instruction as required.

The JRS instruction has a narrower address range than the JR instruction, which allows jumping when the jump condition is satisfied, but has a smaller data capacity than the JR instruction. Therefore, by using the JRS instruction when the address range to be jumped is narrow and by using the JR instruction when the address range to be jumped is wide, the program capacity can be reduced while the jump instruction can be appropriately executed. becomes possible.

The JRS instruction has a smaller data capacity of condition data for setting a jump condition than the JR instruction, but has a smaller data capacity than the JR instruction. Therefore, by using the JRS instruction when the jump condition is simple, and by using the JR instruction when the jump condition is complicated, it is possible to reduce the program capacity while appropriately executing the jump instruction. becomes.

The dedicated circuits provided in the main MPU 72 for changing numerical information in a predetermined manner are limited to the CLR execution circuit 122 for clearing "0" and the DEC execution circuit 123 for subtracting 1. Instead, for example, a circuit for adding 1 or a circuit for inverting numerical information may be used. Even with these circuits, different information is set in the jump status flag 121 depending on whether the numerical information before or after the change by the circuit is the predetermined target numerical information and when it is not the predetermined target numerical information. It is preferable to have a configuration that

Also, although the JRS instruction has a smaller data capacity for both the condition data and the address data than the JR instruction, it is not limited to this, and the data capacity for the condition data is the same for the JR instruction and the JRS instruction. Although they are the same, the JRS instruction may have a smaller data capacity of the address data than the JR instruction. may be smaller than the JR instruction.

Also, the JRS instruction is not limited to the configuration in which data related to the value of the jump status flag 121 is set as the condition data, and the condition data unrelated to the jump status flag 121 is the condition data of the JRS instruction. It may be configured as follows.

<Third Embodiment>
In this embodiment, a part of the processing configuration of the main MPU 72 is different from that of the first embodiment. The configuration different from that of the first embodiment will be described below. The description of the same configuration as that of the first embodiment is basically omitted.

69(a) to 69(c) are explanatory diagrams for explaining the stack area 125 provided in the main RAM 74. FIG.

While the main MPU 72 is executing a predetermined process using a program, the process to be executed may shift to a subroutine process due to a CALL instruction or the like. In this case, when the processing of the subroutine is completed, it returns to the predetermined processing. be evacuated. At the time of saving, the return address information on the program is saved in the stack area 125 of the main RAM 74 .

When writing information to the stack area 125 , the main MPU 72 executes a PUSH instruction, and when reading information from the stack area 125 , the main MPU 72 executes a POP instruction. Further, when reading information from the stack area 125, the information written later in the stack area 125 is read first.

Specifically, as shown in FIGS. 69(a) to 69(c), the stack area 125 is a unit storage area capable of storing target return address information when a PUSH instruction is executed. 125a are set. Storage area addresses are set in a one-to-one correspondence with the plurality of unit storage areas 125a, and the storage area addresses are set to be serial numbers. A reference pointer for storing storage area address information is set in a dedicated register of the main MPU 72, and when a PUSH instruction is executed, the value stored in the reference pointer is incremented by 1, and the 1 is added to the value stored in the reference pointer. Return address information is stored in the unit storage area 125a corresponding to the storage area address of the value obtained. On the other hand, when executing the POP instruction, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value stored in the reference pointer, and the processing corresponding to the read return address information is performed. do. Also, when the return address information is read, the value of the reference pointer is decremented by one.

Specifically, as shown in FIG. 69(a), when return address information is stored in each unit storage area 125a up to the storage area address of "k", the reference pointer is set to "k". information is stored. In this situation, when the PUSH instruction is executed by the main MPU 72, the value of the reference pointer is first incremented by 1, so that the information of the reference pointer becomes "k+1". Then, as shown in FIG. 69(b), return address information (specifically, "return Address B”) is stored. In this situation, when the main MPU 72 executes a POP instruction, the "return address B" is read from the unit storage area 125a corresponding to the storage area address of "k+1" which is the information of the reference pointer, and the "return address B" is read. Return to the processing (ie, instruction) corresponding to address B'. In this case, as shown in FIG. 69(c), the return address information is not stored in the unit storage area 125a corresponding to the storage area address of "k+1". After that, since the value of the reference pointer is decremented by 1, the information of the reference pointer becomes "k".

Next, the execution contents of the processing using the PUSH instruction and the POP instruction as described above will be described below. FIG. 70 is a flow chart showing advantageous lottery processing at the start of the game in this embodiment, which is executed by the main MPU 72 .

When "1" is set in the second interval flag of the main side RAM 74 and the current gaming state is neither the pseudo-bonus state ST4 nor the AT state ST5 (step S3401: YES, step S3402: NO) , and other processing (step S3404). In other processes, the same processes as steps S2204 to S2218 in the advantageous lottery process (FIG. 46) at the start of the game in the first embodiment are executed.

When the second section flag of the main RAM 74 is set to "1" and the current gaming state is the pseudo-bonus state ST4 or the AT state ST5 (step S3401: YES, step S3402: YES), PUSH After executing the command (step S3404), the advantageous state processing at the start of the game is executed as a subroutine (step S3405). In the PUSH instruction of step S3404, after adding 1 to the value of the reference pointer of the main MPU 72, the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1 is stored. Stores the return address information after completing the The return address information is the address information corresponding to the process of step S3406.

Advantageous state processing at the start of the game in step S3405 will be described later. After executing the processing of step S3405, the lottery processing of the effect during advantage is executed (step S3406). In the lottery processing for the medium-advantage production, the kind of the medium-advantage production to be executed in the pseudo-bonus state ST4 or the AT state ST5 is determined by lottery. The advantageous middle effect is a effect executed by the upper lamp 61, the speaker 62, and the image display device 63 while the reels 32L, 32M, and 32R are waiting for the start of rotation over the freeze period. In the lottery process of the effect during the advantage, the situation in which the transition to the AT state ST5 is confirmed in the pseudo-bonus state ST4 has a longer freeze period than the situation in which the transition to the AT state ST5 is not confirmed. A lottery is performed so that the middle effect is selected, and if the AT state ST5, the situation where the transition to the additional period is confirmed becomes a longer freeze period than the situation where the transition to the additional period is not confirmed. A lottery is carried out so that the type of advantageous medium performance is selected.

After that, the processing for setting the effect during advantage is executed (step S3407). In the setting process, a process for generating a freeze period of the kind selected in the lottery process of the advantageous medium effect is executed, and an advantageous medium effect command corresponding to the freeze period is transmitted to the effect side MPU 92. do. As a result, the currently selected type of effect during advantage is executed.

When a negative determination is made in step S3401, when the process of step S3403 is executed, or when the process of step S3407 is executed, a RET instruction is executed (step S3408). In the RET instruction, the POP instruction is first executed to read the return address information from the unit storage area 125 a corresponding to the storage area address of the reference pointer value in the main MPU 72 . When the information of the return address is read, 1 is subtracted from the value of the reference pointer. Then, the process proceeds to the process corresponding to the read return address information. Specifically, the process proceeds to step S1314 in the winning lottery process (FIG. 34).

FIG. 71 is a flow chart showing the advantageous state processing at the start of the game in step S3405 in the advantageous lottery processing at the start of the game (FIG. 70).

When the value of the bet number setting counter 74a is "3" or more, and the state is not the CB state but the pseudo-bonus state ST4 (step S3501: YES, step S3502: NO, step S3503: YES), a PUSH command is executed. After that (step S3504), an ending determination process is executed as a subroutine (step S3505). In the PUSH instruction of step S3504, after adding 1 to the value of the reference pointer of the main MPU 72, the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1 is stored. Stores return address information. The return address information is the address information corresponding to the processing in step S3506.

The ending determination process in step S3505 will be described later. After executing the processing of step S3505, the processing of steps S3506 to S3511 is executed. These steps S3506 to S3511 are the same as steps S2705 to S2710 in the advantageous state processing (FIG. 55) at the start of the game in the first embodiment. That is, the AT shift lottery process is executed under a predetermined condition, and when the AT shift is won, the process for confirming the shift to the AT state ST5 is executed.

On the other hand, if it is the pseudo-bonus state ST4 and a negative determination is made in step S3503, after executing the PUSH command (step S3512), the AT state processing at the start of the game is executed as a subroutine (step S3513). In the PUSH instruction of step S3512, after adding 1 to the value of the reference pointer of the main MPU 72, the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1 is stored. Stores the return address information after completing the The return address information is the address information corresponding to the process of step S3514.

If a negative determination is made in step S3501, if affirmative determination is made in step S3502, if affirmative determination is made in step S3506, if a negative determination is made in step S3507, if a negative determination is made in step S3509, When the process of step S3511 is executed, or when the process of step S3513 is executed, a RET instruction is executed (step S3514). In the RET instruction, the POP instruction is first executed to read the return address information from the unit storage area 125 a corresponding to the storage area address of the reference pointer value in the main MPU 72 . When the information of the return address is read, 1 is subtracted from the value of the reference pointer. Then, the process proceeds to the process corresponding to the read return address information. Specifically, the process moves to step S3406 in the advantageous lottery process (FIG. 70) at the start of the game.

FIG. 72 is a flow chart showing AT state processing at game start in step S3513 in the advantageous state processing at game start (FIG. 71).

First, after executing a PUSH instruction (step S3601), an ending determination process is executed as a subroutine (step S3602). In the PUSH instruction of step S3601, after adding 1 to the value of the reference pointer of the main MPU 72, the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1 is stored. Stores return address information. The return address information is the address information corresponding to the process of step S3603.

The ending determination process in step S3602 will be described later. After executing the processing of step S3602, the processing of steps S3603 to S3616 is executed. These steps S3603 to S3616 are the same as steps S3002 to S015 in the AT state process (FIG. 59) at the start of the game in the first embodiment. In other words, when it is not the additional period, the lottery process for shifting to the additional period is executed under a predetermined condition, and when the transition to the additional period is won, the process for fixing the transition to the additional period is executed. In addition, when it is not won the transition to the additional period, the first addition lottery process is executed under a predetermined condition, and when it is won, the processing for increasing the number of remaining sets of the AT state ST5. to run. Further, when it is the additional period, the second additional lottery process is executed, and the number of times selected in the second additional lottery process is added to the remaining number of sets in the AT state ST5.

When a negative determination is made in step S3604, when the process of step S3609 is executed, when a negative determination is made in step S3611, when the process of step S3613 is executed, or when the process of step S3616 is executed, the RET instruction is executed (step S3617). In the RET instruction, the POP instruction is first executed to read the return address information from the unit storage area 125 a corresponding to the storage area address of the reference pointer value in the main MPU 72 . When the information of the return address is read, 1 is subtracted from the value of the reference pointer. Then, the process proceeds to the process corresponding to the read return address information. Specifically, the process moves to step S3514 in the state processing (FIG. 71) at the start of the game.

Next, the ending determination process executed as a subroutine in step S3505 in the advantageous state processing at game start (FIG. 71) or step S3602 in the AT state processing at game start (FIG. 72) is shown in the flowchart of FIG. will be described with reference to.

In the ending determination process, it is specified whether or not the situation is such that it is certain that the ending condition of the second section SC2 is satisfied. If it is a bonus state ST4, the AT transition lottery process (step S3508) is not executed, and if it is an AT state ST5, the transition lottery process of the addition period (step S3605), the first addition lottery process (step S3610) and the second addition The lottery process (step S3614) is prevented from being executed. In the present embodiment, even if the pseudo-bonus state ST4 ends without transition to the AT state ST5 and shifts to the normal game state ST1, the second section SC2 can be continued and the AT state ST5 ends. 2nd section SC2 can be continued even if it shifts to normal game state ST1. Therefore, not only during the AT state ST5 but also during the pseudo-bonus state ST4, it is possible to establish that the ending condition of the second section SC2 is satisfied and that the ending condition of the second section SC2 is satisfied.

Specifically, it is determined whether or not the number of target games is equal to or greater than the maximum number of games (step S3701). Specifically, in the pseudo-bonus state ST4, the sum of the value of the continuous game number counter 74c of the main RAM 74 and the value of the pseudo-bonus continuation counter of the main RAM 74 is equal to or greater than the upper limit number of games of the second section SC2. Determine whether or not In addition, if the AT state ST5, the value of the continuous game number counter 74c of the main side RAM 74, the value of the AT continuation counter of the main side RAM 74, the value of the set number counter of the main side RAM 74, and in one set of the AT state ST5 It is determined whether or not the sum of the value of the number of initial continuous games (50 games) and the number of games is equal to or greater than the upper limit number of games in the second section SC2.

Also, it is determined whether or not the target number is equal to or greater than the upper limit net increase number (step S3702). Specifically, in the pseudo-bonus state ST4, the value obtained by multiplying the value of the pseudo-bonus continuation counter by the expected acquisition value of the game media in the pseudo-bonus state ST4 is added to the value of the total acquisition number counter 74d. It is determined whether or not the number is equal to or greater than the upper limit net increase number of the second section SC2. In addition, if the AT state ST5, the sum of the value of the AT continuation counter, the value of the set number counter, and the value of the initial number of continuous games (50 games) in one set of the AT state ST5 is added to the value of the game in the AT state ST5. It is determined whether or not the result obtained by adding the value obtained by accumulating the acquisition expected value of the medium to the value of the total acquisition number counter 74d is equal to or greater than the upper limit net increase number of the second section SC2.

If negative determinations are made in both steps S3701 and S3702, the RET instruction is executed (step S3703). In the RET instruction, the POP instruction is first executed to read the return address information from the unit storage area 125 a corresponding to the storage area address of the reference pointer value in the main MPU 72 . When the information of the return address is read, 1 is subtracted from the value of the reference pointer. Then, the process proceeds to the process corresponding to the read return address information. Specifically, if it is the ending determination process executed in step S3505 in the advantageous state processing at game start (FIG. 71), the process proceeds to step 3506 in the advantageous state processing at game start (FIG. 71). If it is the ending determination process executed in step S3602 in the AT state process at game start (FIG. 72), the process proceeds to step S3603 in the AT state process at game start (FIG. 72).

On the other hand, if an affirmative determination is made in either step S3701 or step S3702, the POP instruction is executed (step S3704). Specifically, the return address information is read from the unit storage area 125a corresponding to the storage area address of the reference pointer value in the main MPU 72 . When the information of the return address is read, 1 is subtracted from the value of the reference pointer. However, even if the information of the return address is read, the processing of the information of the return address is not performed.

After that, the RET instruction is executed (step S3705). In the RET instruction, the POP instruction is first executed to read the return address information from the unit storage area 125 a corresponding to the storage area address of the reference pointer value in the main MPU 72 . When the information of the return address is read, 1 is subtracted from the value of the reference pointer. Then, the process proceeds to the process corresponding to the read return address information.

Here, as described above, before executing the POP instruction included in the RET instruction in step S3705, the POP instruction is executed in step S3704. Therefore, the information of the return address to be read by the POP instruction included in the RET instruction in step S3705 is one for the storage area address of the value of the reference pointer when the ending determination process (FIG. 73) is started. It becomes the value of the storage area address in the previous order. Then, with the RET instruction in step S3705, instead of returning to the processing in the subroutine that was executed immediately before the ending determination processing (FIG. 73) was executed, Processing is returned to.

If it is the pseudo-bonus state ST4, the subroutine of the ending determination process (FIG. 73) is executed in step S3505 in the advantageous state process (FIG. 71) at the start of the game. At the start of the game (FIG. 70), the process proceeds to step S3406 in the advantageous lottery process (FIG. 70). That is, when the RET command of step S3705 is executed in the pseudo-bonus state ST4, since the processing of steps S3506 to S3511 is not executed in the advantageous state processing (FIG. 71) at the start of the game, the AT transition lottery processing is executed. not. As a result, the AT transition lottery process is not executed in the situation where it is confirmed that the ending condition is satisfied in the pseudo-bonus state ST4.

If it is AT state ST5, the subroutine of the ending determination process (FIG. 73) is executed in step S3602 in the AT state process (FIG. 72) at the time of game start. In the AT state processing (FIG. 72) of step S3617, the processing shifts to step S3514 in the advantageous state processing (FIG. 71) at the start of the game. That is, when the RET command of step S3705 is executed in AT state ST5, since the processing of steps S3603 to S3617 is not executed in the AT state processing (FIG. 72) at the start of the game, the transition lottery processing of the additional period, The first addition lottery process and the second addition lottery process are not executed. As a result, in the situation where it is confirmed that the ending condition is satisfied in the AT state ST5, the transition lottery process for the add-on period, the first add-on lottery process, and the second add-on lottery process are not executed.

Here, instead of executing the POP instruction one extra time, the second section is executed using the information in the main RAM 74 indicating that it is certain that the ending condition of the second section SC2 is satisfied. The contents of a comparative example that employs a configuration that skips execution of processing that should not be executed in a situation where it is certain that the ending condition of SC2 is satisfied will be described.

FIG. 74 is a flow chart showing the ending determination process in the comparative example.

At steps SA101 to SA103, the same processes as steps S3701 to S3703 of the ending determination process (FIG. 73) in the slot machine 10 are executed. If an affirmative determination is made in either step SA101 or step SA102, the regulation compliance flag provided in the main RAM in the comparative example is set to "1" (step SA104). After that, the RET instruction is executed (step SA105). In the RET instruction, the POP instruction is first executed to read the return address information from the unit storage area corresponding to the storage area address of the reference pointer value provided in the main MPU in the comparative example. When the information of the return address is read, 1 is subtracted from the value of the reference pointer. Then, the process proceeds to the process corresponding to the read return address information. If it is in the pseudo-bonus state, the process returns to the advantageous state processing (FIG. 75) at the start of the game.

FIG. 75 is a flow chart showing advantageous state processing at the start of the game in the comparative example.

At steps SA111 to SA115 and steps SA117 to SA124, the same processes as steps S3501 to S3514 of the advantageous state process (FIG. 71) at the start of the game in the slot machine 10 are executed. In the advantageous state processing at the start of the game in the comparative example, after executing the ending determination processing in step SA115, it is determined whether or not the restriction flag of the main side RAM in the comparative example is set to "1" ( step SA116). If the regulation flag is not set to "1" (step SA116: NO), the processing after step SA117 is executed, whereas if the regulation flag is set to "1" (Step SA116: YES), and the advantageous state processing at the start of the game ends.

As described above, in the comparative example, even if it is determined in the ending determination process (FIG. 74) that the ending condition of the second section SC2 is satisfied, the restriction flag of the main RAM is set to "1". is set, if it is in the pseudo-bonus state, the process returns to the advantageous state processing (FIG. 75) at the start of the game, and in step SA116 of the processing, it is checked whether or not the regulation flag is set to "1". If the regulation flag is set to "1", the advantageous state processing (FIG. 75) at the start of the game is terminated. In this case, when it is specified that the ending condition of the second section SC2 is established, the execution of the processing after step SA117 is skipped in the advantageous state processing (FIG. 75) at the start of the game. In order to do so, it is necessary to set the processing (that is, commands) of steps SA104 and SA116 as a program, and to provide a regulation compliance flag in the main RAM. In the comparative example, it is necessary to adopt such a configuration also for the AT state processing at the start of the game, which is executed in the AT state.

On the other hand, in the present slot machine 10, when it is confirmed that the ending condition of the second section SC2 is satisfied in the pseudo-bonus state ST4 or the AT state ST5, the POP command is executed one extra time before returning. By forcibly adjusting the address to the previous return address, execution of processing that should not be executed in a situation where it is certain that the ending condition of the second section SC2 is satisfied is skipped. As a result, while reducing the program capacity and reducing the storage capacity required in the main RAM 74, the execution of the process that should not be executed in the situation where it is confirmed that the ending condition of the second section SC2 is satisfied is skipped. It becomes possible to

It should be noted that the number of POP instructions to be executed in excess is not limited to one, and may be a plurality of times such as two or three times.

<Fourth Embodiment>
In this embodiment, a part of the processing configuration of the main MPU 72 is different from that of the first embodiment. The configuration different from that of the first embodiment will be described below. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 76 is a flow chart showing the wait period calculation process executed by the main MPU 72 . As in the first embodiment, the wait period is from when the reels 32L, 32M, 32R start spinning in a given game until when the reels 32L, 32M, 32R start spinning in the next game. It is a period that is compulsorily secured as a period of Further, the wait period calculation process is executed in the timer subtraction process (step S506) of the timer interrupt process (FIG. 19).

When it is time to set the wait period, that is, when it is time to start rotating the reels 32L, 32M, and 32R (step S3801: YES), the wait counter 126 provided in the main RAM 74 (see FIG. 77A) ) is set to information corresponding to the wait period (specifically, 4.1 seconds) (step S3802). Also, the wait flag provided in the main RAM 74 is set to "1" (step S3803). The wait flag is a flag for the main MPU 72 to specify that the wait period is being measured, and the wait counter 126 is a counter for the main MPU 72 to specify the remaining period of the wait period. . When the wait flag is set to "1", the start of rotation of the reels 32L, 32M, and 32R is waited even after one game is started and the lottery process (FIG. 34) for the winning combination is completed. , the rotation of the reels 32L, 32M, 32R is started when the wait flag is not set to "1".

If a negative determination is made in step S3801, on condition that the wait flag of the main RAM 74 is set to "1" (step S3804: YES), the subtraction process of the wait counter 126 is executed (step S3805). In the subtraction process, 1 is subtracted from the value of the weight counter 126, details of which will be described later. If the value of the wait counter 126 after subtracting 1 is "0" (step S3806: YES), the wait flag is cleared to "0" (step S3807).

77(a) to 77(c) are explanatory diagrams for explaining the details of the subtraction processing of the weight counter 126 in step S3805. FIG. 77(a) is an explanatory diagram for explaining the configuration of the wait counter 126, and FIG. 77(b) is an explanatory diagram for explaining the contents of specific instructions for subtraction processing of the wait counter 126. FIG. 77(c) is an explanatory diagram for explaining how the carry-down of the upper byte TK1 occurs in the wait counter 126. FIG.

As shown in FIG. 77(a), the wait counter 126 has a 2-byte structure having an upper byte TK1 consisting of 1 byte and a lower byte TK2 consisting of 1 byte. At step S3802 in the wait period calculation process (FIG. 76), information corresponding to the wait period (specifically, 4.1 seconds) is set in the wait counter 126 having a 2-byte structure.

In the subtraction process of the wait counter 126 in step S3805 in the wait period calculation process (FIG. 76), the instruction shown in FIG. 77(b) is executed. Specifically, the instruction "SUB (TK2), 1" is set at the program address "4101". "SUB" is an instruction to subtract a specified value from a specified numerical value. Therefore, the instruction "SUB (TK2), 1" is an instruction to subtract 1 from the value of the lower byte TK2 of the wait counter 126. FIG. As a result of executing this instruction, the value of the lower byte TK2 is decremented by 1. However, as shown in FIG. If so, the carry flag CF provided in the main MPU 72 is set to "1" and the value of the lower byte TK2 is inverted to become "11111111" as shown in FIG. 77(c2).

The instruction "SBC (TK1), 1" is set at the following program address "4102". The instruction "SBC" is an instruction for subtracting a specified value from a specified value when the carry flag CF of the main MPU 72 is set to "1" in the previous instruction. Therefore, the instruction "SBC (TK1), 1" waits if the carry flag CF is set to "1" as a result of the value of the lower byte TK2 being decremented by 1 in the immediately preceding instruction "4101". This is an instruction to decrement the value of the upper byte TK1 of the counter 126 by one. In this case, if the carry flag CF is not set to "1" in the instruction "4101" immediately before, the value of the upper byte TK1 is maintained in the instruction "4102", and the carry flag in the instruction "4101" immediately before. When the flag CF is set to "1", the value of the upper byte TK1 is decremented by 1 in the instruction "4102". In other words, when the value of the upper byte TK1 is "00000010" and the value of the lower byte TK2 is decremented by 1 as shown in FIG. 1 is subtracted from the value of byte TK1, resulting in "00000001" as shown in FIG. 77(c2).

The instruction "RET" is set at the following program address "4103". Execution of the command "RET" advances to step S3806 of the wait period calculation process (FIG. 76).

FIG. 78 is a flowchart showing medal monitoring processing executed by the main MPU 72. FIG. The medal monitoring process is executed in the sensor monitoring process (step S505) of the timer interrupt process (FIG. 19).

In the present embodiment, the medal path of the selector 52 for guiding the medals inserted into the medal insertion slot 45 to the hopper device 53 in a situation where reception of medals is permitted is equipped with a first inserted medal detecting sensor 45a. A detection sensor and a second inserted token detection sensor are provided. The first inserted medal detection sensor and the second inserted medal detection sensor are arranged side by side in the medal passing direction so that the first inserted medal detection sensor is on the upstream side and the second inserted medal detection sensor is on the downstream side. there is Then, when a medal is detected by the second inserted medal detection sensor before a predetermined monitoring period elapses after the medal is detected by the first inserted medal detection sensor, the main side MPU 72 sends the medal through the medal insertion slot 45. to specify that one medal has been inserted. In the medal monitoring process, the period from when the first inserted medal detection sensor detects the medal to when the second inserted medal detection sensor detects the medal is monitored. Execute processing for executing anomaly notification.

Specifically, first, addition processing of the monitoring period counter KK (see FIG. 79(a)) provided in the main RAM 74 is executed (step S3901). A monitoring period counter KK is determined by the main MPU 72 as to whether or not the period from when a medal is detected by the first inserted medal detection sensor to when the medal is detected by the second inserted medal detection sensor exceeds a predetermined monitoring period. This is a counter for specifying.

After that, on condition that the medal is detected by the first inserted medal detection sensor (step S3902: YES), the monitoring period counter KK is cleared to "0" (step S3903). If medals are detected by the second inserted medal detection sensor (step S3904: YES), it is determined whether or not the value of the monitoring period counter KK has reached the maximum value (step S3905). When the value of the monitoring period counter KK is the maximum value (step S3905: YES), the abnormality flag provided in the main side RAM 74 is set to "1" (step S3906), and the effect side MPU 92 is abnormal. A command is transmitted (step S3907). As a result, an abnormality signal is output to the outside, and an abnormality notification is performed by the upper lamp 61, the speaker 62, and the image display device 63. FIG.

FIGS. 79(a) to 79(c) are explanatory diagrams for explaining the addition processing of the monitoring period counter KK in step S3901. FIG. 79(a) is an explanatory diagram for explaining the configuration of the monitoring period counter KK, and FIG. 79(b) is an explanatory diagram for explaining the contents of specific instructions for addition processing of the monitoring period counter KK. FIG. 79(c) is an explanatory diagram for explaining how the state of reaching the maximum value is maintained when the value of the monitoring period counter KK reaches the maximum value.

As shown in FIG. 79(a), the monitoring period counter KK has a 1-byte configuration. In addition processing of the monitoring period counter KK in step S3901 in the medal monitoring processing (FIG. 78), the command shown in FIG. 79(b) is executed. Specifically, the instruction "ADD (KK), 1" is set at the program address "5101". "ADD" is an instruction to add a specified value to a specified numerical value. Therefore, the instruction "ADD (KK), 1" is an instruction to add 1 to the value of the monitoring period counter KK. As a result of executing this instruction, the value of the monitoring period counter KK is incremented by 1. However, as shown in FIG. When 1 is added, the carry flag CF provided in the main MPU 72 is set to "1", and the value of the monitoring period counter KK is inverted to "00000000" as shown in FIG. 79(c2). Become.

The instruction "SBC (KK), 1" is set at the following program address "5102". As already explained, the instruction "SBC" is an instruction to subtract the specified value from the specified value when the carry flag CF of the main MPU 72 is set to "1" in the previous instruction. . Therefore, the instruction "SBC (KK), 1" is executed when the carry flag CF is set to "1" as a result of adding 1 to the value of the monitoring period counter KK in the immediately preceding instruction "5101". This is an instruction to subtract 1 from the value of the monitoring period counter KK. In this case, if the carry flag CF is not set to "1" in the immediately preceding instruction "5101", the value of the watchdog period counter KK is maintained in the immediately preceding instruction "5102" and When the carry flag CF is set to "1", the value of the monitoring period counter KK is decremented by 1 in the instruction of "5102". In other words, when the value of the monitoring period counter KK is "11111111" as shown in FIG. 79(c1), the value of the monitoring period counter KK is incremented by 1, and the carry flag CF is set as shown in FIG. 79(c2). When "1" is set and the value of the monitoring period counter KK becomes "00000000", the value of the monitoring period counter KK is decremented by 1, and the value of the monitoring period counter KK is changed to "00000000" as shown in FIG. 79(c3). becomes "11111111". As a result, when the process of step S3901 is executed in a situation where the value of the monitoring period counter KK has already reached the maximum value, the value of the monitoring period counter KK is maintained at the maximum value. Since a value smaller than the maximum value by "1" corresponds to the predetermined monitoring period, when the value of the monitoring period counter KK reaches the maximum value, it corresponds to a state in which the monitoring period has exceeded the predetermined monitoring period. In this situation, when a medal is detected by the second inserted medal detection sensor, an affirmative determination is made in steps S3904 and S3905, and an abnormality notification is executed.

The instruction "RET" is set at the following program address "5103". By executing the command "RET", the process proceeds to step S3902 of the medal monitoring process (FIG. 78).

Here, a configuration that does not use the "SBC" instruction in the addition processing of the monitoring period counter KK in step S3901 is also conceivable. FIG. 79(d) is an explanatory diagram for explaining the contents of a comparative example in which addition processing of the monitoring period counter KK is executed without executing the "SBC" instruction.

In the comparative example, the instruction "ADD (KK), 1" is set at the program address "5101". As already explained, this instruction is an instruction to add 1 to the value of the monitoring period counter KK. As a result of executing the instruction, 1 is added to the value of the monitoring period counter KK.

The instruction "JR NCF, 2" is set at the following program address "5102". This instruction adds "2" to the program address "5102" if "1" is not set to the carry flag CF as a result of the instruction by the latest program address (specifically "5101"). This is an instruction to jump to "5104" and proceed to the next program address "5103" if the carry flag CF is set to "1".

The instruction "LD (KK), 255" is set at the program address "5103". This instruction is an instruction to set the value of the monitoring period counter KK to the maximum value "11111111". As a result, the value of the monitoring period counter KK in the situation of "11111111" is incremented by 1, and as a result, the value of the monitoring period counter KK is inverted to "00000000" and the carry flag CF is set to "1". , the value of the monitoring period counter KK returns to the maximum value of "11111111".

The command "RET" is set at the program address "5104". By executing the command "RET", the process proceeds to step S3902 of the medal monitoring process (FIG. 78).

As a result of adding 1 to the value of the monitoring period counter KK as described above, if the value of the monitoring period counter KK exceeds the maximum value, in the processing for returning to the maximum value, in the comparative example that does not use the "SBC" instruction While four instructions are required for this process, using the "SBC" instruction as in the slot machine 10 only requires three instructions for this process. This makes it possible to reduce the program capacity.

As already explained, the "SBC" instruction is used to cause the digit of the upper byte TK1 in the wait counter 126 to be carried down in the subtraction process (step S3805) of the wait counter 126 in the wait period calculation process (FIG. 76). is an order to be executed. In other words, it is possible to reduce the program capacity as described above by using instructions that are used for different purposes in other processes.

<Fifth Embodiment>
This embodiment differs from the fourth embodiment in the configuration of the wait period calculation process and medal monitoring process. The configuration different from that of the fourth embodiment will be described below. The description of the same configuration as that of the fourth embodiment is basically omitted.

FIG. 80 is a flow chart showing the calculation process of the wait period in this embodiment executed by the main MPU 72 .

When it is time to set the wait period, that is, when it is time to start rotating the reels 32L, 32M, and 32R (step S4001: YES), the wait counter 126 provided in the main RAM 74 is cleared to "0" ( step S4002). The configuration of the wait counter 126 is the same as that of the fourth embodiment. Also, the wait flag of the main RAM 74 is set to "1" (step S4003).

If a negative determination is made in step S4001, on condition that the wait flag of the main RAM 74 is set to "1" (step S4004: YES), the addition process of the wait counter 126 is executed (step S4005). In the addition processing, the value of the weight counter 126 is incremented by 1, although the details will be described later. If the value of the wait counter 126 after adding 1 is a value corresponding to the wait period (step S4006: YES), the wait flag is cleared to "0" (step S4007).

81(a) and 81(b) are explanatory diagrams for explaining the content of the addition processing of the weight counter 126 in step S4005. FIG. 81(a) is an explanatory diagram for explaining the contents of specific instructions for the addition processing of the wait counter 126, and FIG. It is an explanatory view for explaining a state.

In the addition processing of the wait counter 126 in step S4005 in the wait period calculation processing (FIG. 80), the instruction shown in FIG. 81(a) is executed. Specifically, the instruction "ADD (TK2), 1" is set at the program address "4101". This instruction is an instruction to add 1 to the value of the lower byte TK2. As a result of executing this instruction, the value of the lower byte TK2 is incremented by 1. As shown in FIG. If so, the carry flag CF provided in the main MPU 72 is set to "1", and the value of the lower byte TK2 is inverted to "00000000" as shown in FIG. 81(b2).

The instruction "ADC (TK1), 1" is set at the following program address "4102". The instruction "ADC" is an instruction for adding a specified value to a specified value when the carry flag CF of the main MPU 72 is set to "1" in the previous instruction. Therefore, the instruction "ADC (TK1), 1" waits if "1" is set in the carry flag CF as a result of adding 1 to the value of the lower byte TK2 in the immediately preceding instruction "4101". This is an instruction to add 1 to the value of the upper byte TK1 of the counter 126. FIG. In this case, if the carry flag CF is not set to "1" in the instruction "4101" immediately before, the value of the upper byte TK1 is maintained in the instruction "4102", and the carry flag in the instruction "4101" immediately before. When flag CF is set to "1", 1 is added to the value of upper byte TK1 in instruction "4102". That is, as shown in FIG. 81(b1), when the value of the upper byte TK1 is "00000001" and the value of the lower byte TK2 is incremented by 1 to set the carry flag CF to "1", the upper byte 1 is added to the value of byte TK1, and the value of upper byte TK1 becomes "00000010" as shown in FIG. 81(b2).

The instruction "RET" is set at the following program address "4103". By executing the command "RET", the process advances to step S4006 of the wait period calculation process (FIG. 80).

FIG. 82 is a flow chart showing medal monitoring processing in this embodiment executed by the main MPU 72 .

First, subtraction processing of the monitoring period counter KK of the main RAM 74 is executed (step S4101). After that, on condition that medals are detected by the first inserted medal detection sensor (step S4102: YES), the maximum value is set to the monitoring period counter KK (step S4103). As a result, the monitoring period counter KK becomes "11111111". If medals are detected by the second inserted medal detection sensor (step S4104: YES), it is determined whether or not the value of the monitoring period counter KK is "0" (step S4105). When the value of the monitoring period counter KK is "0" (step S4105: YES), the abnormality flag of the main side RAM 74 is set to "1" (step S4106), and an abnormality command is sent to the effect side MPU 92. It transmits (step S4107). As a result, an abnormality signal is output to the outside, and an abnormality notification is performed by the upper lamp 61, the speaker 62, and the image display device 63. FIG.

FIGS. 83(a) and 83(b) are explanatory diagrams for explaining the content of subtraction processing of the monitoring period counter KK in step S4101. FIG. 83(a) is an explanatory diagram for explaining the contents of specific instructions for addition processing of the monitoring period counter KK, and FIG. FIG. 10 is an explanatory diagram for explaining how the state in which the minimum value is reached is maintained;

In the subtraction process of the monitoring period counter KK in step S4101 in the medal monitoring process (FIG. 82), the command shown in FIG. 83(a) is executed. Specifically, the instruction "SUB (KK), 1" is set at the program address "5101". This instruction is an instruction to subtract 1 from the value of the monitoring period counter KK. As a result of executing this instruction, the value of the monitoring period counter KK is decremented by 1. However, as shown in FIG. When 1 is subtracted, the carry flag CF provided in the main MPU 72 is set to "1", and the value of the monitoring period counter KK is inverted to "11111111" as shown in FIG. 83(b2). Become.

The instruction "ADC (KK), 1" is set at the following program address "5102". As already explained, the instruction "ADC" is an instruction to add the specified value to the specified value when the carry flag CF of the main MPU 72 is set to "1" in the previous instruction. . Therefore, the instruction "ADC (KK), 1" is executed when the carry flag CF is set to "1" as a result of subtracting 1 from the value of the monitoring period counter KK in the immediately preceding instruction "5101". This is an instruction to add 1 to the value of the monitoring period counter KK. In this case, if the carry flag CF is not set to "1" in the immediately preceding instruction "5101", the value of the watchdog period counter KK is maintained in the immediately preceding instruction "5102" and When the carry flag CF is set to "1", the value of the monitoring period counter KK is incremented by 1 at the instruction of "5102". That is, in the situation where the value of the monitoring period counter KK is "00000000" as shown in FIG. 83(b1), the value of the monitoring period counter KK is decremented by 1, and the carry flag CF is set as shown in FIG. 83(b2). When "1" is set and the value of the monitoring period counter KK becomes "11111111", the value of the monitoring period counter KK is incremented by 1, resulting in the monitoring period counter KK as shown in FIG. 83(b3). becomes "00000000". As a result, when the process of step S4101 is executed while the value of the monitoring period counter KK has already reached its minimum value, the value of the monitoring period counter KK is maintained at the initial value. Since the situation in which the value of the monitoring period counter KK is "00000001" corresponds to the predetermined monitoring period, when the value of the monitoring period counter KK becomes the minimum value, it corresponds to the state in which the monitoring period has exceeded the predetermined monitoring period. do. In this situation, when a medal is detected by the second inserted medal detection sensor, an affirmative determination is made in steps S4104 and S4105, and an abnormality notification is executed.

The instruction "RET" is set at the following program address "5103". By executing the command "RET", the process proceeds to step S4102 of the medal monitoring process (FIG. 82).

Here, a configuration that does not use the "ADC" instruction in the subtraction processing of the monitoring period counter KK in step S4101 is also conceivable. FIG. 83(c) is an explanatory diagram for explaining the contents of a comparative example in which subtraction processing of the monitoring period counter KK is executed without executing the "ADC" instruction.

In the comparative example, the instruction "SUB (KK), 1" is set at the program address "5101". As already explained, this instruction is an instruction to subtract 1 from the value of the monitoring period counter KK. As a result of executing this instruction, 1 is subtracted from the value of the monitoring period counter KK.

The instruction "JR NCF, 2" is set at the following program address "5102". This instruction adds "2" to the program address "5102" if "1" is not set to the carry flag CF as a result of the instruction by the latest program address (specifically "5101"). This is an instruction to jump to "5104" and proceed to the next program address "5103" if the carry flag CF is set to "1".

The instruction "LD (KK), 0" is set at the program address "5103". This instruction is an instruction to set the value of the monitoring period counter KK to the minimum value "00000000". As a result, the value of the monitoring period counter KK in the state of "00000000" is decremented by 1, and is reversed to "11111111". The value returns to "00000000" which is the minimum value.

The command "RET" is set at the program address "5104". By executing the command "RET", the process proceeds to step S4102 of the medal monitoring process (FIG. 82).

As a result of subtracting 1 from the value of the monitoring period counter KK as described above, if the value of the monitoring period counter KK falls below the minimum value, in the processing for returning to the minimum value, in the comparative example that does not use the "ADC" instruction While four instructions are required for this process, using the "ADC" instruction as in the slot machine 10 only requires three instructions for this process. This makes it possible to reduce the program capacity.

As already explained, the "ADC" instruction is used to cause the digit of the upper byte TK1 in the wait counter 126 to be carried up in the addition process (step S4005) of the wait counter 126 in the wait period calculation process (FIG. 80). is an order to be executed. In other words, it is possible to reduce the program capacity as described above by using instructions that are used for different purposes in other processes.

<Sixth embodiment>
This embodiment differs from the first embodiment in the configuration of the main processing executed by the main MPU 72 . The configuration different from that of the first embodiment will be described below. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 84 is a flow chart showing main processing in this embodiment executed by the main MPU 72 .

First, as in step S101 of the main process (FIG. 10) in the first embodiment, a power failure signal is read (step S4201). In this case, by monitoring the predetermined bit of the input port 72a, it is determined whether or not a power failure has occurred. Thereafter, it is determined whether or not the power failure signal received from the power failure monitoring circuit 54b is at HI level by determining whether or not "1" is stored in a predetermined bit of the input port 72a (step S4202). ). If the power failure signal is not HI level (step S4202: NO), the confirmation counter provided in the main RAM 74 is cleared to "0" (step S4203), and if the power failure signal is HI level (step S4202: YES), the value of the confirmation counter of the main RAM 74 is incremented by 1 (step S4204). The confirmation counter is a counter for specifying the number of times the main MPU 72 has continuously confirmed that the power failure signal is at HI level.

When the process of step S4203 or the process of step S4204 is executed, it is determined whether or not the value of the confirmation counter of the main RAM 74 is greater than or equal to the progress permission value (step S4205). The progress permission value is arbitrary as long as it is an integer of 2 or more, but is set to "5" in this embodiment. If the value of the confirmation counter is less than the progress permission value (step S4205: NO), that is, if the number of times the power failure signal is continuously confirmed to be HI level is less than the progress permission value, the process returns to step S4201, Check again whether the power failure signal is HI.

If the value of the confirmation counter is greater than or equal to the progress permission value (step S4205: YES), that is, if the number of times the power failure signal is continuously confirmed to be HI level is greater than or equal to the progress permission value, the internal function setting process is executed. Execute (step S4206). In the internal function setting process, various initial settings are made for the registers and I/O devices in the main MPU 72 . After that, other processing is executed (step S4207). In the other processes, the same processes as those of steps S104 to S121 of the main process (FIG. 10) in the first embodiment are executed.

According to the above configuration, when the supply of operating power to the main MPU 72 is started, the state of the power failure signal being at the HI level continues for the number of times equal to or greater than the progress permission value, which is an integer of 2 or more. Execution of the processing after step S4206 in the main processing (FIG. 84) is awaited until it is confirmed. As a result, it is possible to start the process for advancing the game under the condition that the HI level power failure signal is stably output.

<Seventh Embodiment>
This embodiment differs from the first embodiment in the configuration of the main processing executed by the main MPU 72 . The configuration different from that of the first embodiment will be described below. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 85 is a flow chart showing main processing in this embodiment executed by the main MPU 72 .

First, execution of timer interrupt processing (FIG. 19) is permitted (step S4301). The timer interrupt process (FIG. 19) is started at a period of 1.49 milliseconds as in the first embodiment. When 1.49 milliseconds have elapsed from this timing, timer interrupt processing (FIG. 19) is started.

After that, it waits until the timer interrupt processing (FIG. 19) occurs once (step S4302). The processing period from the execution of step S4301 to the execution of step S4302 in the main MPU 72 is several microseconds, and the period until the negative determination is made in step S4302 and the processing of step S4302 is executed again. Since the processing period is also several microseconds, the negative determination in step S4302 is executed about 500 times before the timer interrupt processing (FIG. 19) is executed once.

If the timer interrupt process (FIG. 19) has been executed once, the internal function setting process is executed (step S4303). In the internal function setting process, various initial settings are made for the registers and I/O devices in the main MPU 72 . After that, other processing is executed (step S4304). In the other processes, the same processes as those of steps S104 to S121 of the main process (FIG. 10) in the first embodiment are executed.

According to the above configuration, when the supply of operating power to the main MPU 72 is started, 1.49 milliseconds, which is the interrupt period of the timer interrupt processing (FIG. 19), elapses and the timer interrupt processing (FIG. 19) is started. is completed, the execution of the processes after step S4303 in the main process (FIG. 85) is on standby. The expected period until the HI level power failure signal is stably output is a period shorter than 1.49 milliseconds, which is the interrupt cycle of timer interrupt processing (FIG. 19). Therefore, it is possible to start the process for progressing the game under the condition that the power failure signal of HI level is stably output.

The timer interrupt processing (FIG. 19) is first processed when 1.49 milliseconds have elapsed since the supply of operating power to the main MPU 72 was started. The period assumed until the power failure signal is stably output is a period shorter than 1.49 milliseconds, which is the interrupt cycle of the timer interrupt process (Fig. 19), so the timer interrupt process (Fig. 19) Even if the power failure process (step S503) is executed, the HI level power failure signal is stably output before the power failure process is started. Therefore, in the timer interrupt processing (FIG. 19) executed first after the supply of operating power is started, the power failure processing is executed due to the unstable output state of the power failure signal. It is possible to avoid it.

<Other embodiments>
It should be noted that the present invention is not limited to the description of each embodiment described above, and various modifications and improvements can be made without departing from the spirit of the present invention. For example, it may be changed as follows. Incidentally, the configurations of the following different forms may be applied individually to the configurations of the above embodiments, or may be applied in combination. In addition, the configurations of the above embodiments may be applied in combination with each other, and the configurations of the following other forms may be applied individually or in combination to the configuration in which the configurations of the above embodiments are combined with each other. good.

(1) When the voltage applied from the external power supply to the power supply unit 54a exceeds the reference voltage, the power failure monitoring circuit 54b outputs a LOW level power failure signal to the main side MPU 72, It may be configured to output a HI level power failure signal to the main side MPU 72 when the applied voltage becomes equal to or lower than the reference voltage. In this case, when the main MPU 72 confirms that the output level of the power failure signal has changed from the HI level to the LOW level in the power failure process (FIG. 13), it executes the power failure process shown in steps S202 to S205. It will be done. Further, in the main processing (FIG. 10) in the first embodiment, the process waits without proceeding to the processing after step S103 until it is confirmed that the output level of the power failure signal becomes LOW level in step S102. In the main processing (FIG. 84) in the embodiment, when it is confirmed that the output level of the power failure signal is LOW level in step S4202, the processing of step S4204 is executed, and in step S4202 the output level of the power failure signal is HI. When it is confirmed that it is level, the process of step S4203 is executed.

(2) When the voltage applied from the external power supply to the power supply unit 54a exceeds the reference voltage, the power failure monitoring circuit 54b does not output any power failure signal to the main MPU 72, and may be configured to output a power outage signal to the main MPU 72 when the voltage applied to is lower than the reference voltage. In this case, when the main MPU 72 confirms that it has received a power failure signal in the power failure process (FIG. 13), it executes the power failure process shown in steps S202 to S205. In addition, in the main process (FIG. 10) in the first embodiment, the process waits without proceeding to the processes after step S103 until it is confirmed in step S102 that the power failure signal is not received, and the process in the sixth embodiment is performed. In the main processing (FIG. 84) in step S4202, if it is confirmed that the power failure signal has not been received, the processing of step S4204 is executed, and if it is confirmed that the power failure signal has been received in step S4202 The process of step S4203 is executed.

(3) It is not limited to the configuration of waiting for the progress of the processing in the main processing (FIGS. 10, 84, and 85) until the power failure signal reception situation stabilizes, and instead of or in addition to the configuration, the main The main processing (FIGS. 10, 84, and 85) may wait until the state of reception of the reset signal output to the side MPU 72 is stabilized.

(4) In the seventh embodiment, the processing after step S4303 waits until the timer interrupt processing (FIG. 19) is executed once in the main processing (FIG. 85). Instead, the progress of the processing after step S4303 may be set to wait until the timer interrupt processing (FIG. 19) is executed twice, or until the timer interrupt processing (FIG. 19) is executed three times. The progress of the processing after step S4303 may be configured to wait, and the progress of the processing after step S4303 is waited until the timer interrupt processing (FIG. 19) is executed a predetermined number of times, which is four or more times. may be configured.

(5) Although one information abnormality flag 74g is provided in common for the information abnormality of the power failure flag, the abnormality of the checksum, and the abnormality of the setting value, it is not limited to this, and the power failure flag The information abnormality flag 74g may be provided in a one-to-one correspondence with each of information abnormality, checksum abnormality, and setting value abnormality. Even in this case, "1" is set to the information abnormality flag 74g corresponding to the information abnormality of the power failure flag before the process for specifying whether or not the information abnormality of the power failure flag has occurred is executed. The information abnormality flag 74g corresponding to the checksum abnormality is set to "1" before the processing for identifying whether or not the checksum abnormality has occurred, and the set value abnormality occurs. The information abnormality flag 74g corresponding to the setting value abnormality may be set to "1" before executing the process for specifying whether or not the setting value is abnormal. In this configuration, it is determined whether or not any of the information abnormality flags 74g is set to "1" after all the processes for specifying whether or not each information abnormality has occurred are executed, It is preferable that the operation prohibition process is executed when "1" is set in any of the information abnormality flags 74g.

(6) After setting the information abnormality flag 74g to "1", it is determined whether or not an information abnormality has occurred. If no information abnormality has occurred, the information abnormality flag 74g is cleared to "0", The configuration in which the information abnormality flag 74g is kept set to "1" when an information abnormality occurs may be applied to a configuration for abnormality monitoring different from the information abnormality. As different abnormality monitoring, for example, a configuration for detecting illegal radio waves and a configuration for detecting illegal magnets are conceivable.

(7) When the information abnormality flag 74g is set to "1", even if a setting change operation is performed, the setting change process (FIG. 15) is not executed and the operation prohibition process is executed. may be In this case, it is possible to give priority to the operation prohibition process in response to the occurrence of an information abnormality over the execution of the setting change process (FIG. 15).

(8) When the setting change process (FIG. 15) is executed, regardless of whether or not the information abnormality flag 74g is set to "1", the clearing process of the storage area of the main side RAM 74 (steps S301 to S307 ) is executed, but it is not limited to this. The clearing process may not be executed, and when the information abnormality flag 74g is set to "1", the clearing process of the storage area of the main side RAM 74 may be executed in the setting change process (FIG. 15). good. Further, in this configuration, when the information abnormality flag 74g is set to "1", the information abnormality flag 74g is cleared to "0" in the setting change process (FIG. 15), and the other storage area of the main side RAM 74 is The configuration may be such that the clear processing is not executed.

(9) If the setting change process (FIG. 15) is executed while the information abnormality flag 74g is set to "1", the operation prohibition process is executed after the setting change process (FIG. 15) is completed. It may be configured to be In this case, at least the information abnormality flag 74g is cleared to "0" in the setting change process (FIG. 15), so that the power is turned off and then turned on again. A game can be played with the set value selected in the process (FIG. 15).

(10) Clearing processing (step S301) of the storage area of the main RAM 74 in the setting change processing (FIG. 15) depending on whether the information abnormality flag 74g is set to "1" or not. to step S307) may be configured to have the same execution mode. In this case, the information abnormality flag 74g is cleared to "0" in the clearing process, so that the setting change process (FIG. 15) is executed in a situation where the information abnormality flag 74g is set to "1". Even so, the information abnormality flag 74g is cleared to "0" after the setting change process (FIG. 15) is completed.

(11) Starting the supply of operating power in a situation where the setting key inserted into the setting key insertion hole 57 is turned ON is not limited to the setting change operation, and the reset button 56 is pressed. The setting change operation may be the start of the supply of operating power in the state of operation, and the supply of operating power is stopped in the state in which the setting key is turned ON and the reset button 56 is pressed. The configuration may be such that what is started is a setting change operation. In this case, there is a high possibility that the setting change process (FIG. 15) is started while the reset button 56 is being pressed. Before the determination of whether or not the reset button 56 has been pressed is first performed, the identification of the pressing operation of the reset button 56 in the sensor monitoring process (FIG. 20) of the timer interrupt process (FIG. 19) is performed a predetermined number of times. By doing so, it is possible to prevent the set value to be selected from being changed by the continued press operation of the reset button 56 .

(12) The main RAM 74 is not limited to the configuration in which the reset current storage area 74h and the previous reset storage area 74i are provided, and only the previous reset storage area 74i is provided, and timer interrupt processing (FIG. 19) is provided. ), when it is specified that the reset button 56 is pressed in the sensor monitoring process (FIG. 20), "1" is set in the previous reset storage area 74i to indicate that the reset button 56 is not pressed. If specified, the previous reset storage area 74i may be cleared to "0". In this case, in step S409 in the setting change execution process (FIG. 18), information is received from the reset button 56 in a situation where information indicating that the reset button 56 has not been pressed is not stored in the previous reset storage area 74i. When the signal becomes HI level corresponding to the pressing operation of the reset button 56, it is determined that the pressing operation of the reset button 56 is started, and the set value to be selected is changed. In this configuration, one timer interrupt process (FIG. 19) must be executed from the start of the setting change process (FIG. 15) to the first execution of step S409. Therefore, it is possible to prevent the setting value to be selected from being changed by the continued pressing operation of the reset button 56 when the setting change process (FIG. 15) is started.

(13) When the supply of operating power to the main MPU 72 is started, both the current reset storage area 74h and the previous reset storage area 74i are stored in the internal function setting process (step S103) of the main process (FIG. 10). may be set to "1", or only the reset current storage area 74h may be set to "1". In this case, even if the process of step S402 is not executed in the setting change execution process (FIG. 18), the selection is made by pressing the reset button 56 continued when the setting change process (FIG. 15) is started. It is possible to prevent the target set value from being changed.

(14) In a configuration in which the execution content of the effect executed on the image display device 63 can be selected by the operation of the selection button by the player, the selection can be made by continuing the operation of the selection button started before the selectable state starts. Processing for identifying whether or not the reset button 56 has been pressed in the setting change execution processing (FIG. 18) of the first embodiment in order to prevent the execution content of the target effect from being switched. Configuration (steps S402 and S406) may be applied.

(15) A configuration may be adopted in which the process of step S311 is not executed in the setting change process (FIG. 15). In this case, when the clearing process (steps S301 to S307) of the storage area of the main side RAM 74 in the setting change process (FIG. 15) is executed, the door state area 74e is cleared to "0" and the door state area 74e is cleared. is "0" until the next monitoring process for the door opening sensor 16 (FIG. 22) is performed. In this configuration, "open information" is set in the door state area 74e when the front door 12 is identified as open, and the door state is set when the front door 12 is identified as closed. By setting both of the "close information" set in the area 74e to information other than "0", the front door 12 is opened after the clearing process (steps S301 to S307) of the storage area of the main side RAM 74 is executed. When it is specified by the monitoring process (FIG. 22) of the door opening sensor 16 that the state is in the state, an opening command is transmitted to the effect side MPU 92, and the clearing process of the storage area of the main side RAM 74 (step S301 to step S307). is executed, a closing command is transmitted to the effect side MPU 92 when it is specified by the monitoring process (FIG. 22) of the door opening sensor 16 that the front door 12 is in a closed state. Regardless of whether or not the setting change process (FIG. 15) is being executed by the main side MPU 72, the effect side MPU 92, when receiving the open command, starts the door opening notification, and issues the closing command. By configuring to start the door closing notification when it is received, the notification corresponding to the state of the front door 12 after the clearing process (steps S301 to S307) of the storage area of the main side RAM 74 is executed. It is possible to make it possible to

(16) Even if the information set in the door state area 74e in step S311 in the setting change process (Fig. 15) is not reset state information but "open information" indicating that the front door 12 is open, good. In this case, if the front door 12 is closed when the setting change process (FIG. 15) ends, a closing command is transmitted to the production side MPU 92, and door closing notification is executed. Further, the information set in the door state area 74e at step S311 in the setting change process (FIG. 15) may be "closed information" indicating that the front door 12 is closed instead of the reset state information. . In this case, if the front door 12 is open when the setting change process (FIG. 15) ends, an open command is transmitted to the production side MPU 92, and the door opening notification is executed.

(17) The timing at which the value of the bet number setting counter 74a is stored in the bet number history counter 74f in the normal process (FIG. 25) is not limited to the timing after the medium giving process (step S910) is executed. For example, it may be the timing before the winning lottery process (step S906) is started, or it may be the timing when the rotation of some of the reels 32L, 32M, and 32R is stopped. It may be the timing when the rotation of 32M and 32R is stopped.

(18) When the clearing process at the end of the bonus (FIG. 57) is executed, a turn-off instruction command is transmitted to the production side MPU 92, and when the production side MPU 92 receives the turn-off instruction command, the upper lamp 61 is turned off. It may be configured to execute processing and blackout processing of the image display device 63 . In this case, when the final game in the pseudo-bonus state ST4 ends, the bet display section 64 and the combined display section 66 are turned off, and the upper lamp 61 is turned off and the image display device 63 is turned to black. Out state. This makes it possible for the player to clearly recognize that the pseudo-bonus state ST4 is over.

(19) In addition to or instead of the configuration in which the clearing process at the end of the bonus (FIG. 57) is executed when the final game in the pseudo-bonus state ST4 ends, clearing at the end of the bonus when the AT state ST5 ends The configuration may be such that the process (FIG. 57) is executed.

(20) When a freeze period is set with the fact that a direct hit lottery results in a direct hit lottery process and the transition to the pseudo-bonus state ST4 is confirmed, a pseudo-bonus that is the next game to the game in the freeze period. Instead of preventing the occurrence of the freeze period in the first game in the state ST4, if any freeze period occurs, the freeze period will remain within a predetermined number of games from the game in which the freeze period occurred. may be configured to prevent the occurrence of the freeze period even if the occurrence of the In this case, with the occurrence of the freeze period as a trigger, the occurrence of a new freeze period is prevented over a predetermined number of games. The predetermined number of games is arbitrary, and may be one game, two games, or three or more games.

(21) In a configuration where there are multiple types of triggers that cause a freeze period within the scope of one game, if a freeze period occurs once within the scope of one game, a further freeze period will occur in that game. A configuration in which the occurrence is prevented may be adopted. This makes it possible to prevent the freeze period from occurring multiple times within the range of one game.

(22) The period from when the reels 32L, 32M, and 32R start rotating until the next reels 32L, 32M, and 32R start rotating is longer than a predetermined wait period (for example, 4.1 seconds). , when the game is started, the start of rotation of the reels 32L, 32M, 32R in the current game is on standby until the predetermined wait period elapses from the previous timing of starting rotation of the reels 32L, 32M, 32R. If a wait period equal to or longer than the regulating period occurs from the establishment of a predetermined game start condition to the start of rotation of the reels 32L, 32M, and 32R, a trigger for the occurrence of a freeze period occurs in the predetermined game. Even if it does, it may be configured such that the occurrence of the freeze period is prevented. As a result, it is possible to prevent the waiting period of the game from occurring excessively. The regulation period must be shorter than the predetermined wait period, and may be, for example, 1 second, 2 seconds, or 3 seconds.

(23) The number-of-games mode lottery table 112 is configured so that the determination values LV are collectively set for each of the first to fifth number-of-games modes to be selected in the lottery processing of the number-of-games mode. may be configured such that the determination values LV are collectively set in . In this case, it is preferable that the determination values LV aggregated for each set value are arranged so that the order of the addresses in the number-of-games mode lottery table 112 is either ascending order or descending order of the set value. Note that this configuration may be applied to the winning rate mode lottery table 113 .

(24) In the number-of-games mode lottery process, if none of the data set in the number-of-games mode lottery table 112 is won, the first number-of-games mode is selected. The decision value LV for the first number-of-games mode may also be set in the number-of-games mode lottery table 112 . In this case, the number-of-games mode lottery table 112 is set with determination values LV corresponding to the first to fifth number-of-games modes. You will be elected to one of the data set in. Note that this configuration may be applied to the winning rate mode lottery table 113 .

(25) When a 7-bit random number is extracted in the lottery process of the winning rate mode, the upper byte of the 2-byte second random number updated in the second random number circuit 76 is used. , and a configuration in which the lower byte of the 2-byte second random number is used may be used. Further, when a 1-byte random number is extracted in the lottery process of the number-of-games mode, the upper byte of the 2-byte second random number updated in the second random number circuit 76 is used. The configuration is not limited to this, and the lower byte of the 2-byte second random number may be used.

(26) In the lottery process of the number-of-games mode, one of the upper and lower bytes of the 2-byte second random number updated by the second random number circuit 76 is used to extract a 1-byte random number. In the mode lottery process, the other of the upper byte and lower byte of the 2-byte second random number updated by the second random number circuit 76 may be used to extract a 7-bit random number. In addition, a configuration in which one of the upper byte and the lower byte of the 2-byte second random number is used to extract a predetermined random number and the other is used to extract a specific random number is referred to as the predetermined random number. Instead of being applied when the number of bits differs from that of the specific random number, it may be applied when the number of bits of these predetermined random numbers and the specific random number are the same.

(27) When a 7-bit random number is extracted in the lottery process in the winning rate mode, the most significant bit of the high-order bytes of the second random number is cleared to "0", but this is not the only option. Instead, a 7-bit random number may be extracted by clearing the least significant bit to "0" and then shifting it bit by bit to the lower side.

(28) Although the 7-bit random number is handled as 1-byte data in the lottery process of the winning rate mode, it is not limited to this, and may be handled as 7-bit data.

(29) In the pseudo-bonus state ST4, the output level of the first external signal is set to HI level, but the present invention is not limited to this. It may be configured to be maintained at the LOW level. In this case, there is no need to switch the output level of the first external signal from the HI level to the LOW level when the AT state ST5 is initiated, and the output level of the first external signal is switched to the LOW level when the AT state ST5 is initiated. to HI level, when the AT state ST5 is started, that is, when the second output start flag of the main RAM 74 is set to "1", the output timing counter of the main RAM 74 is set to "1". ” should be set. In this configuration, the output level of the second external signal is maintained at the HI level in the pseudo-bonus state ST4, and the output level of the second external signal is maintained in the game states other than the pseudo-bonus state ST4 including the AT state ST5. It may be configured to be maintained at the LOW level.

(30) A termination signal can be externally output separately from the first external signal and the second external signal, and when the AT state ST5 is terminated, the output level of the termination signal is switched from the LOW level to the HI level, and the HI level is switched. may be maintained for a predetermined period of time (for example, two seconds).

(31) When the AT state ST5 starts, or when one set ends and a new set starts in the AT state ST5, the period during which the output level of the first external signal is maintained at the LOW level is 1. The configuration is not limited to a game. For example, at the start of a game following the game in which the output level of the first external signal is changed from the HI level to the LOW level, the rotation of the reels 32L, 32M, and 32R is started. The output level of the first external signal may be changed to the HI level during the game, such as when the reels 32L, 32M, and 32R stop rotating.

Further, the output level of the first external signal may be changed to HI level after two games or three games after the game in which the output level of the first external signal is changed from HI level to LOW level. For example, in a configuration in which the output level of the first external signal is changed from HI level to LOW level after two games, the AT state ST5 is started. or when one set ends and a new set starts in the AT state ST5, the output timing counter of the main side RAM 74 is set to "3" and the value of the output timing counter is "3". When step S3302 of the external output processing (FIG. 62) is executed and the value of the output timing counter becomes "2", the output level of the first external signal is changed from HI level to LOW level, and the output timing counter is is "2", step S3302 of the external output processing (FIG. 62) is executed and the value of the output timing counter becomes "1", the output level of the first external signal is set to LOW level. , and when the value of the output timing counter is "1" and step S3302 of the external output processing (FIG. 62) is executed and the value of the output timing counter becomes "0", the first external The configuration may be such that the output level of the signal is changed from LOW level to HI level.

(32) The value of the output timing counter of the main side RAM 74 does not have to be a subtractive formula, and may be an additive formula. In this configuration, the output timing counter of the main side RAM 74 is set to "1" when the AT state ST5 is started, or when one set is finished and a new set is started in the AT state ST5. In the external output processing (FIG. 62), when the value of the output timing counter is "1", the output level of the first external signal is changed from HI level to LOW level and the value of the output timing counter is changed to 1. When the value of the output timing counter is "2", the output level of the first external signal is changed from LOW level to HI level and the value of the output timing counter is cleared to "0". , the output level of the first external signal becomes HI level after the LOW level maintenance period in one game.

(33) Although the output level of the first external signal is switched between the LOW level and the HI level, the present invention is not limited to this. may be switched between a state in which is output to the outside. In this case, the state in which the first external signal is not externally output corresponds to the state in which the output level of the first external signal is LOW in the first embodiment, and the state in which the first external signal is externally output corresponds to the state in which the first external signal is externally output. This corresponds to the state in which the output level of the first external signal in Embodiment 1 is HI level. Also, the relationship between HI and LOW of the output level of the first external signal may be the opposite relationship to that in the first embodiment.

(34) Although the output level of the second external signal is switched between the LOW level and the HI level, the present invention is not limited to this. may be switched between a state in which is output to the outside. In this case, the state in which the second external signal is not externally output corresponds to the state in which the output level of the second external signal is LOW in the first embodiment, and the state in which the second external signal is externally output corresponds to the state in which the second external signal is externally output. This corresponds to the state in which the output level of the second external signal in Embodiment 1 is HI level. Also, the relationship between HI and LOW of the output level of the second external signal may be the opposite relationship to that in the first embodiment.

(35) The game states distinguished by using the judgment value counter 74j are the CB state, the non-CB state and the CB winning data are stored, and the non-CB state and the CB winning data are stored. not limited to no For example, instead of the CB state, there is a BB state that is advantageous to the player and an RB state that is advantageous to the player but is less advantageous than the BB state. A state in which BB winning data is stored, a non-CB state in which RB winning data is stored, and a non-CB state in which both BB winning data and RB winning data are stored. A configuration may be adopted in which the non-existent state is distinguished using the determination value counter 74j.

(36) The process to be used to change the execution mode of the process using the judgment value counter 74j is not limited to the winning lottery process (FIG. 34). It may be a process for setting a freeze period or a process for determining the number of game media to be awarded when a prize corresponding to the award of game media is generated.

(37) The determination value counter 74j is configured to add a value corresponding to the presence or absence of the CB state, the presence or absence of the CB winning data, and the number of bets, but the determination value counter 74j has an initial value of 1 or more. It may be configured such that values corresponding to the presence/absence of the CB state, the presence/absence of the CB winning data, and the number of bets are subtracted from the initial values.

(38) The determination value counter 74j is configured to add values corresponding to the presence or absence of CB state, presence or absence of CB winning data, and the number of bets. , the setting value to be used may be added to the determination value counter 74j. In this case, it is possible to use the judgment value counter 74j to draw a lottery according to the set value in the winning lottery process (FIG. 34).

(39) The data groups 101a to 101q for IV=1 to 17 are configured so that the point value data 102c to 104c are not set with the point value PV corresponding to the gaming situation where the game is definitely lost, but this is not the only option. A point value PV corresponding to a game situation in which a game is guaranteed to be lost without being played may be set to "0". In this case, it is possible to acquire the point value PV from the point value data 102c to 104c of the data groups 101a to 101q for IV=1 to 17 even in a gaming situation where the player is definitely out of the game.

(40) The configuration is not limited to the configuration in which the effective line is only one main line ML, and the configuration may be such that the effective line is two, three, or four or more. In this case, the number of activated lines may increase as the number of betted game media increases, or the maximum number of activated lines may be set regardless of the number of betted game media.

(41) In each of the above embodiments, the configuration is such that the privilege of paying out medals is awarded when a small winning combination is established, but the configuration is not limited to such a configuration, and a configuration in which some kind of privilege is awarded to the player. If it is For example, it may be configured such that prizes other than medals are paid out when a minor win is established. In addition, in a slot machine that does not have actual medal insertion and medal payout functions and that manages the medals owned by the player as credits, an increase in the number of credited medals corresponds to the granting of benefits.

(42) The present invention may be applied to a so-called B-type slot machine, a C-type, a combination of A and C types, a combination of B and C types, as well as RT games, CT games or AT machines. The present invention may be applied to any slot machine, such as a type equipped with games. Also, a configuration may be adopted in which there is a bonus state that is advantageous to the player.

(43) The symbols on the reels 32L, 32M, 32R are not limited to pictures, numbers, letters, etc., and may be geometric lines, graphics, and the like. Also, it is possible to compose a pattern with light, color, etc., and a pattern can be configured with a three-dimensional shape, etc., or a composite of these can compose a pattern. In other words, the pattern may be anything as long as it functions as identifiable information.

(44) In each of the above-described embodiments, a specific example of the slot machine 10 has been shown, but the present invention may be applied to a pachinko machine in which games are played using game balls as game media. You may apply it to the game machine of the form which fused with the machine.

<Invention group extracted from the above embodiment>
Hereinafter, the features of the group of inventions extracted from the above-described embodiments will be described while showing effects and the like as necessary. In the following, for ease of understanding, configurations corresponding to the above-described embodiments are appropriately shown in parentheses or the like, but are not limited to the specific configurations shown in parentheses or the like.

<Characteristic group A>
Feature A1. Control means (main side MPU 72) for controlling games,
A signal transmission means (power failure monitoring circuit 54b) capable of transmitting a predetermined signal (power failure signal) to the control means;
with
In the gaming machine, wherein the control means is configured such that processing is not executed based on the reception status of the predetermined signal becoming a specific status (receipt of a LOW level power failure signal),
The control means is standby means (in the first embodiment, processing of steps S101 and S102 in the main MPU 72) that waits the progress of the process until a predetermined progress condition is satisfied when the supply of operating power is started. , a function of executing the processing of steps S4201 to S4205 in the main MPU 72 in the sixth embodiment, and a function of executing the processing of steps S4301 and S4302 in the main MPU 72 in the seventh embodiment). A gaming machine characterized by comprising:

According to feature A1, in the configuration in which processing is not executed by the control means based on the reception state of the predetermined signal becoming the specific state, the predetermined progress condition is satisfied when the supply of the operating power is started. The progress of the process waits until it is established. As a result, it is possible to prevent the process from proceeding despite the fact that the receiving condition of the predetermined signal is not stable when the supply of operating power is started. Therefore, when the supply of the operating power is started, the receiving condition of the predetermined signal becomes unstable due to the fact that the receiving condition of the predetermined signal is not stable while the processing is in progress. It is possible to prevent a state in which processing is not executed at the timing. Therefore, it is possible to suitably execute the processing when the supply of operating power is started.

Feature A2. The waiting means is characterized in that, when the supply of operating power is started, the progress of the process is made to wait so that the process can be prevented from progressing until the reception condition of the predetermined signal is stabilized. The game machine according to feature A1.

According to feature A2, when the supply of operating power is started, it is possible to prevent the processing from proceeding until the reception state of the predetermined signal is stabilized.

Feature A3. The control means is
means for executing interrupt processing based on the passage of the interrupt handling period (function for executing timer interrupt processing in the main MPU 72);
a situation specifying means (a function for executing the process of step S201 in the main MPU 72) for specifying whether or not the receiving situation of the predetermined signal in the interrupt process is the specified situation;
Means (processing after step S202 in the main MPU 72) for causing a state in which processing is not executed based on the fact that the reception state of the predetermined signal is in the specific state is specified by the situation specifying means function) and
with
The gaming machine according to feature A1 or A2, wherein the waiting means waits the progress of the processing before the execution of the interrupt processing is permitted when the supply of operating power is started.

According to the feature A3, in the configuration in which the processing is not executed based on the fact that the reception state of the predetermined signal is identified as the specific state in the interrupt processing, the supply of the operating power is started. The progress of the processing is waited before the execution of the interrupt processing is permitted. As a result, it is possible to avoid specifying whether or not the reception state of the predetermined signal is in the specific state in the interrupt process before the reception state of the predetermined signal is stabilized. .

Feature A4. The signal transmitting means changes the reception status of the predetermined signal in the control means from a predetermined status (reception of a power failure signal of HI level) to the specific status when the supply of operating power is stopped. The gaming machine according to any one of features A1 to A3, characterized by:

According to feature A4, when the supply of operating power is stopped, the reception state of the predetermined signal changes from the predetermined state to the specific state, and the control means is in a state where the processing is not executed when the reception state of the predetermined signal changes to the specific state. becomes. As a result, when the supply of operating power is stopped, the control means can be set to a state in which the process is not executed. In this case, it is assumed that the receiving condition of the predetermined signal is not stable immediately after the supply of operating power is started. On the other hand, with the configuration of feature A1, when the supply of operating power is started, the progress of the process is waited until a predetermined progress condition is satisfied. As a result, it is possible to prevent the process from proceeding despite the fact that the receiving condition of the predetermined signal is not stable when the supply of operating power is started.

Feature A5. The standby means cancels the state of waiting for the progress of processing based on confirmation that the reception state of the predetermined signal has reached the predetermined state when the supply of operating power is started ( The gaming machine according to feature A4, characterized by: a function of executing the process of step S102 of the main side MPU 72 in the first embodiment.

According to feature A5, when the supply of operating power is started, the state of waiting for progress of processing is canceled based on confirmation that the reception state of the predetermined signal has reached the predetermined state. As a result, it is possible to prevent the processing from proceeding when the reception state of the predetermined signal can become a specific state when the supply of operating power is started.

Feature A6. The standby means continuously confirms that the reception state of the predetermined signal is the predetermined state over a predetermined number of confirmation times, which is a plurality of times, when the supply of operating power is started. The gaming machine according to feature A4 or A5, wherein the state of waiting for the progress of the process is canceled (function of executing the process of step S4205 of the main MPU 72 in the sixth embodiment).

According to feature A6, it is based on the fact that it is continuously confirmed over a predetermined number of times, which is a plurality of times, that the reception state of the predetermined signal has become the predetermined state when the supply of the operating power is started. to cancel the waiting state for the progress of processing. As a result, it is possible to prevent the processing from proceeding when the reception state of the predetermined signal can become a specific state when the supply of operating power is started.

Feature A7. The control means is
means for executing interrupt processing based on the passage of the interrupt handling period (function for executing timer interrupt processing in the main MPU 72);
a first specifying means (a function of executing the process of step S201 in the main MPU 72) for specifying whether or not the reception status of the predetermined signal is the specified status in the interrupt process;
Means (main-side MPU 72 from step S202 onwards of step S202 in main-side MPU 72) for causing a state in which processing is not executed based on the first specifying means specifying that the reception status of the predetermined signal is the specified status function to perform processing) and
with
The standby means
Means for waiting the progress of processing before the execution of the interrupt processing is permitted when the supply of operating power is started (in the first embodiment, the function of executing the processing of step S102 in the main MPU 72, In the sixth embodiment, the function of executing the process of step S4205 in the main MPU 72);
A second identifying means for identifying whether or not the reception state of the predetermined signal is the predetermined state while waiting for the progress of the process (in the first embodiment, the main MPU 72 executes the process of step S101). a function to execute the processing of step S4201 in the main MPU 72 in the sixth embodiment);
Means (first embodiment) for canceling the state of waiting for the progress of the processing based on the second identifying means identifying that the reception state of the predetermined signal is the predetermined state features A4 to A6 characterized by having a function of making an affirmative determination in step S102 in the main MPU 72 in the sixth embodiment, and a function of making an affirmative determination in step S4205 in the main MPU 72 in the sixth embodiment. The gaming machine according to any one of 1.

According to the feature A7, in the configuration in which the processing is not executed based on the fact that the reception state of the predetermined signal is identified as the specific state in the interrupt processing, the supply of the operating power is started. The progress of the processing is waited before the execution of the interrupt processing is permitted. As a result, it is possible to avoid specifying whether or not the reception state of the predetermined signal is in the specific state in the interrupt process before the reception state of the predetermined signal is stabilized. .

Further, in the state where the progress of the processing is waiting, it is confirmed whether or not the reception state of the predetermined signal is the predetermined state in the processing in the state of waiting for the progress, and the reception state of the predetermined signal is confirmed. The state of waiting for the progress of the process is canceled based on the fact that the situation is confirmed. As a result, even in a configuration in which interrupt processing is not executed in a state in which the progress of processing is on standby, it is possible to identify whether or not the reception state of the predetermined signal has stabilized. It is possible to proceed with processing in a stable situation.

Feature A8. The control means includes means for executing interrupt processing based on the passage of the interrupt handling period (function for executing timer interrupt processing in the main MPU 72),
The standby means waits the progress of the process at the start of supply of operating power until the interrupt process is executed once when the supply of operating power is started (main MPU 72 in the seventh embodiment). A gaming machine according to feature A1 or A2, characterized by:

According to feature A8, when the supply of operating power is started, the progress of the process at the start of supply of operating power is waited until the interrupt process is executed once. As a result, it is possible to prevent the process at the time of starting the supply of operating power from proceeding until the receiving condition of the predetermined signal is stabilized, and to cancel the waiting state for the progress of the process by the existing system. It is possible to generate an interrupt using a configuration for executing interrupt processing.

For the configuration of features A1 to A8, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group B>
Feature B1. Based on the occurrence of a predetermined event (power failure flag information anomaly, checksum anomaly, set value anomaly), the progress of the game is blocked by a predetermined event response state (the main MPU 72 makes an affirmative determination in step S112). In a game machine that becomes a state),
storage execution means (function for executing the process of step S104 of the main MPU 72 in the first embodiment) for storing the event correspondence information in the event correspondence storage area (information abnormality flag 74g);
After the event correspondence information is stored in the event correspondence storage area by the storage execution means, an event occurrence identification means (the main MPU 72 in the first embodiment) identifies whether or not the predetermined event has occurred. function to execute the processing of steps S105 to S109);
Information erasure means for erasing the event correspondence information from the event correspondence storage area based on the fact that the event occurrence identification means has identified that the predetermined event has not occurred. a function of executing the process of step S110 of the side MPU 72);
After the event occurrence identifying means specifies whether or not the predetermined event has occurred, the event response information is stored in the event response storage area. a state handling means (a function of executing the processing of steps S118 and S119 of the main MPU 72 in the first embodiment) to bring about a state;
A game machine characterized by comprising:

According to feature B1, in a configuration in which the predetermined event response state is established based on the fact that event response information is stored in the event response storage area, before determining whether or not a predetermined event has occurred, the event response storage area is stored in the event correspondence information, and thereafter the event correspondence information is erased from the event correspondence storage area based on the identification that the predetermined event has not occurred, while the occurrence of the predetermined event is identified. When the event response storage area stores the event response information, the predetermined event response state is established. As a result, unless the event occurrence identification means identifies that the predetermined event has not occurred, the event correspondence storage area is in a state where the event correspondence information is stored. state. Therefore, even though a predetermined event has actually occurred, it is possible to enter a state corresponding to the predetermined event when the event occurrence identification means fails to identify due to the occurrence of electrical noise. Become. Therefore, it becomes possible to suitably execute the process.

Feature B2. The predetermined events include at least a first predetermined event (power failure flag information abnormality) and a second predetermined event (checksum abnormality),
The event occurrence identifying means includes:
A first event occurrence specifying means (first embodiment) for specifying whether or not the first predetermined event has occurred after the event correspondence information is stored in the event correspondence storage area by the storage execution means. a function of executing the process of step S105 of the main MPU 72 in
Second event occurrence specifying means (first embodiment) for specifying whether or not the second predetermined event has occurred after the event correspondence information is stored in the event correspondence storage area by the storage execution means a function of executing the processing of steps S106 to S108 of the main side MPU 72 in
with
The information erasing means does not erase the event corresponding information from the event corresponding storage area when the first event occurrence identifying means identifies that the first predetermined event has occurred, when the occurrence of the second predetermined event is specified by the second event occurrence specifying means, the event correspondence information is not erased from the event correspondence storage area;
The state handling means determines whether or not the second predetermined event has occurred after the first event occurrence specifying means has specified whether or not the first predetermined event has occurred, and the second event occurrence specifying means has determined whether the second predetermined event has occurred. The predetermined event response state is set based on the event response information being stored in the event response storage area after it is determined whether or not the event has occurred. The gaming machine according to feature B1.

According to feature B2, whether or not the first predetermined event has occurred in the configuration in which the predetermined event response state occurs regardless of whether the first predetermined event has occurred or the second predetermined event has occurred. The event correspondence information is stored in the event correspondence storage area before the identification of the second predetermined event and the identification of whether or not the second predetermined event has occurred, and it is identified that neither the first predetermined event nor the second predetermined event has occurred. Then, the event correspondence information is erased from the event correspondence storage area. This makes it possible to reduce the required storage capacity compared to a configuration in which event-corresponding storage areas are provided for each of the first predetermined event and the second predetermined event.

Feature B3. means for executing the processing (main processing) at the start of supply of operating power when the supply of operating power is started (function for executing the main processing of the main MPU 72 in the first embodiment);
Characteristic B1 or B2, characterized in that each of the processing of the memory executing means, the event occurrence identifying means, the information erasing means, and the state handling means is executed in the process when supply of operating power is started. The gaming machine described in .

According to the feature B3, if the predetermined event occurs when the supply of the operating power is started, the state corresponding to the predetermined event occurs. It becomes possible to deal with it.

Feature B4. After the event occurrence identifying means identifies whether or not the predetermined event has occurred, and before the state handling means executes the processing for establishing the predetermined event corresponding state, trigger identification means (function for executing the process of step S111 of the main MPU 72 in the first embodiment) for identifying whether or not a special execution trigger (setting change operation) has occurred;
Special processing execution means (the step of the main MPU 72 in the first embodiment) that executes special processing (setting change processing) based on the fact that the special execution trigger has occurred is specified by the trigger specifying means. a function to execute the process of S120);
with
Even if the event correspondence information is stored in the event correspondence storage area after the event occurrence identification means identifies whether or not the predetermined event has occurred, the state correspondence means , the game according to any one of features B1 to B3, characterized in that when it is specified by the trigger specifying means that the special execution trigger has occurred, the state corresponding to the predetermined event is prevented. machine.

According to feature B4, in the configuration in which special processing is executed when a special execution opportunity has occurred, even if the event correspondence information is stored in the event correspondence storage area, if the special execution opportunity has occurred. , priority is given to execution of special processing over setting of the predetermined event response state. This makes it possible to give priority to the execution of the special process in response to the occurrence of the special execution opportunity.

Feature B5. Means (a role in the main MPU 72) for executing a profit giving process (lottery process for a role) in a mode corresponding to a setting value set as a target to be used from among a plurality of stages of setting values corresponding to the player's advantage. function to execute the lottery process),
The gaming machine according to feature B4, wherein the special process is a changeable process (setting change process) in which the setting value to be used can be changed.

According to feature B5, it is possible to give priority to the execution of changeable processing that can change the set value to be used over the setting of the predetermined event response state.

Feature B6. Initializing means for executing the initialization of the storage area including the event corresponding storage area when the changeable process is executed (the main MPU 72 in the first embodiment executes the processing of steps S301 to S307 The gaming machine according to feature B5, characterized in that it has a function to play.

According to the feature B6, when the changeable process is executed, the memory area including the event correspondence storage area is initialized. Even if the information is stored, it is possible to put the event correspondence information into a state in which it is not stored after the changeable process is executed.

Feature B7. The initialization means performs the initializing when the event correspondence information is stored in the event correspondence storage area more than when the event correspondence information is not stored in the event correspondence storage area. The gaming machine according to feature B6, wherein the number of storage areas to be converted is increased.

According to feature B7, in a configuration in which execution of a changeable process is given priority even when the event corresponding information is stored in the event corresponding storage area, when the changeable process is executed, the event corresponding information is When event correspondence information is stored, the number of memory areas to be initialized is greater than when event correspondence information is not stored. This makes it possible to carefully initialize the storage area when a predetermined event occurs.

Feature B8. The game machine according to any one of features B1 to B7, wherein the predetermined event is an information abnormality in a storage means provided with the event correspondence storage area.

According to feature B8, it is possible to suitably deal with the occurrence of information abnormality in the storage means.

For the configuration of features B1 to B8, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group C>
Feature C1. Means (a role in the main MPU 72) for executing a profit giving process (lottery process for a role) in a mode corresponding to a setting value set as a target to be used from among a plurality of stages of setting values corresponding to the player's advantage. function to execute the lottery process) and
Changeable means (first implementation function to execute setting change processing of the main side MPU 72 in the form);
Abnormality identifying means for identifying whether or not a predetermined abnormality (power failure flag information abnormality, checksum abnormality, setting value abnormality) has occurred (steps S105 to S110 of the main MPU 72 in the first embodiment) functions to perform) and
Based on the occurrence of the predetermined abnormality specified by the abnormality identification means, the state handling means (the processing of steps S118 and S119 of the main MPU 72 in the first embodiment) to set the abnormality handling state functions to perform) and
with
The changeable means executes the changeable process when the change response opportunity has occurred even if the abnormality identification means has identified that the predetermined abnormality has occurred. game machine.

According to the feature C1, since the profit giving process is executed in a manner corresponding to the setting value set as the object to be used, the player can understand that the setting value set as the object to be used is advantageous. It will be expected. In addition, since the abnormality handling state is entered based on the identification of the occurrence of the predetermined abnormality, it is possible to deal with the occurrence of the predetermined abnormality. In this case, even if it is specified that a predetermined abnormality has occurred, if a change response opportunity has occurred, a changeable process is executed that allows the setting values to be used to be changed. be. As a result, it is possible to give priority to the execution of the changeable process rather than the abnormality handling state, so that the execution of the changeable process is hindered by the occurrence of the predetermined abnormality even though the change handling opportunity has occurred. It is possible to prevent it from being lost. Therefore, it is possible to ensure that the processing is preferably executed.

Feature C2. The gaming machine according to feature C1, wherein when the changeable process is executed in a situation where the occurrence of the predetermined abnormality is identified by the abnormality identification means, the abnormality handling state is not established.

According to the characteristic C2, even if it is specified that a predetermined abnormality has occurred, if the changeable process is executed, the abnormality handling state does not occur, so that after the changeable process is executed It is possible to prevent an abnormal response state from occurring.

Feature C3. When the abnormality identification means identifies that the predetermined abnormality has occurred, the abnormality information is stored in the abnormality information storage area (information abnormality flag 74g),
The state handling means establishes the anomaly handling state based on the fact that the anomaly information is stored in the anomaly information storage area,
This game machine has a predetermined erasing means (a function of executing the processing of steps S301 to S307 of the main side MPU 72 in the first embodiment) for erasing the abnormal information when the changeable processing is executed. The gaming machine according to feature C1 or C2, characterized in that

According to feature C3, the abnormality information is deleted when the changeable process is executed. As a result, it is possible to prevent an abnormality handling state from occurring when the changeable process is executed even in a situation where it is specified that a predetermined abnormality has occurred.

Feature C4. The abnormal information storage area is provided in an information storage means (main side RAM 74) having a plurality of storage areas,
When the changeable process is executed and the abnormality information is stored in the abnormality information storage area, the predetermined erasing means is configured to reduce specific erasing means (steps S302 and The gaming machine according to feature C3, further comprising: a function of making an affirmative determination in each step S303 and executing the processing of steps S305 to S307.

According to feature C4, in the configuration in which the information in the storage area of the information storage means is erased when the changeable process is executed, the abnormality information is stored in the abnormality information storage area when the changeable process is executed. If the error information is not stored in the error information storage area, the number of storage areas subject to erasing processing that enables information to be erased is greater than when the error information is not stored in the error information storage area. In this case, it is possible to carefully erase the information in the storage area of the information storage means when the changeable process is executed.

Feature C5. The gaming machine according to feature C4, wherein the specific erasing means executes the erasing process for all of the plurality of storage areas provided in the information storage means.

According to feature C5, when changeable processing is executed in a situation where it is specified that a predetermined abnormality has occurred, erasing processing is performed on all of the plurality of storage areas provided in the information storage means. Since it is executed, it is possible to cope with the occurrence of the predetermined abnormality.

Feature C6. When the changeable process is executed, the specific erasing means has an erasing trigger (an ON operation of the reset button 56) even in a situation where the abnormality information is not stored in the abnormality information storage area. The gaming machine according to feature C4 or C5, wherein the same storage area as in the case where the abnormality information is stored in the abnormality information storage area is subject to the execution of the erasing process.

According to feature C6, erasure processing is executed for many storage areas when changeable processing is executed not only when a predetermined abnormality occurs but also when an erasure trigger has occurred. . As a result, it is possible to include not only the occurrence of a predetermined abnormality but also the occurrence of an erasure opportunity when the changeable processing is executed and the erasure processing is executed for many storage areas. .

Feature C7. The gaming machine according to any one of features C1 to C6, wherein the predetermined abnormality is an information abnormality in information storage means (main RAM 74).

According to the feature C7, it is possible to suitably deal with an information abnormality in the information storage means.

For the configuration of features C1 to C7, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group D>
Feature D1. A special setting means (in step S111 of the main MPU 72 in the first embodiment) that sets a special execution situation (a situation in which a setting change process is executed) based on the occurrence of a special execution opportunity (setting change operation). function to make an affirmative judgment by
Contents (set value) of special information stored in the special storage area (set value storage area of the main RAM 74) based on the operation of the predetermined operation means (reset button 56) being identified in the special execution situation (a function of executing the processing of step S410 of the main MPU 72 in the first embodiment) for updating the
with
When the special execution situation occurs while the operation of the predetermined operation means is continued, the update of the special information by the information update means is not executed by the operation of the predetermined operation means (first implementation). A game machine characterized in that it is step S402) of the main side MPU 72 in the form.

According to the feature D1, in the configuration in which the content of the special information is updated based on the fact that the operation of the predetermined operation means is specified in the special execution situation, the special execution situation is executed in the situation where the operation of the predetermined operation means is continued. In this case, the contents of the special information are not updated by the operation of the predetermined operation means. As a result, it is possible to prevent the content of the special information from being updated due to the operation of the predetermined operating means that does not intend to update the content of the special information. Therefore, it is possible to ensure that the processing is preferably executed.

Feature D2. Means (a role in the main MPU 72) for executing a profit giving process (lottery process for a role) in a mode corresponding to a setting value set as a target to be used from among a plurality of stages of setting values corresponding to the player's advantage. function to execute the lottery process),
the special execution situation is a situation in which the setting value can be changed;
The special information is information of the setting value to be selected,
The gaming machine according to feature D1, wherein the set value selected in the special execution situation is the object to be used.

According to feature D2, when a special execution situation occurs, the setting value to be selected is changed based on the operation of the predetermined operation means, and the setting value selected in the special execution situation is used. , the setting value to be used can be set as desired. In this case, if a special execution situation occurs while the operation of the predetermined operation means is continued without intending to change the setting value of the selection object, the setting that is the selection object by the operation of the predetermined operation means If the value is changed, there is a possibility that it will not be possible to suitably change the setting value. On the other hand, with the configuration of feature D1, when a special execution situation occurs in a situation where the operation of the predetermined operation means is continued, the setting value to be selected is changed by the operation of the predetermined operation means. do not have. As a result, it is possible to prevent the setting value of the selection object from being changed due to the operation of the predetermined operation means for which the change of the setting value of the selection object is not intended.

Feature D3. The special setting means sets the special execution status based on the occurrence of the special execution opportunity when supply of operating power is started,
The game machine responds to a predetermined operation different from setting the special execution status and updating the content of the special information based on the operation of the predetermined operation means when the supply of operating power is started. means for executing the processing (steps S305 to S307 after making an affirmative determination in step S303) (the main MPU 72 in the first embodiment makes an affirmative determination in step S303 and performs the processing of steps S305 to S307; function to execute).

According to feature D3, the predetermined operation corresponding process is executed based on the operation of the predetermined operation means when the supply of operating power is started. Thereby, the predetermined operation means operated to update the contents of the special information in the special execution situation is changed to the operation means for executing the predetermined operation corresponding process when the supply of the operating power is started. It becomes possible to use both. However, in this configuration, if the operation of the predetermined operation means for executing the predetermined operation corresponding process is continued even in the special execution situation, there is a risk that the operation of the predetermined operation means will update the contents of the special information. . On the other hand, with the configuration of the feature D1, when the special execution situation occurs while the operation of the predetermined operation means is continued, the contents of the special information are not updated by the operation of the predetermined operation means. . This makes it possible to prevent the content of the special information from being updated due to the operation of the predetermined operation means for executing the predetermined operation corresponding process.

Feature D4. an operation grasping means (a function of executing the processing of step S602 of the main MPU 72 in the first embodiment) for executing a grasping process (step S602) for grasping whether or not the predetermined operation means has been operated;
It has a plurality of result storage areas (reset current storage area 74h, previous reset storage area 74i) for storing information on the grasping result of the grasping process. Information storage means (main-side RAM 74) capable of specifying the comprehension result of the comprehension process;
Based on the execution of the grasping process, the grasping result information of the grasping process for a specific number of times (two times), which is a plurality of times including the current grasping process, is stored in the plurality of result storages. Means for making the state stored in the area (function for executing the processing of steps S601, S603 and S604 of the main MPU 72 in the first embodiment);
Identifying whether or not the content of the information stored in the plurality of result storage areas in the special execution situation is the operation corresponding content ("0" in the previous reset storage area 74i and "1" in the current reset storage area 74h) a means for executing the content specifying process (step S409) for performing the process (function for executing the process of step S409 of the main MPU 72 in the first embodiment);
with
The information updating means stores information stored in the special storage area on the basis that the content of the information stored in the plurality of result storage areas is specified in the content specifying process as the content corresponding to the operation. is to update the content of the special information in
By executing the grasping process before executing the first content specifying process in the special execution situation, when the special execution situation occurs in a situation where the operation of the predetermined operation means is continued, The game machine according to any one of features D1 to D3, wherein the information update means does not update the contents of the special information by operating the predetermined operation means.

According to the feature D4, whether or not the predetermined operation means has been operated is grasped in the grasping process, and the grasping results of the grasping process performed a plurality of times are stored in a plurality of result storage areas. Then, when the content of the information stored in the plurality of result storage areas is the content corresponding to the operation, the content of the special information is updated. Thereby, it is possible to update the contents of the special information once for one operation of the predetermined operation means. In this case, by executing the comprehension process before executing the first content specifying process in the special execution situation, when the special execution situation occurs while the operation of the predetermined operation means is continued, the predetermined In this configuration, the content of the special information is not updated by operating the operating means. In other words, with a simple configuration that ensures the execution of the grasping process before the first content specifying process is executed in the special execution situation, when the special execution situation occurs while the operation of the predetermined operation means is continued. It is possible to prevent the update of the contents of the special information from being executed by the operation of the predetermined operation means.

Feature D5. means for executing interrupt processing (timer interrupt processing) including the grasping processing (function for executing timer interrupt processing in the main MPU 72) based on the elapse of the interrupt handling period;
Until the interrupt process is executed before the first content specifying process in the special execution situation is executed, the progress of the process that can cause an interrupt of the interrupt process is waited, thereby preventing the operation of the predetermined operation means. The game according to feature D4, characterized in that, when the special execution situation occurs while the operation is being continued, the update of the special information by the information update means is not executed by the operation of the predetermined operation means. machine.

According to the characteristic D5, the progress of the process that can cause an interrupt of the interrupt process is waited until the interrupt process is executed before the first content specifying process in the special execution situation is executed. It becomes possible to secure execution.

Feature D6. Comprehension collateral means for executing the comprehension process at least once from when the content specifying process is executed once in the special execution situation to when the content specifying process is next executed (first embodiment) a function of executing the process of step S406 of the main MPU 72 in
Means for executing the comprehension process at least once before the first content specifying process in the special execution situation is executed, separately from the comprehension process by the comprehension collateral means a function of executing the process of step S402 of the side MPU 72).

According to feature D6, since the grasping process is executed at least once after the content specifying process is executed once in the special execution situation and before the next content specifying process is executed, one operation of the predetermined operation means is performed. On the other hand, it is possible to prevent the content of information stored in a plurality of result storage areas from being identified as the content corresponding to an operation from occurring more than once. In this case, the comprehension process is executed at least once before the first content specifying process is executed, in addition to the comprehension process. This makes it possible to prevent the execution of updating the contents of the special information by the operation of the predetermined operation means when the special execution situation occurs while the operation of the predetermined operation means is continued. .

For the configuration of features D1 to D6, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions according to the features of the feature group A, the feature group B, the feature group C, and the feature group D, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the game machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

<Characteristic group E>
Feature E1. An opening/closing body (front door 12) that can be opened and closed;
open detection means (door open sensor 16) for detecting whether or not the opening/closing body is in an open state;
an open/close corresponding storage area (door state area 74e) for storing information corresponding to the detection result of the open detection means;
When it is specified that the state of the opening/closing body has been switched to the notification target state which is at least one of the open state and the closed state using the information stored in the opening/closing correspondence storage area, the notification corresponding processing (second Steps S703 and S706 of the main side MPU 72 in the first embodiment, and notification processing in the effect side MPU 92). a function to execute a notification process in the production side MPU 92);
Based on the occurrence of an erasure trigger (setting change operation, reset button 56 operation), information erasure processing (the erasing process executing means for executing steps S301 to S307 of the main MPU 72 (function for executing the processes of steps S301 to S307 of the main MPU 72 in the first embodiment);
with
A gaming machine, wherein when the erasing process is executed, the information in the open/close corresponding storage area becomes information (reset state information) different from the information indicating the state to be notified.

According to feature E1, when it is specified that the state of the opening and closing body is in the notification target state, the notification response process is executed. It is possible to make the administrator of In this case, when the information storage means including the openable/closable storage area is erased due to the occurrence of the erasing opportunity, the information in the openable/closable storage area indicates that the opening/closing body is in the notification target state. This information is different from the information indicating that As a result, when the erasing process is executed in a state in which the opening/closing body is in the notification target state, the information in the opening/closing storage area becomes information different from the information indicating that the opening/closing body is in the notification target state, and open detection is performed. The detection result of the means is a detection result indicating that the opening/closing body is in the notification target state. Therefore, by specifying that the opening/closing body has switched to the notification target state, it is possible to execute the notification response process after the erasing process is executed. Therefore, it is possible to appropriately perform notification corresponding to the state of the opening/closing body.

Feature E2. The gaming machine according to feature E1, wherein the closed state of the opening/closing body corresponds to the notification target state.

According to feature E2, even if an act of illegally executing the erasing process is performed while the opening/closing body is maintained in the closed state, in this case, even if the opening/closing body is maintained in the closed state, the erasure process is performed. is executed, a process for notifying that the opening/closing body has been switched to the closed state is executed. This makes it possible to deal with the fraudulent act.

Feature E3. The notification execution means is configured to determine whether the state of the opening/closing body detected by the opening detection means is the notification in a situation where information different from information corresponding to the notification target state is stored in the opening/closing correspondence storage area. The gaming machine according to feature E1 or E2, characterized in that the notification handling process is executed when it is specified that the target state has been established.

According to feature E3, it is determined that the state of the opening/closing body detected by the open detecting means has become the notification target state in a situation where information different from the information corresponding to the notification target state is stored in the open/close corresponding storage area. Since the notification response process is executed when it is specified, it is possible to execute the notification response process in response to the switching of the state of the opening/closing body to the notification target state. Then, when the erasing process is executed in the configuration, the information in the open/close corresponding storage area becomes information different from the information indicating that the opening/closing body is in the notification target state. When erasing processing is executed under certain circumstances, it is possible to execute notification handling processing after the erasing processing is executed.

Feature E4. Both the open state of the opening and closing body and the closed state of the opening and closing body correspond to the notification target state,
When the erasing process is executed, the information in the openable/closable storage area is different from the information indicating that the opening/closing body is in the open state and the information indicating that the opening/closing body is in the closed state. The gaming machine according to any one of features E1 to E3, characterized by:

According to feature E4, both the open state of the opening and closing body and the closed state of the opening and closing body correspond to the notification target state, so the notification response is performed based on the switching of the opening and closing body to the open state. When the processing is executed and the opening/closing body is switched to the closed state, the notification handling processing is executed. In this case, when the information storage means including the openable/closable storage area is erased due to the occurrence of the erasing opportunity, the information in the openable/closable storage area is information indicating that the opening/closing member is in the open state. and the information indicating that the opening/closing body is in the closed state. As a result, when the erasing process is executed, the notification handling process can be executed regardless of whether the opening/closing body is open or closed at that time.

Feature E5. The notification execution means is
In a situation where information different from information indicating that the opening/closing body is in the open state is stored in the opening/closing correspondence storage area, opening is performed when the opening detecting means detects that the opening/closing body is in the open state. Means for executing corresponding notification corresponding processing (step S703 of the main side MPU 72 in the first embodiment, step S805 in the effect side MPU 92) (function of executing the processing of step S703 of the main side MPU 72 in the first embodiment, A function of executing the processing of step S805 in the production side MPU 92);
In a situation where information different from information indicating that the opening/closing body is in the closed state is stored in the opening/closing correspondence storage area, when the opening detection means detects that the opening/closing body is in the closed state. Means for executing notification handling processing (step S706 of the main side MPU 72 in the first embodiment, step S812 in the effect side MPU 92 in the first embodiment) (function of executing the processing of step S706 in the main side MPU 72 in the first embodiment) , a function of executing the processing of step S812 in the production side MPU 92);
The gaming machine according to any one of features E1 to E4, characterized by comprising:

According to the feature E5, when the opening/closing body is switched to the open state, the notification response process corresponding to the opening is executed, and when the opening/closing body is switched to the closed state, the notification response process corresponding to the closing is executed. . In this case, when the erasing process is executed, the information in the opening/closing corresponding storage area becomes information different from the information indicating that the opening/closing body is in the open state and the information indicating that the opening/closing body is in the closed state. . As a result, when the erasing process is executed while the opening/closing body is open, the notification corresponding process corresponding to the opening is executed after the erasing process is executed, and when the erasing process is executed while the opening/closing body is closed. After the erasing process is executed, the notification corresponding process corresponding to the closing is executed.

Feature E6. When the erasing process is executed, the open/close corresponding storage area is cleared to "0", so that the information in the open/close corresponding storage area is different from the information indicating the notification target state. The gaming machine according to any one of features E1 to E5, characterized by:

According to feature E6, even if additional processing for setting information in the openable/closable storage area is not executed after the erase process is executed, the openable/closable storage area is deleted when the erase process is executed. It is possible to make the information different from the information indicating that the information is in the notification target state.

Feature E7. A specific operation means (reset button 56, setting key insertion hole 57) provided at a position exposed in front of the game machine when the opening and closing body is opened,
Any one of features E1 to E6, wherein the erasing process executing means executes the erasing process based on operation of the specific operation means when supply of operating power is started. The game machine described.

According to the feature E7, in order to execute the erasing process, it is necessary to start the supply of the operating power with the openable/closable member in the open state, and the above-mentioned excellent effects can be obtained. It becomes possible.

For the configuration of features E1 to E7, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the features of feature group E, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machine such as the one illustrated above, it is necessary to suitably execute notification corresponding to the state of the openable/closable body, and there is still room for improvement in this respect.

<Feature group F>
Feature F1. A value information storage area (bet number setting counter 74a, medium award counter of main side RAM 74) capable of storing value information related to the number of game values (information on the number of bets and the number of game media in the awarded mode); ,
Predetermined display control means (the a function of executing the control processing of the bet display unit of the main MPU 72, a function of executing the processing of step S508 of the main MPU 72 in the first embodiment;
A game executing means (reel 32L) is provided so that a game unit action (rotation of the reels 32L, 32M, 32R) is started when a trigger for starting one game occurs, and the game unit action is finished when a trigger for ending one game occurs. , 32M, 32R) (function for executing the reel control process of the main side MPU 72 in the first embodiment);
After the game unit action is completed, the value information is used to execute the game corresponding process (the second control process of the game section). function to execute control processing) and
Value information erasing means (main in the first embodiment) for erasing the value information stored in the value information storage area after the game unit operation is completed and before the game corresponding process is executed. a function of executing a clear process at the end of the bonus of the side MPU 72);
Before the value information stored in the value information storage area is erased by the value information erasing means within the range of one game, the value information stored in the value information storage area is deleted in another storage area ( a separate storage executing means (a function of executing the process of step S911 of the main side MPU 72 in the first embodiment) to be stored in the bet number history counter 74f, the award number history counter);
with
The gaming machine, wherein the game correspondence executing means executes the game correspondence processing using the value information stored in the separate storage area.

According to the feature F1, since the display corresponding to the value information stored in the value information storage area is performed by the predetermined display means, the player can grasp the information regarding the number of game values by checking the predetermined display means. becomes possible. In addition, since the value information is used to execute the game-corresponding process after the game unit operation is completed, it is possible to execute the process corresponding to the value information in each game.

In this case, the value information stored in the value information storage area may be erased after the game unit operation is completed and before the game corresponding process is executed. By erasing the value information stored in the value information storage area, the display state of the predetermined display means is switched accordingly. As a result, it is possible to notify that the game unit action of the predetermined game has ended by using the display state of the predetermined display means, and to switch the display state of the predetermined display means to indicate that the game unit action has ended. In some cases, it can occur early.

Further, before the value information stored in the value information storage area is erased within the range of one game, the value information stored in the value information storage area is stored in a separate storage area, and the value information stored in the separate storage area is stored. A game corresponding process is executed using the value information stored in the area. As a result, the display state of the predetermined display means can be changed at an early stage when the game unit operation is completed as described above, while making it possible to execute the game corresponding processing using the value information after the game unit operation is completed. It is possible to switch.

As described above, it is possible to suitably execute the processing in each game.

Feature F2. The value information is information relating to the number of game values of 1 or more,
The gaming machine according to feature F1, wherein the predetermined display control means brings the predetermined display means into a non-display state when the value information is not stored in the value information storage area.

According to the feature F2, when the value information stored in the value information storage area is deleted, the predetermined display means is put into a non-display state. By switching the display state early when the game unit motion is completed, it is possible to clearly notify the end of the game unit motion by the predetermined display means. Become.

Feature F3. A bet setting for the gaming value is performed in each game,
The gaming machine according to feature F1 or F2, wherein the value information is information corresponding to the number of game values set for betting.

According to the feature F3, in a configuration in which the value information is information corresponding to the number of game values for which bets are set, it is possible to achieve the excellent effects already described.

Feature F4. Giving means for giving the game value to the player based on the fact that the execution result of the game unit operation is the result corresponding to giving (a function of executing the process of step S910 of the main side MPU 72 in the first embodiment) with
The gaming machine according to any one of features F1 to F3, wherein the value information is information corresponding to the number of game values given by the giving means in one game.

According to the feature F4, in a configuration in which the value information is information corresponding to the number of game values given in one game, it is possible to achieve the excellent effects already described.

Feature F5. The value information erasing means deletes the value information after the game unit action is completed in the final game in the special game state (pseudo-bonus state ST4) advantageous to the player and before the game corresponding process is executed. The gaming machine according to any one of features F1 to F4, wherein the value information stored in the storage area is erased.

According to the feature F5, it is possible to notify that the final game in the special game state has ended by switching the display state of the predetermined display means.

Feature F6. The value information is information on the number of the value information used in one game or information on the number of the value information given to the player in one game,
Characteristic features F1 through F1, wherein the game correspondence executing means executes, as the game correspondence processing, a process for specifying an increase or decrease in the number of the value information of the player in one game by using the value information. The gaming machine according to any one of F5.

According to the feature F6, when one game is over, the value information is used to identify the increase or decrease in the number of player's value information in one game. becomes possible.

For the configuration of features F1 to F6, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the features of the group of features F, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, there is still room for improvement in this regard, since it is necessary that the processing in each game be executed appropriately.

<Characteristic group G>
Feature G1. A numerical value that changes numerical information in a predetermined storage area (first output start flag, second output start flag, third output start flag, external output end flag) in a predetermined manner ("0" clear or 1 subtraction) changing means (CLR execution circuit 122 and DEC execution circuit 123 in the second embodiment);
Different information is stored in the target information storage area (jump status flag 121) depending on whether the numerical information before or after the numerical value changing means is the predetermined target numerical information and when it is not the predetermined target numerical information. information setting means (the NOR circuit 122b and the OR circuit 123c in the second embodiment) to be set to
If the information in the target information storage area is specific target information after the numerical value changing means has changed the numerical value information according to the predetermined mode, specific target processing ("1002" in the second embodiment, "1003","1005" to "1008", "1011", "1012", "1016", "1017", "1025" and "1026" program address processing). Program addresses of "1002", "1003", "1005" to "1008", "1011", "1012", "1016", "1017", "1025" and "1026" of the main side MPU 72 in the embodiment of function to execute processing corresponding to ) and
with
A gaming machine, wherein the numerical value changing means and the information setting means are provided as circuits.

According to feature G1, the numerical value information in the predetermined storage area is changed in a predetermined manner by the numerical value changing means, and either the numerical value information before or after the change by the numerical value changing means is predetermined target numerical information. Different information is set in the target information storage area depending on whether it is the predetermined target numerical value information or not. Then, after the numerical value changing means has changed the numerical value information according to the predetermined mode, the specific target process is executed when the information in the target information storage area is the specific target information. This makes it possible not only to change numerical information in a predetermined manner, but also to execute specific target processing according to the manner of change. In this case, the numerical value changing means for changing the numerical value information in the predetermined storage area in a predetermined manner and the information setting means for setting the information in the target information storage area are provided as circuits. As a result, it is possible to achieve the above-described excellent effects while reducing the processing load using the program.

Feature G2. The numerical value changing means executes change generation instructions (instructions corresponding to program addresses of "1001", "1005", "1010", "1015", and "1024" in the second embodiment) in the program. By doing so, it operates to change the numerical information in the predetermined storage area in the predetermined manner,
The gaming machine according to feature G1, wherein the information setting means sets information in the target information storage area when the numerical value changing means operates.

According to feature G2, only by setting a change generation command in the program, the numerical value changing means changes the numerical value information in a predetermined manner and the information setting means sets the information in the target information storage area. As a result, it is possible to obtain the excellent effects as described above while reducing the program capacity.

Feature G3. The target information storage area can store "0" or "1",
The gaming machine according to feature G1 or G2, wherein the specific target information is information of either "0" or "1".

According to feature G3, since the target information storage area is a storage area for storing binary information of "0" or "1", it is possible to reduce the storage capacity required for the target information storage area.

Feature G4. The information setting means sets different information in the target information storage area depending on whether the numerical information before being changed by the numerical value changing means is the predetermined target numerical information and when it is not the predetermined target numerical information. The gaming machine according to any one of features G1 to G3, characterized in that

According to feature G4, information corresponding to the numerical information before being changed by the numerical value changing means is set in the target information storage area. It becomes possible to execute specific target processing according to previous numerical information.

Feature G5. The game machine according to feature G4, wherein the numerical value changing means clears the numerical value information in the predetermined storage area to "0".

According to the feature G5, it is possible to execute "0" clearing of the numerical information while reducing the program capacity, and "0" clearing is performed without confirming the numerical information before the "0" clearing in the program. It is possible to perform processing corresponding to the numerical information above.

Feature G6. The information setting means stores different information in the target information storage area depending on whether the numerical information after being changed by the numerical value changing means is the predetermined target numerical information or when it is not the predetermined target numerical information. The gaming machine according to any one of features G1 to G3, characterized in that it is set.

According to feature G6, information corresponding to the numerical information after being changed by the numerical value changing means is set in the target information storage area. It is possible to execute specific target processing according to the changed numerical information.

For the configuration of features G1 to G6, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the characteristics of the characteristic group G, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the game machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

<Characteristic group H>
Feature H1. A game provided with a control means (main side MPU 72 in the second embodiment) for jumping a program to be executed to a program at an address designated by the jump instruction when a jump condition is established in the jump instruction. on the machine,
A first jump instruction (JR instruction) and a second jump instruction (JRS instruction) are set as the jump instructions,
The gaming machine, wherein the second jump instruction has a data capacity smaller than that of the first jump instruction.

According to feature H1, a first jump instruction with a relatively large data capacity and a second jump instruction with a relatively small data capacity are set as jump instructions. This makes it possible to reduce the program capacity by selectively using the first jump instruction and the second jump instruction as required.

Feature H2. The second jump instruction is characterized in that an address range (difference between program addresses specified by address data) to which the second jump instruction can be jumped when the jump condition is satisfied is narrower than that of the first jump instruction. The gaming machine described in H1.

According to the characteristic H2, the second jump instruction has a narrower address range than the first jump instruction to which the jump can be made when the jump condition is satisfied. Small capacity. Therefore, by using the second jump instruction when the address range to be jumped is narrow and by using the first jump instruction when the address range to be jumped is wide, the jump instruction can be appropriately executed while reducing the program capacity. can be reduced.

Feature H3. The gaming machine according to feature H1 or H2, wherein the second jump instruction has a smaller data capacity for setting the jump condition (data capacity of condition data) than the first jump instruction.

According to feature H3, the second jump instruction has a smaller data capacity for setting jump conditions than the first jump instruction, but has a smaller data capacity than the first jump instruction. Therefore, by using the second jump instruction when the jump condition is simple and using the first jump instruction when the jump condition is complicated, the program capacity can be reduced while the jump instruction can be appropriately executed. It becomes possible to

Feature H4. A numerical value that changes numerical information in a predetermined storage area (first output start flag, second output start flag, third output start flag, external output end flag) in a predetermined manner ("0" clear or 1 subtraction) changing means (CLR execution circuit 122 and DEC execution circuit 123 in the second embodiment);
Different information is stored in the target information storage area (jump status flag 121) depending on whether the numerical information before or after the numerical value changing means is the predetermined target numerical information and when it is not the predetermined target numerical information. information setting means (the NOR circuit 122b and the OR circuit 123c in the second embodiment) to be set to
with
The numerical value changing means and the information setting means are provided as circuits,
According to any one of features H1 to H3, characterized in that, as the jump condition of the second jump instruction, a condition is set as to whether or not predetermined information is set in the target information storage area. game machine.

According to feature H4, the numerical value information in the predetermined storage area is changed in a predetermined manner by the numerical value changing means, and the numerical value information either before or after the change by the numerical value changing means is predetermined target numerical information. Different information is set in the target information storage area depending on whether it is the predetermined target numerical value information or not. After the numerical information is changed in a predetermined manner by the numerical value changing means, a jump to a program at a predetermined address is generated by the second jump instruction when the information in the target information storage area is predetermined information. This makes it possible not only to change the numerical information in a predetermined manner, but also to jump the program to be executed according to the manner of change. In this case, the numerical value changing means for changing the numerical value information in the predetermined storage area in a predetermined manner and the information setting means for setting the information in the target information storage area are provided as circuits. As a result, it is possible to achieve the above-described excellent effects while reducing the processing load using the program.

Feature H5. The numerical value changing means executes change generation instructions (instructions corresponding to program addresses of "1001", "1005", "1010", "1015", and "1024" in the second embodiment) in the program. By doing so, it operates to change the numerical information in the predetermined storage area in the predetermined manner,
The gaming machine according to feature H4, wherein the information setting means sets information in the target information storage area when the numerical value changing means operates.

According to feature H5, only by setting a change generation command in the program, the numerical value changing means changes the numerical value information in a predetermined manner and the information setting means sets the information in the target information storage area. As a result, it is possible to obtain the excellent effects as described above while reducing the program capacity.

Feature H6. The game machine according to feature H4 or H5, wherein the target information storage area can store "0" or "1".

According to feature H6, since the target information storage area is a storage area for storing binary information of "0" or "1", it is possible to reduce the storage capacity required for the target information storage area.

Feature H7. The information setting means sets different information in the target information storage area depending on whether the numerical information before being changed by the numerical value changing means is the predetermined target numerical information and when it is not the predetermined target numerical information. The game machine according to any one of features H4 to H6, characterized in that

According to feature H7, information corresponding to the numerical information before being changed by the numerical value changing means is set in the target information storage area. It is possible to jump the program to be executed according to the previous numerical information.

Feature H8. The gaming machine according to feature H7, wherein the numerical value changing means clears the numerical value information in the predetermined storage area to "0".

According to feature H8, it is possible to execute "0" clearing of numerical information while reducing the program capacity, and "0" clearing is performed without confirming the numerical information before the "0" clearing in the program. It is possible to perform processing corresponding to the numerical information above.

Feature H9. The information setting means stores different information in the target information storage area depending on whether the numerical information after being changed by the numerical value changing means is the predetermined target numerical information or when it is not the predetermined target numerical information. The game machine according to any one of features H4 to H6, characterized in that it is set.

According to feature H9, information corresponding to the numerical information after being changed by the numerical value changing means is set in the target information storage area. It is possible to jump the program to be executed according to the numerical information after the change.

Feature H10. A gaming machine comprising control means for jumping a program to be executed to a program at an address designated by a jump instruction when a jump condition is satisfied by the jump instruction,
A first jump instruction (JR instruction) and a second jump instruction (JRS instruction) are set as the jump instructions,
A gaming machine, wherein the second jump instruction has a narrower address range than the first jump instruction, to which the jump can be made when the jump condition is satisfied.

According to feature H10, a first jump instruction with a relatively wide address range and a second jump instruction with a relatively narrow address range are set as jump instructions. As a result, by selectively using the first jump instruction and the second jump instruction as necessary, it is possible to adjust the address range that can be jumped.

For the configuration of features H1 to H10, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the characteristics of the characteristic group H, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is preferable to reduce the program capacity required in the control means, and there is still room for improvement in this respect.

<Characteristic group I>
Features I1. A game unit action (rotation of the reels 32L, 32M, 32R) is started when a game start opportunity is generated based on the player's operation, and the game unit action is started when an end opportunity is generated based on the player's operation. A game control means (function for executing reel control processing of the main side MPU 72 in the first embodiment) that controls the game execution means (reels 32L, 32M, 32R) so that the
Standby opportunity (a direct hit lottery process in step S2208 results in direct hit winning and the process in step S2211 is executed, the start game in the pseudo-bonus state ST4 is started, and any process in step S2605, step S2608 or step S2610 is executed) ) occurs, progress waiting means (in the first embodiment a function of executing the processing of steps S2211, S2605, S2608 and S2610 of the main MPU 72;
Wait limit means (first a function of executing the processing of steps S2602 and S2603 of the main MPU 72 in the embodiment of
A game machine characterized by comprising:

According to the feature I1, when the waiting opportunity occurs, the progress of the game unit action based on the player's operation is waited, so that it is possible to create a situation in which the progress of the game unit action is waited. In this case, if a waiting opportunity occurs in the limited waiting state, the progress waiting state is not set. As a result, it is possible to prevent the game from being set to the progress waiting state even if a waiting opportunity occurs in a situation that is not preferable for the progress of the game.

Feature I2. The gaming machine according to feature I1, wherein the standby restriction means sets the standby restriction state within a range of a predetermined number of games (one game) from the game set in the progress standby state.

According to feature I2, even if a waiting opportunity occurs within the range of the predetermined number of games from the game set to the progress standby state, the progress standby state is not set, so the progress standby state is set during the short number of games. It is possible to avoid repetition.

Feature I3. The progress waiting means is
A first progress standby means (main MPU 72 in the first embodiment) that sets the progress standby state when a first standby opportunity (a direct hit win in the direct lottery process of step S2208) occurs as the standby opportunity. function to execute the process of step S2211 of);
Second progress waiting means (of the main MPU 72 in the first embodiment) for setting the progress standby state when a second waiting opportunity (starting of the start game in the pseudo-bonus state ST4) occurs as the waiting opportunity. a function of executing the processes of steps S2605, S2608 and S2610;
with
When the progress waiting state is set by the first progress waiting means, the waiting restricted state occurs after the progress waiting state ends,
The gaming machine according to feature I1 or I2, wherein the standby restriction means prevents the progress standby state from being set even if the second standby opportunity occurs in the standby restriction situation.

According to the feature I3, the progress standby state is set when the first standby trigger occurs, and the progress standby state is set when the second standby trigger occurs. This makes it possible to diversify the situations in which the progress waiting state is set. In this case, if the progress waiting state is set due to the occurrence of the first waiting opportunity, the waiting limited situation will occur after the progress waiting state ends, and even if the second waiting opportunity occurs in the waiting limited situation It is not set to progress wait state. As a result, when the progress standby state is set due to the occurrence of the first standby opportunity, it is possible to use that as a trigger to create a situation where the progress standby state is not set even if the second standby opportunity occurs. becomes.

Feature I4. The first standby opportunity is when a definite event (direct hit winning in the direct hit lottery process of step S2208) occurs that confirms the transition to a special game state (pseudo bonus state ST4) advantageous to the player. occur,
The gaming machine according to feature I3, wherein the second waiting opportunity occurs in the special game state.

According to feature I4, when a definite event confirming that the transition to the special game state occurs, the progress waiting state is set, so that the player can be made to clearly recognize that the definite event has occurred. becomes. In this case, if the progress waiting state is set due to the occurrence of the first waiting opportunity, the waiting limited situation will occur after the progress waiting state ends, and even if the second waiting opportunity occurs in the waiting limited situation It is not set to progress wait state. As a result, when the progress waiting state is set due to the occurrence of a definite event, it is possible to prevent the progress waiting state from being set in the subsequent special game state.

Feature I5. The game next to the game in which the defined event has occurred is the first game in the special game state,
The first waiting opportunity occurs in a game in which the defined event occurs,
The gaming machine according to feature I4, wherein the second waiting opportunity occurs in the first game in the special game state.

According to the feature I5, the progress waiting state is basically set in the first game in the special game state, so that the player can be made to clearly recognize that the special game state has started. In this case, when a definite event occurs and the state shifts to the special game state, the game in which the definite event occurs is set to a progress waiting state, whereas the first game in the special game state progresses. Not set to standby. As a result, it is possible to prevent the setting of the progress standby state from occurring two games in a row.

For the configuration of features I1 to I5, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the feature group I, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machines such as the above examples, it is not preferable that the game progress based on the player's operation is forced to wait for an excessive amount of time, and there is still room for improvement in this respect. There is

<Characteristic group J>
Feature J1. Among multiple types of selection targets (1st to 5th game number modes, 1st to 5th winning rate modes), selection targets for lottery (2nd to 5th game number modes, 2nd to 5th winning rate modes ) (the function of executing the processing of steps S2407, S2412, S2417 and S2422 of the main MPU 72 in the first embodiment) for sequentially changing the
Numerical information acquisition means ( a function of executing LV acquisition processing of the main MPU 72 in the first embodiment;
Winning determination means (the main MPU 72 in the first embodiment) that determines whether or not the selection target of the lottery will be won by using the lottery numerical information acquired by the numerical information acquisition means. a function of executing the processes of steps S2410, S2411, S2420 and S2421 of
with
The numerical value information for lottery corresponding to the object to be selected is configured to be variable according to the game situation (set value), and there are specific types (six types) of the game conditions that can change the numerical value information for lottery. and
In the predetermined numerical value information group, the number of the lottery numerical information corresponding to the product of the number of selection objects that can be set as the lottery object by the sequential change means and the number of the specific types is set. A gaming machine characterized by:

According to the feature J1, the lottery target is sequentially changed in a plurality of types of selection objects, and the lottery numerical information corresponding to the selection object that is the lottery object is acquired from the predetermined numerical information group, and the acquired lottery is performed. It is determined whether or not the selection target which is the lottery target wins the prize using the numerical value information for use. In this case, in a configuration in which the lottery numerical information corresponding to each selection object can vary according to a specific type of game situation, the predetermined numerical information group includes the number of selection objects that can be set as lottery objects and the specified A number of lottery numerical information is set corresponding to the product of the number of types of game situations. As a result, it is possible to make the predetermined numerical value information group common to all combinations of selection objects and game situations that can be selected by lottery. In addition, since the number of lottery numerical information corresponding to the specific type of game situation is set for any selection object that can be the lottery object, the combination of the selection object and the game situation set as the lottery object It is possible to standardize the processing when reading the corresponding lottery numerical information from the predetermined numerical information group. Therefore, it is possible to suitably execute the lottery process.

Feature J2. In a specific game situation among the game situations of the specific type, the selection object of a predetermined type is not won (for example, a fifth game number mode when the set value is "1"),
Numerical information corresponding to non-winning (determination value LV of "0") is set in the predetermined numerical information group as the lottery numerical information corresponding to the selection object of the predetermined type in the specific gaming situation. The gaming machine according to feature J1, characterized in that

According to the feature J2, even if the predetermined type of selection object does not win in the specific game situation, the predetermined numerical information group contains lottery numerical information corresponding to the predetermined type of selection object in the specific game situation. Numerical information corresponding to non-winning is set as . As a result, even if there is a gaming situation in which winning is not guaranteed, there is lottery numerical information corresponding to the number of the specific type. Therefore, the number of lottery numerical information corresponding to the specific type of game situation is set for any selection object that can be the lottery object, and the combination of the selection object and the game situation set for the lottery object. It becomes possible to standardize the processing when reading the numerical value information for lottery corresponding to from the predetermined numerical value information group.

Feature J3. In the predetermined numerical information group, the lottery numerical information of a number corresponding to the number of the specific types is set for each type of the selection object,
The number of the lottery numerical information corresponding to the number of the specific types corresponding to one type of the selection target in the predetermined numerical information group is stored in data addresses (address information D(1) to D(24), The gaming machine according to feature J1 or J2, characterized in that the address information E(1) to E(24)) are set to be serial numbers.

According to feature J3, the number of lottery numerical information corresponding to the number of specific types corresponding to one type of selection object in the predetermined numerical information group is set so that the addresses on the data are serial numbers. As a result, in the predetermined numerical information group, the number of lottery numerical information corresponding to the number of specific types is collectively set for each type of selection object, and the number of lottery numerical information corresponds to the selection object of lottery. It becomes easy to acquire the lottery numerical information corresponding to the current game situation among the lottery numerical information.

Feature J4. The number of the numerical value information for lottery corresponding to the number of the specific types aggregated for each type of the selection object in the predetermined numerical information group is such that the order of the addresses on the data is the type of the corresponding gaming situation. The game machine according to feature J3, wherein the order is a fixed order according to the.

According to feature J4, the number of lottery numerical information corresponding to the number of specific types aggregated for each type of selection object in the predetermined numerical information group is determined according to the type of gaming situation to which the order of addresses on the data corresponds. are in a certain order. As a result, the order of the addresses on the data in which the lottery numerical information corresponding to the current gaming situation among the lottery numerical information corresponding to the selection target of the lottery is set depends on the type of the game situation. is defined uniquely. Therefore, it becomes easier to acquire the lottery numerical information corresponding to the current gaming situation among the lottery numerical information corresponding to the selection target of the lottery.

Feature J5. The numerical information acquisition means is set so as to correspond to the numerical information corresponding to the arrangement order in the predetermined numerical information group of the selection target of the lottery and the current game situation in the predetermined order. By executing the arithmetic processing (steps S2501 to S2504) for deriving the address using the numerical information corresponding to the order, the selection target that is the lottery object in the predetermined numerical information group and the current game situation The gaming machine according to feature J4, wherein an address on the data in which the lottery numerical information corresponding to the combination of is set is obtained.

According to feature J5, the numerical information corresponding to the arrangement order in the predetermined numerical information group of selection targets to be selected by lottery, and the numerical value corresponding to the order set in correspondence with the current gaming situation in a certain order. Data in which lottery numerical information corresponding to a combination of a selection target for lottery and a current gaming situation in a predetermined numerical information group is set by executing arithmetic processing for address derivation using information. The above address is obtained. As a result, it is possible to reduce the processing load when obtaining the lottery numerical value information corresponding to the combination of the selection target of the lottery and the current gaming situation.

Feature J6. Means (a role in the main MPU 72) for executing a profit giving process (lottery process for a role) in a mode corresponding to a setting value set as a target to be used from among a plurality of stages of setting values corresponding to the player's advantage. function to execute the lottery process),
The specific type of set value that can be set as the use target exists,
The gaming machine according to any one of features J1 to J5, wherein the set values set as the usage targets are different for each of the specific types of gaming situations.

According to the characteristic J6, in the configuration in which the lottery numerical value information corresponding to the setting value set as the object to be used is acquired, it is possible to obtain the above excellent effects.

For the configuration of features J1 to J6, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group K>
Features K1. Numeric value updating means (the second random number circuit 76 in the first embodiment) for updating predetermined numerical value information (second random number) of a predetermined number of bits (16 bits) stored in a predetermined numerical value storage area each time an update trigger occurs. )When,
First lottery executing means (function of executing the process of step S2403 of the main MPU 72 in the first embodiment) for executing the first lottery process (step S2403 in the first embodiment) using the predetermined numerical information When,
Partial acquisition means (step S2406 of the main MPU 72 in the first embodiment , a function of executing the processes of steps S2415 and S2416);
Second lottery execution means for executing a second lottery process (steps S2407 to S2413 and steps S2417 to S2423 in the first embodiment) using the numerical information of the specific number of bits acquired by the partial acquisition means (The function of executing the processing of steps S2407 to S2413 and steps S2417 to S2423 of the main MPU 72 in the first embodiment);
A game machine characterized by comprising:

According to feature K1, in a configuration in which the predetermined number of bits of predetermined numerical information is updated each time an update trigger occurs, the first lottery process is executed using the predetermined number of bits of predetermined numerical information; The second lottery process may be executed using numerical information of a specific number of bits, which is smaller than the predetermined number of bits of the predetermined numerical information. This makes it possible to increase the number of lottery processes while suppressing an increase in the number of numerical updating means. Therefore, it is possible to suitably execute the lottery process.

Feature K2. The partial acquisition means is
Numeric value reading means for reading the predetermined numeric value information from the predetermined numeric value storage area (function of storing a second random number in the latch area 111);
Acquisition executing means for acquiring the numerical information of the specific number of bits from the predetermined numerical information read by the numerical reading means (function for executing the processing of steps S2406, S2415 and S2416 of the main MPU 72 in the first embodiment )When,
The gaming machine according to feature K1, characterized by comprising:

According to feature K2, when using numerical information of a specific number of bits, the predetermined numerical information is read from the predetermined numerical value storage area, and the numerical information of the specific number of bits is obtained from the read predetermined numerical information. As a result, even when numerical information of a specific number of bits is used, it is possible to read the predetermined numerical information from the predetermined numerical value storage area in the same manner as when the first lottery process is executed.

Feature K3. The acquisition executing means clears to "0" a target bit that is different from the specific number of bits to be used in the predetermined numerical value information read by the numerical value reading means, so that the value of the specific number of bits is obtained. The gaming machine according to feature K2, characterized by acquiring information.

According to the characteristic K3, the numerical information of the specific number of bits is obtained by clearing to "0" the target bit that is different from the specific number of bits to be used in the predetermined numerical information read from the predetermined numerical value storage area. It is a configuration that This makes it possible to simplify the processing configuration for obtaining numerical information of a specific number of bits from predetermined numerical information of a predetermined number of bits.

Feature K4. The gaming machine according to feature K3, wherein the predetermined numerical information is data in units of bytes, and the numerical information of the specific number of bits is also data in units of bytes including the specific number of bits and the target bit.

According to feature K4, even numeric information of a specific number of bits can be treated as data in units of bytes, like predetermined numeric information.

Feature K5. The predetermined numerical value information is updated by the numerical value updating means after the predetermined numerical value information is used in one of the first lottery processing and the second lottery processing and before the predetermined numerical value information is used in the other. The game machine according to any one of features K1 to K4, characterized in that the game machine has one or more rounds.

According to feature K5, in the configuration in which the predetermined numerical value information stored in the predetermined numerical value storage area is used in either the first lottery process or the second lottery process, the predetermined numerical value information is used in one of these lottery processes. The predetermined numerical value information is updated by the numerical value updating means for one or more rounds after being used until the predetermined numerical value information is used by the other. As a result, regardless of whether the first lottery process or the second lottery process uses the predetermined numerical value information stored in the predetermined numerical value storage area, the lottery result of the first lottery process and the second lottery process It is possible to prevent the process from synchronizing with the lottery result.

For the configuration of features K1 to K5, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions according to the features of the feature group J and the feature group K, the following problems can be solved.

Pachinko machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, the lottery process must be favorably executed, and there is still room for improvement in this respect.

<Characteristic group L>
Feature L1. When a special opportunity (transition to AT state ST5, continuation of setting of AT state ST5) occurs, the first output information (information of "2") is set in the output information storage area (output timing counter of main side RAM 74). a first setting means (a function of executing the processing of steps S3206 and S3210 of the main MPU 72 in the first embodiment) to set the
Output stopping means (the main MPU 72 in the first embodiment) for stopping the output of the predetermined external signal (the first external signal of HI level) based on the setting of the first output information in the output information storage area. function to execute the processing of step S3304 of);
When the output of the predetermined external signal is stopped by the output stopping means, the second setting means (first implementation) sets the second output information (information of "1") in the output information storage area. a function of executing the processing of step S3302 of the main MPU 72 in the form);
Output start means for starting the output of the predetermined external signal based on the setting of the second output information in the output information storage area (the main MPU 72 in the first embodiment executes the processing of step S3306 function) and
A game machine characterized by comprising:

According to the feature L1, in the configuration in which the output of the predetermined external signal is restarted after the output of the predetermined external signal is temporarily stopped when a special trigger occurs, the first output information is first set in the output information storage area. After that, when the output of the predetermined external signal is stopped, the second output information is set in the output information storage area. Thus, by simply updating the information set in the output information storage area sequentially, it is possible to restart the output of the predetermined external signal after temporarily stopping the output of the predetermined external signal. Therefore, it is possible to suitably perform processing for outputting the predetermined external signal.

Feature L2. When a predetermined output trigger (transition to the pseudo-bonus state ST4) different from the case where the output of the predetermined external signal is stopped by the output stop means occurs, the second output information is set in the output information storage area. The gaming machine according to feature L1, characterized by comprising a third setting means (a function of executing the processing of step S3203 of the main MPU 72 in the first embodiment) to set the state to be set.

According to the characteristic L2, when the output of the predetermined external signal is not restarted after the output of the predetermined external signal is temporarily stopped, but when the output of the predetermined external signal is simply started, the output information storage area stores the first 2 output information is set, the output of the predetermined external signal is started. As a result, by using the output information storage area, a predetermined It is possible to control the output of external signals.

Feature L3. When the output of the predetermined external signal is started by the output start means, maintenance information is set in the output information storage area,
The gaming machine according to feature L1 or L2, wherein the state of the predetermined external signal is not changed in a state where the maintenance information is set in the output information storage area.

According to feature L3, it is possible to maintain the state in which the predetermined external signal is output by using the output information storage area.

Feature L4. The information set in the output information storage area is numerical information,
The gaming machine according to any one of features L1 to L3, wherein the second output information is numerical information obtained by varying the first output information by a predetermined variation target value ("1").

According to feature L4, by varying the numerical information by a predetermined variation target value, it is possible to restart the output of the predetermined external signal that has been temporarily stopped.

Feature L5. Determining whether to stop the output of the predetermined external signal by the output stop means or start the output of the predetermined external signal by the output start means based on the information stored in the output information storage area The gaming machine according to any one of features L1 to L4, wherein the processing (steps S3301 and S3303 in the first embodiment) is performed at one predetermined timing in one game.

According to the feature L5, when the output of the predetermined external signal is restarted after the output of the predetermined external signal is temporarily stopped, the period during which the output of the predetermined external signal is stopped is guaranteed for one game. becomes possible.

Feature L6. The gaming machine according to any one of features L1 to L5, wherein the special opportunity occurs in a situation where the predetermined external signal is being output.

According to the feature L6, it is possible to obtain the excellent effect as described above when restarting the output of the predetermined external signal after temporarily stopping the output of the predetermined external signal.

Feature L7. The first setting means, after the period advantageous to the player (set of pseudo-bonus state ST4 and AT state ST5) ends, the advantageous period (continuation of the set of AT state ST5) or another advantageous period ( Any one of the features L1 to L6, wherein when the AT state ST5 is started, the first output information is set in the output information storage area as the occurrence of the special opportunity. 1. The gaming machine according to 1.

According to the feature L7, when the output of the predetermined external signal is restarted after the output of the predetermined external signal is temporarily stopped in a situation where the advantageous period continues, it is possible to obtain the excellent effect as described above. Become.

Feature L8. When a plurality of games are executed in a predetermined game state (AT state ST5) and one execution round is completed and a continuation condition is satisfied, an execution round continuation means (second 1 function of executing the processing of steps S3114 to S3116 of the main side MPU 72 in the embodiment),
The gaming machine according to any one of features L1 to L7, wherein the special opportunity occurs when a new execution cycle is started by the execution cycle continuation means.

According to the feature L8, in a situation where one execution round of the predetermined game state is completed and a new execution round is started, the output of the predetermined external signal is temporarily stopped, and then the output of the predetermined external signal is restarted. In some cases, it is possible to obtain the excellent effects as described above.

For the configuration of features L1 to L8, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the features of the group of features L, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the game machines such as those exemplified above, it is necessary to appropriately output the external signal, and there is still room for improvement in this regard.

<Characteristic group M>
Feature M1. At least the first gaming situation (CB state, non-CB state and CB winning data stored, non-CB state and CB winning data not stored) and second gaming situation ( When the number of bets is "2", when the number of bets is "3"), and a gaming machine in which a game is executed in a manner corresponding to the contents of these gaming situations,
A first updating means (first a function of executing the processing of steps S1402 and S1405 of the main MPU 72 in the embodiment);
A second updating means (a step of the main MPU 72 in the first embodiment) for updating the numerical information for judgment so that the numerical information for judgment in the storage area for judgment varies according to the content of the second game situation a function to execute the processing of S1403);
Information correspondence execution means for executing information correspondence processing (lottery processing for winning combination) using the numerical value information for judgment in the storage area for judgment (function for executing lottery processing for winning combination of main MPU 72 in the first embodiment) )When,
A game machine characterized by comprising:

According to the feature M1, the determination numerical value information in the determination storage area is updated so as to vary according to the details of the first game situation, and updated so as to vary according to the details of the second game situation. Then, the information correspondence processing is executed using the determination numerical value information in the determination storage area. In other words, information based on the content of a plurality of game situations including the content of the first game situation and the content of the second game situation are aggregated as numerical value information for judgment, and only by referring to the aggregated numerical information for judgment It is possible to execute information correspondence processing according to the contents of a plurality of game situations. Therefore, it is possible to simplify the processing configuration for executing the information correspondence processing according to the contents of a plurality of game situations.

Feature M2. The first updating means changes the numerical value information for judgment in one of the increasing side and the decreasing side of the numerical value information for judgment in the storage area for judgment,
The second updating means changes the numerical value information for judgment to the same side as the side on which the numerical value information for judgment in the storage area for judgment increases or decreases, to which the first updating means changes. The gaming machine according to feature M1, characterized by:

According to the feature M2, the numerical value information for judgment in the storage area for judgment fluctuates to one of the increasing side and the decreasing side according to the content of each game situation. As a result, it is possible to prevent the correspondence relationship between the combination of the contents of a plurality of game situations and the judgment numerical information from becoming complicated.

Feature M3. There are a plurality of types of contents of the first game situation,
The first updating means changes the numerical value information for judgment in the storage area for judgment by a variation amount according to the type of content of the first game situation,
There are a plurality of types of contents of the second game situation,
The gaming machine according to the feature M1 or M2, wherein the second update means changes the numerical value information for judgment in the storage area for judgment by a variation amount according to the type of content of the second game situation.

According to the characteristic M3, the determination numerical information is varied by a variation amount according to the type of content of the first game situation, and the determination numerical information is varied by a variation amount according to the content of the second game situation. . As a result, it is possible to collect information based on the contents of a plurality of game situations, including the contents of the first game situation and the contents of the second game situation, as numerical value information for judgment.

Feature M4. When the content of the first gaming situation is the content of a specific type (CB state), the numerical value information for judgment in the storage area for judgment is changed by the amount of change corresponding to the content of the specific type by the first updating means. The game machine according to any one of features M1 to M3, wherein the second updating means does not change the numerical information for determination.

According to the feature M4, when the content of the first game situation is the content of a specific type, the determination numerical information is changed by a variation amount according to the content of the specific type, while the content of the second game situation is changed. The numerical information for judgment is not changed accordingly. As a result, when the content of the first game situation is the content of the specific type, in a situation where the content of the second game situation does not affect the execution content of the information handling process, the determination numerical information is not provided for the situation. It is possible to prevent multiple types from existing.

Feature M5. The first game situation is a game state,
The gaming machine according to any one of features M1 to M4, wherein the second gaming situation is the number of bets per game.

According to the feature M5, it is possible to obtain the excellent effects already described when executing the information handling process according to the gaming state and the bet number.

Feature M6. The gaming machine according to any one of features M1 to M5, wherein the information-corresponding execution means executes the lottery process in a mode corresponding to the numerical value information for judgment in the storage area for judgment.

According to the feature M6, information based on the content of a plurality of game situations including the content of the first game situation and the content of the second game situation are aggregated as the numerical information for judgment, and the aggregated numerical information for judgment is used. It is possible to execute a lottery process according to the contents of a plurality of game situations just by referring to it. Therefore, it is possible to simplify the processing configuration for executing the lottery processing according to the contents of a plurality of game situations.

Feature M7. The information correspondence execution means,
A sequential change means (a function of executing the processing of steps S1304 and S1309 of the main MPU 72 in the first embodiment) that sequentially changes the selection target to be selected from a plurality of types of selection targets (index value IV);
The numerical value information for determination in the storage area for determination is collated against corresponding information groups (groups of data 101a to 101q for IV=1 to 17) provided corresponding to the selection targets to be selected by lottery. Numerical information acquisition means for acquiring lottery numerical information (point value PV) based on the above (function for executing PV acquisition processing of the main MPU 72 in the first embodiment);
Winning determination means (the main MPU 72 in the first embodiment) that determines whether or not the selection target of the lottery will be won by using the lottery numerical information acquired by the numerical information acquisition means. function to execute the process of step S1307 of);
The game machine according to any one of features M1 to M6, characterized by comprising:

According to feature M7, lottery numerical value information is acquired based on comparing the determination numerical value information in the determination storage area against the correspondence information group provided corresponding to the selection target of the lottery, Using the lottery numerical value information, it is determined whether or not the selection target for the lottery wins. As a result, even if the numerical value information for lottery corresponding to the selection object can differ according to the contents of various game situations, when acquiring the numerical value information for lottery, the correspondence information group corresponding to the selection object is Since it is only necessary to collate the numerical value information for determination, it is possible to simplify the processing configuration for acquiring the numerical value information for lottery.

Feature M8. The correspondence information group (IV=17 data group 101q) corresponding to the predetermined selection object contains the lottery numerical information for the predetermined determination numerical information (determination value counter 74j=“1”). is not set and
When the numerical information for lottery corresponding to the predetermined numerical information for judgment is not set in the correspondence information group, the numerical information acquisition means determines that the numerical information for lottery corresponding to the numerical information for judgment is not won. The gaming machine according to feature M7, characterized by comprising means for deriving corresponding numerical information (“0”) (function for executing the process of step S1509 of the main side MPU 72 in the first embodiment).

According to feature M8, in a configuration in which winning is not guaranteed when a predetermined combination of various gaming situations is a predetermined combination of predetermined selection items, the corresponding information group corresponding to the selection items corresponds to the predetermined combination. The lottery numerical information for the judgment numerical information is not set. This makes it possible to reduce the data volume of the correspondence information group. In addition, for judgment numerical information for which lottery numerical information is not set in the corresponding information group, numerical information corresponding to non-winning is separately derived, so that the judgment numerical information becomes non-winning. It becomes possible to do so.

Feature M9. The corresponding information group includes the order of the corresponding numerical information for judgment and addresses on the data (address data A(0) to A(3), B(0) to B(4), C(0) to C The lottery numerical value information is set so as to correspond to (1)),
The numerical information acquisition means acquires the lottery numerical information set in the order corresponding to the judgment numerical information in the judgment storage area from the corresponding information group (main side in the first embodiment). A gaming machine according to feature M7 or M8, characterized by comprising a function of executing the process of step S1508 of the MPU 72.

According to feature M9, since it is only necessary to obtain the lottery numerical information set in the order corresponding to the determination numerical information from the corresponding information group, the processing configuration for obtaining the lottery numerical information from the corresponding information group. can be simplified.

Feature M10. The corresponding information group has a number of areas for determination (game state data 102a) corresponding to the number of types of the numerical information for determination,
first information ("1") is set in the judgment area corresponding to the type of the judgment numerical information for which the lottery numerical information is set;
Second information (“0”) is set in the judgment area corresponding to the type of the judgment numerical information for which the lottery numerical information is not set,
When the first information is set in the judgment area corresponding to the judgment numerical information in the judgment storage area in the correspondence information group to be referenced, the numerical information acquisition means means for acquiring the lottery numerical value information set in the information group in association with the determination area (function for executing the process of step S1508 of the main MPU 72 in the first embodiment); The gaming machine according to any one of characterizing features M7 to M9.

According to the feature M10, only by specifying which of the first information and the second information is set in the determination area, the lottery numerical value corresponding to the determination numerical information is stored in the corresponding information group corresponding to the selection target. It becomes possible to specify whether or not the information is set. Therefore, it is possible to simplify the processing configuration for identifying whether or not the numerical value information for lottery corresponding to the numerical value information for determination is set in the correspondence information group.

Feature M11. When the second information is set in the determination area corresponding to the determination numerical information in the determination storage area in the corresponding information group to be referenced, the numerical information acquisition means performs the determination. Means for deriving non-winning numerical information ("0") as the lottery numerical information corresponding to the lottery numerical information (function for executing the process of step S1509 of the main MPU 72 in the first embodiment) The gaming machine according to feature M10, characterized in that

According to the feature M11, when the second information is set in the determination area, the lottery numerical information corresponding to the determination numerical information is not set in the corresponding information group, and the non-winning numerical information is not set. derived separately. This makes it possible to reduce the data volume of the correspondence information group.

For the configuration of features M1 to M11, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the features of the group M of features, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the game machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

<Characteristic N group>
Feature N1. A sequential change means (a function of executing the processing of steps S1304 and S1309 of the main MPU 72 in the first embodiment) that sequentially changes the selection target to be selected from a plurality of types of selection targets (index value IV);
Numerical information acquiring means for acquiring lottery numerical information (point value PV) corresponding to the selection target of the lottery (function for executing PV acquisition processing of the main MPU 72 in the first embodiment); ,
Winning determination means (the main MPU 72 in the first embodiment) that determines whether or not the selection target of the lottery will be won by using the lottery numerical information acquired by the numerical information acquisition means. function to execute the process of step S1307 of);
with
The determination of whether or not to win by the winning determination means is based on a plurality of types of game situations (CB state, non-internal 2-card bet state, non-internal 2-card bet state, internal 2-bet state, and It is a configuration that is performed in each of the three bet states inside),
In a predetermined game situation (for example, CB state) among the plurality of types of game situations, the selection object (index value IV=17) of the predetermined type is configured not to win the prize,
A game machine characterized in that even in the predetermined game situation, the selection target of the predetermined type is set as the lottery target by the sequential change means.

According to the feature N1, the lottery numerical information corresponding to the selection object that is the lottery target among the plurality of kinds of selection objects is acquired, and the lottery object is selected using the acquired lottery numerical information. It is determined whether or not the selection target wins. Further, the determination of whether or not the game is won is made in each of a plurality of types of game situations. In this case, although a predetermined type of selection object is not won in a predetermined game situation, the predetermined type of selection object is a lottery target even in a predetermined game situation. This makes it possible to unify the types of selection targets in any game situation. Therefore, it becomes possible to share the processing configuration for determining whether or not the selection target wins the lottery in a plurality of types of game situations, and it is possible to make the configuration for performing the lottery suitable.

Feature N2. The gaming machine according to feature N1, wherein the types of the selection targets that can be the lottery targets by the sequential change means in the plurality of types of game situations are the same.

According to feature N2, since the types of selection targets that can be selected by lottery in a plurality of types of game situations are the same, the processing configuration for determining whether or not a selection target will be won can be applied to a plurality of types of games. It becomes possible to make common in the situation, and it becomes possible to make the structure for performing a lottery suitable.

Feature N3. Corresponding information groups (data groups 101a to 101q for IV=1 to 17) are set corresponding to the plurality of types of selection targets,
The numerical information acquiring means compares information (value of the judgment value counter 74j) corresponding to the current gaming situation with the corresponding information group corresponding to the selection target of the lottery, thereby performing the lottery. The gaming machine according to feature N1 or N2, characterized in that numerical information for use is acquired.

According to the characteristic N3, the correspondence information group is set corresponding to each of the plurality of types of selection objects, and the correspondence information group corresponding to the selection object of the lottery corresponds to the current game situation. Numerical information for lottery is obtained by collating the information. This makes it possible to simplify the processing configuration for acquiring the lottery numerical value information.

Feature N4. In the corresponding information group (IV=17 data group 101q) corresponding to the predetermined selection object, the lottery numerical information is not set for a predetermined gaming situation,
When the numerical information for lottery corresponding to the predetermined game situation is not set in the corresponding information group, the numerical information acquisition means acquires numerical information ("0") corresponding to non-winning as the numerical information for lottery. The gaming machine according to feature N3, characterized by having deriving means (a function of executing the process of step S1509 of the main MPU 72 in the first embodiment).

According to feature N4, in a configuration in which winning is not guaranteed when a predetermined combination of various gaming situations is a predetermined combination of predetermined selection items, the group of corresponding information corresponding to the selection items includes a lottery for the predetermined combination. numeric information is not set. This makes it possible to reduce the data volume of the correspondence information group. In addition, for the predetermined combination for which the numerical information for the lottery is not set in the corresponding information group, the numerical information corresponding to non-winning is separately derived, so that the predetermined combination will not be selected. It becomes possible to

Feature N5. The corresponding information group has a number of areas for determination (game state data 102a) corresponding to the plurality of types of game states,
First information ("1") is set in the determination area corresponding to the type of game situation for which the lottery numerical information is set,
Second information (“0”) is set in the judgment area corresponding to a game situation of a type in which the lottery numerical information is not set,
When the first information is set in the determination area corresponding to the current gaming situation in the correspondence information group to be referred to, the numerical information acquisition means determines whether the determination area in the correspondence information group Characteristic feature N3 or N4 characterized by comprising means for acquiring the lottery numerical value information set in association with the The gaming machine described in .

According to the feature N5, only by specifying which of the first information and the second information is set in the judgment area, the corresponding information group corresponding to the selection object contains the lottery numerical value corresponding to the current gaming situation. It becomes possible to specify whether or not the information is set. Therefore, it is possible to simplify the processing configuration for identifying whether or not the numerical value information for lottery corresponding to the current gaming situation is set in the correspondence information group.

Feature N6. When the second information is set in the determination area corresponding to the current gaming situation in the correspondence information group to be referred to, the numerical information acquisition means sets the lottery numerical information as non-winning correspondence. The gaming machine according to feature N5, characterized in that it has means for deriving the numerical value information (“0”) of (the function of executing the processing of step S1509 of the main side MPU 72 in the first embodiment).

According to the feature N6, when the second information is set in the determination area, the lottery numerical information corresponding to the current gaming situation is not set in the corresponding information group, and the numerical information corresponding to non-winning is separately set. derived. This makes it possible to reduce the data volume of the correspondence information group.

For the configuration of features N1 to N6, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the features of the N group of features, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, the lottery process must be favorably executed, and there is still room for improvement in this respect.

<Characteristic group O>
Features O1. When predetermined processing (advantageous state processing at the start of the game in the third embodiment, AT state processing at the start of the game) is being executed, another processing (ending determination processing in the third embodiment) is executed. Information storage execution means ( a function of executing the processing of steps S3504 and S3601 of the main MPU 72 in the third embodiment;
Information reading means (a third a function of executing the processing of steps S3703, S3704 and S3705 of the main MPU 72 in the embodiment);
with
The specific storage area has a plurality of unit storage areas (unit storage areas 125a),
The information storage executing means, when the call opportunity occurs a plurality of times without reading the information of the return address by the information reading means, stores a predetermined number in the plurality of unit storage areas. storing the information of the return address in order,
The information reading means, when the read opportunity occurs in a situation in which a plurality of pieces of information of the return address are stored, reads the information of the return address that is stored last in the order in which it was stored, and
This game machine is
When the return address information is read by the information reading means due to the occurrence of the read opportunity, the process return means (main side in the third embodiment) returns to the process corresponding to the return address information. A function of executing the processing of steps S3703 and S3705 of the MPU 72);
A non-return means that does not return to the process corresponding to the information of the return address even though the information of the return address is read by the information reading means due to the occurrence of the read opportunity (non-return means in the third embodiment). a function of executing the process of step S3704 of the main MPU 72;
A game machine characterized by comprising:

According to feature O1, when a call trigger for reading out and executing another process occurs while a given process is being executed, the return address information of the given process is stored in the specific storage area. stored in the unit storage area. Further, when another process ends and a read trigger for returning to a predetermined process occurs, the information of the return address is read from the unit storage area to be read in the specific storage area. Then, by returning to the process corresponding to the information of the read return address, the process to be returned in the predetermined process is returned. Further, when a plurality of call triggers occur without executing the readout of the return address information, the return address information is stored in a predetermined order in the plurality of unit storage areas, and the return address information is stored in a plurality of units. When a read trigger occurs in the stored state, the stored order is read from the return address information on the rear side. As a result, when a process call is repeated before the process is returned, the caller is returned in order from the later process.

In the above configuration, even though the information of the return address is read due to the occurrence of the read opportunity, the process corresponding to the information of the return address may not be returned. As a result, while basically the order in which the read source is read is set to be returned in order from the last process, a predetermined number of processes to be returned are skipped without observing the order as an exception. It is possible to restore in order. Therefore, it becomes possible to suitably execute the process.

Feature O2. Means (a third a function of executing the processing of steps S3504 and S3601 of the main MPU 72 in the embodiment);
When the information of the return address is read from the unit storage area to be read out of the plurality of unit storage areas, the unit storage area to be read is changed in an order opposite to the predetermined order. a means for executing the processing of steps S3703, S3704 and S3705 of the main MPU 72 in the third embodiment;
The gaming machine according to feature O1, characterized by comprising:

According to feature O2, the unit storage areas from which the return address information is stored are changed in a predetermined order, whereas the unit storage areas from which the return address information is read are in an order opposite to the predetermined order. is changed by In this configuration, if an event occurs in which the processing corresponding to the information of the return address is not returned even though the information of the return address is read due to the occurrence of the read opportunity, the information of the return address is The next unit storage area in the order opposite to the predetermined order with respect to the stored unit storage area becomes the next read target. As a result, it is possible to return the processes to be restored in the order in which the predetermined number of processes are skipped.

Feature O3. If it is specified in the other process that the special condition is satisfied (if an affirmative determination is made in step S3701 or step S3702), the return address is returned by the information reading means due to the occurrence of the read opportunity. After an event occurs in which the non-returning means does not return to the process corresponding to the information of the return address even though the information is read, the information reading means returns the return address due to the occurrence of the read opportunity. The game machine according to feature O1 or O2, wherein the information is read and the process return means causes an event to return to the process corresponding to the information of the return address.

According to feature O3, in a configuration in which another process is called and executed while a predetermined process is being executed, return address information for returning to the predetermined process is provided when a special condition is met. Although it is read from the specific storage area, it does not return to the predetermined processing. Thereafter, the return address information stored in the specific storage area before the return address information is stored is read out, and the process corresponding to the return address information is resumed. As a result, when the special condition is satisfied, it is possible to return the processes to be restored in an order in which a predetermined number of processes are skipped.

Feature O4. If it is specified in the other process that the special condition is not established (if a negative determination is made in each of steps S3701 and S3702), the information reading means causes the information reading means to Even though the information of the return address is read, the information of the return address is read by the information reading means due to the occurrence of the read opportunity, without the occurrence of an event that prevents the return to the processing corresponding to the information of the return address. is read out, an event occurs that causes the process return means to return to the process corresponding to the information of the return address, and the process (step The game machine according to feature O3, characterized in that S3506 to step S3511 and step S3603 to step S3616) are executed.

According to the feature O4, when it is specified that the special condition is not satisfied in another process, even though the information of the return address is read, the process corresponding to the information of the return address is not returned. is returned to the process corresponding to the read return address information. Then, a process corresponding to the fact that the special condition is not established in the returned predetermined process is executed. As a result, it is possible to change the progress of the process depending on whether or not the special condition is satisfied in another process. In addition, if the special condition is satisfied in another process, there is no return to the predetermined process itself, so that the process corresponding to the fact that the special condition is not satisfied in the predetermined process is not executed. There is no need to set the processing for

For the configuration of features O1 to O4, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic P group>
Feature P1. Predetermined arithmetic means (fourth embodiment Then, the function of executing the processing of step S3901 in the main MPU 72, the function of executing the processing of step S4101 in the main MPU 72 in the fifth embodiment);
When the numerical information to be calculated exceeds a predetermined limit value (maximum value in the fourth embodiment, minimum value in the fifth embodiment) as a result of the predetermined calculation processing by the predetermined calculation means, the limit is exceeded. a corresponding storage area (carry flag CF) in which information (“1”) is stored;
When the limit exceeding correspondence information is stored in the corresponding storage area, limit value setting means for setting the arithmetic target numerical information to the predetermined limit value (in the fourth embodiment, the SBC instruction in the main MPU 72 is executed function, in the fifth embodiment, the function of executing an ADC command in the main MPU 72);
A game machine characterized by comprising:

According to feature P1, when the numerical information subject to computation exceeds a predetermined limit value as a result of execution of a predetermined arithmetic processing on the numerical information subject to computation, the limit exceeding correspondence information is stored in the correspondence storage area. If the corresponding storage area stores limit excess corresponding information, the calculation target numerical value information is set to a predetermined limit value. As a result, as a result of the execution of the predetermined arithmetic processing on the computational numerical information, when the computational numerical information reaches a predetermined limit value, it is possible to hold the computational numerical information at the predetermined limit value. It becomes possible. Therefore, it is possible to specify that the calculation target numerical information has reached the predetermined limit value by referring to the calculation target numerical information, and the calculation target numerical value information has reached the predetermined limit value. It is possible to suitably perform the processing for specifying that.

Feature P2. Means (main MPU 72 function to execute the process of step S3805),
When the lower byte exceeds the minimum value by performing the subtraction process on the lower byte, the limit exceeding correspondence information is stored in the corresponding storage area,
When a predetermined instruction (SBC instruction) specifying the upper byte is executed, and when the limit exceeding correspondence information is stored in the corresponding storage area by executing the subtraction process on the lower byte, A configuration in which a process of subtracting 1 from the numerical information of the upper byte is executed,
The predetermined calculation means executes an addition process (step S3901 in the fourth embodiment) on the calculation target numerical information as the predetermined calculation process,
The limit value setting means designates the computation target numerical value information and causes the predetermined instruction to be executed, so that when the addition processing is executed on the computation target numerical value information, the computation target numerical value When the limit exceeding correspondence information is stored in the corresponding storage area due to the fact that the information exceeds the maximum value and is inverted, 1 is subtracted from the numerical value information to be calculated and the numerical value information to be calculated becomes the maximum value. The gaming machine according to feature P1, characterized in that

According to feature P2, as a result of addition processing being performed on numerical information subject to computation using a predetermined instruction for carrying down digits for high-order bytes, the numerical information subject to computation reaches the maximum value. In some cases, it is possible to hold the maximum value. In addition, when the numerical information to be operated on reaches the maximum value, it is possible to hold the maximum value by one instruction, which is the predetermined instruction, so that the program capacity can be reduced.

Feature P3. Means (main side MPU 72 function to execute the process of step S4005),
When the addition process is performed on the lower byte and the lower byte exceeds the maximum value, information corresponding to exceeding the limit is stored in the corresponding storage area,
When a specific instruction (ADC instruction) specifying the upper byte is executed, when the limit exceeding correspondence information is stored in the corresponding storage area by executing the addition processing on the lower byte, A configuration in which a process of adding 1 to the numerical information of the upper byte is executed,
The predetermined calculation means executes a subtraction process (step S4101 in the fifth embodiment) on the calculation target numerical information as the predetermined calculation process,
The limit value setting means designates the computation target numerical value information and causes the specific instruction to be executed, so that when the subtraction processing is performed on the computation target numerical value information, the computation target numerical value When the limit exceeding correspondence information is stored in the corresponding storage area due to the fact that the information exceeds the minimum value and is inverted, 1 is added to the numerical value information to be calculated so that the numerical value information to be calculated becomes the minimum value. The gaming machine according to feature P1, characterized in that

According to feature P3, as a result of subtraction processing being performed on the arithmetic target numerical information using a specific instruction for carrying up the digits of the high-order bytes, the arithmetic target numeric information reached the minimum value. In some cases, it is possible to hold the minimum value. In addition, when the numerical information to be operated reaches the minimum value, it is possible to hold it at the minimum value by a single instruction called the specific instruction, so that the program capacity can be reduced.

For the configuration of features P1 to P3, features A1 to A8, features B1 to B8, features C1 to C7, features D1 to D6, features E1 to E7, features F1 to F6, features G1 to G6, features H1 to Configuration of any one or more of H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3 may apply. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions according to the features of the group of features O and the group of features P, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko machine is provided with a storage section for storing game balls, and the game balls stored in the storage section are guided to a game ball launching device and directed to a game area in response to a player's shooting operation. is fired. Then, for example, when a game ball enters a ball entry section provided in the game area, for example, a lottery process is executed, or a process for increasing the number of game balls that can be used by the player is executed. be.

In a slot machine, when a game value such as medals is betted and a new game is started by operating a start lever, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the game machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

The basic configuration of a game machine to which each of the above features can be applied is shown below.

Pachinko machine: an operation means operated by a player, a game ball shooting means for shooting game balls based on the operation of the operation means, a ball passage for guiding the shot game balls to a predetermined game area, and a game This game machine is provided with game parts arranged in an area, and gives a privilege to a player when a game ball passes through a predetermined passing part of the game parts.

Spindle-type game machine such as slot machine: The rotation of the rotating body is started based on the operation of the start operation means, the rotation of the rotating body is stopped based on the operation of the stop operation means, and the player responds to the pattern after the stop. A game machine that gives benefits to

10... Slot machine 12... Front door 16... Door opening sensor 32L, 32M, 32R... Reel 54b... Power failure monitoring circuit 56... Reset button 57... Setting key insertion hole 64... BET display unit 66... Combined display unit 72 Main side MPU 74 Main side RAM 74a Bet number setting counter 74e Door state area 74f Bet number history counter 74g Information error flag 74h Reset current storage area 74i ... Pre-reset storage area 74j ... Judgment value counter 76 ... Second random number circuit 92 ... Production side MPU 101a to 101q ... IV = 1 to 17 data group 102a ... Game state data 111 ... Latch area 112 Number of games mode lottery table 113 Winning percentage mode lottery table 121 Jump status flag 122 CLR execution circuit 122b NOR circuit 123 DEC execution circuit 123c OR circuit 125 Stack area 125a Unit storage area 126: wait counter CF: carry flag KK: monitoring period counter TK1: upper byte TK2: lower byte.

Claims (1)

special setting means for setting a special execution status based on occurrence of a special execution opportunity;
information updating means for updating the contents of special information stored in a special storage area based on the fact that the operation of the predetermined operating means is specified in the special execution situation;
with
The special information is not updated by the information updating means by the operation of the predetermined operation means when the special execution situation occurs while the operation of the predetermined operation means is continued. Amusement machine.

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